1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* ethtool support for i40e */ 28 29 #include "i40e.h" 30 #include "i40e_diag.h" 31 32 struct i40e_stats { 33 char stat_string[ETH_GSTRING_LEN]; 34 int sizeof_stat; 35 int stat_offset; 36 }; 37 38 #define I40E_STAT(_type, _name, _stat) { \ 39 .stat_string = _name, \ 40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 41 .stat_offset = offsetof(_type, _stat) \ 42 } 43 44 #define I40E_NETDEV_STAT(_net_stat) \ 45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 46 #define I40E_PF_STAT(_name, _stat) \ 47 I40E_STAT(struct i40e_pf, _name, _stat) 48 #define I40E_VSI_STAT(_name, _stat) \ 49 I40E_STAT(struct i40e_vsi, _name, _stat) 50 #define I40E_VEB_STAT(_name, _stat) \ 51 I40E_STAT(struct i40e_veb, _name, _stat) 52 53 static const struct i40e_stats i40e_gstrings_net_stats[] = { 54 I40E_NETDEV_STAT(rx_packets), 55 I40E_NETDEV_STAT(tx_packets), 56 I40E_NETDEV_STAT(rx_bytes), 57 I40E_NETDEV_STAT(tx_bytes), 58 I40E_NETDEV_STAT(rx_errors), 59 I40E_NETDEV_STAT(tx_errors), 60 I40E_NETDEV_STAT(rx_dropped), 61 I40E_NETDEV_STAT(tx_dropped), 62 I40E_NETDEV_STAT(collisions), 63 I40E_NETDEV_STAT(rx_length_errors), 64 I40E_NETDEV_STAT(rx_crc_errors), 65 }; 66 67 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 76 I40E_VEB_STAT("rx_discards", stats.rx_discards), 77 I40E_VEB_STAT("tx_discards", stats.tx_discards), 78 I40E_VEB_STAT("tx_errors", stats.tx_errors), 79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 80 }; 81 82 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 90 I40E_VSI_STAT("tx_linearize", tx_linearize), 91 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 94 }; 95 96 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 97 * but they are separate. This device supports Virtualization, and 98 * as such might have several netdevs supporting VMDq and FCoE going 99 * through a single port. The NETDEV_STATs are for individual netdevs 100 * seen at the top of the stack, and the PF_STATs are for the physical 101 * function at the bottom of the stack hosting those netdevs. 102 * 103 * The PF_STATs are appended to the netdev stats only when ethtool -S 104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 105 */ 106 static const struct i40e_stats i40e_gstrings_stats[] = { 107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 122 I40E_PF_STAT("tx_timeout", tx_timeout_count), 123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 129 I40E_PF_STAT("priority_xon_rx", stats.priority_xon_rx), 130 I40E_PF_STAT("priority_xoff_rx", stats.priority_xoff_rx), 131 I40E_PF_STAT("priority_xon_tx", stats.priority_xon_tx), 132 I40E_PF_STAT("priority_xoff_tx", stats.priority_xoff_tx), 133 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 134 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 135 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 136 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 137 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 138 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 139 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 140 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 141 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 142 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 143 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 144 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 145 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 146 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 147 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 148 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 149 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 150 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 151 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 152 I40E_PF_STAT("arq_overflows", arq_overflows), 153 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 154 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped), 155 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 156 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 157 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 158 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 159 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 160 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 161 162 /* LPI stats */ 163 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 164 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 165 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 166 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 167 }; 168 169 #define I40E_QUEUE_STATS_LEN(n) \ 170 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 171 * 2 /* Tx and Rx together */ \ 172 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 173 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 174 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 175 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 176 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 177 I40E_MISC_STATS_LEN + \ 178 I40E_QUEUE_STATS_LEN((n))) 179 #define I40E_PFC_STATS_LEN ( \ 180 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 181 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 182 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 183 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 184 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 185 / sizeof(u64)) 186 #define I40E_VEB_TC_STATS_LEN ( \ 187 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 188 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 189 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 190 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 191 / sizeof(u64)) 192 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 193 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 194 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 195 I40E_PFC_STATS_LEN + \ 196 I40E_VSI_STATS_LEN((n))) 197 198 enum i40e_ethtool_test_id { 199 I40E_ETH_TEST_REG = 0, 200 I40E_ETH_TEST_EEPROM, 201 I40E_ETH_TEST_INTR, 202 I40E_ETH_TEST_LINK, 203 }; 204 205 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 206 "Register test (offline)", 207 "Eeprom test (offline)", 208 "Interrupt test (offline)", 209 "Link test (on/offline)" 210 }; 211 212 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 213 214 struct i40e_priv_flags { 215 char flag_string[ETH_GSTRING_LEN]; 216 u64 flag; 217 bool read_only; 218 }; 219 220 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 221 .flag_string = _name, \ 222 .flag = _flag, \ 223 .read_only = _read_only, \ 224 } 225 226 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 227 /* NOTE: MFP setting cannot be changed */ 228 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 229 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 230 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 231 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 232 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 233 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 234 I40E_PRIV_FLAG("disable-source-pruning", 235 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 236 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 237 }; 238 239 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 240 241 /* Private flags with a global effect, restricted to PF 0 */ 242 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 243 I40E_PRIV_FLAG("vf-true-promisc-support", 244 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 245 }; 246 247 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 248 249 /** 250 * i40e_partition_setting_complaint - generic complaint for MFP restriction 251 * @pf: the PF struct 252 **/ 253 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 254 { 255 dev_info(&pf->pdev->dev, 256 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 257 } 258 259 /** 260 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 261 * @pf: PF struct with phy_types 262 * @ks: ethtool link ksettings struct to fill out 263 * 264 **/ 265 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 266 struct ethtool_link_ksettings *ks) 267 { 268 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 269 u64 phy_types = pf->hw.phy.phy_types; 270 271 ethtool_link_ksettings_zero_link_mode(ks, supported); 272 ethtool_link_ksettings_zero_link_mode(ks, advertising); 273 274 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 275 ethtool_link_ksettings_add_link_mode(ks, supported, 276 1000baseT_Full); 277 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 278 ethtool_link_ksettings_add_link_mode(ks, advertising, 279 1000baseT_Full); 280 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 281 ethtool_link_ksettings_add_link_mode(ks, supported, 282 100baseT_Full); 283 ethtool_link_ksettings_add_link_mode(ks, advertising, 284 100baseT_Full); 285 } 286 } 287 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 288 phy_types & I40E_CAP_PHY_TYPE_XFI || 289 phy_types & I40E_CAP_PHY_TYPE_SFI || 290 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 291 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 292 ethtool_link_ksettings_add_link_mode(ks, supported, 293 10000baseT_Full); 294 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 295 ethtool_link_ksettings_add_link_mode(ks, advertising, 296 10000baseT_Full); 297 } 298 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 299 ethtool_link_ksettings_add_link_mode(ks, supported, 300 10000baseT_Full); 301 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 302 ethtool_link_ksettings_add_link_mode(ks, advertising, 303 10000baseT_Full); 304 } 305 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 306 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 307 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 308 ethtool_link_ksettings_add_link_mode(ks, supported, 309 40000baseCR4_Full); 310 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 311 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 312 ethtool_link_ksettings_add_link_mode(ks, supported, 313 40000baseCR4_Full); 314 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 315 ethtool_link_ksettings_add_link_mode(ks, advertising, 316 40000baseCR4_Full); 317 } 318 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 319 ethtool_link_ksettings_add_link_mode(ks, supported, 320 100baseT_Full); 321 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 322 ethtool_link_ksettings_add_link_mode(ks, advertising, 323 100baseT_Full); 324 } 325 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 326 ethtool_link_ksettings_add_link_mode(ks, supported, 327 1000baseT_Full); 328 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 329 ethtool_link_ksettings_add_link_mode(ks, advertising, 330 1000baseT_Full); 331 } 332 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 333 ethtool_link_ksettings_add_link_mode(ks, supported, 334 40000baseSR4_Full); 335 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 336 ethtool_link_ksettings_add_link_mode(ks, supported, 337 40000baseLR4_Full); 338 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 339 ethtool_link_ksettings_add_link_mode(ks, supported, 340 40000baseLR4_Full); 341 ethtool_link_ksettings_add_link_mode(ks, advertising, 342 40000baseLR4_Full); 343 } 344 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 345 ethtool_link_ksettings_add_link_mode(ks, supported, 346 20000baseKR2_Full); 347 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 348 ethtool_link_ksettings_add_link_mode(ks, advertising, 349 20000baseKR2_Full); 350 } 351 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 352 ethtool_link_ksettings_add_link_mode(ks, supported, 353 10000baseKX4_Full); 354 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 355 ethtool_link_ksettings_add_link_mode(ks, advertising, 356 10000baseKX4_Full); 357 } 358 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 359 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 360 ethtool_link_ksettings_add_link_mode(ks, supported, 361 10000baseKR_Full); 362 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 363 ethtool_link_ksettings_add_link_mode(ks, advertising, 364 10000baseKR_Full); 365 } 366 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 367 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 368 ethtool_link_ksettings_add_link_mode(ks, supported, 369 1000baseKX_Full); 370 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 371 ethtool_link_ksettings_add_link_mode(ks, advertising, 372 1000baseKX_Full); 373 } 374 /* need to add 25G PHY types */ 375 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 376 ethtool_link_ksettings_add_link_mode(ks, supported, 377 25000baseKR_Full); 378 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 379 ethtool_link_ksettings_add_link_mode(ks, advertising, 380 25000baseKR_Full); 381 } 382 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 383 ethtool_link_ksettings_add_link_mode(ks, supported, 384 25000baseCR_Full); 385 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 386 ethtool_link_ksettings_add_link_mode(ks, advertising, 387 25000baseCR_Full); 388 } 389 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 390 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 391 ethtool_link_ksettings_add_link_mode(ks, supported, 392 25000baseSR_Full); 393 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 394 ethtool_link_ksettings_add_link_mode(ks, advertising, 395 25000baseSR_Full); 396 } 397 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 398 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 399 ethtool_link_ksettings_add_link_mode(ks, supported, 400 25000baseCR_Full); 401 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 402 ethtool_link_ksettings_add_link_mode(ks, advertising, 403 25000baseCR_Full); 404 } 405 /* need to add new 10G PHY types */ 406 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 407 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 408 ethtool_link_ksettings_add_link_mode(ks, supported, 409 10000baseCR_Full); 410 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 411 ethtool_link_ksettings_add_link_mode(ks, advertising, 412 10000baseCR_Full); 413 } 414 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 415 ethtool_link_ksettings_add_link_mode(ks, supported, 416 10000baseSR_Full); 417 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 418 ethtool_link_ksettings_add_link_mode(ks, advertising, 419 10000baseSR_Full); 420 } 421 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 422 ethtool_link_ksettings_add_link_mode(ks, supported, 423 10000baseLR_Full); 424 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 425 ethtool_link_ksettings_add_link_mode(ks, advertising, 426 10000baseLR_Full); 427 } 428 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 429 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 430 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 431 ethtool_link_ksettings_add_link_mode(ks, supported, 432 1000baseX_Full); 433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 434 ethtool_link_ksettings_add_link_mode(ks, advertising, 435 1000baseX_Full); 436 } 437 /* Autoneg PHY types */ 438 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 439 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 440 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 441 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 442 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 443 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 444 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 445 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 446 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 447 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 448 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 449 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 450 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 451 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 452 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 453 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 454 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 455 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 456 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 457 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 458 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 459 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 460 ethtool_link_ksettings_add_link_mode(ks, supported, 461 Autoneg); 462 ethtool_link_ksettings_add_link_mode(ks, advertising, 463 Autoneg); 464 } 465 } 466 467 /** 468 * i40e_get_settings_link_up - Get the Link settings for when link is up 469 * @hw: hw structure 470 * @ks: ethtool ksettings to fill in 471 * @netdev: network interface device structure 472 * @pf: pointer to physical function struct 473 **/ 474 static void i40e_get_settings_link_up(struct i40e_hw *hw, 475 struct ethtool_link_ksettings *ks, 476 struct net_device *netdev, 477 struct i40e_pf *pf) 478 { 479 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 480 struct ethtool_link_ksettings cap_ksettings; 481 u32 link_speed = hw_link_info->link_speed; 482 483 /* Initialize supported and advertised settings based on phy settings */ 484 switch (hw_link_info->phy_type) { 485 case I40E_PHY_TYPE_40GBASE_CR4: 486 case I40E_PHY_TYPE_40GBASE_CR4_CU: 487 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 488 ethtool_link_ksettings_add_link_mode(ks, supported, 489 40000baseCR4_Full); 490 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 491 ethtool_link_ksettings_add_link_mode(ks, advertising, 492 40000baseCR4_Full); 493 break; 494 case I40E_PHY_TYPE_XLAUI: 495 case I40E_PHY_TYPE_XLPPI: 496 case I40E_PHY_TYPE_40GBASE_AOC: 497 ethtool_link_ksettings_add_link_mode(ks, supported, 498 40000baseCR4_Full); 499 break; 500 case I40E_PHY_TYPE_40GBASE_SR4: 501 ethtool_link_ksettings_add_link_mode(ks, supported, 502 40000baseSR4_Full); 503 break; 504 case I40E_PHY_TYPE_40GBASE_LR4: 505 ethtool_link_ksettings_add_link_mode(ks, supported, 506 40000baseLR4_Full); 507 break; 508 case I40E_PHY_TYPE_25GBASE_SR: 509 case I40E_PHY_TYPE_25GBASE_LR: 510 case I40E_PHY_TYPE_10GBASE_SR: 511 case I40E_PHY_TYPE_10GBASE_LR: 512 case I40E_PHY_TYPE_1000BASE_SX: 513 case I40E_PHY_TYPE_1000BASE_LX: 514 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 515 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 516 ethtool_link_ksettings_add_link_mode(ks, supported, 517 25000baseSR_Full); 518 ethtool_link_ksettings_add_link_mode(ks, advertising, 519 25000baseSR_Full); 520 ethtool_link_ksettings_add_link_mode(ks, supported, 521 10000baseSR_Full); 522 ethtool_link_ksettings_add_link_mode(ks, advertising, 523 10000baseSR_Full); 524 ethtool_link_ksettings_add_link_mode(ks, supported, 525 10000baseLR_Full); 526 ethtool_link_ksettings_add_link_mode(ks, advertising, 527 10000baseLR_Full); 528 ethtool_link_ksettings_add_link_mode(ks, supported, 529 1000baseX_Full); 530 ethtool_link_ksettings_add_link_mode(ks, advertising, 531 1000baseX_Full); 532 ethtool_link_ksettings_add_link_mode(ks, supported, 533 10000baseT_Full); 534 if (hw_link_info->module_type[2] & 535 I40E_MODULE_TYPE_1000BASE_SX || 536 hw_link_info->module_type[2] & 537 I40E_MODULE_TYPE_1000BASE_LX) { 538 ethtool_link_ksettings_add_link_mode(ks, supported, 539 1000baseT_Full); 540 if (hw_link_info->requested_speeds & 541 I40E_LINK_SPEED_1GB) 542 ethtool_link_ksettings_add_link_mode( 543 ks, advertising, 1000baseT_Full); 544 } 545 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 546 ethtool_link_ksettings_add_link_mode(ks, advertising, 547 10000baseT_Full); 548 break; 549 case I40E_PHY_TYPE_10GBASE_T: 550 case I40E_PHY_TYPE_1000BASE_T: 551 case I40E_PHY_TYPE_100BASE_TX: 552 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 553 ethtool_link_ksettings_add_link_mode(ks, supported, 554 10000baseT_Full); 555 ethtool_link_ksettings_add_link_mode(ks, supported, 556 1000baseT_Full); 557 ethtool_link_ksettings_add_link_mode(ks, supported, 558 100baseT_Full); 559 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 560 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 561 ethtool_link_ksettings_add_link_mode(ks, advertising, 562 10000baseT_Full); 563 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 564 ethtool_link_ksettings_add_link_mode(ks, advertising, 565 1000baseT_Full); 566 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 567 ethtool_link_ksettings_add_link_mode(ks, advertising, 568 100baseT_Full); 569 break; 570 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 571 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 572 ethtool_link_ksettings_add_link_mode(ks, supported, 573 1000baseT_Full); 574 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 575 ethtool_link_ksettings_add_link_mode(ks, advertising, 576 1000baseT_Full); 577 break; 578 case I40E_PHY_TYPE_10GBASE_CR1_CU: 579 case I40E_PHY_TYPE_10GBASE_CR1: 580 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 581 ethtool_link_ksettings_add_link_mode(ks, supported, 582 10000baseT_Full); 583 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 584 ethtool_link_ksettings_add_link_mode(ks, advertising, 585 10000baseT_Full); 586 break; 587 case I40E_PHY_TYPE_XAUI: 588 case I40E_PHY_TYPE_XFI: 589 case I40E_PHY_TYPE_SFI: 590 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 591 case I40E_PHY_TYPE_10GBASE_AOC: 592 ethtool_link_ksettings_add_link_mode(ks, supported, 593 10000baseT_Full); 594 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 595 ethtool_link_ksettings_add_link_mode(ks, advertising, 596 10000baseT_Full); 597 break; 598 case I40E_PHY_TYPE_SGMII: 599 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 600 ethtool_link_ksettings_add_link_mode(ks, supported, 601 1000baseT_Full); 602 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 603 ethtool_link_ksettings_add_link_mode(ks, advertising, 604 1000baseT_Full); 605 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 606 ethtool_link_ksettings_add_link_mode(ks, supported, 607 100baseT_Full); 608 if (hw_link_info->requested_speeds & 609 I40E_LINK_SPEED_100MB) 610 ethtool_link_ksettings_add_link_mode( 611 ks, advertising, 100baseT_Full); 612 } 613 break; 614 case I40E_PHY_TYPE_40GBASE_KR4: 615 case I40E_PHY_TYPE_25GBASE_KR: 616 case I40E_PHY_TYPE_20GBASE_KR2: 617 case I40E_PHY_TYPE_10GBASE_KR: 618 case I40E_PHY_TYPE_10GBASE_KX4: 619 case I40E_PHY_TYPE_1000BASE_KX: 620 ethtool_link_ksettings_add_link_mode(ks, supported, 621 40000baseKR4_Full); 622 ethtool_link_ksettings_add_link_mode(ks, supported, 623 25000baseKR_Full); 624 ethtool_link_ksettings_add_link_mode(ks, supported, 625 20000baseKR2_Full); 626 ethtool_link_ksettings_add_link_mode(ks, supported, 627 10000baseKR_Full); 628 ethtool_link_ksettings_add_link_mode(ks, supported, 629 10000baseKX4_Full); 630 ethtool_link_ksettings_add_link_mode(ks, supported, 631 1000baseKX_Full); 632 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 633 ethtool_link_ksettings_add_link_mode(ks, advertising, 634 40000baseKR4_Full); 635 ethtool_link_ksettings_add_link_mode(ks, advertising, 636 25000baseKR_Full); 637 ethtool_link_ksettings_add_link_mode(ks, advertising, 638 20000baseKR2_Full); 639 ethtool_link_ksettings_add_link_mode(ks, advertising, 640 10000baseKR_Full); 641 ethtool_link_ksettings_add_link_mode(ks, advertising, 642 10000baseKX4_Full); 643 ethtool_link_ksettings_add_link_mode(ks, advertising, 644 1000baseKX_Full); 645 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 646 break; 647 case I40E_PHY_TYPE_25GBASE_CR: 648 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 649 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 650 ethtool_link_ksettings_add_link_mode(ks, supported, 651 25000baseCR_Full); 652 ethtool_link_ksettings_add_link_mode(ks, advertising, 653 25000baseCR_Full); 654 break; 655 case I40E_PHY_TYPE_25GBASE_AOC: 656 case I40E_PHY_TYPE_25GBASE_ACC: 657 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 658 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 659 ethtool_link_ksettings_add_link_mode(ks, supported, 660 25000baseCR_Full); 661 662 ethtool_link_ksettings_add_link_mode(ks, advertising, 663 25000baseCR_Full); 664 ethtool_link_ksettings_add_link_mode(ks, supported, 665 10000baseCR_Full); 666 ethtool_link_ksettings_add_link_mode(ks, advertising, 667 10000baseCR_Full); 668 break; 669 default: 670 /* if we got here and link is up something bad is afoot */ 671 netdev_info(netdev, 672 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 673 hw_link_info->phy_type); 674 } 675 676 /* Now that we've worked out everything that could be supported by the 677 * current PHY type, get what is supported by the NVM and intersect 678 * them to get what is truly supported 679 */ 680 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 681 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 682 ethtool_intersect_link_masks(ks, &cap_ksettings); 683 684 /* Set speed and duplex */ 685 switch (link_speed) { 686 case I40E_LINK_SPEED_40GB: 687 ks->base.speed = SPEED_40000; 688 break; 689 case I40E_LINK_SPEED_25GB: 690 ks->base.speed = SPEED_25000; 691 break; 692 case I40E_LINK_SPEED_20GB: 693 ks->base.speed = SPEED_20000; 694 break; 695 case I40E_LINK_SPEED_10GB: 696 ks->base.speed = SPEED_10000; 697 break; 698 case I40E_LINK_SPEED_1GB: 699 ks->base.speed = SPEED_1000; 700 break; 701 case I40E_LINK_SPEED_100MB: 702 ks->base.speed = SPEED_100; 703 break; 704 default: 705 break; 706 } 707 ks->base.duplex = DUPLEX_FULL; 708 } 709 710 /** 711 * i40e_get_settings_link_down - Get the Link settings for when link is down 712 * @hw: hw structure 713 * @ks: ethtool ksettings to fill in 714 * @pf: pointer to physical function struct 715 * 716 * Reports link settings that can be determined when link is down 717 **/ 718 static void i40e_get_settings_link_down(struct i40e_hw *hw, 719 struct ethtool_link_ksettings *ks, 720 struct i40e_pf *pf) 721 { 722 /* link is down and the driver needs to fall back on 723 * supported phy types to figure out what info to display 724 */ 725 i40e_phy_type_to_ethtool(pf, ks); 726 727 /* With no link speed and duplex are unknown */ 728 ks->base.speed = SPEED_UNKNOWN; 729 ks->base.duplex = DUPLEX_UNKNOWN; 730 } 731 732 /** 733 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 734 * @netdev: network interface device structure 735 * @ks: ethtool ksettings 736 * 737 * Reports speed/duplex settings based on media_type 738 **/ 739 static int i40e_get_link_ksettings(struct net_device *netdev, 740 struct ethtool_link_ksettings *ks) 741 { 742 struct i40e_netdev_priv *np = netdev_priv(netdev); 743 struct i40e_pf *pf = np->vsi->back; 744 struct i40e_hw *hw = &pf->hw; 745 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 746 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 747 748 ethtool_link_ksettings_zero_link_mode(ks, supported); 749 ethtool_link_ksettings_zero_link_mode(ks, advertising); 750 751 if (link_up) 752 i40e_get_settings_link_up(hw, ks, netdev, pf); 753 else 754 i40e_get_settings_link_down(hw, ks, pf); 755 756 /* Now set the settings that don't rely on link being up/down */ 757 /* Set autoneg settings */ 758 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 759 AUTONEG_ENABLE : AUTONEG_DISABLE); 760 761 /* Set media type settings */ 762 switch (hw->phy.media_type) { 763 case I40E_MEDIA_TYPE_BACKPLANE: 764 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 765 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 766 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 767 ethtool_link_ksettings_add_link_mode(ks, advertising, 768 Backplane); 769 ks->base.port = PORT_NONE; 770 break; 771 case I40E_MEDIA_TYPE_BASET: 772 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 773 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 774 ks->base.port = PORT_TP; 775 break; 776 case I40E_MEDIA_TYPE_DA: 777 case I40E_MEDIA_TYPE_CX4: 778 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 779 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 780 ks->base.port = PORT_DA; 781 break; 782 case I40E_MEDIA_TYPE_FIBER: 783 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 784 ks->base.port = PORT_FIBRE; 785 break; 786 case I40E_MEDIA_TYPE_UNKNOWN: 787 default: 788 ks->base.port = PORT_OTHER; 789 break; 790 } 791 792 /* Set flow control settings */ 793 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 794 795 switch (hw->fc.requested_mode) { 796 case I40E_FC_FULL: 797 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 798 break; 799 case I40E_FC_TX_PAUSE: 800 ethtool_link_ksettings_add_link_mode(ks, advertising, 801 Asym_Pause); 802 break; 803 case I40E_FC_RX_PAUSE: 804 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 805 ethtool_link_ksettings_add_link_mode(ks, advertising, 806 Asym_Pause); 807 break; 808 default: 809 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 810 ethtool_link_ksettings_del_link_mode(ks, advertising, 811 Asym_Pause); 812 break; 813 } 814 815 return 0; 816 } 817 818 /** 819 * i40e_set_link_ksettings - Set Speed and Duplex 820 * @netdev: network interface device structure 821 * @ks: ethtool ksettings 822 * 823 * Set speed/duplex per media_types advertised/forced 824 **/ 825 static int i40e_set_link_ksettings(struct net_device *netdev, 826 const struct ethtool_link_ksettings *ks) 827 { 828 struct i40e_netdev_priv *np = netdev_priv(netdev); 829 struct i40e_aq_get_phy_abilities_resp abilities; 830 struct ethtool_link_ksettings safe_ks; 831 struct ethtool_link_ksettings copy_ks; 832 struct i40e_aq_set_phy_config config; 833 struct i40e_pf *pf = np->vsi->back; 834 struct i40e_vsi *vsi = np->vsi; 835 struct i40e_hw *hw = &pf->hw; 836 bool autoneg_changed = false; 837 i40e_status status = 0; 838 int timeout = 50; 839 int err = 0; 840 u8 autoneg; 841 842 /* Changing port settings is not supported if this isn't the 843 * port's controlling PF 844 */ 845 if (hw->partition_id != 1) { 846 i40e_partition_setting_complaint(pf); 847 return -EOPNOTSUPP; 848 } 849 if (vsi != pf->vsi[pf->lan_vsi]) 850 return -EOPNOTSUPP; 851 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 852 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 853 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 854 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 855 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 856 return -EOPNOTSUPP; 857 if (hw->device_id == I40E_DEV_ID_KX_B || 858 hw->device_id == I40E_DEV_ID_KX_C || 859 hw->device_id == I40E_DEV_ID_20G_KR2 || 860 hw->device_id == I40E_DEV_ID_20G_KR2_A) { 861 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 862 return -EOPNOTSUPP; 863 } 864 865 /* copy the ksettings to copy_ks to avoid modifying the origin */ 866 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 867 868 /* save autoneg out of ksettings */ 869 autoneg = copy_ks.base.autoneg; 870 871 memset(&safe_ks, 0, sizeof(safe_ks)); 872 /* Get link modes supported by hardware and check against modes 873 * requested by the user. Return an error if unsupported mode was set. 874 */ 875 i40e_phy_type_to_ethtool(pf, &safe_ks); 876 if (!bitmap_subset(copy_ks.link_modes.advertising, 877 safe_ks.link_modes.supported, 878 __ETHTOOL_LINK_MODE_MASK_NBITS)) 879 return -EINVAL; 880 881 /* get our own copy of the bits to check against */ 882 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 883 safe_ks.base.cmd = copy_ks.base.cmd; 884 safe_ks.base.link_mode_masks_nwords = 885 copy_ks.base.link_mode_masks_nwords; 886 i40e_get_link_ksettings(netdev, &safe_ks); 887 888 /* set autoneg back to what it currently is */ 889 copy_ks.base.autoneg = safe_ks.base.autoneg; 890 891 /* If copy_ks.base and safe_ks.base are not the same now, then they are 892 * trying to set something that we do not support. 893 */ 894 if (memcmp(©_ks.base, &safe_ks.base, 895 sizeof(struct ethtool_link_settings))) 896 return -EOPNOTSUPP; 897 898 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 899 timeout--; 900 if (!timeout) 901 return -EBUSY; 902 usleep_range(1000, 2000); 903 } 904 905 /* Get the current phy config */ 906 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 907 NULL); 908 if (status) { 909 err = -EAGAIN; 910 goto done; 911 } 912 913 /* Copy abilities to config in case autoneg is not 914 * set below 915 */ 916 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 917 config.abilities = abilities.abilities; 918 919 /* Check autoneg */ 920 if (autoneg == AUTONEG_ENABLE) { 921 /* If autoneg was not already enabled */ 922 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 923 /* If autoneg is not supported, return error */ 924 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 925 supported, 926 Autoneg)) { 927 netdev_info(netdev, "Autoneg not supported on this phy\n"); 928 err = -EINVAL; 929 goto done; 930 } 931 /* Autoneg is allowed to change */ 932 config.abilities = abilities.abilities | 933 I40E_AQ_PHY_ENABLE_AN; 934 autoneg_changed = true; 935 } 936 } else { 937 /* If autoneg is currently enabled */ 938 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 939 /* If autoneg is supported 10GBASE_T is the only PHY 940 * that can disable it, so otherwise return error 941 */ 942 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 943 supported, 944 Autoneg) && 945 hw->phy.link_info.phy_type != 946 I40E_PHY_TYPE_10GBASE_T) { 947 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 948 err = -EINVAL; 949 goto done; 950 } 951 /* Autoneg is allowed to change */ 952 config.abilities = abilities.abilities & 953 ~I40E_AQ_PHY_ENABLE_AN; 954 autoneg_changed = true; 955 } 956 } 957 958 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 959 100baseT_Full)) 960 config.link_speed |= I40E_LINK_SPEED_100MB; 961 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 962 1000baseT_Full) || 963 ethtool_link_ksettings_test_link_mode(ks, advertising, 964 1000baseX_Full) || 965 ethtool_link_ksettings_test_link_mode(ks, advertising, 966 1000baseKX_Full)) 967 config.link_speed |= I40E_LINK_SPEED_1GB; 968 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 969 10000baseT_Full) || 970 ethtool_link_ksettings_test_link_mode(ks, advertising, 971 10000baseKX4_Full) || 972 ethtool_link_ksettings_test_link_mode(ks, advertising, 973 10000baseKR_Full) || 974 ethtool_link_ksettings_test_link_mode(ks, advertising, 975 10000baseCR_Full) || 976 ethtool_link_ksettings_test_link_mode(ks, advertising, 977 10000baseSR_Full)) 978 config.link_speed |= I40E_LINK_SPEED_10GB; 979 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 980 20000baseKR2_Full)) 981 config.link_speed |= I40E_LINK_SPEED_20GB; 982 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 983 25000baseCR_Full) || 984 ethtool_link_ksettings_test_link_mode(ks, advertising, 985 25000baseKR_Full) || 986 ethtool_link_ksettings_test_link_mode(ks, advertising, 987 25000baseSR_Full)) 988 config.link_speed |= I40E_LINK_SPEED_25GB; 989 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 990 40000baseKR4_Full) || 991 ethtool_link_ksettings_test_link_mode(ks, advertising, 992 40000baseCR4_Full) || 993 ethtool_link_ksettings_test_link_mode(ks, advertising, 994 40000baseSR4_Full) || 995 ethtool_link_ksettings_test_link_mode(ks, advertising, 996 40000baseLR4_Full)) 997 config.link_speed |= I40E_LINK_SPEED_40GB; 998 999 /* If speed didn't get set, set it to what it currently is. 1000 * This is needed because if advertise is 0 (as it is when autoneg 1001 * is disabled) then speed won't get set. 1002 */ 1003 if (!config.link_speed) 1004 config.link_speed = abilities.link_speed; 1005 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1006 /* copy over the rest of the abilities */ 1007 config.phy_type = abilities.phy_type; 1008 config.phy_type_ext = abilities.phy_type_ext; 1009 config.eee_capability = abilities.eee_capability; 1010 config.eeer = abilities.eeer_val; 1011 config.low_power_ctrl = abilities.d3_lpan; 1012 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1013 I40E_AQ_PHY_FEC_CONFIG_MASK; 1014 1015 /* save the requested speeds */ 1016 hw->phy.link_info.requested_speeds = config.link_speed; 1017 /* set link and auto negotiation so changes take effect */ 1018 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1019 /* If link is up put link down */ 1020 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1021 /* Tell the OS link is going down, the link will go 1022 * back up when fw says it is ready asynchronously 1023 */ 1024 i40e_print_link_message(vsi, false); 1025 netif_carrier_off(netdev); 1026 netif_tx_stop_all_queues(netdev); 1027 } 1028 1029 /* make the aq call */ 1030 status = i40e_aq_set_phy_config(hw, &config, NULL); 1031 if (status) { 1032 netdev_info(netdev, 1033 "Set phy config failed, err %s aq_err %s\n", 1034 i40e_stat_str(hw, status), 1035 i40e_aq_str(hw, hw->aq.asq_last_status)); 1036 err = -EAGAIN; 1037 goto done; 1038 } 1039 1040 status = i40e_update_link_info(hw); 1041 if (status) 1042 netdev_dbg(netdev, 1043 "Updating link info failed with err %s aq_err %s\n", 1044 i40e_stat_str(hw, status), 1045 i40e_aq_str(hw, hw->aq.asq_last_status)); 1046 1047 } else { 1048 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1049 } 1050 1051 done: 1052 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1053 1054 return err; 1055 } 1056 1057 static int i40e_nway_reset(struct net_device *netdev) 1058 { 1059 /* restart autonegotiation */ 1060 struct i40e_netdev_priv *np = netdev_priv(netdev); 1061 struct i40e_pf *pf = np->vsi->back; 1062 struct i40e_hw *hw = &pf->hw; 1063 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1064 i40e_status ret = 0; 1065 1066 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1067 if (ret) { 1068 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1069 i40e_stat_str(hw, ret), 1070 i40e_aq_str(hw, hw->aq.asq_last_status)); 1071 return -EIO; 1072 } 1073 1074 return 0; 1075 } 1076 1077 /** 1078 * i40e_get_pauseparam - Get Flow Control status 1079 * Return tx/rx-pause status 1080 **/ 1081 static void i40e_get_pauseparam(struct net_device *netdev, 1082 struct ethtool_pauseparam *pause) 1083 { 1084 struct i40e_netdev_priv *np = netdev_priv(netdev); 1085 struct i40e_pf *pf = np->vsi->back; 1086 struct i40e_hw *hw = &pf->hw; 1087 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1088 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1089 1090 pause->autoneg = 1091 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1092 AUTONEG_ENABLE : AUTONEG_DISABLE); 1093 1094 /* PFC enabled so report LFC as off */ 1095 if (dcbx_cfg->pfc.pfcenable) { 1096 pause->rx_pause = 0; 1097 pause->tx_pause = 0; 1098 return; 1099 } 1100 1101 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1102 pause->rx_pause = 1; 1103 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1104 pause->tx_pause = 1; 1105 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1106 pause->rx_pause = 1; 1107 pause->tx_pause = 1; 1108 } 1109 } 1110 1111 /** 1112 * i40e_set_pauseparam - Set Flow Control parameter 1113 * @netdev: network interface device structure 1114 * @pause: return tx/rx flow control status 1115 **/ 1116 static int i40e_set_pauseparam(struct net_device *netdev, 1117 struct ethtool_pauseparam *pause) 1118 { 1119 struct i40e_netdev_priv *np = netdev_priv(netdev); 1120 struct i40e_pf *pf = np->vsi->back; 1121 struct i40e_vsi *vsi = np->vsi; 1122 struct i40e_hw *hw = &pf->hw; 1123 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1124 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1125 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1126 i40e_status status; 1127 u8 aq_failures; 1128 int err = 0; 1129 1130 /* Changing the port's flow control is not supported if this isn't the 1131 * port's controlling PF 1132 */ 1133 if (hw->partition_id != 1) { 1134 i40e_partition_setting_complaint(pf); 1135 return -EOPNOTSUPP; 1136 } 1137 1138 if (vsi != pf->vsi[pf->lan_vsi]) 1139 return -EOPNOTSUPP; 1140 1141 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1142 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 1143 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1144 return -EOPNOTSUPP; 1145 } 1146 1147 /* If we have link and don't have autoneg */ 1148 if (!test_bit(__I40E_DOWN, pf->state) && 1149 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 1150 /* Send message that it might not necessarily work*/ 1151 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1152 } 1153 1154 if (dcbx_cfg->pfc.pfcenable) { 1155 netdev_info(netdev, 1156 "Priority flow control enabled. Cannot set link flow control.\n"); 1157 return -EOPNOTSUPP; 1158 } 1159 1160 if (pause->rx_pause && pause->tx_pause) 1161 hw->fc.requested_mode = I40E_FC_FULL; 1162 else if (pause->rx_pause && !pause->tx_pause) 1163 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1164 else if (!pause->rx_pause && pause->tx_pause) 1165 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1166 else if (!pause->rx_pause && !pause->tx_pause) 1167 hw->fc.requested_mode = I40E_FC_NONE; 1168 else 1169 return -EINVAL; 1170 1171 /* Tell the OS link is going down, the link will go back up when fw 1172 * says it is ready asynchronously 1173 */ 1174 i40e_print_link_message(vsi, false); 1175 netif_carrier_off(netdev); 1176 netif_tx_stop_all_queues(netdev); 1177 1178 /* Set the fc mode and only restart an if link is up*/ 1179 status = i40e_set_fc(hw, &aq_failures, link_up); 1180 1181 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1182 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1183 i40e_stat_str(hw, status), 1184 i40e_aq_str(hw, hw->aq.asq_last_status)); 1185 err = -EAGAIN; 1186 } 1187 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1188 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1189 i40e_stat_str(hw, status), 1190 i40e_aq_str(hw, hw->aq.asq_last_status)); 1191 err = -EAGAIN; 1192 } 1193 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1194 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1195 i40e_stat_str(hw, status), 1196 i40e_aq_str(hw, hw->aq.asq_last_status)); 1197 err = -EAGAIN; 1198 } 1199 1200 if (!test_bit(__I40E_DOWN, pf->state)) { 1201 /* Give it a little more time to try to come back */ 1202 msleep(75); 1203 if (!test_bit(__I40E_DOWN, pf->state)) 1204 return i40e_nway_reset(netdev); 1205 } 1206 1207 return err; 1208 } 1209 1210 static u32 i40e_get_msglevel(struct net_device *netdev) 1211 { 1212 struct i40e_netdev_priv *np = netdev_priv(netdev); 1213 struct i40e_pf *pf = np->vsi->back; 1214 u32 debug_mask = pf->hw.debug_mask; 1215 1216 if (debug_mask) 1217 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1218 1219 return pf->msg_enable; 1220 } 1221 1222 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1223 { 1224 struct i40e_netdev_priv *np = netdev_priv(netdev); 1225 struct i40e_pf *pf = np->vsi->back; 1226 1227 if (I40E_DEBUG_USER & data) 1228 pf->hw.debug_mask = data; 1229 else 1230 pf->msg_enable = data; 1231 } 1232 1233 static int i40e_get_regs_len(struct net_device *netdev) 1234 { 1235 int reg_count = 0; 1236 int i; 1237 1238 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1239 reg_count += i40e_reg_list[i].elements; 1240 1241 return reg_count * sizeof(u32); 1242 } 1243 1244 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1245 void *p) 1246 { 1247 struct i40e_netdev_priv *np = netdev_priv(netdev); 1248 struct i40e_pf *pf = np->vsi->back; 1249 struct i40e_hw *hw = &pf->hw; 1250 u32 *reg_buf = p; 1251 unsigned int i, j, ri; 1252 u32 reg; 1253 1254 /* Tell ethtool which driver-version-specific regs output we have. 1255 * 1256 * At some point, if we have ethtool doing special formatting of 1257 * this data, it will rely on this version number to know how to 1258 * interpret things. Hence, this needs to be updated if/when the 1259 * diags register table is changed. 1260 */ 1261 regs->version = 1; 1262 1263 /* loop through the diags reg table for what to print */ 1264 ri = 0; 1265 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1266 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1267 reg = i40e_reg_list[i].offset 1268 + (j * i40e_reg_list[i].stride); 1269 reg_buf[ri++] = rd32(hw, reg); 1270 } 1271 } 1272 1273 } 1274 1275 static int i40e_get_eeprom(struct net_device *netdev, 1276 struct ethtool_eeprom *eeprom, u8 *bytes) 1277 { 1278 struct i40e_netdev_priv *np = netdev_priv(netdev); 1279 struct i40e_hw *hw = &np->vsi->back->hw; 1280 struct i40e_pf *pf = np->vsi->back; 1281 int ret_val = 0, len, offset; 1282 u8 *eeprom_buff; 1283 u16 i, sectors; 1284 bool last; 1285 u32 magic; 1286 1287 #define I40E_NVM_SECTOR_SIZE 4096 1288 if (eeprom->len == 0) 1289 return -EINVAL; 1290 1291 /* check for NVMUpdate access method */ 1292 magic = hw->vendor_id | (hw->device_id << 16); 1293 if (eeprom->magic && eeprom->magic != magic) { 1294 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1295 int errno = 0; 1296 1297 /* make sure it is the right magic for NVMUpdate */ 1298 if ((eeprom->magic >> 16) != hw->device_id) 1299 errno = -EINVAL; 1300 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1301 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1302 errno = -EBUSY; 1303 else 1304 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1305 1306 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1307 dev_info(&pf->pdev->dev, 1308 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1309 ret_val, hw->aq.asq_last_status, errno, 1310 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1311 cmd->offset, cmd->data_size); 1312 1313 return errno; 1314 } 1315 1316 /* normal ethtool get_eeprom support */ 1317 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1318 1319 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1320 if (!eeprom_buff) 1321 return -ENOMEM; 1322 1323 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1324 if (ret_val) { 1325 dev_info(&pf->pdev->dev, 1326 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1327 ret_val, hw->aq.asq_last_status); 1328 goto free_buff; 1329 } 1330 1331 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1332 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1333 len = I40E_NVM_SECTOR_SIZE; 1334 last = false; 1335 for (i = 0; i < sectors; i++) { 1336 if (i == (sectors - 1)) { 1337 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1338 last = true; 1339 } 1340 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1341 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1342 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1343 last, NULL); 1344 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1345 dev_info(&pf->pdev->dev, 1346 "read NVM failed, invalid offset 0x%x\n", 1347 offset); 1348 break; 1349 } else if (ret_val && 1350 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1351 dev_info(&pf->pdev->dev, 1352 "read NVM failed, access, offset 0x%x\n", 1353 offset); 1354 break; 1355 } else if (ret_val) { 1356 dev_info(&pf->pdev->dev, 1357 "read NVM failed offset %d err=%d status=0x%x\n", 1358 offset, ret_val, hw->aq.asq_last_status); 1359 break; 1360 } 1361 } 1362 1363 i40e_release_nvm(hw); 1364 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1365 free_buff: 1366 kfree(eeprom_buff); 1367 return ret_val; 1368 } 1369 1370 static int i40e_get_eeprom_len(struct net_device *netdev) 1371 { 1372 struct i40e_netdev_priv *np = netdev_priv(netdev); 1373 struct i40e_hw *hw = &np->vsi->back->hw; 1374 u32 val; 1375 1376 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1377 if (hw->mac.type == I40E_MAC_X722) { 1378 val = X722_EEPROM_SCOPE_LIMIT + 1; 1379 return val; 1380 } 1381 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1382 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1383 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1384 /* register returns value in power of 2, 64Kbyte chunks. */ 1385 val = (64 * 1024) * BIT(val); 1386 return val; 1387 } 1388 1389 static int i40e_set_eeprom(struct net_device *netdev, 1390 struct ethtool_eeprom *eeprom, u8 *bytes) 1391 { 1392 struct i40e_netdev_priv *np = netdev_priv(netdev); 1393 struct i40e_hw *hw = &np->vsi->back->hw; 1394 struct i40e_pf *pf = np->vsi->back; 1395 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1396 int ret_val = 0; 1397 int errno = 0; 1398 u32 magic; 1399 1400 /* normal ethtool set_eeprom is not supported */ 1401 magic = hw->vendor_id | (hw->device_id << 16); 1402 if (eeprom->magic == magic) 1403 errno = -EOPNOTSUPP; 1404 /* check for NVMUpdate access method */ 1405 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1406 errno = -EINVAL; 1407 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1408 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1409 errno = -EBUSY; 1410 else 1411 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1412 1413 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1414 dev_info(&pf->pdev->dev, 1415 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1416 ret_val, hw->aq.asq_last_status, errno, 1417 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1418 cmd->offset, cmd->data_size); 1419 1420 return errno; 1421 } 1422 1423 static void i40e_get_drvinfo(struct net_device *netdev, 1424 struct ethtool_drvinfo *drvinfo) 1425 { 1426 struct i40e_netdev_priv *np = netdev_priv(netdev); 1427 struct i40e_vsi *vsi = np->vsi; 1428 struct i40e_pf *pf = vsi->back; 1429 1430 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1431 strlcpy(drvinfo->version, i40e_driver_version_str, 1432 sizeof(drvinfo->version)); 1433 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1434 sizeof(drvinfo->fw_version)); 1435 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1436 sizeof(drvinfo->bus_info)); 1437 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1438 if (pf->hw.pf_id == 0) 1439 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1440 } 1441 1442 static void i40e_get_ringparam(struct net_device *netdev, 1443 struct ethtool_ringparam *ring) 1444 { 1445 struct i40e_netdev_priv *np = netdev_priv(netdev); 1446 struct i40e_pf *pf = np->vsi->back; 1447 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1448 1449 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1450 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1451 ring->rx_mini_max_pending = 0; 1452 ring->rx_jumbo_max_pending = 0; 1453 ring->rx_pending = vsi->rx_rings[0]->count; 1454 ring->tx_pending = vsi->tx_rings[0]->count; 1455 ring->rx_mini_pending = 0; 1456 ring->rx_jumbo_pending = 0; 1457 } 1458 1459 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1460 { 1461 if (i40e_enabled_xdp_vsi(vsi)) { 1462 return index < vsi->num_queue_pairs || 1463 (index >= vsi->alloc_queue_pairs && 1464 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1465 } 1466 1467 return index < vsi->num_queue_pairs; 1468 } 1469 1470 static int i40e_set_ringparam(struct net_device *netdev, 1471 struct ethtool_ringparam *ring) 1472 { 1473 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1474 struct i40e_netdev_priv *np = netdev_priv(netdev); 1475 struct i40e_hw *hw = &np->vsi->back->hw; 1476 struct i40e_vsi *vsi = np->vsi; 1477 struct i40e_pf *pf = vsi->back; 1478 u32 new_rx_count, new_tx_count; 1479 u16 tx_alloc_queue_pairs; 1480 int timeout = 50; 1481 int i, err = 0; 1482 1483 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1484 return -EINVAL; 1485 1486 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1487 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1488 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1489 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1490 netdev_info(netdev, 1491 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1492 ring->tx_pending, ring->rx_pending, 1493 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1494 return -EINVAL; 1495 } 1496 1497 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1498 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1499 1500 /* if nothing to do return success */ 1501 if ((new_tx_count == vsi->tx_rings[0]->count) && 1502 (new_rx_count == vsi->rx_rings[0]->count)) 1503 return 0; 1504 1505 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1506 timeout--; 1507 if (!timeout) 1508 return -EBUSY; 1509 usleep_range(1000, 2000); 1510 } 1511 1512 if (!netif_running(vsi->netdev)) { 1513 /* simple case - set for the next time the netdev is started */ 1514 for (i = 0; i < vsi->num_queue_pairs; i++) { 1515 vsi->tx_rings[i]->count = new_tx_count; 1516 vsi->rx_rings[i]->count = new_rx_count; 1517 if (i40e_enabled_xdp_vsi(vsi)) 1518 vsi->xdp_rings[i]->count = new_tx_count; 1519 } 1520 goto done; 1521 } 1522 1523 /* We can't just free everything and then setup again, 1524 * because the ISRs in MSI-X mode get passed pointers 1525 * to the Tx and Rx ring structs. 1526 */ 1527 1528 /* alloc updated Tx and XDP Tx resources */ 1529 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1530 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1531 if (new_tx_count != vsi->tx_rings[0]->count) { 1532 netdev_info(netdev, 1533 "Changing Tx descriptor count from %d to %d.\n", 1534 vsi->tx_rings[0]->count, new_tx_count); 1535 tx_rings = kcalloc(tx_alloc_queue_pairs, 1536 sizeof(struct i40e_ring), GFP_KERNEL); 1537 if (!tx_rings) { 1538 err = -ENOMEM; 1539 goto done; 1540 } 1541 1542 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1543 if (!i40e_active_tx_ring_index(vsi, i)) 1544 continue; 1545 1546 tx_rings[i] = *vsi->tx_rings[i]; 1547 tx_rings[i].count = new_tx_count; 1548 /* the desc and bi pointers will be reallocated in the 1549 * setup call 1550 */ 1551 tx_rings[i].desc = NULL; 1552 tx_rings[i].rx_bi = NULL; 1553 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1554 if (err) { 1555 while (i) { 1556 i--; 1557 if (!i40e_active_tx_ring_index(vsi, i)) 1558 continue; 1559 i40e_free_tx_resources(&tx_rings[i]); 1560 } 1561 kfree(tx_rings); 1562 tx_rings = NULL; 1563 1564 goto done; 1565 } 1566 } 1567 } 1568 1569 /* alloc updated Rx resources */ 1570 if (new_rx_count != vsi->rx_rings[0]->count) { 1571 netdev_info(netdev, 1572 "Changing Rx descriptor count from %d to %d\n", 1573 vsi->rx_rings[0]->count, new_rx_count); 1574 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1575 sizeof(struct i40e_ring), GFP_KERNEL); 1576 if (!rx_rings) { 1577 err = -ENOMEM; 1578 goto free_tx; 1579 } 1580 1581 for (i = 0; i < vsi->num_queue_pairs; i++) { 1582 struct i40e_ring *ring; 1583 u16 unused; 1584 1585 /* clone ring and setup updated count */ 1586 rx_rings[i] = *vsi->rx_rings[i]; 1587 rx_rings[i].count = new_rx_count; 1588 /* the desc and bi pointers will be reallocated in the 1589 * setup call 1590 */ 1591 rx_rings[i].desc = NULL; 1592 rx_rings[i].rx_bi = NULL; 1593 /* Clear cloned XDP RX-queue info before setup call */ 1594 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 1595 /* this is to allow wr32 to have something to write to 1596 * during early allocation of Rx buffers 1597 */ 1598 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1599 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1600 if (err) 1601 goto rx_unwind; 1602 1603 /* now allocate the Rx buffers to make sure the OS 1604 * has enough memory, any failure here means abort 1605 */ 1606 ring = &rx_rings[i]; 1607 unused = I40E_DESC_UNUSED(ring); 1608 err = i40e_alloc_rx_buffers(ring, unused); 1609 rx_unwind: 1610 if (err) { 1611 do { 1612 i40e_free_rx_resources(&rx_rings[i]); 1613 } while (i--); 1614 kfree(rx_rings); 1615 rx_rings = NULL; 1616 1617 goto free_tx; 1618 } 1619 } 1620 } 1621 1622 /* Bring interface down, copy in the new ring info, 1623 * then restore the interface 1624 */ 1625 i40e_down(vsi); 1626 1627 if (tx_rings) { 1628 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1629 if (i40e_active_tx_ring_index(vsi, i)) { 1630 i40e_free_tx_resources(vsi->tx_rings[i]); 1631 *vsi->tx_rings[i] = tx_rings[i]; 1632 } 1633 } 1634 kfree(tx_rings); 1635 tx_rings = NULL; 1636 } 1637 1638 if (rx_rings) { 1639 for (i = 0; i < vsi->num_queue_pairs; i++) { 1640 i40e_free_rx_resources(vsi->rx_rings[i]); 1641 /* get the real tail offset */ 1642 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1643 /* this is to fake out the allocation routine 1644 * into thinking it has to realloc everything 1645 * but the recycling logic will let us re-use 1646 * the buffers allocated above 1647 */ 1648 rx_rings[i].next_to_use = 0; 1649 rx_rings[i].next_to_clean = 0; 1650 rx_rings[i].next_to_alloc = 0; 1651 /* do a struct copy */ 1652 *vsi->rx_rings[i] = rx_rings[i]; 1653 } 1654 kfree(rx_rings); 1655 rx_rings = NULL; 1656 } 1657 1658 i40e_up(vsi); 1659 1660 free_tx: 1661 /* error cleanup if the Rx allocations failed after getting Tx */ 1662 if (tx_rings) { 1663 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1664 if (i40e_active_tx_ring_index(vsi, i)) 1665 i40e_free_tx_resources(vsi->tx_rings[i]); 1666 } 1667 kfree(tx_rings); 1668 tx_rings = NULL; 1669 } 1670 1671 done: 1672 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1673 1674 return err; 1675 } 1676 1677 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1678 { 1679 struct i40e_netdev_priv *np = netdev_priv(netdev); 1680 struct i40e_vsi *vsi = np->vsi; 1681 struct i40e_pf *pf = vsi->back; 1682 1683 switch (sset) { 1684 case ETH_SS_TEST: 1685 return I40E_TEST_LEN; 1686 case ETH_SS_STATS: 1687 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1688 int len = I40E_PF_STATS_LEN(netdev); 1689 1690 if ((pf->lan_veb != I40E_NO_VEB) && 1691 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) 1692 len += I40E_VEB_STATS_TOTAL; 1693 return len; 1694 } else { 1695 return I40E_VSI_STATS_LEN(netdev); 1696 } 1697 case ETH_SS_PRIV_FLAGS: 1698 return I40E_PRIV_FLAGS_STR_LEN + 1699 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1700 default: 1701 return -EOPNOTSUPP; 1702 } 1703 } 1704 1705 static void i40e_get_ethtool_stats(struct net_device *netdev, 1706 struct ethtool_stats *stats, u64 *data) 1707 { 1708 struct i40e_netdev_priv *np = netdev_priv(netdev); 1709 struct i40e_ring *tx_ring, *rx_ring; 1710 struct i40e_vsi *vsi = np->vsi; 1711 struct i40e_pf *pf = vsi->back; 1712 unsigned int j; 1713 int i = 0; 1714 char *p; 1715 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1716 unsigned int start; 1717 1718 i40e_update_stats(vsi); 1719 1720 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1721 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1722 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1723 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1724 } 1725 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1726 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1727 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1728 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1729 } 1730 rcu_read_lock(); 1731 for (j = 0; j < vsi->num_queue_pairs; j++) { 1732 tx_ring = READ_ONCE(vsi->tx_rings[j]); 1733 1734 if (!tx_ring) 1735 continue; 1736 1737 /* process Tx ring statistics */ 1738 do { 1739 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1740 data[i] = tx_ring->stats.packets; 1741 data[i + 1] = tx_ring->stats.bytes; 1742 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1743 i += 2; 1744 1745 /* Rx ring is the 2nd half of the queue pair */ 1746 rx_ring = &tx_ring[1]; 1747 do { 1748 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1749 data[i] = rx_ring->stats.packets; 1750 data[i + 1] = rx_ring->stats.bytes; 1751 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1752 i += 2; 1753 } 1754 rcu_read_unlock(); 1755 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1756 return; 1757 1758 if ((pf->lan_veb != I40E_NO_VEB) && 1759 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1760 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1761 1762 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1763 p = (char *)veb; 1764 p += i40e_gstrings_veb_stats[j].stat_offset; 1765 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1766 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1767 } 1768 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1769 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1770 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1771 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1772 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1773 } 1774 } 1775 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1776 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1777 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1778 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1779 } 1780 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1781 data[i++] = pf->stats.priority_xon_tx[j]; 1782 data[i++] = pf->stats.priority_xoff_tx[j]; 1783 } 1784 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1785 data[i++] = pf->stats.priority_xon_rx[j]; 1786 data[i++] = pf->stats.priority_xoff_rx[j]; 1787 } 1788 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1789 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1790 } 1791 1792 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1793 u8 *data) 1794 { 1795 struct i40e_netdev_priv *np = netdev_priv(netdev); 1796 struct i40e_vsi *vsi = np->vsi; 1797 struct i40e_pf *pf = vsi->back; 1798 char *p = (char *)data; 1799 unsigned int i; 1800 1801 switch (stringset) { 1802 case ETH_SS_TEST: 1803 memcpy(data, i40e_gstrings_test, 1804 I40E_TEST_LEN * ETH_GSTRING_LEN); 1805 break; 1806 case ETH_SS_STATS: 1807 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1808 snprintf(p, ETH_GSTRING_LEN, "%s", 1809 i40e_gstrings_net_stats[i].stat_string); 1810 p += ETH_GSTRING_LEN; 1811 } 1812 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1813 snprintf(p, ETH_GSTRING_LEN, "%s", 1814 i40e_gstrings_misc_stats[i].stat_string); 1815 p += ETH_GSTRING_LEN; 1816 } 1817 for (i = 0; i < vsi->num_queue_pairs; i++) { 1818 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1819 p += ETH_GSTRING_LEN; 1820 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1821 p += ETH_GSTRING_LEN; 1822 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1823 p += ETH_GSTRING_LEN; 1824 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1825 p += ETH_GSTRING_LEN; 1826 } 1827 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1828 return; 1829 1830 if ((pf->lan_veb != I40E_NO_VEB) && 1831 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1832 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1833 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1834 i40e_gstrings_veb_stats[i].stat_string); 1835 p += ETH_GSTRING_LEN; 1836 } 1837 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1838 snprintf(p, ETH_GSTRING_LEN, 1839 "veb.tc_%d_tx_packets", i); 1840 p += ETH_GSTRING_LEN; 1841 snprintf(p, ETH_GSTRING_LEN, 1842 "veb.tc_%d_tx_bytes", i); 1843 p += ETH_GSTRING_LEN; 1844 snprintf(p, ETH_GSTRING_LEN, 1845 "veb.tc_%d_rx_packets", i); 1846 p += ETH_GSTRING_LEN; 1847 snprintf(p, ETH_GSTRING_LEN, 1848 "veb.tc_%d_rx_bytes", i); 1849 p += ETH_GSTRING_LEN; 1850 } 1851 } 1852 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1853 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1854 i40e_gstrings_stats[i].stat_string); 1855 p += ETH_GSTRING_LEN; 1856 } 1857 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1858 snprintf(p, ETH_GSTRING_LEN, 1859 "port.tx_priority_%d_xon", i); 1860 p += ETH_GSTRING_LEN; 1861 snprintf(p, ETH_GSTRING_LEN, 1862 "port.tx_priority_%d_xoff", i); 1863 p += ETH_GSTRING_LEN; 1864 } 1865 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1866 snprintf(p, ETH_GSTRING_LEN, 1867 "port.rx_priority_%d_xon", i); 1868 p += ETH_GSTRING_LEN; 1869 snprintf(p, ETH_GSTRING_LEN, 1870 "port.rx_priority_%d_xoff", i); 1871 p += ETH_GSTRING_LEN; 1872 } 1873 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1874 snprintf(p, ETH_GSTRING_LEN, 1875 "port.rx_priority_%d_xon_2_xoff", i); 1876 p += ETH_GSTRING_LEN; 1877 } 1878 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1879 break; 1880 case ETH_SS_PRIV_FLAGS: 1881 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1882 snprintf(p, ETH_GSTRING_LEN, "%s", 1883 i40e_gstrings_priv_flags[i].flag_string); 1884 p += ETH_GSTRING_LEN; 1885 } 1886 if (pf->hw.pf_id != 0) 1887 break; 1888 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1889 snprintf(p, ETH_GSTRING_LEN, "%s", 1890 i40e_gl_gstrings_priv_flags[i].flag_string); 1891 p += ETH_GSTRING_LEN; 1892 } 1893 break; 1894 default: 1895 break; 1896 } 1897 } 1898 1899 static int i40e_get_ts_info(struct net_device *dev, 1900 struct ethtool_ts_info *info) 1901 { 1902 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1903 1904 /* only report HW timestamping if PTP is enabled */ 1905 if (!(pf->flags & I40E_FLAG_PTP)) 1906 return ethtool_op_get_ts_info(dev, info); 1907 1908 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1909 SOF_TIMESTAMPING_RX_SOFTWARE | 1910 SOF_TIMESTAMPING_SOFTWARE | 1911 SOF_TIMESTAMPING_TX_HARDWARE | 1912 SOF_TIMESTAMPING_RX_HARDWARE | 1913 SOF_TIMESTAMPING_RAW_HARDWARE; 1914 1915 if (pf->ptp_clock) 1916 info->phc_index = ptp_clock_index(pf->ptp_clock); 1917 else 1918 info->phc_index = -1; 1919 1920 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1921 1922 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1923 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1924 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1925 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1926 1927 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 1928 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1929 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1930 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1931 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1932 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1933 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1934 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1935 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1936 1937 return 0; 1938 } 1939 1940 static int i40e_link_test(struct net_device *netdev, u64 *data) 1941 { 1942 struct i40e_netdev_priv *np = netdev_priv(netdev); 1943 struct i40e_pf *pf = np->vsi->back; 1944 i40e_status status; 1945 bool link_up = false; 1946 1947 netif_info(pf, hw, netdev, "link test\n"); 1948 status = i40e_get_link_status(&pf->hw, &link_up); 1949 if (status) { 1950 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1951 *data = 1; 1952 return *data; 1953 } 1954 1955 if (link_up) 1956 *data = 0; 1957 else 1958 *data = 1; 1959 1960 return *data; 1961 } 1962 1963 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1964 { 1965 struct i40e_netdev_priv *np = netdev_priv(netdev); 1966 struct i40e_pf *pf = np->vsi->back; 1967 1968 netif_info(pf, hw, netdev, "register test\n"); 1969 *data = i40e_diag_reg_test(&pf->hw); 1970 1971 return *data; 1972 } 1973 1974 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1975 { 1976 struct i40e_netdev_priv *np = netdev_priv(netdev); 1977 struct i40e_pf *pf = np->vsi->back; 1978 1979 netif_info(pf, hw, netdev, "eeprom test\n"); 1980 *data = i40e_diag_eeprom_test(&pf->hw); 1981 1982 /* forcebly clear the NVM Update state machine */ 1983 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1984 1985 return *data; 1986 } 1987 1988 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1989 { 1990 struct i40e_netdev_priv *np = netdev_priv(netdev); 1991 struct i40e_pf *pf = np->vsi->back; 1992 u16 swc_old = pf->sw_int_count; 1993 1994 netif_info(pf, hw, netdev, "interrupt test\n"); 1995 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1996 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1997 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1998 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1999 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2000 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2001 usleep_range(1000, 2000); 2002 *data = (swc_old == pf->sw_int_count); 2003 2004 return *data; 2005 } 2006 2007 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2008 { 2009 struct i40e_vf *vfs = pf->vf; 2010 int i; 2011 2012 for (i = 0; i < pf->num_alloc_vfs; i++) 2013 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2014 return true; 2015 return false; 2016 } 2017 2018 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2019 { 2020 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2021 } 2022 2023 static void i40e_diag_test(struct net_device *netdev, 2024 struct ethtool_test *eth_test, u64 *data) 2025 { 2026 struct i40e_netdev_priv *np = netdev_priv(netdev); 2027 bool if_running = netif_running(netdev); 2028 struct i40e_pf *pf = np->vsi->back; 2029 2030 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2031 /* Offline tests */ 2032 netif_info(pf, drv, netdev, "offline testing starting\n"); 2033 2034 set_bit(__I40E_TESTING, pf->state); 2035 2036 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2037 dev_warn(&pf->pdev->dev, 2038 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2039 data[I40E_ETH_TEST_REG] = 1; 2040 data[I40E_ETH_TEST_EEPROM] = 1; 2041 data[I40E_ETH_TEST_INTR] = 1; 2042 data[I40E_ETH_TEST_LINK] = 1; 2043 eth_test->flags |= ETH_TEST_FL_FAILED; 2044 clear_bit(__I40E_TESTING, pf->state); 2045 goto skip_ol_tests; 2046 } 2047 2048 /* If the device is online then take it offline */ 2049 if (if_running) 2050 /* indicate we're in test mode */ 2051 i40e_close(netdev); 2052 else 2053 /* This reset does not affect link - if it is 2054 * changed to a type of reset that does affect 2055 * link then the following link test would have 2056 * to be moved to before the reset 2057 */ 2058 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2059 2060 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2061 eth_test->flags |= ETH_TEST_FL_FAILED; 2062 2063 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2064 eth_test->flags |= ETH_TEST_FL_FAILED; 2065 2066 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2067 eth_test->flags |= ETH_TEST_FL_FAILED; 2068 2069 /* run reg test last, a reset is required after it */ 2070 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2071 eth_test->flags |= ETH_TEST_FL_FAILED; 2072 2073 clear_bit(__I40E_TESTING, pf->state); 2074 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2075 2076 if (if_running) 2077 i40e_open(netdev); 2078 } else { 2079 /* Online tests */ 2080 netif_info(pf, drv, netdev, "online testing starting\n"); 2081 2082 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2083 eth_test->flags |= ETH_TEST_FL_FAILED; 2084 2085 /* Offline only tests, not run in online; pass by default */ 2086 data[I40E_ETH_TEST_REG] = 0; 2087 data[I40E_ETH_TEST_EEPROM] = 0; 2088 data[I40E_ETH_TEST_INTR] = 0; 2089 } 2090 2091 skip_ol_tests: 2092 2093 netif_info(pf, drv, netdev, "testing finished\n"); 2094 } 2095 2096 static void i40e_get_wol(struct net_device *netdev, 2097 struct ethtool_wolinfo *wol) 2098 { 2099 struct i40e_netdev_priv *np = netdev_priv(netdev); 2100 struct i40e_pf *pf = np->vsi->back; 2101 struct i40e_hw *hw = &pf->hw; 2102 u16 wol_nvm_bits; 2103 2104 /* NVM bit on means WoL disabled for the port */ 2105 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2106 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2107 wol->supported = 0; 2108 wol->wolopts = 0; 2109 } else { 2110 wol->supported = WAKE_MAGIC; 2111 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2112 } 2113 } 2114 2115 /** 2116 * i40e_set_wol - set the WakeOnLAN configuration 2117 * @netdev: the netdev in question 2118 * @wol: the ethtool WoL setting data 2119 **/ 2120 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2121 { 2122 struct i40e_netdev_priv *np = netdev_priv(netdev); 2123 struct i40e_pf *pf = np->vsi->back; 2124 struct i40e_vsi *vsi = np->vsi; 2125 struct i40e_hw *hw = &pf->hw; 2126 u16 wol_nvm_bits; 2127 2128 /* WoL not supported if this isn't the controlling PF on the port */ 2129 if (hw->partition_id != 1) { 2130 i40e_partition_setting_complaint(pf); 2131 return -EOPNOTSUPP; 2132 } 2133 2134 if (vsi != pf->vsi[pf->lan_vsi]) 2135 return -EOPNOTSUPP; 2136 2137 /* NVM bit on means WoL disabled for the port */ 2138 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2139 if (BIT(hw->port) & wol_nvm_bits) 2140 return -EOPNOTSUPP; 2141 2142 /* only magic packet is supported */ 2143 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 2144 return -EOPNOTSUPP; 2145 2146 /* is this a new value? */ 2147 if (pf->wol_en != !!wol->wolopts) { 2148 pf->wol_en = !!wol->wolopts; 2149 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2150 } 2151 2152 return 0; 2153 } 2154 2155 static int i40e_set_phys_id(struct net_device *netdev, 2156 enum ethtool_phys_id_state state) 2157 { 2158 struct i40e_netdev_priv *np = netdev_priv(netdev); 2159 i40e_status ret = 0; 2160 struct i40e_pf *pf = np->vsi->back; 2161 struct i40e_hw *hw = &pf->hw; 2162 int blink_freq = 2; 2163 u16 temp_status; 2164 2165 switch (state) { 2166 case ETHTOOL_ID_ACTIVE: 2167 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2168 pf->led_status = i40e_led_get(hw); 2169 } else { 2170 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2171 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2172 NULL); 2173 ret = i40e_led_get_phy(hw, &temp_status, 2174 &pf->phy_led_val); 2175 pf->led_status = temp_status; 2176 } 2177 return blink_freq; 2178 case ETHTOOL_ID_ON: 2179 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2180 i40e_led_set(hw, 0xf, false); 2181 else 2182 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2183 break; 2184 case ETHTOOL_ID_OFF: 2185 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2186 i40e_led_set(hw, 0x0, false); 2187 else 2188 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2189 break; 2190 case ETHTOOL_ID_INACTIVE: 2191 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2192 i40e_led_set(hw, pf->led_status, false); 2193 } else { 2194 ret = i40e_led_set_phy(hw, false, pf->led_status, 2195 (pf->phy_led_val | 2196 I40E_PHY_LED_MODE_ORIG)); 2197 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2198 i40e_aq_set_phy_debug(hw, 0, NULL); 2199 } 2200 break; 2201 default: 2202 break; 2203 } 2204 if (ret) 2205 return -ENOENT; 2206 else 2207 return 0; 2208 } 2209 2210 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2211 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2212 * 125us (8000 interrupts per second) == ITR(62) 2213 */ 2214 2215 /** 2216 * __i40e_get_coalesce - get per-queue coalesce settings 2217 * @netdev: the netdev to check 2218 * @ec: ethtool coalesce data structure 2219 * @queue: which queue to pick 2220 * 2221 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2222 * are per queue. If queue is <0 then we default to queue 0 as the 2223 * representative value. 2224 **/ 2225 static int __i40e_get_coalesce(struct net_device *netdev, 2226 struct ethtool_coalesce *ec, 2227 int queue) 2228 { 2229 struct i40e_netdev_priv *np = netdev_priv(netdev); 2230 struct i40e_ring *rx_ring, *tx_ring; 2231 struct i40e_vsi *vsi = np->vsi; 2232 2233 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2234 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2235 2236 /* rx and tx usecs has per queue value. If user doesn't specify the 2237 * queue, return queue 0's value to represent. 2238 */ 2239 if (queue < 0) 2240 queue = 0; 2241 else if (queue >= vsi->num_queue_pairs) 2242 return -EINVAL; 2243 2244 rx_ring = vsi->rx_rings[queue]; 2245 tx_ring = vsi->tx_rings[queue]; 2246 2247 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2248 ec->use_adaptive_rx_coalesce = 1; 2249 2250 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2251 ec->use_adaptive_tx_coalesce = 1; 2252 2253 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2254 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2255 2256 /* we use the _usecs_high to store/set the interrupt rate limit 2257 * that the hardware supports, that almost but not quite 2258 * fits the original intent of the ethtool variable, 2259 * the rx_coalesce_usecs_high limits total interrupts 2260 * per second from both tx/rx sources. 2261 */ 2262 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2263 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2264 2265 return 0; 2266 } 2267 2268 /** 2269 * i40e_get_coalesce - get a netdev's coalesce settings 2270 * @netdev: the netdev to check 2271 * @ec: ethtool coalesce data structure 2272 * 2273 * Gets the coalesce settings for a particular netdev. Note that if user has 2274 * modified per-queue settings, this only guarantees to represent queue 0. See 2275 * __i40e_get_coalesce for more details. 2276 **/ 2277 static int i40e_get_coalesce(struct net_device *netdev, 2278 struct ethtool_coalesce *ec) 2279 { 2280 return __i40e_get_coalesce(netdev, ec, -1); 2281 } 2282 2283 /** 2284 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2285 * @netdev: netdev structure 2286 * @ec: ethtool's coalesce settings 2287 * @queue: the particular queue to read 2288 * 2289 * Will read a specific queue's coalesce settings 2290 **/ 2291 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2292 struct ethtool_coalesce *ec) 2293 { 2294 return __i40e_get_coalesce(netdev, ec, queue); 2295 } 2296 2297 /** 2298 * i40e_set_itr_per_queue - set ITR values for specific queue 2299 * @vsi: the VSI to set values for 2300 * @ec: coalesce settings from ethtool 2301 * @queue: the queue to modify 2302 * 2303 * Change the ITR settings for a specific queue. 2304 **/ 2305 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2306 struct ethtool_coalesce *ec, 2307 int queue) 2308 { 2309 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2310 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2311 struct i40e_pf *pf = vsi->back; 2312 struct i40e_hw *hw = &pf->hw; 2313 struct i40e_q_vector *q_vector; 2314 u16 intrl; 2315 2316 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2317 2318 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2319 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2320 2321 if (ec->use_adaptive_rx_coalesce) 2322 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2323 else 2324 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2325 2326 if (ec->use_adaptive_tx_coalesce) 2327 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2328 else 2329 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2330 2331 q_vector = rx_ring->q_vector; 2332 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2333 2334 q_vector = tx_ring->q_vector; 2335 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2336 2337 /* The interrupt handler itself will take care of programming 2338 * the Tx and Rx ITR values based on the values we have entered 2339 * into the q_vector, no need to write the values now. 2340 */ 2341 2342 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2343 i40e_flush(hw); 2344 } 2345 2346 /** 2347 * __i40e_set_coalesce - set coalesce settings for particular queue 2348 * @netdev: the netdev to change 2349 * @ec: ethtool coalesce settings 2350 * @queue: the queue to change 2351 * 2352 * Sets the coalesce settings for a particular queue. 2353 **/ 2354 static int __i40e_set_coalesce(struct net_device *netdev, 2355 struct ethtool_coalesce *ec, 2356 int queue) 2357 { 2358 struct i40e_netdev_priv *np = netdev_priv(netdev); 2359 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2360 struct i40e_vsi *vsi = np->vsi; 2361 struct i40e_pf *pf = vsi->back; 2362 int i; 2363 2364 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2365 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2366 2367 if (queue < 0) { 2368 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2369 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2370 } else if (queue < vsi->num_queue_pairs) { 2371 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2372 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2373 } else { 2374 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2375 vsi->num_queue_pairs - 1); 2376 return -EINVAL; 2377 } 2378 2379 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2380 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2381 2382 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2383 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2384 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2385 return -EINVAL; 2386 } 2387 2388 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2389 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2390 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2391 return -EINVAL; 2392 } 2393 2394 if (ec->rx_coalesce_usecs != cur_rx_itr && 2395 ec->use_adaptive_rx_coalesce) { 2396 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2397 return -EINVAL; 2398 } 2399 2400 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2401 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2402 return -EINVAL; 2403 } 2404 2405 if (ec->tx_coalesce_usecs != cur_tx_itr && 2406 ec->use_adaptive_tx_coalesce) { 2407 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2408 return -EINVAL; 2409 } 2410 2411 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2412 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2413 return -EINVAL; 2414 } 2415 2416 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2417 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2418 2419 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2420 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2421 2422 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2423 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2424 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2425 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2426 vsi->int_rate_limit); 2427 } 2428 2429 /* rx and tx usecs has per queue value. If user doesn't specify the 2430 * queue, apply to all queues. 2431 */ 2432 if (queue < 0) { 2433 for (i = 0; i < vsi->num_queue_pairs; i++) 2434 i40e_set_itr_per_queue(vsi, ec, i); 2435 } else { 2436 i40e_set_itr_per_queue(vsi, ec, queue); 2437 } 2438 2439 return 0; 2440 } 2441 2442 /** 2443 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2444 * @netdev: the netdev to change 2445 * @ec: ethtool coalesce settings 2446 * 2447 * This will set each queue to the same coalesce settings. 2448 **/ 2449 static int i40e_set_coalesce(struct net_device *netdev, 2450 struct ethtool_coalesce *ec) 2451 { 2452 return __i40e_set_coalesce(netdev, ec, -1); 2453 } 2454 2455 /** 2456 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2457 * @netdev: the netdev to change 2458 * @ec: ethtool's coalesce settings 2459 * @queue: the queue to change 2460 * 2461 * Sets the specified queue's coalesce settings. 2462 **/ 2463 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2464 struct ethtool_coalesce *ec) 2465 { 2466 return __i40e_set_coalesce(netdev, ec, queue); 2467 } 2468 2469 /** 2470 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2471 * @pf: pointer to the physical function struct 2472 * @cmd: ethtool rxnfc command 2473 * 2474 * Returns Success if the flow is supported, else Invalid Input. 2475 **/ 2476 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2477 { 2478 struct i40e_hw *hw = &pf->hw; 2479 u8 flow_pctype = 0; 2480 u64 i_set = 0; 2481 2482 cmd->data = 0; 2483 2484 switch (cmd->flow_type) { 2485 case TCP_V4_FLOW: 2486 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2487 break; 2488 case UDP_V4_FLOW: 2489 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2490 break; 2491 case TCP_V6_FLOW: 2492 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2493 break; 2494 case UDP_V6_FLOW: 2495 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2496 break; 2497 case SCTP_V4_FLOW: 2498 case AH_ESP_V4_FLOW: 2499 case AH_V4_FLOW: 2500 case ESP_V4_FLOW: 2501 case IPV4_FLOW: 2502 case SCTP_V6_FLOW: 2503 case AH_ESP_V6_FLOW: 2504 case AH_V6_FLOW: 2505 case ESP_V6_FLOW: 2506 case IPV6_FLOW: 2507 /* Default is src/dest for IP, no matter the L4 hashing */ 2508 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2509 break; 2510 default: 2511 return -EINVAL; 2512 } 2513 2514 /* Read flow based hash input set register */ 2515 if (flow_pctype) { 2516 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2517 flow_pctype)) | 2518 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2519 flow_pctype)) << 32); 2520 } 2521 2522 /* Process bits of hash input set */ 2523 if (i_set) { 2524 if (i_set & I40E_L4_SRC_MASK) 2525 cmd->data |= RXH_L4_B_0_1; 2526 if (i_set & I40E_L4_DST_MASK) 2527 cmd->data |= RXH_L4_B_2_3; 2528 2529 if (cmd->flow_type == TCP_V4_FLOW || 2530 cmd->flow_type == UDP_V4_FLOW) { 2531 if (i_set & I40E_L3_SRC_MASK) 2532 cmd->data |= RXH_IP_SRC; 2533 if (i_set & I40E_L3_DST_MASK) 2534 cmd->data |= RXH_IP_DST; 2535 } else if (cmd->flow_type == TCP_V6_FLOW || 2536 cmd->flow_type == UDP_V6_FLOW) { 2537 if (i_set & I40E_L3_V6_SRC_MASK) 2538 cmd->data |= RXH_IP_SRC; 2539 if (i_set & I40E_L3_V6_DST_MASK) 2540 cmd->data |= RXH_IP_DST; 2541 } 2542 } 2543 2544 return 0; 2545 } 2546 2547 /** 2548 * i40e_check_mask - Check whether a mask field is set 2549 * @mask: the full mask value 2550 * @field; mask of the field to check 2551 * 2552 * If the given mask is fully set, return positive value. If the mask for the 2553 * field is fully unset, return zero. Otherwise return a negative error code. 2554 **/ 2555 static int i40e_check_mask(u64 mask, u64 field) 2556 { 2557 u64 value = mask & field; 2558 2559 if (value == field) 2560 return 1; 2561 else if (!value) 2562 return 0; 2563 else 2564 return -1; 2565 } 2566 2567 /** 2568 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2569 * @fsp: pointer to rx flow specification 2570 * @data: pointer to userdef data structure for storage 2571 * 2572 * Read the user-defined data and deconstruct the value into a structure. No 2573 * other code should read the user-defined data, so as to ensure that every 2574 * place consistently reads the value correctly. 2575 * 2576 * The user-defined field is a 64bit Big Endian format value, which we 2577 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2578 * be defined starting from the highest bits, while small bit field values 2579 * shall be defined starting from the lowest bits. 2580 * 2581 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2582 * and the filter should be rejected. The data structure will always be 2583 * modified even if FLOW_EXT is not set. 2584 * 2585 **/ 2586 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2587 struct i40e_rx_flow_userdef *data) 2588 { 2589 u64 value, mask; 2590 int valid; 2591 2592 /* Zero memory first so it's always consistent. */ 2593 memset(data, 0, sizeof(*data)); 2594 2595 if (!(fsp->flow_type & FLOW_EXT)) 2596 return 0; 2597 2598 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2599 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2600 2601 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2602 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2603 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2604 2605 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2606 if (valid < 0) { 2607 return -EINVAL; 2608 } else if (valid) { 2609 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2610 data->flex_offset = 2611 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2612 data->flex_filter = true; 2613 } 2614 2615 return 0; 2616 } 2617 2618 /** 2619 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2620 * @fsp: pointer to rx_flow specification 2621 * 2622 * Reads the userdef data structure and properly fills in the user defined 2623 * fields of the rx_flow_spec. 2624 **/ 2625 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2626 struct i40e_rx_flow_userdef *data) 2627 { 2628 u64 value = 0, mask = 0; 2629 2630 if (data->flex_filter) { 2631 value |= data->flex_word; 2632 value |= (u64)data->flex_offset << 16; 2633 mask |= I40E_USERDEF_FLEX_FILTER; 2634 } 2635 2636 if (value || mask) 2637 fsp->flow_type |= FLOW_EXT; 2638 2639 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2640 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2641 } 2642 2643 /** 2644 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2645 * @pf: Pointer to the physical function struct 2646 * @cmd: The command to get or set Rx flow classification rules 2647 * @rule_locs: Array of used rule locations 2648 * 2649 * This function populates both the total and actual rule count of 2650 * the ethtool flow classification command 2651 * 2652 * Returns 0 on success or -EMSGSIZE if entry not found 2653 **/ 2654 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2655 struct ethtool_rxnfc *cmd, 2656 u32 *rule_locs) 2657 { 2658 struct i40e_fdir_filter *rule; 2659 struct hlist_node *node2; 2660 int cnt = 0; 2661 2662 /* report total rule count */ 2663 cmd->data = i40e_get_fd_cnt_all(pf); 2664 2665 hlist_for_each_entry_safe(rule, node2, 2666 &pf->fdir_filter_list, fdir_node) { 2667 if (cnt == cmd->rule_cnt) 2668 return -EMSGSIZE; 2669 2670 rule_locs[cnt] = rule->fd_id; 2671 cnt++; 2672 } 2673 2674 cmd->rule_cnt = cnt; 2675 2676 return 0; 2677 } 2678 2679 /** 2680 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2681 * @pf: Pointer to the physical function struct 2682 * @cmd: The command to get or set Rx flow classification rules 2683 * 2684 * This function looks up a filter based on the Rx flow classification 2685 * command and fills the flow spec info for it if found 2686 * 2687 * Returns 0 on success or -EINVAL if filter not found 2688 **/ 2689 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2690 struct ethtool_rxnfc *cmd) 2691 { 2692 struct ethtool_rx_flow_spec *fsp = 2693 (struct ethtool_rx_flow_spec *)&cmd->fs; 2694 struct i40e_rx_flow_userdef userdef = {0}; 2695 struct i40e_fdir_filter *rule = NULL; 2696 struct hlist_node *node2; 2697 u64 input_set; 2698 u16 index; 2699 2700 hlist_for_each_entry_safe(rule, node2, 2701 &pf->fdir_filter_list, fdir_node) { 2702 if (fsp->location <= rule->fd_id) 2703 break; 2704 } 2705 2706 if (!rule || fsp->location != rule->fd_id) 2707 return -EINVAL; 2708 2709 fsp->flow_type = rule->flow_type; 2710 if (fsp->flow_type == IP_USER_FLOW) { 2711 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2712 fsp->h_u.usr_ip4_spec.proto = 0; 2713 fsp->m_u.usr_ip4_spec.proto = 0; 2714 } 2715 2716 /* Reverse the src and dest notion, since the HW views them from 2717 * Tx perspective where as the user expects it from Rx filter view. 2718 */ 2719 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2720 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2721 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2722 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2723 2724 switch (rule->flow_type) { 2725 case SCTP_V4_FLOW: 2726 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2727 break; 2728 case TCP_V4_FLOW: 2729 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2730 break; 2731 case UDP_V4_FLOW: 2732 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2733 break; 2734 case IP_USER_FLOW: 2735 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2736 break; 2737 default: 2738 /* If we have stored a filter with a flow type not listed here 2739 * it is almost certainly a driver bug. WARN(), and then 2740 * assign the input_set as if all fields are enabled to avoid 2741 * reading unassigned memory. 2742 */ 2743 WARN(1, "Missing input set index for flow_type %d\n", 2744 rule->flow_type); 2745 input_set = 0xFFFFFFFFFFFFFFFFULL; 2746 goto no_input_set; 2747 } 2748 2749 input_set = i40e_read_fd_input_set(pf, index); 2750 2751 no_input_set: 2752 if (input_set & I40E_L3_SRC_MASK) 2753 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 2754 2755 if (input_set & I40E_L3_DST_MASK) 2756 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 2757 2758 if (input_set & I40E_L4_SRC_MASK) 2759 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 2760 2761 if (input_set & I40E_L4_DST_MASK) 2762 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 2763 2764 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2765 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2766 else 2767 fsp->ring_cookie = rule->q_index; 2768 2769 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2770 struct i40e_vsi *vsi; 2771 2772 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2773 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2774 /* VFs are zero-indexed by the driver, but ethtool 2775 * expects them to be one-indexed, so add one here 2776 */ 2777 u64 ring_vf = vsi->vf_id + 1; 2778 2779 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2780 fsp->ring_cookie |= ring_vf; 2781 } 2782 } 2783 2784 if (rule->flex_filter) { 2785 userdef.flex_filter = true; 2786 userdef.flex_word = be16_to_cpu(rule->flex_word); 2787 userdef.flex_offset = rule->flex_offset; 2788 } 2789 2790 i40e_fill_rx_flow_user_data(fsp, &userdef); 2791 2792 return 0; 2793 } 2794 2795 /** 2796 * i40e_get_rxnfc - command to get RX flow classification rules 2797 * @netdev: network interface device structure 2798 * @cmd: ethtool rxnfc command 2799 * 2800 * Returns Success if the command is supported. 2801 **/ 2802 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2803 u32 *rule_locs) 2804 { 2805 struct i40e_netdev_priv *np = netdev_priv(netdev); 2806 struct i40e_vsi *vsi = np->vsi; 2807 struct i40e_pf *pf = vsi->back; 2808 int ret = -EOPNOTSUPP; 2809 2810 switch (cmd->cmd) { 2811 case ETHTOOL_GRXRINGS: 2812 cmd->data = vsi->rss_size; 2813 ret = 0; 2814 break; 2815 case ETHTOOL_GRXFH: 2816 ret = i40e_get_rss_hash_opts(pf, cmd); 2817 break; 2818 case ETHTOOL_GRXCLSRLCNT: 2819 cmd->rule_cnt = pf->fdir_pf_active_filters; 2820 /* report total rule count */ 2821 cmd->data = i40e_get_fd_cnt_all(pf); 2822 ret = 0; 2823 break; 2824 case ETHTOOL_GRXCLSRULE: 2825 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2826 break; 2827 case ETHTOOL_GRXCLSRLALL: 2828 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2829 break; 2830 default: 2831 break; 2832 } 2833 2834 return ret; 2835 } 2836 2837 /** 2838 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2839 * @nfc: pointer to user request 2840 * @i_setc bits currently set 2841 * 2842 * Returns value of bits to be set per user request 2843 **/ 2844 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2845 { 2846 u64 i_set = i_setc; 2847 u64 src_l3 = 0, dst_l3 = 0; 2848 2849 if (nfc->data & RXH_L4_B_0_1) 2850 i_set |= I40E_L4_SRC_MASK; 2851 else 2852 i_set &= ~I40E_L4_SRC_MASK; 2853 if (nfc->data & RXH_L4_B_2_3) 2854 i_set |= I40E_L4_DST_MASK; 2855 else 2856 i_set &= ~I40E_L4_DST_MASK; 2857 2858 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2859 src_l3 = I40E_L3_V6_SRC_MASK; 2860 dst_l3 = I40E_L3_V6_DST_MASK; 2861 } else if (nfc->flow_type == TCP_V4_FLOW || 2862 nfc->flow_type == UDP_V4_FLOW) { 2863 src_l3 = I40E_L3_SRC_MASK; 2864 dst_l3 = I40E_L3_DST_MASK; 2865 } else { 2866 /* Any other flow type are not supported here */ 2867 return i_set; 2868 } 2869 2870 if (nfc->data & RXH_IP_SRC) 2871 i_set |= src_l3; 2872 else 2873 i_set &= ~src_l3; 2874 if (nfc->data & RXH_IP_DST) 2875 i_set |= dst_l3; 2876 else 2877 i_set &= ~dst_l3; 2878 2879 return i_set; 2880 } 2881 2882 /** 2883 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2884 * @pf: pointer to the physical function struct 2885 * @cmd: ethtool rxnfc command 2886 * 2887 * Returns Success if the flow input set is supported. 2888 **/ 2889 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2890 { 2891 struct i40e_hw *hw = &pf->hw; 2892 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2893 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2894 u8 flow_pctype = 0; 2895 u64 i_set, i_setc; 2896 2897 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2898 dev_err(&pf->pdev->dev, 2899 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2900 return -EOPNOTSUPP; 2901 } 2902 2903 /* RSS does not support anything other than hashing 2904 * to queues on src and dst IPs and ports 2905 */ 2906 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2907 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2908 return -EINVAL; 2909 2910 switch (nfc->flow_type) { 2911 case TCP_V4_FLOW: 2912 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2913 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2914 hena |= 2915 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2916 break; 2917 case TCP_V6_FLOW: 2918 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2919 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2920 hena |= 2921 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2922 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2923 hena |= 2924 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2925 break; 2926 case UDP_V4_FLOW: 2927 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2928 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2929 hena |= 2930 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2931 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2932 2933 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2934 break; 2935 case UDP_V6_FLOW: 2936 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2937 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2938 hena |= 2939 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2940 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2941 2942 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2943 break; 2944 case AH_ESP_V4_FLOW: 2945 case AH_V4_FLOW: 2946 case ESP_V4_FLOW: 2947 case SCTP_V4_FLOW: 2948 if ((nfc->data & RXH_L4_B_0_1) || 2949 (nfc->data & RXH_L4_B_2_3)) 2950 return -EINVAL; 2951 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2952 break; 2953 case AH_ESP_V6_FLOW: 2954 case AH_V6_FLOW: 2955 case ESP_V6_FLOW: 2956 case SCTP_V6_FLOW: 2957 if ((nfc->data & RXH_L4_B_0_1) || 2958 (nfc->data & RXH_L4_B_2_3)) 2959 return -EINVAL; 2960 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2961 break; 2962 case IPV4_FLOW: 2963 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2964 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2965 break; 2966 case IPV6_FLOW: 2967 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2968 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2969 break; 2970 default: 2971 return -EINVAL; 2972 } 2973 2974 if (flow_pctype) { 2975 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2976 flow_pctype)) | 2977 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2978 flow_pctype)) << 32); 2979 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2980 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2981 (u32)i_set); 2982 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2983 (u32)(i_set >> 32)); 2984 hena |= BIT_ULL(flow_pctype); 2985 } 2986 2987 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2988 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2989 i40e_flush(hw); 2990 2991 return 0; 2992 } 2993 2994 /** 2995 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2996 * @vsi: Pointer to the targeted VSI 2997 * @input: The filter to update or NULL to indicate deletion 2998 * @sw_idx: Software index to the filter 2999 * @cmd: The command to get or set Rx flow classification rules 3000 * 3001 * This function updates (or deletes) a Flow Director entry from 3002 * the hlist of the corresponding PF 3003 * 3004 * Returns 0 on success 3005 **/ 3006 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3007 struct i40e_fdir_filter *input, 3008 u16 sw_idx, 3009 struct ethtool_rxnfc *cmd) 3010 { 3011 struct i40e_fdir_filter *rule, *parent; 3012 struct i40e_pf *pf = vsi->back; 3013 struct hlist_node *node2; 3014 int err = -EINVAL; 3015 3016 parent = NULL; 3017 rule = NULL; 3018 3019 hlist_for_each_entry_safe(rule, node2, 3020 &pf->fdir_filter_list, fdir_node) { 3021 /* hash found, or no matching entry */ 3022 if (rule->fd_id >= sw_idx) 3023 break; 3024 parent = rule; 3025 } 3026 3027 /* if there is an old rule occupying our place remove it */ 3028 if (rule && (rule->fd_id == sw_idx)) { 3029 /* Remove this rule, since we're either deleting it, or 3030 * replacing it. 3031 */ 3032 err = i40e_add_del_fdir(vsi, rule, false); 3033 hlist_del(&rule->fdir_node); 3034 kfree(rule); 3035 pf->fdir_pf_active_filters--; 3036 } 3037 3038 /* If we weren't given an input, this is a delete, so just return the 3039 * error code indicating if there was an entry at the requested slot 3040 */ 3041 if (!input) 3042 return err; 3043 3044 /* Otherwise, install the new rule as requested */ 3045 INIT_HLIST_NODE(&input->fdir_node); 3046 3047 /* add filter to the list */ 3048 if (parent) 3049 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3050 else 3051 hlist_add_head(&input->fdir_node, 3052 &pf->fdir_filter_list); 3053 3054 /* update counts */ 3055 pf->fdir_pf_active_filters++; 3056 3057 return 0; 3058 } 3059 3060 /** 3061 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3062 * @pf: pointer to PF structure 3063 * 3064 * This function searches the list of filters and determines which FLX_PIT 3065 * entries are still required. It will prune any entries which are no longer 3066 * in use after the deletion. 3067 **/ 3068 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3069 { 3070 struct i40e_flex_pit *entry, *tmp; 3071 struct i40e_fdir_filter *rule; 3072 3073 /* First, we'll check the l3 table */ 3074 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3075 bool found = false; 3076 3077 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3078 if (rule->flow_type != IP_USER_FLOW) 3079 continue; 3080 if (rule->flex_filter && 3081 rule->flex_offset == entry->src_offset) { 3082 found = true; 3083 break; 3084 } 3085 } 3086 3087 /* If we didn't find the filter, then we can prune this entry 3088 * from the list. 3089 */ 3090 if (!found) { 3091 list_del(&entry->list); 3092 kfree(entry); 3093 } 3094 } 3095 3096 /* Followed by the L4 table */ 3097 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3098 bool found = false; 3099 3100 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3101 /* Skip this filter if it's L3, since we already 3102 * checked those in the above loop 3103 */ 3104 if (rule->flow_type == IP_USER_FLOW) 3105 continue; 3106 if (rule->flex_filter && 3107 rule->flex_offset == entry->src_offset) { 3108 found = true; 3109 break; 3110 } 3111 } 3112 3113 /* If we didn't find the filter, then we can prune this entry 3114 * from the list. 3115 */ 3116 if (!found) { 3117 list_del(&entry->list); 3118 kfree(entry); 3119 } 3120 } 3121 } 3122 3123 /** 3124 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3125 * @vsi: Pointer to the targeted VSI 3126 * @cmd: The command to get or set Rx flow classification rules 3127 * 3128 * The function removes a Flow Director filter entry from the 3129 * hlist of the corresponding PF 3130 * 3131 * Returns 0 on success 3132 */ 3133 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3134 struct ethtool_rxnfc *cmd) 3135 { 3136 struct ethtool_rx_flow_spec *fsp = 3137 (struct ethtool_rx_flow_spec *)&cmd->fs; 3138 struct i40e_pf *pf = vsi->back; 3139 int ret = 0; 3140 3141 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3142 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3143 return -EBUSY; 3144 3145 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3146 return -EBUSY; 3147 3148 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3149 3150 i40e_prune_flex_pit_list(pf); 3151 3152 i40e_fdir_check_and_reenable(pf); 3153 return ret; 3154 } 3155 3156 /** 3157 * i40e_unused_pit_index - Find an unused PIT index for given list 3158 * @pf: the PF data structure 3159 * 3160 * Find the first unused flexible PIT index entry. We search both the L3 and 3161 * L4 flexible PIT lists so that the returned index is unique and unused by 3162 * either currently programmed L3 or L4 filters. We use a bit field as storage 3163 * to track which indexes are already used. 3164 **/ 3165 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3166 { 3167 unsigned long available_index = 0xFF; 3168 struct i40e_flex_pit *entry; 3169 3170 /* We need to make sure that the new index isn't in use by either L3 3171 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3172 * L4 to use the same index. 3173 */ 3174 3175 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3176 clear_bit(entry->pit_index, &available_index); 3177 3178 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3179 clear_bit(entry->pit_index, &available_index); 3180 3181 return find_first_bit(&available_index, 8); 3182 } 3183 3184 /** 3185 * i40e_find_flex_offset - Find an existing flex src_offset 3186 * @flex_pit_list: L3 or L4 flex PIT list 3187 * @src_offset: new src_offset to find 3188 * 3189 * Searches the flex_pit_list for an existing offset. If no offset is 3190 * currently programmed, then this will return an ERR_PTR if there is no space 3191 * to add a new offset, otherwise it returns NULL. 3192 **/ 3193 static 3194 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3195 u16 src_offset) 3196 { 3197 struct i40e_flex_pit *entry; 3198 int size = 0; 3199 3200 /* Search for the src_offset first. If we find a matching entry 3201 * already programmed, we can simply re-use it. 3202 */ 3203 list_for_each_entry(entry, flex_pit_list, list) { 3204 size++; 3205 if (entry->src_offset == src_offset) 3206 return entry; 3207 } 3208 3209 /* If we haven't found an entry yet, then the provided src offset has 3210 * not yet been programmed. We will program the src offset later on, 3211 * but we need to indicate whether there is enough space to do so 3212 * here. We'll make use of ERR_PTR for this purpose. 3213 */ 3214 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3215 return ERR_PTR(-ENOSPC); 3216 3217 return NULL; 3218 } 3219 3220 /** 3221 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3222 * @flex_pit_list: L3 or L4 flex PIT list 3223 * @src_offset: new src_offset to add 3224 * @pit_index: the PIT index to program 3225 * 3226 * This function programs the new src_offset to the list. It is expected that 3227 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3228 * that this offset is not programmed, and that the list has enough space to 3229 * store another offset. 3230 * 3231 * Returns 0 on success, and negative value on error. 3232 **/ 3233 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3234 u16 src_offset, 3235 u8 pit_index) 3236 { 3237 struct i40e_flex_pit *new_pit, *entry; 3238 3239 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3240 if (!new_pit) 3241 return -ENOMEM; 3242 3243 new_pit->src_offset = src_offset; 3244 new_pit->pit_index = pit_index; 3245 3246 /* We need to insert this item such that the list is sorted by 3247 * src_offset in ascending order. 3248 */ 3249 list_for_each_entry(entry, flex_pit_list, list) { 3250 if (new_pit->src_offset < entry->src_offset) { 3251 list_add_tail(&new_pit->list, &entry->list); 3252 return 0; 3253 } 3254 3255 /* If we found an entry with our offset already programmed we 3256 * can simply return here, after freeing the memory. However, 3257 * if the pit_index does not match we need to report an error. 3258 */ 3259 if (new_pit->src_offset == entry->src_offset) { 3260 int err = 0; 3261 3262 /* If the PIT index is not the same we can't re-use 3263 * the entry, so we must report an error. 3264 */ 3265 if (new_pit->pit_index != entry->pit_index) 3266 err = -EINVAL; 3267 3268 kfree(new_pit); 3269 return err; 3270 } 3271 } 3272 3273 /* If we reached here, then we haven't yet added the item. This means 3274 * that we should add the item at the end of the list. 3275 */ 3276 list_add_tail(&new_pit->list, flex_pit_list); 3277 return 0; 3278 } 3279 3280 /** 3281 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3282 * @pf: Pointer to the PF structure 3283 * @flex_pit_list: list of flexible src offsets in use 3284 * #flex_pit_start: index to first entry for this section of the table 3285 * 3286 * In order to handle flexible data, the hardware uses a table of values 3287 * called the FLX_PIT table. This table is used to indicate which sections of 3288 * the input correspond to what PIT index values. Unfortunately, hardware is 3289 * very restrictive about programming this table. Entries must be ordered by 3290 * src_offset in ascending order, without duplicates. Additionally, unused 3291 * entries must be set to the unused index value, and must have valid size and 3292 * length according to the src_offset ordering. 3293 * 3294 * This function will reprogram the FLX_PIT register from a book-keeping 3295 * structure that we guarantee is already ordered correctly, and has no more 3296 * than 3 entries. 3297 * 3298 * To make things easier, we only support flexible values of one word length, 3299 * rather than allowing variable length flexible values. 3300 **/ 3301 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3302 struct list_head *flex_pit_list, 3303 int flex_pit_start) 3304 { 3305 struct i40e_flex_pit *entry = NULL; 3306 u16 last_offset = 0; 3307 int i = 0, j = 0; 3308 3309 /* First, loop over the list of flex PIT entries, and reprogram the 3310 * registers. 3311 */ 3312 list_for_each_entry(entry, flex_pit_list, list) { 3313 /* We have to be careful when programming values for the 3314 * largest SRC_OFFSET value. It is possible that adding 3315 * additional empty values at the end would overflow the space 3316 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3317 * we check here and add the empty values prior to adding the 3318 * largest value. 3319 * 3320 * To determine this, we will use a loop from i+1 to 3, which 3321 * will determine whether the unused entries would have valid 3322 * SRC_OFFSET. Note that there cannot be extra entries past 3323 * this value, because the only valid values would have been 3324 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3325 * have been added to the list in the first place. 3326 */ 3327 for (j = i + 1; j < 3; j++) { 3328 u16 offset = entry->src_offset + j; 3329 int index = flex_pit_start + i; 3330 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3331 1, 3332 offset - 3); 3333 3334 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3335 i40e_write_rx_ctl(&pf->hw, 3336 I40E_PRTQF_FLX_PIT(index), 3337 value); 3338 i++; 3339 } 3340 } 3341 3342 /* Now, we can program the actual value into the table */ 3343 i40e_write_rx_ctl(&pf->hw, 3344 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3345 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3346 1, 3347 entry->src_offset)); 3348 i++; 3349 } 3350 3351 /* In order to program the last entries in the table, we need to 3352 * determine the valid offset. If the list is empty, we'll just start 3353 * with 0. Otherwise, we'll start with the last item offset and add 1. 3354 * This ensures that all entries have valid sizes. If we don't do this 3355 * correctly, the hardware will disable flexible field parsing. 3356 */ 3357 if (!list_empty(flex_pit_list)) 3358 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3359 3360 for (; i < 3; i++, last_offset++) { 3361 i40e_write_rx_ctl(&pf->hw, 3362 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3363 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3364 1, 3365 last_offset)); 3366 } 3367 } 3368 3369 /** 3370 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3371 * @pf: pointer to the PF structure 3372 * 3373 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3374 * internal helper function for implementation details. 3375 **/ 3376 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3377 { 3378 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3379 I40E_FLEX_PIT_IDX_START_L3); 3380 3381 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3382 I40E_FLEX_PIT_IDX_START_L4); 3383 3384 /* We also need to program the L3 and L4 GLQF ORT register */ 3385 i40e_write_rx_ctl(&pf->hw, 3386 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3387 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3388 3, 1)); 3389 3390 i40e_write_rx_ctl(&pf->hw, 3391 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3392 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3393 3, 1)); 3394 } 3395 3396 /** 3397 * i40e_flow_str - Converts a flow_type into a human readable string 3398 * @flow_type: the flow type from a flow specification 3399 * 3400 * Currently only flow types we support are included here, and the string 3401 * value attempts to match what ethtool would use to configure this flow type. 3402 **/ 3403 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3404 { 3405 switch (fsp->flow_type & ~FLOW_EXT) { 3406 case TCP_V4_FLOW: 3407 return "tcp4"; 3408 case UDP_V4_FLOW: 3409 return "udp4"; 3410 case SCTP_V4_FLOW: 3411 return "sctp4"; 3412 case IP_USER_FLOW: 3413 return "ip4"; 3414 default: 3415 return "unknown"; 3416 } 3417 } 3418 3419 /** 3420 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3421 * @pit_index: PIT index to convert 3422 * 3423 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3424 * of range. 3425 **/ 3426 static u64 i40e_pit_index_to_mask(int pit_index) 3427 { 3428 switch (pit_index) { 3429 case 0: 3430 return I40E_FLEX_50_MASK; 3431 case 1: 3432 return I40E_FLEX_51_MASK; 3433 case 2: 3434 return I40E_FLEX_52_MASK; 3435 case 3: 3436 return I40E_FLEX_53_MASK; 3437 case 4: 3438 return I40E_FLEX_54_MASK; 3439 case 5: 3440 return I40E_FLEX_55_MASK; 3441 case 6: 3442 return I40E_FLEX_56_MASK; 3443 case 7: 3444 return I40E_FLEX_57_MASK; 3445 default: 3446 return 0; 3447 } 3448 } 3449 3450 /** 3451 * i40e_print_input_set - Show changes between two input sets 3452 * @vsi: the vsi being configured 3453 * @old: the old input set 3454 * @new: the new input set 3455 * 3456 * Print the difference between old and new input sets by showing which series 3457 * of words are toggled on or off. Only displays the bits we actually support 3458 * changing. 3459 **/ 3460 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3461 { 3462 struct i40e_pf *pf = vsi->back; 3463 bool old_value, new_value; 3464 int i; 3465 3466 old_value = !!(old & I40E_L3_SRC_MASK); 3467 new_value = !!(new & I40E_L3_SRC_MASK); 3468 if (old_value != new_value) 3469 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3470 old_value ? "ON" : "OFF", 3471 new_value ? "ON" : "OFF"); 3472 3473 old_value = !!(old & I40E_L3_DST_MASK); 3474 new_value = !!(new & I40E_L3_DST_MASK); 3475 if (old_value != new_value) 3476 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3477 old_value ? "ON" : "OFF", 3478 new_value ? "ON" : "OFF"); 3479 3480 old_value = !!(old & I40E_L4_SRC_MASK); 3481 new_value = !!(new & I40E_L4_SRC_MASK); 3482 if (old_value != new_value) 3483 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3484 old_value ? "ON" : "OFF", 3485 new_value ? "ON" : "OFF"); 3486 3487 old_value = !!(old & I40E_L4_DST_MASK); 3488 new_value = !!(new & I40E_L4_DST_MASK); 3489 if (old_value != new_value) 3490 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3491 old_value ? "ON" : "OFF", 3492 new_value ? "ON" : "OFF"); 3493 3494 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3495 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3496 if (old_value != new_value) 3497 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3498 old_value ? "ON" : "OFF", 3499 new_value ? "ON" : "OFF"); 3500 3501 /* Show change of flexible filter entries */ 3502 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3503 u64 flex_mask = i40e_pit_index_to_mask(i); 3504 3505 old_value = !!(old & flex_mask); 3506 new_value = !!(new & flex_mask); 3507 if (old_value != new_value) 3508 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3509 i, 3510 old_value ? "ON" : "OFF", 3511 new_value ? "ON" : "OFF"); 3512 } 3513 3514 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3515 old); 3516 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3517 new); 3518 } 3519 3520 /** 3521 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3522 * @vsi: pointer to the targeted VSI 3523 * @fsp: pointer to Rx flow specification 3524 * @userdef: userdefined data from flow specification 3525 * 3526 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3527 * for partial matches exists with a few limitations. First, hardware only 3528 * supports masking by word boundary (2 bytes) and not per individual bit. 3529 * Second, hardware is limited to using one mask for a flow type and cannot 3530 * use a separate mask for each filter. 3531 * 3532 * To support these limitations, if we already have a configured filter for 3533 * the specified type, this function enforces that new filters of the type 3534 * match the configured input set. Otherwise, if we do not have a filter of 3535 * the specified type, we allow the input set to be updated to match the 3536 * desired filter. 3537 * 3538 * To help ensure that administrators understand why filters weren't displayed 3539 * as supported, we print a diagnostic message displaying how the input set 3540 * would change and warning to delete the preexisting filters if required. 3541 * 3542 * Returns 0 on successful input set match, and a negative return code on 3543 * failure. 3544 **/ 3545 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3546 struct ethtool_rx_flow_spec *fsp, 3547 struct i40e_rx_flow_userdef *userdef) 3548 { 3549 struct i40e_pf *pf = vsi->back; 3550 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3551 struct ethtool_usrip4_spec *usr_ip4_spec; 3552 u64 current_mask, new_mask; 3553 bool new_flex_offset = false; 3554 bool flex_l3 = false; 3555 u16 *fdir_filter_count; 3556 u16 index, src_offset = 0; 3557 u8 pit_index = 0; 3558 int err; 3559 3560 switch (fsp->flow_type & ~FLOW_EXT) { 3561 case SCTP_V4_FLOW: 3562 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3563 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3564 break; 3565 case TCP_V4_FLOW: 3566 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3567 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3568 break; 3569 case UDP_V4_FLOW: 3570 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3571 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3572 break; 3573 case IP_USER_FLOW: 3574 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3575 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3576 flex_l3 = true; 3577 break; 3578 default: 3579 return -EOPNOTSUPP; 3580 } 3581 3582 /* Read the current input set from register memory. */ 3583 current_mask = i40e_read_fd_input_set(pf, index); 3584 new_mask = current_mask; 3585 3586 /* Determine, if any, the required changes to the input set in order 3587 * to support the provided mask. 3588 * 3589 * Hardware only supports masking at word (2 byte) granularity and does 3590 * not support full bitwise masking. This implementation simplifies 3591 * even further and only supports fully enabled or fully disabled 3592 * masks for each field, even though we could split the ip4src and 3593 * ip4dst fields. 3594 */ 3595 switch (fsp->flow_type & ~FLOW_EXT) { 3596 case SCTP_V4_FLOW: 3597 new_mask &= ~I40E_VERIFY_TAG_MASK; 3598 /* Fall through */ 3599 case TCP_V4_FLOW: 3600 case UDP_V4_FLOW: 3601 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3602 3603 /* IPv4 source address */ 3604 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3605 new_mask |= I40E_L3_SRC_MASK; 3606 else if (!tcp_ip4_spec->ip4src) 3607 new_mask &= ~I40E_L3_SRC_MASK; 3608 else 3609 return -EOPNOTSUPP; 3610 3611 /* IPv4 destination address */ 3612 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3613 new_mask |= I40E_L3_DST_MASK; 3614 else if (!tcp_ip4_spec->ip4dst) 3615 new_mask &= ~I40E_L3_DST_MASK; 3616 else 3617 return -EOPNOTSUPP; 3618 3619 /* L4 source port */ 3620 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3621 new_mask |= I40E_L4_SRC_MASK; 3622 else if (!tcp_ip4_spec->psrc) 3623 new_mask &= ~I40E_L4_SRC_MASK; 3624 else 3625 return -EOPNOTSUPP; 3626 3627 /* L4 destination port */ 3628 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3629 new_mask |= I40E_L4_DST_MASK; 3630 else if (!tcp_ip4_spec->pdst) 3631 new_mask &= ~I40E_L4_DST_MASK; 3632 else 3633 return -EOPNOTSUPP; 3634 3635 /* Filtering on Type of Service is not supported. */ 3636 if (tcp_ip4_spec->tos) 3637 return -EOPNOTSUPP; 3638 3639 break; 3640 case IP_USER_FLOW: 3641 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3642 3643 /* IPv4 source address */ 3644 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3645 new_mask |= I40E_L3_SRC_MASK; 3646 else if (!usr_ip4_spec->ip4src) 3647 new_mask &= ~I40E_L3_SRC_MASK; 3648 else 3649 return -EOPNOTSUPP; 3650 3651 /* IPv4 destination address */ 3652 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3653 new_mask |= I40E_L3_DST_MASK; 3654 else if (!usr_ip4_spec->ip4dst) 3655 new_mask &= ~I40E_L3_DST_MASK; 3656 else 3657 return -EOPNOTSUPP; 3658 3659 /* First 4 bytes of L4 header */ 3660 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3661 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3662 else if (!usr_ip4_spec->l4_4_bytes) 3663 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3664 else 3665 return -EOPNOTSUPP; 3666 3667 /* Filtering on Type of Service is not supported. */ 3668 if (usr_ip4_spec->tos) 3669 return -EOPNOTSUPP; 3670 3671 /* Filtering on IP version is not supported */ 3672 if (usr_ip4_spec->ip_ver) 3673 return -EINVAL; 3674 3675 /* Filtering on L4 protocol is not supported */ 3676 if (usr_ip4_spec->proto) 3677 return -EINVAL; 3678 3679 break; 3680 default: 3681 return -EOPNOTSUPP; 3682 } 3683 3684 /* First, clear all flexible filter entries */ 3685 new_mask &= ~I40E_FLEX_INPUT_MASK; 3686 3687 /* If we have a flexible filter, try to add this offset to the correct 3688 * flexible filter PIT list. Once finished, we can update the mask. 3689 * If the src_offset changed, we will get a new mask value which will 3690 * trigger an input set change. 3691 */ 3692 if (userdef->flex_filter) { 3693 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3694 3695 /* Flexible offset must be even, since the flexible payload 3696 * must be aligned on 2-byte boundary. 3697 */ 3698 if (userdef->flex_offset & 0x1) { 3699 dev_warn(&pf->pdev->dev, 3700 "Flexible data offset must be 2-byte aligned\n"); 3701 return -EINVAL; 3702 } 3703 3704 src_offset = userdef->flex_offset >> 1; 3705 3706 /* FLX_PIT source offset value is only so large */ 3707 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3708 dev_warn(&pf->pdev->dev, 3709 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3710 return -EINVAL; 3711 } 3712 3713 /* See if this offset has already been programmed. If we get 3714 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3715 * if we get a NULL pointer, this means we will need to add 3716 * the offset. 3717 */ 3718 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3719 src_offset); 3720 if (IS_ERR(flex_pit)) 3721 return PTR_ERR(flex_pit); 3722 3723 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3724 * packet types, and thus we need to program both L3 and L4 3725 * flexible values. These must have identical flexible index, 3726 * as otherwise we can't correctly program the input set. So 3727 * we'll find both an L3 and L4 index and make sure they are 3728 * the same. 3729 */ 3730 if (flex_l3) { 3731 l3_flex_pit = 3732 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3733 src_offset); 3734 if (IS_ERR(l3_flex_pit)) 3735 return PTR_ERR(l3_flex_pit); 3736 3737 if (flex_pit) { 3738 /* If we already had a matching L4 entry, we 3739 * need to make sure that the L3 entry we 3740 * obtained uses the same index. 3741 */ 3742 if (l3_flex_pit) { 3743 if (l3_flex_pit->pit_index != 3744 flex_pit->pit_index) { 3745 return -EINVAL; 3746 } 3747 } else { 3748 new_flex_offset = true; 3749 } 3750 } else { 3751 flex_pit = l3_flex_pit; 3752 } 3753 } 3754 3755 /* If we didn't find an existing flex offset, we need to 3756 * program a new one. However, we don't immediately program it 3757 * here because we will wait to program until after we check 3758 * that it is safe to change the input set. 3759 */ 3760 if (!flex_pit) { 3761 new_flex_offset = true; 3762 pit_index = i40e_unused_pit_index(pf); 3763 } else { 3764 pit_index = flex_pit->pit_index; 3765 } 3766 3767 /* Update the mask with the new offset */ 3768 new_mask |= i40e_pit_index_to_mask(pit_index); 3769 } 3770 3771 /* If the mask and flexible filter offsets for this filter match the 3772 * currently programmed values we don't need any input set change, so 3773 * this filter is safe to install. 3774 */ 3775 if (new_mask == current_mask && !new_flex_offset) 3776 return 0; 3777 3778 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3779 i40e_flow_str(fsp)); 3780 i40e_print_input_set(vsi, current_mask, new_mask); 3781 if (new_flex_offset) { 3782 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3783 pit_index, src_offset); 3784 } 3785 3786 /* Hardware input sets are global across multiple ports, so even the 3787 * main port cannot change them when in MFP mode as this would impact 3788 * any filters on the other ports. 3789 */ 3790 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3791 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3792 return -EOPNOTSUPP; 3793 } 3794 3795 /* This filter requires us to update the input set. However, hardware 3796 * only supports one input set per flow type, and does not support 3797 * separate masks for each filter. This means that we can only support 3798 * a single mask for all filters of a specific type. 3799 * 3800 * If we have preexisting filters, they obviously depend on the 3801 * current programmed input set. Display a diagnostic message in this 3802 * case explaining why the filter could not be accepted. 3803 */ 3804 if (*fdir_filter_count) { 3805 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3806 i40e_flow_str(fsp), 3807 *fdir_filter_count); 3808 return -EOPNOTSUPP; 3809 } 3810 3811 i40e_write_fd_input_set(pf, index, new_mask); 3812 3813 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 3814 * frames. If we're programming the input set for IPv4/Other, we also 3815 * need to program the IPv4/Fragmented input set. Since we don't have 3816 * separate support, we'll always assume and enforce that the two flow 3817 * types must have matching input sets. 3818 */ 3819 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 3820 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 3821 new_mask); 3822 3823 /* Add the new offset and update table, if necessary */ 3824 if (new_flex_offset) { 3825 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3826 pit_index); 3827 if (err) 3828 return err; 3829 3830 if (flex_l3) { 3831 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3832 src_offset, 3833 pit_index); 3834 if (err) 3835 return err; 3836 } 3837 3838 i40e_reprogram_flex_pit(pf); 3839 } 3840 3841 return 0; 3842 } 3843 3844 /** 3845 * i40e_match_fdir_filter - Return true of two filters match 3846 * @a: pointer to filter struct 3847 * @b: pointer to filter struct 3848 * 3849 * Returns true if the two filters match exactly the same criteria. I.e. they 3850 * match the same flow type and have the same parameters. We don't need to 3851 * check any input-set since all filters of the same flow type must use the 3852 * same input set. 3853 **/ 3854 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 3855 struct i40e_fdir_filter *b) 3856 { 3857 /* The filters do not much if any of these criteria differ. */ 3858 if (a->dst_ip != b->dst_ip || 3859 a->src_ip != b->src_ip || 3860 a->dst_port != b->dst_port || 3861 a->src_port != b->src_port || 3862 a->flow_type != b->flow_type || 3863 a->ip4_proto != b->ip4_proto) 3864 return false; 3865 3866 return true; 3867 } 3868 3869 /** 3870 * i40e_disallow_matching_filters - Check that new filters differ 3871 * @vsi: pointer to the targeted VSI 3872 * @input: new filter to check 3873 * 3874 * Due to hardware limitations, it is not possible for two filters that match 3875 * similar criteria to be programmed at the same time. This is true for a few 3876 * reasons: 3877 * 3878 * (a) all filters matching a particular flow type must use the same input 3879 * set, that is they must match the same criteria. 3880 * (b) different flow types will never match the same packet, as the flow type 3881 * is decided by hardware before checking which rules apply. 3882 * (c) hardware has no way to distinguish which order filters apply in. 3883 * 3884 * Due to this, we can't really support using the location data to order 3885 * filters in the hardware parsing. It is technically possible for the user to 3886 * request two filters matching the same criteria but which select different 3887 * queues. In this case, rather than keep both filters in the list, we reject 3888 * the 2nd filter when the user requests adding it. 3889 * 3890 * This avoids needing to track location for programming the filter to 3891 * hardware, and ensures that we avoid some strange scenarios involving 3892 * deleting filters which match the same criteria. 3893 **/ 3894 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 3895 struct i40e_fdir_filter *input) 3896 { 3897 struct i40e_pf *pf = vsi->back; 3898 struct i40e_fdir_filter *rule; 3899 struct hlist_node *node2; 3900 3901 /* Loop through every filter, and check that it doesn't match */ 3902 hlist_for_each_entry_safe(rule, node2, 3903 &pf->fdir_filter_list, fdir_node) { 3904 /* Don't check the filters match if they share the same fd_id, 3905 * since the new filter is actually just updating the target 3906 * of the old filter. 3907 */ 3908 if (rule->fd_id == input->fd_id) 3909 continue; 3910 3911 /* If any filters match, then print a warning message to the 3912 * kernel message buffer and bail out. 3913 */ 3914 if (i40e_match_fdir_filter(rule, input)) { 3915 dev_warn(&pf->pdev->dev, 3916 "Existing user defined filter %d already matches this flow.\n", 3917 rule->fd_id); 3918 return -EINVAL; 3919 } 3920 } 3921 3922 return 0; 3923 } 3924 3925 /** 3926 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3927 * @vsi: pointer to the targeted VSI 3928 * @cmd: command to get or set RX flow classification rules 3929 * 3930 * Add Flow Director filters for a specific flow spec based on their 3931 * protocol. Returns 0 if the filters were successfully added. 3932 **/ 3933 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3934 struct ethtool_rxnfc *cmd) 3935 { 3936 struct i40e_rx_flow_userdef userdef; 3937 struct ethtool_rx_flow_spec *fsp; 3938 struct i40e_fdir_filter *input; 3939 u16 dest_vsi = 0, q_index = 0; 3940 struct i40e_pf *pf; 3941 int ret = -EINVAL; 3942 u8 dest_ctl; 3943 3944 if (!vsi) 3945 return -EINVAL; 3946 pf = vsi->back; 3947 3948 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3949 return -EOPNOTSUPP; 3950 3951 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) 3952 return -ENOSPC; 3953 3954 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3955 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3956 return -EBUSY; 3957 3958 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3959 return -EBUSY; 3960 3961 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3962 3963 /* Parse the user-defined field */ 3964 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3965 return -EINVAL; 3966 3967 /* Extended MAC field is not supported */ 3968 if (fsp->flow_type & FLOW_MAC_EXT) 3969 return -EINVAL; 3970 3971 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3972 if (ret) 3973 return ret; 3974 3975 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3976 pf->hw.func_caps.fd_filters_guaranteed)) { 3977 return -EINVAL; 3978 } 3979 3980 /* ring_cookie is either the drop index, or is a mask of the queue 3981 * index and VF id we wish to target. 3982 */ 3983 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3984 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3985 } else { 3986 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3987 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3988 3989 if (!vf) { 3990 if (ring >= vsi->num_queue_pairs) 3991 return -EINVAL; 3992 dest_vsi = vsi->id; 3993 } else { 3994 /* VFs are zero-indexed, so we subtract one here */ 3995 vf--; 3996 3997 if (vf >= pf->num_alloc_vfs) 3998 return -EINVAL; 3999 if (ring >= pf->vf[vf].num_queue_pairs) 4000 return -EINVAL; 4001 dest_vsi = pf->vf[vf].lan_vsi_id; 4002 } 4003 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4004 q_index = ring; 4005 } 4006 4007 input = kzalloc(sizeof(*input), GFP_KERNEL); 4008 4009 if (!input) 4010 return -ENOMEM; 4011 4012 input->fd_id = fsp->location; 4013 input->q_index = q_index; 4014 input->dest_vsi = dest_vsi; 4015 input->dest_ctl = dest_ctl; 4016 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4017 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4018 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4019 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4020 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4021 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4022 4023 /* Reverse the src and dest notion, since the HW expects them to be from 4024 * Tx perspective where as the input from user is from Rx filter view. 4025 */ 4026 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4027 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4028 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4029 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4030 4031 if (userdef.flex_filter) { 4032 input->flex_filter = true; 4033 input->flex_word = cpu_to_be16(userdef.flex_word); 4034 input->flex_offset = userdef.flex_offset; 4035 } 4036 4037 /* Avoid programming two filters with identical match criteria. */ 4038 ret = i40e_disallow_matching_filters(vsi, input); 4039 if (ret) 4040 goto free_filter_memory; 4041 4042 /* Add the input filter to the fdir_input_list, possibly replacing 4043 * a previous filter. Do not free the input structure after adding it 4044 * to the list as this would cause a use-after-free bug. 4045 */ 4046 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4047 ret = i40e_add_del_fdir(vsi, input, true); 4048 if (ret) 4049 goto remove_sw_rule; 4050 return 0; 4051 4052 remove_sw_rule: 4053 hlist_del(&input->fdir_node); 4054 pf->fdir_pf_active_filters--; 4055 free_filter_memory: 4056 kfree(input); 4057 return ret; 4058 } 4059 4060 /** 4061 * i40e_set_rxnfc - command to set RX flow classification rules 4062 * @netdev: network interface device structure 4063 * @cmd: ethtool rxnfc command 4064 * 4065 * Returns Success if the command is supported. 4066 **/ 4067 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4068 { 4069 struct i40e_netdev_priv *np = netdev_priv(netdev); 4070 struct i40e_vsi *vsi = np->vsi; 4071 struct i40e_pf *pf = vsi->back; 4072 int ret = -EOPNOTSUPP; 4073 4074 switch (cmd->cmd) { 4075 case ETHTOOL_SRXFH: 4076 ret = i40e_set_rss_hash_opt(pf, cmd); 4077 break; 4078 case ETHTOOL_SRXCLSRLINS: 4079 ret = i40e_add_fdir_ethtool(vsi, cmd); 4080 break; 4081 case ETHTOOL_SRXCLSRLDEL: 4082 ret = i40e_del_fdir_entry(vsi, cmd); 4083 break; 4084 default: 4085 break; 4086 } 4087 4088 return ret; 4089 } 4090 4091 /** 4092 * i40e_max_channels - get Max number of combined channels supported 4093 * @vsi: vsi pointer 4094 **/ 4095 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4096 { 4097 /* TODO: This code assumes DCB and FD is disabled for now. */ 4098 return vsi->alloc_queue_pairs; 4099 } 4100 4101 /** 4102 * i40e_get_channels - Get the current channels enabled and max supported etc. 4103 * @netdev: network interface device structure 4104 * @ch: ethtool channels structure 4105 * 4106 * We don't support separate tx and rx queues as channels. The other count 4107 * represents how many queues are being used for control. max_combined counts 4108 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4109 * q_vectors since we support a lot more queue pairs than q_vectors. 4110 **/ 4111 static void i40e_get_channels(struct net_device *dev, 4112 struct ethtool_channels *ch) 4113 { 4114 struct i40e_netdev_priv *np = netdev_priv(dev); 4115 struct i40e_vsi *vsi = np->vsi; 4116 struct i40e_pf *pf = vsi->back; 4117 4118 /* report maximum channels */ 4119 ch->max_combined = i40e_max_channels(vsi); 4120 4121 /* report info for other vector */ 4122 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4123 ch->max_other = ch->other_count; 4124 4125 /* Note: This code assumes DCB is disabled for now. */ 4126 ch->combined_count = vsi->num_queue_pairs; 4127 } 4128 4129 /** 4130 * i40e_set_channels - Set the new channels count. 4131 * @netdev: network interface device structure 4132 * @ch: ethtool channels structure 4133 * 4134 * The new channels count may not be the same as requested by the user 4135 * since it gets rounded down to a power of 2 value. 4136 **/ 4137 static int i40e_set_channels(struct net_device *dev, 4138 struct ethtool_channels *ch) 4139 { 4140 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4141 struct i40e_netdev_priv *np = netdev_priv(dev); 4142 unsigned int count = ch->combined_count; 4143 struct i40e_vsi *vsi = np->vsi; 4144 struct i40e_pf *pf = vsi->back; 4145 struct i40e_fdir_filter *rule; 4146 struct hlist_node *node2; 4147 int new_count; 4148 int err = 0; 4149 4150 /* We do not support setting channels for any other VSI at present */ 4151 if (vsi->type != I40E_VSI_MAIN) 4152 return -EINVAL; 4153 4154 /* We do not support setting channels via ethtool when TCs are 4155 * configured through mqprio 4156 */ 4157 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4158 return -EINVAL; 4159 4160 /* verify they are not requesting separate vectors */ 4161 if (!count || ch->rx_count || ch->tx_count) 4162 return -EINVAL; 4163 4164 /* verify other_count has not changed */ 4165 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4166 return -EINVAL; 4167 4168 /* verify the number of channels does not exceed hardware limits */ 4169 if (count > i40e_max_channels(vsi)) 4170 return -EINVAL; 4171 4172 /* verify that the number of channels does not invalidate any current 4173 * flow director rules 4174 */ 4175 hlist_for_each_entry_safe(rule, node2, 4176 &pf->fdir_filter_list, fdir_node) { 4177 if (rule->dest_ctl != drop && count <= rule->q_index) { 4178 dev_warn(&pf->pdev->dev, 4179 "Existing user defined filter %d assigns flow to queue %d\n", 4180 rule->fd_id, rule->q_index); 4181 err = -EINVAL; 4182 } 4183 } 4184 4185 if (err) { 4186 dev_err(&pf->pdev->dev, 4187 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4188 count); 4189 return err; 4190 } 4191 4192 /* update feature limits from largest to smallest supported values */ 4193 /* TODO: Flow director limit, DCB etc */ 4194 4195 /* use rss_reconfig to rebuild with new queue count and update traffic 4196 * class queue mapping 4197 */ 4198 new_count = i40e_reconfig_rss_queues(pf, count); 4199 if (new_count > 0) 4200 return 0; 4201 else 4202 return -EINVAL; 4203 } 4204 4205 /** 4206 * i40e_get_rxfh_key_size - get the RSS hash key size 4207 * @netdev: network interface device structure 4208 * 4209 * Returns the table size. 4210 **/ 4211 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4212 { 4213 return I40E_HKEY_ARRAY_SIZE; 4214 } 4215 4216 /** 4217 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4218 * @netdev: network interface device structure 4219 * 4220 * Returns the table size. 4221 **/ 4222 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4223 { 4224 return I40E_HLUT_ARRAY_SIZE; 4225 } 4226 4227 /** 4228 * i40e_get_rxfh - get the rx flow hash indirection table 4229 * @netdev: network interface device structure 4230 * @indir: indirection table 4231 * @key: hash key 4232 * @hfunc: hash function 4233 * 4234 * Reads the indirection table directly from the hardware. Returns 0 on 4235 * success. 4236 **/ 4237 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4238 u8 *hfunc) 4239 { 4240 struct i40e_netdev_priv *np = netdev_priv(netdev); 4241 struct i40e_vsi *vsi = np->vsi; 4242 u8 *lut, *seed = NULL; 4243 int ret; 4244 u16 i; 4245 4246 if (hfunc) 4247 *hfunc = ETH_RSS_HASH_TOP; 4248 4249 if (!indir) 4250 return 0; 4251 4252 seed = key; 4253 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4254 if (!lut) 4255 return -ENOMEM; 4256 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4257 if (ret) 4258 goto out; 4259 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4260 indir[i] = (u32)(lut[i]); 4261 4262 out: 4263 kfree(lut); 4264 4265 return ret; 4266 } 4267 4268 /** 4269 * i40e_set_rxfh - set the rx flow hash indirection table 4270 * @netdev: network interface device structure 4271 * @indir: indirection table 4272 * @key: hash key 4273 * 4274 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4275 * returns 0 after programming the table. 4276 **/ 4277 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4278 const u8 *key, const u8 hfunc) 4279 { 4280 struct i40e_netdev_priv *np = netdev_priv(netdev); 4281 struct i40e_vsi *vsi = np->vsi; 4282 struct i40e_pf *pf = vsi->back; 4283 u8 *seed = NULL; 4284 u16 i; 4285 4286 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4287 return -EOPNOTSUPP; 4288 4289 if (key) { 4290 if (!vsi->rss_hkey_user) { 4291 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4292 GFP_KERNEL); 4293 if (!vsi->rss_hkey_user) 4294 return -ENOMEM; 4295 } 4296 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4297 seed = vsi->rss_hkey_user; 4298 } 4299 if (!vsi->rss_lut_user) { 4300 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4301 if (!vsi->rss_lut_user) 4302 return -ENOMEM; 4303 } 4304 4305 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4306 if (indir) 4307 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4308 vsi->rss_lut_user[i] = (u8)(indir[i]); 4309 else 4310 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4311 vsi->rss_size); 4312 4313 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4314 I40E_HLUT_ARRAY_SIZE); 4315 } 4316 4317 /** 4318 * i40e_get_priv_flags - report device private flags 4319 * @dev: network interface device structure 4320 * 4321 * The get string set count and the string set should be matched for each 4322 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4323 * array. 4324 * 4325 * Returns a u32 bitmap of flags. 4326 **/ 4327 static u32 i40e_get_priv_flags(struct net_device *dev) 4328 { 4329 struct i40e_netdev_priv *np = netdev_priv(dev); 4330 struct i40e_vsi *vsi = np->vsi; 4331 struct i40e_pf *pf = vsi->back; 4332 u32 i, j, ret_flags = 0; 4333 4334 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4335 const struct i40e_priv_flags *priv_flags; 4336 4337 priv_flags = &i40e_gstrings_priv_flags[i]; 4338 4339 if (priv_flags->flag & pf->flags) 4340 ret_flags |= BIT(i); 4341 } 4342 4343 if (pf->hw.pf_id != 0) 4344 return ret_flags; 4345 4346 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4347 const struct i40e_priv_flags *priv_flags; 4348 4349 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4350 4351 if (priv_flags->flag & pf->flags) 4352 ret_flags |= BIT(i + j); 4353 } 4354 4355 return ret_flags; 4356 } 4357 4358 /** 4359 * i40e_set_priv_flags - set private flags 4360 * @dev: network interface device structure 4361 * @flags: bit flags to be set 4362 **/ 4363 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4364 { 4365 struct i40e_netdev_priv *np = netdev_priv(dev); 4366 struct i40e_vsi *vsi = np->vsi; 4367 struct i40e_pf *pf = vsi->back; 4368 u64 orig_flags, new_flags, changed_flags; 4369 u32 i, j; 4370 4371 orig_flags = READ_ONCE(pf->flags); 4372 new_flags = orig_flags; 4373 4374 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4375 const struct i40e_priv_flags *priv_flags; 4376 4377 priv_flags = &i40e_gstrings_priv_flags[i]; 4378 4379 if (flags & BIT(i)) 4380 new_flags |= priv_flags->flag; 4381 else 4382 new_flags &= ~(priv_flags->flag); 4383 4384 /* If this is a read-only flag, it can't be changed */ 4385 if (priv_flags->read_only && 4386 ((orig_flags ^ new_flags) & ~BIT(i))) 4387 return -EOPNOTSUPP; 4388 } 4389 4390 if (pf->hw.pf_id != 0) 4391 goto flags_complete; 4392 4393 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4394 const struct i40e_priv_flags *priv_flags; 4395 4396 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4397 4398 if (flags & BIT(i + j)) 4399 new_flags |= priv_flags->flag; 4400 else 4401 new_flags &= ~(priv_flags->flag); 4402 4403 /* If this is a read-only flag, it can't be changed */ 4404 if (priv_flags->read_only && 4405 ((orig_flags ^ new_flags) & ~BIT(i))) 4406 return -EOPNOTSUPP; 4407 } 4408 4409 flags_complete: 4410 changed_flags = orig_flags ^ new_flags; 4411 4412 /* Before we finalize any flag changes, we need to perform some 4413 * checks to ensure that the changes are supported and safe. 4414 */ 4415 4416 /* ATR eviction is not supported on all devices */ 4417 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4418 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4419 return -EOPNOTSUPP; 4420 4421 /* If the driver detected FW LLDP was disabled on init, this flag could 4422 * be set, however we do not support _changing_ the flag if NPAR is 4423 * enabled or FW API version < 1.7. There are situations where older 4424 * FW versions/NPAR enabled PFs could disable LLDP, however we _must_ 4425 * not allow the user to enable/disable LLDP with this flag on 4426 * unsupported FW versions. 4427 */ 4428 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4429 if (!(pf->hw_features & I40E_HW_STOPPABLE_FW_LLDP)) { 4430 dev_warn(&pf->pdev->dev, 4431 "Device does not support changing FW LLDP\n"); 4432 return -EOPNOTSUPP; 4433 } 4434 } 4435 4436 /* Compare and exchange the new flags into place. If we failed, that 4437 * is if cmpxchg returns anything but the old value, this means that 4438 * something else has modified the flags variable since we copied it 4439 * originally. We'll just punt with an error and log something in the 4440 * message buffer. 4441 * 4442 * This is the point of no return for this function. We need to have 4443 * checked any discrepancies or misconfigurations and returned 4444 * EOPNOTSUPP before updating pf->flags here. 4445 */ 4446 if (cmpxchg64(&pf->flags, orig_flags, new_flags) != orig_flags) { 4447 dev_warn(&pf->pdev->dev, 4448 "Unable to update pf->flags as it was modified by another thread...\n"); 4449 return -EAGAIN; 4450 } 4451 4452 /* Process any additional changes needed as a result of flag changes. 4453 * The changed_flags value reflects the list of bits that were 4454 * changed in the code above. 4455 */ 4456 4457 /* Flush current ATR settings if ATR was disabled */ 4458 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4459 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4460 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED; 4461 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4462 } 4463 4464 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4465 u16 sw_flags = 0, valid_flags = 0; 4466 int ret; 4467 4468 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4469 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4470 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4471 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4472 0, NULL); 4473 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4474 dev_info(&pf->pdev->dev, 4475 "couldn't set switch config bits, err %s aq_err %s\n", 4476 i40e_stat_str(&pf->hw, ret), 4477 i40e_aq_str(&pf->hw, 4478 pf->hw.aq.asq_last_status)); 4479 /* not a fatal problem, just keep going */ 4480 } 4481 } 4482 4483 if ((changed_flags & pf->flags & 4484 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4485 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4486 dev_warn(&pf->pdev->dev, 4487 "Turning on link-down-on-close flag may affect other partitions\n"); 4488 4489 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4490 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4491 struct i40e_dcbx_config *dcbcfg; 4492 int i; 4493 4494 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4495 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4496 /* reset local_dcbx_config to default */ 4497 dcbcfg = &pf->hw.local_dcbx_config; 4498 dcbcfg->etscfg.willing = 1; 4499 dcbcfg->etscfg.maxtcs = 0; 4500 dcbcfg->etscfg.tcbwtable[0] = 100; 4501 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4502 dcbcfg->etscfg.tcbwtable[i] = 0; 4503 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4504 dcbcfg->etscfg.prioritytable[i] = 0; 4505 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4506 dcbcfg->pfc.willing = 1; 4507 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4508 } else { 4509 i40e_aq_start_lldp(&pf->hw, NULL); 4510 } 4511 } 4512 4513 /* Issue reset to cause things to take effect, as additional bits 4514 * are added we will need to create a mask of bits requiring reset 4515 */ 4516 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4517 I40E_FLAG_LEGACY_RX | 4518 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4519 I40E_FLAG_DISABLE_FW_LLDP)) 4520 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4521 4522 return 0; 4523 } 4524 4525 /** 4526 * i40e_get_module_info - get (Q)SFP+ module type info 4527 * @netdev: network interface device structure 4528 * @modinfo: module EEPROM size and layout information structure 4529 **/ 4530 static int i40e_get_module_info(struct net_device *netdev, 4531 struct ethtool_modinfo *modinfo) 4532 { 4533 struct i40e_netdev_priv *np = netdev_priv(netdev); 4534 struct i40e_vsi *vsi = np->vsi; 4535 struct i40e_pf *pf = vsi->back; 4536 struct i40e_hw *hw = &pf->hw; 4537 u32 sff8472_comp = 0; 4538 u32 sff8472_swap = 0; 4539 u32 sff8636_rev = 0; 4540 i40e_status status; 4541 u32 type = 0; 4542 4543 /* Check if firmware supports reading module EEPROM. */ 4544 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4545 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4546 return -EINVAL; 4547 } 4548 4549 status = i40e_update_link_info(hw); 4550 if (status) 4551 return -EIO; 4552 4553 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4554 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4555 return -EINVAL; 4556 } 4557 4558 type = hw->phy.link_info.module_type[0]; 4559 4560 switch (type) { 4561 case I40E_MODULE_TYPE_SFP: 4562 status = i40e_aq_get_phy_register(hw, 4563 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4564 I40E_I2C_EEPROM_DEV_ADDR, 4565 I40E_MODULE_SFF_8472_COMP, 4566 &sff8472_comp, NULL); 4567 if (status) 4568 return -EIO; 4569 4570 status = i40e_aq_get_phy_register(hw, 4571 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4572 I40E_I2C_EEPROM_DEV_ADDR, 4573 I40E_MODULE_SFF_8472_SWAP, 4574 &sff8472_swap, NULL); 4575 if (status) 4576 return -EIO; 4577 4578 /* Check if the module requires address swap to access 4579 * the other EEPROM memory page. 4580 */ 4581 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4582 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4583 modinfo->type = ETH_MODULE_SFF_8079; 4584 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4585 } else if (sff8472_comp == 0x00) { 4586 /* Module is not SFF-8472 compliant */ 4587 modinfo->type = ETH_MODULE_SFF_8079; 4588 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4589 } else { 4590 modinfo->type = ETH_MODULE_SFF_8472; 4591 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4592 } 4593 break; 4594 case I40E_MODULE_TYPE_QSFP_PLUS: 4595 /* Read from memory page 0. */ 4596 status = i40e_aq_get_phy_register(hw, 4597 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4598 0, 4599 I40E_MODULE_REVISION_ADDR, 4600 &sff8636_rev, NULL); 4601 if (status) 4602 return -EIO; 4603 /* Determine revision compliance byte */ 4604 if (sff8636_rev > 0x02) { 4605 /* Module is SFF-8636 compliant */ 4606 modinfo->type = ETH_MODULE_SFF_8636; 4607 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4608 } else { 4609 modinfo->type = ETH_MODULE_SFF_8436; 4610 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4611 } 4612 break; 4613 case I40E_MODULE_TYPE_QSFP28: 4614 modinfo->type = ETH_MODULE_SFF_8636; 4615 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4616 break; 4617 default: 4618 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4619 return -EINVAL; 4620 } 4621 return 0; 4622 } 4623 4624 /** 4625 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4626 * @netdev: network interface device structure 4627 * @ee: EEPROM dump request structure 4628 * @data: buffer to be filled with EEPROM contents 4629 **/ 4630 static int i40e_get_module_eeprom(struct net_device *netdev, 4631 struct ethtool_eeprom *ee, 4632 u8 *data) 4633 { 4634 struct i40e_netdev_priv *np = netdev_priv(netdev); 4635 struct i40e_vsi *vsi = np->vsi; 4636 struct i40e_pf *pf = vsi->back; 4637 struct i40e_hw *hw = &pf->hw; 4638 bool is_sfp = false; 4639 i40e_status status; 4640 u32 value = 0; 4641 int i; 4642 4643 if (!ee || !ee->len || !data) 4644 return -EINVAL; 4645 4646 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4647 is_sfp = true; 4648 4649 for (i = 0; i < ee->len; i++) { 4650 u32 offset = i + ee->offset; 4651 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4652 4653 /* Check if we need to access the other memory page */ 4654 if (is_sfp) { 4655 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4656 offset -= ETH_MODULE_SFF_8079_LEN; 4657 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4658 } 4659 } else { 4660 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4661 /* Compute memory page number and offset. */ 4662 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4663 addr++; 4664 } 4665 } 4666 4667 status = i40e_aq_get_phy_register(hw, 4668 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4669 addr, offset, &value, NULL); 4670 if (status) 4671 return -EIO; 4672 data[i] = value; 4673 } 4674 return 0; 4675 } 4676 4677 static const struct ethtool_ops i40e_ethtool_ops = { 4678 .get_drvinfo = i40e_get_drvinfo, 4679 .get_regs_len = i40e_get_regs_len, 4680 .get_regs = i40e_get_regs, 4681 .nway_reset = i40e_nway_reset, 4682 .get_link = ethtool_op_get_link, 4683 .get_wol = i40e_get_wol, 4684 .set_wol = i40e_set_wol, 4685 .set_eeprom = i40e_set_eeprom, 4686 .get_eeprom_len = i40e_get_eeprom_len, 4687 .get_eeprom = i40e_get_eeprom, 4688 .get_ringparam = i40e_get_ringparam, 4689 .set_ringparam = i40e_set_ringparam, 4690 .get_pauseparam = i40e_get_pauseparam, 4691 .set_pauseparam = i40e_set_pauseparam, 4692 .get_msglevel = i40e_get_msglevel, 4693 .set_msglevel = i40e_set_msglevel, 4694 .get_rxnfc = i40e_get_rxnfc, 4695 .set_rxnfc = i40e_set_rxnfc, 4696 .self_test = i40e_diag_test, 4697 .get_strings = i40e_get_strings, 4698 .set_phys_id = i40e_set_phys_id, 4699 .get_sset_count = i40e_get_sset_count, 4700 .get_ethtool_stats = i40e_get_ethtool_stats, 4701 .get_coalesce = i40e_get_coalesce, 4702 .set_coalesce = i40e_set_coalesce, 4703 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4704 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4705 .get_rxfh = i40e_get_rxfh, 4706 .set_rxfh = i40e_set_rxfh, 4707 .get_channels = i40e_get_channels, 4708 .set_channels = i40e_set_channels, 4709 .get_module_info = i40e_get_module_info, 4710 .get_module_eeprom = i40e_get_module_eeprom, 4711 .get_ts_info = i40e_get_ts_info, 4712 .get_priv_flags = i40e_get_priv_flags, 4713 .set_priv_flags = i40e_set_priv_flags, 4714 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4715 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4716 .get_link_ksettings = i40e_get_link_ksettings, 4717 .set_link_ksettings = i40e_set_link_ksettings, 4718 }; 4719 4720 void i40e_set_ethtool_ops(struct net_device *netdev) 4721 { 4722 netdev->ethtool_ops = &i40e_ethtool_ops; 4723 } 4724