1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
3 
4 /* ethtool support for i40e */
5 
6 #include "i40e.h"
7 #include "i40e_diag.h"
8 #include "i40e_txrx_common.h"
9 
10 /* ethtool statistics helpers */
11 
12 /**
13  * struct i40e_stats - definition for an ethtool statistic
14  * @stat_string: statistic name to display in ethtool -S output
15  * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64)
16  * @stat_offset: offsetof() the stat from a base pointer
17  *
18  * This structure defines a statistic to be added to the ethtool stats buffer.
19  * It defines a statistic as offset from a common base pointer. Stats should
20  * be defined in constant arrays using the I40E_STAT macro, with every element
21  * of the array using the same _type for calculating the sizeof_stat and
22  * stat_offset.
23  *
24  * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or
25  * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from
26  * the i40e_add_ethtool_stat() helper function.
27  *
28  * The @stat_string is interpreted as a format string, allowing formatted
29  * values to be inserted while looping over multiple structures for a given
30  * statistics array. Thus, every statistic string in an array should have the
31  * same type and number of format specifiers, to be formatted by variadic
32  * arguments to the i40e_add_stat_string() helper function.
33  **/
34 struct i40e_stats {
35 	char stat_string[ETH_GSTRING_LEN];
36 	int sizeof_stat;
37 	int stat_offset;
38 };
39 
40 /* Helper macro to define an i40e_stat structure with proper size and type.
41  * Use this when defining constant statistics arrays. Note that @_type expects
42  * only a type name and is used multiple times.
43  */
44 #define I40E_STAT(_type, _name, _stat) { \
45 	.stat_string = _name, \
46 	.sizeof_stat = sizeof_field(_type, _stat), \
47 	.stat_offset = offsetof(_type, _stat) \
48 }
49 
50 /* Helper macro for defining some statistics directly copied from the netdev
51  * stats structure.
52  */
53 #define I40E_NETDEV_STAT(_net_stat) \
54 	I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
55 
56 /* Helper macro for defining some statistics related to queues */
57 #define I40E_QUEUE_STAT(_name, _stat) \
58 	I40E_STAT(struct i40e_ring, _name, _stat)
59 
60 /* Stats associated with a Tx or Rx ring */
61 static const struct i40e_stats i40e_gstrings_queue_stats[] = {
62 	I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
63 	I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
64 };
65 
66 /**
67  * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
68  * @data: location to store the stat value
69  * @pointer: basis for where to copy from
70  * @stat: the stat definition
71  *
72  * Copies the stat data defined by the pointer and stat structure pair into
73  * the memory supplied as data. Used to implement i40e_add_ethtool_stats and
74  * i40e_add_queue_stats. If the pointer is null, data will be zero'd.
75  */
76 static void
77 i40e_add_one_ethtool_stat(u64 *data, void *pointer,
78 			  const struct i40e_stats *stat)
79 {
80 	char *p;
81 
82 	if (!pointer) {
83 		/* ensure that the ethtool data buffer is zero'd for any stats
84 		 * which don't have a valid pointer.
85 		 */
86 		*data = 0;
87 		return;
88 	}
89 
90 	p = (char *)pointer + stat->stat_offset;
91 	switch (stat->sizeof_stat) {
92 	case sizeof(u64):
93 		*data = *((u64 *)p);
94 		break;
95 	case sizeof(u32):
96 		*data = *((u32 *)p);
97 		break;
98 	case sizeof(u16):
99 		*data = *((u16 *)p);
100 		break;
101 	case sizeof(u8):
102 		*data = *((u8 *)p);
103 		break;
104 	default:
105 		WARN_ONCE(1, "unexpected stat size for %s",
106 			  stat->stat_string);
107 		*data = 0;
108 	}
109 }
110 
111 /**
112  * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer
113  * @data: ethtool stats buffer
114  * @pointer: location to copy stats from
115  * @stats: array of stats to copy
116  * @size: the size of the stats definition
117  *
118  * Copy the stats defined by the stats array using the pointer as a base into
119  * the data buffer supplied by ethtool. Updates the data pointer to point to
120  * the next empty location for successive calls to __i40e_add_ethtool_stats.
121  * If pointer is null, set the data values to zero and update the pointer to
122  * skip these stats.
123  **/
124 static void
125 __i40e_add_ethtool_stats(u64 **data, void *pointer,
126 			 const struct i40e_stats stats[],
127 			 const unsigned int size)
128 {
129 	unsigned int i;
130 
131 	for (i = 0; i < size; i++)
132 		i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]);
133 }
134 
135 /**
136  * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer
137  * @data: ethtool stats buffer
138  * @pointer: location where stats are stored
139  * @stats: static const array of stat definitions
140  *
141  * Macro to ease the use of __i40e_add_ethtool_stats by taking a static
142  * constant stats array and passing the ARRAY_SIZE(). This avoids typos by
143  * ensuring that we pass the size associated with the given stats array.
144  *
145  * The parameter @stats is evaluated twice, so parameters with side effects
146  * should be avoided.
147  **/
148 #define i40e_add_ethtool_stats(data, pointer, stats) \
149 	__i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats))
150 
151 /**
152  * i40e_add_queue_stats - copy queue statistics into supplied buffer
153  * @data: ethtool stats buffer
154  * @ring: the ring to copy
155  *
156  * Queue statistics must be copied while protected by
157  * u64_stats_fetch_begin, so we can't directly use i40e_add_ethtool_stats.
158  * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the
159  * ring pointer is null, zero out the queue stat values and update the data
160  * pointer. Otherwise safely copy the stats from the ring into the supplied
161  * buffer and update the data pointer when finished.
162  *
163  * This function expects to be called while under rcu_read_lock().
164  **/
165 static void
166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring)
167 {
168 	const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats);
169 	const struct i40e_stats *stats = i40e_gstrings_queue_stats;
170 	unsigned int start;
171 	unsigned int i;
172 
173 	/* To avoid invalid statistics values, ensure that we keep retrying
174 	 * the copy until we get a consistent value according to
175 	 * u64_stats_fetch_retry. But first, make sure our ring is
176 	 * non-null before attempting to access its syncp.
177 	 */
178 	do {
179 		start = !ring ? 0 : u64_stats_fetch_begin(&ring->syncp);
180 		for (i = 0; i < size; i++) {
181 			i40e_add_one_ethtool_stat(&(*data)[i], ring,
182 						  &stats[i]);
183 		}
184 	} while (ring && u64_stats_fetch_retry(&ring->syncp, start));
185 
186 	/* Once we successfully copy the stats in, update the data pointer */
187 	*data += size;
188 }
189 
190 /**
191  * __i40e_add_stat_strings - copy stat strings into ethtool buffer
192  * @p: ethtool supplied buffer
193  * @stats: stat definitions array
194  * @size: size of the stats array
195  *
196  * Format and copy the strings described by stats into the buffer pointed at
197  * by p.
198  **/
199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[],
200 				    const unsigned int size, ...)
201 {
202 	unsigned int i;
203 
204 	for (i = 0; i < size; i++) {
205 		va_list args;
206 
207 		va_start(args, size);
208 		vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args);
209 		*p += ETH_GSTRING_LEN;
210 		va_end(args);
211 	}
212 }
213 
214 /**
215  * i40e_add_stat_strings - copy stat strings into ethtool buffer
216  * @p: ethtool supplied buffer
217  * @stats: stat definitions array
218  *
219  * Format and copy the strings described by the const static stats value into
220  * the buffer pointed at by p.
221  *
222  * The parameter @stats is evaluated twice, so parameters with side effects
223  * should be avoided. Additionally, stats must be an array such that
224  * ARRAY_SIZE can be called on it.
225  **/
226 #define i40e_add_stat_strings(p, stats, ...) \
227 	__i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__)
228 
229 #define I40E_PF_STAT(_name, _stat) \
230 	I40E_STAT(struct i40e_pf, _name, _stat)
231 #define I40E_VSI_STAT(_name, _stat) \
232 	I40E_STAT(struct i40e_vsi, _name, _stat)
233 #define I40E_VEB_STAT(_name, _stat) \
234 	I40E_STAT(struct i40e_veb, _name, _stat)
235 #define I40E_VEB_TC_STAT(_name, _stat) \
236 	I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat)
237 #define I40E_PFC_STAT(_name, _stat) \
238 	I40E_STAT(struct i40e_pfc_stats, _name, _stat)
239 
240 static const struct i40e_stats i40e_gstrings_net_stats[] = {
241 	I40E_NETDEV_STAT(rx_packets),
242 	I40E_NETDEV_STAT(tx_packets),
243 	I40E_NETDEV_STAT(rx_bytes),
244 	I40E_NETDEV_STAT(tx_bytes),
245 	I40E_NETDEV_STAT(rx_errors),
246 	I40E_NETDEV_STAT(tx_errors),
247 	I40E_NETDEV_STAT(rx_dropped),
248 	I40E_NETDEV_STAT(tx_dropped),
249 	I40E_NETDEV_STAT(collisions),
250 	I40E_NETDEV_STAT(rx_length_errors),
251 	I40E_NETDEV_STAT(rx_crc_errors),
252 };
253 
254 static const struct i40e_stats i40e_gstrings_veb_stats[] = {
255 	I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes),
256 	I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes),
257 	I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast),
258 	I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast),
259 	I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast),
260 	I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast),
261 	I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast),
262 	I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast),
263 	I40E_VEB_STAT("veb.rx_discards", stats.rx_discards),
264 	I40E_VEB_STAT("veb.tx_discards", stats.tx_discards),
265 	I40E_VEB_STAT("veb.tx_errors", stats.tx_errors),
266 	I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol),
267 };
268 
269 struct i40e_cp_veb_tc_stats {
270 	u64 tc_rx_packets;
271 	u64 tc_rx_bytes;
272 	u64 tc_tx_packets;
273 	u64 tc_tx_bytes;
274 };
275 
276 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = {
277 	I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets),
278 	I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes),
279 	I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets),
280 	I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes),
281 };
282 
283 static const struct i40e_stats i40e_gstrings_misc_stats[] = {
284 	I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
285 	I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
286 	I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
287 	I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
288 	I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
289 	I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
290 	I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
291 	I40E_VSI_STAT("tx_linearize", tx_linearize),
292 	I40E_VSI_STAT("tx_force_wb", tx_force_wb),
293 	I40E_VSI_STAT("tx_busy", tx_busy),
294 	I40E_VSI_STAT("tx_stopped", tx_stopped),
295 	I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
296 	I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
297 	I40E_VSI_STAT("rx_cache_reuse", rx_page_reuse),
298 	I40E_VSI_STAT("rx_cache_alloc", rx_page_alloc),
299 	I40E_VSI_STAT("rx_cache_waive", rx_page_waive),
300 	I40E_VSI_STAT("rx_cache_busy", rx_page_busy),
301 	I40E_VSI_STAT("tx_restart", tx_restart),
302 };
303 
304 /* These PF_STATs might look like duplicates of some NETDEV_STATs,
305  * but they are separate.  This device supports Virtualization, and
306  * as such might have several netdevs supporting VMDq and FCoE going
307  * through a single port.  The NETDEV_STATs are for individual netdevs
308  * seen at the top of the stack, and the PF_STATs are for the physical
309  * function at the bottom of the stack hosting those netdevs.
310  *
311  * The PF_STATs are appended to the netdev stats only when ethtool -S
312  * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
313  */
314 static const struct i40e_stats i40e_gstrings_stats[] = {
315 	I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes),
316 	I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes),
317 	I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast),
318 	I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast),
319 	I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast),
320 	I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast),
321 	I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
322 	I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
323 	I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
324 	I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards),
325 	I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
326 	I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
327 	I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),
328 	I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults),
329 	I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults),
330 	I40E_PF_STAT("port.tx_timeout", tx_timeout_count),
331 	I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error),
332 	I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors),
333 	I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx),
334 	I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx),
335 	I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx),
336 	I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx),
337 	I40E_PF_STAT("port.rx_size_64", stats.rx_size_64),
338 	I40E_PF_STAT("port.rx_size_127", stats.rx_size_127),
339 	I40E_PF_STAT("port.rx_size_255", stats.rx_size_255),
340 	I40E_PF_STAT("port.rx_size_511", stats.rx_size_511),
341 	I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023),
342 	I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522),
343 	I40E_PF_STAT("port.rx_size_big", stats.rx_size_big),
344 	I40E_PF_STAT("port.tx_size_64", stats.tx_size_64),
345 	I40E_PF_STAT("port.tx_size_127", stats.tx_size_127),
346 	I40E_PF_STAT("port.tx_size_255", stats.tx_size_255),
347 	I40E_PF_STAT("port.tx_size_511", stats.tx_size_511),
348 	I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023),
349 	I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522),
350 	I40E_PF_STAT("port.tx_size_big", stats.tx_size_big),
351 	I40E_PF_STAT("port.rx_undersize", stats.rx_undersize),
352 	I40E_PF_STAT("port.rx_fragments", stats.rx_fragments),
353 	I40E_PF_STAT("port.rx_oversize", stats.rx_oversize),
354 	I40E_PF_STAT("port.rx_jabber", stats.rx_jabber),
355 	I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests),
356 	I40E_PF_STAT("port.arq_overflows", arq_overflows),
357 	I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
358 	I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared),
359 	I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped),
360 	I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt),
361 	I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match),
362 	I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
363 	I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status),
364 	I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match),
365 	I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status),
366 
367 	/* LPI stats */
368 	I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status),
369 	I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status),
370 	I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count),
371 	I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count),
372 };
373 
374 struct i40e_pfc_stats {
375 	u64 priority_xon_rx;
376 	u64 priority_xoff_rx;
377 	u64 priority_xon_tx;
378 	u64 priority_xoff_tx;
379 	u64 priority_xon_2_xoff;
380 };
381 
382 static const struct i40e_stats i40e_gstrings_pfc_stats[] = {
383 	I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx),
384 	I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx),
385 	I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx),
386 	I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx),
387 	I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff),
388 };
389 
390 #define I40E_NETDEV_STATS_LEN	ARRAY_SIZE(i40e_gstrings_net_stats)
391 
392 #define I40E_MISC_STATS_LEN	ARRAY_SIZE(i40e_gstrings_misc_stats)
393 
394 #define I40E_VSI_STATS_LEN	(I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN)
395 
396 #define I40E_PFC_STATS_LEN	(ARRAY_SIZE(i40e_gstrings_pfc_stats) * \
397 				 I40E_MAX_USER_PRIORITY)
398 
399 #define I40E_VEB_STATS_LEN	(ARRAY_SIZE(i40e_gstrings_veb_stats) + \
400 				 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \
401 				  I40E_MAX_TRAFFIC_CLASS))
402 
403 #define I40E_GLOBAL_STATS_LEN	ARRAY_SIZE(i40e_gstrings_stats)
404 
405 #define I40E_PF_STATS_LEN	(I40E_GLOBAL_STATS_LEN + \
406 				 I40E_PFC_STATS_LEN + \
407 				 I40E_VEB_STATS_LEN + \
408 				 I40E_VSI_STATS_LEN)
409 
410 /* Length of stats for a single queue */
411 #define I40E_QUEUE_STATS_LEN	ARRAY_SIZE(i40e_gstrings_queue_stats)
412 
413 enum i40e_ethtool_test_id {
414 	I40E_ETH_TEST_REG = 0,
415 	I40E_ETH_TEST_EEPROM,
416 	I40E_ETH_TEST_INTR,
417 	I40E_ETH_TEST_LINK,
418 };
419 
420 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
421 	"Register test  (offline)",
422 	"Eeprom test    (offline)",
423 	"Interrupt test (offline)",
424 	"Link test   (on/offline)"
425 };
426 
427 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
428 
429 struct i40e_priv_flags {
430 	char flag_string[ETH_GSTRING_LEN];
431 	u64 flag;
432 	bool read_only;
433 };
434 
435 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
436 	.flag_string = _name, \
437 	.flag = _flag, \
438 	.read_only = _read_only, \
439 }
440 
441 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
442 	/* NOTE: MFP setting cannot be changed */
443 	I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
444 	I40E_PRIV_FLAG("total-port-shutdown",
445 		       I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED, 1),
446 	I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
447 	I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
448 	I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
449 	I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
450 	I40E_PRIV_FLAG("link-down-on-close",
451 		       I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
452 	I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
453 	I40E_PRIV_FLAG("disable-source-pruning",
454 		       I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
455 	I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0),
456 	I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0),
457 	I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),
458 	I40E_PRIV_FLAG("vf-vlan-pruning",
459 		       I40E_FLAG_VF_VLAN_PRUNING, 0),
460 };
461 
462 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
463 
464 /* Private flags with a global effect, restricted to PF 0 */
465 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
466 	I40E_PRIV_FLAG("vf-true-promisc-support",
467 		       I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
468 };
469 
470 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
471 
472 /**
473  * i40e_partition_setting_complaint - generic complaint for MFP restriction
474  * @pf: the PF struct
475  **/
476 static void i40e_partition_setting_complaint(struct i40e_pf *pf)
477 {
478 	dev_info(&pf->pdev->dev,
479 		 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
480 }
481 
482 /**
483  * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
484  * @pf: PF struct with phy_types
485  * @ks: ethtool link ksettings struct to fill out
486  *
487  **/
488 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
489 				     struct ethtool_link_ksettings *ks)
490 {
491 	struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
492 	u64 phy_types = pf->hw.phy.phy_types;
493 
494 	ethtool_link_ksettings_zero_link_mode(ks, supported);
495 	ethtool_link_ksettings_zero_link_mode(ks, advertising);
496 
497 	if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
498 		ethtool_link_ksettings_add_link_mode(ks, supported,
499 						     1000baseT_Full);
500 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
501 			ethtool_link_ksettings_add_link_mode(ks, advertising,
502 							     1000baseT_Full);
503 		if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
504 			ethtool_link_ksettings_add_link_mode(ks, supported,
505 							     100baseT_Full);
506 			ethtool_link_ksettings_add_link_mode(ks, advertising,
507 							     100baseT_Full);
508 		}
509 	}
510 	if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
511 	    phy_types & I40E_CAP_PHY_TYPE_XFI ||
512 	    phy_types & I40E_CAP_PHY_TYPE_SFI ||
513 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
514 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
515 		ethtool_link_ksettings_add_link_mode(ks, supported,
516 						     10000baseT_Full);
517 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
518 			ethtool_link_ksettings_add_link_mode(ks, advertising,
519 							     10000baseT_Full);
520 	}
521 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
522 		ethtool_link_ksettings_add_link_mode(ks, supported,
523 						     10000baseT_Full);
524 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
525 			ethtool_link_ksettings_add_link_mode(ks, advertising,
526 							     10000baseT_Full);
527 	}
528 	if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) {
529 		ethtool_link_ksettings_add_link_mode(ks, supported,
530 						     2500baseT_Full);
531 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
532 			ethtool_link_ksettings_add_link_mode(ks, advertising,
533 							     2500baseT_Full);
534 	}
535 	if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) {
536 		ethtool_link_ksettings_add_link_mode(ks, supported,
537 						     5000baseT_Full);
538 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
539 			ethtool_link_ksettings_add_link_mode(ks, advertising,
540 							     5000baseT_Full);
541 	}
542 	if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
543 	    phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
544 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
545 		ethtool_link_ksettings_add_link_mode(ks, supported,
546 						     40000baseCR4_Full);
547 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
548 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
549 		ethtool_link_ksettings_add_link_mode(ks, supported,
550 						     40000baseCR4_Full);
551 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
552 			ethtool_link_ksettings_add_link_mode(ks, advertising,
553 							     40000baseCR4_Full);
554 	}
555 	if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
556 		ethtool_link_ksettings_add_link_mode(ks, supported,
557 						     100baseT_Full);
558 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
559 			ethtool_link_ksettings_add_link_mode(ks, advertising,
560 							     100baseT_Full);
561 	}
562 	if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
563 		ethtool_link_ksettings_add_link_mode(ks, supported,
564 						     1000baseT_Full);
565 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
566 			ethtool_link_ksettings_add_link_mode(ks, advertising,
567 							     1000baseT_Full);
568 	}
569 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) {
570 		ethtool_link_ksettings_add_link_mode(ks, supported,
571 						     40000baseSR4_Full);
572 		ethtool_link_ksettings_add_link_mode(ks, advertising,
573 						     40000baseSR4_Full);
574 	}
575 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) {
576 		ethtool_link_ksettings_add_link_mode(ks, supported,
577 						     40000baseLR4_Full);
578 		ethtool_link_ksettings_add_link_mode(ks, advertising,
579 						     40000baseLR4_Full);
580 	}
581 	if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
582 		ethtool_link_ksettings_add_link_mode(ks, supported,
583 						     40000baseKR4_Full);
584 		ethtool_link_ksettings_add_link_mode(ks, advertising,
585 						     40000baseKR4_Full);
586 	}
587 	if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
588 		ethtool_link_ksettings_add_link_mode(ks, supported,
589 						     20000baseKR2_Full);
590 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
591 			ethtool_link_ksettings_add_link_mode(ks, advertising,
592 							     20000baseKR2_Full);
593 	}
594 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
595 		ethtool_link_ksettings_add_link_mode(ks, supported,
596 						     10000baseKX4_Full);
597 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
598 			ethtool_link_ksettings_add_link_mode(ks, advertising,
599 							     10000baseKX4_Full);
600 	}
601 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
602 	    !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
603 		ethtool_link_ksettings_add_link_mode(ks, supported,
604 						     10000baseKR_Full);
605 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
606 			ethtool_link_ksettings_add_link_mode(ks, advertising,
607 							     10000baseKR_Full);
608 	}
609 	if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
610 	    !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
611 		ethtool_link_ksettings_add_link_mode(ks, supported,
612 						     1000baseKX_Full);
613 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
614 			ethtool_link_ksettings_add_link_mode(ks, advertising,
615 							     1000baseKX_Full);
616 	}
617 	/* need to add 25G PHY types */
618 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
619 		ethtool_link_ksettings_add_link_mode(ks, supported,
620 						     25000baseKR_Full);
621 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
622 			ethtool_link_ksettings_add_link_mode(ks, advertising,
623 							     25000baseKR_Full);
624 	}
625 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
626 		ethtool_link_ksettings_add_link_mode(ks, supported,
627 						     25000baseCR_Full);
628 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
629 			ethtool_link_ksettings_add_link_mode(ks, advertising,
630 							     25000baseCR_Full);
631 	}
632 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
633 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
634 		ethtool_link_ksettings_add_link_mode(ks, supported,
635 						     25000baseSR_Full);
636 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
637 			ethtool_link_ksettings_add_link_mode(ks, advertising,
638 							     25000baseSR_Full);
639 	}
640 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
641 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
642 		ethtool_link_ksettings_add_link_mode(ks, supported,
643 						     25000baseCR_Full);
644 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
645 			ethtool_link_ksettings_add_link_mode(ks, advertising,
646 							     25000baseCR_Full);
647 	}
648 	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
649 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
650 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
651 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
652 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
653 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
654 		ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
655 		ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
656 		ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
657 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) {
658 			ethtool_link_ksettings_add_link_mode(ks, advertising,
659 							     FEC_NONE);
660 			ethtool_link_ksettings_add_link_mode(ks, advertising,
661 							     FEC_RS);
662 			ethtool_link_ksettings_add_link_mode(ks, advertising,
663 							     FEC_BASER);
664 		}
665 	}
666 	/* need to add new 10G PHY types */
667 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
668 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
669 		ethtool_link_ksettings_add_link_mode(ks, supported,
670 						     10000baseCR_Full);
671 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
672 			ethtool_link_ksettings_add_link_mode(ks, advertising,
673 							     10000baseCR_Full);
674 	}
675 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
676 		ethtool_link_ksettings_add_link_mode(ks, supported,
677 						     10000baseSR_Full);
678 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
679 			ethtool_link_ksettings_add_link_mode(ks, advertising,
680 							     10000baseSR_Full);
681 	}
682 	if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
683 		ethtool_link_ksettings_add_link_mode(ks, supported,
684 						     10000baseLR_Full);
685 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
686 			ethtool_link_ksettings_add_link_mode(ks, advertising,
687 							     10000baseLR_Full);
688 	}
689 	if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
690 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
691 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
692 		ethtool_link_ksettings_add_link_mode(ks, supported,
693 						     1000baseX_Full);
694 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
695 			ethtool_link_ksettings_add_link_mode(ks, advertising,
696 							     1000baseX_Full);
697 	}
698 	/* Autoneg PHY types */
699 	if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
700 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
701 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
702 	    phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
703 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
704 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
705 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
706 	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
707 	    phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
708 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
709 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
710 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
711 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
712 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
713 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
714 	    phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
715 	    phy_types & I40E_CAP_PHY_TYPE_5GBASE_T ||
716 	    phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T ||
717 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
718 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
719 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
720 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
721 	    phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
722 	    phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
723 		ethtool_link_ksettings_add_link_mode(ks, supported,
724 						     Autoneg);
725 		ethtool_link_ksettings_add_link_mode(ks, advertising,
726 						     Autoneg);
727 	}
728 }
729 
730 /**
731  * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask
732  * @req_fec_info: mask request FEC info
733  * @ks: ethtool ksettings to fill in
734  **/
735 static void i40e_get_settings_link_up_fec(u8 req_fec_info,
736 					  struct ethtool_link_ksettings *ks)
737 {
738 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
739 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
740 	ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
741 
742 	if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) &&
743 	    (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) {
744 		ethtool_link_ksettings_add_link_mode(ks, advertising,
745 						     FEC_NONE);
746 		ethtool_link_ksettings_add_link_mode(ks, advertising,
747 						     FEC_BASER);
748 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
749 	} else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) {
750 		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
751 	} else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) {
752 		ethtool_link_ksettings_add_link_mode(ks, advertising,
753 						     FEC_BASER);
754 	} else {
755 		ethtool_link_ksettings_add_link_mode(ks, advertising,
756 						     FEC_NONE);
757 	}
758 }
759 
760 /**
761  * i40e_get_settings_link_up - Get the Link settings for when link is up
762  * @hw: hw structure
763  * @ks: ethtool ksettings to fill in
764  * @netdev: network interface device structure
765  * @pf: pointer to physical function struct
766  **/
767 static void i40e_get_settings_link_up(struct i40e_hw *hw,
768 				      struct ethtool_link_ksettings *ks,
769 				      struct net_device *netdev,
770 				      struct i40e_pf *pf)
771 {
772 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
773 	struct ethtool_link_ksettings cap_ksettings;
774 	u32 link_speed = hw_link_info->link_speed;
775 
776 	/* Initialize supported and advertised settings based on phy settings */
777 	switch (hw_link_info->phy_type) {
778 	case I40E_PHY_TYPE_40GBASE_CR4:
779 	case I40E_PHY_TYPE_40GBASE_CR4_CU:
780 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
781 		ethtool_link_ksettings_add_link_mode(ks, supported,
782 						     40000baseCR4_Full);
783 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
784 		ethtool_link_ksettings_add_link_mode(ks, advertising,
785 						     40000baseCR4_Full);
786 		break;
787 	case I40E_PHY_TYPE_XLAUI:
788 	case I40E_PHY_TYPE_XLPPI:
789 	case I40E_PHY_TYPE_40GBASE_AOC:
790 		ethtool_link_ksettings_add_link_mode(ks, supported,
791 						     40000baseCR4_Full);
792 		ethtool_link_ksettings_add_link_mode(ks, advertising,
793 						     40000baseCR4_Full);
794 		break;
795 	case I40E_PHY_TYPE_40GBASE_SR4:
796 		ethtool_link_ksettings_add_link_mode(ks, supported,
797 						     40000baseSR4_Full);
798 		ethtool_link_ksettings_add_link_mode(ks, advertising,
799 						     40000baseSR4_Full);
800 		break;
801 	case I40E_PHY_TYPE_40GBASE_LR4:
802 		ethtool_link_ksettings_add_link_mode(ks, supported,
803 						     40000baseLR4_Full);
804 		ethtool_link_ksettings_add_link_mode(ks, advertising,
805 						     40000baseLR4_Full);
806 		break;
807 	case I40E_PHY_TYPE_25GBASE_SR:
808 	case I40E_PHY_TYPE_25GBASE_LR:
809 	case I40E_PHY_TYPE_10GBASE_SR:
810 	case I40E_PHY_TYPE_10GBASE_LR:
811 	case I40E_PHY_TYPE_1000BASE_SX:
812 	case I40E_PHY_TYPE_1000BASE_LX:
813 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
814 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
815 		ethtool_link_ksettings_add_link_mode(ks, supported,
816 						     25000baseSR_Full);
817 		ethtool_link_ksettings_add_link_mode(ks, advertising,
818 						     25000baseSR_Full);
819 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
820 		ethtool_link_ksettings_add_link_mode(ks, supported,
821 						     10000baseSR_Full);
822 		ethtool_link_ksettings_add_link_mode(ks, advertising,
823 						     10000baseSR_Full);
824 		ethtool_link_ksettings_add_link_mode(ks, supported,
825 						     10000baseLR_Full);
826 		ethtool_link_ksettings_add_link_mode(ks, advertising,
827 						     10000baseLR_Full);
828 		ethtool_link_ksettings_add_link_mode(ks, supported,
829 						     1000baseX_Full);
830 		ethtool_link_ksettings_add_link_mode(ks, advertising,
831 						     1000baseX_Full);
832 		ethtool_link_ksettings_add_link_mode(ks, supported,
833 						     10000baseT_Full);
834 		if (hw_link_info->module_type[2] &
835 		    I40E_MODULE_TYPE_1000BASE_SX ||
836 		    hw_link_info->module_type[2] &
837 		    I40E_MODULE_TYPE_1000BASE_LX) {
838 			ethtool_link_ksettings_add_link_mode(ks, supported,
839 							     1000baseT_Full);
840 			if (hw_link_info->requested_speeds &
841 			    I40E_LINK_SPEED_1GB)
842 				ethtool_link_ksettings_add_link_mode(
843 				     ks, advertising, 1000baseT_Full);
844 		}
845 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
846 			ethtool_link_ksettings_add_link_mode(ks, advertising,
847 							     10000baseT_Full);
848 		break;
849 	case I40E_PHY_TYPE_10GBASE_T:
850 	case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
851 	case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
852 	case I40E_PHY_TYPE_1000BASE_T:
853 	case I40E_PHY_TYPE_100BASE_TX:
854 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
855 		ethtool_link_ksettings_add_link_mode(ks, supported,
856 						     10000baseT_Full);
857 		ethtool_link_ksettings_add_link_mode(ks, supported,
858 						     5000baseT_Full);
859 		ethtool_link_ksettings_add_link_mode(ks, supported,
860 						     2500baseT_Full);
861 		ethtool_link_ksettings_add_link_mode(ks, supported,
862 						     1000baseT_Full);
863 		ethtool_link_ksettings_add_link_mode(ks, supported,
864 						     100baseT_Full);
865 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
866 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
867 			ethtool_link_ksettings_add_link_mode(ks, advertising,
868 							     10000baseT_Full);
869 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
870 			ethtool_link_ksettings_add_link_mode(ks, advertising,
871 							     5000baseT_Full);
872 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
873 			ethtool_link_ksettings_add_link_mode(ks, advertising,
874 							     2500baseT_Full);
875 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
876 			ethtool_link_ksettings_add_link_mode(ks, advertising,
877 							     1000baseT_Full);
878 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
879 			ethtool_link_ksettings_add_link_mode(ks, advertising,
880 							     100baseT_Full);
881 		break;
882 	case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
883 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
884 		ethtool_link_ksettings_add_link_mode(ks, supported,
885 						     1000baseT_Full);
886 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
887 		ethtool_link_ksettings_add_link_mode(ks, advertising,
888 						     1000baseT_Full);
889 		break;
890 	case I40E_PHY_TYPE_10GBASE_CR1_CU:
891 	case I40E_PHY_TYPE_10GBASE_CR1:
892 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
893 		ethtool_link_ksettings_add_link_mode(ks, supported,
894 						     10000baseT_Full);
895 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
896 		ethtool_link_ksettings_add_link_mode(ks, advertising,
897 						     10000baseT_Full);
898 		break;
899 	case I40E_PHY_TYPE_XAUI:
900 	case I40E_PHY_TYPE_XFI:
901 	case I40E_PHY_TYPE_SFI:
902 	case I40E_PHY_TYPE_10GBASE_SFPP_CU:
903 	case I40E_PHY_TYPE_10GBASE_AOC:
904 		ethtool_link_ksettings_add_link_mode(ks, supported,
905 						     10000baseT_Full);
906 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
907 			ethtool_link_ksettings_add_link_mode(ks, advertising,
908 							     10000baseT_Full);
909 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
910 		break;
911 	case I40E_PHY_TYPE_SGMII:
912 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
913 		ethtool_link_ksettings_add_link_mode(ks, supported,
914 						     1000baseT_Full);
915 		if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
916 			ethtool_link_ksettings_add_link_mode(ks, advertising,
917 							     1000baseT_Full);
918 		if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
919 			ethtool_link_ksettings_add_link_mode(ks, supported,
920 							     100baseT_Full);
921 			if (hw_link_info->requested_speeds &
922 			    I40E_LINK_SPEED_100MB)
923 				ethtool_link_ksettings_add_link_mode(
924 				      ks, advertising, 100baseT_Full);
925 		}
926 		break;
927 	case I40E_PHY_TYPE_40GBASE_KR4:
928 	case I40E_PHY_TYPE_25GBASE_KR:
929 	case I40E_PHY_TYPE_20GBASE_KR2:
930 	case I40E_PHY_TYPE_10GBASE_KR:
931 	case I40E_PHY_TYPE_10GBASE_KX4:
932 	case I40E_PHY_TYPE_1000BASE_KX:
933 		ethtool_link_ksettings_add_link_mode(ks, supported,
934 						     40000baseKR4_Full);
935 		ethtool_link_ksettings_add_link_mode(ks, supported,
936 						     25000baseKR_Full);
937 		ethtool_link_ksettings_add_link_mode(ks, supported,
938 						     20000baseKR2_Full);
939 		ethtool_link_ksettings_add_link_mode(ks, supported,
940 						     10000baseKR_Full);
941 		ethtool_link_ksettings_add_link_mode(ks, supported,
942 						     10000baseKX4_Full);
943 		ethtool_link_ksettings_add_link_mode(ks, supported,
944 						     1000baseKX_Full);
945 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
946 		ethtool_link_ksettings_add_link_mode(ks, advertising,
947 						     40000baseKR4_Full);
948 		ethtool_link_ksettings_add_link_mode(ks, advertising,
949 						     25000baseKR_Full);
950 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
951 		ethtool_link_ksettings_add_link_mode(ks, advertising,
952 						     20000baseKR2_Full);
953 		ethtool_link_ksettings_add_link_mode(ks, advertising,
954 						     10000baseKR_Full);
955 		ethtool_link_ksettings_add_link_mode(ks, advertising,
956 						     10000baseKX4_Full);
957 		ethtool_link_ksettings_add_link_mode(ks, advertising,
958 						     1000baseKX_Full);
959 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
960 		break;
961 	case I40E_PHY_TYPE_25GBASE_CR:
962 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
963 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
964 		ethtool_link_ksettings_add_link_mode(ks, supported,
965 						     25000baseCR_Full);
966 		ethtool_link_ksettings_add_link_mode(ks, advertising,
967 						     25000baseCR_Full);
968 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
969 
970 		break;
971 	case I40E_PHY_TYPE_25GBASE_AOC:
972 	case I40E_PHY_TYPE_25GBASE_ACC:
973 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
974 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
975 		ethtool_link_ksettings_add_link_mode(ks, supported,
976 						     25000baseCR_Full);
977 		ethtool_link_ksettings_add_link_mode(ks, advertising,
978 						     25000baseCR_Full);
979 		i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
980 
981 		ethtool_link_ksettings_add_link_mode(ks, supported,
982 						     10000baseCR_Full);
983 		ethtool_link_ksettings_add_link_mode(ks, advertising,
984 						     10000baseCR_Full);
985 		break;
986 	default:
987 		/* if we got here and link is up something bad is afoot */
988 		netdev_info(netdev,
989 			    "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n",
990 			    hw_link_info->phy_type);
991 	}
992 
993 	/* Now that we've worked out everything that could be supported by the
994 	 * current PHY type, get what is supported by the NVM and intersect
995 	 * them to get what is truly supported
996 	 */
997 	memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
998 	i40e_phy_type_to_ethtool(pf, &cap_ksettings);
999 	ethtool_intersect_link_masks(ks, &cap_ksettings);
1000 
1001 	/* Set speed and duplex */
1002 	switch (link_speed) {
1003 	case I40E_LINK_SPEED_40GB:
1004 		ks->base.speed = SPEED_40000;
1005 		break;
1006 	case I40E_LINK_SPEED_25GB:
1007 		ks->base.speed = SPEED_25000;
1008 		break;
1009 	case I40E_LINK_SPEED_20GB:
1010 		ks->base.speed = SPEED_20000;
1011 		break;
1012 	case I40E_LINK_SPEED_10GB:
1013 		ks->base.speed = SPEED_10000;
1014 		break;
1015 	case I40E_LINK_SPEED_5GB:
1016 		ks->base.speed = SPEED_5000;
1017 		break;
1018 	case I40E_LINK_SPEED_2_5GB:
1019 		ks->base.speed = SPEED_2500;
1020 		break;
1021 	case I40E_LINK_SPEED_1GB:
1022 		ks->base.speed = SPEED_1000;
1023 		break;
1024 	case I40E_LINK_SPEED_100MB:
1025 		ks->base.speed = SPEED_100;
1026 		break;
1027 	default:
1028 		ks->base.speed = SPEED_UNKNOWN;
1029 		break;
1030 	}
1031 	ks->base.duplex = DUPLEX_FULL;
1032 }
1033 
1034 /**
1035  * i40e_get_settings_link_down - Get the Link settings for when link is down
1036  * @hw: hw structure
1037  * @ks: ethtool ksettings to fill in
1038  * @pf: pointer to physical function struct
1039  *
1040  * Reports link settings that can be determined when link is down
1041  **/
1042 static void i40e_get_settings_link_down(struct i40e_hw *hw,
1043 					struct ethtool_link_ksettings *ks,
1044 					struct i40e_pf *pf)
1045 {
1046 	/* link is down and the driver needs to fall back on
1047 	 * supported phy types to figure out what info to display
1048 	 */
1049 	i40e_phy_type_to_ethtool(pf, ks);
1050 
1051 	/* With no link speed and duplex are unknown */
1052 	ks->base.speed = SPEED_UNKNOWN;
1053 	ks->base.duplex = DUPLEX_UNKNOWN;
1054 }
1055 
1056 /**
1057  * i40e_get_link_ksettings - Get Link Speed and Duplex settings
1058  * @netdev: network interface device structure
1059  * @ks: ethtool ksettings
1060  *
1061  * Reports speed/duplex settings based on media_type
1062  **/
1063 static int i40e_get_link_ksettings(struct net_device *netdev,
1064 				   struct ethtool_link_ksettings *ks)
1065 {
1066 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1067 	struct i40e_pf *pf = np->vsi->back;
1068 	struct i40e_hw *hw = &pf->hw;
1069 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1070 	bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1071 
1072 	ethtool_link_ksettings_zero_link_mode(ks, supported);
1073 	ethtool_link_ksettings_zero_link_mode(ks, advertising);
1074 
1075 	if (link_up)
1076 		i40e_get_settings_link_up(hw, ks, netdev, pf);
1077 	else
1078 		i40e_get_settings_link_down(hw, ks, pf);
1079 
1080 	/* Now set the settings that don't rely on link being up/down */
1081 	/* Set autoneg settings */
1082 	ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1083 			    AUTONEG_ENABLE : AUTONEG_DISABLE);
1084 
1085 	/* Set media type settings */
1086 	switch (hw->phy.media_type) {
1087 	case I40E_MEDIA_TYPE_BACKPLANE:
1088 		ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
1089 		ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
1090 		ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
1091 		ethtool_link_ksettings_add_link_mode(ks, advertising,
1092 						     Backplane);
1093 		ks->base.port = PORT_NONE;
1094 		break;
1095 	case I40E_MEDIA_TYPE_BASET:
1096 		ethtool_link_ksettings_add_link_mode(ks, supported, TP);
1097 		ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
1098 		ks->base.port = PORT_TP;
1099 		break;
1100 	case I40E_MEDIA_TYPE_DA:
1101 	case I40E_MEDIA_TYPE_CX4:
1102 		ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1103 		ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1104 		ks->base.port = PORT_DA;
1105 		break;
1106 	case I40E_MEDIA_TYPE_FIBER:
1107 		ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1108 		ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1109 		ks->base.port = PORT_FIBRE;
1110 		break;
1111 	case I40E_MEDIA_TYPE_UNKNOWN:
1112 	default:
1113 		ks->base.port = PORT_OTHER;
1114 		break;
1115 	}
1116 
1117 	/* Set flow control settings */
1118 	ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
1119 	ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause);
1120 
1121 	switch (hw->fc.requested_mode) {
1122 	case I40E_FC_FULL:
1123 		ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1124 		break;
1125 	case I40E_FC_TX_PAUSE:
1126 		ethtool_link_ksettings_add_link_mode(ks, advertising,
1127 						     Asym_Pause);
1128 		break;
1129 	case I40E_FC_RX_PAUSE:
1130 		ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1131 		ethtool_link_ksettings_add_link_mode(ks, advertising,
1132 						     Asym_Pause);
1133 		break;
1134 	default:
1135 		ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
1136 		ethtool_link_ksettings_del_link_mode(ks, advertising,
1137 						     Asym_Pause);
1138 		break;
1139 	}
1140 
1141 	return 0;
1142 }
1143 
1144 #define I40E_LBIT_SIZE 8
1145 /**
1146  * i40e_speed_to_link_speed - Translate decimal speed to i40e_aq_link_speed
1147  * @speed: speed in decimal
1148  * @ks: ethtool ksettings
1149  *
1150  * Return i40e_aq_link_speed based on speed
1151  **/
1152 static enum i40e_aq_link_speed
1153 i40e_speed_to_link_speed(__u32 speed, const struct ethtool_link_ksettings *ks)
1154 {
1155 	enum i40e_aq_link_speed link_speed = I40E_LINK_SPEED_UNKNOWN;
1156 	bool speed_changed = false;
1157 	int i, j;
1158 
1159 	static const struct {
1160 		__u32 speed;
1161 		enum i40e_aq_link_speed link_speed;
1162 		__u8 bit[I40E_LBIT_SIZE];
1163 	} i40e_speed_lut[] = {
1164 #define I40E_LBIT(mode) ETHTOOL_LINK_MODE_ ## mode ##_Full_BIT
1165 		{SPEED_100, I40E_LINK_SPEED_100MB, {I40E_LBIT(100baseT)} },
1166 		{SPEED_1000, I40E_LINK_SPEED_1GB,
1167 		 {I40E_LBIT(1000baseT), I40E_LBIT(1000baseX),
1168 		  I40E_LBIT(1000baseKX)} },
1169 		{SPEED_10000, I40E_LINK_SPEED_10GB,
1170 		 {I40E_LBIT(10000baseT), I40E_LBIT(10000baseKR),
1171 		  I40E_LBIT(10000baseLR), I40E_LBIT(10000baseCR),
1172 		  I40E_LBIT(10000baseSR), I40E_LBIT(10000baseKX4)} },
1173 
1174 		{SPEED_25000, I40E_LINK_SPEED_25GB,
1175 		 {I40E_LBIT(25000baseCR), I40E_LBIT(25000baseKR),
1176 		  I40E_LBIT(25000baseSR)} },
1177 		{SPEED_40000, I40E_LINK_SPEED_40GB,
1178 		 {I40E_LBIT(40000baseKR4), I40E_LBIT(40000baseCR4),
1179 		  I40E_LBIT(40000baseSR4), I40E_LBIT(40000baseLR4)} },
1180 		{SPEED_20000, I40E_LINK_SPEED_20GB,
1181 		 {I40E_LBIT(20000baseKR2)} },
1182 		{SPEED_2500, I40E_LINK_SPEED_2_5GB, {I40E_LBIT(2500baseT)} },
1183 		{SPEED_5000, I40E_LINK_SPEED_5GB, {I40E_LBIT(2500baseT)} }
1184 #undef I40E_LBIT
1185 };
1186 
1187 	for (i = 0; i < ARRAY_SIZE(i40e_speed_lut); i++) {
1188 		if (i40e_speed_lut[i].speed == speed) {
1189 			for (j = 0; j < I40E_LBIT_SIZE; j++) {
1190 				if (test_bit(i40e_speed_lut[i].bit[j],
1191 					     ks->link_modes.supported)) {
1192 					speed_changed = true;
1193 					break;
1194 				}
1195 				if (!i40e_speed_lut[i].bit[j])
1196 					break;
1197 			}
1198 			if (speed_changed) {
1199 				link_speed = i40e_speed_lut[i].link_speed;
1200 				break;
1201 			}
1202 		}
1203 	}
1204 	return link_speed;
1205 }
1206 
1207 #undef I40E_LBIT_SIZE
1208 
1209 /**
1210  * i40e_set_link_ksettings - Set Speed and Duplex
1211  * @netdev: network interface device structure
1212  * @ks: ethtool ksettings
1213  *
1214  * Set speed/duplex per media_types advertised/forced
1215  **/
1216 static int i40e_set_link_ksettings(struct net_device *netdev,
1217 				   const struct ethtool_link_ksettings *ks)
1218 {
1219 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1220 	struct i40e_aq_get_phy_abilities_resp abilities;
1221 	struct ethtool_link_ksettings safe_ks;
1222 	struct ethtool_link_ksettings copy_ks;
1223 	struct i40e_aq_set_phy_config config;
1224 	struct i40e_pf *pf = np->vsi->back;
1225 	enum i40e_aq_link_speed link_speed;
1226 	struct i40e_vsi *vsi = np->vsi;
1227 	struct i40e_hw *hw = &pf->hw;
1228 	bool autoneg_changed = false;
1229 	i40e_status status = 0;
1230 	int timeout = 50;
1231 	int err = 0;
1232 	__u32 speed;
1233 	u8 autoneg;
1234 
1235 	/* Changing port settings is not supported if this isn't the
1236 	 * port's controlling PF
1237 	 */
1238 	if (hw->partition_id != 1) {
1239 		i40e_partition_setting_complaint(pf);
1240 		return -EOPNOTSUPP;
1241 	}
1242 	if (vsi != pf->vsi[pf->lan_vsi])
1243 		return -EOPNOTSUPP;
1244 	if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
1245 	    hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
1246 	    hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
1247 	    hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
1248 	    hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
1249 		return -EOPNOTSUPP;
1250 	if (hw->device_id == I40E_DEV_ID_KX_B ||
1251 	    hw->device_id == I40E_DEV_ID_KX_C ||
1252 	    hw->device_id == I40E_DEV_ID_20G_KR2 ||
1253 	    hw->device_id == I40E_DEV_ID_20G_KR2_A ||
1254 	    hw->device_id == I40E_DEV_ID_25G_B ||
1255 	    hw->device_id == I40E_DEV_ID_KX_X722) {
1256 		netdev_info(netdev, "Changing settings is not supported on backplane.\n");
1257 		return -EOPNOTSUPP;
1258 	}
1259 
1260 	/* copy the ksettings to copy_ks to avoid modifying the origin */
1261 	memcpy(&copy_ks, ks, sizeof(struct ethtool_link_ksettings));
1262 
1263 	/* save autoneg out of ksettings */
1264 	autoneg = copy_ks.base.autoneg;
1265 	speed = copy_ks.base.speed;
1266 
1267 	/* get our own copy of the bits to check against */
1268 	memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
1269 	safe_ks.base.cmd = copy_ks.base.cmd;
1270 	safe_ks.base.link_mode_masks_nwords =
1271 		copy_ks.base.link_mode_masks_nwords;
1272 	i40e_get_link_ksettings(netdev, &safe_ks);
1273 
1274 	/* Get link modes supported by hardware and check against modes
1275 	 * requested by the user.  Return an error if unsupported mode was set.
1276 	 */
1277 	if (!bitmap_subset(copy_ks.link_modes.advertising,
1278 			   safe_ks.link_modes.supported,
1279 			   __ETHTOOL_LINK_MODE_MASK_NBITS))
1280 		return -EINVAL;
1281 
1282 	/* set autoneg back to what it currently is */
1283 	copy_ks.base.autoneg = safe_ks.base.autoneg;
1284 	copy_ks.base.speed  = safe_ks.base.speed;
1285 
1286 	/* If copy_ks.base and safe_ks.base are not the same now, then they are
1287 	 * trying to set something that we do not support.
1288 	 */
1289 	if (memcmp(&copy_ks.base, &safe_ks.base,
1290 		   sizeof(struct ethtool_link_settings))) {
1291 		netdev_err(netdev, "Only speed and autoneg are supported.\n");
1292 		return -EOPNOTSUPP;
1293 	}
1294 
1295 	while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1296 		timeout--;
1297 		if (!timeout)
1298 			return -EBUSY;
1299 		usleep_range(1000, 2000);
1300 	}
1301 
1302 	/* Get the current phy config */
1303 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1304 					      NULL);
1305 	if (status) {
1306 		err = -EAGAIN;
1307 		goto done;
1308 	}
1309 
1310 	/* Copy abilities to config in case autoneg is not
1311 	 * set below
1312 	 */
1313 	memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
1314 	config.abilities = abilities.abilities;
1315 
1316 	/* Check autoneg */
1317 	if (autoneg == AUTONEG_ENABLE) {
1318 		/* If autoneg was not already enabled */
1319 		if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
1320 			/* If autoneg is not supported, return error */
1321 			if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
1322 								   supported,
1323 								   Autoneg)) {
1324 				netdev_info(netdev, "Autoneg not supported on this phy\n");
1325 				err = -EINVAL;
1326 				goto done;
1327 			}
1328 			/* Autoneg is allowed to change */
1329 			config.abilities = abilities.abilities |
1330 					   I40E_AQ_PHY_ENABLE_AN;
1331 			autoneg_changed = true;
1332 		}
1333 	} else {
1334 		/* If autoneg is currently enabled */
1335 		if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
1336 			/* If autoneg is supported 10GBASE_T is the only PHY
1337 			 * that can disable it, so otherwise return error
1338 			 */
1339 			if (ethtool_link_ksettings_test_link_mode(&safe_ks,
1340 								  supported,
1341 								  Autoneg) &&
1342 			    hw->phy.media_type != I40E_MEDIA_TYPE_BASET) {
1343 				netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
1344 				err = -EINVAL;
1345 				goto done;
1346 			}
1347 			/* Autoneg is allowed to change */
1348 			config.abilities = abilities.abilities &
1349 					   ~I40E_AQ_PHY_ENABLE_AN;
1350 			autoneg_changed = true;
1351 		}
1352 	}
1353 
1354 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1355 						  100baseT_Full))
1356 		config.link_speed |= I40E_LINK_SPEED_100MB;
1357 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1358 						  1000baseT_Full) ||
1359 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1360 						  1000baseX_Full) ||
1361 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1362 						  1000baseKX_Full))
1363 		config.link_speed |= I40E_LINK_SPEED_1GB;
1364 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1365 						  10000baseT_Full) ||
1366 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1367 						  10000baseKX4_Full) ||
1368 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1369 						  10000baseKR_Full) ||
1370 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1371 						  10000baseCR_Full) ||
1372 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1373 						  10000baseSR_Full) ||
1374 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1375 						  10000baseLR_Full))
1376 		config.link_speed |= I40E_LINK_SPEED_10GB;
1377 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1378 						  2500baseT_Full))
1379 		config.link_speed |= I40E_LINK_SPEED_2_5GB;
1380 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1381 						  5000baseT_Full))
1382 		config.link_speed |= I40E_LINK_SPEED_5GB;
1383 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1384 						  20000baseKR2_Full))
1385 		config.link_speed |= I40E_LINK_SPEED_20GB;
1386 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1387 						  25000baseCR_Full) ||
1388 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1389 						  25000baseKR_Full) ||
1390 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1391 						  25000baseSR_Full))
1392 		config.link_speed |= I40E_LINK_SPEED_25GB;
1393 	if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1394 						  40000baseKR4_Full) ||
1395 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1396 						  40000baseCR4_Full) ||
1397 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1398 						  40000baseSR4_Full) ||
1399 	    ethtool_link_ksettings_test_link_mode(ks, advertising,
1400 						  40000baseLR4_Full))
1401 		config.link_speed |= I40E_LINK_SPEED_40GB;
1402 
1403 	/* Autonegotiation must be disabled to change speed */
1404 	if ((speed != SPEED_UNKNOWN && safe_ks.base.speed != speed) &&
1405 	    (autoneg == AUTONEG_DISABLE ||
1406 	    (safe_ks.base.autoneg == AUTONEG_DISABLE && !autoneg_changed))) {
1407 		link_speed = i40e_speed_to_link_speed(speed, ks);
1408 		if (link_speed == I40E_LINK_SPEED_UNKNOWN) {
1409 			netdev_info(netdev, "Given speed is not supported\n");
1410 			err = -EOPNOTSUPP;
1411 			goto done;
1412 		} else {
1413 			config.link_speed = link_speed;
1414 		}
1415 	} else {
1416 		if (safe_ks.base.speed != speed) {
1417 			netdev_info(netdev,
1418 				    "Unable to set speed, disable autoneg\n");
1419 			err = -EOPNOTSUPP;
1420 			goto done;
1421 		}
1422 	}
1423 
1424 	/* If speed didn't get set, set it to what it currently is.
1425 	 * This is needed because if advertise is 0 (as it is when autoneg
1426 	 * is disabled) then speed won't get set.
1427 	 */
1428 	if (!config.link_speed)
1429 		config.link_speed = abilities.link_speed;
1430 	if (autoneg_changed || abilities.link_speed != config.link_speed) {
1431 		/* copy over the rest of the abilities */
1432 		config.phy_type = abilities.phy_type;
1433 		config.phy_type_ext = abilities.phy_type_ext;
1434 		config.eee_capability = abilities.eee_capability;
1435 		config.eeer = abilities.eeer_val;
1436 		config.low_power_ctrl = abilities.d3_lpan;
1437 		config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1438 				    I40E_AQ_PHY_FEC_CONFIG_MASK;
1439 
1440 		/* save the requested speeds */
1441 		hw->phy.link_info.requested_speeds = config.link_speed;
1442 		/* set link and auto negotiation so changes take effect */
1443 		config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1444 		/* If link is up put link down */
1445 		if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1446 			/* Tell the OS link is going down, the link will go
1447 			 * back up when fw says it is ready asynchronously
1448 			 */
1449 			i40e_print_link_message(vsi, false);
1450 			netif_carrier_off(netdev);
1451 			netif_tx_stop_all_queues(netdev);
1452 		}
1453 
1454 		/* make the aq call */
1455 		status = i40e_aq_set_phy_config(hw, &config, NULL);
1456 		if (status) {
1457 			netdev_info(netdev,
1458 				    "Set phy config failed, err %d aq_err %s\n",
1459 				    status,
1460 				    i40e_aq_str(hw, hw->aq.asq_last_status));
1461 			err = -EAGAIN;
1462 			goto done;
1463 		}
1464 
1465 		status = i40e_update_link_info(hw);
1466 		if (status)
1467 			netdev_dbg(netdev,
1468 				   "Updating link info failed with err %d aq_err %s\n",
1469 				   status,
1470 				   i40e_aq_str(hw, hw->aq.asq_last_status));
1471 
1472 	} else {
1473 		netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1474 	}
1475 
1476 done:
1477 	clear_bit(__I40E_CONFIG_BUSY, pf->state);
1478 
1479 	return err;
1480 }
1481 
1482 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
1483 {
1484 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1485 	struct i40e_aq_get_phy_abilities_resp abilities;
1486 	struct i40e_pf *pf = np->vsi->back;
1487 	struct i40e_hw *hw = &pf->hw;
1488 	i40e_status status = 0;
1489 	u32 flags = 0;
1490 	int err = 0;
1491 
1492 	flags = READ_ONCE(pf->flags);
1493 	i40e_set_fec_in_flags(fec_cfg, &flags);
1494 
1495 	/* Get the current phy config */
1496 	memset(&abilities, 0, sizeof(abilities));
1497 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1498 					      NULL);
1499 	if (status) {
1500 		err = -EAGAIN;
1501 		goto done;
1502 	}
1503 
1504 	if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) {
1505 		struct i40e_aq_set_phy_config config;
1506 
1507 		memset(&config, 0, sizeof(config));
1508 		config.phy_type = abilities.phy_type;
1509 		config.abilities = abilities.abilities |
1510 				   I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1511 		config.phy_type_ext = abilities.phy_type_ext;
1512 		config.link_speed = abilities.link_speed;
1513 		config.eee_capability = abilities.eee_capability;
1514 		config.eeer = abilities.eeer_val;
1515 		config.low_power_ctrl = abilities.d3_lpan;
1516 		config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK;
1517 		status = i40e_aq_set_phy_config(hw, &config, NULL);
1518 		if (status) {
1519 			netdev_info(netdev,
1520 				    "Set phy config failed, err %d aq_err %s\n",
1521 				    status,
1522 				    i40e_aq_str(hw, hw->aq.asq_last_status));
1523 			err = -EAGAIN;
1524 			goto done;
1525 		}
1526 		pf->flags = flags;
1527 		status = i40e_update_link_info(hw);
1528 		if (status)
1529 			/* debug level message only due to relation to the link
1530 			 * itself rather than to the FEC settings
1531 			 * (e.g. no physical connection etc.)
1532 			 */
1533 			netdev_dbg(netdev,
1534 				   "Updating link info failed with err %d aq_err %s\n",
1535 				   status,
1536 				   i40e_aq_str(hw, hw->aq.asq_last_status));
1537 	}
1538 
1539 done:
1540 	return err;
1541 }
1542 
1543 static int i40e_get_fec_param(struct net_device *netdev,
1544 			      struct ethtool_fecparam *fecparam)
1545 {
1546 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1547 	struct i40e_aq_get_phy_abilities_resp abilities;
1548 	struct i40e_pf *pf = np->vsi->back;
1549 	struct i40e_hw *hw = &pf->hw;
1550 	i40e_status status = 0;
1551 	int err = 0;
1552 	u8 fec_cfg;
1553 
1554 	/* Get the current phy config */
1555 	memset(&abilities, 0, sizeof(abilities));
1556 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1557 					      NULL);
1558 	if (status) {
1559 		err = -EAGAIN;
1560 		goto done;
1561 	}
1562 
1563 	fecparam->fec = 0;
1564 	fec_cfg = abilities.fec_cfg_curr_mod_ext_info;
1565 	if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
1566 		fecparam->fec |= ETHTOOL_FEC_AUTO;
1567 	else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS |
1568 		 I40E_AQ_SET_FEC_ABILITY_RS))
1569 		fecparam->fec |= ETHTOOL_FEC_RS;
1570 	else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR |
1571 		 I40E_AQ_SET_FEC_ABILITY_KR))
1572 		fecparam->fec |= ETHTOOL_FEC_BASER;
1573 	if (fec_cfg == 0)
1574 		fecparam->fec |= ETHTOOL_FEC_OFF;
1575 
1576 	if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA)
1577 		fecparam->active_fec = ETHTOOL_FEC_BASER;
1578 	else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA)
1579 		fecparam->active_fec = ETHTOOL_FEC_RS;
1580 	else
1581 		fecparam->active_fec = ETHTOOL_FEC_OFF;
1582 done:
1583 	return err;
1584 }
1585 
1586 static int i40e_set_fec_param(struct net_device *netdev,
1587 			      struct ethtool_fecparam *fecparam)
1588 {
1589 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1590 	struct i40e_pf *pf = np->vsi->back;
1591 	struct i40e_hw *hw = &pf->hw;
1592 	u8 fec_cfg = 0;
1593 
1594 	if (hw->device_id != I40E_DEV_ID_25G_SFP28 &&
1595 	    hw->device_id != I40E_DEV_ID_25G_B &&
1596 	    hw->device_id != I40E_DEV_ID_KX_X722)
1597 		return -EPERM;
1598 
1599 	if (hw->mac.type == I40E_MAC_X722 &&
1600 	    !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) {
1601 		netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n");
1602 		return -EOPNOTSUPP;
1603 	}
1604 
1605 	switch (fecparam->fec) {
1606 	case ETHTOOL_FEC_AUTO:
1607 		fec_cfg = I40E_AQ_SET_FEC_AUTO;
1608 		break;
1609 	case ETHTOOL_FEC_RS:
1610 		fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
1611 			     I40E_AQ_SET_FEC_ABILITY_RS);
1612 		break;
1613 	case ETHTOOL_FEC_BASER:
1614 		fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
1615 			     I40E_AQ_SET_FEC_ABILITY_KR);
1616 		break;
1617 	case ETHTOOL_FEC_OFF:
1618 	case ETHTOOL_FEC_NONE:
1619 		fec_cfg = 0;
1620 		break;
1621 	default:
1622 		dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d",
1623 			 fecparam->fec);
1624 		return -EINVAL;
1625 	}
1626 
1627 	return i40e_set_fec_cfg(netdev, fec_cfg);
1628 }
1629 
1630 static int i40e_nway_reset(struct net_device *netdev)
1631 {
1632 	/* restart autonegotiation */
1633 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1634 	struct i40e_pf *pf = np->vsi->back;
1635 	struct i40e_hw *hw = &pf->hw;
1636 	bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1637 	i40e_status ret = 0;
1638 
1639 	ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1640 	if (ret) {
1641 		netdev_info(netdev, "link restart failed, err %d aq_err %s\n",
1642 			    ret,
1643 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1644 		return -EIO;
1645 	}
1646 
1647 	return 0;
1648 }
1649 
1650 /**
1651  * i40e_get_pauseparam -  Get Flow Control status
1652  * @netdev: netdevice structure
1653  * @pause: buffer to return pause parameters
1654  *
1655  * Return tx/rx-pause status
1656  **/
1657 static void i40e_get_pauseparam(struct net_device *netdev,
1658 				struct ethtool_pauseparam *pause)
1659 {
1660 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1661 	struct i40e_pf *pf = np->vsi->back;
1662 	struct i40e_hw *hw = &pf->hw;
1663 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1664 	struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1665 
1666 	pause->autoneg =
1667 		((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1668 		  AUTONEG_ENABLE : AUTONEG_DISABLE);
1669 
1670 	/* PFC enabled so report LFC as off */
1671 	if (dcbx_cfg->pfc.pfcenable) {
1672 		pause->rx_pause = 0;
1673 		pause->tx_pause = 0;
1674 		return;
1675 	}
1676 
1677 	if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
1678 		pause->rx_pause = 1;
1679 	} else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
1680 		pause->tx_pause = 1;
1681 	} else if (hw->fc.current_mode == I40E_FC_FULL) {
1682 		pause->rx_pause = 1;
1683 		pause->tx_pause = 1;
1684 	}
1685 }
1686 
1687 /**
1688  * i40e_set_pauseparam - Set Flow Control parameter
1689  * @netdev: network interface device structure
1690  * @pause: return tx/rx flow control status
1691  **/
1692 static int i40e_set_pauseparam(struct net_device *netdev,
1693 			       struct ethtool_pauseparam *pause)
1694 {
1695 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1696 	struct i40e_pf *pf = np->vsi->back;
1697 	struct i40e_vsi *vsi = np->vsi;
1698 	struct i40e_hw *hw = &pf->hw;
1699 	struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1700 	struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1701 	bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1702 	i40e_status status;
1703 	u8 aq_failures;
1704 	int err = 0;
1705 	u32 is_an;
1706 
1707 	/* Changing the port's flow control is not supported if this isn't the
1708 	 * port's controlling PF
1709 	 */
1710 	if (hw->partition_id != 1) {
1711 		i40e_partition_setting_complaint(pf);
1712 		return -EOPNOTSUPP;
1713 	}
1714 
1715 	if (vsi != pf->vsi[pf->lan_vsi])
1716 		return -EOPNOTSUPP;
1717 
1718 	is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED;
1719 	if (pause->autoneg != is_an) {
1720 		netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1721 		return -EOPNOTSUPP;
1722 	}
1723 
1724 	/* If we have link and don't have autoneg */
1725 	if (!test_bit(__I40E_DOWN, pf->state) && !is_an) {
1726 		/* Send message that it might not necessarily work*/
1727 		netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1728 	}
1729 
1730 	if (dcbx_cfg->pfc.pfcenable) {
1731 		netdev_info(netdev,
1732 			    "Priority flow control enabled. Cannot set link flow control.\n");
1733 		return -EOPNOTSUPP;
1734 	}
1735 
1736 	if (pause->rx_pause && pause->tx_pause)
1737 		hw->fc.requested_mode = I40E_FC_FULL;
1738 	else if (pause->rx_pause && !pause->tx_pause)
1739 		hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1740 	else if (!pause->rx_pause && pause->tx_pause)
1741 		hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1742 	else if (!pause->rx_pause && !pause->tx_pause)
1743 		hw->fc.requested_mode = I40E_FC_NONE;
1744 	else
1745 		return -EINVAL;
1746 
1747 	/* Tell the OS link is going down, the link will go back up when fw
1748 	 * says it is ready asynchronously
1749 	 */
1750 	i40e_print_link_message(vsi, false);
1751 	netif_carrier_off(netdev);
1752 	netif_tx_stop_all_queues(netdev);
1753 
1754 	/* Set the fc mode and only restart an if link is up*/
1755 	status = i40e_set_fc(hw, &aq_failures, link_up);
1756 
1757 	if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1758 		netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %d aq_err %s\n",
1759 			    status,
1760 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1761 		err = -EAGAIN;
1762 	}
1763 	if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1764 		netdev_info(netdev, "Set fc failed on the set_phy_config call with err %d aq_err %s\n",
1765 			    status,
1766 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1767 		err = -EAGAIN;
1768 	}
1769 	if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1770 		netdev_info(netdev, "Set fc failed on the get_link_info call with err %d aq_err %s\n",
1771 			    status,
1772 			    i40e_aq_str(hw, hw->aq.asq_last_status));
1773 		err = -EAGAIN;
1774 	}
1775 
1776 	if (!test_bit(__I40E_DOWN, pf->state) && is_an) {
1777 		/* Give it a little more time to try to come back */
1778 		msleep(75);
1779 		if (!test_bit(__I40E_DOWN, pf->state))
1780 			return i40e_nway_reset(netdev);
1781 	}
1782 
1783 	return err;
1784 }
1785 
1786 static u32 i40e_get_msglevel(struct net_device *netdev)
1787 {
1788 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1789 	struct i40e_pf *pf = np->vsi->back;
1790 	u32 debug_mask = pf->hw.debug_mask;
1791 
1792 	if (debug_mask)
1793 		netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1794 
1795 	return pf->msg_enable;
1796 }
1797 
1798 static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1799 {
1800 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1801 	struct i40e_pf *pf = np->vsi->back;
1802 
1803 	if (I40E_DEBUG_USER & data)
1804 		pf->hw.debug_mask = data;
1805 	else
1806 		pf->msg_enable = data;
1807 }
1808 
1809 static int i40e_get_regs_len(struct net_device *netdev)
1810 {
1811 	int reg_count = 0;
1812 	int i;
1813 
1814 	for (i = 0; i40e_reg_list[i].offset != 0; i++)
1815 		reg_count += i40e_reg_list[i].elements;
1816 
1817 	return reg_count * sizeof(u32);
1818 }
1819 
1820 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1821 			  void *p)
1822 {
1823 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1824 	struct i40e_pf *pf = np->vsi->back;
1825 	struct i40e_hw *hw = &pf->hw;
1826 	u32 *reg_buf = p;
1827 	unsigned int i, j, ri;
1828 	u32 reg;
1829 
1830 	/* Tell ethtool which driver-version-specific regs output we have.
1831 	 *
1832 	 * At some point, if we have ethtool doing special formatting of
1833 	 * this data, it will rely on this version number to know how to
1834 	 * interpret things.  Hence, this needs to be updated if/when the
1835 	 * diags register table is changed.
1836 	 */
1837 	regs->version = 1;
1838 
1839 	/* loop through the diags reg table for what to print */
1840 	ri = 0;
1841 	for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1842 		for (j = 0; j < i40e_reg_list[i].elements; j++) {
1843 			reg = i40e_reg_list[i].offset
1844 				+ (j * i40e_reg_list[i].stride);
1845 			reg_buf[ri++] = rd32(hw, reg);
1846 		}
1847 	}
1848 
1849 }
1850 
1851 static int i40e_get_eeprom(struct net_device *netdev,
1852 			   struct ethtool_eeprom *eeprom, u8 *bytes)
1853 {
1854 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1855 	struct i40e_hw *hw = &np->vsi->back->hw;
1856 	struct i40e_pf *pf = np->vsi->back;
1857 	int ret_val = 0, len, offset;
1858 	u8 *eeprom_buff;
1859 	u16 i, sectors;
1860 	bool last;
1861 	u32 magic;
1862 
1863 #define I40E_NVM_SECTOR_SIZE  4096
1864 	if (eeprom->len == 0)
1865 		return -EINVAL;
1866 
1867 	/* check for NVMUpdate access method */
1868 	magic = hw->vendor_id | (hw->device_id << 16);
1869 	if (eeprom->magic && eeprom->magic != magic) {
1870 		struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1871 		int errno = 0;
1872 
1873 		/* make sure it is the right magic for NVMUpdate */
1874 		if ((eeprom->magic >> 16) != hw->device_id)
1875 			errno = -EINVAL;
1876 		else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1877 			 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1878 			errno = -EBUSY;
1879 		else
1880 			ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1881 
1882 		if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1883 			dev_info(&pf->pdev->dev,
1884 				 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1885 				 ret_val, hw->aq.asq_last_status, errno,
1886 				 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1887 				 cmd->offset, cmd->data_size);
1888 
1889 		return errno;
1890 	}
1891 
1892 	/* normal ethtool get_eeprom support */
1893 	eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1894 
1895 	eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1896 	if (!eeprom_buff)
1897 		return -ENOMEM;
1898 
1899 	ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1900 	if (ret_val) {
1901 		dev_info(&pf->pdev->dev,
1902 			 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1903 			 ret_val, hw->aq.asq_last_status);
1904 		goto free_buff;
1905 	}
1906 
1907 	sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1908 	sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1909 	len = I40E_NVM_SECTOR_SIZE;
1910 	last = false;
1911 	for (i = 0; i < sectors; i++) {
1912 		if (i == (sectors - 1)) {
1913 			len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1914 			last = true;
1915 		}
1916 		offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1917 		ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1918 				(u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1919 				last, NULL);
1920 		if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1921 			dev_info(&pf->pdev->dev,
1922 				 "read NVM failed, invalid offset 0x%x\n",
1923 				 offset);
1924 			break;
1925 		} else if (ret_val &&
1926 			   hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1927 			dev_info(&pf->pdev->dev,
1928 				 "read NVM failed, access, offset 0x%x\n",
1929 				 offset);
1930 			break;
1931 		} else if (ret_val) {
1932 			dev_info(&pf->pdev->dev,
1933 				 "read NVM failed offset %d err=%d status=0x%x\n",
1934 				 offset, ret_val, hw->aq.asq_last_status);
1935 			break;
1936 		}
1937 	}
1938 
1939 	i40e_release_nvm(hw);
1940 	memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1941 free_buff:
1942 	kfree(eeprom_buff);
1943 	return ret_val;
1944 }
1945 
1946 static int i40e_get_eeprom_len(struct net_device *netdev)
1947 {
1948 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1949 	struct i40e_hw *hw = &np->vsi->back->hw;
1950 	u32 val;
1951 
1952 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1953 	if (hw->mac.type == I40E_MAC_X722) {
1954 		val = X722_EEPROM_SCOPE_LIMIT + 1;
1955 		return val;
1956 	}
1957 	val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1958 		& I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1959 		>> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1960 	/* register returns value in power of 2, 64Kbyte chunks. */
1961 	val = (64 * 1024) * BIT(val);
1962 	return val;
1963 }
1964 
1965 static int i40e_set_eeprom(struct net_device *netdev,
1966 			   struct ethtool_eeprom *eeprom, u8 *bytes)
1967 {
1968 	struct i40e_netdev_priv *np = netdev_priv(netdev);
1969 	struct i40e_hw *hw = &np->vsi->back->hw;
1970 	struct i40e_pf *pf = np->vsi->back;
1971 	struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1972 	int ret_val = 0;
1973 	int errno = 0;
1974 	u32 magic;
1975 
1976 	/* normal ethtool set_eeprom is not supported */
1977 	magic = hw->vendor_id | (hw->device_id << 16);
1978 	if (eeprom->magic == magic)
1979 		errno = -EOPNOTSUPP;
1980 	/* check for NVMUpdate access method */
1981 	else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1982 		errno = -EINVAL;
1983 	else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1984 		 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1985 		errno = -EBUSY;
1986 	else
1987 		ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1988 
1989 	if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1990 		dev_info(&pf->pdev->dev,
1991 			 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1992 			 ret_val, hw->aq.asq_last_status, errno,
1993 			 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1994 			 cmd->offset, cmd->data_size);
1995 
1996 	return errno;
1997 }
1998 
1999 static void i40e_get_drvinfo(struct net_device *netdev,
2000 			     struct ethtool_drvinfo *drvinfo)
2001 {
2002 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2003 	struct i40e_vsi *vsi = np->vsi;
2004 	struct i40e_pf *pf = vsi->back;
2005 
2006 	strscpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
2007 	strscpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
2008 		sizeof(drvinfo->fw_version));
2009 	strscpy(drvinfo->bus_info, pci_name(pf->pdev),
2010 		sizeof(drvinfo->bus_info));
2011 	drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
2012 	if (pf->hw.pf_id == 0)
2013 		drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
2014 }
2015 
2016 static void i40e_get_ringparam(struct net_device *netdev,
2017 			       struct ethtool_ringparam *ring,
2018 			       struct kernel_ethtool_ringparam *kernel_ring,
2019 			       struct netlink_ext_ack *extack)
2020 {
2021 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2022 	struct i40e_pf *pf = np->vsi->back;
2023 	struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2024 
2025 	ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
2026 	ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
2027 	ring->rx_mini_max_pending = 0;
2028 	ring->rx_jumbo_max_pending = 0;
2029 	ring->rx_pending = vsi->rx_rings[0]->count;
2030 	ring->tx_pending = vsi->tx_rings[0]->count;
2031 	ring->rx_mini_pending = 0;
2032 	ring->rx_jumbo_pending = 0;
2033 }
2034 
2035 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
2036 {
2037 	if (i40e_enabled_xdp_vsi(vsi)) {
2038 		return index < vsi->num_queue_pairs ||
2039 			(index >= vsi->alloc_queue_pairs &&
2040 			 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
2041 	}
2042 
2043 	return index < vsi->num_queue_pairs;
2044 }
2045 
2046 static int i40e_set_ringparam(struct net_device *netdev,
2047 			      struct ethtool_ringparam *ring,
2048 			      struct kernel_ethtool_ringparam *kernel_ring,
2049 			      struct netlink_ext_ack *extack)
2050 {
2051 	struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
2052 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2053 	struct i40e_hw *hw = &np->vsi->back->hw;
2054 	struct i40e_vsi *vsi = np->vsi;
2055 	struct i40e_pf *pf = vsi->back;
2056 	u32 new_rx_count, new_tx_count;
2057 	u16 tx_alloc_queue_pairs;
2058 	int timeout = 50;
2059 	int i, err = 0;
2060 
2061 	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
2062 		return -EINVAL;
2063 
2064 	if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
2065 	    ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
2066 	    ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
2067 	    ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
2068 		netdev_info(netdev,
2069 			    "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
2070 			    ring->tx_pending, ring->rx_pending,
2071 			    I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
2072 		return -EINVAL;
2073 	}
2074 
2075 	new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
2076 	new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
2077 
2078 	/* if nothing to do return success */
2079 	if ((new_tx_count == vsi->tx_rings[0]->count) &&
2080 	    (new_rx_count == vsi->rx_rings[0]->count))
2081 		return 0;
2082 
2083 	/* If there is a AF_XDP page pool attached to any of Rx rings,
2084 	 * disallow changing the number of descriptors -- regardless
2085 	 * if the netdev is running or not.
2086 	 */
2087 	if (i40e_xsk_any_rx_ring_enabled(vsi))
2088 		return -EBUSY;
2089 
2090 	while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
2091 		timeout--;
2092 		if (!timeout)
2093 			return -EBUSY;
2094 		usleep_range(1000, 2000);
2095 	}
2096 
2097 	if (!netif_running(vsi->netdev)) {
2098 		/* simple case - set for the next time the netdev is started */
2099 		for (i = 0; i < vsi->num_queue_pairs; i++) {
2100 			vsi->tx_rings[i]->count = new_tx_count;
2101 			vsi->rx_rings[i]->count = new_rx_count;
2102 			if (i40e_enabled_xdp_vsi(vsi))
2103 				vsi->xdp_rings[i]->count = new_tx_count;
2104 		}
2105 		vsi->num_tx_desc = new_tx_count;
2106 		vsi->num_rx_desc = new_rx_count;
2107 		goto done;
2108 	}
2109 
2110 	/* We can't just free everything and then setup again,
2111 	 * because the ISRs in MSI-X mode get passed pointers
2112 	 * to the Tx and Rx ring structs.
2113 	 */
2114 
2115 	/* alloc updated Tx and XDP Tx resources */
2116 	tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
2117 			       (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
2118 	if (new_tx_count != vsi->tx_rings[0]->count) {
2119 		netdev_info(netdev,
2120 			    "Changing Tx descriptor count from %d to %d.\n",
2121 			    vsi->tx_rings[0]->count, new_tx_count);
2122 		tx_rings = kcalloc(tx_alloc_queue_pairs,
2123 				   sizeof(struct i40e_ring), GFP_KERNEL);
2124 		if (!tx_rings) {
2125 			err = -ENOMEM;
2126 			goto done;
2127 		}
2128 
2129 		for (i = 0; i < tx_alloc_queue_pairs; i++) {
2130 			if (!i40e_active_tx_ring_index(vsi, i))
2131 				continue;
2132 
2133 			tx_rings[i] = *vsi->tx_rings[i];
2134 			tx_rings[i].count = new_tx_count;
2135 			/* the desc and bi pointers will be reallocated in the
2136 			 * setup call
2137 			 */
2138 			tx_rings[i].desc = NULL;
2139 			tx_rings[i].rx_bi = NULL;
2140 			err = i40e_setup_tx_descriptors(&tx_rings[i]);
2141 			if (err) {
2142 				while (i) {
2143 					i--;
2144 					if (!i40e_active_tx_ring_index(vsi, i))
2145 						continue;
2146 					i40e_free_tx_resources(&tx_rings[i]);
2147 				}
2148 				kfree(tx_rings);
2149 				tx_rings = NULL;
2150 
2151 				goto done;
2152 			}
2153 		}
2154 	}
2155 
2156 	/* alloc updated Rx resources */
2157 	if (new_rx_count != vsi->rx_rings[0]->count) {
2158 		netdev_info(netdev,
2159 			    "Changing Rx descriptor count from %d to %d\n",
2160 			    vsi->rx_rings[0]->count, new_rx_count);
2161 		rx_rings = kcalloc(vsi->alloc_queue_pairs,
2162 				   sizeof(struct i40e_ring), GFP_KERNEL);
2163 		if (!rx_rings) {
2164 			err = -ENOMEM;
2165 			goto free_tx;
2166 		}
2167 
2168 		for (i = 0; i < vsi->num_queue_pairs; i++) {
2169 			u16 unused;
2170 
2171 			/* clone ring and setup updated count */
2172 			rx_rings[i] = *vsi->rx_rings[i];
2173 			rx_rings[i].count = new_rx_count;
2174 			/* the desc and bi pointers will be reallocated in the
2175 			 * setup call
2176 			 */
2177 			rx_rings[i].desc = NULL;
2178 			rx_rings[i].rx_bi = NULL;
2179 			/* Clear cloned XDP RX-queue info before setup call */
2180 			memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
2181 			/* this is to allow wr32 to have something to write to
2182 			 * during early allocation of Rx buffers
2183 			 */
2184 			rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
2185 			err = i40e_setup_rx_descriptors(&rx_rings[i]);
2186 			if (err)
2187 				goto rx_unwind;
2188 
2189 			/* now allocate the Rx buffers to make sure the OS
2190 			 * has enough memory, any failure here means abort
2191 			 */
2192 			unused = I40E_DESC_UNUSED(&rx_rings[i]);
2193 			err = i40e_alloc_rx_buffers(&rx_rings[i], unused);
2194 rx_unwind:
2195 			if (err) {
2196 				do {
2197 					i40e_free_rx_resources(&rx_rings[i]);
2198 				} while (i--);
2199 				kfree(rx_rings);
2200 				rx_rings = NULL;
2201 
2202 				goto free_tx;
2203 			}
2204 		}
2205 	}
2206 
2207 	/* Bring interface down, copy in the new ring info,
2208 	 * then restore the interface
2209 	 */
2210 	i40e_down(vsi);
2211 
2212 	if (tx_rings) {
2213 		for (i = 0; i < tx_alloc_queue_pairs; i++) {
2214 			if (i40e_active_tx_ring_index(vsi, i)) {
2215 				i40e_free_tx_resources(vsi->tx_rings[i]);
2216 				*vsi->tx_rings[i] = tx_rings[i];
2217 			}
2218 		}
2219 		kfree(tx_rings);
2220 		tx_rings = NULL;
2221 	}
2222 
2223 	if (rx_rings) {
2224 		for (i = 0; i < vsi->num_queue_pairs; i++) {
2225 			i40e_free_rx_resources(vsi->rx_rings[i]);
2226 			/* get the real tail offset */
2227 			rx_rings[i].tail = vsi->rx_rings[i]->tail;
2228 			/* this is to fake out the allocation routine
2229 			 * into thinking it has to realloc everything
2230 			 * but the recycling logic will let us re-use
2231 			 * the buffers allocated above
2232 			 */
2233 			rx_rings[i].next_to_use = 0;
2234 			rx_rings[i].next_to_clean = 0;
2235 			rx_rings[i].next_to_alloc = 0;
2236 			/* do a struct copy */
2237 			*vsi->rx_rings[i] = rx_rings[i];
2238 		}
2239 		kfree(rx_rings);
2240 		rx_rings = NULL;
2241 	}
2242 
2243 	vsi->num_tx_desc = new_tx_count;
2244 	vsi->num_rx_desc = new_rx_count;
2245 	i40e_up(vsi);
2246 
2247 free_tx:
2248 	/* error cleanup if the Rx allocations failed after getting Tx */
2249 	if (tx_rings) {
2250 		for (i = 0; i < tx_alloc_queue_pairs; i++) {
2251 			if (i40e_active_tx_ring_index(vsi, i))
2252 				i40e_free_tx_resources(vsi->tx_rings[i]);
2253 		}
2254 		kfree(tx_rings);
2255 		tx_rings = NULL;
2256 	}
2257 
2258 done:
2259 	clear_bit(__I40E_CONFIG_BUSY, pf->state);
2260 
2261 	return err;
2262 }
2263 
2264 /**
2265  * i40e_get_stats_count - return the stats count for a device
2266  * @netdev: the netdev to return the count for
2267  *
2268  * Returns the total number of statistics for this netdev. Note that even
2269  * though this is a function, it is required that the count for a specific
2270  * netdev must never change. Basing the count on static values such as the
2271  * maximum number of queues or the device type is ok. However, the API for
2272  * obtaining stats is *not* safe against changes based on non-static
2273  * values such as the *current* number of queues, or runtime flags.
2274  *
2275  * If a statistic is not always enabled, return it as part of the count
2276  * anyways, always return its string, and report its value as zero.
2277  **/
2278 static int i40e_get_stats_count(struct net_device *netdev)
2279 {
2280 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2281 	struct i40e_vsi *vsi = np->vsi;
2282 	struct i40e_pf *pf = vsi->back;
2283 	int stats_len;
2284 
2285 	if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1)
2286 		stats_len = I40E_PF_STATS_LEN;
2287 	else
2288 		stats_len = I40E_VSI_STATS_LEN;
2289 
2290 	/* The number of stats reported for a given net_device must remain
2291 	 * constant throughout the life of that device.
2292 	 *
2293 	 * This is because the API for obtaining the size, strings, and stats
2294 	 * is spread out over three separate ethtool ioctls. There is no safe
2295 	 * way to lock the number of stats across these calls, so we must
2296 	 * assume that they will never change.
2297 	 *
2298 	 * Due to this, we report the maximum number of queues, even if not
2299 	 * every queue is currently configured. Since we always allocate
2300 	 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This
2301 	 * works because the num_tx_queues is set at device creation and never
2302 	 * changes.
2303 	 */
2304 	stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues;
2305 
2306 	return stats_len;
2307 }
2308 
2309 static int i40e_get_sset_count(struct net_device *netdev, int sset)
2310 {
2311 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2312 	struct i40e_vsi *vsi = np->vsi;
2313 	struct i40e_pf *pf = vsi->back;
2314 
2315 	switch (sset) {
2316 	case ETH_SS_TEST:
2317 		return I40E_TEST_LEN;
2318 	case ETH_SS_STATS:
2319 		return i40e_get_stats_count(netdev);
2320 	case ETH_SS_PRIV_FLAGS:
2321 		return I40E_PRIV_FLAGS_STR_LEN +
2322 			(pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
2323 	default:
2324 		return -EOPNOTSUPP;
2325 	}
2326 }
2327 
2328 /**
2329  * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure
2330  * @tc: the TC statistics in VEB structure (veb->tc_stats)
2331  * @i: the index of traffic class in (veb->tc_stats) structure to copy
2332  *
2333  * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to
2334  * one dimensional structure i40e_cp_veb_tc_stats.
2335  * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC
2336  * statistics for the given TC.
2337  **/
2338 static struct i40e_cp_veb_tc_stats
2339 i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i)
2340 {
2341 	struct i40e_cp_veb_tc_stats veb_tc = {
2342 		.tc_rx_packets = tc->tc_rx_packets[i],
2343 		.tc_rx_bytes = tc->tc_rx_bytes[i],
2344 		.tc_tx_packets = tc->tc_tx_packets[i],
2345 		.tc_tx_bytes = tc->tc_tx_bytes[i],
2346 	};
2347 
2348 	return veb_tc;
2349 }
2350 
2351 /**
2352  * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure
2353  * @pf: the PF device structure
2354  * @i: the priority value to copy
2355  *
2356  * The PFC stats are found as arrays in pf->stats, which is not easy to pass
2357  * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure
2358  * of the PFC stats for the given priority.
2359  **/
2360 static inline struct i40e_pfc_stats
2361 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i)
2362 {
2363 #define I40E_GET_PFC_STAT(stat, priority) \
2364 	.stat = pf->stats.stat[priority]
2365 
2366 	struct i40e_pfc_stats pfc = {
2367 		I40E_GET_PFC_STAT(priority_xon_rx, i),
2368 		I40E_GET_PFC_STAT(priority_xoff_rx, i),
2369 		I40E_GET_PFC_STAT(priority_xon_tx, i),
2370 		I40E_GET_PFC_STAT(priority_xoff_tx, i),
2371 		I40E_GET_PFC_STAT(priority_xon_2_xoff, i),
2372 	};
2373 	return pfc;
2374 }
2375 
2376 /**
2377  * i40e_get_ethtool_stats - copy stat values into supplied buffer
2378  * @netdev: the netdev to collect stats for
2379  * @stats: ethtool stats command structure
2380  * @data: ethtool supplied buffer
2381  *
2382  * Copy the stats values for this netdev into the buffer. Expects data to be
2383  * pre-allocated to the size returned by i40e_get_stats_count.. Note that all
2384  * statistics must be copied in a static order, and the count must not change
2385  * for a given netdev. See i40e_get_stats_count for more details.
2386  *
2387  * If a statistic is not currently valid (such as a disabled queue), this
2388  * function reports its value as zero.
2389  **/
2390 static void i40e_get_ethtool_stats(struct net_device *netdev,
2391 				   struct ethtool_stats *stats, u64 *data)
2392 {
2393 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2394 	struct i40e_vsi *vsi = np->vsi;
2395 	struct i40e_pf *pf = vsi->back;
2396 	struct i40e_veb *veb = NULL;
2397 	unsigned int i;
2398 	bool veb_stats;
2399 	u64 *p = data;
2400 
2401 	i40e_update_stats(vsi);
2402 
2403 	i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi),
2404 			       i40e_gstrings_net_stats);
2405 
2406 	i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats);
2407 
2408 	rcu_read_lock();
2409 	for (i = 0; i < netdev->num_tx_queues; i++) {
2410 		i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i]));
2411 		i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i]));
2412 	}
2413 	rcu_read_unlock();
2414 
2415 	if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2416 		goto check_data_pointer;
2417 
2418 	veb_stats = ((pf->lan_veb != I40E_NO_VEB) &&
2419 		     (pf->lan_veb < I40E_MAX_VEB) &&
2420 		     (pf->flags & I40E_FLAG_VEB_STATS_ENABLED));
2421 
2422 	if (veb_stats) {
2423 		veb = pf->veb[pf->lan_veb];
2424 		i40e_update_veb_stats(veb);
2425 	}
2426 
2427 	/* If veb stats aren't enabled, pass NULL instead of the veb so that
2428 	 * we initialize stats to zero and update the data pointer
2429 	 * intelligently
2430 	 */
2431 	i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
2432 			       i40e_gstrings_veb_stats);
2433 
2434 	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2435 		if (veb_stats) {
2436 			struct i40e_cp_veb_tc_stats veb_tc =
2437 				i40e_get_veb_tc_stats(&veb->tc_stats, i);
2438 
2439 			i40e_add_ethtool_stats(&data, &veb_tc,
2440 					       i40e_gstrings_veb_tc_stats);
2441 		} else {
2442 			i40e_add_ethtool_stats(&data, NULL,
2443 					       i40e_gstrings_veb_tc_stats);
2444 		}
2445 
2446 	i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats);
2447 
2448 	for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
2449 		struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i);
2450 
2451 		i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats);
2452 	}
2453 
2454 check_data_pointer:
2455 	WARN_ONCE(data - p != i40e_get_stats_count(netdev),
2456 		  "ethtool stats count mismatch!");
2457 }
2458 
2459 /**
2460  * i40e_get_stat_strings - copy stat strings into supplied buffer
2461  * @netdev: the netdev to collect strings for
2462  * @data: supplied buffer to copy strings into
2463  *
2464  * Copy the strings related to stats for this netdev. Expects data to be
2465  * pre-allocated with the size reported by i40e_get_stats_count. Note that the
2466  * strings must be copied in a static order and the total count must not
2467  * change for a given netdev. See i40e_get_stats_count for more details.
2468  **/
2469 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data)
2470 {
2471 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2472 	struct i40e_vsi *vsi = np->vsi;
2473 	struct i40e_pf *pf = vsi->back;
2474 	unsigned int i;
2475 	u8 *p = data;
2476 
2477 	i40e_add_stat_strings(&data, i40e_gstrings_net_stats);
2478 
2479 	i40e_add_stat_strings(&data, i40e_gstrings_misc_stats);
2480 
2481 	for (i = 0; i < netdev->num_tx_queues; i++) {
2482 		i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2483 				      "tx", i);
2484 		i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2485 				      "rx", i);
2486 	}
2487 
2488 	if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2489 		goto check_data_pointer;
2490 
2491 	i40e_add_stat_strings(&data, i40e_gstrings_veb_stats);
2492 
2493 	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2494 		i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i);
2495 
2496 	i40e_add_stat_strings(&data, i40e_gstrings_stats);
2497 
2498 	for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
2499 		i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i);
2500 
2501 check_data_pointer:
2502 	WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN,
2503 		  "stat strings count mismatch!");
2504 }
2505 
2506 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data)
2507 {
2508 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2509 	struct i40e_vsi *vsi = np->vsi;
2510 	struct i40e_pf *pf = vsi->back;
2511 	unsigned int i;
2512 	u8 *p = data;
2513 
2514 	for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++)
2515 		ethtool_sprintf(&p, i40e_gstrings_priv_flags[i].flag_string);
2516 	if (pf->hw.pf_id != 0)
2517 		return;
2518 	for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++)
2519 		ethtool_sprintf(&p, i40e_gl_gstrings_priv_flags[i].flag_string);
2520 }
2521 
2522 static void i40e_get_strings(struct net_device *netdev, u32 stringset,
2523 			     u8 *data)
2524 {
2525 	switch (stringset) {
2526 	case ETH_SS_TEST:
2527 		memcpy(data, i40e_gstrings_test,
2528 		       I40E_TEST_LEN * ETH_GSTRING_LEN);
2529 		break;
2530 	case ETH_SS_STATS:
2531 		i40e_get_stat_strings(netdev, data);
2532 		break;
2533 	case ETH_SS_PRIV_FLAGS:
2534 		i40e_get_priv_flag_strings(netdev, data);
2535 		break;
2536 	default:
2537 		break;
2538 	}
2539 }
2540 
2541 static int i40e_get_ts_info(struct net_device *dev,
2542 			    struct ethtool_ts_info *info)
2543 {
2544 	struct i40e_pf *pf = i40e_netdev_to_pf(dev);
2545 
2546 	/* only report HW timestamping if PTP is enabled */
2547 	if (!(pf->flags & I40E_FLAG_PTP))
2548 		return ethtool_op_get_ts_info(dev, info);
2549 
2550 	info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2551 				SOF_TIMESTAMPING_RX_SOFTWARE |
2552 				SOF_TIMESTAMPING_SOFTWARE |
2553 				SOF_TIMESTAMPING_TX_HARDWARE |
2554 				SOF_TIMESTAMPING_RX_HARDWARE |
2555 				SOF_TIMESTAMPING_RAW_HARDWARE;
2556 
2557 	if (pf->ptp_clock)
2558 		info->phc_index = ptp_clock_index(pf->ptp_clock);
2559 	else
2560 		info->phc_index = -1;
2561 
2562 	info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
2563 
2564 	info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
2565 			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2566 			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2567 			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
2568 
2569 	if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
2570 		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2571 				    BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2572 				    BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2573 				    BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
2574 				    BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2575 				    BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2576 				    BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2577 				    BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
2578 
2579 	return 0;
2580 }
2581 
2582 static u64 i40e_link_test(struct net_device *netdev, u64 *data)
2583 {
2584 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2585 	struct i40e_pf *pf = np->vsi->back;
2586 	i40e_status status;
2587 	bool link_up = false;
2588 
2589 	netif_info(pf, hw, netdev, "link test\n");
2590 	status = i40e_get_link_status(&pf->hw, &link_up);
2591 	if (status) {
2592 		netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
2593 		*data = 1;
2594 		return *data;
2595 	}
2596 
2597 	if (link_up)
2598 		*data = 0;
2599 	else
2600 		*data = 1;
2601 
2602 	return *data;
2603 }
2604 
2605 static u64 i40e_reg_test(struct net_device *netdev, u64 *data)
2606 {
2607 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2608 	struct i40e_pf *pf = np->vsi->back;
2609 
2610 	netif_info(pf, hw, netdev, "register test\n");
2611 	*data = i40e_diag_reg_test(&pf->hw);
2612 
2613 	return *data;
2614 }
2615 
2616 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data)
2617 {
2618 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2619 	struct i40e_pf *pf = np->vsi->back;
2620 
2621 	netif_info(pf, hw, netdev, "eeprom test\n");
2622 	*data = i40e_diag_eeprom_test(&pf->hw);
2623 
2624 	/* forcebly clear the NVM Update state machine */
2625 	pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
2626 
2627 	return *data;
2628 }
2629 
2630 static u64 i40e_intr_test(struct net_device *netdev, u64 *data)
2631 {
2632 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2633 	struct i40e_pf *pf = np->vsi->back;
2634 	u16 swc_old = pf->sw_int_count;
2635 
2636 	netif_info(pf, hw, netdev, "interrupt test\n");
2637 	wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
2638 	     (I40E_PFINT_DYN_CTL0_INTENA_MASK |
2639 	      I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
2640 	      I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
2641 	      I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
2642 	      I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
2643 	usleep_range(1000, 2000);
2644 	*data = (swc_old == pf->sw_int_count);
2645 
2646 	return *data;
2647 }
2648 
2649 static inline bool i40e_active_vfs(struct i40e_pf *pf)
2650 {
2651 	struct i40e_vf *vfs = pf->vf;
2652 	int i;
2653 
2654 	for (i = 0; i < pf->num_alloc_vfs; i++)
2655 		if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
2656 			return true;
2657 	return false;
2658 }
2659 
2660 static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2661 {
2662 	return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
2663 }
2664 
2665 static void i40e_diag_test(struct net_device *netdev,
2666 			   struct ethtool_test *eth_test, u64 *data)
2667 {
2668 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2669 	bool if_running = netif_running(netdev);
2670 	struct i40e_pf *pf = np->vsi->back;
2671 
2672 	if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2673 		/* Offline tests */
2674 		netif_info(pf, drv, netdev, "offline testing starting\n");
2675 
2676 		set_bit(__I40E_TESTING, pf->state);
2677 
2678 		if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
2679 		    test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
2680 			dev_warn(&pf->pdev->dev,
2681 				 "Cannot start offline testing when PF is in reset state.\n");
2682 			goto skip_ol_tests;
2683 		}
2684 
2685 		if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
2686 			dev_warn(&pf->pdev->dev,
2687 				 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
2688 			goto skip_ol_tests;
2689 		}
2690 
2691 		/* If the device is online then take it offline */
2692 		if (if_running)
2693 			/* indicate we're in test mode */
2694 			i40e_close(netdev);
2695 		else
2696 			/* This reset does not affect link - if it is
2697 			 * changed to a type of reset that does affect
2698 			 * link then the following link test would have
2699 			 * to be moved to before the reset
2700 			 */
2701 			i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2702 
2703 		if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2704 			eth_test->flags |= ETH_TEST_FL_FAILED;
2705 
2706 		if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
2707 			eth_test->flags |= ETH_TEST_FL_FAILED;
2708 
2709 		if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
2710 			eth_test->flags |= ETH_TEST_FL_FAILED;
2711 
2712 		/* run reg test last, a reset is required after it */
2713 		if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2714 			eth_test->flags |= ETH_TEST_FL_FAILED;
2715 
2716 		clear_bit(__I40E_TESTING, pf->state);
2717 		i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2718 
2719 		if (if_running)
2720 			i40e_open(netdev);
2721 	} else {
2722 		/* Online tests */
2723 		netif_info(pf, drv, netdev, "online testing starting\n");
2724 
2725 		if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2726 			eth_test->flags |= ETH_TEST_FL_FAILED;
2727 
2728 		/* Offline only tests, not run in online; pass by default */
2729 		data[I40E_ETH_TEST_REG] = 0;
2730 		data[I40E_ETH_TEST_EEPROM] = 0;
2731 		data[I40E_ETH_TEST_INTR] = 0;
2732 	}
2733 
2734 	netif_info(pf, drv, netdev, "testing finished\n");
2735 	return;
2736 
2737 skip_ol_tests:
2738 	data[I40E_ETH_TEST_REG]		= 1;
2739 	data[I40E_ETH_TEST_EEPROM]	= 1;
2740 	data[I40E_ETH_TEST_INTR]	= 1;
2741 	data[I40E_ETH_TEST_LINK]	= 1;
2742 	eth_test->flags |= ETH_TEST_FL_FAILED;
2743 	clear_bit(__I40E_TESTING, pf->state);
2744 	netif_info(pf, drv, netdev, "testing failed\n");
2745 }
2746 
2747 static void i40e_get_wol(struct net_device *netdev,
2748 			 struct ethtool_wolinfo *wol)
2749 {
2750 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2751 	struct i40e_pf *pf = np->vsi->back;
2752 	struct i40e_hw *hw = &pf->hw;
2753 	u16 wol_nvm_bits;
2754 
2755 	/* NVM bit on means WoL disabled for the port */
2756 	i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2757 	if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
2758 		wol->supported = 0;
2759 		wol->wolopts = 0;
2760 	} else {
2761 		wol->supported = WAKE_MAGIC;
2762 		wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2763 	}
2764 }
2765 
2766 /**
2767  * i40e_set_wol - set the WakeOnLAN configuration
2768  * @netdev: the netdev in question
2769  * @wol: the ethtool WoL setting data
2770  **/
2771 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2772 {
2773 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2774 	struct i40e_pf *pf = np->vsi->back;
2775 	struct i40e_vsi *vsi = np->vsi;
2776 	struct i40e_hw *hw = &pf->hw;
2777 	u16 wol_nvm_bits;
2778 
2779 	/* WoL not supported if this isn't the controlling PF on the port */
2780 	if (hw->partition_id != 1) {
2781 		i40e_partition_setting_complaint(pf);
2782 		return -EOPNOTSUPP;
2783 	}
2784 
2785 	if (vsi != pf->vsi[pf->lan_vsi])
2786 		return -EOPNOTSUPP;
2787 
2788 	/* NVM bit on means WoL disabled for the port */
2789 	i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2790 	if (BIT(hw->port) & wol_nvm_bits)
2791 		return -EOPNOTSUPP;
2792 
2793 	/* only magic packet is supported */
2794 	if (wol->wolopts & ~WAKE_MAGIC)
2795 		return -EOPNOTSUPP;
2796 
2797 	/* is this a new value? */
2798 	if (pf->wol_en != !!wol->wolopts) {
2799 		pf->wol_en = !!wol->wolopts;
2800 		device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2801 	}
2802 
2803 	return 0;
2804 }
2805 
2806 static int i40e_set_phys_id(struct net_device *netdev,
2807 			    enum ethtool_phys_id_state state)
2808 {
2809 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2810 	i40e_status ret = 0;
2811 	struct i40e_pf *pf = np->vsi->back;
2812 	struct i40e_hw *hw = &pf->hw;
2813 	int blink_freq = 2;
2814 	u16 temp_status;
2815 
2816 	switch (state) {
2817 	case ETHTOOL_ID_ACTIVE:
2818 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2819 			pf->led_status = i40e_led_get(hw);
2820 		} else {
2821 			if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2822 				i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2823 						      NULL);
2824 			ret = i40e_led_get_phy(hw, &temp_status,
2825 					       &pf->phy_led_val);
2826 			pf->led_status = temp_status;
2827 		}
2828 		return blink_freq;
2829 	case ETHTOOL_ID_ON:
2830 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2831 			i40e_led_set(hw, 0xf, false);
2832 		else
2833 			ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2834 		break;
2835 	case ETHTOOL_ID_OFF:
2836 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2837 			i40e_led_set(hw, 0x0, false);
2838 		else
2839 			ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2840 		break;
2841 	case ETHTOOL_ID_INACTIVE:
2842 		if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2843 			i40e_led_set(hw, pf->led_status, false);
2844 		} else {
2845 			ret = i40e_led_set_phy(hw, false, pf->led_status,
2846 					       (pf->phy_led_val |
2847 					       I40E_PHY_LED_MODE_ORIG));
2848 			if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2849 				i40e_aq_set_phy_debug(hw, 0, NULL);
2850 		}
2851 		break;
2852 	default:
2853 		break;
2854 	}
2855 	if (ret)
2856 		return -ENOENT;
2857 	else
2858 		return 0;
2859 }
2860 
2861 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2862  * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2863  * 125us (8000 interrupts per second) == ITR(62)
2864  */
2865 
2866 /**
2867  * __i40e_get_coalesce - get per-queue coalesce settings
2868  * @netdev: the netdev to check
2869  * @ec: ethtool coalesce data structure
2870  * @queue: which queue to pick
2871  *
2872  * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2873  * are per queue. If queue is <0 then we default to queue 0 as the
2874  * representative value.
2875  **/
2876 static int __i40e_get_coalesce(struct net_device *netdev,
2877 			       struct ethtool_coalesce *ec,
2878 			       int queue)
2879 {
2880 	struct i40e_netdev_priv *np = netdev_priv(netdev);
2881 	struct i40e_ring *rx_ring, *tx_ring;
2882 	struct i40e_vsi *vsi = np->vsi;
2883 
2884 	ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2885 	ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2886 
2887 	/* rx and tx usecs has per queue value. If user doesn't specify the
2888 	 * queue, return queue 0's value to represent.
2889 	 */
2890 	if (queue < 0)
2891 		queue = 0;
2892 	else if (queue >= vsi->num_queue_pairs)
2893 		return -EINVAL;
2894 
2895 	rx_ring = vsi->rx_rings[queue];
2896 	tx_ring = vsi->tx_rings[queue];
2897 
2898 	if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
2899 		ec->use_adaptive_rx_coalesce = 1;
2900 
2901 	if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
2902 		ec->use_adaptive_tx_coalesce = 1;
2903 
2904 	ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2905 	ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2906 
2907 	/* we use the _usecs_high to store/set the interrupt rate limit
2908 	 * that the hardware supports, that almost but not quite
2909 	 * fits the original intent of the ethtool variable,
2910 	 * the rx_coalesce_usecs_high limits total interrupts
2911 	 * per second from both tx/rx sources.
2912 	 */
2913 	ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2914 	ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2915 
2916 	return 0;
2917 }
2918 
2919 /**
2920  * i40e_get_coalesce - get a netdev's coalesce settings
2921  * @netdev: the netdev to check
2922  * @ec: ethtool coalesce data structure
2923  * @kernel_coal: ethtool CQE mode setting structure
2924  * @extack: extack for reporting error messages
2925  *
2926  * Gets the coalesce settings for a particular netdev. Note that if user has
2927  * modified per-queue settings, this only guarantees to represent queue 0. See
2928  * __i40e_get_coalesce for more details.
2929  **/
2930 static int i40e_get_coalesce(struct net_device *netdev,
2931 			     struct ethtool_coalesce *ec,
2932 			     struct kernel_ethtool_coalesce *kernel_coal,
2933 			     struct netlink_ext_ack *extack)
2934 {
2935 	return __i40e_get_coalesce(netdev, ec, -1);
2936 }
2937 
2938 /**
2939  * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2940  * @netdev: netdev structure
2941  * @ec: ethtool's coalesce settings
2942  * @queue: the particular queue to read
2943  *
2944  * Will read a specific queue's coalesce settings
2945  **/
2946 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2947 				       struct ethtool_coalesce *ec)
2948 {
2949 	return __i40e_get_coalesce(netdev, ec, queue);
2950 }
2951 
2952 /**
2953  * i40e_set_itr_per_queue - set ITR values for specific queue
2954  * @vsi: the VSI to set values for
2955  * @ec: coalesce settings from ethtool
2956  * @queue: the queue to modify
2957  *
2958  * Change the ITR settings for a specific queue.
2959  **/
2960 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2961 				   struct ethtool_coalesce *ec,
2962 				   int queue)
2963 {
2964 	struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2965 	struct i40e_ring *tx_ring = vsi->tx_rings[queue];
2966 	struct i40e_pf *pf = vsi->back;
2967 	struct i40e_hw *hw = &pf->hw;
2968 	struct i40e_q_vector *q_vector;
2969 	u16 intrl;
2970 
2971 	intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2972 
2973 	rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2974 	tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
2975 
2976 	if (ec->use_adaptive_rx_coalesce)
2977 		rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2978 	else
2979 		rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2980 
2981 	if (ec->use_adaptive_tx_coalesce)
2982 		tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2983 	else
2984 		tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2985 
2986 	q_vector = rx_ring->q_vector;
2987 	q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
2988 
2989 	q_vector = tx_ring->q_vector;
2990 	q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
2991 
2992 	/* The interrupt handler itself will take care of programming
2993 	 * the Tx and Rx ITR values based on the values we have entered
2994 	 * into the q_vector, no need to write the values now.
2995 	 */
2996 
2997 	wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
2998 	i40e_flush(hw);
2999 }
3000 
3001 /**
3002  * __i40e_set_coalesce - set coalesce settings for particular queue
3003  * @netdev: the netdev to change
3004  * @ec: ethtool coalesce settings
3005  * @queue: the queue to change
3006  *
3007  * Sets the coalesce settings for a particular queue.
3008  **/
3009 static int __i40e_set_coalesce(struct net_device *netdev,
3010 			       struct ethtool_coalesce *ec,
3011 			       int queue)
3012 {
3013 	struct i40e_netdev_priv *np = netdev_priv(netdev);
3014 	u16 intrl_reg, cur_rx_itr, cur_tx_itr;
3015 	struct i40e_vsi *vsi = np->vsi;
3016 	struct i40e_pf *pf = vsi->back;
3017 	int i;
3018 
3019 	if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
3020 		vsi->work_limit = ec->tx_max_coalesced_frames_irq;
3021 
3022 	if (queue < 0) {
3023 		cur_rx_itr = vsi->rx_rings[0]->itr_setting;
3024 		cur_tx_itr = vsi->tx_rings[0]->itr_setting;
3025 	} else if (queue < vsi->num_queue_pairs) {
3026 		cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
3027 		cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
3028 	} else {
3029 		netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
3030 			   vsi->num_queue_pairs - 1);
3031 		return -EINVAL;
3032 	}
3033 
3034 	cur_tx_itr &= ~I40E_ITR_DYNAMIC;
3035 	cur_rx_itr &= ~I40E_ITR_DYNAMIC;
3036 
3037 	/* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
3038 	if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
3039 		netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
3040 		return -EINVAL;
3041 	}
3042 
3043 	if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
3044 		netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
3045 			   INTRL_REG_TO_USEC(I40E_MAX_INTRL));
3046 		return -EINVAL;
3047 	}
3048 
3049 	if (ec->rx_coalesce_usecs != cur_rx_itr &&
3050 	    ec->use_adaptive_rx_coalesce) {
3051 		netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
3052 		return -EINVAL;
3053 	}
3054 
3055 	if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
3056 		netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
3057 		return -EINVAL;
3058 	}
3059 
3060 	if (ec->tx_coalesce_usecs != cur_tx_itr &&
3061 	    ec->use_adaptive_tx_coalesce) {
3062 		netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
3063 		return -EINVAL;
3064 	}
3065 
3066 	if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
3067 		netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
3068 		return -EINVAL;
3069 	}
3070 
3071 	if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
3072 		ec->rx_coalesce_usecs = I40E_MIN_ITR;
3073 
3074 	if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
3075 		ec->tx_coalesce_usecs = I40E_MIN_ITR;
3076 
3077 	intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
3078 	vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
3079 	if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
3080 		netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
3081 			   vsi->int_rate_limit);
3082 	}
3083 
3084 	/* rx and tx usecs has per queue value. If user doesn't specify the
3085 	 * queue, apply to all queues.
3086 	 */
3087 	if (queue < 0) {
3088 		for (i = 0; i < vsi->num_queue_pairs; i++)
3089 			i40e_set_itr_per_queue(vsi, ec, i);
3090 	} else {
3091 		i40e_set_itr_per_queue(vsi, ec, queue);
3092 	}
3093 
3094 	return 0;
3095 }
3096 
3097 /**
3098  * i40e_set_coalesce - set coalesce settings for every queue on the netdev
3099  * @netdev: the netdev to change
3100  * @ec: ethtool coalesce settings
3101  * @kernel_coal: ethtool CQE mode setting structure
3102  * @extack: extack for reporting error messages
3103  *
3104  * This will set each queue to the same coalesce settings.
3105  **/
3106 static int i40e_set_coalesce(struct net_device *netdev,
3107 			     struct ethtool_coalesce *ec,
3108 			     struct kernel_ethtool_coalesce *kernel_coal,
3109 			     struct netlink_ext_ack *extack)
3110 {
3111 	return __i40e_set_coalesce(netdev, ec, -1);
3112 }
3113 
3114 /**
3115  * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
3116  * @netdev: the netdev to change
3117  * @ec: ethtool's coalesce settings
3118  * @queue: the queue to change
3119  *
3120  * Sets the specified queue's coalesce settings.
3121  **/
3122 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
3123 				       struct ethtool_coalesce *ec)
3124 {
3125 	return __i40e_set_coalesce(netdev, ec, queue);
3126 }
3127 
3128 /**
3129  * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
3130  * @pf: pointer to the physical function struct
3131  * @cmd: ethtool rxnfc command
3132  *
3133  * Returns Success if the flow is supported, else Invalid Input.
3134  **/
3135 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
3136 {
3137 	struct i40e_hw *hw = &pf->hw;
3138 	u8 flow_pctype = 0;
3139 	u64 i_set = 0;
3140 
3141 	cmd->data = 0;
3142 
3143 	switch (cmd->flow_type) {
3144 	case TCP_V4_FLOW:
3145 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3146 		break;
3147 	case UDP_V4_FLOW:
3148 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3149 		break;
3150 	case TCP_V6_FLOW:
3151 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3152 		break;
3153 	case UDP_V6_FLOW:
3154 		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3155 		break;
3156 	case SCTP_V4_FLOW:
3157 	case AH_ESP_V4_FLOW:
3158 	case AH_V4_FLOW:
3159 	case ESP_V4_FLOW:
3160 	case IPV4_FLOW:
3161 	case SCTP_V6_FLOW:
3162 	case AH_ESP_V6_FLOW:
3163 	case AH_V6_FLOW:
3164 	case ESP_V6_FLOW:
3165 	case IPV6_FLOW:
3166 		/* Default is src/dest for IP, no matter the L4 hashing */
3167 		cmd->data |= RXH_IP_SRC | RXH_IP_DST;
3168 		break;
3169 	default:
3170 		return -EINVAL;
3171 	}
3172 
3173 	/* Read flow based hash input set register */
3174 	if (flow_pctype) {
3175 		i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
3176 					      flow_pctype)) |
3177 			((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
3178 					       flow_pctype)) << 32);
3179 	}
3180 
3181 	/* Process bits of hash input set */
3182 	if (i_set) {
3183 		if (i_set & I40E_L4_SRC_MASK)
3184 			cmd->data |= RXH_L4_B_0_1;
3185 		if (i_set & I40E_L4_DST_MASK)
3186 			cmd->data |= RXH_L4_B_2_3;
3187 
3188 		if (cmd->flow_type == TCP_V4_FLOW ||
3189 		    cmd->flow_type == UDP_V4_FLOW) {
3190 			if (hw->mac.type == I40E_MAC_X722) {
3191 				if (i_set & I40E_X722_L3_SRC_MASK)
3192 					cmd->data |= RXH_IP_SRC;
3193 				if (i_set & I40E_X722_L3_DST_MASK)
3194 					cmd->data |= RXH_IP_DST;
3195 			} else {
3196 				if (i_set & I40E_L3_SRC_MASK)
3197 					cmd->data |= RXH_IP_SRC;
3198 				if (i_set & I40E_L3_DST_MASK)
3199 					cmd->data |= RXH_IP_DST;
3200 			}
3201 		} else if (cmd->flow_type == TCP_V6_FLOW ||
3202 			  cmd->flow_type == UDP_V6_FLOW) {
3203 			if (i_set & I40E_L3_V6_SRC_MASK)
3204 				cmd->data |= RXH_IP_SRC;
3205 			if (i_set & I40E_L3_V6_DST_MASK)
3206 				cmd->data |= RXH_IP_DST;
3207 		}
3208 	}
3209 
3210 	return 0;
3211 }
3212 
3213 /**
3214  * i40e_check_mask - Check whether a mask field is set
3215  * @mask: the full mask value
3216  * @field: mask of the field to check
3217  *
3218  * If the given mask is fully set, return positive value. If the mask for the
3219  * field is fully unset, return zero. Otherwise return a negative error code.
3220  **/
3221 static int i40e_check_mask(u64 mask, u64 field)
3222 {
3223 	u64 value = mask & field;
3224 
3225 	if (value == field)
3226 		return 1;
3227 	else if (!value)
3228 		return 0;
3229 	else
3230 		return -1;
3231 }
3232 
3233 /**
3234  * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
3235  * @fsp: pointer to rx flow specification
3236  * @data: pointer to userdef data structure for storage
3237  *
3238  * Read the user-defined data and deconstruct the value into a structure. No
3239  * other code should read the user-defined data, so as to ensure that every
3240  * place consistently reads the value correctly.
3241  *
3242  * The user-defined field is a 64bit Big Endian format value, which we
3243  * deconstruct by reading bits or bit fields from it. Single bit flags shall
3244  * be defined starting from the highest bits, while small bit field values
3245  * shall be defined starting from the lowest bits.
3246  *
3247  * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
3248  * and the filter should be rejected. The data structure will always be
3249  * modified even if FLOW_EXT is not set.
3250  *
3251  **/
3252 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3253 					struct i40e_rx_flow_userdef *data)
3254 {
3255 	u64 value, mask;
3256 	int valid;
3257 
3258 	/* Zero memory first so it's always consistent. */
3259 	memset(data, 0, sizeof(*data));
3260 
3261 	if (!(fsp->flow_type & FLOW_EXT))
3262 		return 0;
3263 
3264 	value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
3265 	mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
3266 
3267 #define I40E_USERDEF_FLEX_WORD		GENMASK_ULL(15, 0)
3268 #define I40E_USERDEF_FLEX_OFFSET	GENMASK_ULL(31, 16)
3269 #define I40E_USERDEF_FLEX_FILTER	GENMASK_ULL(31, 0)
3270 
3271 	valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
3272 	if (valid < 0) {
3273 		return -EINVAL;
3274 	} else if (valid) {
3275 		data->flex_word = value & I40E_USERDEF_FLEX_WORD;
3276 		data->flex_offset =
3277 			(value & I40E_USERDEF_FLEX_OFFSET) >> 16;
3278 		data->flex_filter = true;
3279 	}
3280 
3281 	return 0;
3282 }
3283 
3284 /**
3285  * i40e_fill_rx_flow_user_data - Fill in user-defined data field
3286  * @fsp: pointer to rx_flow specification
3287  * @data: pointer to return userdef data
3288  *
3289  * Reads the userdef data structure and properly fills in the user defined
3290  * fields of the rx_flow_spec.
3291  **/
3292 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3293 					struct i40e_rx_flow_userdef *data)
3294 {
3295 	u64 value = 0, mask = 0;
3296 
3297 	if (data->flex_filter) {
3298 		value |= data->flex_word;
3299 		value |= (u64)data->flex_offset << 16;
3300 		mask |= I40E_USERDEF_FLEX_FILTER;
3301 	}
3302 
3303 	if (value || mask)
3304 		fsp->flow_type |= FLOW_EXT;
3305 
3306 	*((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
3307 	*((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
3308 }
3309 
3310 /**
3311  * i40e_get_ethtool_fdir_all - Populates the rule count of a command
3312  * @pf: Pointer to the physical function struct
3313  * @cmd: The command to get or set Rx flow classification rules
3314  * @rule_locs: Array of used rule locations
3315  *
3316  * This function populates both the total and actual rule count of
3317  * the ethtool flow classification command
3318  *
3319  * Returns 0 on success or -EMSGSIZE if entry not found
3320  **/
3321 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
3322 				     struct ethtool_rxnfc *cmd,
3323 				     u32 *rule_locs)
3324 {
3325 	struct i40e_fdir_filter *rule;
3326 	struct hlist_node *node2;
3327 	int cnt = 0;
3328 
3329 	/* report total rule count */
3330 	cmd->data = i40e_get_fd_cnt_all(pf);
3331 
3332 	hlist_for_each_entry_safe(rule, node2,
3333 				  &pf->fdir_filter_list, fdir_node) {
3334 		if (cnt == cmd->rule_cnt)
3335 			return -EMSGSIZE;
3336 
3337 		rule_locs[cnt] = rule->fd_id;
3338 		cnt++;
3339 	}
3340 
3341 	cmd->rule_cnt = cnt;
3342 
3343 	return 0;
3344 }
3345 
3346 /**
3347  * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
3348  * @pf: Pointer to the physical function struct
3349  * @cmd: The command to get or set Rx flow classification rules
3350  *
3351  * This function looks up a filter based on the Rx flow classification
3352  * command and fills the flow spec info for it if found
3353  *
3354  * Returns 0 on success or -EINVAL if filter not found
3355  **/
3356 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
3357 				       struct ethtool_rxnfc *cmd)
3358 {
3359 	struct ethtool_rx_flow_spec *fsp =
3360 			(struct ethtool_rx_flow_spec *)&cmd->fs;
3361 	struct i40e_rx_flow_userdef userdef = {0};
3362 	struct i40e_fdir_filter *rule = NULL;
3363 	struct hlist_node *node2;
3364 	u64 input_set;
3365 	u16 index;
3366 
3367 	hlist_for_each_entry_safe(rule, node2,
3368 				  &pf->fdir_filter_list, fdir_node) {
3369 		if (fsp->location <= rule->fd_id)
3370 			break;
3371 	}
3372 
3373 	if (!rule || fsp->location != rule->fd_id)
3374 		return -EINVAL;
3375 
3376 	fsp->flow_type = rule->flow_type;
3377 	if (fsp->flow_type == IP_USER_FLOW) {
3378 		fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
3379 		fsp->h_u.usr_ip4_spec.proto = 0;
3380 		fsp->m_u.usr_ip4_spec.proto = 0;
3381 	}
3382 
3383 	if (fsp->flow_type == IPV6_USER_FLOW ||
3384 	    fsp->flow_type == UDP_V6_FLOW ||
3385 	    fsp->flow_type == TCP_V6_FLOW ||
3386 	    fsp->flow_type == SCTP_V6_FLOW) {
3387 		/* Reverse the src and dest notion, since the HW views them
3388 		 * from Tx perspective where as the user expects it from
3389 		 * Rx filter view.
3390 		 */
3391 		fsp->h_u.tcp_ip6_spec.psrc = rule->dst_port;
3392 		fsp->h_u.tcp_ip6_spec.pdst = rule->src_port;
3393 		memcpy(fsp->h_u.tcp_ip6_spec.ip6dst, rule->src_ip6,
3394 		       sizeof(__be32) * 4);
3395 		memcpy(fsp->h_u.tcp_ip6_spec.ip6src, rule->dst_ip6,
3396 		       sizeof(__be32) * 4);
3397 	} else {
3398 		/* Reverse the src and dest notion, since the HW views them
3399 		 * from Tx perspective where as the user expects it from
3400 		 * Rx filter view.
3401 		 */
3402 		fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
3403 		fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
3404 		fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
3405 		fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
3406 	}
3407 
3408 	switch (rule->flow_type) {
3409 	case SCTP_V4_FLOW:
3410 		index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3411 		break;
3412 	case TCP_V4_FLOW:
3413 		index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3414 		break;
3415 	case UDP_V4_FLOW:
3416 		index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3417 		break;
3418 	case SCTP_V6_FLOW:
3419 		index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
3420 		break;
3421 	case TCP_V6_FLOW:
3422 		index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3423 		break;
3424 	case UDP_V6_FLOW:
3425 		index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3426 		break;
3427 	case IP_USER_FLOW:
3428 		index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3429 		break;
3430 	case IPV6_USER_FLOW:
3431 		index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
3432 		break;
3433 	default:
3434 		/* If we have stored a filter with a flow type not listed here
3435 		 * it is almost certainly a driver bug. WARN(), and then
3436 		 * assign the input_set as if all fields are enabled to avoid
3437 		 * reading unassigned memory.
3438 		 */
3439 		WARN(1, "Missing input set index for flow_type %d\n",
3440 		     rule->flow_type);
3441 		input_set = 0xFFFFFFFFFFFFFFFFULL;
3442 		goto no_input_set;
3443 	}
3444 
3445 	input_set = i40e_read_fd_input_set(pf, index);
3446 
3447 no_input_set:
3448 	if (input_set & I40E_L3_V6_SRC_MASK) {
3449 		fsp->m_u.tcp_ip6_spec.ip6src[0] = htonl(0xFFFFFFFF);
3450 		fsp->m_u.tcp_ip6_spec.ip6src[1] = htonl(0xFFFFFFFF);
3451 		fsp->m_u.tcp_ip6_spec.ip6src[2] = htonl(0xFFFFFFFF);
3452 		fsp->m_u.tcp_ip6_spec.ip6src[3] = htonl(0xFFFFFFFF);
3453 	}
3454 
3455 	if (input_set & I40E_L3_V6_DST_MASK) {
3456 		fsp->m_u.tcp_ip6_spec.ip6dst[0] = htonl(0xFFFFFFFF);
3457 		fsp->m_u.tcp_ip6_spec.ip6dst[1] = htonl(0xFFFFFFFF);
3458 		fsp->m_u.tcp_ip6_spec.ip6dst[2] = htonl(0xFFFFFFFF);
3459 		fsp->m_u.tcp_ip6_spec.ip6dst[3] = htonl(0xFFFFFFFF);
3460 	}
3461 
3462 	if (input_set & I40E_L3_SRC_MASK)
3463 		fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
3464 
3465 	if (input_set & I40E_L3_DST_MASK)
3466 		fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
3467 
3468 	if (input_set & I40E_L4_SRC_MASK)
3469 		fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
3470 
3471 	if (input_set & I40E_L4_DST_MASK)
3472 		fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
3473 
3474 	if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
3475 		fsp->ring_cookie = RX_CLS_FLOW_DISC;
3476 	else
3477 		fsp->ring_cookie = rule->q_index;
3478 
3479 	if (rule->vlan_tag) {
3480 		fsp->h_ext.vlan_etype = rule->vlan_etype;
3481 		fsp->m_ext.vlan_etype = htons(0xFFFF);
3482 		fsp->h_ext.vlan_tci = rule->vlan_tag;
3483 		fsp->m_ext.vlan_tci = htons(0xFFFF);
3484 		fsp->flow_type |= FLOW_EXT;
3485 	}
3486 
3487 	if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
3488 		struct i40e_vsi *vsi;
3489 
3490 		vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
3491 		if (vsi && vsi->type == I40E_VSI_SRIOV) {
3492 			/* VFs are zero-indexed by the driver, but ethtool
3493 			 * expects them to be one-indexed, so add one here
3494 			 */
3495 			u64 ring_vf = vsi->vf_id + 1;
3496 
3497 			ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
3498 			fsp->ring_cookie |= ring_vf;
3499 		}
3500 	}
3501 
3502 	if (rule->flex_filter) {
3503 		userdef.flex_filter = true;
3504 		userdef.flex_word = be16_to_cpu(rule->flex_word);
3505 		userdef.flex_offset = rule->flex_offset;
3506 	}
3507 
3508 	i40e_fill_rx_flow_user_data(fsp, &userdef);
3509 
3510 	return 0;
3511 }
3512 
3513 /**
3514  * i40e_get_rxnfc - command to get RX flow classification rules
3515  * @netdev: network interface device structure
3516  * @cmd: ethtool rxnfc command
3517  * @rule_locs: pointer to store rule data
3518  *
3519  * Returns Success if the command is supported.
3520  **/
3521 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
3522 			  u32 *rule_locs)
3523 {
3524 	struct i40e_netdev_priv *np = netdev_priv(netdev);
3525 	struct i40e_vsi *vsi = np->vsi;
3526 	struct i40e_pf *pf = vsi->back;
3527 	int ret = -EOPNOTSUPP;
3528 
3529 	switch (cmd->cmd) {
3530 	case ETHTOOL_GRXRINGS:
3531 		cmd->data = vsi->rss_size;
3532 		ret = 0;
3533 		break;
3534 	case ETHTOOL_GRXFH:
3535 		ret = i40e_get_rss_hash_opts(pf, cmd);
3536 		break;
3537 	case ETHTOOL_GRXCLSRLCNT:
3538 		cmd->rule_cnt = pf->fdir_pf_active_filters;
3539 		/* report total rule count */
3540 		cmd->data = i40e_get_fd_cnt_all(pf);
3541 		ret = 0;
3542 		break;
3543 	case ETHTOOL_GRXCLSRULE:
3544 		ret = i40e_get_ethtool_fdir_entry(pf, cmd);
3545 		break;
3546 	case ETHTOOL_GRXCLSRLALL:
3547 		ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
3548 		break;
3549 	default:
3550 		break;
3551 	}
3552 
3553 	return ret;
3554 }
3555 
3556 /**
3557  * i40e_get_rss_hash_bits - Read RSS Hash bits from register
3558  * @hw: hw structure
3559  * @nfc: pointer to user request
3560  * @i_setc: bits currently set
3561  *
3562  * Returns value of bits to be set per user request
3563  **/
3564 static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
3565 				  struct ethtool_rxnfc *nfc,
3566 				  u64 i_setc)
3567 {
3568 	u64 i_set = i_setc;
3569 	u64 src_l3 = 0, dst_l3 = 0;
3570 
3571 	if (nfc->data & RXH_L4_B_0_1)
3572 		i_set |= I40E_L4_SRC_MASK;
3573 	else
3574 		i_set &= ~I40E_L4_SRC_MASK;
3575 	if (nfc->data & RXH_L4_B_2_3)
3576 		i_set |= I40E_L4_DST_MASK;
3577 	else
3578 		i_set &= ~I40E_L4_DST_MASK;
3579 
3580 	if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
3581 		src_l3 = I40E_L3_V6_SRC_MASK;
3582 		dst_l3 = I40E_L3_V6_DST_MASK;
3583 	} else if (nfc->flow_type == TCP_V4_FLOW ||
3584 		  nfc->flow_type == UDP_V4_FLOW) {
3585 		if (hw->mac.type == I40E_MAC_X722) {
3586 			src_l3 = I40E_X722_L3_SRC_MASK;
3587 			dst_l3 = I40E_X722_L3_DST_MASK;
3588 		} else {
3589 			src_l3 = I40E_L3_SRC_MASK;
3590 			dst_l3 = I40E_L3_DST_MASK;
3591 		}
3592 	} else {
3593 		/* Any other flow type are not supported here */
3594 		return i_set;
3595 	}
3596 
3597 	if (nfc->data & RXH_IP_SRC)
3598 		i_set |= src_l3;
3599 	else
3600 		i_set &= ~src_l3;
3601 	if (nfc->data & RXH_IP_DST)
3602 		i_set |= dst_l3;
3603 	else
3604 		i_set &= ~dst_l3;
3605 
3606 	return i_set;
3607 }
3608 
3609 #define FLOW_PCTYPES_SIZE 64
3610 /**
3611  * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
3612  * @pf: pointer to the physical function struct
3613  * @nfc: ethtool rxnfc command
3614  *
3615  * Returns Success if the flow input set is supported.
3616  **/
3617 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
3618 {
3619 	struct i40e_hw *hw = &pf->hw;
3620 	u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
3621 		   ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
3622 	DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE);
3623 	u64 i_set, i_setc;
3624 
3625 	bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE);
3626 
3627 	if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3628 		dev_err(&pf->pdev->dev,
3629 			"Change of RSS hash input set is not supported when MFP mode is enabled\n");
3630 		return -EOPNOTSUPP;
3631 	}
3632 
3633 	/* RSS does not support anything other than hashing
3634 	 * to queues on src and dst IPs and ports
3635 	 */
3636 	if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3637 			  RXH_L4_B_0_1 | RXH_L4_B_2_3))
3638 		return -EINVAL;
3639 
3640 	switch (nfc->flow_type) {
3641 	case TCP_V4_FLOW:
3642 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);
3643 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3644 			set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,
3645 				flow_pctypes);
3646 		break;
3647 	case TCP_V6_FLOW:
3648 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);
3649 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
3650 			set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,
3651 				flow_pctypes);
3652 		break;
3653 	case UDP_V4_FLOW:
3654 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);
3655 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
3656 			set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,
3657 				flow_pctypes);
3658 			set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,
3659 				flow_pctypes);
3660 		}
3661 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3662 		break;
3663 	case UDP_V6_FLOW:
3664 		set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);
3665 		if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
3666 			set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,
3667 				flow_pctypes);
3668 			set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,
3669 				flow_pctypes);
3670 		}
3671 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3672 		break;
3673 	case AH_ESP_V4_FLOW:
3674 	case AH_V4_FLOW:
3675 	case ESP_V4_FLOW:
3676 	case SCTP_V4_FLOW:
3677 		if ((nfc->data & RXH_L4_B_0_1) ||
3678 		    (nfc->data & RXH_L4_B_2_3))
3679 			return -EINVAL;
3680 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
3681 		break;
3682 	case AH_ESP_V6_FLOW:
3683 	case AH_V6_FLOW:
3684 	case ESP_V6_FLOW:
3685 	case SCTP_V6_FLOW:
3686 		if ((nfc->data & RXH_L4_B_0_1) ||
3687 		    (nfc->data & RXH_L4_B_2_3))
3688 			return -EINVAL;
3689 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
3690 		break;
3691 	case IPV4_FLOW:
3692 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
3693 			BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3694 		break;
3695 	case IPV6_FLOW:
3696 		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
3697 			BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3698 		break;
3699 	default:
3700 		return -EINVAL;
3701 	}
3702 
3703 	if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) {
3704 		u8 flow_id;
3705 
3706 		for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) {
3707 			i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) |
3708 				 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32);
3709 			i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
3710 
3711 			i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id),
3712 					  (u32)i_set);
3713 			i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id),
3714 					  (u32)(i_set >> 32));
3715 			hena |= BIT_ULL(flow_id);
3716 		}
3717 	}
3718 
3719 	i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
3720 	i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
3721 	i40e_flush(hw);
3722 
3723 	return 0;
3724 }
3725 
3726 /**
3727  * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
3728  * @vsi: Pointer to the targeted VSI
3729  * @input: The filter to update or NULL to indicate deletion
3730  * @sw_idx: Software index to the filter
3731  * @cmd: The command to get or set Rx flow classification rules
3732  *
3733  * This function updates (or deletes) a Flow Director entry from
3734  * the hlist of the corresponding PF
3735  *
3736  * Returns 0 on success
3737  **/
3738 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3739 					  struct i40e_fdir_filter *input,
3740 					  u16 sw_idx,
3741 					  struct ethtool_rxnfc *cmd)
3742 {
3743 	struct i40e_fdir_filter *rule, *parent;
3744 	struct i40e_pf *pf = vsi->back;
3745 	struct hlist_node *node2;
3746 	int err = -EINVAL;
3747 
3748 	parent = NULL;
3749 	rule = NULL;
3750 
3751 	hlist_for_each_entry_safe(rule, node2,
3752 				  &pf->fdir_filter_list, fdir_node) {
3753 		/* hash found, or no matching entry */
3754 		if (rule->fd_id >= sw_idx)
3755 			break;
3756 		parent = rule;
3757 	}
3758 
3759 	/* if there is an old rule occupying our place remove it */
3760 	if (rule && (rule->fd_id == sw_idx)) {
3761 		/* Remove this rule, since we're either deleting it, or
3762 		 * replacing it.
3763 		 */
3764 		err = i40e_add_del_fdir(vsi, rule, false);
3765 		hlist_del(&rule->fdir_node);
3766 		kfree(rule);
3767 		pf->fdir_pf_active_filters--;
3768 	}
3769 
3770 	/* If we weren't given an input, this is a delete, so just return the
3771 	 * error code indicating if there was an entry at the requested slot
3772 	 */
3773 	if (!input)
3774 		return err;
3775 
3776 	/* Otherwise, install the new rule as requested */
3777 	INIT_HLIST_NODE(&input->fdir_node);
3778 
3779 	/* add filter to the list */
3780 	if (parent)
3781 		hlist_add_behind(&input->fdir_node, &parent->fdir_node);
3782 	else
3783 		hlist_add_head(&input->fdir_node,
3784 			       &pf->fdir_filter_list);
3785 
3786 	/* update counts */
3787 	pf->fdir_pf_active_filters++;
3788 
3789 	return 0;
3790 }
3791 
3792 /**
3793  * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3794  * @pf: pointer to PF structure
3795  *
3796  * This function searches the list of filters and determines which FLX_PIT
3797  * entries are still required. It will prune any entries which are no longer
3798  * in use after the deletion.
3799  **/
3800 static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3801 {
3802 	struct i40e_flex_pit *entry, *tmp;
3803 	struct i40e_fdir_filter *rule;
3804 
3805 	/* First, we'll check the l3 table */
3806 	list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3807 		bool found = false;
3808 
3809 		hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3810 			if (rule->flow_type != IP_USER_FLOW)
3811 				continue;
3812 			if (rule->flex_filter &&
3813 			    rule->flex_offset == entry->src_offset) {
3814 				found = true;
3815 				break;
3816 			}
3817 		}
3818 
3819 		/* If we didn't find the filter, then we can prune this entry
3820 		 * from the list.
3821 		 */
3822 		if (!found) {
3823 			list_del(&entry->list);
3824 			kfree(entry);
3825 		}
3826 	}
3827 
3828 	/* Followed by the L4 table */
3829 	list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3830 		bool found = false;
3831 
3832 		hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3833 			/* Skip this filter if it's L3, since we already
3834 			 * checked those in the above loop
3835 			 */
3836 			if (rule->flow_type == IP_USER_FLOW)
3837 				continue;
3838 			if (rule->flex_filter &&
3839 			    rule->flex_offset == entry->src_offset) {
3840 				found = true;
3841 				break;
3842 			}
3843 		}
3844 
3845 		/* If we didn't find the filter, then we can prune this entry
3846 		 * from the list.
3847 		 */
3848 		if (!found) {
3849 			list_del(&entry->list);
3850 			kfree(entry);
3851 		}
3852 	}
3853 }
3854 
3855 /**
3856  * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3857  * @vsi: Pointer to the targeted VSI
3858  * @cmd: The command to get or set Rx flow classification rules
3859  *
3860  * The function removes a Flow Director filter entry from the
3861  * hlist of the corresponding PF
3862  *
3863  * Returns 0 on success
3864  */
3865 static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3866 			       struct ethtool_rxnfc *cmd)
3867 {
3868 	struct ethtool_rx_flow_spec *fsp =
3869 		(struct ethtool_rx_flow_spec *)&cmd->fs;
3870 	struct i40e_pf *pf = vsi->back;
3871 	int ret = 0;
3872 
3873 	if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3874 	    test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3875 		return -EBUSY;
3876 
3877 	if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3878 		return -EBUSY;
3879 
3880 	ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
3881 
3882 	i40e_prune_flex_pit_list(pf);
3883 
3884 	i40e_fdir_check_and_reenable(pf);
3885 	return ret;
3886 }
3887 
3888 /**
3889  * i40e_unused_pit_index - Find an unused PIT index for given list
3890  * @pf: the PF data structure
3891  *
3892  * Find the first unused flexible PIT index entry. We search both the L3 and
3893  * L4 flexible PIT lists so that the returned index is unique and unused by
3894  * either currently programmed L3 or L4 filters. We use a bit field as storage
3895  * to track which indexes are already used.
3896  **/
3897 static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3898 {
3899 	unsigned long available_index = 0xFF;
3900 	struct i40e_flex_pit *entry;
3901 
3902 	/* We need to make sure that the new index isn't in use by either L3
3903 	 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3904 	 * L4 to use the same index.
3905 	 */
3906 
3907 	list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3908 		clear_bit(entry->pit_index, &available_index);
3909 
3910 	list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3911 		clear_bit(entry->pit_index, &available_index);
3912 
3913 	return find_first_bit(&available_index, 8);
3914 }
3915 
3916 /**
3917  * i40e_find_flex_offset - Find an existing flex src_offset
3918  * @flex_pit_list: L3 or L4 flex PIT list
3919  * @src_offset: new src_offset to find
3920  *
3921  * Searches the flex_pit_list for an existing offset. If no offset is
3922  * currently programmed, then this will return an ERR_PTR if there is no space
3923  * to add a new offset, otherwise it returns NULL.
3924  **/
3925 static
3926 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3927 					    u16 src_offset)
3928 {
3929 	struct i40e_flex_pit *entry;
3930 	int size = 0;
3931 
3932 	/* Search for the src_offset first. If we find a matching entry
3933 	 * already programmed, we can simply re-use it.
3934 	 */
3935 	list_for_each_entry(entry, flex_pit_list, list) {
3936 		size++;
3937 		if (entry->src_offset == src_offset)
3938 			return entry;
3939 	}
3940 
3941 	/* If we haven't found an entry yet, then the provided src offset has
3942 	 * not yet been programmed. We will program the src offset later on,
3943 	 * but we need to indicate whether there is enough space to do so
3944 	 * here. We'll make use of ERR_PTR for this purpose.
3945 	 */
3946 	if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3947 		return ERR_PTR(-ENOSPC);
3948 
3949 	return NULL;
3950 }
3951 
3952 /**
3953  * i40e_add_flex_offset - Add src_offset to flex PIT table list
3954  * @flex_pit_list: L3 or L4 flex PIT list
3955  * @src_offset: new src_offset to add
3956  * @pit_index: the PIT index to program
3957  *
3958  * This function programs the new src_offset to the list. It is expected that
3959  * i40e_find_flex_offset has already been tried and returned NULL, indicating
3960  * that this offset is not programmed, and that the list has enough space to
3961  * store another offset.
3962  *
3963  * Returns 0 on success, and negative value on error.
3964  **/
3965 static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3966 				u16 src_offset,
3967 				u8 pit_index)
3968 {
3969 	struct i40e_flex_pit *new_pit, *entry;
3970 
3971 	new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3972 	if (!new_pit)
3973 		return -ENOMEM;
3974 
3975 	new_pit->src_offset = src_offset;
3976 	new_pit->pit_index = pit_index;
3977 
3978 	/* We need to insert this item such that the list is sorted by
3979 	 * src_offset in ascending order.
3980 	 */
3981 	list_for_each_entry(entry, flex_pit_list, list) {
3982 		if (new_pit->src_offset < entry->src_offset) {
3983 			list_add_tail(&new_pit->list, &entry->list);
3984 			return 0;
3985 		}
3986 
3987 		/* If we found an entry with our offset already programmed we
3988 		 * can simply return here, after freeing the memory. However,
3989 		 * if the pit_index does not match we need to report an error.
3990 		 */
3991 		if (new_pit->src_offset == entry->src_offset) {
3992 			int err = 0;
3993 
3994 			/* If the PIT index is not the same we can't re-use
3995 			 * the entry, so we must report an error.
3996 			 */
3997 			if (new_pit->pit_index != entry->pit_index)
3998 				err = -EINVAL;
3999 
4000 			kfree(new_pit);
4001 			return err;
4002 		}
4003 	}
4004 
4005 	/* If we reached here, then we haven't yet added the item. This means
4006 	 * that we should add the item at the end of the list.
4007 	 */
4008 	list_add_tail(&new_pit->list, flex_pit_list);
4009 	return 0;
4010 }
4011 
4012 /**
4013  * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
4014  * @pf: Pointer to the PF structure
4015  * @flex_pit_list: list of flexible src offsets in use
4016  * @flex_pit_start: index to first entry for this section of the table
4017  *
4018  * In order to handle flexible data, the hardware uses a table of values
4019  * called the FLX_PIT table. This table is used to indicate which sections of
4020  * the input correspond to what PIT index values. Unfortunately, hardware is
4021  * very restrictive about programming this table. Entries must be ordered by
4022  * src_offset in ascending order, without duplicates. Additionally, unused
4023  * entries must be set to the unused index value, and must have valid size and
4024  * length according to the src_offset ordering.
4025  *
4026  * This function will reprogram the FLX_PIT register from a book-keeping
4027  * structure that we guarantee is already ordered correctly, and has no more
4028  * than 3 entries.
4029  *
4030  * To make things easier, we only support flexible values of one word length,
4031  * rather than allowing variable length flexible values.
4032  **/
4033 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
4034 				      struct list_head *flex_pit_list,
4035 				      int flex_pit_start)
4036 {
4037 	struct i40e_flex_pit *entry = NULL;
4038 	u16 last_offset = 0;
4039 	int i = 0, j = 0;
4040 
4041 	/* First, loop over the list of flex PIT entries, and reprogram the
4042 	 * registers.
4043 	 */
4044 	list_for_each_entry(entry, flex_pit_list, list) {
4045 		/* We have to be careful when programming values for the
4046 		 * largest SRC_OFFSET value. It is possible that adding
4047 		 * additional empty values at the end would overflow the space
4048 		 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
4049 		 * we check here and add the empty values prior to adding the
4050 		 * largest value.
4051 		 *
4052 		 * To determine this, we will use a loop from i+1 to 3, which
4053 		 * will determine whether the unused entries would have valid
4054 		 * SRC_OFFSET. Note that there cannot be extra entries past
4055 		 * this value, because the only valid values would have been
4056 		 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
4057 		 * have been added to the list in the first place.
4058 		 */
4059 		for (j = i + 1; j < 3; j++) {
4060 			u16 offset = entry->src_offset + j;
4061 			int index = flex_pit_start + i;
4062 			u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
4063 						       1,
4064 						       offset - 3);
4065 
4066 			if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
4067 				i40e_write_rx_ctl(&pf->hw,
4068 						  I40E_PRTQF_FLX_PIT(index),
4069 						  value);
4070 				i++;
4071 			}
4072 		}
4073 
4074 		/* Now, we can program the actual value into the table */
4075 		i40e_write_rx_ctl(&pf->hw,
4076 				  I40E_PRTQF_FLX_PIT(flex_pit_start + i),
4077 				  I40E_FLEX_PREP_VAL(entry->pit_index + 50,
4078 						     1,
4079 						     entry->src_offset));
4080 		i++;
4081 	}
4082 
4083 	/* In order to program the last entries in the table, we need to
4084 	 * determine the valid offset. If the list is empty, we'll just start
4085 	 * with 0. Otherwise, we'll start with the last item offset and add 1.
4086 	 * This ensures that all entries have valid sizes. If we don't do this
4087 	 * correctly, the hardware will disable flexible field parsing.
4088 	 */
4089 	if (!list_empty(flex_pit_list))
4090 		last_offset = list_prev_entry(entry, list)->src_offset + 1;
4091 
4092 	for (; i < 3; i++, last_offset++) {
4093 		i40e_write_rx_ctl(&pf->hw,
4094 				  I40E_PRTQF_FLX_PIT(flex_pit_start + i),
4095 				  I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
4096 						     1,
4097 						     last_offset));
4098 	}
4099 }
4100 
4101 /**
4102  * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
4103  * @pf: pointer to the PF structure
4104  *
4105  * This function reprograms both the L3 and L4 FLX_PIT tables. See the
4106  * internal helper function for implementation details.
4107  **/
4108 static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
4109 {
4110 	__i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
4111 				  I40E_FLEX_PIT_IDX_START_L3);
4112 
4113 	__i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
4114 				  I40E_FLEX_PIT_IDX_START_L4);
4115 
4116 	/* We also need to program the L3 and L4 GLQF ORT register */
4117 	i40e_write_rx_ctl(&pf->hw,
4118 			  I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
4119 			  I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
4120 					    3, 1));
4121 
4122 	i40e_write_rx_ctl(&pf->hw,
4123 			  I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
4124 			  I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
4125 					    3, 1));
4126 }
4127 
4128 /**
4129  * i40e_flow_str - Converts a flow_type into a human readable string
4130  * @fsp: the flow specification
4131  *
4132  * Currently only flow types we support are included here, and the string
4133  * value attempts to match what ethtool would use to configure this flow type.
4134  **/
4135 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
4136 {
4137 	switch (fsp->flow_type & ~FLOW_EXT) {
4138 	case TCP_V4_FLOW:
4139 		return "tcp4";
4140 	case UDP_V4_FLOW:
4141 		return "udp4";
4142 	case SCTP_V4_FLOW:
4143 		return "sctp4";
4144 	case IP_USER_FLOW:
4145 		return "ip4";
4146 	case TCP_V6_FLOW:
4147 		return "tcp6";
4148 	case UDP_V6_FLOW:
4149 		return "udp6";
4150 	case SCTP_V6_FLOW:
4151 		return "sctp6";
4152 	case IPV6_USER_FLOW:
4153 		return "ip6";
4154 	default:
4155 		return "unknown";
4156 	}
4157 }
4158 
4159 /**
4160  * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
4161  * @pit_index: PIT index to convert
4162  *
4163  * Returns the mask for a given PIT index. Will return 0 if the pit_index is
4164  * of range.
4165  **/
4166 static u64 i40e_pit_index_to_mask(int pit_index)
4167 {
4168 	switch (pit_index) {
4169 	case 0:
4170 		return I40E_FLEX_50_MASK;
4171 	case 1:
4172 		return I40E_FLEX_51_MASK;
4173 	case 2:
4174 		return I40E_FLEX_52_MASK;
4175 	case 3:
4176 		return I40E_FLEX_53_MASK;
4177 	case 4:
4178 		return I40E_FLEX_54_MASK;
4179 	case 5:
4180 		return I40E_FLEX_55_MASK;
4181 	case 6:
4182 		return I40E_FLEX_56_MASK;
4183 	case 7:
4184 		return I40E_FLEX_57_MASK;
4185 	default:
4186 		return 0;
4187 	}
4188 }
4189 
4190 /**
4191  * i40e_print_input_set - Show changes between two input sets
4192  * @vsi: the vsi being configured
4193  * @old: the old input set
4194  * @new: the new input set
4195  *
4196  * Print the difference between old and new input sets by showing which series
4197  * of words are toggled on or off. Only displays the bits we actually support
4198  * changing.
4199  **/
4200 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
4201 {
4202 	struct i40e_pf *pf = vsi->back;
4203 	bool old_value, new_value;
4204 	int i;
4205 
4206 	old_value = !!(old & I40E_L3_SRC_MASK);
4207 	new_value = !!(new & I40E_L3_SRC_MASK);
4208 	if (old_value != new_value)
4209 		netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
4210 			   old_value ? "ON" : "OFF",
4211 			   new_value ? "ON" : "OFF");
4212 
4213 	old_value = !!(old & I40E_L3_DST_MASK);
4214 	new_value = !!(new & I40E_L3_DST_MASK);
4215 	if (old_value != new_value)
4216 		netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
4217 			   old_value ? "ON" : "OFF",
4218 			   new_value ? "ON" : "OFF");
4219 
4220 	old_value = !!(old & I40E_L4_SRC_MASK);
4221 	new_value = !!(new & I40E_L4_SRC_MASK);
4222 	if (old_value != new_value)
4223 		netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
4224 			   old_value ? "ON" : "OFF",
4225 			   new_value ? "ON" : "OFF");
4226 
4227 	old_value = !!(old & I40E_L4_DST_MASK);
4228 	new_value = !!(new & I40E_L4_DST_MASK);
4229 	if (old_value != new_value)
4230 		netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
4231 			   old_value ? "ON" : "OFF",
4232 			   new_value ? "ON" : "OFF");
4233 
4234 	old_value = !!(old & I40E_VERIFY_TAG_MASK);
4235 	new_value = !!(new & I40E_VERIFY_TAG_MASK);
4236 	if (old_value != new_value)
4237 		netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
4238 			   old_value ? "ON" : "OFF",
4239 			   new_value ? "ON" : "OFF");
4240 
4241 	/* Show change of flexible filter entries */
4242 	for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
4243 		u64 flex_mask = i40e_pit_index_to_mask(i);
4244 
4245 		old_value = !!(old & flex_mask);
4246 		new_value = !!(new & flex_mask);
4247 		if (old_value != new_value)
4248 			netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
4249 				   i,
4250 				   old_value ? "ON" : "OFF",
4251 				   new_value ? "ON" : "OFF");
4252 	}
4253 
4254 	netif_info(pf, drv, vsi->netdev, "  Current input set: %0llx\n",
4255 		   old);
4256 	netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
4257 		   new);
4258 }
4259 
4260 /**
4261  * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
4262  * @vsi: pointer to the targeted VSI
4263  * @fsp: pointer to Rx flow specification
4264  * @userdef: userdefined data from flow specification
4265  *
4266  * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
4267  * for partial matches exists with a few limitations. First, hardware only
4268  * supports masking by word boundary (2 bytes) and not per individual bit.
4269  * Second, hardware is limited to using one mask for a flow type and cannot
4270  * use a separate mask for each filter.
4271  *
4272  * To support these limitations, if we already have a configured filter for
4273  * the specified type, this function enforces that new filters of the type
4274  * match the configured input set. Otherwise, if we do not have a filter of
4275  * the specified type, we allow the input set to be updated to match the
4276  * desired filter.
4277  *
4278  * To help ensure that administrators understand why filters weren't displayed
4279  * as supported, we print a diagnostic message displaying how the input set
4280  * would change and warning to delete the preexisting filters if required.
4281  *
4282  * Returns 0 on successful input set match, and a negative return code on
4283  * failure.
4284  **/
4285 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
4286 				     struct ethtool_rx_flow_spec *fsp,
4287 				     struct i40e_rx_flow_userdef *userdef)
4288 {
4289 	static const __be32 ipv6_full_mask[4] = {cpu_to_be32(0xffffffff),
4290 		cpu_to_be32(0xffffffff), cpu_to_be32(0xffffffff),
4291 		cpu_to_be32(0xffffffff)};
4292 	struct ethtool_tcpip6_spec *tcp_ip6_spec;
4293 	struct ethtool_usrip6_spec *usr_ip6_spec;
4294 	struct ethtool_tcpip4_spec *tcp_ip4_spec;
4295 	struct ethtool_usrip4_spec *usr_ip4_spec;
4296 	struct i40e_pf *pf = vsi->back;
4297 	u64 current_mask, new_mask;
4298 	bool new_flex_offset = false;
4299 	bool flex_l3 = false;
4300 	u16 *fdir_filter_count;
4301 	u16 index, src_offset = 0;
4302 	u8 pit_index = 0;
4303 	int err;
4304 
4305 	switch (fsp->flow_type & ~FLOW_EXT) {
4306 	case SCTP_V4_FLOW:
4307 		index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
4308 		fdir_filter_count = &pf->fd_sctp4_filter_cnt;
4309 		break;
4310 	case TCP_V4_FLOW:
4311 		index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
4312 		fdir_filter_count = &pf->fd_tcp4_filter_cnt;
4313 		break;
4314 	case UDP_V4_FLOW:
4315 		index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
4316 		fdir_filter_count = &pf->fd_udp4_filter_cnt;
4317 		break;
4318 	case SCTP_V6_FLOW:
4319 		index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
4320 		fdir_filter_count = &pf->fd_sctp6_filter_cnt;
4321 		break;
4322 	case TCP_V6_FLOW:
4323 		index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
4324 		fdir_filter_count = &pf->fd_tcp6_filter_cnt;
4325 		break;
4326 	case UDP_V6_FLOW:
4327 		index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
4328 		fdir_filter_count = &pf->fd_udp6_filter_cnt;
4329 		break;
4330 	case IP_USER_FLOW:
4331 		index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
4332 		fdir_filter_count = &pf->fd_ip4_filter_cnt;
4333 		flex_l3 = true;
4334 		break;
4335 	case IPV6_USER_FLOW:
4336 		index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
4337 		fdir_filter_count = &pf->fd_ip6_filter_cnt;
4338 		flex_l3 = true;
4339 		break;
4340 	default:
4341 		return -EOPNOTSUPP;
4342 	}
4343 
4344 	/* Read the current input set from register memory. */
4345 	current_mask = i40e_read_fd_input_set(pf, index);
4346 	new_mask = current_mask;
4347 
4348 	/* Determine, if any, the required changes to the input set in order
4349 	 * to support the provided mask.
4350 	 *
4351 	 * Hardware only supports masking at word (2 byte) granularity and does
4352 	 * not support full bitwise masking. This implementation simplifies
4353 	 * even further and only supports fully enabled or fully disabled
4354 	 * masks for each field, even though we could split the ip4src and
4355 	 * ip4dst fields.
4356 	 */
4357 	switch (fsp->flow_type & ~FLOW_EXT) {
4358 	case SCTP_V4_FLOW:
4359 		new_mask &= ~I40E_VERIFY_TAG_MASK;
4360 		fallthrough;
4361 	case TCP_V4_FLOW:
4362 	case UDP_V4_FLOW:
4363 		tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
4364 
4365 		/* IPv4 source address */
4366 		if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4367 			new_mask |= I40E_L3_SRC_MASK;
4368 		else if (!tcp_ip4_spec->ip4src)
4369 			new_mask &= ~I40E_L3_SRC_MASK;
4370 		else
4371 			return -EOPNOTSUPP;
4372 
4373 		/* IPv4 destination address */
4374 		if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4375 			new_mask |= I40E_L3_DST_MASK;
4376 		else if (!tcp_ip4_spec->ip4dst)
4377 			new_mask &= ~I40E_L3_DST_MASK;
4378 		else
4379 			return -EOPNOTSUPP;
4380 
4381 		/* L4 source port */
4382 		if (tcp_ip4_spec->psrc == htons(0xFFFF))
4383 			new_mask |= I40E_L4_SRC_MASK;
4384 		else if (!tcp_ip4_spec->psrc)
4385 			new_mask &= ~I40E_L4_SRC_MASK;
4386 		else
4387 			return -EOPNOTSUPP;
4388 
4389 		/* L4 destination port */
4390 		if (tcp_ip4_spec->pdst == htons(0xFFFF))
4391 			new_mask |= I40E_L4_DST_MASK;
4392 		else if (!tcp_ip4_spec->pdst)
4393 			new_mask &= ~I40E_L4_DST_MASK;
4394 		else
4395 			return -EOPNOTSUPP;
4396 
4397 		/* Filtering on Type of Service is not supported. */
4398 		if (tcp_ip4_spec->tos)
4399 			return -EOPNOTSUPP;
4400 
4401 		break;
4402 	case SCTP_V6_FLOW:
4403 		new_mask &= ~I40E_VERIFY_TAG_MASK;
4404 		fallthrough;
4405 	case TCP_V6_FLOW:
4406 	case UDP_V6_FLOW:
4407 		tcp_ip6_spec = &fsp->m_u.tcp_ip6_spec;
4408 
4409 		/* Check if user provided IPv6 source address. */
4410 		if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6src,
4411 				    (struct in6_addr *)&ipv6_full_mask))
4412 			new_mask |= I40E_L3_V6_SRC_MASK;
4413 		else if (ipv6_addr_any((struct in6_addr *)
4414 				       &tcp_ip6_spec->ip6src))
4415 			new_mask &= ~I40E_L3_V6_SRC_MASK;
4416 		else
4417 			return -EOPNOTSUPP;
4418 
4419 		/* Check if user provided destination address. */
4420 		if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6dst,
4421 				    (struct in6_addr *)&ipv6_full_mask))
4422 			new_mask |= I40E_L3_V6_DST_MASK;
4423 		else if (ipv6_addr_any((struct in6_addr *)
4424 				       &tcp_ip6_spec->ip6dst))
4425 			new_mask &= ~I40E_L3_V6_DST_MASK;
4426 		else
4427 			return -EOPNOTSUPP;
4428 
4429 		/* L4 source port */
4430 		if (tcp_ip6_spec->psrc == htons(0xFFFF))
4431 			new_mask |= I40E_L4_SRC_MASK;
4432 		else if (!tcp_ip6_spec->psrc)
4433 			new_mask &= ~I40E_L4_SRC_MASK;
4434 		else
4435 			return -EOPNOTSUPP;
4436 
4437 		/* L4 destination port */
4438 		if (tcp_ip6_spec->pdst == htons(0xFFFF))
4439 			new_mask |= I40E_L4_DST_MASK;
4440 		else if (!tcp_ip6_spec->pdst)
4441 			new_mask &= ~I40E_L4_DST_MASK;
4442 		else
4443 			return -EOPNOTSUPP;
4444 
4445 		/* Filtering on Traffic Classes is not supported. */
4446 		if (tcp_ip6_spec->tclass)
4447 			return -EOPNOTSUPP;
4448 		break;
4449 	case IP_USER_FLOW:
4450 		usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
4451 
4452 		/* IPv4 source address */
4453 		if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4454 			new_mask |= I40E_L3_SRC_MASK;
4455 		else if (!usr_ip4_spec->ip4src)
4456 			new_mask &= ~I40E_L3_SRC_MASK;
4457 		else
4458 			return -EOPNOTSUPP;
4459 
4460 		/* IPv4 destination address */
4461 		if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4462 			new_mask |= I40E_L3_DST_MASK;
4463 		else if (!usr_ip4_spec->ip4dst)
4464 			new_mask &= ~I40E_L3_DST_MASK;
4465 		else
4466 			return -EOPNOTSUPP;
4467 
4468 		/* First 4 bytes of L4 header */
4469 		if (usr_ip4_spec->l4_4_bytes)
4470 			return -EOPNOTSUPP;
4471 
4472 		/* Filtering on Type of Service is not supported. */
4473 		if (usr_ip4_spec->tos)
4474 			return -EOPNOTSUPP;
4475 
4476 		/* Filtering on IP version is not supported */
4477 		if (usr_ip4_spec->ip_ver)
4478 			return -EINVAL;
4479 
4480 		/* Filtering on L4 protocol is not supported */
4481 		if (usr_ip4_spec->proto)
4482 			return -EINVAL;
4483 
4484 		break;
4485 	case IPV6_USER_FLOW:
4486 		usr_ip6_spec = &fsp->m_u.usr_ip6_spec;
4487 
4488 		/* Check if user provided IPv6 source address. */
4489 		if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6src,
4490 				    (struct in6_addr *)&ipv6_full_mask))
4491 			new_mask |= I40E_L3_V6_SRC_MASK;
4492 		else if (ipv6_addr_any((struct in6_addr *)
4493 				       &usr_ip6_spec->ip6src))
4494 			new_mask &= ~I40E_L3_V6_SRC_MASK;
4495 		else
4496 			return -EOPNOTSUPP;
4497 
4498 		/* Check if user provided destination address. */
4499 		if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6dst,
4500 				    (struct in6_addr *)&ipv6_full_mask))
4501 			new_mask |= I40E_L3_V6_DST_MASK;
4502 		else if (ipv6_addr_any((struct in6_addr *)
4503 				       &usr_ip6_spec->ip6dst))
4504 			new_mask &= ~I40E_L3_V6_DST_MASK;
4505 		else
4506 			return -EOPNOTSUPP;
4507 
4508 		if (usr_ip6_spec->l4_4_bytes)
4509 			return -EOPNOTSUPP;
4510 
4511 		/* Filtering on Traffic class is not supported. */
4512 		if (usr_ip6_spec->tclass)
4513 			return -EOPNOTSUPP;
4514 
4515 		/* Filtering on L4 protocol is not supported */
4516 		if (usr_ip6_spec->l4_proto)
4517 			return -EINVAL;
4518 
4519 		break;
4520 	default:
4521 		return -EOPNOTSUPP;
4522 	}
4523 
4524 	if (fsp->flow_type & FLOW_EXT) {
4525 		/* Allow only 802.1Q and no etype defined, as
4526 		 * later it's modified to 0x8100
4527 		 */
4528 		if (fsp->h_ext.vlan_etype != htons(ETH_P_8021Q) &&
4529 		    fsp->h_ext.vlan_etype != 0)
4530 			return -EOPNOTSUPP;
4531 		if (fsp->m_ext.vlan_tci == htons(0xFFFF))
4532 			new_mask |= I40E_VLAN_SRC_MASK;
4533 		else
4534 			new_mask &= ~I40E_VLAN_SRC_MASK;
4535 	}
4536 
4537 	/* First, clear all flexible filter entries */
4538 	new_mask &= ~I40E_FLEX_INPUT_MASK;
4539 
4540 	/* If we have a flexible filter, try to add this offset to the correct
4541 	 * flexible filter PIT list. Once finished, we can update the mask.
4542 	 * If the src_offset changed, we will get a new mask value which will
4543 	 * trigger an input set change.
4544 	 */
4545 	if (userdef->flex_filter) {
4546 		struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
4547 
4548 		/* Flexible offset must be even, since the flexible payload
4549 		 * must be aligned on 2-byte boundary.
4550 		 */
4551 		if (userdef->flex_offset & 0x1) {
4552 			dev_warn(&pf->pdev->dev,
4553 				 "Flexible data offset must be 2-byte aligned\n");
4554 			return -EINVAL;
4555 		}
4556 
4557 		src_offset = userdef->flex_offset >> 1;
4558 
4559 		/* FLX_PIT source offset value is only so large */
4560 		if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
4561 			dev_warn(&pf->pdev->dev,
4562 				 "Flexible data must reside within first 64 bytes of the packet payload\n");
4563 			return -EINVAL;
4564 		}
4565 
4566 		/* See if this offset has already been programmed. If we get
4567 		 * an ERR_PTR, then the filter is not safe to add. Otherwise,
4568 		 * if we get a NULL pointer, this means we will need to add
4569 		 * the offset.
4570 		 */
4571 		flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
4572 						 src_offset);
4573 		if (IS_ERR(flex_pit))
4574 			return PTR_ERR(flex_pit);
4575 
4576 		/* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
4577 		 * packet types, and thus we need to program both L3 and L4
4578 		 * flexible values. These must have identical flexible index,
4579 		 * as otherwise we can't correctly program the input set. So
4580 		 * we'll find both an L3 and L4 index and make sure they are
4581 		 * the same.
4582 		 */
4583 		if (flex_l3) {
4584 			l3_flex_pit =
4585 				i40e_find_flex_offset(&pf->l3_flex_pit_list,
4586 						      src_offset);
4587 			if (IS_ERR(l3_flex_pit))
4588 				return PTR_ERR(l3_flex_pit);
4589 
4590 			if (flex_pit) {
4591 				/* If we already had a matching L4 entry, we
4592 				 * need to make sure that the L3 entry we
4593 				 * obtained uses the same index.
4594 				 */
4595 				if (l3_flex_pit) {
4596 					if (l3_flex_pit->pit_index !=
4597 					    flex_pit->pit_index) {
4598 						return -EINVAL;
4599 					}
4600 				} else {
4601 					new_flex_offset = true;
4602 				}
4603 			} else {
4604 				flex_pit = l3_flex_pit;
4605 			}
4606 		}
4607 
4608 		/* If we didn't find an existing flex offset, we need to
4609 		 * program a new one. However, we don't immediately program it
4610 		 * here because we will wait to program until after we check
4611 		 * that it is safe to change the input set.
4612 		 */
4613 		if (!flex_pit) {
4614 			new_flex_offset = true;
4615 			pit_index = i40e_unused_pit_index(pf);
4616 		} else {
4617 			pit_index = flex_pit->pit_index;
4618 		}
4619 
4620 		/* Update the mask with the new offset */
4621 		new_mask |= i40e_pit_index_to_mask(pit_index);
4622 	}
4623 
4624 	/* If the mask and flexible filter offsets for this filter match the
4625 	 * currently programmed values we don't need any input set change, so
4626 	 * this filter is safe to install.
4627 	 */
4628 	if (new_mask == current_mask && !new_flex_offset)
4629 		return 0;
4630 
4631 	netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
4632 		   i40e_flow_str(fsp));
4633 	i40e_print_input_set(vsi, current_mask, new_mask);
4634 	if (new_flex_offset) {
4635 		netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
4636 			   pit_index, src_offset);
4637 	}
4638 
4639 	/* Hardware input sets are global across multiple ports, so even the
4640 	 * main port cannot change them when in MFP mode as this would impact
4641 	 * any filters on the other ports.
4642 	 */
4643 	if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4644 		netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
4645 		return -EOPNOTSUPP;
4646 	}
4647 
4648 	/* This filter requires us to update the input set. However, hardware
4649 	 * only supports one input set per flow type, and does not support
4650 	 * separate masks for each filter. This means that we can only support
4651 	 * a single mask for all filters of a specific type.
4652 	 *
4653 	 * If we have preexisting filters, they obviously depend on the
4654 	 * current programmed input set. Display a diagnostic message in this
4655 	 * case explaining why the filter could not be accepted.
4656 	 */
4657 	if (*fdir_filter_count) {
4658 		netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
4659 			  i40e_flow_str(fsp),
4660 			  *fdir_filter_count);
4661 		return -EOPNOTSUPP;
4662 	}
4663 
4664 	i40e_write_fd_input_set(pf, index, new_mask);
4665 
4666 	/* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
4667 	 * frames. If we're programming the input set for IPv4/Other, we also
4668 	 * need to program the IPv4/Fragmented input set. Since we don't have
4669 	 * separate support, we'll always assume and enforce that the two flow
4670 	 * types must have matching input sets.
4671 	 */
4672 	if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
4673 		i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
4674 					new_mask);
4675 
4676 	/* Add the new offset and update table, if necessary */
4677 	if (new_flex_offset) {
4678 		err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
4679 					   pit_index);
4680 		if (err)
4681 			return err;
4682 
4683 		if (flex_l3) {
4684 			err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
4685 						   src_offset,
4686 						   pit_index);
4687 			if (err)
4688 				return err;
4689 		}
4690 
4691 		i40e_reprogram_flex_pit(pf);
4692 	}
4693 
4694 	return 0;
4695 }
4696 
4697 /**
4698  * i40e_match_fdir_filter - Return true of two filters match
4699  * @a: pointer to filter struct
4700  * @b: pointer to filter struct
4701  *
4702  * Returns true if the two filters match exactly the same criteria. I.e. they
4703  * match the same flow type and have the same parameters. We don't need to
4704  * check any input-set since all filters of the same flow type must use the
4705  * same input set.
4706  **/
4707 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
4708 				   struct i40e_fdir_filter *b)
4709 {
4710 	/* The filters do not much if any of these criteria differ. */
4711 	if (a->dst_ip != b->dst_ip ||
4712 	    a->src_ip != b->src_ip ||
4713 	    a->dst_port != b->dst_port ||
4714 	    a->src_port != b->src_port ||
4715 	    a->flow_type != b->flow_type ||
4716 	    a->ipl4_proto != b->ipl4_proto ||
4717 	    a->vlan_tag != b->vlan_tag ||
4718 	    a->vlan_etype != b->vlan_etype)
4719 		return false;
4720 
4721 	return true;
4722 }
4723 
4724 /**
4725  * i40e_disallow_matching_filters - Check that new filters differ
4726  * @vsi: pointer to the targeted VSI
4727  * @input: new filter to check
4728  *
4729  * Due to hardware limitations, it is not possible for two filters that match
4730  * similar criteria to be programmed at the same time. This is true for a few
4731  * reasons:
4732  *
4733  * (a) all filters matching a particular flow type must use the same input
4734  * set, that is they must match the same criteria.
4735  * (b) different flow types will never match the same packet, as the flow type
4736  * is decided by hardware before checking which rules apply.
4737  * (c) hardware has no way to distinguish which order filters apply in.
4738  *
4739  * Due to this, we can't really support using the location data to order
4740  * filters in the hardware parsing. It is technically possible for the user to
4741  * request two filters matching the same criteria but which select different
4742  * queues. In this case, rather than keep both filters in the list, we reject
4743  * the 2nd filter when the user requests adding it.
4744  *
4745  * This avoids needing to track location for programming the filter to
4746  * hardware, and ensures that we avoid some strange scenarios involving
4747  * deleting filters which match the same criteria.
4748  **/
4749 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
4750 					  struct i40e_fdir_filter *input)
4751 {
4752 	struct i40e_pf *pf = vsi->back;
4753 	struct i40e_fdir_filter *rule;
4754 	struct hlist_node *node2;
4755 
4756 	/* Loop through every filter, and check that it doesn't match */
4757 	hlist_for_each_entry_safe(rule, node2,
4758 				  &pf->fdir_filter_list, fdir_node) {
4759 		/* Don't check the filters match if they share the same fd_id,
4760 		 * since the new filter is actually just updating the target
4761 		 * of the old filter.
4762 		 */
4763 		if (rule->fd_id == input->fd_id)
4764 			continue;
4765 
4766 		/* If any filters match, then print a warning message to the
4767 		 * kernel message buffer and bail out.
4768 		 */
4769 		if (i40e_match_fdir_filter(rule, input)) {
4770 			dev_warn(&pf->pdev->dev,
4771 				 "Existing user defined filter %d already matches this flow.\n",
4772 				 rule->fd_id);
4773 			return -EINVAL;
4774 		}
4775 	}
4776 
4777 	return 0;
4778 }
4779 
4780 /**
4781  * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
4782  * @vsi: pointer to the targeted VSI
4783  * @cmd: command to get or set RX flow classification rules
4784  *
4785  * Add Flow Director filters for a specific flow spec based on their
4786  * protocol.  Returns 0 if the filters were successfully added.
4787  **/
4788 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
4789 				 struct ethtool_rxnfc *cmd)
4790 {
4791 	struct i40e_rx_flow_userdef userdef;
4792 	struct ethtool_rx_flow_spec *fsp;
4793 	struct i40e_fdir_filter *input;
4794 	u16 dest_vsi = 0, q_index = 0;
4795 	struct i40e_pf *pf;
4796 	int ret = -EINVAL;
4797 	u8 dest_ctl;
4798 
4799 	if (!vsi)
4800 		return -EINVAL;
4801 	pf = vsi->back;
4802 
4803 	if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
4804 		return -EOPNOTSUPP;
4805 
4806 	if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
4807 		return -ENOSPC;
4808 
4809 	if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
4810 	    test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
4811 		return -EBUSY;
4812 
4813 	if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
4814 		return -EBUSY;
4815 
4816 	fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
4817 
4818 	/* Parse the user-defined field */
4819 	if (i40e_parse_rx_flow_user_data(fsp, &userdef))
4820 		return -EINVAL;
4821 
4822 	/* Extended MAC field is not supported */
4823 	if (fsp->flow_type & FLOW_MAC_EXT)
4824 		return -EINVAL;
4825 
4826 	ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
4827 	if (ret)
4828 		return ret;
4829 
4830 	if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
4831 			      pf->hw.func_caps.fd_filters_guaranteed)) {
4832 		return -EINVAL;
4833 	}
4834 
4835 	/* ring_cookie is either the drop index, or is a mask of the queue
4836 	 * index and VF id we wish to target.
4837 	 */
4838 	if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
4839 		dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4840 	} else {
4841 		u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
4842 		u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
4843 
4844 		if (!vf) {
4845 			if (ring >= vsi->num_queue_pairs)
4846 				return -EINVAL;
4847 			dest_vsi = vsi->id;
4848 		} else {
4849 			/* VFs are zero-indexed, so we subtract one here */
4850 			vf--;
4851 
4852 			if (vf >= pf->num_alloc_vfs)
4853 				return -EINVAL;
4854 			if (ring >= pf->vf[vf].num_queue_pairs)
4855 				return -EINVAL;
4856 			dest_vsi = pf->vf[vf].lan_vsi_id;
4857 		}
4858 		dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
4859 		q_index = ring;
4860 	}
4861 
4862 	input = kzalloc(sizeof(*input), GFP_KERNEL);
4863 
4864 	if (!input)
4865 		return -ENOMEM;
4866 
4867 	input->fd_id = fsp->location;
4868 	input->q_index = q_index;
4869 	input->dest_vsi = dest_vsi;
4870 	input->dest_ctl = dest_ctl;
4871 	input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
4872 	input->cnt_index  = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
4873 	input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4874 	input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4875 	input->flow_type = fsp->flow_type & ~FLOW_EXT;
4876 
4877 	input->vlan_etype = fsp->h_ext.vlan_etype;
4878 	if (!fsp->m_ext.vlan_etype && fsp->h_ext.vlan_tci)
4879 		input->vlan_etype = cpu_to_be16(ETH_P_8021Q);
4880 	if (fsp->m_ext.vlan_tci && input->vlan_etype)
4881 		input->vlan_tag = fsp->h_ext.vlan_tci;
4882 	if (input->flow_type == IPV6_USER_FLOW ||
4883 	    input->flow_type == UDP_V6_FLOW ||
4884 	    input->flow_type == TCP_V6_FLOW ||
4885 	    input->flow_type == SCTP_V6_FLOW) {
4886 		/* Reverse the src and dest notion, since the HW expects them
4887 		 * to be from Tx perspective where as the input from user is
4888 		 * from Rx filter view.
4889 		 */
4890 		input->ipl4_proto = fsp->h_u.usr_ip6_spec.l4_proto;
4891 		input->dst_port = fsp->h_u.tcp_ip6_spec.psrc;
4892 		input->src_port = fsp->h_u.tcp_ip6_spec.pdst;
4893 		memcpy(input->dst_ip6, fsp->h_u.ah_ip6_spec.ip6src,
4894 		       sizeof(__be32) * 4);
4895 		memcpy(input->src_ip6, fsp->h_u.ah_ip6_spec.ip6dst,
4896 		       sizeof(__be32) * 4);
4897 	} else {
4898 		/* Reverse the src and dest notion, since the HW expects them
4899 		 * to be from Tx perspective where as the input from user is
4900 		 * from Rx filter view.
4901 		 */
4902 		input->ipl4_proto = fsp->h_u.usr_ip4_spec.proto;
4903 		input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
4904 		input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
4905 		input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4906 		input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4907 	}
4908 
4909 	if (userdef.flex_filter) {
4910 		input->flex_filter = true;
4911 		input->flex_word = cpu_to_be16(userdef.flex_word);
4912 		input->flex_offset = userdef.flex_offset;
4913 	}
4914 
4915 	/* Avoid programming two filters with identical match criteria. */
4916 	ret = i40e_disallow_matching_filters(vsi, input);
4917 	if (ret)
4918 		goto free_filter_memory;
4919 
4920 	/* Add the input filter to the fdir_input_list, possibly replacing
4921 	 * a previous filter. Do not free the input structure after adding it
4922 	 * to the list as this would cause a use-after-free bug.
4923 	 */
4924 	i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
4925 	ret = i40e_add_del_fdir(vsi, input, true);
4926 	if (ret)
4927 		goto remove_sw_rule;
4928 	return 0;
4929 
4930 remove_sw_rule:
4931 	hlist_del(&input->fdir_node);
4932 	pf->fdir_pf_active_filters--;
4933 free_filter_memory:
4934 	kfree(input);
4935 	return ret;
4936 }
4937 
4938 /**
4939  * i40e_set_rxnfc - command to set RX flow classification rules
4940  * @netdev: network interface device structure
4941  * @cmd: ethtool rxnfc command
4942  *
4943  * Returns Success if the command is supported.
4944  **/
4945 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
4946 {
4947 	struct i40e_netdev_priv *np = netdev_priv(netdev);
4948 	struct i40e_vsi *vsi = np->vsi;
4949 	struct i40e_pf *pf = vsi->back;
4950 	int ret = -EOPNOTSUPP;
4951 
4952 	switch (cmd->cmd) {
4953 	case ETHTOOL_SRXFH:
4954 		ret = i40e_set_rss_hash_opt(pf, cmd);
4955 		break;
4956 	case ETHTOOL_SRXCLSRLINS:
4957 		ret = i40e_add_fdir_ethtool(vsi, cmd);
4958 		break;
4959 	case ETHTOOL_SRXCLSRLDEL:
4960 		ret = i40e_del_fdir_entry(vsi, cmd);
4961 		break;
4962 	default:
4963 		break;
4964 	}
4965 
4966 	return ret;
4967 }
4968 
4969 /**
4970  * i40e_max_channels - get Max number of combined channels supported
4971  * @vsi: vsi pointer
4972  **/
4973 static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
4974 {
4975 	/* TODO: This code assumes DCB and FD is disabled for now. */
4976 	return vsi->alloc_queue_pairs;
4977 }
4978 
4979 /**
4980  * i40e_get_channels - Get the current channels enabled and max supported etc.
4981  * @dev: network interface device structure
4982  * @ch: ethtool channels structure
4983  *
4984  * We don't support separate tx and rx queues as channels. The other count
4985  * represents how many queues are being used for control. max_combined counts
4986  * how many queue pairs we can support. They may not be mapped 1 to 1 with
4987  * q_vectors since we support a lot more queue pairs than q_vectors.
4988  **/
4989 static void i40e_get_channels(struct net_device *dev,
4990 			      struct ethtool_channels *ch)
4991 {
4992 	struct i40e_netdev_priv *np = netdev_priv(dev);
4993 	struct i40e_vsi *vsi = np->vsi;
4994 	struct i40e_pf *pf = vsi->back;
4995 
4996 	/* report maximum channels */
4997 	ch->max_combined = i40e_max_channels(vsi);
4998 
4999 	/* report info for other vector */
5000 	ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
5001 	ch->max_other = ch->other_count;
5002 
5003 	/* Note: This code assumes DCB is disabled for now. */
5004 	ch->combined_count = vsi->num_queue_pairs;
5005 }
5006 
5007 /**
5008  * i40e_set_channels - Set the new channels count.
5009  * @dev: network interface device structure
5010  * @ch: ethtool channels structure
5011  *
5012  * The new channels count may not be the same as requested by the user
5013  * since it gets rounded down to a power of 2 value.
5014  **/
5015 static int i40e_set_channels(struct net_device *dev,
5016 			     struct ethtool_channels *ch)
5017 {
5018 	const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
5019 	struct i40e_netdev_priv *np = netdev_priv(dev);
5020 	unsigned int count = ch->combined_count;
5021 	struct i40e_vsi *vsi = np->vsi;
5022 	struct i40e_pf *pf = vsi->back;
5023 	struct i40e_fdir_filter *rule;
5024 	struct hlist_node *node2;
5025 	int new_count;
5026 	int err = 0;
5027 
5028 	/* We do not support setting channels for any other VSI at present */
5029 	if (vsi->type != I40E_VSI_MAIN)
5030 		return -EINVAL;
5031 
5032 	/* We do not support setting channels via ethtool when TCs are
5033 	 * configured through mqprio
5034 	 */
5035 	if (i40e_is_tc_mqprio_enabled(pf))
5036 		return -EINVAL;
5037 
5038 	/* verify they are not requesting separate vectors */
5039 	if (!count || ch->rx_count || ch->tx_count)
5040 		return -EINVAL;
5041 
5042 	/* verify other_count has not changed */
5043 	if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
5044 		return -EINVAL;
5045 
5046 	/* verify the number of channels does not exceed hardware limits */
5047 	if (count > i40e_max_channels(vsi))
5048 		return -EINVAL;
5049 
5050 	/* verify that the number of channels does not invalidate any current
5051 	 * flow director rules
5052 	 */
5053 	hlist_for_each_entry_safe(rule, node2,
5054 				  &pf->fdir_filter_list, fdir_node) {
5055 		if (rule->dest_ctl != drop && count <= rule->q_index) {
5056 			dev_warn(&pf->pdev->dev,
5057 				 "Existing user defined filter %d assigns flow to queue %d\n",
5058 				 rule->fd_id, rule->q_index);
5059 			err = -EINVAL;
5060 		}
5061 	}
5062 
5063 	if (err) {
5064 		dev_err(&pf->pdev->dev,
5065 			"Existing filter rules must be deleted to reduce combined channel count to %d\n",
5066 			count);
5067 		return err;
5068 	}
5069 
5070 	/* update feature limits from largest to smallest supported values */
5071 	/* TODO: Flow director limit, DCB etc */
5072 
5073 	/* use rss_reconfig to rebuild with new queue count and update traffic
5074 	 * class queue mapping
5075 	 */
5076 	new_count = i40e_reconfig_rss_queues(pf, count);
5077 	if (new_count > 0)
5078 		return 0;
5079 	else
5080 		return -EINVAL;
5081 }
5082 
5083 /**
5084  * i40e_get_rxfh_key_size - get the RSS hash key size
5085  * @netdev: network interface device structure
5086  *
5087  * Returns the table size.
5088  **/
5089 static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
5090 {
5091 	return I40E_HKEY_ARRAY_SIZE;
5092 }
5093 
5094 /**
5095  * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
5096  * @netdev: network interface device structure
5097  *
5098  * Returns the table size.
5099  **/
5100 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
5101 {
5102 	return I40E_HLUT_ARRAY_SIZE;
5103 }
5104 
5105 /**
5106  * i40e_get_rxfh - get the rx flow hash indirection table
5107  * @netdev: network interface device structure
5108  * @indir: indirection table
5109  * @key: hash key
5110  * @hfunc: hash function
5111  *
5112  * Reads the indirection table directly from the hardware. Returns 0 on
5113  * success.
5114  **/
5115 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
5116 			 u8 *hfunc)
5117 {
5118 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5119 	struct i40e_vsi *vsi = np->vsi;
5120 	u8 *lut, *seed = NULL;
5121 	int ret;
5122 	u16 i;
5123 
5124 	if (hfunc)
5125 		*hfunc = ETH_RSS_HASH_TOP;
5126 
5127 	if (!indir)
5128 		return 0;
5129 
5130 	seed = key;
5131 	lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
5132 	if (!lut)
5133 		return -ENOMEM;
5134 	ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
5135 	if (ret)
5136 		goto out;
5137 	for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
5138 		indir[i] = (u32)(lut[i]);
5139 
5140 out:
5141 	kfree(lut);
5142 
5143 	return ret;
5144 }
5145 
5146 /**
5147  * i40e_set_rxfh - set the rx flow hash indirection table
5148  * @netdev: network interface device structure
5149  * @indir: indirection table
5150  * @key: hash key
5151  * @hfunc: hash function to use
5152  *
5153  * Returns -EINVAL if the table specifies an invalid queue id, otherwise
5154  * returns 0 after programming the table.
5155  **/
5156 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
5157 			 const u8 *key, const u8 hfunc)
5158 {
5159 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5160 	struct i40e_vsi *vsi = np->vsi;
5161 	struct i40e_pf *pf = vsi->back;
5162 	u8 *seed = NULL;
5163 	u16 i;
5164 
5165 	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
5166 		return -EOPNOTSUPP;
5167 
5168 	if (key) {
5169 		if (!vsi->rss_hkey_user) {
5170 			vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
5171 						     GFP_KERNEL);
5172 			if (!vsi->rss_hkey_user)
5173 				return -ENOMEM;
5174 		}
5175 		memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
5176 		seed = vsi->rss_hkey_user;
5177 	}
5178 	if (!vsi->rss_lut_user) {
5179 		vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
5180 		if (!vsi->rss_lut_user)
5181 			return -ENOMEM;
5182 	}
5183 
5184 	/* Each 32 bits pointed by 'indir' is stored with a lut entry */
5185 	if (indir)
5186 		for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
5187 			vsi->rss_lut_user[i] = (u8)(indir[i]);
5188 	else
5189 		i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
5190 				  vsi->rss_size);
5191 
5192 	return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
5193 			       I40E_HLUT_ARRAY_SIZE);
5194 }
5195 
5196 /**
5197  * i40e_get_priv_flags - report device private flags
5198  * @dev: network interface device structure
5199  *
5200  * The get string set count and the string set should be matched for each
5201  * flag returned.  Add new strings for each flag to the i40e_gstrings_priv_flags
5202  * array.
5203  *
5204  * Returns a u32 bitmap of flags.
5205  **/
5206 static u32 i40e_get_priv_flags(struct net_device *dev)
5207 {
5208 	struct i40e_netdev_priv *np = netdev_priv(dev);
5209 	struct i40e_vsi *vsi = np->vsi;
5210 	struct i40e_pf *pf = vsi->back;
5211 	u32 i, j, ret_flags = 0;
5212 
5213 	for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
5214 		const struct i40e_priv_flags *priv_flags;
5215 
5216 		priv_flags = &i40e_gstrings_priv_flags[i];
5217 
5218 		if (priv_flags->flag & pf->flags)
5219 			ret_flags |= BIT(i);
5220 	}
5221 
5222 	if (pf->hw.pf_id != 0)
5223 		return ret_flags;
5224 
5225 	for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
5226 		const struct i40e_priv_flags *priv_flags;
5227 
5228 		priv_flags = &i40e_gl_gstrings_priv_flags[j];
5229 
5230 		if (priv_flags->flag & pf->flags)
5231 			ret_flags |= BIT(i + j);
5232 	}
5233 
5234 	return ret_flags;
5235 }
5236 
5237 /**
5238  * i40e_set_priv_flags - set private flags
5239  * @dev: network interface device structure
5240  * @flags: bit flags to be set
5241  **/
5242 static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
5243 {
5244 	struct i40e_netdev_priv *np = netdev_priv(dev);
5245 	u64 orig_flags, new_flags, changed_flags;
5246 	enum i40e_admin_queue_err adq_err;
5247 	struct i40e_vsi *vsi = np->vsi;
5248 	struct i40e_pf *pf = vsi->back;
5249 	u32 reset_needed = 0;
5250 	i40e_status status;
5251 	u32 i, j;
5252 
5253 	orig_flags = READ_ONCE(pf->flags);
5254 	new_flags = orig_flags;
5255 
5256 	for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
5257 		const struct i40e_priv_flags *priv_flags;
5258 
5259 		priv_flags = &i40e_gstrings_priv_flags[i];
5260 
5261 		if (flags & BIT(i))
5262 			new_flags |= priv_flags->flag;
5263 		else
5264 			new_flags &= ~(priv_flags->flag);
5265 
5266 		/* If this is a read-only flag, it can't be changed */
5267 		if (priv_flags->read_only &&
5268 		    ((orig_flags ^ new_flags) & ~BIT(i)))
5269 			return -EOPNOTSUPP;
5270 	}
5271 
5272 	if (pf->hw.pf_id != 0)
5273 		goto flags_complete;
5274 
5275 	for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
5276 		const struct i40e_priv_flags *priv_flags;
5277 
5278 		priv_flags = &i40e_gl_gstrings_priv_flags[j];
5279 
5280 		if (flags & BIT(i + j))
5281 			new_flags |= priv_flags->flag;
5282 		else
5283 			new_flags &= ~(priv_flags->flag);
5284 
5285 		/* If this is a read-only flag, it can't be changed */
5286 		if (priv_flags->read_only &&
5287 		    ((orig_flags ^ new_flags) & ~BIT(i)))
5288 			return -EOPNOTSUPP;
5289 	}
5290 
5291 flags_complete:
5292 	changed_flags = orig_flags ^ new_flags;
5293 
5294 	if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP)
5295 		reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
5296 	if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
5297 	    I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED))
5298 		reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
5299 
5300 	/* Before we finalize any flag changes, we need to perform some
5301 	 * checks to ensure that the changes are supported and safe.
5302 	 */
5303 
5304 	/* ATR eviction is not supported on all devices */
5305 	if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
5306 	    !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
5307 		return -EOPNOTSUPP;
5308 
5309 	/* If the driver detected FW LLDP was disabled on init, this flag could
5310 	 * be set, however we do not support _changing_ the flag:
5311 	 * - on XL710 if NPAR is enabled or FW API version < 1.7
5312 	 * - on X722 with FW API version < 1.6
5313 	 * There are situations where older FW versions/NPAR enabled PFs could
5314 	 * disable LLDP, however we _must_ not allow the user to enable/disable
5315 	 * LLDP with this flag on unsupported FW versions.
5316 	 */
5317 	if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5318 		if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) {
5319 			dev_warn(&pf->pdev->dev,
5320 				 "Device does not support changing FW LLDP\n");
5321 			return -EOPNOTSUPP;
5322 		}
5323 	}
5324 
5325 	if (changed_flags & I40E_FLAG_RS_FEC &&
5326 	    pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5327 	    pf->hw.device_id != I40E_DEV_ID_25G_B) {
5328 		dev_warn(&pf->pdev->dev,
5329 			 "Device does not support changing FEC configuration\n");
5330 		return -EOPNOTSUPP;
5331 	}
5332 
5333 	if (changed_flags & I40E_FLAG_BASE_R_FEC &&
5334 	    pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5335 	    pf->hw.device_id != I40E_DEV_ID_25G_B &&
5336 	    pf->hw.device_id != I40E_DEV_ID_KX_X722) {
5337 		dev_warn(&pf->pdev->dev,
5338 			 "Device does not support changing FEC configuration\n");
5339 		return -EOPNOTSUPP;
5340 	}
5341 
5342 	/* Process any additional changes needed as a result of flag changes.
5343 	 * The changed_flags value reflects the list of bits that were
5344 	 * changed in the code above.
5345 	 */
5346 
5347 	/* Flush current ATR settings if ATR was disabled */
5348 	if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5349 	    !(new_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5350 		set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
5351 		set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
5352 	}
5353 
5354 	if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
5355 		u16 sw_flags = 0, valid_flags = 0;
5356 		int ret;
5357 
5358 		if (!(new_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
5359 			sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5360 		valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5361 		ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
5362 						0, NULL);
5363 		if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
5364 			dev_info(&pf->pdev->dev,
5365 				 "couldn't set switch config bits, err %d aq_err %s\n",
5366 				 ret,
5367 				 i40e_aq_str(&pf->hw,
5368 					     pf->hw.aq.asq_last_status));
5369 			/* not a fatal problem, just keep going */
5370 		}
5371 	}
5372 
5373 	if ((changed_flags & I40E_FLAG_RS_FEC) ||
5374 	    (changed_flags & I40E_FLAG_BASE_R_FEC)) {
5375 		u8 fec_cfg = 0;
5376 
5377 		if (new_flags & I40E_FLAG_RS_FEC &&
5378 		    new_flags & I40E_FLAG_BASE_R_FEC) {
5379 			fec_cfg = I40E_AQ_SET_FEC_AUTO;
5380 		} else if (new_flags & I40E_FLAG_RS_FEC) {
5381 			fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
5382 				   I40E_AQ_SET_FEC_ABILITY_RS);
5383 		} else if (new_flags & I40E_FLAG_BASE_R_FEC) {
5384 			fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
5385 				   I40E_AQ_SET_FEC_ABILITY_KR);
5386 		}
5387 		if (i40e_set_fec_cfg(dev, fec_cfg))
5388 			dev_warn(&pf->pdev->dev, "Cannot change FEC config\n");
5389 	}
5390 
5391 	if ((changed_flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5392 	    (orig_flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) {
5393 		dev_err(&pf->pdev->dev,
5394 			"Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n");
5395 		return -EOPNOTSUPP;
5396 	}
5397 
5398 	if ((changed_flags & I40E_FLAG_VF_VLAN_PRUNING) &&
5399 	    pf->num_alloc_vfs) {
5400 		dev_warn(&pf->pdev->dev,
5401 			 "Changing vf-vlan-pruning flag while VF(s) are active is not supported\n");
5402 		return -EOPNOTSUPP;
5403 	}
5404 
5405 	if ((changed_flags & new_flags &
5406 	     I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
5407 	    (new_flags & I40E_FLAG_MFP_ENABLED))
5408 		dev_warn(&pf->pdev->dev,
5409 			 "Turning on link-down-on-close flag may affect other partitions\n");
5410 
5411 	if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5412 		if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) {
5413 #ifdef CONFIG_I40E_DCB
5414 			i40e_dcb_sw_default_config(pf);
5415 #endif /* CONFIG_I40E_DCB */
5416 			i40e_aq_cfg_lldp_mib_change_event(&pf->hw, false, NULL);
5417 			i40e_aq_stop_lldp(&pf->hw, true, false, NULL);
5418 		} else {
5419 			status = i40e_aq_start_lldp(&pf->hw, false, NULL);
5420 			if (status) {
5421 				adq_err = pf->hw.aq.asq_last_status;
5422 				switch (adq_err) {
5423 				case I40E_AQ_RC_EEXIST:
5424 					dev_warn(&pf->pdev->dev,
5425 						 "FW LLDP agent is already running\n");
5426 					reset_needed = 0;
5427 					break;
5428 				case I40E_AQ_RC_EPERM:
5429 					dev_warn(&pf->pdev->dev,
5430 						 "Device configuration forbids SW from starting the LLDP agent.\n");
5431 					return -EINVAL;
5432 				case I40E_AQ_RC_EAGAIN:
5433 					dev_warn(&pf->pdev->dev,
5434 						 "Stop FW LLDP agent command is still being processed, please try again in a second.\n");
5435 					return -EBUSY;
5436 				default:
5437 					dev_warn(&pf->pdev->dev,
5438 						 "Starting FW LLDP agent failed: error: %d, %s\n",
5439 						 status,
5440 						 i40e_aq_str(&pf->hw,
5441 							     adq_err));
5442 					return -EINVAL;
5443 				}
5444 			}
5445 		}
5446 	}
5447 
5448 	/* Now that we've checked to ensure that the new flags are valid, load
5449 	 * them into place. Since we only modify flags either (a) during
5450 	 * initialization or (b) while holding the RTNL lock, we don't need
5451 	 * anything fancy here.
5452 	 */
5453 	pf->flags = new_flags;
5454 
5455 	/* Issue reset to cause things to take effect, as additional bits
5456 	 * are added we will need to create a mask of bits requiring reset
5457 	 */
5458 	if (reset_needed)
5459 		i40e_do_reset(pf, reset_needed, true);
5460 
5461 	return 0;
5462 }
5463 
5464 /**
5465  * i40e_get_module_info - get (Q)SFP+ module type info
5466  * @netdev: network interface device structure
5467  * @modinfo: module EEPROM size and layout information structure
5468  **/
5469 static int i40e_get_module_info(struct net_device *netdev,
5470 				struct ethtool_modinfo *modinfo)
5471 {
5472 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5473 	struct i40e_vsi *vsi = np->vsi;
5474 	struct i40e_pf *pf = vsi->back;
5475 	struct i40e_hw *hw = &pf->hw;
5476 	u32 sff8472_comp = 0;
5477 	u32 sff8472_swap = 0;
5478 	u32 sff8636_rev = 0;
5479 	i40e_status status;
5480 	u32 type = 0;
5481 
5482 	/* Check if firmware supports reading module EEPROM. */
5483 	if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) {
5484 		netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
5485 		return -EINVAL;
5486 	}
5487 
5488 	status = i40e_update_link_info(hw);
5489 	if (status)
5490 		return -EIO;
5491 
5492 	if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
5493 		netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
5494 		return -EINVAL;
5495 	}
5496 
5497 	type = hw->phy.link_info.module_type[0];
5498 
5499 	switch (type) {
5500 	case I40E_MODULE_TYPE_SFP:
5501 		status = i40e_aq_get_phy_register(hw,
5502 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5503 				I40E_I2C_EEPROM_DEV_ADDR, true,
5504 				I40E_MODULE_SFF_8472_COMP,
5505 				&sff8472_comp, NULL);
5506 		if (status)
5507 			return -EIO;
5508 
5509 		status = i40e_aq_get_phy_register(hw,
5510 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5511 				I40E_I2C_EEPROM_DEV_ADDR, true,
5512 				I40E_MODULE_SFF_8472_SWAP,
5513 				&sff8472_swap, NULL);
5514 		if (status)
5515 			return -EIO;
5516 
5517 		/* Check if the module requires address swap to access
5518 		 * the other EEPROM memory page.
5519 		 */
5520 		if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
5521 			netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
5522 			modinfo->type = ETH_MODULE_SFF_8079;
5523 			modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5524 		} else if (sff8472_comp == 0x00) {
5525 			/* Module is not SFF-8472 compliant */
5526 			modinfo->type = ETH_MODULE_SFF_8079;
5527 			modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5528 		} else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) {
5529 			/* Module is SFF-8472 compliant but doesn't implement
5530 			 * Digital Diagnostic Monitoring (DDM).
5531 			 */
5532 			modinfo->type = ETH_MODULE_SFF_8079;
5533 			modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5534 		} else {
5535 			modinfo->type = ETH_MODULE_SFF_8472;
5536 			modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
5537 		}
5538 		break;
5539 	case I40E_MODULE_TYPE_QSFP_PLUS:
5540 		/* Read from memory page 0. */
5541 		status = i40e_aq_get_phy_register(hw,
5542 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5543 				0, true,
5544 				I40E_MODULE_REVISION_ADDR,
5545 				&sff8636_rev, NULL);
5546 		if (status)
5547 			return -EIO;
5548 		/* Determine revision compliance byte */
5549 		if (sff8636_rev > 0x02) {
5550 			/* Module is SFF-8636 compliant */
5551 			modinfo->type = ETH_MODULE_SFF_8636;
5552 			modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5553 		} else {
5554 			modinfo->type = ETH_MODULE_SFF_8436;
5555 			modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5556 		}
5557 		break;
5558 	case I40E_MODULE_TYPE_QSFP28:
5559 		modinfo->type = ETH_MODULE_SFF_8636;
5560 		modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5561 		break;
5562 	default:
5563 		netdev_err(vsi->netdev, "Module type unrecognized\n");
5564 		return -EINVAL;
5565 	}
5566 	return 0;
5567 }
5568 
5569 /**
5570  * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
5571  * @netdev: network interface device structure
5572  * @ee: EEPROM dump request structure
5573  * @data: buffer to be filled with EEPROM contents
5574  **/
5575 static int i40e_get_module_eeprom(struct net_device *netdev,
5576 				  struct ethtool_eeprom *ee,
5577 				  u8 *data)
5578 {
5579 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5580 	struct i40e_vsi *vsi = np->vsi;
5581 	struct i40e_pf *pf = vsi->back;
5582 	struct i40e_hw *hw = &pf->hw;
5583 	bool is_sfp = false;
5584 	i40e_status status;
5585 	u32 value = 0;
5586 	int i;
5587 
5588 	if (!ee || !ee->len || !data)
5589 		return -EINVAL;
5590 
5591 	if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
5592 		is_sfp = true;
5593 
5594 	for (i = 0; i < ee->len; i++) {
5595 		u32 offset = i + ee->offset;
5596 		u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
5597 
5598 		/* Check if we need to access the other memory page */
5599 		if (is_sfp) {
5600 			if (offset >= ETH_MODULE_SFF_8079_LEN) {
5601 				offset -= ETH_MODULE_SFF_8079_LEN;
5602 				addr = I40E_I2C_EEPROM_DEV_ADDR2;
5603 			}
5604 		} else {
5605 			while (offset >= ETH_MODULE_SFF_8436_LEN) {
5606 				/* Compute memory page number and offset. */
5607 				offset -= ETH_MODULE_SFF_8436_LEN / 2;
5608 				addr++;
5609 			}
5610 		}
5611 
5612 		status = i40e_aq_get_phy_register(hw,
5613 				I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5614 				addr, true, offset, &value, NULL);
5615 		if (status)
5616 			return -EIO;
5617 		data[i] = value;
5618 	}
5619 	return 0;
5620 }
5621 
5622 static int i40e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
5623 {
5624 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5625 	struct i40e_aq_get_phy_abilities_resp phy_cfg;
5626 	enum i40e_status_code status = 0;
5627 	struct i40e_vsi *vsi = np->vsi;
5628 	struct i40e_pf *pf = vsi->back;
5629 	struct i40e_hw *hw = &pf->hw;
5630 
5631 	/* Get initial PHY capabilities */
5632 	status = i40e_aq_get_phy_capabilities(hw, false, true, &phy_cfg, NULL);
5633 	if (status)
5634 		return -EAGAIN;
5635 
5636 	/* Check whether NIC configuration is compatible with Energy Efficient
5637 	 * Ethernet (EEE) mode.
5638 	 */
5639 	if (phy_cfg.eee_capability == 0)
5640 		return -EOPNOTSUPP;
5641 
5642 	edata->supported = SUPPORTED_Autoneg;
5643 	edata->lp_advertised = edata->supported;
5644 
5645 	/* Get current configuration */
5646 	status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_cfg, NULL);
5647 	if (status)
5648 		return -EAGAIN;
5649 
5650 	edata->advertised = phy_cfg.eee_capability ? SUPPORTED_Autoneg : 0U;
5651 	edata->eee_enabled = !!edata->advertised;
5652 	edata->tx_lpi_enabled = pf->stats.tx_lpi_status;
5653 
5654 	edata->eee_active = pf->stats.tx_lpi_status && pf->stats.rx_lpi_status;
5655 
5656 	return 0;
5657 }
5658 
5659 static int i40e_is_eee_param_supported(struct net_device *netdev,
5660 				       struct ethtool_eee *edata)
5661 {
5662 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5663 	struct i40e_vsi *vsi = np->vsi;
5664 	struct i40e_pf *pf = vsi->back;
5665 	struct i40e_ethtool_not_used {
5666 		u32 value;
5667 		const char *name;
5668 	} param[] = {
5669 		{edata->advertised & ~SUPPORTED_Autoneg, "advertise"},
5670 		{edata->tx_lpi_timer, "tx-timer"},
5671 		{edata->tx_lpi_enabled != pf->stats.tx_lpi_status, "tx-lpi"}
5672 	};
5673 	int i;
5674 
5675 	for (i = 0; i < ARRAY_SIZE(param); i++) {
5676 		if (param[i].value) {
5677 			netdev_info(netdev,
5678 				    "EEE setting %s not supported\n",
5679 				    param[i].name);
5680 			return -EOPNOTSUPP;
5681 		}
5682 	}
5683 
5684 	return 0;
5685 }
5686 
5687 static int i40e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
5688 {
5689 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5690 	struct i40e_aq_get_phy_abilities_resp abilities;
5691 	enum i40e_status_code status = I40E_SUCCESS;
5692 	struct i40e_aq_set_phy_config config;
5693 	struct i40e_vsi *vsi = np->vsi;
5694 	struct i40e_pf *pf = vsi->back;
5695 	struct i40e_hw *hw = &pf->hw;
5696 	__le16 eee_capability;
5697 
5698 	/* Deny parameters we don't support */
5699 	if (i40e_is_eee_param_supported(netdev, edata))
5700 		return -EOPNOTSUPP;
5701 
5702 	/* Get initial PHY capabilities */
5703 	status = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
5704 					      NULL);
5705 	if (status)
5706 		return -EAGAIN;
5707 
5708 	/* Check whether NIC configuration is compatible with Energy Efficient
5709 	 * Ethernet (EEE) mode.
5710 	 */
5711 	if (abilities.eee_capability == 0)
5712 		return -EOPNOTSUPP;
5713 
5714 	/* Cache initial EEE capability */
5715 	eee_capability = abilities.eee_capability;
5716 
5717 	/* Get current PHY configuration */
5718 	status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
5719 					      NULL);
5720 	if (status)
5721 		return -EAGAIN;
5722 
5723 	/* Cache current PHY configuration */
5724 	config.phy_type = abilities.phy_type;
5725 	config.phy_type_ext = abilities.phy_type_ext;
5726 	config.link_speed = abilities.link_speed;
5727 	config.abilities = abilities.abilities |
5728 			   I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
5729 	config.eeer = abilities.eeer_val;
5730 	config.low_power_ctrl = abilities.d3_lpan;
5731 	config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
5732 			    I40E_AQ_PHY_FEC_CONFIG_MASK;
5733 
5734 	/* Set desired EEE state */
5735 	if (edata->eee_enabled) {
5736 		config.eee_capability = eee_capability;
5737 		config.eeer |= cpu_to_le32(I40E_PRTPM_EEER_TX_LPI_EN_MASK);
5738 	} else {
5739 		config.eee_capability = 0;
5740 		config.eeer &= cpu_to_le32(~I40E_PRTPM_EEER_TX_LPI_EN_MASK);
5741 	}
5742 
5743 	/* Apply modified PHY configuration */
5744 	status = i40e_aq_set_phy_config(hw, &config, NULL);
5745 	if (status)
5746 		return -EAGAIN;
5747 
5748 	return 0;
5749 }
5750 
5751 static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = {
5752 	.get_drvinfo		= i40e_get_drvinfo,
5753 	.set_eeprom		= i40e_set_eeprom,
5754 	.get_eeprom_len		= i40e_get_eeprom_len,
5755 	.get_eeprom		= i40e_get_eeprom,
5756 };
5757 
5758 static const struct ethtool_ops i40e_ethtool_ops = {
5759 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
5760 				     ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
5761 				     ETHTOOL_COALESCE_USE_ADAPTIVE |
5762 				     ETHTOOL_COALESCE_RX_USECS_HIGH |
5763 				     ETHTOOL_COALESCE_TX_USECS_HIGH,
5764 	.get_drvinfo		= i40e_get_drvinfo,
5765 	.get_regs_len		= i40e_get_regs_len,
5766 	.get_regs		= i40e_get_regs,
5767 	.nway_reset		= i40e_nway_reset,
5768 	.get_link		= ethtool_op_get_link,
5769 	.get_wol		= i40e_get_wol,
5770 	.set_wol		= i40e_set_wol,
5771 	.set_eeprom		= i40e_set_eeprom,
5772 	.get_eeprom_len		= i40e_get_eeprom_len,
5773 	.get_eeprom		= i40e_get_eeprom,
5774 	.get_ringparam		= i40e_get_ringparam,
5775 	.set_ringparam		= i40e_set_ringparam,
5776 	.get_pauseparam		= i40e_get_pauseparam,
5777 	.set_pauseparam		= i40e_set_pauseparam,
5778 	.get_msglevel		= i40e_get_msglevel,
5779 	.set_msglevel		= i40e_set_msglevel,
5780 	.get_rxnfc		= i40e_get_rxnfc,
5781 	.set_rxnfc		= i40e_set_rxnfc,
5782 	.self_test		= i40e_diag_test,
5783 	.get_strings		= i40e_get_strings,
5784 	.get_eee		= i40e_get_eee,
5785 	.set_eee		= i40e_set_eee,
5786 	.set_phys_id		= i40e_set_phys_id,
5787 	.get_sset_count		= i40e_get_sset_count,
5788 	.get_ethtool_stats	= i40e_get_ethtool_stats,
5789 	.get_coalesce		= i40e_get_coalesce,
5790 	.set_coalesce		= i40e_set_coalesce,
5791 	.get_rxfh_key_size	= i40e_get_rxfh_key_size,
5792 	.get_rxfh_indir_size	= i40e_get_rxfh_indir_size,
5793 	.get_rxfh		= i40e_get_rxfh,
5794 	.set_rxfh		= i40e_set_rxfh,
5795 	.get_channels		= i40e_get_channels,
5796 	.set_channels		= i40e_set_channels,
5797 	.get_module_info	= i40e_get_module_info,
5798 	.get_module_eeprom	= i40e_get_module_eeprom,
5799 	.get_ts_info		= i40e_get_ts_info,
5800 	.get_priv_flags		= i40e_get_priv_flags,
5801 	.set_priv_flags		= i40e_set_priv_flags,
5802 	.get_per_queue_coalesce	= i40e_get_per_queue_coalesce,
5803 	.set_per_queue_coalesce	= i40e_set_per_queue_coalesce,
5804 	.get_link_ksettings	= i40e_get_link_ksettings,
5805 	.set_link_ksettings	= i40e_set_link_ksettings,
5806 	.get_fecparam = i40e_get_fec_param,
5807 	.set_fecparam = i40e_set_fec_param,
5808 	.flash_device = i40e_ddp_flash,
5809 };
5810 
5811 void i40e_set_ethtool_ops(struct net_device *netdev)
5812 {
5813 	struct i40e_netdev_priv *np = netdev_priv(netdev);
5814 	struct i40e_pf		*pf = np->vsi->back;
5815 
5816 	if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
5817 		netdev->ethtool_ops = &i40e_ethtool_ops;
5818 	else
5819 		netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops;
5820 }
5821