1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* ethtool support for i40e */ 28 29 #include "i40e.h" 30 #include "i40e_diag.h" 31 32 struct i40e_stats { 33 char stat_string[ETH_GSTRING_LEN]; 34 int sizeof_stat; 35 int stat_offset; 36 }; 37 38 #define I40E_STAT(_type, _name, _stat) { \ 39 .stat_string = _name, \ 40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 41 .stat_offset = offsetof(_type, _stat) \ 42 } 43 44 #define I40E_NETDEV_STAT(_net_stat) \ 45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 46 #define I40E_PF_STAT(_name, _stat) \ 47 I40E_STAT(struct i40e_pf, _name, _stat) 48 #define I40E_VSI_STAT(_name, _stat) \ 49 I40E_STAT(struct i40e_vsi, _name, _stat) 50 #define I40E_VEB_STAT(_name, _stat) \ 51 I40E_STAT(struct i40e_veb, _name, _stat) 52 53 static const struct i40e_stats i40e_gstrings_net_stats[] = { 54 I40E_NETDEV_STAT(rx_packets), 55 I40E_NETDEV_STAT(tx_packets), 56 I40E_NETDEV_STAT(rx_bytes), 57 I40E_NETDEV_STAT(tx_bytes), 58 I40E_NETDEV_STAT(rx_errors), 59 I40E_NETDEV_STAT(tx_errors), 60 I40E_NETDEV_STAT(rx_dropped), 61 I40E_NETDEV_STAT(tx_dropped), 62 I40E_NETDEV_STAT(collisions), 63 I40E_NETDEV_STAT(rx_length_errors), 64 I40E_NETDEV_STAT(rx_crc_errors), 65 }; 66 67 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 76 I40E_VEB_STAT("rx_discards", stats.rx_discards), 77 I40E_VEB_STAT("tx_discards", stats.tx_discards), 78 I40E_VEB_STAT("tx_errors", stats.tx_errors), 79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 80 }; 81 82 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 90 I40E_VSI_STAT("tx_linearize", tx_linearize), 91 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 92 I40E_VSI_STAT("tx_lost_interrupt", tx_lost_interrupt), 93 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 94 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 95 }; 96 97 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 98 * but they are separate. This device supports Virtualization, and 99 * as such might have several netdevs supporting VMDq and FCoE going 100 * through a single port. The NETDEV_STATs are for individual netdevs 101 * seen at the top of the stack, and the PF_STATs are for the physical 102 * function at the bottom of the stack hosting those netdevs. 103 * 104 * The PF_STATs are appended to the netdev stats only when ethtool -S 105 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 106 */ 107 static const struct i40e_stats i40e_gstrings_stats[] = { 108 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 109 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 110 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 111 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 112 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 113 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 114 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 115 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 116 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 117 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 118 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 119 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 120 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 121 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 122 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 123 I40E_PF_STAT("tx_timeout", tx_timeout_count), 124 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 125 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 126 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 127 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 128 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 129 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 130 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 131 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 132 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 133 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 134 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 135 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 136 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 137 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 138 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 139 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 140 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 141 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 142 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 143 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 144 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 145 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 146 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 147 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 148 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 149 I40E_PF_STAT("arq_overflows", arq_overflows), 150 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 157 158 /* LPI stats */ 159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 163 }; 164 165 #define I40E_QUEUE_STATS_LEN(n) \ 166 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 167 * 2 /* Tx and Rx together */ \ 168 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 169 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 170 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 171 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 172 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 173 I40E_MISC_STATS_LEN + \ 174 I40E_QUEUE_STATS_LEN((n))) 175 #define I40E_PFC_STATS_LEN ( \ 176 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 177 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 178 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 179 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 180 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 181 / sizeof(u64)) 182 #define I40E_VEB_TC_STATS_LEN ( \ 183 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 184 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 185 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 186 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 187 / sizeof(u64)) 188 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 189 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 190 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 191 I40E_PFC_STATS_LEN + \ 192 I40E_VSI_STATS_LEN((n))) 193 194 enum i40e_ethtool_test_id { 195 I40E_ETH_TEST_REG = 0, 196 I40E_ETH_TEST_EEPROM, 197 I40E_ETH_TEST_INTR, 198 I40E_ETH_TEST_LINK, 199 }; 200 201 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 202 "Register test (offline)", 203 "Eeprom test (offline)", 204 "Interrupt test (offline)", 205 "Link test (on/offline)" 206 }; 207 208 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 209 210 struct i40e_priv_flags { 211 char flag_string[ETH_GSTRING_LEN]; 212 u64 flag; 213 bool read_only; 214 }; 215 216 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 217 .flag_string = _name, \ 218 .flag = _flag, \ 219 .read_only = _read_only, \ 220 } 221 222 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 223 /* NOTE: MFP setting cannot be changed */ 224 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 225 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 226 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 227 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 228 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_CAPABLE, 0), 229 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 230 }; 231 232 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 233 234 /* Private flags with a global effect, restricted to PF 0 */ 235 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 236 I40E_PRIV_FLAG("vf-true-promisc-support", 237 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 238 }; 239 240 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 241 242 /** 243 * i40e_partition_setting_complaint - generic complaint for MFP restriction 244 * @pf: the PF struct 245 **/ 246 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 247 { 248 dev_info(&pf->pdev->dev, 249 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 250 } 251 252 /** 253 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 254 * @phy_types: PHY types to convert 255 * @supported: pointer to the ethtool supported variable to fill in 256 * @advertising: pointer to the ethtool advertising variable to fill in 257 * 258 **/ 259 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported, 260 u32 *advertising) 261 { 262 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 263 u64 phy_types = pf->hw.phy.phy_types; 264 265 *supported = 0x0; 266 *advertising = 0x0; 267 268 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 269 *supported |= SUPPORTED_Autoneg | 270 SUPPORTED_1000baseT_Full; 271 *advertising |= ADVERTISED_Autoneg; 272 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 273 *advertising |= ADVERTISED_1000baseT_Full; 274 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { 275 *supported |= SUPPORTED_100baseT_Full; 276 *advertising |= ADVERTISED_100baseT_Full; 277 } 278 } 279 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 280 phy_types & I40E_CAP_PHY_TYPE_XFI || 281 phy_types & I40E_CAP_PHY_TYPE_SFI || 282 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 283 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) 284 *supported |= SUPPORTED_10000baseT_Full; 285 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 286 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 287 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 290 *supported |= SUPPORTED_Autoneg | 291 SUPPORTED_10000baseT_Full; 292 *advertising |= ADVERTISED_Autoneg; 293 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 294 *advertising |= ADVERTISED_10000baseT_Full; 295 } 296 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 297 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 298 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 299 *supported |= SUPPORTED_40000baseCR4_Full; 300 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 301 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 302 *supported |= SUPPORTED_Autoneg | 303 SUPPORTED_40000baseCR4_Full; 304 *advertising |= ADVERTISED_Autoneg; 305 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 306 *advertising |= ADVERTISED_40000baseCR4_Full; 307 } 308 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 309 *supported |= SUPPORTED_Autoneg | 310 SUPPORTED_100baseT_Full; 311 *advertising |= ADVERTISED_Autoneg; 312 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 313 *advertising |= ADVERTISED_100baseT_Full; 314 } 315 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 316 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 317 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 318 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 319 *supported |= SUPPORTED_Autoneg | 320 SUPPORTED_1000baseT_Full; 321 *advertising |= ADVERTISED_Autoneg; 322 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 323 *advertising |= ADVERTISED_1000baseT_Full; 324 } 325 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 326 *supported |= SUPPORTED_40000baseSR4_Full; 327 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 328 *supported |= SUPPORTED_40000baseLR4_Full; 329 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 330 *supported |= SUPPORTED_40000baseKR4_Full | 331 SUPPORTED_Autoneg; 332 *advertising |= ADVERTISED_40000baseKR4_Full | 333 ADVERTISED_Autoneg; 334 } 335 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 336 *supported |= SUPPORTED_20000baseKR2_Full | 337 SUPPORTED_Autoneg; 338 *advertising |= ADVERTISED_Autoneg; 339 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 340 *advertising |= ADVERTISED_20000baseKR2_Full; 341 } 342 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) { 343 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 344 *supported |= SUPPORTED_10000baseKR_Full | 345 SUPPORTED_Autoneg; 346 *advertising |= ADVERTISED_Autoneg; 347 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 348 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 349 *advertising |= ADVERTISED_10000baseKR_Full; 350 } 351 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 352 *supported |= SUPPORTED_10000baseKX4_Full | 353 SUPPORTED_Autoneg; 354 *advertising |= ADVERTISED_Autoneg; 355 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 356 *advertising |= ADVERTISED_10000baseKX4_Full; 357 } 358 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) { 359 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 360 *supported |= SUPPORTED_1000baseKX_Full | 361 SUPPORTED_Autoneg; 362 *advertising |= ADVERTISED_Autoneg; 363 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 364 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER)) 365 *advertising |= ADVERTISED_1000baseKX_Full; 366 } 367 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 368 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 369 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 370 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 371 *supported |= SUPPORTED_Autoneg; 372 *advertising |= ADVERTISED_Autoneg; 373 } 374 } 375 376 /** 377 * i40e_get_settings_link_up - Get the Link settings for when link is up 378 * @hw: hw structure 379 * @ecmd: ethtool command to fill in 380 * @netdev: network interface device structure 381 * 382 **/ 383 static void i40e_get_settings_link_up(struct i40e_hw *hw, 384 struct ethtool_link_ksettings *cmd, 385 struct net_device *netdev, 386 struct i40e_pf *pf) 387 { 388 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 389 u32 link_speed = hw_link_info->link_speed; 390 u32 e_advertising = 0x0; 391 u32 e_supported = 0x0; 392 u32 supported, advertising; 393 394 ethtool_convert_link_mode_to_legacy_u32(&supported, 395 cmd->link_modes.supported); 396 ethtool_convert_link_mode_to_legacy_u32(&advertising, 397 cmd->link_modes.advertising); 398 399 /* Initialize supported and advertised settings based on phy settings */ 400 switch (hw_link_info->phy_type) { 401 case I40E_PHY_TYPE_40GBASE_CR4: 402 case I40E_PHY_TYPE_40GBASE_CR4_CU: 403 supported = SUPPORTED_Autoneg | 404 SUPPORTED_40000baseCR4_Full; 405 advertising = ADVERTISED_Autoneg | 406 ADVERTISED_40000baseCR4_Full; 407 break; 408 case I40E_PHY_TYPE_XLAUI: 409 case I40E_PHY_TYPE_XLPPI: 410 case I40E_PHY_TYPE_40GBASE_AOC: 411 supported = SUPPORTED_40000baseCR4_Full; 412 break; 413 case I40E_PHY_TYPE_40GBASE_SR4: 414 supported = SUPPORTED_40000baseSR4_Full; 415 break; 416 case I40E_PHY_TYPE_40GBASE_LR4: 417 supported = SUPPORTED_40000baseLR4_Full; 418 break; 419 case I40E_PHY_TYPE_10GBASE_SR: 420 case I40E_PHY_TYPE_10GBASE_LR: 421 case I40E_PHY_TYPE_1000BASE_SX: 422 case I40E_PHY_TYPE_1000BASE_LX: 423 supported = SUPPORTED_10000baseT_Full; 424 if (hw_link_info->module_type[2] & 425 I40E_MODULE_TYPE_1000BASE_SX || 426 hw_link_info->module_type[2] & 427 I40E_MODULE_TYPE_1000BASE_LX) { 428 supported |= SUPPORTED_1000baseT_Full; 429 if (hw_link_info->requested_speeds & 430 I40E_LINK_SPEED_1GB) 431 advertising |= ADVERTISED_1000baseT_Full; 432 } 433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 434 advertising |= ADVERTISED_10000baseT_Full; 435 break; 436 case I40E_PHY_TYPE_10GBASE_T: 437 case I40E_PHY_TYPE_1000BASE_T: 438 case I40E_PHY_TYPE_100BASE_TX: 439 supported = SUPPORTED_Autoneg | 440 SUPPORTED_10000baseT_Full | 441 SUPPORTED_1000baseT_Full | 442 SUPPORTED_100baseT_Full; 443 advertising = ADVERTISED_Autoneg; 444 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 445 advertising |= ADVERTISED_10000baseT_Full; 446 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 447 advertising |= ADVERTISED_1000baseT_Full; 448 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 449 advertising |= ADVERTISED_100baseT_Full; 450 break; 451 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 452 supported = SUPPORTED_Autoneg | 453 SUPPORTED_1000baseT_Full; 454 advertising = ADVERTISED_Autoneg | 455 ADVERTISED_1000baseT_Full; 456 break; 457 case I40E_PHY_TYPE_10GBASE_CR1_CU: 458 case I40E_PHY_TYPE_10GBASE_CR1: 459 supported = SUPPORTED_Autoneg | 460 SUPPORTED_10000baseT_Full; 461 advertising = ADVERTISED_Autoneg | 462 ADVERTISED_10000baseT_Full; 463 break; 464 case I40E_PHY_TYPE_XAUI: 465 case I40E_PHY_TYPE_XFI: 466 case I40E_PHY_TYPE_SFI: 467 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 468 case I40E_PHY_TYPE_10GBASE_AOC: 469 supported = SUPPORTED_10000baseT_Full; 470 advertising = SUPPORTED_10000baseT_Full; 471 break; 472 case I40E_PHY_TYPE_SGMII: 473 supported = SUPPORTED_Autoneg | 474 SUPPORTED_1000baseT_Full; 475 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 476 advertising |= ADVERTISED_1000baseT_Full; 477 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { 478 supported |= SUPPORTED_100baseT_Full; 479 if (hw_link_info->requested_speeds & 480 I40E_LINK_SPEED_100MB) 481 advertising |= ADVERTISED_100baseT_Full; 482 } 483 break; 484 case I40E_PHY_TYPE_40GBASE_KR4: 485 case I40E_PHY_TYPE_20GBASE_KR2: 486 case I40E_PHY_TYPE_10GBASE_KR: 487 case I40E_PHY_TYPE_10GBASE_KX4: 488 case I40E_PHY_TYPE_1000BASE_KX: 489 supported |= SUPPORTED_40000baseKR4_Full | 490 SUPPORTED_20000baseKR2_Full | 491 SUPPORTED_10000baseKR_Full | 492 SUPPORTED_10000baseKX4_Full | 493 SUPPORTED_1000baseKX_Full | 494 SUPPORTED_Autoneg; 495 advertising |= ADVERTISED_40000baseKR4_Full | 496 ADVERTISED_20000baseKR2_Full | 497 ADVERTISED_10000baseKR_Full | 498 ADVERTISED_10000baseKX4_Full | 499 ADVERTISED_1000baseKX_Full | 500 ADVERTISED_Autoneg; 501 break; 502 case I40E_PHY_TYPE_25GBASE_KR: 503 case I40E_PHY_TYPE_25GBASE_CR: 504 case I40E_PHY_TYPE_25GBASE_SR: 505 case I40E_PHY_TYPE_25GBASE_LR: 506 supported = SUPPORTED_Autoneg; 507 advertising = ADVERTISED_Autoneg; 508 /* TODO: add speeds when ethtool is ready to support*/ 509 break; 510 default: 511 /* if we got here and link is up something bad is afoot */ 512 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 513 hw_link_info->phy_type); 514 } 515 516 /* Now that we've worked out everything that could be supported by the 517 * current PHY type, get what is supported by the NVM and them to 518 * get what is truly supported 519 */ 520 i40e_phy_type_to_ethtool(pf, &e_supported, 521 &e_advertising); 522 523 supported = supported & e_supported; 524 advertising = advertising & e_advertising; 525 526 /* Set speed and duplex */ 527 switch (link_speed) { 528 case I40E_LINK_SPEED_40GB: 529 cmd->base.speed = SPEED_40000; 530 break; 531 case I40E_LINK_SPEED_25GB: 532 #ifdef SPEED_25000 533 cmd->base.speed = SPEED_25000; 534 #else 535 netdev_info(netdev, 536 "Speed is 25G, display not supported by this version of ethtool.\n"); 537 #endif 538 break; 539 case I40E_LINK_SPEED_20GB: 540 cmd->base.speed = SPEED_20000; 541 break; 542 case I40E_LINK_SPEED_10GB: 543 cmd->base.speed = SPEED_10000; 544 break; 545 case I40E_LINK_SPEED_1GB: 546 cmd->base.speed = SPEED_1000; 547 break; 548 case I40E_LINK_SPEED_100MB: 549 cmd->base.speed = SPEED_100; 550 break; 551 default: 552 break; 553 } 554 cmd->base.duplex = DUPLEX_FULL; 555 556 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 557 supported); 558 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 559 advertising); 560 } 561 562 /** 563 * i40e_get_settings_link_down - Get the Link settings for when link is down 564 * @hw: hw structure 565 * @ecmd: ethtool command to fill in 566 * 567 * Reports link settings that can be determined when link is down 568 **/ 569 static void i40e_get_settings_link_down(struct i40e_hw *hw, 570 struct ethtool_link_ksettings *cmd, 571 struct i40e_pf *pf) 572 { 573 u32 supported, advertising; 574 575 /* link is down and the driver needs to fall back on 576 * supported phy types to figure out what info to display 577 */ 578 i40e_phy_type_to_ethtool(pf, &supported, &advertising); 579 580 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 581 supported); 582 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 583 advertising); 584 585 /* With no link speed and duplex are unknown */ 586 cmd->base.speed = SPEED_UNKNOWN; 587 cmd->base.duplex = DUPLEX_UNKNOWN; 588 } 589 590 /** 591 * i40e_get_settings - Get Link Speed and Duplex settings 592 * @netdev: network interface device structure 593 * @ecmd: ethtool command 594 * 595 * Reports speed/duplex settings based on media_type 596 **/ 597 static int i40e_get_link_ksettings(struct net_device *netdev, 598 struct ethtool_link_ksettings *cmd) 599 { 600 struct i40e_netdev_priv *np = netdev_priv(netdev); 601 struct i40e_pf *pf = np->vsi->back; 602 struct i40e_hw *hw = &pf->hw; 603 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 604 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 605 u32 advertising; 606 607 if (link_up) 608 i40e_get_settings_link_up(hw, cmd, netdev, pf); 609 else 610 i40e_get_settings_link_down(hw, cmd, pf); 611 612 /* Now set the settings that don't rely on link being up/down */ 613 /* Set autoneg settings */ 614 cmd->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 615 AUTONEG_ENABLE : AUTONEG_DISABLE); 616 617 switch (hw->phy.media_type) { 618 case I40E_MEDIA_TYPE_BACKPLANE: 619 ethtool_link_ksettings_add_link_mode(cmd, supported, 620 Autoneg); 621 ethtool_link_ksettings_add_link_mode(cmd, supported, 622 Backplane); 623 ethtool_link_ksettings_add_link_mode(cmd, advertising, 624 Autoneg); 625 ethtool_link_ksettings_add_link_mode(cmd, advertising, 626 Backplane); 627 cmd->base.port = PORT_NONE; 628 break; 629 case I40E_MEDIA_TYPE_BASET: 630 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 631 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 632 cmd->base.port = PORT_TP; 633 break; 634 case I40E_MEDIA_TYPE_DA: 635 case I40E_MEDIA_TYPE_CX4: 636 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 637 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 638 cmd->base.port = PORT_DA; 639 break; 640 case I40E_MEDIA_TYPE_FIBER: 641 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 642 cmd->base.port = PORT_FIBRE; 643 break; 644 case I40E_MEDIA_TYPE_UNKNOWN: 645 default: 646 cmd->base.port = PORT_OTHER; 647 break; 648 } 649 650 /* Set flow control settings */ 651 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 652 653 switch (hw->fc.requested_mode) { 654 case I40E_FC_FULL: 655 ethtool_link_ksettings_add_link_mode(cmd, advertising, 656 Pause); 657 break; 658 case I40E_FC_TX_PAUSE: 659 ethtool_link_ksettings_add_link_mode(cmd, advertising, 660 Asym_Pause); 661 break; 662 case I40E_FC_RX_PAUSE: 663 ethtool_link_ksettings_add_link_mode(cmd, advertising, 664 Pause); 665 ethtool_link_ksettings_add_link_mode(cmd, advertising, 666 Asym_Pause); 667 break; 668 default: 669 ethtool_convert_link_mode_to_legacy_u32( 670 &advertising, cmd->link_modes.advertising); 671 672 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause); 673 674 ethtool_convert_legacy_u32_to_link_mode( 675 cmd->link_modes.advertising, advertising); 676 break; 677 } 678 679 return 0; 680 } 681 682 /** 683 * i40e_set_settings - Set Speed and Duplex 684 * @netdev: network interface device structure 685 * @ecmd: ethtool command 686 * 687 * Set speed/duplex per media_types advertised/forced 688 **/ 689 static int i40e_set_link_ksettings(struct net_device *netdev, 690 const struct ethtool_link_ksettings *cmd) 691 { 692 struct i40e_netdev_priv *np = netdev_priv(netdev); 693 struct i40e_aq_get_phy_abilities_resp abilities; 694 struct i40e_aq_set_phy_config config; 695 struct i40e_pf *pf = np->vsi->back; 696 struct i40e_vsi *vsi = np->vsi; 697 struct i40e_hw *hw = &pf->hw; 698 struct ethtool_link_ksettings safe_cmd; 699 struct ethtool_link_ksettings copy_cmd; 700 i40e_status status = 0; 701 bool change = false; 702 int err = 0; 703 u32 autoneg; 704 u32 advertise; 705 u32 tmp; 706 707 /* Changing port settings is not supported if this isn't the 708 * port's controlling PF 709 */ 710 if (hw->partition_id != 1) { 711 i40e_partition_setting_complaint(pf); 712 return -EOPNOTSUPP; 713 } 714 715 if (vsi != pf->vsi[pf->lan_vsi]) 716 return -EOPNOTSUPP; 717 718 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 719 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 720 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 721 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 722 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 723 return -EOPNOTSUPP; 724 725 if (hw->device_id == I40E_DEV_ID_KX_B || 726 hw->device_id == I40E_DEV_ID_KX_C || 727 hw->device_id == I40E_DEV_ID_20G_KR2 || 728 hw->device_id == I40E_DEV_ID_20G_KR2_A) { 729 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 730 return -EOPNOTSUPP; 731 } 732 733 /* copy the cmd to copy_cmd to avoid modifying the origin */ 734 memcpy(©_cmd, cmd, sizeof(struct ethtool_link_ksettings)); 735 736 /* get our own copy of the bits to check against */ 737 memset(&safe_cmd, 0, sizeof(struct ethtool_link_ksettings)); 738 i40e_get_link_ksettings(netdev, &safe_cmd); 739 740 /* save autoneg and speed out of cmd */ 741 autoneg = cmd->base.autoneg; 742 ethtool_convert_link_mode_to_legacy_u32(&advertise, 743 cmd->link_modes.advertising); 744 745 /* set autoneg and speed back to what they currently are */ 746 copy_cmd.base.autoneg = safe_cmd.base.autoneg; 747 ethtool_convert_link_mode_to_legacy_u32( 748 &tmp, safe_cmd.link_modes.advertising); 749 ethtool_convert_legacy_u32_to_link_mode( 750 copy_cmd.link_modes.advertising, tmp); 751 752 copy_cmd.base.cmd = safe_cmd.base.cmd; 753 754 /* If copy_cmd and safe_cmd are not the same now, then they are 755 * trying to set something that we do not support 756 */ 757 if (memcmp(©_cmd, &safe_cmd, sizeof(struct ethtool_link_ksettings))) 758 return -EOPNOTSUPP; 759 760 while (test_bit(__I40E_CONFIG_BUSY, &vsi->state)) 761 usleep_range(1000, 2000); 762 763 /* Get the current phy config */ 764 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 765 NULL); 766 if (status) 767 return -EAGAIN; 768 769 /* Copy abilities to config in case autoneg is not 770 * set below 771 */ 772 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 773 config.abilities = abilities.abilities; 774 775 /* Check autoneg */ 776 if (autoneg == AUTONEG_ENABLE) { 777 /* If autoneg was not already enabled */ 778 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 779 /* If autoneg is not supported, return error */ 780 if (!ethtool_link_ksettings_test_link_mode( 781 &safe_cmd, supported, Autoneg)) { 782 netdev_info(netdev, "Autoneg not supported on this phy\n"); 783 return -EINVAL; 784 } 785 /* Autoneg is allowed to change */ 786 config.abilities = abilities.abilities | 787 I40E_AQ_PHY_ENABLE_AN; 788 change = true; 789 } 790 } else { 791 /* If autoneg is currently enabled */ 792 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 793 /* If autoneg is supported 10GBASE_T is the only PHY 794 * that can disable it, so otherwise return error 795 */ 796 if (ethtool_link_ksettings_test_link_mode( 797 &safe_cmd, supported, Autoneg) && 798 hw->phy.link_info.phy_type != 799 I40E_PHY_TYPE_10GBASE_T) { 800 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 801 return -EINVAL; 802 } 803 /* Autoneg is allowed to change */ 804 config.abilities = abilities.abilities & 805 ~I40E_AQ_PHY_ENABLE_AN; 806 change = true; 807 } 808 } 809 810 ethtool_convert_link_mode_to_legacy_u32(&tmp, 811 safe_cmd.link_modes.supported); 812 if (advertise & ~tmp) 813 return -EINVAL; 814 815 if (advertise & ADVERTISED_100baseT_Full) 816 config.link_speed |= I40E_LINK_SPEED_100MB; 817 if (advertise & ADVERTISED_1000baseT_Full || 818 advertise & ADVERTISED_1000baseKX_Full) 819 config.link_speed |= I40E_LINK_SPEED_1GB; 820 if (advertise & ADVERTISED_10000baseT_Full || 821 advertise & ADVERTISED_10000baseKX4_Full || 822 advertise & ADVERTISED_10000baseKR_Full) 823 config.link_speed |= I40E_LINK_SPEED_10GB; 824 if (advertise & ADVERTISED_20000baseKR2_Full) 825 config.link_speed |= I40E_LINK_SPEED_20GB; 826 if (advertise & ADVERTISED_40000baseKR4_Full || 827 advertise & ADVERTISED_40000baseCR4_Full || 828 advertise & ADVERTISED_40000baseSR4_Full || 829 advertise & ADVERTISED_40000baseLR4_Full) 830 config.link_speed |= I40E_LINK_SPEED_40GB; 831 832 /* If speed didn't get set, set it to what it currently is. 833 * This is needed because if advertise is 0 (as it is when autoneg 834 * is disabled) then speed won't get set. 835 */ 836 if (!config.link_speed) 837 config.link_speed = abilities.link_speed; 838 839 if (change || (abilities.link_speed != config.link_speed)) { 840 /* copy over the rest of the abilities */ 841 config.phy_type = abilities.phy_type; 842 config.phy_type_ext = abilities.phy_type_ext; 843 config.eee_capability = abilities.eee_capability; 844 config.eeer = abilities.eeer_val; 845 config.low_power_ctrl = abilities.d3_lpan; 846 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 847 I40E_AQ_PHY_FEC_CONFIG_MASK; 848 849 /* save the requested speeds */ 850 hw->phy.link_info.requested_speeds = config.link_speed; 851 /* set link and auto negotiation so changes take effect */ 852 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 853 /* If link is up put link down */ 854 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 855 /* Tell the OS link is going down, the link will go 856 * back up when fw says it is ready asynchronously 857 */ 858 i40e_print_link_message(vsi, false); 859 netif_carrier_off(netdev); 860 netif_tx_stop_all_queues(netdev); 861 } 862 863 /* make the aq call */ 864 status = i40e_aq_set_phy_config(hw, &config, NULL); 865 if (status) { 866 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n", 867 i40e_stat_str(hw, status), 868 i40e_aq_str(hw, hw->aq.asq_last_status)); 869 return -EAGAIN; 870 } 871 872 status = i40e_update_link_info(hw); 873 if (status) 874 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n", 875 i40e_stat_str(hw, status), 876 i40e_aq_str(hw, hw->aq.asq_last_status)); 877 878 } else { 879 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 880 } 881 882 return err; 883 } 884 885 static int i40e_nway_reset(struct net_device *netdev) 886 { 887 /* restart autonegotiation */ 888 struct i40e_netdev_priv *np = netdev_priv(netdev); 889 struct i40e_pf *pf = np->vsi->back; 890 struct i40e_hw *hw = &pf->hw; 891 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 892 i40e_status ret = 0; 893 894 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 895 if (ret) { 896 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 897 i40e_stat_str(hw, ret), 898 i40e_aq_str(hw, hw->aq.asq_last_status)); 899 return -EIO; 900 } 901 902 return 0; 903 } 904 905 /** 906 * i40e_get_pauseparam - Get Flow Control status 907 * Return tx/rx-pause status 908 **/ 909 static void i40e_get_pauseparam(struct net_device *netdev, 910 struct ethtool_pauseparam *pause) 911 { 912 struct i40e_netdev_priv *np = netdev_priv(netdev); 913 struct i40e_pf *pf = np->vsi->back; 914 struct i40e_hw *hw = &pf->hw; 915 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 916 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 917 918 pause->autoneg = 919 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 920 AUTONEG_ENABLE : AUTONEG_DISABLE); 921 922 /* PFC enabled so report LFC as off */ 923 if (dcbx_cfg->pfc.pfcenable) { 924 pause->rx_pause = 0; 925 pause->tx_pause = 0; 926 return; 927 } 928 929 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 930 pause->rx_pause = 1; 931 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 932 pause->tx_pause = 1; 933 } else if (hw->fc.current_mode == I40E_FC_FULL) { 934 pause->rx_pause = 1; 935 pause->tx_pause = 1; 936 } 937 } 938 939 /** 940 * i40e_set_pauseparam - Set Flow Control parameter 941 * @netdev: network interface device structure 942 * @pause: return tx/rx flow control status 943 **/ 944 static int i40e_set_pauseparam(struct net_device *netdev, 945 struct ethtool_pauseparam *pause) 946 { 947 struct i40e_netdev_priv *np = netdev_priv(netdev); 948 struct i40e_pf *pf = np->vsi->back; 949 struct i40e_vsi *vsi = np->vsi; 950 struct i40e_hw *hw = &pf->hw; 951 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 952 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 953 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 954 i40e_status status; 955 u8 aq_failures; 956 int err = 0; 957 958 /* Changing the port's flow control is not supported if this isn't the 959 * port's controlling PF 960 */ 961 if (hw->partition_id != 1) { 962 i40e_partition_setting_complaint(pf); 963 return -EOPNOTSUPP; 964 } 965 966 if (vsi != pf->vsi[pf->lan_vsi]) 967 return -EOPNOTSUPP; 968 969 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 970 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 971 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 972 return -EOPNOTSUPP; 973 } 974 975 /* If we have link and don't have autoneg */ 976 if (!test_bit(__I40E_DOWN, &pf->state) && 977 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 978 /* Send message that it might not necessarily work*/ 979 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 980 } 981 982 if (dcbx_cfg->pfc.pfcenable) { 983 netdev_info(netdev, 984 "Priority flow control enabled. Cannot set link flow control.\n"); 985 return -EOPNOTSUPP; 986 } 987 988 if (pause->rx_pause && pause->tx_pause) 989 hw->fc.requested_mode = I40E_FC_FULL; 990 else if (pause->rx_pause && !pause->tx_pause) 991 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 992 else if (!pause->rx_pause && pause->tx_pause) 993 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 994 else if (!pause->rx_pause && !pause->tx_pause) 995 hw->fc.requested_mode = I40E_FC_NONE; 996 else 997 return -EINVAL; 998 999 /* Tell the OS link is going down, the link will go back up when fw 1000 * says it is ready asynchronously 1001 */ 1002 i40e_print_link_message(vsi, false); 1003 netif_carrier_off(netdev); 1004 netif_tx_stop_all_queues(netdev); 1005 1006 /* Set the fc mode and only restart an if link is up*/ 1007 status = i40e_set_fc(hw, &aq_failures, link_up); 1008 1009 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1010 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1011 i40e_stat_str(hw, status), 1012 i40e_aq_str(hw, hw->aq.asq_last_status)); 1013 err = -EAGAIN; 1014 } 1015 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1016 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1017 i40e_stat_str(hw, status), 1018 i40e_aq_str(hw, hw->aq.asq_last_status)); 1019 err = -EAGAIN; 1020 } 1021 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1022 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1023 i40e_stat_str(hw, status), 1024 i40e_aq_str(hw, hw->aq.asq_last_status)); 1025 err = -EAGAIN; 1026 } 1027 1028 if (!test_bit(__I40E_DOWN, &pf->state)) { 1029 /* Give it a little more time to try to come back */ 1030 msleep(75); 1031 if (!test_bit(__I40E_DOWN, &pf->state)) 1032 return i40e_nway_reset(netdev); 1033 } 1034 1035 return err; 1036 } 1037 1038 static u32 i40e_get_msglevel(struct net_device *netdev) 1039 { 1040 struct i40e_netdev_priv *np = netdev_priv(netdev); 1041 struct i40e_pf *pf = np->vsi->back; 1042 u32 debug_mask = pf->hw.debug_mask; 1043 1044 if (debug_mask) 1045 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1046 1047 return pf->msg_enable; 1048 } 1049 1050 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1051 { 1052 struct i40e_netdev_priv *np = netdev_priv(netdev); 1053 struct i40e_pf *pf = np->vsi->back; 1054 1055 if (I40E_DEBUG_USER & data) 1056 pf->hw.debug_mask = data; 1057 else 1058 pf->msg_enable = data; 1059 } 1060 1061 static int i40e_get_regs_len(struct net_device *netdev) 1062 { 1063 int reg_count = 0; 1064 int i; 1065 1066 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1067 reg_count += i40e_reg_list[i].elements; 1068 1069 return reg_count * sizeof(u32); 1070 } 1071 1072 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1073 void *p) 1074 { 1075 struct i40e_netdev_priv *np = netdev_priv(netdev); 1076 struct i40e_pf *pf = np->vsi->back; 1077 struct i40e_hw *hw = &pf->hw; 1078 u32 *reg_buf = p; 1079 int i, j, ri; 1080 u32 reg; 1081 1082 /* Tell ethtool which driver-version-specific regs output we have. 1083 * 1084 * At some point, if we have ethtool doing special formatting of 1085 * this data, it will rely on this version number to know how to 1086 * interpret things. Hence, this needs to be updated if/when the 1087 * diags register table is changed. 1088 */ 1089 regs->version = 1; 1090 1091 /* loop through the diags reg table for what to print */ 1092 ri = 0; 1093 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1094 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1095 reg = i40e_reg_list[i].offset 1096 + (j * i40e_reg_list[i].stride); 1097 reg_buf[ri++] = rd32(hw, reg); 1098 } 1099 } 1100 1101 } 1102 1103 static int i40e_get_eeprom(struct net_device *netdev, 1104 struct ethtool_eeprom *eeprom, u8 *bytes) 1105 { 1106 struct i40e_netdev_priv *np = netdev_priv(netdev); 1107 struct i40e_hw *hw = &np->vsi->back->hw; 1108 struct i40e_pf *pf = np->vsi->back; 1109 int ret_val = 0, len, offset; 1110 u8 *eeprom_buff; 1111 u16 i, sectors; 1112 bool last; 1113 u32 magic; 1114 1115 #define I40E_NVM_SECTOR_SIZE 4096 1116 if (eeprom->len == 0) 1117 return -EINVAL; 1118 1119 /* check for NVMUpdate access method */ 1120 magic = hw->vendor_id | (hw->device_id << 16); 1121 if (eeprom->magic && eeprom->magic != magic) { 1122 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1123 int errno = 0; 1124 1125 /* make sure it is the right magic for NVMUpdate */ 1126 if ((eeprom->magic >> 16) != hw->device_id) 1127 errno = -EINVAL; 1128 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || 1129 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) 1130 errno = -EBUSY; 1131 else 1132 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1133 1134 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1135 dev_info(&pf->pdev->dev, 1136 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1137 ret_val, hw->aq.asq_last_status, errno, 1138 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1139 cmd->offset, cmd->data_size); 1140 1141 return errno; 1142 } 1143 1144 /* normal ethtool get_eeprom support */ 1145 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1146 1147 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1148 if (!eeprom_buff) 1149 return -ENOMEM; 1150 1151 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1152 if (ret_val) { 1153 dev_info(&pf->pdev->dev, 1154 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1155 ret_val, hw->aq.asq_last_status); 1156 goto free_buff; 1157 } 1158 1159 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1160 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1161 len = I40E_NVM_SECTOR_SIZE; 1162 last = false; 1163 for (i = 0; i < sectors; i++) { 1164 if (i == (sectors - 1)) { 1165 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1166 last = true; 1167 } 1168 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1169 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1170 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1171 last, NULL); 1172 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1173 dev_info(&pf->pdev->dev, 1174 "read NVM failed, invalid offset 0x%x\n", 1175 offset); 1176 break; 1177 } else if (ret_val && 1178 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1179 dev_info(&pf->pdev->dev, 1180 "read NVM failed, access, offset 0x%x\n", 1181 offset); 1182 break; 1183 } else if (ret_val) { 1184 dev_info(&pf->pdev->dev, 1185 "read NVM failed offset %d err=%d status=0x%x\n", 1186 offset, ret_val, hw->aq.asq_last_status); 1187 break; 1188 } 1189 } 1190 1191 i40e_release_nvm(hw); 1192 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1193 free_buff: 1194 kfree(eeprom_buff); 1195 return ret_val; 1196 } 1197 1198 static int i40e_get_eeprom_len(struct net_device *netdev) 1199 { 1200 struct i40e_netdev_priv *np = netdev_priv(netdev); 1201 struct i40e_hw *hw = &np->vsi->back->hw; 1202 u32 val; 1203 1204 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1205 if (hw->mac.type == I40E_MAC_X722) { 1206 val = X722_EEPROM_SCOPE_LIMIT + 1; 1207 return val; 1208 } 1209 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1210 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1211 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1212 /* register returns value in power of 2, 64Kbyte chunks. */ 1213 val = (64 * 1024) * BIT(val); 1214 return val; 1215 } 1216 1217 static int i40e_set_eeprom(struct net_device *netdev, 1218 struct ethtool_eeprom *eeprom, u8 *bytes) 1219 { 1220 struct i40e_netdev_priv *np = netdev_priv(netdev); 1221 struct i40e_hw *hw = &np->vsi->back->hw; 1222 struct i40e_pf *pf = np->vsi->back; 1223 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1224 int ret_val = 0; 1225 int errno = 0; 1226 u32 magic; 1227 1228 /* normal ethtool set_eeprom is not supported */ 1229 magic = hw->vendor_id | (hw->device_id << 16); 1230 if (eeprom->magic == magic) 1231 errno = -EOPNOTSUPP; 1232 /* check for NVMUpdate access method */ 1233 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1234 errno = -EINVAL; 1235 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || 1236 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) 1237 errno = -EBUSY; 1238 else 1239 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1240 1241 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1242 dev_info(&pf->pdev->dev, 1243 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1244 ret_val, hw->aq.asq_last_status, errno, 1245 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1246 cmd->offset, cmd->data_size); 1247 1248 return errno; 1249 } 1250 1251 static void i40e_get_drvinfo(struct net_device *netdev, 1252 struct ethtool_drvinfo *drvinfo) 1253 { 1254 struct i40e_netdev_priv *np = netdev_priv(netdev); 1255 struct i40e_vsi *vsi = np->vsi; 1256 struct i40e_pf *pf = vsi->back; 1257 1258 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1259 strlcpy(drvinfo->version, i40e_driver_version_str, 1260 sizeof(drvinfo->version)); 1261 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1262 sizeof(drvinfo->fw_version)); 1263 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1264 sizeof(drvinfo->bus_info)); 1265 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1266 if (pf->hw.pf_id == 0) 1267 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1268 } 1269 1270 static void i40e_get_ringparam(struct net_device *netdev, 1271 struct ethtool_ringparam *ring) 1272 { 1273 struct i40e_netdev_priv *np = netdev_priv(netdev); 1274 struct i40e_pf *pf = np->vsi->back; 1275 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1276 1277 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1278 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1279 ring->rx_mini_max_pending = 0; 1280 ring->rx_jumbo_max_pending = 0; 1281 ring->rx_pending = vsi->rx_rings[0]->count; 1282 ring->tx_pending = vsi->tx_rings[0]->count; 1283 ring->rx_mini_pending = 0; 1284 ring->rx_jumbo_pending = 0; 1285 } 1286 1287 static int i40e_set_ringparam(struct net_device *netdev, 1288 struct ethtool_ringparam *ring) 1289 { 1290 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1291 struct i40e_netdev_priv *np = netdev_priv(netdev); 1292 struct i40e_hw *hw = &np->vsi->back->hw; 1293 struct i40e_vsi *vsi = np->vsi; 1294 struct i40e_pf *pf = vsi->back; 1295 u32 new_rx_count, new_tx_count; 1296 int i, err = 0; 1297 1298 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1299 return -EINVAL; 1300 1301 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1302 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1303 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1304 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1305 netdev_info(netdev, 1306 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1307 ring->tx_pending, ring->rx_pending, 1308 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1309 return -EINVAL; 1310 } 1311 1312 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1313 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1314 1315 /* if nothing to do return success */ 1316 if ((new_tx_count == vsi->tx_rings[0]->count) && 1317 (new_rx_count == vsi->rx_rings[0]->count)) 1318 return 0; 1319 1320 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) 1321 usleep_range(1000, 2000); 1322 1323 if (!netif_running(vsi->netdev)) { 1324 /* simple case - set for the next time the netdev is started */ 1325 for (i = 0; i < vsi->num_queue_pairs; i++) { 1326 vsi->tx_rings[i]->count = new_tx_count; 1327 vsi->rx_rings[i]->count = new_rx_count; 1328 } 1329 goto done; 1330 } 1331 1332 /* We can't just free everything and then setup again, 1333 * because the ISRs in MSI-X mode get passed pointers 1334 * to the Tx and Rx ring structs. 1335 */ 1336 1337 /* alloc updated Tx resources */ 1338 if (new_tx_count != vsi->tx_rings[0]->count) { 1339 netdev_info(netdev, 1340 "Changing Tx descriptor count from %d to %d.\n", 1341 vsi->tx_rings[0]->count, new_tx_count); 1342 tx_rings = kcalloc(vsi->alloc_queue_pairs, 1343 sizeof(struct i40e_ring), GFP_KERNEL); 1344 if (!tx_rings) { 1345 err = -ENOMEM; 1346 goto done; 1347 } 1348 1349 for (i = 0; i < vsi->num_queue_pairs; i++) { 1350 /* clone ring and setup updated count */ 1351 tx_rings[i] = *vsi->tx_rings[i]; 1352 tx_rings[i].count = new_tx_count; 1353 /* the desc and bi pointers will be reallocated in the 1354 * setup call 1355 */ 1356 tx_rings[i].desc = NULL; 1357 tx_rings[i].rx_bi = NULL; 1358 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1359 if (err) { 1360 while (i) { 1361 i--; 1362 i40e_free_tx_resources(&tx_rings[i]); 1363 } 1364 kfree(tx_rings); 1365 tx_rings = NULL; 1366 1367 goto done; 1368 } 1369 } 1370 } 1371 1372 /* alloc updated Rx resources */ 1373 if (new_rx_count != vsi->rx_rings[0]->count) { 1374 netdev_info(netdev, 1375 "Changing Rx descriptor count from %d to %d\n", 1376 vsi->rx_rings[0]->count, new_rx_count); 1377 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1378 sizeof(struct i40e_ring), GFP_KERNEL); 1379 if (!rx_rings) { 1380 err = -ENOMEM; 1381 goto free_tx; 1382 } 1383 1384 for (i = 0; i < vsi->num_queue_pairs; i++) { 1385 struct i40e_ring *ring; 1386 u16 unused; 1387 1388 /* clone ring and setup updated count */ 1389 rx_rings[i] = *vsi->rx_rings[i]; 1390 rx_rings[i].count = new_rx_count; 1391 /* the desc and bi pointers will be reallocated in the 1392 * setup call 1393 */ 1394 rx_rings[i].desc = NULL; 1395 rx_rings[i].rx_bi = NULL; 1396 /* this is to allow wr32 to have something to write to 1397 * during early allocation of Rx buffers 1398 */ 1399 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1400 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1401 if (err) 1402 goto rx_unwind; 1403 1404 /* now allocate the Rx buffers to make sure the OS 1405 * has enough memory, any failure here means abort 1406 */ 1407 ring = &rx_rings[i]; 1408 unused = I40E_DESC_UNUSED(ring); 1409 err = i40e_alloc_rx_buffers(ring, unused); 1410 rx_unwind: 1411 if (err) { 1412 do { 1413 i40e_free_rx_resources(&rx_rings[i]); 1414 } while (i--); 1415 kfree(rx_rings); 1416 rx_rings = NULL; 1417 1418 goto free_tx; 1419 } 1420 } 1421 } 1422 1423 /* Bring interface down, copy in the new ring info, 1424 * then restore the interface 1425 */ 1426 i40e_down(vsi); 1427 1428 if (tx_rings) { 1429 for (i = 0; i < vsi->num_queue_pairs; i++) { 1430 i40e_free_tx_resources(vsi->tx_rings[i]); 1431 *vsi->tx_rings[i] = tx_rings[i]; 1432 } 1433 kfree(tx_rings); 1434 tx_rings = NULL; 1435 } 1436 1437 if (rx_rings) { 1438 for (i = 0; i < vsi->num_queue_pairs; i++) { 1439 i40e_free_rx_resources(vsi->rx_rings[i]); 1440 /* get the real tail offset */ 1441 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1442 /* this is to fake out the allocation routine 1443 * into thinking it has to realloc everything 1444 * but the recycling logic will let us re-use 1445 * the buffers allocated above 1446 */ 1447 rx_rings[i].next_to_use = 0; 1448 rx_rings[i].next_to_clean = 0; 1449 rx_rings[i].next_to_alloc = 0; 1450 /* do a struct copy */ 1451 *vsi->rx_rings[i] = rx_rings[i]; 1452 } 1453 kfree(rx_rings); 1454 rx_rings = NULL; 1455 } 1456 1457 i40e_up(vsi); 1458 1459 free_tx: 1460 /* error cleanup if the Rx allocations failed after getting Tx */ 1461 if (tx_rings) { 1462 for (i = 0; i < vsi->num_queue_pairs; i++) 1463 i40e_free_tx_resources(&tx_rings[i]); 1464 kfree(tx_rings); 1465 tx_rings = NULL; 1466 } 1467 1468 done: 1469 clear_bit(__I40E_CONFIG_BUSY, &pf->state); 1470 1471 return err; 1472 } 1473 1474 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1475 { 1476 struct i40e_netdev_priv *np = netdev_priv(netdev); 1477 struct i40e_vsi *vsi = np->vsi; 1478 struct i40e_pf *pf = vsi->back; 1479 1480 switch (sset) { 1481 case ETH_SS_TEST: 1482 return I40E_TEST_LEN; 1483 case ETH_SS_STATS: 1484 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1485 int len = I40E_PF_STATS_LEN(netdev); 1486 1487 if ((pf->lan_veb != I40E_NO_VEB) && 1488 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) 1489 len += I40E_VEB_STATS_TOTAL; 1490 return len; 1491 } else { 1492 return I40E_VSI_STATS_LEN(netdev); 1493 } 1494 case ETH_SS_PRIV_FLAGS: 1495 return I40E_PRIV_FLAGS_STR_LEN + 1496 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1497 default: 1498 return -EOPNOTSUPP; 1499 } 1500 } 1501 1502 static void i40e_get_ethtool_stats(struct net_device *netdev, 1503 struct ethtool_stats *stats, u64 *data) 1504 { 1505 struct i40e_netdev_priv *np = netdev_priv(netdev); 1506 struct i40e_ring *tx_ring, *rx_ring; 1507 struct i40e_vsi *vsi = np->vsi; 1508 struct i40e_pf *pf = vsi->back; 1509 int i = 0; 1510 char *p; 1511 int j; 1512 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1513 unsigned int start; 1514 1515 i40e_update_stats(vsi); 1516 1517 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1518 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1519 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1520 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1521 } 1522 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1523 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1524 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1525 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1526 } 1527 rcu_read_lock(); 1528 for (j = 0; j < vsi->num_queue_pairs; j++) { 1529 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]); 1530 1531 if (!tx_ring) 1532 continue; 1533 1534 /* process Tx ring statistics */ 1535 do { 1536 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1537 data[i] = tx_ring->stats.packets; 1538 data[i + 1] = tx_ring->stats.bytes; 1539 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1540 i += 2; 1541 1542 /* Rx ring is the 2nd half of the queue pair */ 1543 rx_ring = &tx_ring[1]; 1544 do { 1545 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1546 data[i] = rx_ring->stats.packets; 1547 data[i + 1] = rx_ring->stats.bytes; 1548 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1549 i += 2; 1550 } 1551 rcu_read_unlock(); 1552 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1553 return; 1554 1555 if ((pf->lan_veb != I40E_NO_VEB) && 1556 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1557 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1558 1559 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1560 p = (char *)veb; 1561 p += i40e_gstrings_veb_stats[j].stat_offset; 1562 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1563 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1564 } 1565 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1566 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1567 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1568 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1569 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1570 } 1571 } 1572 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1573 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1574 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1575 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1576 } 1577 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1578 data[i++] = pf->stats.priority_xon_tx[j]; 1579 data[i++] = pf->stats.priority_xoff_tx[j]; 1580 } 1581 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1582 data[i++] = pf->stats.priority_xon_rx[j]; 1583 data[i++] = pf->stats.priority_xoff_rx[j]; 1584 } 1585 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1586 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1587 } 1588 1589 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1590 u8 *data) 1591 { 1592 struct i40e_netdev_priv *np = netdev_priv(netdev); 1593 struct i40e_vsi *vsi = np->vsi; 1594 struct i40e_pf *pf = vsi->back; 1595 char *p = (char *)data; 1596 int i; 1597 1598 switch (stringset) { 1599 case ETH_SS_TEST: 1600 memcpy(data, i40e_gstrings_test, 1601 I40E_TEST_LEN * ETH_GSTRING_LEN); 1602 break; 1603 case ETH_SS_STATS: 1604 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1605 snprintf(p, ETH_GSTRING_LEN, "%s", 1606 i40e_gstrings_net_stats[i].stat_string); 1607 p += ETH_GSTRING_LEN; 1608 } 1609 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1610 snprintf(p, ETH_GSTRING_LEN, "%s", 1611 i40e_gstrings_misc_stats[i].stat_string); 1612 p += ETH_GSTRING_LEN; 1613 } 1614 for (i = 0; i < vsi->num_queue_pairs; i++) { 1615 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1616 p += ETH_GSTRING_LEN; 1617 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1618 p += ETH_GSTRING_LEN; 1619 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1620 p += ETH_GSTRING_LEN; 1621 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1622 p += ETH_GSTRING_LEN; 1623 } 1624 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1625 return; 1626 1627 if ((pf->lan_veb != I40E_NO_VEB) && 1628 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1629 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1630 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1631 i40e_gstrings_veb_stats[i].stat_string); 1632 p += ETH_GSTRING_LEN; 1633 } 1634 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1635 snprintf(p, ETH_GSTRING_LEN, 1636 "veb.tc_%d_tx_packets", i); 1637 p += ETH_GSTRING_LEN; 1638 snprintf(p, ETH_GSTRING_LEN, 1639 "veb.tc_%d_tx_bytes", i); 1640 p += ETH_GSTRING_LEN; 1641 snprintf(p, ETH_GSTRING_LEN, 1642 "veb.tc_%d_rx_packets", i); 1643 p += ETH_GSTRING_LEN; 1644 snprintf(p, ETH_GSTRING_LEN, 1645 "veb.tc_%d_rx_bytes", i); 1646 p += ETH_GSTRING_LEN; 1647 } 1648 } 1649 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1650 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1651 i40e_gstrings_stats[i].stat_string); 1652 p += ETH_GSTRING_LEN; 1653 } 1654 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1655 snprintf(p, ETH_GSTRING_LEN, 1656 "port.tx_priority_%d_xon", i); 1657 p += ETH_GSTRING_LEN; 1658 snprintf(p, ETH_GSTRING_LEN, 1659 "port.tx_priority_%d_xoff", i); 1660 p += ETH_GSTRING_LEN; 1661 } 1662 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1663 snprintf(p, ETH_GSTRING_LEN, 1664 "port.rx_priority_%d_xon", i); 1665 p += ETH_GSTRING_LEN; 1666 snprintf(p, ETH_GSTRING_LEN, 1667 "port.rx_priority_%d_xoff", i); 1668 p += ETH_GSTRING_LEN; 1669 } 1670 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1671 snprintf(p, ETH_GSTRING_LEN, 1672 "port.rx_priority_%d_xon_2_xoff", i); 1673 p += ETH_GSTRING_LEN; 1674 } 1675 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1676 break; 1677 case ETH_SS_PRIV_FLAGS: 1678 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1679 snprintf(p, ETH_GSTRING_LEN, "%s", 1680 i40e_gstrings_priv_flags[i].flag_string); 1681 p += ETH_GSTRING_LEN; 1682 } 1683 if (pf->hw.pf_id != 0) 1684 break; 1685 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1686 snprintf(p, ETH_GSTRING_LEN, "%s", 1687 i40e_gl_gstrings_priv_flags[i].flag_string); 1688 p += ETH_GSTRING_LEN; 1689 } 1690 break; 1691 default: 1692 break; 1693 } 1694 } 1695 1696 static int i40e_get_ts_info(struct net_device *dev, 1697 struct ethtool_ts_info *info) 1698 { 1699 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1700 1701 /* only report HW timestamping if PTP is enabled */ 1702 if (!(pf->flags & I40E_FLAG_PTP)) 1703 return ethtool_op_get_ts_info(dev, info); 1704 1705 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1706 SOF_TIMESTAMPING_RX_SOFTWARE | 1707 SOF_TIMESTAMPING_SOFTWARE | 1708 SOF_TIMESTAMPING_TX_HARDWARE | 1709 SOF_TIMESTAMPING_RX_HARDWARE | 1710 SOF_TIMESTAMPING_RAW_HARDWARE; 1711 1712 if (pf->ptp_clock) 1713 info->phc_index = ptp_clock_index(pf->ptp_clock); 1714 else 1715 info->phc_index = -1; 1716 1717 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1718 1719 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1720 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1721 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1722 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1723 1724 if (pf->flags & I40E_FLAG_PTP_L4_CAPABLE) 1725 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1726 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1727 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1728 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1729 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1730 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1731 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1732 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1733 1734 return 0; 1735 } 1736 1737 static int i40e_link_test(struct net_device *netdev, u64 *data) 1738 { 1739 struct i40e_netdev_priv *np = netdev_priv(netdev); 1740 struct i40e_pf *pf = np->vsi->back; 1741 i40e_status status; 1742 bool link_up = false; 1743 1744 netif_info(pf, hw, netdev, "link test\n"); 1745 status = i40e_get_link_status(&pf->hw, &link_up); 1746 if (status) { 1747 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1748 *data = 1; 1749 return *data; 1750 } 1751 1752 if (link_up) 1753 *data = 0; 1754 else 1755 *data = 1; 1756 1757 return *data; 1758 } 1759 1760 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1761 { 1762 struct i40e_netdev_priv *np = netdev_priv(netdev); 1763 struct i40e_pf *pf = np->vsi->back; 1764 1765 netif_info(pf, hw, netdev, "register test\n"); 1766 *data = i40e_diag_reg_test(&pf->hw); 1767 1768 return *data; 1769 } 1770 1771 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1772 { 1773 struct i40e_netdev_priv *np = netdev_priv(netdev); 1774 struct i40e_pf *pf = np->vsi->back; 1775 1776 netif_info(pf, hw, netdev, "eeprom test\n"); 1777 *data = i40e_diag_eeprom_test(&pf->hw); 1778 1779 /* forcebly clear the NVM Update state machine */ 1780 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1781 1782 return *data; 1783 } 1784 1785 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1786 { 1787 struct i40e_netdev_priv *np = netdev_priv(netdev); 1788 struct i40e_pf *pf = np->vsi->back; 1789 u16 swc_old = pf->sw_int_count; 1790 1791 netif_info(pf, hw, netdev, "interrupt test\n"); 1792 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1793 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1794 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1795 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1796 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 1797 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 1798 usleep_range(1000, 2000); 1799 *data = (swc_old == pf->sw_int_count); 1800 1801 return *data; 1802 } 1803 1804 static inline bool i40e_active_vfs(struct i40e_pf *pf) 1805 { 1806 struct i40e_vf *vfs = pf->vf; 1807 int i; 1808 1809 for (i = 0; i < pf->num_alloc_vfs; i++) 1810 if (test_bit(I40E_VF_STAT_ACTIVE, &vfs[i].vf_states)) 1811 return true; 1812 return false; 1813 } 1814 1815 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 1816 { 1817 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 1818 } 1819 1820 static void i40e_diag_test(struct net_device *netdev, 1821 struct ethtool_test *eth_test, u64 *data) 1822 { 1823 struct i40e_netdev_priv *np = netdev_priv(netdev); 1824 bool if_running = netif_running(netdev); 1825 struct i40e_pf *pf = np->vsi->back; 1826 1827 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 1828 /* Offline tests */ 1829 netif_info(pf, drv, netdev, "offline testing starting\n"); 1830 1831 set_bit(__I40E_TESTING, &pf->state); 1832 1833 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 1834 dev_warn(&pf->pdev->dev, 1835 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 1836 data[I40E_ETH_TEST_REG] = 1; 1837 data[I40E_ETH_TEST_EEPROM] = 1; 1838 data[I40E_ETH_TEST_INTR] = 1; 1839 data[I40E_ETH_TEST_LINK] = 1; 1840 eth_test->flags |= ETH_TEST_FL_FAILED; 1841 clear_bit(__I40E_TESTING, &pf->state); 1842 goto skip_ol_tests; 1843 } 1844 1845 /* If the device is online then take it offline */ 1846 if (if_running) 1847 /* indicate we're in test mode */ 1848 i40e_close(netdev); 1849 else 1850 /* This reset does not affect link - if it is 1851 * changed to a type of reset that does affect 1852 * link then the following link test would have 1853 * to be moved to before the reset 1854 */ 1855 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED)); 1856 1857 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1858 eth_test->flags |= ETH_TEST_FL_FAILED; 1859 1860 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 1861 eth_test->flags |= ETH_TEST_FL_FAILED; 1862 1863 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 1864 eth_test->flags |= ETH_TEST_FL_FAILED; 1865 1866 /* run reg test last, a reset is required after it */ 1867 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 1868 eth_test->flags |= ETH_TEST_FL_FAILED; 1869 1870 clear_bit(__I40E_TESTING, &pf->state); 1871 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED)); 1872 1873 if (if_running) 1874 i40e_open(netdev); 1875 } else { 1876 /* Online tests */ 1877 netif_info(pf, drv, netdev, "online testing starting\n"); 1878 1879 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1880 eth_test->flags |= ETH_TEST_FL_FAILED; 1881 1882 /* Offline only tests, not run in online; pass by default */ 1883 data[I40E_ETH_TEST_REG] = 0; 1884 data[I40E_ETH_TEST_EEPROM] = 0; 1885 data[I40E_ETH_TEST_INTR] = 0; 1886 } 1887 1888 skip_ol_tests: 1889 1890 netif_info(pf, drv, netdev, "testing finished\n"); 1891 } 1892 1893 static void i40e_get_wol(struct net_device *netdev, 1894 struct ethtool_wolinfo *wol) 1895 { 1896 struct i40e_netdev_priv *np = netdev_priv(netdev); 1897 struct i40e_pf *pf = np->vsi->back; 1898 struct i40e_hw *hw = &pf->hw; 1899 u16 wol_nvm_bits; 1900 1901 /* NVM bit on means WoL disabled for the port */ 1902 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1903 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 1904 wol->supported = 0; 1905 wol->wolopts = 0; 1906 } else { 1907 wol->supported = WAKE_MAGIC; 1908 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 1909 } 1910 } 1911 1912 /** 1913 * i40e_set_wol - set the WakeOnLAN configuration 1914 * @netdev: the netdev in question 1915 * @wol: the ethtool WoL setting data 1916 **/ 1917 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 1918 { 1919 struct i40e_netdev_priv *np = netdev_priv(netdev); 1920 struct i40e_pf *pf = np->vsi->back; 1921 struct i40e_vsi *vsi = np->vsi; 1922 struct i40e_hw *hw = &pf->hw; 1923 u16 wol_nvm_bits; 1924 1925 /* WoL not supported if this isn't the controlling PF on the port */ 1926 if (hw->partition_id != 1) { 1927 i40e_partition_setting_complaint(pf); 1928 return -EOPNOTSUPP; 1929 } 1930 1931 if (vsi != pf->vsi[pf->lan_vsi]) 1932 return -EOPNOTSUPP; 1933 1934 /* NVM bit on means WoL disabled for the port */ 1935 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1936 if (BIT(hw->port) & wol_nvm_bits) 1937 return -EOPNOTSUPP; 1938 1939 /* only magic packet is supported */ 1940 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 1941 return -EOPNOTSUPP; 1942 1943 /* is this a new value? */ 1944 if (pf->wol_en != !!wol->wolopts) { 1945 pf->wol_en = !!wol->wolopts; 1946 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 1947 } 1948 1949 return 0; 1950 } 1951 1952 static int i40e_set_phys_id(struct net_device *netdev, 1953 enum ethtool_phys_id_state state) 1954 { 1955 struct i40e_netdev_priv *np = netdev_priv(netdev); 1956 i40e_status ret = 0; 1957 struct i40e_pf *pf = np->vsi->back; 1958 struct i40e_hw *hw = &pf->hw; 1959 int blink_freq = 2; 1960 u16 temp_status; 1961 1962 switch (state) { 1963 case ETHTOOL_ID_ACTIVE: 1964 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) { 1965 pf->led_status = i40e_led_get(hw); 1966 } else { 1967 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL); 1968 ret = i40e_led_get_phy(hw, &temp_status, 1969 &pf->phy_led_val); 1970 pf->led_status = temp_status; 1971 } 1972 return blink_freq; 1973 case ETHTOOL_ID_ON: 1974 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) 1975 i40e_led_set(hw, 0xf, false); 1976 else 1977 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 1978 break; 1979 case ETHTOOL_ID_OFF: 1980 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) 1981 i40e_led_set(hw, 0x0, false); 1982 else 1983 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 1984 break; 1985 case ETHTOOL_ID_INACTIVE: 1986 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) { 1987 i40e_led_set(hw, pf->led_status, false); 1988 } else { 1989 ret = i40e_led_set_phy(hw, false, pf->led_status, 1990 (pf->phy_led_val | 1991 I40E_PHY_LED_MODE_ORIG)); 1992 i40e_aq_set_phy_debug(hw, 0, NULL); 1993 } 1994 break; 1995 default: 1996 break; 1997 } 1998 if (ret) 1999 return -ENOENT; 2000 else 2001 return 0; 2002 } 2003 2004 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2005 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2006 * 125us (8000 interrupts per second) == ITR(62) 2007 */ 2008 2009 /** 2010 * __i40e_get_coalesce - get per-queue coalesce settings 2011 * @netdev: the netdev to check 2012 * @ec: ethtool coalesce data structure 2013 * @queue: which queue to pick 2014 * 2015 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2016 * are per queue. If queue is <0 then we default to queue 0 as the 2017 * representative value. 2018 **/ 2019 static int __i40e_get_coalesce(struct net_device *netdev, 2020 struct ethtool_coalesce *ec, 2021 int queue) 2022 { 2023 struct i40e_netdev_priv *np = netdev_priv(netdev); 2024 struct i40e_ring *rx_ring, *tx_ring; 2025 struct i40e_vsi *vsi = np->vsi; 2026 2027 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2028 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2029 2030 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2031 * return queue 0's value to represent. 2032 */ 2033 if (queue < 0) { 2034 queue = 0; 2035 } else if (queue >= vsi->num_queue_pairs) { 2036 return -EINVAL; 2037 } 2038 2039 rx_ring = vsi->rx_rings[queue]; 2040 tx_ring = vsi->tx_rings[queue]; 2041 2042 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting)) 2043 ec->use_adaptive_rx_coalesce = 1; 2044 2045 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting)) 2046 ec->use_adaptive_tx_coalesce = 1; 2047 2048 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC; 2049 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC; 2050 2051 2052 /* we use the _usecs_high to store/set the interrupt rate limit 2053 * that the hardware supports, that almost but not quite 2054 * fits the original intent of the ethtool variable, 2055 * the rx_coalesce_usecs_high limits total interrupts 2056 * per second from both tx/rx sources. 2057 */ 2058 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2059 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2060 2061 return 0; 2062 } 2063 2064 /** 2065 * i40e_get_coalesce - get a netdev's coalesce settings 2066 * @netdev: the netdev to check 2067 * @ec: ethtool coalesce data structure 2068 * 2069 * Gets the coalesce settings for a particular netdev. Note that if user has 2070 * modified per-queue settings, this only guarantees to represent queue 0. See 2071 * __i40e_get_coalesce for more details. 2072 **/ 2073 static int i40e_get_coalesce(struct net_device *netdev, 2074 struct ethtool_coalesce *ec) 2075 { 2076 return __i40e_get_coalesce(netdev, ec, -1); 2077 } 2078 2079 /** 2080 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2081 * @netdev: netdev structure 2082 * @ec: ethtool's coalesce settings 2083 * @queue: the particular queue to read 2084 * 2085 * Will read a specific queue's coalesce settings 2086 **/ 2087 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2088 struct ethtool_coalesce *ec) 2089 { 2090 return __i40e_get_coalesce(netdev, ec, queue); 2091 } 2092 2093 /** 2094 * i40e_set_itr_per_queue - set ITR values for specific queue 2095 * @vsi: the VSI to set values for 2096 * @ec: coalesce settings from ethtool 2097 * @queue: the queue to modify 2098 * 2099 * Change the ITR settings for a specific queue. 2100 **/ 2101 2102 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2103 struct ethtool_coalesce *ec, 2104 int queue) 2105 { 2106 struct i40e_pf *pf = vsi->back; 2107 struct i40e_hw *hw = &pf->hw; 2108 struct i40e_q_vector *q_vector; 2109 u16 vector, intrl; 2110 2111 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2112 2113 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs; 2114 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs; 2115 2116 if (ec->use_adaptive_rx_coalesce) 2117 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC; 2118 else 2119 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC; 2120 2121 if (ec->use_adaptive_tx_coalesce) 2122 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC; 2123 else 2124 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC; 2125 2126 q_vector = vsi->rx_rings[queue]->q_vector; 2127 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting); 2128 vector = vsi->base_vector + q_vector->v_idx; 2129 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr); 2130 2131 q_vector = vsi->tx_rings[queue]->q_vector; 2132 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting); 2133 vector = vsi->base_vector + q_vector->v_idx; 2134 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr); 2135 2136 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl); 2137 i40e_flush(hw); 2138 } 2139 2140 /** 2141 * __i40e_set_coalesce - set coalesce settings for particular queue 2142 * @netdev: the netdev to change 2143 * @ec: ethtool coalesce settings 2144 * @queue: the queue to change 2145 * 2146 * Sets the coalesce settings for a particular queue. 2147 **/ 2148 static int __i40e_set_coalesce(struct net_device *netdev, 2149 struct ethtool_coalesce *ec, 2150 int queue) 2151 { 2152 struct i40e_netdev_priv *np = netdev_priv(netdev); 2153 struct i40e_vsi *vsi = np->vsi; 2154 struct i40e_pf *pf = vsi->back; 2155 u16 intrl_reg; 2156 int i; 2157 2158 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2159 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2160 2161 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2162 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2163 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2164 return -EINVAL; 2165 } 2166 2167 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2168 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2169 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2170 return -EINVAL; 2171 } 2172 2173 if (ec->rx_coalesce_usecs == 0) { 2174 if (ec->use_adaptive_rx_coalesce) 2175 netif_info(pf, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n"); 2176 } else if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) || 2177 (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1))) { 2178 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2179 return -EINVAL; 2180 } 2181 2182 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2183 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2184 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2185 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2186 vsi->int_rate_limit); 2187 } 2188 2189 if (ec->tx_coalesce_usecs == 0) { 2190 if (ec->use_adaptive_tx_coalesce) 2191 netif_info(pf, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n"); 2192 } else if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) || 2193 (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1))) { 2194 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2195 return -EINVAL; 2196 } 2197 2198 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2199 * apply to all queues. 2200 */ 2201 if (queue < 0) { 2202 for (i = 0; i < vsi->num_queue_pairs; i++) 2203 i40e_set_itr_per_queue(vsi, ec, i); 2204 } else if (queue < vsi->num_queue_pairs) { 2205 i40e_set_itr_per_queue(vsi, ec, queue); 2206 } else { 2207 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2208 vsi->num_queue_pairs - 1); 2209 return -EINVAL; 2210 } 2211 2212 return 0; 2213 } 2214 2215 /** 2216 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2217 * @netdev: the netdev to change 2218 * @ec: ethtool coalesce settings 2219 * 2220 * This will set each queue to the same coalesce settings. 2221 **/ 2222 static int i40e_set_coalesce(struct net_device *netdev, 2223 struct ethtool_coalesce *ec) 2224 { 2225 return __i40e_set_coalesce(netdev, ec, -1); 2226 } 2227 2228 /** 2229 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2230 * @netdev: the netdev to change 2231 * @ec: ethtool's coalesce settings 2232 * @queue: the queue to change 2233 * 2234 * Sets the specified queue's coalesce settings. 2235 **/ 2236 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2237 struct ethtool_coalesce *ec) 2238 { 2239 return __i40e_set_coalesce(netdev, ec, queue); 2240 } 2241 2242 /** 2243 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2244 * @pf: pointer to the physical function struct 2245 * @cmd: ethtool rxnfc command 2246 * 2247 * Returns Success if the flow is supported, else Invalid Input. 2248 **/ 2249 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2250 { 2251 struct i40e_hw *hw = &pf->hw; 2252 u8 flow_pctype = 0; 2253 u64 i_set = 0; 2254 2255 cmd->data = 0; 2256 2257 switch (cmd->flow_type) { 2258 case TCP_V4_FLOW: 2259 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2260 break; 2261 case UDP_V4_FLOW: 2262 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2263 break; 2264 case TCP_V6_FLOW: 2265 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2266 break; 2267 case UDP_V6_FLOW: 2268 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2269 break; 2270 case SCTP_V4_FLOW: 2271 case AH_ESP_V4_FLOW: 2272 case AH_V4_FLOW: 2273 case ESP_V4_FLOW: 2274 case IPV4_FLOW: 2275 case SCTP_V6_FLOW: 2276 case AH_ESP_V6_FLOW: 2277 case AH_V6_FLOW: 2278 case ESP_V6_FLOW: 2279 case IPV6_FLOW: 2280 /* Default is src/dest for IP, no matter the L4 hashing */ 2281 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2282 break; 2283 default: 2284 return -EINVAL; 2285 } 2286 2287 /* Read flow based hash input set register */ 2288 if (flow_pctype) { 2289 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2290 flow_pctype)) | 2291 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2292 flow_pctype)) << 32); 2293 } 2294 2295 /* Process bits of hash input set */ 2296 if (i_set) { 2297 if (i_set & I40E_L4_SRC_MASK) 2298 cmd->data |= RXH_L4_B_0_1; 2299 if (i_set & I40E_L4_DST_MASK) 2300 cmd->data |= RXH_L4_B_2_3; 2301 2302 if (cmd->flow_type == TCP_V4_FLOW || 2303 cmd->flow_type == UDP_V4_FLOW) { 2304 if (i_set & I40E_L3_SRC_MASK) 2305 cmd->data |= RXH_IP_SRC; 2306 if (i_set & I40E_L3_DST_MASK) 2307 cmd->data |= RXH_IP_DST; 2308 } else if (cmd->flow_type == TCP_V6_FLOW || 2309 cmd->flow_type == UDP_V6_FLOW) { 2310 if (i_set & I40E_L3_V6_SRC_MASK) 2311 cmd->data |= RXH_IP_SRC; 2312 if (i_set & I40E_L3_V6_DST_MASK) 2313 cmd->data |= RXH_IP_DST; 2314 } 2315 } 2316 2317 return 0; 2318 } 2319 2320 /** 2321 * i40e_check_mask - Check whether a mask field is set 2322 * @mask: the full mask value 2323 * @field; mask of the field to check 2324 * 2325 * If the given mask is fully set, return positive value. If the mask for the 2326 * field is fully unset, return zero. Otherwise return a negative error code. 2327 **/ 2328 static int i40e_check_mask(u64 mask, u64 field) 2329 { 2330 u64 value = mask & field; 2331 2332 if (value == field) 2333 return 1; 2334 else if (!value) 2335 return 0; 2336 else 2337 return -1; 2338 } 2339 2340 /** 2341 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2342 * @fsp: pointer to rx flow specification 2343 * @data: pointer to userdef data structure for storage 2344 * 2345 * Read the user-defined data and deconstruct the value into a structure. No 2346 * other code should read the user-defined data, so as to ensure that every 2347 * place consistently reads the value correctly. 2348 * 2349 * The user-defined field is a 64bit Big Endian format value, which we 2350 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2351 * be defined starting from the highest bits, while small bit field values 2352 * shall be defined starting from the lowest bits. 2353 * 2354 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2355 * and the filter should be rejected. The data structure will always be 2356 * modified even if FLOW_EXT is not set. 2357 * 2358 **/ 2359 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2360 struct i40e_rx_flow_userdef *data) 2361 { 2362 u64 value, mask; 2363 int valid; 2364 2365 /* Zero memory first so it's always consistent. */ 2366 memset(data, 0, sizeof(*data)); 2367 2368 if (!(fsp->flow_type & FLOW_EXT)) 2369 return 0; 2370 2371 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2372 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2373 2374 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2375 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2376 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2377 2378 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2379 if (valid < 0) { 2380 return -EINVAL; 2381 } else if (valid) { 2382 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2383 data->flex_offset = 2384 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2385 data->flex_filter = true; 2386 } 2387 2388 return 0; 2389 } 2390 2391 /** 2392 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2393 * @fsp: pointer to rx_flow specification 2394 * 2395 * Reads the userdef data structure and properly fills in the user defined 2396 * fields of the rx_flow_spec. 2397 **/ 2398 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2399 struct i40e_rx_flow_userdef *data) 2400 { 2401 u64 value = 0, mask = 0; 2402 2403 if (data->flex_filter) { 2404 value |= data->flex_word; 2405 value |= (u64)data->flex_offset << 16; 2406 mask |= I40E_USERDEF_FLEX_FILTER; 2407 } 2408 2409 if (value || mask) 2410 fsp->flow_type |= FLOW_EXT; 2411 2412 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2413 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2414 } 2415 2416 /** 2417 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2418 * @pf: Pointer to the physical function struct 2419 * @cmd: The command to get or set Rx flow classification rules 2420 * @rule_locs: Array of used rule locations 2421 * 2422 * This function populates both the total and actual rule count of 2423 * the ethtool flow classification command 2424 * 2425 * Returns 0 on success or -EMSGSIZE if entry not found 2426 **/ 2427 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2428 struct ethtool_rxnfc *cmd, 2429 u32 *rule_locs) 2430 { 2431 struct i40e_fdir_filter *rule; 2432 struct hlist_node *node2; 2433 int cnt = 0; 2434 2435 /* report total rule count */ 2436 cmd->data = i40e_get_fd_cnt_all(pf); 2437 2438 hlist_for_each_entry_safe(rule, node2, 2439 &pf->fdir_filter_list, fdir_node) { 2440 if (cnt == cmd->rule_cnt) 2441 return -EMSGSIZE; 2442 2443 rule_locs[cnt] = rule->fd_id; 2444 cnt++; 2445 } 2446 2447 cmd->rule_cnt = cnt; 2448 2449 return 0; 2450 } 2451 2452 /** 2453 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2454 * @pf: Pointer to the physical function struct 2455 * @cmd: The command to get or set Rx flow classification rules 2456 * 2457 * This function looks up a filter based on the Rx flow classification 2458 * command and fills the flow spec info for it if found 2459 * 2460 * Returns 0 on success or -EINVAL if filter not found 2461 **/ 2462 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2463 struct ethtool_rxnfc *cmd) 2464 { 2465 struct ethtool_rx_flow_spec *fsp = 2466 (struct ethtool_rx_flow_spec *)&cmd->fs; 2467 struct i40e_rx_flow_userdef userdef = {0}; 2468 struct i40e_fdir_filter *rule = NULL; 2469 struct hlist_node *node2; 2470 u64 input_set; 2471 u16 index; 2472 2473 hlist_for_each_entry_safe(rule, node2, 2474 &pf->fdir_filter_list, fdir_node) { 2475 if (fsp->location <= rule->fd_id) 2476 break; 2477 } 2478 2479 if (!rule || fsp->location != rule->fd_id) 2480 return -EINVAL; 2481 2482 fsp->flow_type = rule->flow_type; 2483 if (fsp->flow_type == IP_USER_FLOW) { 2484 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2485 fsp->h_u.usr_ip4_spec.proto = 0; 2486 fsp->m_u.usr_ip4_spec.proto = 0; 2487 } 2488 2489 /* Reverse the src and dest notion, since the HW views them from 2490 * Tx perspective where as the user expects it from Rx filter view. 2491 */ 2492 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2493 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2494 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2495 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2496 2497 switch (rule->flow_type) { 2498 case SCTP_V4_FLOW: 2499 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2500 break; 2501 case TCP_V4_FLOW: 2502 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2503 break; 2504 case UDP_V4_FLOW: 2505 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2506 break; 2507 case IP_USER_FLOW: 2508 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2509 break; 2510 default: 2511 /* If we have stored a filter with a flow type not listed here 2512 * it is almost certainly a driver bug. WARN(), and then 2513 * assign the input_set as if all fields are enabled to avoid 2514 * reading unassigned memory. 2515 */ 2516 WARN(1, "Missing input set index for flow_type %d\n", 2517 rule->flow_type); 2518 input_set = 0xFFFFFFFFFFFFFFFFULL; 2519 goto no_input_set; 2520 } 2521 2522 input_set = i40e_read_fd_input_set(pf, index); 2523 2524 no_input_set: 2525 if (input_set & I40E_L3_SRC_MASK) 2526 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFF); 2527 2528 if (input_set & I40E_L3_DST_MASK) 2529 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFF); 2530 2531 if (input_set & I40E_L4_SRC_MASK) 2532 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFFFFFF); 2533 2534 if (input_set & I40E_L4_DST_MASK) 2535 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFFFFFF); 2536 2537 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2538 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2539 else 2540 fsp->ring_cookie = rule->q_index; 2541 2542 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2543 struct i40e_vsi *vsi; 2544 2545 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2546 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2547 /* VFs are zero-indexed by the driver, but ethtool 2548 * expects them to be one-indexed, so add one here 2549 */ 2550 u64 ring_vf = vsi->vf_id + 1; 2551 2552 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2553 fsp->ring_cookie |= ring_vf; 2554 } 2555 } 2556 2557 if (rule->flex_filter) { 2558 userdef.flex_filter = true; 2559 userdef.flex_word = be16_to_cpu(rule->flex_word); 2560 userdef.flex_offset = rule->flex_offset; 2561 } 2562 2563 i40e_fill_rx_flow_user_data(fsp, &userdef); 2564 2565 return 0; 2566 } 2567 2568 /** 2569 * i40e_get_rxnfc - command to get RX flow classification rules 2570 * @netdev: network interface device structure 2571 * @cmd: ethtool rxnfc command 2572 * 2573 * Returns Success if the command is supported. 2574 **/ 2575 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2576 u32 *rule_locs) 2577 { 2578 struct i40e_netdev_priv *np = netdev_priv(netdev); 2579 struct i40e_vsi *vsi = np->vsi; 2580 struct i40e_pf *pf = vsi->back; 2581 int ret = -EOPNOTSUPP; 2582 2583 switch (cmd->cmd) { 2584 case ETHTOOL_GRXRINGS: 2585 cmd->data = vsi->num_queue_pairs; 2586 ret = 0; 2587 break; 2588 case ETHTOOL_GRXFH: 2589 ret = i40e_get_rss_hash_opts(pf, cmd); 2590 break; 2591 case ETHTOOL_GRXCLSRLCNT: 2592 cmd->rule_cnt = pf->fdir_pf_active_filters; 2593 /* report total rule count */ 2594 cmd->data = i40e_get_fd_cnt_all(pf); 2595 ret = 0; 2596 break; 2597 case ETHTOOL_GRXCLSRULE: 2598 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2599 break; 2600 case ETHTOOL_GRXCLSRLALL: 2601 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2602 break; 2603 default: 2604 break; 2605 } 2606 2607 return ret; 2608 } 2609 2610 /** 2611 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2612 * @nfc: pointer to user request 2613 * @i_setc bits currently set 2614 * 2615 * Returns value of bits to be set per user request 2616 **/ 2617 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2618 { 2619 u64 i_set = i_setc; 2620 u64 src_l3 = 0, dst_l3 = 0; 2621 2622 if (nfc->data & RXH_L4_B_0_1) 2623 i_set |= I40E_L4_SRC_MASK; 2624 else 2625 i_set &= ~I40E_L4_SRC_MASK; 2626 if (nfc->data & RXH_L4_B_2_3) 2627 i_set |= I40E_L4_DST_MASK; 2628 else 2629 i_set &= ~I40E_L4_DST_MASK; 2630 2631 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2632 src_l3 = I40E_L3_V6_SRC_MASK; 2633 dst_l3 = I40E_L3_V6_DST_MASK; 2634 } else if (nfc->flow_type == TCP_V4_FLOW || 2635 nfc->flow_type == UDP_V4_FLOW) { 2636 src_l3 = I40E_L3_SRC_MASK; 2637 dst_l3 = I40E_L3_DST_MASK; 2638 } else { 2639 /* Any other flow type are not supported here */ 2640 return i_set; 2641 } 2642 2643 if (nfc->data & RXH_IP_SRC) 2644 i_set |= src_l3; 2645 else 2646 i_set &= ~src_l3; 2647 if (nfc->data & RXH_IP_DST) 2648 i_set |= dst_l3; 2649 else 2650 i_set &= ~dst_l3; 2651 2652 return i_set; 2653 } 2654 2655 /** 2656 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2657 * @pf: pointer to the physical function struct 2658 * @cmd: ethtool rxnfc command 2659 * 2660 * Returns Success if the flow input set is supported. 2661 **/ 2662 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2663 { 2664 struct i40e_hw *hw = &pf->hw; 2665 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2666 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2667 u8 flow_pctype = 0; 2668 u64 i_set, i_setc; 2669 2670 /* RSS does not support anything other than hashing 2671 * to queues on src and dst IPs and ports 2672 */ 2673 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2674 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2675 return -EINVAL; 2676 2677 switch (nfc->flow_type) { 2678 case TCP_V4_FLOW: 2679 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2680 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2681 hena |= 2682 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2683 break; 2684 case TCP_V6_FLOW: 2685 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2686 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2687 hena |= 2688 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2689 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2690 hena |= 2691 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2692 break; 2693 case UDP_V4_FLOW: 2694 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2695 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2696 hena |= 2697 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2698 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2699 2700 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2701 break; 2702 case UDP_V6_FLOW: 2703 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2704 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2705 hena |= 2706 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2707 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2708 2709 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2710 break; 2711 case AH_ESP_V4_FLOW: 2712 case AH_V4_FLOW: 2713 case ESP_V4_FLOW: 2714 case SCTP_V4_FLOW: 2715 if ((nfc->data & RXH_L4_B_0_1) || 2716 (nfc->data & RXH_L4_B_2_3)) 2717 return -EINVAL; 2718 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2719 break; 2720 case AH_ESP_V6_FLOW: 2721 case AH_V6_FLOW: 2722 case ESP_V6_FLOW: 2723 case SCTP_V6_FLOW: 2724 if ((nfc->data & RXH_L4_B_0_1) || 2725 (nfc->data & RXH_L4_B_2_3)) 2726 return -EINVAL; 2727 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2728 break; 2729 case IPV4_FLOW: 2730 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2731 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2732 break; 2733 case IPV6_FLOW: 2734 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2735 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2736 break; 2737 default: 2738 return -EINVAL; 2739 } 2740 2741 if (flow_pctype) { 2742 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2743 flow_pctype)) | 2744 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2745 flow_pctype)) << 32); 2746 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2747 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2748 (u32)i_set); 2749 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2750 (u32)(i_set >> 32)); 2751 hena |= BIT_ULL(flow_pctype); 2752 } 2753 2754 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2755 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2756 i40e_flush(hw); 2757 2758 return 0; 2759 } 2760 2761 /** 2762 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2763 * @vsi: Pointer to the targeted VSI 2764 * @input: The filter to update or NULL to indicate deletion 2765 * @sw_idx: Software index to the filter 2766 * @cmd: The command to get or set Rx flow classification rules 2767 * 2768 * This function updates (or deletes) a Flow Director entry from 2769 * the hlist of the corresponding PF 2770 * 2771 * Returns 0 on success 2772 **/ 2773 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 2774 struct i40e_fdir_filter *input, 2775 u16 sw_idx, 2776 struct ethtool_rxnfc *cmd) 2777 { 2778 struct i40e_fdir_filter *rule, *parent; 2779 struct i40e_pf *pf = vsi->back; 2780 struct hlist_node *node2; 2781 int err = -EINVAL; 2782 2783 parent = NULL; 2784 rule = NULL; 2785 2786 hlist_for_each_entry_safe(rule, node2, 2787 &pf->fdir_filter_list, fdir_node) { 2788 /* hash found, or no matching entry */ 2789 if (rule->fd_id >= sw_idx) 2790 break; 2791 parent = rule; 2792 } 2793 2794 /* if there is an old rule occupying our place remove it */ 2795 if (rule && (rule->fd_id == sw_idx)) { 2796 /* Remove this rule, since we're either deleting it, or 2797 * replacing it. 2798 */ 2799 err = i40e_add_del_fdir(vsi, rule, false); 2800 hlist_del(&rule->fdir_node); 2801 kfree(rule); 2802 pf->fdir_pf_active_filters--; 2803 } 2804 2805 /* If we weren't given an input, this is a delete, so just return the 2806 * error code indicating if there was an entry at the requested slot 2807 */ 2808 if (!input) 2809 return err; 2810 2811 /* Otherwise, install the new rule as requested */ 2812 INIT_HLIST_NODE(&input->fdir_node); 2813 2814 /* add filter to the list */ 2815 if (parent) 2816 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2817 else 2818 hlist_add_head(&input->fdir_node, 2819 &pf->fdir_filter_list); 2820 2821 /* update counts */ 2822 pf->fdir_pf_active_filters++; 2823 2824 return 0; 2825 } 2826 2827 /** 2828 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 2829 * @pf: pointer to PF structure 2830 * 2831 * This function searches the list of filters and determines which FLX_PIT 2832 * entries are still required. It will prune any entries which are no longer 2833 * in use after the deletion. 2834 **/ 2835 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 2836 { 2837 struct i40e_flex_pit *entry, *tmp; 2838 struct i40e_fdir_filter *rule; 2839 2840 /* First, we'll check the l3 table */ 2841 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 2842 bool found = false; 2843 2844 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2845 if (rule->flow_type != IP_USER_FLOW) 2846 continue; 2847 if (rule->flex_filter && 2848 rule->flex_offset == entry->src_offset) { 2849 found = true; 2850 break; 2851 } 2852 } 2853 2854 /* If we didn't find the filter, then we can prune this entry 2855 * from the list. 2856 */ 2857 if (!found) { 2858 list_del(&entry->list); 2859 kfree(entry); 2860 } 2861 } 2862 2863 /* Followed by the L4 table */ 2864 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 2865 bool found = false; 2866 2867 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2868 /* Skip this filter if it's L3, since we already 2869 * checked those in the above loop 2870 */ 2871 if (rule->flow_type == IP_USER_FLOW) 2872 continue; 2873 if (rule->flex_filter && 2874 rule->flex_offset == entry->src_offset) { 2875 found = true; 2876 break; 2877 } 2878 } 2879 2880 /* If we didn't find the filter, then we can prune this entry 2881 * from the list. 2882 */ 2883 if (!found) { 2884 list_del(&entry->list); 2885 kfree(entry); 2886 } 2887 } 2888 } 2889 2890 /** 2891 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 2892 * @vsi: Pointer to the targeted VSI 2893 * @cmd: The command to get or set Rx flow classification rules 2894 * 2895 * The function removes a Flow Director filter entry from the 2896 * hlist of the corresponding PF 2897 * 2898 * Returns 0 on success 2899 */ 2900 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 2901 struct ethtool_rxnfc *cmd) 2902 { 2903 struct ethtool_rx_flow_spec *fsp = 2904 (struct ethtool_rx_flow_spec *)&cmd->fs; 2905 struct i40e_pf *pf = vsi->back; 2906 int ret = 0; 2907 2908 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || 2909 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) 2910 return -EBUSY; 2911 2912 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 2913 return -EBUSY; 2914 2915 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 2916 2917 i40e_prune_flex_pit_list(pf); 2918 2919 i40e_fdir_check_and_reenable(pf); 2920 return ret; 2921 } 2922 2923 /** 2924 * i40e_unused_pit_index - Find an unused PIT index for given list 2925 * @pf: the PF data structure 2926 * 2927 * Find the first unused flexible PIT index entry. We search both the L3 and 2928 * L4 flexible PIT lists so that the returned index is unique and unused by 2929 * either currently programmed L3 or L4 filters. We use a bit field as storage 2930 * to track which indexes are already used. 2931 **/ 2932 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 2933 { 2934 unsigned long available_index = 0xFF; 2935 struct i40e_flex_pit *entry; 2936 2937 /* We need to make sure that the new index isn't in use by either L3 2938 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 2939 * L4 to use the same index. 2940 */ 2941 2942 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 2943 clear_bit(entry->pit_index, &available_index); 2944 2945 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 2946 clear_bit(entry->pit_index, &available_index); 2947 2948 return find_first_bit(&available_index, 8); 2949 } 2950 2951 /** 2952 * i40e_find_flex_offset - Find an existing flex src_offset 2953 * @flex_pit_list: L3 or L4 flex PIT list 2954 * @src_offset: new src_offset to find 2955 * 2956 * Searches the flex_pit_list for an existing offset. If no offset is 2957 * currently programmed, then this will return an ERR_PTR if there is no space 2958 * to add a new offset, otherwise it returns NULL. 2959 **/ 2960 static 2961 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 2962 u16 src_offset) 2963 { 2964 struct i40e_flex_pit *entry; 2965 int size = 0; 2966 2967 /* Search for the src_offset first. If we find a matching entry 2968 * already programmed, we can simply re-use it. 2969 */ 2970 list_for_each_entry(entry, flex_pit_list, list) { 2971 size++; 2972 if (entry->src_offset == src_offset) 2973 return entry; 2974 } 2975 2976 /* If we haven't found an entry yet, then the provided src offset has 2977 * not yet been programmed. We will program the src offset later on, 2978 * but we need to indicate whether there is enough space to do so 2979 * here. We'll make use of ERR_PTR for this purpose. 2980 */ 2981 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 2982 return ERR_PTR(-ENOSPC); 2983 2984 return NULL; 2985 } 2986 2987 /** 2988 * i40e_add_flex_offset - Add src_offset to flex PIT table list 2989 * @flex_pit_list: L3 or L4 flex PIT list 2990 * @src_offset: new src_offset to add 2991 * @pit_index: the PIT index to program 2992 * 2993 * This function programs the new src_offset to the list. It is expected that 2994 * i40e_find_flex_offset has already been tried and returned NULL, indicating 2995 * that this offset is not programmed, and that the list has enough space to 2996 * store another offset. 2997 * 2998 * Returns 0 on success, and negative value on error. 2999 **/ 3000 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3001 u16 src_offset, 3002 u8 pit_index) 3003 { 3004 struct i40e_flex_pit *new_pit, *entry; 3005 3006 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3007 if (!new_pit) 3008 return -ENOMEM; 3009 3010 new_pit->src_offset = src_offset; 3011 new_pit->pit_index = pit_index; 3012 3013 /* We need to insert this item such that the list is sorted by 3014 * src_offset in ascending order. 3015 */ 3016 list_for_each_entry(entry, flex_pit_list, list) { 3017 if (new_pit->src_offset < entry->src_offset) { 3018 list_add_tail(&new_pit->list, &entry->list); 3019 return 0; 3020 } 3021 3022 /* If we found an entry with our offset already programmed we 3023 * can simply return here, after freeing the memory. However, 3024 * if the pit_index does not match we need to report an error. 3025 */ 3026 if (new_pit->src_offset == entry->src_offset) { 3027 int err = 0; 3028 3029 /* If the PIT index is not the same we can't re-use 3030 * the entry, so we must report an error. 3031 */ 3032 if (new_pit->pit_index != entry->pit_index) 3033 err = -EINVAL; 3034 3035 kfree(new_pit); 3036 return err; 3037 } 3038 } 3039 3040 /* If we reached here, then we haven't yet added the item. This means 3041 * that we should add the item at the end of the list. 3042 */ 3043 list_add_tail(&new_pit->list, flex_pit_list); 3044 return 0; 3045 } 3046 3047 /** 3048 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3049 * @pf: Pointer to the PF structure 3050 * @flex_pit_list: list of flexible src offsets in use 3051 * #flex_pit_start: index to first entry for this section of the table 3052 * 3053 * In order to handle flexible data, the hardware uses a table of values 3054 * called the FLX_PIT table. This table is used to indicate which sections of 3055 * the input correspond to what PIT index values. Unfortunately, hardware is 3056 * very restrictive about programming this table. Entries must be ordered by 3057 * src_offset in ascending order, without duplicates. Additionally, unused 3058 * entries must be set to the unused index value, and must have valid size and 3059 * length according to the src_offset ordering. 3060 * 3061 * This function will reprogram the FLX_PIT register from a book-keeping 3062 * structure that we guarantee is already ordered correctly, and has no more 3063 * than 3 entries. 3064 * 3065 * To make things easier, we only support flexible values of one word length, 3066 * rather than allowing variable length flexible values. 3067 **/ 3068 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3069 struct list_head *flex_pit_list, 3070 int flex_pit_start) 3071 { 3072 struct i40e_flex_pit *entry = NULL; 3073 u16 last_offset = 0; 3074 int i = 0, j = 0; 3075 3076 /* First, loop over the list of flex PIT entries, and reprogram the 3077 * registers. 3078 */ 3079 list_for_each_entry(entry, flex_pit_list, list) { 3080 /* We have to be careful when programming values for the 3081 * largest SRC_OFFSET value. It is possible that adding 3082 * additional empty values at the end would overflow the space 3083 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3084 * we check here and add the empty values prior to adding the 3085 * largest value. 3086 * 3087 * To determine this, we will use a loop from i+1 to 3, which 3088 * will determine whether the unused entries would have valid 3089 * SRC_OFFSET. Note that there cannot be extra entries past 3090 * this value, because the only valid values would have been 3091 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3092 * have been added to the list in the first place. 3093 */ 3094 for (j = i + 1; j < 3; j++) { 3095 u16 offset = entry->src_offset + j; 3096 int index = flex_pit_start + i; 3097 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3098 1, 3099 offset - 3); 3100 3101 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3102 i40e_write_rx_ctl(&pf->hw, 3103 I40E_PRTQF_FLX_PIT(index), 3104 value); 3105 i++; 3106 } 3107 } 3108 3109 /* Now, we can program the actual value into the table */ 3110 i40e_write_rx_ctl(&pf->hw, 3111 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3112 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3113 1, 3114 entry->src_offset)); 3115 i++; 3116 } 3117 3118 /* In order to program the last entries in the table, we need to 3119 * determine the valid offset. If the list is empty, we'll just start 3120 * with 0. Otherwise, we'll start with the last item offset and add 1. 3121 * This ensures that all entries have valid sizes. If we don't do this 3122 * correctly, the hardware will disable flexible field parsing. 3123 */ 3124 if (!list_empty(flex_pit_list)) 3125 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3126 3127 for (; i < 3; i++, last_offset++) { 3128 i40e_write_rx_ctl(&pf->hw, 3129 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3130 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3131 1, 3132 last_offset)); 3133 } 3134 } 3135 3136 /** 3137 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3138 * @pf: pointer to the PF structure 3139 * 3140 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3141 * internal helper function for implementation details. 3142 **/ 3143 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3144 { 3145 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3146 I40E_FLEX_PIT_IDX_START_L3); 3147 3148 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3149 I40E_FLEX_PIT_IDX_START_L4); 3150 3151 /* We also need to program the L3 and L4 GLQF ORT register */ 3152 i40e_write_rx_ctl(&pf->hw, 3153 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3154 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3155 3, 1)); 3156 3157 i40e_write_rx_ctl(&pf->hw, 3158 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3159 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3160 3, 1)); 3161 } 3162 3163 /** 3164 * i40e_flow_str - Converts a flow_type into a human readable string 3165 * @flow_type: the flow type from a flow specification 3166 * 3167 * Currently only flow types we support are included here, and the string 3168 * value attempts to match what ethtool would use to configure this flow type. 3169 **/ 3170 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3171 { 3172 switch (fsp->flow_type & ~FLOW_EXT) { 3173 case TCP_V4_FLOW: 3174 return "tcp4"; 3175 case UDP_V4_FLOW: 3176 return "udp4"; 3177 case SCTP_V4_FLOW: 3178 return "sctp4"; 3179 case IP_USER_FLOW: 3180 return "ip4"; 3181 default: 3182 return "unknown"; 3183 } 3184 } 3185 3186 /** 3187 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3188 * @pit_index: PIT index to convert 3189 * 3190 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3191 * of range. 3192 **/ 3193 static u64 i40e_pit_index_to_mask(int pit_index) 3194 { 3195 switch (pit_index) { 3196 case 0: 3197 return I40E_FLEX_50_MASK; 3198 case 1: 3199 return I40E_FLEX_51_MASK; 3200 case 2: 3201 return I40E_FLEX_52_MASK; 3202 case 3: 3203 return I40E_FLEX_53_MASK; 3204 case 4: 3205 return I40E_FLEX_54_MASK; 3206 case 5: 3207 return I40E_FLEX_55_MASK; 3208 case 6: 3209 return I40E_FLEX_56_MASK; 3210 case 7: 3211 return I40E_FLEX_57_MASK; 3212 default: 3213 return 0; 3214 } 3215 } 3216 3217 /** 3218 * i40e_print_input_set - Show changes between two input sets 3219 * @vsi: the vsi being configured 3220 * @old: the old input set 3221 * @new: the new input set 3222 * 3223 * Print the difference between old and new input sets by showing which series 3224 * of words are toggled on or off. Only displays the bits we actually support 3225 * changing. 3226 **/ 3227 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3228 { 3229 struct i40e_pf *pf = vsi->back; 3230 bool old_value, new_value; 3231 int i; 3232 3233 old_value = !!(old & I40E_L3_SRC_MASK); 3234 new_value = !!(new & I40E_L3_SRC_MASK); 3235 if (old_value != new_value) 3236 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3237 old_value ? "ON" : "OFF", 3238 new_value ? "ON" : "OFF"); 3239 3240 old_value = !!(old & I40E_L3_DST_MASK); 3241 new_value = !!(new & I40E_L3_DST_MASK); 3242 if (old_value != new_value) 3243 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3244 old_value ? "ON" : "OFF", 3245 new_value ? "ON" : "OFF"); 3246 3247 old_value = !!(old & I40E_L4_SRC_MASK); 3248 new_value = !!(new & I40E_L4_SRC_MASK); 3249 if (old_value != new_value) 3250 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3251 old_value ? "ON" : "OFF", 3252 new_value ? "ON" : "OFF"); 3253 3254 old_value = !!(old & I40E_L4_DST_MASK); 3255 new_value = !!(new & I40E_L4_DST_MASK); 3256 if (old_value != new_value) 3257 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3258 old_value ? "ON" : "OFF", 3259 new_value ? "ON" : "OFF"); 3260 3261 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3262 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3263 if (old_value != new_value) 3264 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3265 old_value ? "ON" : "OFF", 3266 new_value ? "ON" : "OFF"); 3267 3268 /* Show change of flexible filter entries */ 3269 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3270 u64 flex_mask = i40e_pit_index_to_mask(i); 3271 3272 old_value = !!(old & flex_mask); 3273 new_value = !!(new & flex_mask); 3274 if (old_value != new_value) 3275 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3276 i, 3277 old_value ? "ON" : "OFF", 3278 new_value ? "ON" : "OFF"); 3279 } 3280 3281 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3282 old); 3283 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3284 new); 3285 } 3286 3287 /** 3288 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3289 * @vsi: pointer to the targeted VSI 3290 * @fsp: pointer to Rx flow specification 3291 * @userdef: userdefined data from flow specification 3292 * 3293 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3294 * for partial matches exists with a few limitations. First, hardware only 3295 * supports masking by word boundary (2 bytes) and not per individual bit. 3296 * Second, hardware is limited to using one mask for a flow type and cannot 3297 * use a separate mask for each filter. 3298 * 3299 * To support these limitations, if we already have a configured filter for 3300 * the specified type, this function enforces that new filters of the type 3301 * match the configured input set. Otherwise, if we do not have a filter of 3302 * the specified type, we allow the input set to be updated to match the 3303 * desired filter. 3304 * 3305 * To help ensure that administrators understand why filters weren't displayed 3306 * as supported, we print a diagnostic message displaying how the input set 3307 * would change and warning to delete the preexisting filters if required. 3308 * 3309 * Returns 0 on successful input set match, and a negative return code on 3310 * failure. 3311 **/ 3312 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3313 struct ethtool_rx_flow_spec *fsp, 3314 struct i40e_rx_flow_userdef *userdef) 3315 { 3316 struct i40e_pf *pf = vsi->back; 3317 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3318 struct ethtool_usrip4_spec *usr_ip4_spec; 3319 u64 current_mask, new_mask; 3320 bool new_flex_offset = false; 3321 bool flex_l3 = false; 3322 u16 *fdir_filter_count; 3323 u16 index, src_offset = 0; 3324 u8 pit_index = 0; 3325 int err; 3326 3327 switch (fsp->flow_type & ~FLOW_EXT) { 3328 case SCTP_V4_FLOW: 3329 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3330 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3331 break; 3332 case TCP_V4_FLOW: 3333 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3334 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3335 break; 3336 case UDP_V4_FLOW: 3337 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3338 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3339 break; 3340 case IP_USER_FLOW: 3341 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3342 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3343 flex_l3 = true; 3344 break; 3345 default: 3346 return -EOPNOTSUPP; 3347 } 3348 3349 /* Read the current input set from register memory. */ 3350 current_mask = i40e_read_fd_input_set(pf, index); 3351 new_mask = current_mask; 3352 3353 /* Determine, if any, the required changes to the input set in order 3354 * to support the provided mask. 3355 * 3356 * Hardware only supports masking at word (2 byte) granularity and does 3357 * not support full bitwise masking. This implementation simplifies 3358 * even further and only supports fully enabled or fully disabled 3359 * masks for each field, even though we could split the ip4src and 3360 * ip4dst fields. 3361 */ 3362 switch (fsp->flow_type & ~FLOW_EXT) { 3363 case SCTP_V4_FLOW: 3364 new_mask &= ~I40E_VERIFY_TAG_MASK; 3365 /* Fall through */ 3366 case TCP_V4_FLOW: 3367 case UDP_V4_FLOW: 3368 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3369 3370 /* IPv4 source address */ 3371 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3372 new_mask |= I40E_L3_SRC_MASK; 3373 else if (!tcp_ip4_spec->ip4src) 3374 new_mask &= ~I40E_L3_SRC_MASK; 3375 else 3376 return -EOPNOTSUPP; 3377 3378 /* IPv4 destination address */ 3379 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3380 new_mask |= I40E_L3_DST_MASK; 3381 else if (!tcp_ip4_spec->ip4dst) 3382 new_mask &= ~I40E_L3_DST_MASK; 3383 else 3384 return -EOPNOTSUPP; 3385 3386 /* L4 source port */ 3387 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3388 new_mask |= I40E_L4_SRC_MASK; 3389 else if (!tcp_ip4_spec->psrc) 3390 new_mask &= ~I40E_L4_SRC_MASK; 3391 else 3392 return -EOPNOTSUPP; 3393 3394 /* L4 destination port */ 3395 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3396 new_mask |= I40E_L4_DST_MASK; 3397 else if (!tcp_ip4_spec->pdst) 3398 new_mask &= ~I40E_L4_DST_MASK; 3399 else 3400 return -EOPNOTSUPP; 3401 3402 /* Filtering on Type of Service is not supported. */ 3403 if (tcp_ip4_spec->tos) 3404 return -EOPNOTSUPP; 3405 3406 break; 3407 case IP_USER_FLOW: 3408 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3409 3410 /* IPv4 source address */ 3411 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3412 new_mask |= I40E_L3_SRC_MASK; 3413 else if (!usr_ip4_spec->ip4src) 3414 new_mask &= ~I40E_L3_SRC_MASK; 3415 else 3416 return -EOPNOTSUPP; 3417 3418 /* IPv4 destination address */ 3419 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3420 new_mask |= I40E_L3_DST_MASK; 3421 else if (!usr_ip4_spec->ip4dst) 3422 new_mask &= ~I40E_L3_DST_MASK; 3423 else 3424 return -EOPNOTSUPP; 3425 3426 /* First 4 bytes of L4 header */ 3427 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3428 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3429 else if (!usr_ip4_spec->l4_4_bytes) 3430 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3431 else 3432 return -EOPNOTSUPP; 3433 3434 /* Filtering on Type of Service is not supported. */ 3435 if (usr_ip4_spec->tos) 3436 return -EOPNOTSUPP; 3437 3438 /* Filtering on IP version is not supported */ 3439 if (usr_ip4_spec->ip_ver) 3440 return -EINVAL; 3441 3442 /* Filtering on L4 protocol is not supported */ 3443 if (usr_ip4_spec->proto) 3444 return -EINVAL; 3445 3446 break; 3447 default: 3448 return -EOPNOTSUPP; 3449 } 3450 3451 /* First, clear all flexible filter entries */ 3452 new_mask &= ~I40E_FLEX_INPUT_MASK; 3453 3454 /* If we have a flexible filter, try to add this offset to the correct 3455 * flexible filter PIT list. Once finished, we can update the mask. 3456 * If the src_offset changed, we will get a new mask value which will 3457 * trigger an input set change. 3458 */ 3459 if (userdef->flex_filter) { 3460 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3461 3462 /* Flexible offset must be even, since the flexible payload 3463 * must be aligned on 2-byte boundary. 3464 */ 3465 if (userdef->flex_offset & 0x1) { 3466 dev_warn(&pf->pdev->dev, 3467 "Flexible data offset must be 2-byte aligned\n"); 3468 return -EINVAL; 3469 } 3470 3471 src_offset = userdef->flex_offset >> 1; 3472 3473 /* FLX_PIT source offset value is only so large */ 3474 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3475 dev_warn(&pf->pdev->dev, 3476 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3477 return -EINVAL; 3478 } 3479 3480 /* See if this offset has already been programmed. If we get 3481 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3482 * if we get a NULL pointer, this means we will need to add 3483 * the offset. 3484 */ 3485 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3486 src_offset); 3487 if (IS_ERR(flex_pit)) 3488 return PTR_ERR(flex_pit); 3489 3490 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3491 * packet types, and thus we need to program both L3 and L4 3492 * flexible values. These must have identical flexible index, 3493 * as otherwise we can't correctly program the input set. So 3494 * we'll find both an L3 and L4 index and make sure they are 3495 * the same. 3496 */ 3497 if (flex_l3) { 3498 l3_flex_pit = 3499 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3500 src_offset); 3501 if (IS_ERR(l3_flex_pit)) 3502 return PTR_ERR(l3_flex_pit); 3503 3504 if (flex_pit) { 3505 /* If we already had a matching L4 entry, we 3506 * need to make sure that the L3 entry we 3507 * obtained uses the same index. 3508 */ 3509 if (l3_flex_pit) { 3510 if (l3_flex_pit->pit_index != 3511 flex_pit->pit_index) { 3512 return -EINVAL; 3513 } 3514 } else { 3515 new_flex_offset = true; 3516 } 3517 } else { 3518 flex_pit = l3_flex_pit; 3519 } 3520 } 3521 3522 /* If we didn't find an existing flex offset, we need to 3523 * program a new one. However, we don't immediately program it 3524 * here because we will wait to program until after we check 3525 * that it is safe to change the input set. 3526 */ 3527 if (!flex_pit) { 3528 new_flex_offset = true; 3529 pit_index = i40e_unused_pit_index(pf); 3530 } else { 3531 pit_index = flex_pit->pit_index; 3532 } 3533 3534 /* Update the mask with the new offset */ 3535 new_mask |= i40e_pit_index_to_mask(pit_index); 3536 } 3537 3538 /* If the mask and flexible filter offsets for this filter match the 3539 * currently programmed values we don't need any input set change, so 3540 * this filter is safe to install. 3541 */ 3542 if (new_mask == current_mask && !new_flex_offset) 3543 return 0; 3544 3545 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3546 i40e_flow_str(fsp)); 3547 i40e_print_input_set(vsi, current_mask, new_mask); 3548 if (new_flex_offset) { 3549 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3550 pit_index, src_offset); 3551 } 3552 3553 /* Hardware input sets are global across multiple ports, so even the 3554 * main port cannot change them when in MFP mode as this would impact 3555 * any filters on the other ports. 3556 */ 3557 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3558 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3559 return -EOPNOTSUPP; 3560 } 3561 3562 /* This filter requires us to update the input set. However, hardware 3563 * only supports one input set per flow type, and does not support 3564 * separate masks for each filter. This means that we can only support 3565 * a single mask for all filters of a specific type. 3566 * 3567 * If we have preexisting filters, they obviously depend on the 3568 * current programmed input set. Display a diagnostic message in this 3569 * case explaining why the filter could not be accepted. 3570 */ 3571 if (*fdir_filter_count) { 3572 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3573 i40e_flow_str(fsp), 3574 *fdir_filter_count); 3575 return -EOPNOTSUPP; 3576 } 3577 3578 i40e_write_fd_input_set(pf, index, new_mask); 3579 3580 /* Add the new offset and update table, if necessary */ 3581 if (new_flex_offset) { 3582 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3583 pit_index); 3584 if (err) 3585 return err; 3586 3587 if (flex_l3) { 3588 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3589 src_offset, 3590 pit_index); 3591 if (err) 3592 return err; 3593 } 3594 3595 i40e_reprogram_flex_pit(pf); 3596 } 3597 3598 return 0; 3599 } 3600 3601 /** 3602 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3603 * @vsi: pointer to the targeted VSI 3604 * @cmd: command to get or set RX flow classification rules 3605 * 3606 * Add Flow Director filters for a specific flow spec based on their 3607 * protocol. Returns 0 if the filters were successfully added. 3608 **/ 3609 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3610 struct ethtool_rxnfc *cmd) 3611 { 3612 struct i40e_rx_flow_userdef userdef; 3613 struct ethtool_rx_flow_spec *fsp; 3614 struct i40e_fdir_filter *input; 3615 u16 dest_vsi = 0, q_index = 0; 3616 struct i40e_pf *pf; 3617 int ret = -EINVAL; 3618 u8 dest_ctl; 3619 3620 if (!vsi) 3621 return -EINVAL; 3622 pf = vsi->back; 3623 3624 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3625 return -EOPNOTSUPP; 3626 3627 if (pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED) 3628 return -ENOSPC; 3629 3630 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || 3631 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) 3632 return -EBUSY; 3633 3634 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) 3635 return -EBUSY; 3636 3637 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3638 3639 /* Parse the user-defined field */ 3640 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3641 return -EINVAL; 3642 3643 /* Extended MAC field is not supported */ 3644 if (fsp->flow_type & FLOW_MAC_EXT) 3645 return -EINVAL; 3646 3647 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3648 if (ret) 3649 return ret; 3650 3651 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3652 pf->hw.func_caps.fd_filters_guaranteed)) { 3653 return -EINVAL; 3654 } 3655 3656 /* ring_cookie is either the drop index, or is a mask of the queue 3657 * index and VF id we wish to target. 3658 */ 3659 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3660 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3661 } else { 3662 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3663 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3664 3665 if (!vf) { 3666 if (ring >= vsi->num_queue_pairs) 3667 return -EINVAL; 3668 dest_vsi = vsi->id; 3669 } else { 3670 /* VFs are zero-indexed, so we subtract one here */ 3671 vf--; 3672 3673 if (vf >= pf->num_alloc_vfs) 3674 return -EINVAL; 3675 if (ring >= pf->vf[vf].num_queue_pairs) 3676 return -EINVAL; 3677 dest_vsi = pf->vf[vf].lan_vsi_id; 3678 } 3679 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 3680 q_index = ring; 3681 } 3682 3683 input = kzalloc(sizeof(*input), GFP_KERNEL); 3684 3685 if (!input) 3686 return -ENOMEM; 3687 3688 input->fd_id = fsp->location; 3689 input->q_index = q_index; 3690 input->dest_vsi = dest_vsi; 3691 input->dest_ctl = dest_ctl; 3692 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 3693 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 3694 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3695 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3696 input->flow_type = fsp->flow_type & ~FLOW_EXT; 3697 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 3698 3699 /* Reverse the src and dest notion, since the HW expects them to be from 3700 * Tx perspective where as the input from user is from Rx filter view. 3701 */ 3702 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 3703 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 3704 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3705 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3706 3707 if (userdef.flex_filter) { 3708 input->flex_filter = true; 3709 input->flex_word = cpu_to_be16(userdef.flex_word); 3710 input->flex_offset = userdef.flex_offset; 3711 } 3712 3713 ret = i40e_add_del_fdir(vsi, input, true); 3714 if (ret) 3715 goto free_input; 3716 3717 /* Add the input filter to the fdir_input_list, possibly replacing 3718 * a previous filter. Do not free the input structure after adding it 3719 * to the list as this would cause a use-after-free bug. 3720 */ 3721 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 3722 3723 return 0; 3724 3725 free_input: 3726 kfree(input); 3727 return ret; 3728 } 3729 3730 /** 3731 * i40e_set_rxnfc - command to set RX flow classification rules 3732 * @netdev: network interface device structure 3733 * @cmd: ethtool rxnfc command 3734 * 3735 * Returns Success if the command is supported. 3736 **/ 3737 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 3738 { 3739 struct i40e_netdev_priv *np = netdev_priv(netdev); 3740 struct i40e_vsi *vsi = np->vsi; 3741 struct i40e_pf *pf = vsi->back; 3742 int ret = -EOPNOTSUPP; 3743 3744 switch (cmd->cmd) { 3745 case ETHTOOL_SRXFH: 3746 ret = i40e_set_rss_hash_opt(pf, cmd); 3747 break; 3748 case ETHTOOL_SRXCLSRLINS: 3749 ret = i40e_add_fdir_ethtool(vsi, cmd); 3750 break; 3751 case ETHTOOL_SRXCLSRLDEL: 3752 ret = i40e_del_fdir_entry(vsi, cmd); 3753 break; 3754 default: 3755 break; 3756 } 3757 3758 return ret; 3759 } 3760 3761 /** 3762 * i40e_max_channels - get Max number of combined channels supported 3763 * @vsi: vsi pointer 3764 **/ 3765 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 3766 { 3767 /* TODO: This code assumes DCB and FD is disabled for now. */ 3768 return vsi->alloc_queue_pairs; 3769 } 3770 3771 /** 3772 * i40e_get_channels - Get the current channels enabled and max supported etc. 3773 * @netdev: network interface device structure 3774 * @ch: ethtool channels structure 3775 * 3776 * We don't support separate tx and rx queues as channels. The other count 3777 * represents how many queues are being used for control. max_combined counts 3778 * how many queue pairs we can support. They may not be mapped 1 to 1 with 3779 * q_vectors since we support a lot more queue pairs than q_vectors. 3780 **/ 3781 static void i40e_get_channels(struct net_device *dev, 3782 struct ethtool_channels *ch) 3783 { 3784 struct i40e_netdev_priv *np = netdev_priv(dev); 3785 struct i40e_vsi *vsi = np->vsi; 3786 struct i40e_pf *pf = vsi->back; 3787 3788 /* report maximum channels */ 3789 ch->max_combined = i40e_max_channels(vsi); 3790 3791 /* report info for other vector */ 3792 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 3793 ch->max_other = ch->other_count; 3794 3795 /* Note: This code assumes DCB is disabled for now. */ 3796 ch->combined_count = vsi->num_queue_pairs; 3797 } 3798 3799 /** 3800 * i40e_set_channels - Set the new channels count. 3801 * @netdev: network interface device structure 3802 * @ch: ethtool channels structure 3803 * 3804 * The new channels count may not be the same as requested by the user 3805 * since it gets rounded down to a power of 2 value. 3806 **/ 3807 static int i40e_set_channels(struct net_device *dev, 3808 struct ethtool_channels *ch) 3809 { 3810 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3811 struct i40e_netdev_priv *np = netdev_priv(dev); 3812 unsigned int count = ch->combined_count; 3813 struct i40e_vsi *vsi = np->vsi; 3814 struct i40e_pf *pf = vsi->back; 3815 struct i40e_fdir_filter *rule; 3816 struct hlist_node *node2; 3817 int new_count; 3818 int err = 0; 3819 3820 /* We do not support setting channels for any other VSI at present */ 3821 if (vsi->type != I40E_VSI_MAIN) 3822 return -EINVAL; 3823 3824 /* verify they are not requesting separate vectors */ 3825 if (!count || ch->rx_count || ch->tx_count) 3826 return -EINVAL; 3827 3828 /* verify other_count has not changed */ 3829 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 3830 return -EINVAL; 3831 3832 /* verify the number of channels does not exceed hardware limits */ 3833 if (count > i40e_max_channels(vsi)) 3834 return -EINVAL; 3835 3836 /* verify that the number of channels does not invalidate any current 3837 * flow director rules 3838 */ 3839 hlist_for_each_entry_safe(rule, node2, 3840 &pf->fdir_filter_list, fdir_node) { 3841 if (rule->dest_ctl != drop && count <= rule->q_index) { 3842 dev_warn(&pf->pdev->dev, 3843 "Existing user defined filter %d assigns flow to queue %d\n", 3844 rule->fd_id, rule->q_index); 3845 err = -EINVAL; 3846 } 3847 } 3848 3849 if (err) { 3850 dev_err(&pf->pdev->dev, 3851 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 3852 count); 3853 return err; 3854 } 3855 3856 /* update feature limits from largest to smallest supported values */ 3857 /* TODO: Flow director limit, DCB etc */ 3858 3859 /* use rss_reconfig to rebuild with new queue count and update traffic 3860 * class queue mapping 3861 */ 3862 new_count = i40e_reconfig_rss_queues(pf, count); 3863 if (new_count > 0) 3864 return 0; 3865 else 3866 return -EINVAL; 3867 } 3868 3869 /** 3870 * i40e_get_rxfh_key_size - get the RSS hash key size 3871 * @netdev: network interface device structure 3872 * 3873 * Returns the table size. 3874 **/ 3875 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 3876 { 3877 return I40E_HKEY_ARRAY_SIZE; 3878 } 3879 3880 /** 3881 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 3882 * @netdev: network interface device structure 3883 * 3884 * Returns the table size. 3885 **/ 3886 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 3887 { 3888 return I40E_HLUT_ARRAY_SIZE; 3889 } 3890 3891 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 3892 u8 *hfunc) 3893 { 3894 struct i40e_netdev_priv *np = netdev_priv(netdev); 3895 struct i40e_vsi *vsi = np->vsi; 3896 u8 *lut, *seed = NULL; 3897 int ret; 3898 u16 i; 3899 3900 if (hfunc) 3901 *hfunc = ETH_RSS_HASH_TOP; 3902 3903 if (!indir) 3904 return 0; 3905 3906 seed = key; 3907 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 3908 if (!lut) 3909 return -ENOMEM; 3910 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 3911 if (ret) 3912 goto out; 3913 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 3914 indir[i] = (u32)(lut[i]); 3915 3916 out: 3917 kfree(lut); 3918 3919 return ret; 3920 } 3921 3922 /** 3923 * i40e_set_rxfh - set the rx flow hash indirection table 3924 * @netdev: network interface device structure 3925 * @indir: indirection table 3926 * @key: hash key 3927 * 3928 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 3929 * returns 0 after programming the table. 3930 **/ 3931 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 3932 const u8 *key, const u8 hfunc) 3933 { 3934 struct i40e_netdev_priv *np = netdev_priv(netdev); 3935 struct i40e_vsi *vsi = np->vsi; 3936 struct i40e_pf *pf = vsi->back; 3937 u8 *seed = NULL; 3938 u16 i; 3939 3940 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 3941 return -EOPNOTSUPP; 3942 3943 if (key) { 3944 if (!vsi->rss_hkey_user) { 3945 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 3946 GFP_KERNEL); 3947 if (!vsi->rss_hkey_user) 3948 return -ENOMEM; 3949 } 3950 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 3951 seed = vsi->rss_hkey_user; 3952 } 3953 if (!vsi->rss_lut_user) { 3954 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 3955 if (!vsi->rss_lut_user) 3956 return -ENOMEM; 3957 } 3958 3959 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 3960 if (indir) 3961 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 3962 vsi->rss_lut_user[i] = (u8)(indir[i]); 3963 else 3964 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 3965 vsi->rss_size); 3966 3967 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 3968 I40E_HLUT_ARRAY_SIZE); 3969 } 3970 3971 /** 3972 * i40e_get_priv_flags - report device private flags 3973 * @dev: network interface device structure 3974 * 3975 * The get string set count and the string set should be matched for each 3976 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 3977 * array. 3978 * 3979 * Returns a u32 bitmap of flags. 3980 **/ 3981 static u32 i40e_get_priv_flags(struct net_device *dev) 3982 { 3983 struct i40e_netdev_priv *np = netdev_priv(dev); 3984 struct i40e_vsi *vsi = np->vsi; 3985 struct i40e_pf *pf = vsi->back; 3986 u32 i, j, ret_flags = 0; 3987 3988 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 3989 const struct i40e_priv_flags *priv_flags; 3990 3991 priv_flags = &i40e_gstrings_priv_flags[i]; 3992 3993 if (priv_flags->flag & pf->flags) 3994 ret_flags |= BIT(i); 3995 } 3996 3997 if (pf->hw.pf_id != 0) 3998 return ret_flags; 3999 4000 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4001 const struct i40e_priv_flags *priv_flags; 4002 4003 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4004 4005 if (priv_flags->flag & pf->flags) 4006 ret_flags |= BIT(i + j); 4007 } 4008 4009 return ret_flags; 4010 } 4011 4012 /** 4013 * i40e_set_priv_flags - set private flags 4014 * @dev: network interface device structure 4015 * @flags: bit flags to be set 4016 **/ 4017 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4018 { 4019 struct i40e_netdev_priv *np = netdev_priv(dev); 4020 struct i40e_vsi *vsi = np->vsi; 4021 struct i40e_pf *pf = vsi->back; 4022 u64 changed_flags; 4023 u32 i, j; 4024 4025 changed_flags = pf->flags; 4026 4027 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4028 const struct i40e_priv_flags *priv_flags; 4029 4030 priv_flags = &i40e_gstrings_priv_flags[i]; 4031 4032 if (priv_flags->read_only) 4033 continue; 4034 4035 if (flags & BIT(i)) 4036 pf->flags |= priv_flags->flag; 4037 else 4038 pf->flags &= ~(priv_flags->flag); 4039 } 4040 4041 if (pf->hw.pf_id != 0) 4042 goto flags_complete; 4043 4044 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4045 const struct i40e_priv_flags *priv_flags; 4046 4047 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4048 4049 if (priv_flags->read_only) 4050 continue; 4051 4052 if (flags & BIT(i + j)) 4053 pf->flags |= priv_flags->flag; 4054 else 4055 pf->flags &= ~(priv_flags->flag); 4056 } 4057 4058 flags_complete: 4059 /* check for flags that changed */ 4060 changed_flags ^= pf->flags; 4061 4062 /* Process any additional changes needed as a result of flag changes. 4063 * The changed_flags value reflects the list of bits that were 4064 * changed in the code above. 4065 */ 4066 4067 /* Flush current ATR settings if ATR was disabled */ 4068 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4069 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4070 pf->hw_disabled_flags |= I40E_FLAG_FD_ATR_ENABLED; 4071 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state); 4072 } 4073 4074 /* Only allow ATR evict on hardware that is capable of handling it */ 4075 if (pf->hw_disabled_flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE) 4076 pf->flags &= ~I40E_FLAG_HW_ATR_EVICT_CAPABLE; 4077 4078 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4079 u16 sw_flags = 0, valid_flags = 0; 4080 int ret; 4081 4082 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4083 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4084 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4085 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4086 NULL); 4087 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4088 dev_info(&pf->pdev->dev, 4089 "couldn't set switch config bits, err %s aq_err %s\n", 4090 i40e_stat_str(&pf->hw, ret), 4091 i40e_aq_str(&pf->hw, 4092 pf->hw.aq.asq_last_status)); 4093 /* not a fatal problem, just keep going */ 4094 } 4095 } 4096 4097 /* Issue reset to cause things to take effect, as additional bits 4098 * are added we will need to create a mask of bits requiring reset 4099 */ 4100 if ((changed_flags & I40E_FLAG_VEB_STATS_ENABLED) || 4101 ((changed_flags & I40E_FLAG_LEGACY_RX) && netif_running(dev))) 4102 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED)); 4103 4104 return 0; 4105 } 4106 4107 static const struct ethtool_ops i40e_ethtool_ops = { 4108 .get_drvinfo = i40e_get_drvinfo, 4109 .get_regs_len = i40e_get_regs_len, 4110 .get_regs = i40e_get_regs, 4111 .nway_reset = i40e_nway_reset, 4112 .get_link = ethtool_op_get_link, 4113 .get_wol = i40e_get_wol, 4114 .set_wol = i40e_set_wol, 4115 .set_eeprom = i40e_set_eeprom, 4116 .get_eeprom_len = i40e_get_eeprom_len, 4117 .get_eeprom = i40e_get_eeprom, 4118 .get_ringparam = i40e_get_ringparam, 4119 .set_ringparam = i40e_set_ringparam, 4120 .get_pauseparam = i40e_get_pauseparam, 4121 .set_pauseparam = i40e_set_pauseparam, 4122 .get_msglevel = i40e_get_msglevel, 4123 .set_msglevel = i40e_set_msglevel, 4124 .get_rxnfc = i40e_get_rxnfc, 4125 .set_rxnfc = i40e_set_rxnfc, 4126 .self_test = i40e_diag_test, 4127 .get_strings = i40e_get_strings, 4128 .set_phys_id = i40e_set_phys_id, 4129 .get_sset_count = i40e_get_sset_count, 4130 .get_ethtool_stats = i40e_get_ethtool_stats, 4131 .get_coalesce = i40e_get_coalesce, 4132 .set_coalesce = i40e_set_coalesce, 4133 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4134 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4135 .get_rxfh = i40e_get_rxfh, 4136 .set_rxfh = i40e_set_rxfh, 4137 .get_channels = i40e_get_channels, 4138 .set_channels = i40e_set_channels, 4139 .get_ts_info = i40e_get_ts_info, 4140 .get_priv_flags = i40e_get_priv_flags, 4141 .set_priv_flags = i40e_set_priv_flags, 4142 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4143 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4144 .get_link_ksettings = i40e_get_link_ksettings, 4145 .set_link_ksettings = i40e_set_link_ksettings, 4146 }; 4147 4148 void i40e_set_ethtool_ops(struct net_device *netdev) 4149 { 4150 netdev->ethtool_ops = &i40e_ethtool_ops; 4151 } 4152