1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 10 /* ethtool statistics helpers */ 11 12 /** 13 * struct i40e_stats - definition for an ethtool statistic 14 * @stat_string: statistic name to display in ethtool -S output 15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 16 * @stat_offset: offsetof() the stat from a base pointer 17 * 18 * This structure defines a statistic to be added to the ethtool stats buffer. 19 * It defines a statistic as offset from a common base pointer. Stats should 20 * be defined in constant arrays using the I40E_STAT macro, with every element 21 * of the array using the same _type for calculating the sizeof_stat and 22 * stat_offset. 23 * 24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 26 * the i40e_add_ethtool_stat() helper function. 27 * 28 * The @stat_string is interpreted as a format string, allowing formatted 29 * values to be inserted while looping over multiple structures for a given 30 * statistics array. Thus, every statistic string in an array should have the 31 * same type and number of format specifiers, to be formatted by variadic 32 * arguments to the i40e_add_stat_string() helper function. 33 **/ 34 struct i40e_stats { 35 char stat_string[ETH_GSTRING_LEN]; 36 int sizeof_stat; 37 int stat_offset; 38 }; 39 40 /* Helper macro to define an i40e_stat structure with proper size and type. 41 * Use this when defining constant statistics arrays. Note that @_type expects 42 * only a type name and is used multiple times. 43 */ 44 #define I40E_STAT(_type, _name, _stat) { \ 45 .stat_string = _name, \ 46 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 47 .stat_offset = offsetof(_type, _stat) \ 48 } 49 50 /* Helper macro for defining some statistics directly copied from the netdev 51 * stats structure. 52 */ 53 #define I40E_NETDEV_STAT(_net_stat) \ 54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 55 56 /* Helper macro for defining some statistics related to queues */ 57 #define I40E_QUEUE_STAT(_name, _stat) \ 58 I40E_STAT(struct i40e_ring, _name, _stat) 59 60 /* Stats associated with a Tx or Rx ring */ 61 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 64 }; 65 66 /** 67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 68 * @data: location to store the stat value 69 * @pointer: basis for where to copy from 70 * @stat: the stat definition 71 * 72 * Copies the stat data defined by the pointer and stat structure pair into 73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 75 */ 76 static void 77 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 78 const struct i40e_stats *stat) 79 { 80 char *p; 81 82 if (!pointer) { 83 /* ensure that the ethtool data buffer is zero'd for any stats 84 * which don't have a valid pointer. 85 */ 86 *data = 0; 87 return; 88 } 89 90 p = (char *)pointer + stat->stat_offset; 91 switch (stat->sizeof_stat) { 92 case sizeof(u64): 93 *data = *((u64 *)p); 94 break; 95 case sizeof(u32): 96 *data = *((u32 *)p); 97 break; 98 case sizeof(u16): 99 *data = *((u16 *)p); 100 break; 101 case sizeof(u8): 102 *data = *((u8 *)p); 103 break; 104 default: 105 WARN_ONCE(1, "unexpected stat size for %s", 106 stat->stat_string); 107 *data = 0; 108 } 109 } 110 111 /** 112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 113 * @data: ethtool stats buffer 114 * @pointer: location to copy stats from 115 * @stats: array of stats to copy 116 * @size: the size of the stats definition 117 * 118 * Copy the stats defined by the stats array using the pointer as a base into 119 * the data buffer supplied by ethtool. Updates the data pointer to point to 120 * the next empty location for successive calls to __i40e_add_ethtool_stats. 121 * If pointer is null, set the data values to zero and update the pointer to 122 * skip these stats. 123 **/ 124 static void 125 __i40e_add_ethtool_stats(u64 **data, void *pointer, 126 const struct i40e_stats stats[], 127 const unsigned int size) 128 { 129 unsigned int i; 130 131 for (i = 0; i < size; i++) 132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 133 } 134 135 /** 136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 137 * @data: ethtool stats buffer 138 * @pointer: location where stats are stored 139 * @stats: static const array of stat definitions 140 * 141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 143 * ensuring that we pass the size associated with the given stats array. 144 * 145 * The parameter @stats is evaluated twice, so parameters with side effects 146 * should be avoided. 147 **/ 148 #define i40e_add_ethtool_stats(data, pointer, stats) \ 149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 150 151 /** 152 * i40e_add_queue_stats - copy queue statistics into supplied buffer 153 * @data: ethtool stats buffer 154 * @ring: the ring to copy 155 * 156 * Queue statistics must be copied while protected by 157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats. 158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 159 * ring pointer is null, zero out the queue stat values and update the data 160 * pointer. Otherwise safely copy the stats from the ring into the supplied 161 * buffer and update the data pointer when finished. 162 * 163 * This function expects to be called while under rcu_read_lock(). 164 **/ 165 static void 166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 167 { 168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 169 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 170 unsigned int start; 171 unsigned int i; 172 173 /* To avoid invalid statistics values, ensure that we keep retrying 174 * the copy until we get a consistent value according to 175 * u64_stats_fetch_retry_irq. But first, make sure our ring is 176 * non-null before attempting to access its syncp. 177 */ 178 do { 179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp); 180 for (i = 0; i < size; i++) { 181 i40e_add_one_ethtool_stat(&(*data)[i], ring, 182 &stats[i]); 183 } 184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start)); 185 186 /* Once we successfully copy the stats in, update the data pointer */ 187 *data += size; 188 } 189 190 /** 191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 192 * @p: ethtool supplied buffer 193 * @stats: stat definitions array 194 * @size: size of the stats array 195 * 196 * Format and copy the strings described by stats into the buffer pointed at 197 * by p. 198 **/ 199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 200 const unsigned int size, ...) 201 { 202 unsigned int i; 203 204 for (i = 0; i < size; i++) { 205 va_list args; 206 207 va_start(args, size); 208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 209 *p += ETH_GSTRING_LEN; 210 va_end(args); 211 } 212 } 213 214 /** 215 * 40e_add_stat_strings - copy stat strings into ethtool buffer 216 * @p: ethtool supplied buffer 217 * @stats: stat definitions array 218 * 219 * Format and copy the strings described by the const static stats value into 220 * the buffer pointed at by p. 221 * 222 * The parameter @stats is evaluated twice, so parameters with side effects 223 * should be avoided. Additionally, stats must be an array such that 224 * ARRAY_SIZE can be called on it. 225 **/ 226 #define i40e_add_stat_strings(p, stats, ...) \ 227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 228 229 #define I40E_PF_STAT(_name, _stat) \ 230 I40E_STAT(struct i40e_pf, _name, _stat) 231 #define I40E_VSI_STAT(_name, _stat) \ 232 I40E_STAT(struct i40e_vsi, _name, _stat) 233 #define I40E_VEB_STAT(_name, _stat) \ 234 I40E_STAT(struct i40e_veb, _name, _stat) 235 #define I40E_PFC_STAT(_name, _stat) \ 236 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 237 #define I40E_QUEUE_STAT(_name, _stat) \ 238 I40E_STAT(struct i40e_ring, _name, _stat) 239 240 static const struct i40e_stats i40e_gstrings_net_stats[] = { 241 I40E_NETDEV_STAT(rx_packets), 242 I40E_NETDEV_STAT(tx_packets), 243 I40E_NETDEV_STAT(rx_bytes), 244 I40E_NETDEV_STAT(tx_bytes), 245 I40E_NETDEV_STAT(rx_errors), 246 I40E_NETDEV_STAT(tx_errors), 247 I40E_NETDEV_STAT(rx_dropped), 248 I40E_NETDEV_STAT(tx_dropped), 249 I40E_NETDEV_STAT(collisions), 250 I40E_NETDEV_STAT(rx_length_errors), 251 I40E_NETDEV_STAT(rx_crc_errors), 252 }; 253 254 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 255 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 256 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 257 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 258 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 259 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 260 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 261 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 262 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 263 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 264 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 265 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 266 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 267 }; 268 269 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 270 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets), 271 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes), 272 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets), 273 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes), 274 }; 275 276 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 277 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 278 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 279 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 280 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 281 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 282 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 283 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 284 I40E_VSI_STAT("tx_linearize", tx_linearize), 285 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 286 I40E_VSI_STAT("tx_busy", tx_busy), 287 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 288 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 289 }; 290 291 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 292 * but they are separate. This device supports Virtualization, and 293 * as such might have several netdevs supporting VMDq and FCoE going 294 * through a single port. The NETDEV_STATs are for individual netdevs 295 * seen at the top of the stack, and the PF_STATs are for the physical 296 * function at the bottom of the stack hosting those netdevs. 297 * 298 * The PF_STATs are appended to the netdev stats only when ethtool -S 299 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 300 */ 301 static const struct i40e_stats i40e_gstrings_stats[] = { 302 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 303 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 304 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 305 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 306 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 307 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 308 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 309 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 310 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 311 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 312 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 313 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 314 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 315 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 316 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 317 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 318 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 319 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 320 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 321 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 322 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 323 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 324 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 325 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 326 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 327 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 328 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 329 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 330 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 331 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 332 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 333 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 334 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 335 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 336 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 337 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 338 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 339 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 340 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 341 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 342 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 343 I40E_PF_STAT("port.arq_overflows", arq_overflows), 344 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 345 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 346 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 347 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 348 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 349 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 350 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 351 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 352 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 353 354 /* LPI stats */ 355 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 356 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 357 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 358 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 359 }; 360 361 struct i40e_pfc_stats { 362 u64 priority_xon_rx; 363 u64 priority_xoff_rx; 364 u64 priority_xon_tx; 365 u64 priority_xoff_tx; 366 u64 priority_xon_2_xoff; 367 }; 368 369 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 370 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 371 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 372 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 373 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 374 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 375 }; 376 377 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 378 379 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 380 381 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 382 383 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 384 I40E_MAX_USER_PRIORITY) 385 386 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 387 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 388 I40E_MAX_TRAFFIC_CLASS)) 389 390 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 391 392 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 393 I40E_PFC_STATS_LEN + \ 394 I40E_VEB_STATS_LEN + \ 395 I40E_VSI_STATS_LEN) 396 397 /* Length of stats for a single queue */ 398 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 399 400 enum i40e_ethtool_test_id { 401 I40E_ETH_TEST_REG = 0, 402 I40E_ETH_TEST_EEPROM, 403 I40E_ETH_TEST_INTR, 404 I40E_ETH_TEST_LINK, 405 }; 406 407 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 408 "Register test (offline)", 409 "Eeprom test (offline)", 410 "Interrupt test (offline)", 411 "Link test (on/offline)" 412 }; 413 414 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 415 416 struct i40e_priv_flags { 417 char flag_string[ETH_GSTRING_LEN]; 418 u64 flag; 419 bool read_only; 420 }; 421 422 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 423 .flag_string = _name, \ 424 .flag = _flag, \ 425 .read_only = _read_only, \ 426 } 427 428 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 429 /* NOTE: MFP setting cannot be changed */ 430 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 431 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 432 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 433 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 434 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 435 I40E_PRIV_FLAG("link-down-on-close", 436 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 437 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 438 I40E_PRIV_FLAG("disable-source-pruning", 439 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 440 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 441 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0), 442 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0), 443 }; 444 445 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 446 447 /* Private flags with a global effect, restricted to PF 0 */ 448 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 449 I40E_PRIV_FLAG("vf-true-promisc-support", 450 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 451 }; 452 453 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 454 455 /** 456 * i40e_partition_setting_complaint - generic complaint for MFP restriction 457 * @pf: the PF struct 458 **/ 459 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 460 { 461 dev_info(&pf->pdev->dev, 462 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 463 } 464 465 /** 466 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 467 * @pf: PF struct with phy_types 468 * @ks: ethtool link ksettings struct to fill out 469 * 470 **/ 471 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 472 struct ethtool_link_ksettings *ks) 473 { 474 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 475 u64 phy_types = pf->hw.phy.phy_types; 476 477 ethtool_link_ksettings_zero_link_mode(ks, supported); 478 ethtool_link_ksettings_zero_link_mode(ks, advertising); 479 480 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 481 ethtool_link_ksettings_add_link_mode(ks, supported, 482 1000baseT_Full); 483 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 484 ethtool_link_ksettings_add_link_mode(ks, advertising, 485 1000baseT_Full); 486 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 487 ethtool_link_ksettings_add_link_mode(ks, supported, 488 100baseT_Full); 489 ethtool_link_ksettings_add_link_mode(ks, advertising, 490 100baseT_Full); 491 } 492 } 493 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 494 phy_types & I40E_CAP_PHY_TYPE_XFI || 495 phy_types & I40E_CAP_PHY_TYPE_SFI || 496 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 497 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 498 ethtool_link_ksettings_add_link_mode(ks, supported, 499 10000baseT_Full); 500 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 501 ethtool_link_ksettings_add_link_mode(ks, advertising, 502 10000baseT_Full); 503 } 504 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 505 ethtool_link_ksettings_add_link_mode(ks, supported, 506 10000baseT_Full); 507 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 508 ethtool_link_ksettings_add_link_mode(ks, advertising, 509 10000baseT_Full); 510 } 511 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 512 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 513 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 514 ethtool_link_ksettings_add_link_mode(ks, supported, 515 40000baseCR4_Full); 516 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 517 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 518 ethtool_link_ksettings_add_link_mode(ks, supported, 519 40000baseCR4_Full); 520 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 521 ethtool_link_ksettings_add_link_mode(ks, advertising, 522 40000baseCR4_Full); 523 } 524 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 525 ethtool_link_ksettings_add_link_mode(ks, supported, 526 100baseT_Full); 527 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 528 ethtool_link_ksettings_add_link_mode(ks, advertising, 529 100baseT_Full); 530 } 531 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 532 ethtool_link_ksettings_add_link_mode(ks, supported, 533 1000baseT_Full); 534 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 535 ethtool_link_ksettings_add_link_mode(ks, advertising, 536 1000baseT_Full); 537 } 538 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) { 539 ethtool_link_ksettings_add_link_mode(ks, supported, 540 40000baseSR4_Full); 541 ethtool_link_ksettings_add_link_mode(ks, advertising, 542 40000baseSR4_Full); 543 } 544 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 545 ethtool_link_ksettings_add_link_mode(ks, supported, 546 40000baseLR4_Full); 547 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 548 ethtool_link_ksettings_add_link_mode(ks, supported, 549 40000baseLR4_Full); 550 ethtool_link_ksettings_add_link_mode(ks, advertising, 551 40000baseLR4_Full); 552 } 553 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 554 ethtool_link_ksettings_add_link_mode(ks, supported, 555 20000baseKR2_Full); 556 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 557 ethtool_link_ksettings_add_link_mode(ks, advertising, 558 20000baseKR2_Full); 559 } 560 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 561 ethtool_link_ksettings_add_link_mode(ks, supported, 562 10000baseKX4_Full); 563 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 564 ethtool_link_ksettings_add_link_mode(ks, advertising, 565 10000baseKX4_Full); 566 } 567 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 568 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 569 ethtool_link_ksettings_add_link_mode(ks, supported, 570 10000baseKR_Full); 571 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 572 ethtool_link_ksettings_add_link_mode(ks, advertising, 573 10000baseKR_Full); 574 } 575 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 576 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 577 ethtool_link_ksettings_add_link_mode(ks, supported, 578 1000baseKX_Full); 579 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 580 ethtool_link_ksettings_add_link_mode(ks, advertising, 581 1000baseKX_Full); 582 } 583 /* need to add 25G PHY types */ 584 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 585 ethtool_link_ksettings_add_link_mode(ks, supported, 586 25000baseKR_Full); 587 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 588 ethtool_link_ksettings_add_link_mode(ks, advertising, 589 25000baseKR_Full); 590 } 591 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 592 ethtool_link_ksettings_add_link_mode(ks, supported, 593 25000baseCR_Full); 594 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 595 ethtool_link_ksettings_add_link_mode(ks, advertising, 596 25000baseCR_Full); 597 } 598 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 599 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 600 ethtool_link_ksettings_add_link_mode(ks, supported, 601 25000baseSR_Full); 602 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 603 ethtool_link_ksettings_add_link_mode(ks, advertising, 604 25000baseSR_Full); 605 } 606 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 607 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 608 ethtool_link_ksettings_add_link_mode(ks, supported, 609 25000baseCR_Full); 610 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 611 ethtool_link_ksettings_add_link_mode(ks, advertising, 612 25000baseCR_Full); 613 } 614 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 615 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 616 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 617 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 618 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 619 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 620 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 621 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 622 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 623 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) { 624 ethtool_link_ksettings_add_link_mode(ks, advertising, 625 FEC_NONE); 626 ethtool_link_ksettings_add_link_mode(ks, advertising, 627 FEC_RS); 628 ethtool_link_ksettings_add_link_mode(ks, advertising, 629 FEC_BASER); 630 } 631 } 632 /* need to add new 10G PHY types */ 633 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 634 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 635 ethtool_link_ksettings_add_link_mode(ks, supported, 636 10000baseCR_Full); 637 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 638 ethtool_link_ksettings_add_link_mode(ks, advertising, 639 10000baseCR_Full); 640 } 641 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 642 ethtool_link_ksettings_add_link_mode(ks, supported, 643 10000baseSR_Full); 644 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 645 ethtool_link_ksettings_add_link_mode(ks, advertising, 646 10000baseSR_Full); 647 } 648 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 649 ethtool_link_ksettings_add_link_mode(ks, supported, 650 10000baseLR_Full); 651 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 652 ethtool_link_ksettings_add_link_mode(ks, advertising, 653 10000baseLR_Full); 654 } 655 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 656 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 657 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 658 ethtool_link_ksettings_add_link_mode(ks, supported, 659 1000baseX_Full); 660 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 661 ethtool_link_ksettings_add_link_mode(ks, advertising, 662 1000baseX_Full); 663 } 664 /* Autoneg PHY types */ 665 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 666 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 667 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 668 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 669 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 670 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 671 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 672 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 673 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 674 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 675 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 676 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 677 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 678 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 679 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 680 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 681 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 682 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 683 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 684 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 685 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 686 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 687 ethtool_link_ksettings_add_link_mode(ks, supported, 688 Autoneg); 689 ethtool_link_ksettings_add_link_mode(ks, advertising, 690 Autoneg); 691 } 692 } 693 694 /** 695 * i40e_get_settings_link_up - Get the Link settings for when link is up 696 * @hw: hw structure 697 * @ks: ethtool ksettings to fill in 698 * @netdev: network interface device structure 699 * @pf: pointer to physical function struct 700 **/ 701 static void i40e_get_settings_link_up(struct i40e_hw *hw, 702 struct ethtool_link_ksettings *ks, 703 struct net_device *netdev, 704 struct i40e_pf *pf) 705 { 706 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 707 struct ethtool_link_ksettings cap_ksettings; 708 u32 link_speed = hw_link_info->link_speed; 709 710 /* Initialize supported and advertised settings based on phy settings */ 711 switch (hw_link_info->phy_type) { 712 case I40E_PHY_TYPE_40GBASE_CR4: 713 case I40E_PHY_TYPE_40GBASE_CR4_CU: 714 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 715 ethtool_link_ksettings_add_link_mode(ks, supported, 716 40000baseCR4_Full); 717 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 718 ethtool_link_ksettings_add_link_mode(ks, advertising, 719 40000baseCR4_Full); 720 break; 721 case I40E_PHY_TYPE_XLAUI: 722 case I40E_PHY_TYPE_XLPPI: 723 case I40E_PHY_TYPE_40GBASE_AOC: 724 ethtool_link_ksettings_add_link_mode(ks, supported, 725 40000baseCR4_Full); 726 break; 727 case I40E_PHY_TYPE_40GBASE_SR4: 728 ethtool_link_ksettings_add_link_mode(ks, supported, 729 40000baseSR4_Full); 730 ethtool_link_ksettings_add_link_mode(ks, advertising, 731 40000baseSR4_Full); 732 break; 733 case I40E_PHY_TYPE_40GBASE_LR4: 734 ethtool_link_ksettings_add_link_mode(ks, supported, 735 40000baseLR4_Full); 736 break; 737 case I40E_PHY_TYPE_25GBASE_SR: 738 case I40E_PHY_TYPE_25GBASE_LR: 739 case I40E_PHY_TYPE_10GBASE_SR: 740 case I40E_PHY_TYPE_10GBASE_LR: 741 case I40E_PHY_TYPE_1000BASE_SX: 742 case I40E_PHY_TYPE_1000BASE_LX: 743 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 744 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 745 ethtool_link_ksettings_add_link_mode(ks, supported, 746 25000baseSR_Full); 747 ethtool_link_ksettings_add_link_mode(ks, advertising, 748 25000baseSR_Full); 749 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 750 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 751 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 752 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 753 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 754 ethtool_link_ksettings_add_link_mode(ks, advertising, 755 FEC_BASER); 756 ethtool_link_ksettings_add_link_mode(ks, supported, 757 10000baseSR_Full); 758 ethtool_link_ksettings_add_link_mode(ks, advertising, 759 10000baseSR_Full); 760 ethtool_link_ksettings_add_link_mode(ks, supported, 761 10000baseLR_Full); 762 ethtool_link_ksettings_add_link_mode(ks, advertising, 763 10000baseLR_Full); 764 ethtool_link_ksettings_add_link_mode(ks, supported, 765 1000baseX_Full); 766 ethtool_link_ksettings_add_link_mode(ks, advertising, 767 1000baseX_Full); 768 ethtool_link_ksettings_add_link_mode(ks, supported, 769 10000baseT_Full); 770 if (hw_link_info->module_type[2] & 771 I40E_MODULE_TYPE_1000BASE_SX || 772 hw_link_info->module_type[2] & 773 I40E_MODULE_TYPE_1000BASE_LX) { 774 ethtool_link_ksettings_add_link_mode(ks, supported, 775 1000baseT_Full); 776 if (hw_link_info->requested_speeds & 777 I40E_LINK_SPEED_1GB) 778 ethtool_link_ksettings_add_link_mode( 779 ks, advertising, 1000baseT_Full); 780 } 781 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 782 ethtool_link_ksettings_add_link_mode(ks, advertising, 783 10000baseT_Full); 784 break; 785 case I40E_PHY_TYPE_10GBASE_T: 786 case I40E_PHY_TYPE_1000BASE_T: 787 case I40E_PHY_TYPE_100BASE_TX: 788 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 789 ethtool_link_ksettings_add_link_mode(ks, supported, 790 10000baseT_Full); 791 ethtool_link_ksettings_add_link_mode(ks, supported, 792 1000baseT_Full); 793 ethtool_link_ksettings_add_link_mode(ks, supported, 794 100baseT_Full); 795 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 796 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 797 ethtool_link_ksettings_add_link_mode(ks, advertising, 798 10000baseT_Full); 799 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 800 ethtool_link_ksettings_add_link_mode(ks, advertising, 801 1000baseT_Full); 802 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 803 ethtool_link_ksettings_add_link_mode(ks, advertising, 804 100baseT_Full); 805 break; 806 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 807 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 808 ethtool_link_ksettings_add_link_mode(ks, supported, 809 1000baseT_Full); 810 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 811 ethtool_link_ksettings_add_link_mode(ks, advertising, 812 1000baseT_Full); 813 break; 814 case I40E_PHY_TYPE_10GBASE_CR1_CU: 815 case I40E_PHY_TYPE_10GBASE_CR1: 816 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 817 ethtool_link_ksettings_add_link_mode(ks, supported, 818 10000baseT_Full); 819 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 820 ethtool_link_ksettings_add_link_mode(ks, advertising, 821 10000baseT_Full); 822 break; 823 case I40E_PHY_TYPE_XAUI: 824 case I40E_PHY_TYPE_XFI: 825 case I40E_PHY_TYPE_SFI: 826 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 827 case I40E_PHY_TYPE_10GBASE_AOC: 828 ethtool_link_ksettings_add_link_mode(ks, supported, 829 10000baseT_Full); 830 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 831 ethtool_link_ksettings_add_link_mode(ks, advertising, 832 10000baseT_Full); 833 break; 834 case I40E_PHY_TYPE_SGMII: 835 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 836 ethtool_link_ksettings_add_link_mode(ks, supported, 837 1000baseT_Full); 838 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 839 ethtool_link_ksettings_add_link_mode(ks, advertising, 840 1000baseT_Full); 841 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 842 ethtool_link_ksettings_add_link_mode(ks, supported, 843 100baseT_Full); 844 if (hw_link_info->requested_speeds & 845 I40E_LINK_SPEED_100MB) 846 ethtool_link_ksettings_add_link_mode( 847 ks, advertising, 100baseT_Full); 848 } 849 break; 850 case I40E_PHY_TYPE_40GBASE_KR4: 851 case I40E_PHY_TYPE_25GBASE_KR: 852 case I40E_PHY_TYPE_20GBASE_KR2: 853 case I40E_PHY_TYPE_10GBASE_KR: 854 case I40E_PHY_TYPE_10GBASE_KX4: 855 case I40E_PHY_TYPE_1000BASE_KX: 856 ethtool_link_ksettings_add_link_mode(ks, supported, 857 40000baseKR4_Full); 858 ethtool_link_ksettings_add_link_mode(ks, supported, 859 25000baseKR_Full); 860 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 861 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 862 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 863 ethtool_link_ksettings_add_link_mode(ks, supported, 864 20000baseKR2_Full); 865 ethtool_link_ksettings_add_link_mode(ks, supported, 866 10000baseKR_Full); 867 ethtool_link_ksettings_add_link_mode(ks, supported, 868 10000baseKX4_Full); 869 ethtool_link_ksettings_add_link_mode(ks, supported, 870 1000baseKX_Full); 871 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 872 ethtool_link_ksettings_add_link_mode(ks, advertising, 873 40000baseKR4_Full); 874 ethtool_link_ksettings_add_link_mode(ks, advertising, 875 25000baseKR_Full); 876 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 877 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 878 ethtool_link_ksettings_add_link_mode(ks, advertising, 879 FEC_BASER); 880 ethtool_link_ksettings_add_link_mode(ks, advertising, 881 20000baseKR2_Full); 882 ethtool_link_ksettings_add_link_mode(ks, advertising, 883 10000baseKR_Full); 884 ethtool_link_ksettings_add_link_mode(ks, advertising, 885 10000baseKX4_Full); 886 ethtool_link_ksettings_add_link_mode(ks, advertising, 887 1000baseKX_Full); 888 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 889 break; 890 case I40E_PHY_TYPE_25GBASE_CR: 891 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 892 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 893 ethtool_link_ksettings_add_link_mode(ks, supported, 894 25000baseCR_Full); 895 ethtool_link_ksettings_add_link_mode(ks, advertising, 896 25000baseCR_Full); 897 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 898 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 899 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 900 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 901 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 902 ethtool_link_ksettings_add_link_mode(ks, advertising, 903 FEC_BASER); 904 break; 905 case I40E_PHY_TYPE_25GBASE_AOC: 906 case I40E_PHY_TYPE_25GBASE_ACC: 907 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 908 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 909 ethtool_link_ksettings_add_link_mode(ks, supported, 910 25000baseCR_Full); 911 ethtool_link_ksettings_add_link_mode(ks, advertising, 912 25000baseCR_Full); 913 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 914 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 915 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 916 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 917 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 918 ethtool_link_ksettings_add_link_mode(ks, advertising, 919 FEC_BASER); 920 ethtool_link_ksettings_add_link_mode(ks, supported, 921 10000baseCR_Full); 922 ethtool_link_ksettings_add_link_mode(ks, advertising, 923 10000baseCR_Full); 924 break; 925 default: 926 /* if we got here and link is up something bad is afoot */ 927 netdev_info(netdev, 928 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 929 hw_link_info->phy_type); 930 } 931 932 /* Now that we've worked out everything that could be supported by the 933 * current PHY type, get what is supported by the NVM and intersect 934 * them to get what is truly supported 935 */ 936 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 937 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 938 ethtool_intersect_link_masks(ks, &cap_ksettings); 939 940 /* Set speed and duplex */ 941 switch (link_speed) { 942 case I40E_LINK_SPEED_40GB: 943 ks->base.speed = SPEED_40000; 944 break; 945 case I40E_LINK_SPEED_25GB: 946 ks->base.speed = SPEED_25000; 947 break; 948 case I40E_LINK_SPEED_20GB: 949 ks->base.speed = SPEED_20000; 950 break; 951 case I40E_LINK_SPEED_10GB: 952 ks->base.speed = SPEED_10000; 953 break; 954 case I40E_LINK_SPEED_1GB: 955 ks->base.speed = SPEED_1000; 956 break; 957 case I40E_LINK_SPEED_100MB: 958 ks->base.speed = SPEED_100; 959 break; 960 default: 961 ks->base.speed = SPEED_UNKNOWN; 962 break; 963 } 964 ks->base.duplex = DUPLEX_FULL; 965 } 966 967 /** 968 * i40e_get_settings_link_down - Get the Link settings for when link is down 969 * @hw: hw structure 970 * @ks: ethtool ksettings to fill in 971 * @pf: pointer to physical function struct 972 * 973 * Reports link settings that can be determined when link is down 974 **/ 975 static void i40e_get_settings_link_down(struct i40e_hw *hw, 976 struct ethtool_link_ksettings *ks, 977 struct i40e_pf *pf) 978 { 979 /* link is down and the driver needs to fall back on 980 * supported phy types to figure out what info to display 981 */ 982 i40e_phy_type_to_ethtool(pf, ks); 983 984 /* With no link speed and duplex are unknown */ 985 ks->base.speed = SPEED_UNKNOWN; 986 ks->base.duplex = DUPLEX_UNKNOWN; 987 } 988 989 /** 990 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 991 * @netdev: network interface device structure 992 * @ks: ethtool ksettings 993 * 994 * Reports speed/duplex settings based on media_type 995 **/ 996 static int i40e_get_link_ksettings(struct net_device *netdev, 997 struct ethtool_link_ksettings *ks) 998 { 999 struct i40e_netdev_priv *np = netdev_priv(netdev); 1000 struct i40e_pf *pf = np->vsi->back; 1001 struct i40e_hw *hw = &pf->hw; 1002 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1003 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1004 1005 ethtool_link_ksettings_zero_link_mode(ks, supported); 1006 ethtool_link_ksettings_zero_link_mode(ks, advertising); 1007 1008 if (link_up) 1009 i40e_get_settings_link_up(hw, ks, netdev, pf); 1010 else 1011 i40e_get_settings_link_down(hw, ks, pf); 1012 1013 /* Now set the settings that don't rely on link being up/down */ 1014 /* Set autoneg settings */ 1015 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1016 AUTONEG_ENABLE : AUTONEG_DISABLE); 1017 1018 /* Set media type settings */ 1019 switch (hw->phy.media_type) { 1020 case I40E_MEDIA_TYPE_BACKPLANE: 1021 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 1022 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 1023 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 1024 ethtool_link_ksettings_add_link_mode(ks, advertising, 1025 Backplane); 1026 ks->base.port = PORT_NONE; 1027 break; 1028 case I40E_MEDIA_TYPE_BASET: 1029 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 1030 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 1031 ks->base.port = PORT_TP; 1032 break; 1033 case I40E_MEDIA_TYPE_DA: 1034 case I40E_MEDIA_TYPE_CX4: 1035 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1036 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1037 ks->base.port = PORT_DA; 1038 break; 1039 case I40E_MEDIA_TYPE_FIBER: 1040 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1041 ks->base.port = PORT_FIBRE; 1042 break; 1043 case I40E_MEDIA_TYPE_UNKNOWN: 1044 default: 1045 ks->base.port = PORT_OTHER; 1046 break; 1047 } 1048 1049 /* Set flow control settings */ 1050 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 1051 1052 switch (hw->fc.requested_mode) { 1053 case I40E_FC_FULL: 1054 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1055 break; 1056 case I40E_FC_TX_PAUSE: 1057 ethtool_link_ksettings_add_link_mode(ks, advertising, 1058 Asym_Pause); 1059 break; 1060 case I40E_FC_RX_PAUSE: 1061 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1062 ethtool_link_ksettings_add_link_mode(ks, advertising, 1063 Asym_Pause); 1064 break; 1065 default: 1066 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1067 ethtool_link_ksettings_del_link_mode(ks, advertising, 1068 Asym_Pause); 1069 break; 1070 } 1071 1072 return 0; 1073 } 1074 1075 /** 1076 * i40e_set_link_ksettings - Set Speed and Duplex 1077 * @netdev: network interface device structure 1078 * @ks: ethtool ksettings 1079 * 1080 * Set speed/duplex per media_types advertised/forced 1081 **/ 1082 static int i40e_set_link_ksettings(struct net_device *netdev, 1083 const struct ethtool_link_ksettings *ks) 1084 { 1085 struct i40e_netdev_priv *np = netdev_priv(netdev); 1086 struct i40e_aq_get_phy_abilities_resp abilities; 1087 struct ethtool_link_ksettings safe_ks; 1088 struct ethtool_link_ksettings copy_ks; 1089 struct i40e_aq_set_phy_config config; 1090 struct i40e_pf *pf = np->vsi->back; 1091 struct i40e_vsi *vsi = np->vsi; 1092 struct i40e_hw *hw = &pf->hw; 1093 bool autoneg_changed = false; 1094 i40e_status status = 0; 1095 int timeout = 50; 1096 int err = 0; 1097 u8 autoneg; 1098 1099 /* Changing port settings is not supported if this isn't the 1100 * port's controlling PF 1101 */ 1102 if (hw->partition_id != 1) { 1103 i40e_partition_setting_complaint(pf); 1104 return -EOPNOTSUPP; 1105 } 1106 if (vsi != pf->vsi[pf->lan_vsi]) 1107 return -EOPNOTSUPP; 1108 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1109 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1110 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1111 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1112 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1113 return -EOPNOTSUPP; 1114 if (hw->device_id == I40E_DEV_ID_KX_B || 1115 hw->device_id == I40E_DEV_ID_KX_C || 1116 hw->device_id == I40E_DEV_ID_20G_KR2 || 1117 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1118 hw->device_id == I40E_DEV_ID_25G_B || 1119 hw->device_id == I40E_DEV_ID_KX_X722) { 1120 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1121 return -EOPNOTSUPP; 1122 } 1123 1124 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1125 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1126 1127 /* save autoneg out of ksettings */ 1128 autoneg = copy_ks.base.autoneg; 1129 1130 /* get our own copy of the bits to check against */ 1131 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1132 safe_ks.base.cmd = copy_ks.base.cmd; 1133 safe_ks.base.link_mode_masks_nwords = 1134 copy_ks.base.link_mode_masks_nwords; 1135 i40e_get_link_ksettings(netdev, &safe_ks); 1136 1137 /* Get link modes supported by hardware and check against modes 1138 * requested by the user. Return an error if unsupported mode was set. 1139 */ 1140 if (!bitmap_subset(copy_ks.link_modes.advertising, 1141 safe_ks.link_modes.supported, 1142 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1143 return -EINVAL; 1144 1145 /* set autoneg back to what it currently is */ 1146 copy_ks.base.autoneg = safe_ks.base.autoneg; 1147 1148 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1149 * trying to set something that we do not support. 1150 */ 1151 if (memcmp(©_ks.base, &safe_ks.base, 1152 sizeof(struct ethtool_link_settings))) 1153 return -EOPNOTSUPP; 1154 1155 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1156 timeout--; 1157 if (!timeout) 1158 return -EBUSY; 1159 usleep_range(1000, 2000); 1160 } 1161 1162 /* Get the current phy config */ 1163 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1164 NULL); 1165 if (status) { 1166 err = -EAGAIN; 1167 goto done; 1168 } 1169 1170 /* Copy abilities to config in case autoneg is not 1171 * set below 1172 */ 1173 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1174 config.abilities = abilities.abilities; 1175 1176 /* Check autoneg */ 1177 if (autoneg == AUTONEG_ENABLE) { 1178 /* If autoneg was not already enabled */ 1179 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1180 /* If autoneg is not supported, return error */ 1181 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1182 supported, 1183 Autoneg)) { 1184 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1185 err = -EINVAL; 1186 goto done; 1187 } 1188 /* Autoneg is allowed to change */ 1189 config.abilities = abilities.abilities | 1190 I40E_AQ_PHY_ENABLE_AN; 1191 autoneg_changed = true; 1192 } 1193 } else { 1194 /* If autoneg is currently enabled */ 1195 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1196 /* If autoneg is supported 10GBASE_T is the only PHY 1197 * that can disable it, so otherwise return error 1198 */ 1199 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1200 supported, 1201 Autoneg) && 1202 hw->phy.link_info.phy_type != 1203 I40E_PHY_TYPE_10GBASE_T) { 1204 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1205 err = -EINVAL; 1206 goto done; 1207 } 1208 /* Autoneg is allowed to change */ 1209 config.abilities = abilities.abilities & 1210 ~I40E_AQ_PHY_ENABLE_AN; 1211 autoneg_changed = true; 1212 } 1213 } 1214 1215 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1216 100baseT_Full)) 1217 config.link_speed |= I40E_LINK_SPEED_100MB; 1218 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1219 1000baseT_Full) || 1220 ethtool_link_ksettings_test_link_mode(ks, advertising, 1221 1000baseX_Full) || 1222 ethtool_link_ksettings_test_link_mode(ks, advertising, 1223 1000baseKX_Full)) 1224 config.link_speed |= I40E_LINK_SPEED_1GB; 1225 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1226 10000baseT_Full) || 1227 ethtool_link_ksettings_test_link_mode(ks, advertising, 1228 10000baseKX4_Full) || 1229 ethtool_link_ksettings_test_link_mode(ks, advertising, 1230 10000baseKR_Full) || 1231 ethtool_link_ksettings_test_link_mode(ks, advertising, 1232 10000baseCR_Full) || 1233 ethtool_link_ksettings_test_link_mode(ks, advertising, 1234 10000baseSR_Full) || 1235 ethtool_link_ksettings_test_link_mode(ks, advertising, 1236 10000baseLR_Full)) 1237 config.link_speed |= I40E_LINK_SPEED_10GB; 1238 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1239 20000baseKR2_Full)) 1240 config.link_speed |= I40E_LINK_SPEED_20GB; 1241 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1242 25000baseCR_Full) || 1243 ethtool_link_ksettings_test_link_mode(ks, advertising, 1244 25000baseKR_Full) || 1245 ethtool_link_ksettings_test_link_mode(ks, advertising, 1246 25000baseSR_Full)) 1247 config.link_speed |= I40E_LINK_SPEED_25GB; 1248 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1249 40000baseKR4_Full) || 1250 ethtool_link_ksettings_test_link_mode(ks, advertising, 1251 40000baseCR4_Full) || 1252 ethtool_link_ksettings_test_link_mode(ks, advertising, 1253 40000baseSR4_Full) || 1254 ethtool_link_ksettings_test_link_mode(ks, advertising, 1255 40000baseLR4_Full)) 1256 config.link_speed |= I40E_LINK_SPEED_40GB; 1257 1258 /* If speed didn't get set, set it to what it currently is. 1259 * This is needed because if advertise is 0 (as it is when autoneg 1260 * is disabled) then speed won't get set. 1261 */ 1262 if (!config.link_speed) 1263 config.link_speed = abilities.link_speed; 1264 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1265 /* copy over the rest of the abilities */ 1266 config.phy_type = abilities.phy_type; 1267 config.phy_type_ext = abilities.phy_type_ext; 1268 config.eee_capability = abilities.eee_capability; 1269 config.eeer = abilities.eeer_val; 1270 config.low_power_ctrl = abilities.d3_lpan; 1271 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1272 I40E_AQ_PHY_FEC_CONFIG_MASK; 1273 1274 /* save the requested speeds */ 1275 hw->phy.link_info.requested_speeds = config.link_speed; 1276 /* set link and auto negotiation so changes take effect */ 1277 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1278 /* If link is up put link down */ 1279 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1280 /* Tell the OS link is going down, the link will go 1281 * back up when fw says it is ready asynchronously 1282 */ 1283 i40e_print_link_message(vsi, false); 1284 netif_carrier_off(netdev); 1285 netif_tx_stop_all_queues(netdev); 1286 } 1287 1288 /* make the aq call */ 1289 status = i40e_aq_set_phy_config(hw, &config, NULL); 1290 if (status) { 1291 netdev_info(netdev, 1292 "Set phy config failed, err %s aq_err %s\n", 1293 i40e_stat_str(hw, status), 1294 i40e_aq_str(hw, hw->aq.asq_last_status)); 1295 err = -EAGAIN; 1296 goto done; 1297 } 1298 1299 status = i40e_update_link_info(hw); 1300 if (status) 1301 netdev_dbg(netdev, 1302 "Updating link info failed with err %s aq_err %s\n", 1303 i40e_stat_str(hw, status), 1304 i40e_aq_str(hw, hw->aq.asq_last_status)); 1305 1306 } else { 1307 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1308 } 1309 1310 done: 1311 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1312 1313 return err; 1314 } 1315 1316 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg) 1317 { 1318 struct i40e_netdev_priv *np = netdev_priv(netdev); 1319 struct i40e_aq_get_phy_abilities_resp abilities; 1320 struct i40e_pf *pf = np->vsi->back; 1321 struct i40e_hw *hw = &pf->hw; 1322 i40e_status status = 0; 1323 u32 flags = 0; 1324 int err = 0; 1325 1326 flags = READ_ONCE(pf->flags); 1327 i40e_set_fec_in_flags(fec_cfg, &flags); 1328 1329 /* Get the current phy config */ 1330 memset(&abilities, 0, sizeof(abilities)); 1331 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1332 NULL); 1333 if (status) { 1334 err = -EAGAIN; 1335 goto done; 1336 } 1337 1338 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) { 1339 struct i40e_aq_set_phy_config config; 1340 1341 memset(&config, 0, sizeof(config)); 1342 config.phy_type = abilities.phy_type; 1343 config.abilities = abilities.abilities; 1344 config.phy_type_ext = abilities.phy_type_ext; 1345 config.link_speed = abilities.link_speed; 1346 config.eee_capability = abilities.eee_capability; 1347 config.eeer = abilities.eeer_val; 1348 config.low_power_ctrl = abilities.d3_lpan; 1349 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK; 1350 status = i40e_aq_set_phy_config(hw, &config, NULL); 1351 if (status) { 1352 netdev_info(netdev, 1353 "Set phy config failed, err %s aq_err %s\n", 1354 i40e_stat_str(hw, status), 1355 i40e_aq_str(hw, hw->aq.asq_last_status)); 1356 err = -EAGAIN; 1357 goto done; 1358 } 1359 pf->flags = flags; 1360 status = i40e_update_link_info(hw); 1361 if (status) 1362 /* debug level message only due to relation to the link 1363 * itself rather than to the FEC settings 1364 * (e.g. no physical connection etc.) 1365 */ 1366 netdev_dbg(netdev, 1367 "Updating link info failed with err %s aq_err %s\n", 1368 i40e_stat_str(hw, status), 1369 i40e_aq_str(hw, hw->aq.asq_last_status)); 1370 } 1371 1372 done: 1373 return err; 1374 } 1375 1376 static int i40e_get_fec_param(struct net_device *netdev, 1377 struct ethtool_fecparam *fecparam) 1378 { 1379 struct i40e_netdev_priv *np = netdev_priv(netdev); 1380 struct i40e_aq_get_phy_abilities_resp abilities; 1381 struct i40e_pf *pf = np->vsi->back; 1382 struct i40e_hw *hw = &pf->hw; 1383 i40e_status status = 0; 1384 int err = 0; 1385 1386 /* Get the current phy config */ 1387 memset(&abilities, 0, sizeof(abilities)); 1388 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1389 NULL); 1390 if (status) { 1391 err = -EAGAIN; 1392 goto done; 1393 } 1394 1395 fecparam->fec = 0; 1396 if (abilities.fec_cfg_curr_mod_ext_info & I40E_AQ_SET_FEC_AUTO) 1397 fecparam->fec |= ETHTOOL_FEC_AUTO; 1398 if ((abilities.fec_cfg_curr_mod_ext_info & 1399 I40E_AQ_SET_FEC_REQUEST_RS) || 1400 (abilities.fec_cfg_curr_mod_ext_info & 1401 I40E_AQ_SET_FEC_ABILITY_RS)) 1402 fecparam->fec |= ETHTOOL_FEC_RS; 1403 if ((abilities.fec_cfg_curr_mod_ext_info & 1404 I40E_AQ_SET_FEC_REQUEST_KR) || 1405 (abilities.fec_cfg_curr_mod_ext_info & I40E_AQ_SET_FEC_ABILITY_KR)) 1406 fecparam->fec |= ETHTOOL_FEC_BASER; 1407 if (abilities.fec_cfg_curr_mod_ext_info == 0) 1408 fecparam->fec |= ETHTOOL_FEC_OFF; 1409 1410 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA) 1411 fecparam->active_fec = ETHTOOL_FEC_BASER; 1412 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA) 1413 fecparam->active_fec = ETHTOOL_FEC_RS; 1414 else 1415 fecparam->active_fec = ETHTOOL_FEC_OFF; 1416 done: 1417 return err; 1418 } 1419 1420 static int i40e_set_fec_param(struct net_device *netdev, 1421 struct ethtool_fecparam *fecparam) 1422 { 1423 struct i40e_netdev_priv *np = netdev_priv(netdev); 1424 struct i40e_pf *pf = np->vsi->back; 1425 struct i40e_hw *hw = &pf->hw; 1426 u8 fec_cfg = 0; 1427 int err = 0; 1428 1429 if (hw->device_id != I40E_DEV_ID_25G_SFP28 && 1430 hw->device_id != I40E_DEV_ID_25G_B) { 1431 err = -EPERM; 1432 goto done; 1433 } 1434 1435 switch (fecparam->fec) { 1436 case ETHTOOL_FEC_AUTO: 1437 fec_cfg = I40E_AQ_SET_FEC_AUTO; 1438 break; 1439 case ETHTOOL_FEC_RS: 1440 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 1441 I40E_AQ_SET_FEC_ABILITY_RS); 1442 break; 1443 case ETHTOOL_FEC_BASER: 1444 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 1445 I40E_AQ_SET_FEC_ABILITY_KR); 1446 break; 1447 case ETHTOOL_FEC_OFF: 1448 case ETHTOOL_FEC_NONE: 1449 fec_cfg = 0; 1450 break; 1451 default: 1452 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d", 1453 fecparam->fec); 1454 err = -EINVAL; 1455 goto done; 1456 } 1457 1458 err = i40e_set_fec_cfg(netdev, fec_cfg); 1459 1460 done: 1461 return err; 1462 } 1463 1464 static int i40e_nway_reset(struct net_device *netdev) 1465 { 1466 /* restart autonegotiation */ 1467 struct i40e_netdev_priv *np = netdev_priv(netdev); 1468 struct i40e_pf *pf = np->vsi->back; 1469 struct i40e_hw *hw = &pf->hw; 1470 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1471 i40e_status ret = 0; 1472 1473 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1474 if (ret) { 1475 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1476 i40e_stat_str(hw, ret), 1477 i40e_aq_str(hw, hw->aq.asq_last_status)); 1478 return -EIO; 1479 } 1480 1481 return 0; 1482 } 1483 1484 /** 1485 * i40e_get_pauseparam - Get Flow Control status 1486 * @netdev: netdevice structure 1487 * @pause: buffer to return pause parameters 1488 * 1489 * Return tx/rx-pause status 1490 **/ 1491 static void i40e_get_pauseparam(struct net_device *netdev, 1492 struct ethtool_pauseparam *pause) 1493 { 1494 struct i40e_netdev_priv *np = netdev_priv(netdev); 1495 struct i40e_pf *pf = np->vsi->back; 1496 struct i40e_hw *hw = &pf->hw; 1497 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1498 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1499 1500 pause->autoneg = 1501 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1502 AUTONEG_ENABLE : AUTONEG_DISABLE); 1503 1504 /* PFC enabled so report LFC as off */ 1505 if (dcbx_cfg->pfc.pfcenable) { 1506 pause->rx_pause = 0; 1507 pause->tx_pause = 0; 1508 return; 1509 } 1510 1511 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1512 pause->rx_pause = 1; 1513 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1514 pause->tx_pause = 1; 1515 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1516 pause->rx_pause = 1; 1517 pause->tx_pause = 1; 1518 } 1519 } 1520 1521 /** 1522 * i40e_set_pauseparam - Set Flow Control parameter 1523 * @netdev: network interface device structure 1524 * @pause: return tx/rx flow control status 1525 **/ 1526 static int i40e_set_pauseparam(struct net_device *netdev, 1527 struct ethtool_pauseparam *pause) 1528 { 1529 struct i40e_netdev_priv *np = netdev_priv(netdev); 1530 struct i40e_pf *pf = np->vsi->back; 1531 struct i40e_vsi *vsi = np->vsi; 1532 struct i40e_hw *hw = &pf->hw; 1533 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1534 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1535 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1536 i40e_status status; 1537 u8 aq_failures; 1538 int err = 0; 1539 u32 is_an; 1540 1541 /* Changing the port's flow control is not supported if this isn't the 1542 * port's controlling PF 1543 */ 1544 if (hw->partition_id != 1) { 1545 i40e_partition_setting_complaint(pf); 1546 return -EOPNOTSUPP; 1547 } 1548 1549 if (vsi != pf->vsi[pf->lan_vsi]) 1550 return -EOPNOTSUPP; 1551 1552 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED; 1553 if (pause->autoneg != is_an) { 1554 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1555 return -EOPNOTSUPP; 1556 } 1557 1558 /* If we have link and don't have autoneg */ 1559 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) { 1560 /* Send message that it might not necessarily work*/ 1561 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1562 } 1563 1564 if (dcbx_cfg->pfc.pfcenable) { 1565 netdev_info(netdev, 1566 "Priority flow control enabled. Cannot set link flow control.\n"); 1567 return -EOPNOTSUPP; 1568 } 1569 1570 if (pause->rx_pause && pause->tx_pause) 1571 hw->fc.requested_mode = I40E_FC_FULL; 1572 else if (pause->rx_pause && !pause->tx_pause) 1573 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1574 else if (!pause->rx_pause && pause->tx_pause) 1575 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1576 else if (!pause->rx_pause && !pause->tx_pause) 1577 hw->fc.requested_mode = I40E_FC_NONE; 1578 else 1579 return -EINVAL; 1580 1581 /* Tell the OS link is going down, the link will go back up when fw 1582 * says it is ready asynchronously 1583 */ 1584 i40e_print_link_message(vsi, false); 1585 netif_carrier_off(netdev); 1586 netif_tx_stop_all_queues(netdev); 1587 1588 /* Set the fc mode and only restart an if link is up*/ 1589 status = i40e_set_fc(hw, &aq_failures, link_up); 1590 1591 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1592 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1593 i40e_stat_str(hw, status), 1594 i40e_aq_str(hw, hw->aq.asq_last_status)); 1595 err = -EAGAIN; 1596 } 1597 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1598 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1599 i40e_stat_str(hw, status), 1600 i40e_aq_str(hw, hw->aq.asq_last_status)); 1601 err = -EAGAIN; 1602 } 1603 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1604 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1605 i40e_stat_str(hw, status), 1606 i40e_aq_str(hw, hw->aq.asq_last_status)); 1607 err = -EAGAIN; 1608 } 1609 1610 if (!test_bit(__I40E_DOWN, pf->state) && is_an) { 1611 /* Give it a little more time to try to come back */ 1612 msleep(75); 1613 if (!test_bit(__I40E_DOWN, pf->state)) 1614 return i40e_nway_reset(netdev); 1615 } 1616 1617 return err; 1618 } 1619 1620 static u32 i40e_get_msglevel(struct net_device *netdev) 1621 { 1622 struct i40e_netdev_priv *np = netdev_priv(netdev); 1623 struct i40e_pf *pf = np->vsi->back; 1624 u32 debug_mask = pf->hw.debug_mask; 1625 1626 if (debug_mask) 1627 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1628 1629 return pf->msg_enable; 1630 } 1631 1632 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1633 { 1634 struct i40e_netdev_priv *np = netdev_priv(netdev); 1635 struct i40e_pf *pf = np->vsi->back; 1636 1637 if (I40E_DEBUG_USER & data) 1638 pf->hw.debug_mask = data; 1639 else 1640 pf->msg_enable = data; 1641 } 1642 1643 static int i40e_get_regs_len(struct net_device *netdev) 1644 { 1645 int reg_count = 0; 1646 int i; 1647 1648 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1649 reg_count += i40e_reg_list[i].elements; 1650 1651 return reg_count * sizeof(u32); 1652 } 1653 1654 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1655 void *p) 1656 { 1657 struct i40e_netdev_priv *np = netdev_priv(netdev); 1658 struct i40e_pf *pf = np->vsi->back; 1659 struct i40e_hw *hw = &pf->hw; 1660 u32 *reg_buf = p; 1661 unsigned int i, j, ri; 1662 u32 reg; 1663 1664 /* Tell ethtool which driver-version-specific regs output we have. 1665 * 1666 * At some point, if we have ethtool doing special formatting of 1667 * this data, it will rely on this version number to know how to 1668 * interpret things. Hence, this needs to be updated if/when the 1669 * diags register table is changed. 1670 */ 1671 regs->version = 1; 1672 1673 /* loop through the diags reg table for what to print */ 1674 ri = 0; 1675 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1676 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1677 reg = i40e_reg_list[i].offset 1678 + (j * i40e_reg_list[i].stride); 1679 reg_buf[ri++] = rd32(hw, reg); 1680 } 1681 } 1682 1683 } 1684 1685 static int i40e_get_eeprom(struct net_device *netdev, 1686 struct ethtool_eeprom *eeprom, u8 *bytes) 1687 { 1688 struct i40e_netdev_priv *np = netdev_priv(netdev); 1689 struct i40e_hw *hw = &np->vsi->back->hw; 1690 struct i40e_pf *pf = np->vsi->back; 1691 int ret_val = 0, len, offset; 1692 u8 *eeprom_buff; 1693 u16 i, sectors; 1694 bool last; 1695 u32 magic; 1696 1697 #define I40E_NVM_SECTOR_SIZE 4096 1698 if (eeprom->len == 0) 1699 return -EINVAL; 1700 1701 /* check for NVMUpdate access method */ 1702 magic = hw->vendor_id | (hw->device_id << 16); 1703 if (eeprom->magic && eeprom->magic != magic) { 1704 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1705 int errno = 0; 1706 1707 /* make sure it is the right magic for NVMUpdate */ 1708 if ((eeprom->magic >> 16) != hw->device_id) 1709 errno = -EINVAL; 1710 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1711 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1712 errno = -EBUSY; 1713 else 1714 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1715 1716 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1717 dev_info(&pf->pdev->dev, 1718 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1719 ret_val, hw->aq.asq_last_status, errno, 1720 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1721 cmd->offset, cmd->data_size); 1722 1723 return errno; 1724 } 1725 1726 /* normal ethtool get_eeprom support */ 1727 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1728 1729 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1730 if (!eeprom_buff) 1731 return -ENOMEM; 1732 1733 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1734 if (ret_val) { 1735 dev_info(&pf->pdev->dev, 1736 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1737 ret_val, hw->aq.asq_last_status); 1738 goto free_buff; 1739 } 1740 1741 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1742 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1743 len = I40E_NVM_SECTOR_SIZE; 1744 last = false; 1745 for (i = 0; i < sectors; i++) { 1746 if (i == (sectors - 1)) { 1747 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1748 last = true; 1749 } 1750 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1751 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1752 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1753 last, NULL); 1754 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1755 dev_info(&pf->pdev->dev, 1756 "read NVM failed, invalid offset 0x%x\n", 1757 offset); 1758 break; 1759 } else if (ret_val && 1760 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1761 dev_info(&pf->pdev->dev, 1762 "read NVM failed, access, offset 0x%x\n", 1763 offset); 1764 break; 1765 } else if (ret_val) { 1766 dev_info(&pf->pdev->dev, 1767 "read NVM failed offset %d err=%d status=0x%x\n", 1768 offset, ret_val, hw->aq.asq_last_status); 1769 break; 1770 } 1771 } 1772 1773 i40e_release_nvm(hw); 1774 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1775 free_buff: 1776 kfree(eeprom_buff); 1777 return ret_val; 1778 } 1779 1780 static int i40e_get_eeprom_len(struct net_device *netdev) 1781 { 1782 struct i40e_netdev_priv *np = netdev_priv(netdev); 1783 struct i40e_hw *hw = &np->vsi->back->hw; 1784 u32 val; 1785 1786 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1787 if (hw->mac.type == I40E_MAC_X722) { 1788 val = X722_EEPROM_SCOPE_LIMIT + 1; 1789 return val; 1790 } 1791 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1792 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1793 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1794 /* register returns value in power of 2, 64Kbyte chunks. */ 1795 val = (64 * 1024) * BIT(val); 1796 return val; 1797 } 1798 1799 static int i40e_set_eeprom(struct net_device *netdev, 1800 struct ethtool_eeprom *eeprom, u8 *bytes) 1801 { 1802 struct i40e_netdev_priv *np = netdev_priv(netdev); 1803 struct i40e_hw *hw = &np->vsi->back->hw; 1804 struct i40e_pf *pf = np->vsi->back; 1805 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1806 int ret_val = 0; 1807 int errno = 0; 1808 u32 magic; 1809 1810 /* normal ethtool set_eeprom is not supported */ 1811 magic = hw->vendor_id | (hw->device_id << 16); 1812 if (eeprom->magic == magic) 1813 errno = -EOPNOTSUPP; 1814 /* check for NVMUpdate access method */ 1815 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1816 errno = -EINVAL; 1817 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1818 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1819 errno = -EBUSY; 1820 else 1821 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1822 1823 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1824 dev_info(&pf->pdev->dev, 1825 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1826 ret_val, hw->aq.asq_last_status, errno, 1827 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1828 cmd->offset, cmd->data_size); 1829 1830 return errno; 1831 } 1832 1833 static void i40e_get_drvinfo(struct net_device *netdev, 1834 struct ethtool_drvinfo *drvinfo) 1835 { 1836 struct i40e_netdev_priv *np = netdev_priv(netdev); 1837 struct i40e_vsi *vsi = np->vsi; 1838 struct i40e_pf *pf = vsi->back; 1839 1840 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1841 strlcpy(drvinfo->version, i40e_driver_version_str, 1842 sizeof(drvinfo->version)); 1843 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1844 sizeof(drvinfo->fw_version)); 1845 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1846 sizeof(drvinfo->bus_info)); 1847 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1848 if (pf->hw.pf_id == 0) 1849 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1850 } 1851 1852 static void i40e_get_ringparam(struct net_device *netdev, 1853 struct ethtool_ringparam *ring) 1854 { 1855 struct i40e_netdev_priv *np = netdev_priv(netdev); 1856 struct i40e_pf *pf = np->vsi->back; 1857 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1858 1859 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1860 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1861 ring->rx_mini_max_pending = 0; 1862 ring->rx_jumbo_max_pending = 0; 1863 ring->rx_pending = vsi->rx_rings[0]->count; 1864 ring->tx_pending = vsi->tx_rings[0]->count; 1865 ring->rx_mini_pending = 0; 1866 ring->rx_jumbo_pending = 0; 1867 } 1868 1869 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1870 { 1871 if (i40e_enabled_xdp_vsi(vsi)) { 1872 return index < vsi->num_queue_pairs || 1873 (index >= vsi->alloc_queue_pairs && 1874 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1875 } 1876 1877 return index < vsi->num_queue_pairs; 1878 } 1879 1880 static int i40e_set_ringparam(struct net_device *netdev, 1881 struct ethtool_ringparam *ring) 1882 { 1883 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1884 struct i40e_netdev_priv *np = netdev_priv(netdev); 1885 struct i40e_hw *hw = &np->vsi->back->hw; 1886 struct i40e_vsi *vsi = np->vsi; 1887 struct i40e_pf *pf = vsi->back; 1888 u32 new_rx_count, new_tx_count; 1889 u16 tx_alloc_queue_pairs; 1890 int timeout = 50; 1891 int i, err = 0; 1892 1893 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1894 return -EINVAL; 1895 1896 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1897 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1898 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1899 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1900 netdev_info(netdev, 1901 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1902 ring->tx_pending, ring->rx_pending, 1903 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1904 return -EINVAL; 1905 } 1906 1907 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1908 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1909 1910 /* if nothing to do return success */ 1911 if ((new_tx_count == vsi->tx_rings[0]->count) && 1912 (new_rx_count == vsi->rx_rings[0]->count)) 1913 return 0; 1914 1915 /* If there is a AF_XDP UMEM attached to any of Rx rings, 1916 * disallow changing the number of descriptors -- regardless 1917 * if the netdev is running or not. 1918 */ 1919 if (i40e_xsk_any_rx_ring_enabled(vsi)) 1920 return -EBUSY; 1921 1922 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1923 timeout--; 1924 if (!timeout) 1925 return -EBUSY; 1926 usleep_range(1000, 2000); 1927 } 1928 1929 if (!netif_running(vsi->netdev)) { 1930 /* simple case - set for the next time the netdev is started */ 1931 for (i = 0; i < vsi->num_queue_pairs; i++) { 1932 vsi->tx_rings[i]->count = new_tx_count; 1933 vsi->rx_rings[i]->count = new_rx_count; 1934 if (i40e_enabled_xdp_vsi(vsi)) 1935 vsi->xdp_rings[i]->count = new_tx_count; 1936 } 1937 goto done; 1938 } 1939 1940 /* We can't just free everything and then setup again, 1941 * because the ISRs in MSI-X mode get passed pointers 1942 * to the Tx and Rx ring structs. 1943 */ 1944 1945 /* alloc updated Tx and XDP Tx resources */ 1946 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1947 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1948 if (new_tx_count != vsi->tx_rings[0]->count) { 1949 netdev_info(netdev, 1950 "Changing Tx descriptor count from %d to %d.\n", 1951 vsi->tx_rings[0]->count, new_tx_count); 1952 tx_rings = kcalloc(tx_alloc_queue_pairs, 1953 sizeof(struct i40e_ring), GFP_KERNEL); 1954 if (!tx_rings) { 1955 err = -ENOMEM; 1956 goto done; 1957 } 1958 1959 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1960 if (!i40e_active_tx_ring_index(vsi, i)) 1961 continue; 1962 1963 tx_rings[i] = *vsi->tx_rings[i]; 1964 tx_rings[i].count = new_tx_count; 1965 /* the desc and bi pointers will be reallocated in the 1966 * setup call 1967 */ 1968 tx_rings[i].desc = NULL; 1969 tx_rings[i].rx_bi = NULL; 1970 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1971 if (err) { 1972 while (i) { 1973 i--; 1974 if (!i40e_active_tx_ring_index(vsi, i)) 1975 continue; 1976 i40e_free_tx_resources(&tx_rings[i]); 1977 } 1978 kfree(tx_rings); 1979 tx_rings = NULL; 1980 1981 goto done; 1982 } 1983 } 1984 } 1985 1986 /* alloc updated Rx resources */ 1987 if (new_rx_count != vsi->rx_rings[0]->count) { 1988 netdev_info(netdev, 1989 "Changing Rx descriptor count from %d to %d\n", 1990 vsi->rx_rings[0]->count, new_rx_count); 1991 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1992 sizeof(struct i40e_ring), GFP_KERNEL); 1993 if (!rx_rings) { 1994 err = -ENOMEM; 1995 goto free_tx; 1996 } 1997 1998 for (i = 0; i < vsi->num_queue_pairs; i++) { 1999 u16 unused; 2000 2001 /* clone ring and setup updated count */ 2002 rx_rings[i] = *vsi->rx_rings[i]; 2003 rx_rings[i].count = new_rx_count; 2004 /* the desc and bi pointers will be reallocated in the 2005 * setup call 2006 */ 2007 rx_rings[i].desc = NULL; 2008 rx_rings[i].rx_bi = NULL; 2009 /* Clear cloned XDP RX-queue info before setup call */ 2010 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 2011 /* this is to allow wr32 to have something to write to 2012 * during early allocation of Rx buffers 2013 */ 2014 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 2015 err = i40e_setup_rx_descriptors(&rx_rings[i]); 2016 if (err) 2017 goto rx_unwind; 2018 2019 /* now allocate the Rx buffers to make sure the OS 2020 * has enough memory, any failure here means abort 2021 */ 2022 unused = I40E_DESC_UNUSED(&rx_rings[i]); 2023 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 2024 rx_unwind: 2025 if (err) { 2026 do { 2027 i40e_free_rx_resources(&rx_rings[i]); 2028 } while (i--); 2029 kfree(rx_rings); 2030 rx_rings = NULL; 2031 2032 goto free_tx; 2033 } 2034 } 2035 } 2036 2037 /* Bring interface down, copy in the new ring info, 2038 * then restore the interface 2039 */ 2040 i40e_down(vsi); 2041 2042 if (tx_rings) { 2043 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2044 if (i40e_active_tx_ring_index(vsi, i)) { 2045 i40e_free_tx_resources(vsi->tx_rings[i]); 2046 *vsi->tx_rings[i] = tx_rings[i]; 2047 } 2048 } 2049 kfree(tx_rings); 2050 tx_rings = NULL; 2051 } 2052 2053 if (rx_rings) { 2054 for (i = 0; i < vsi->num_queue_pairs; i++) { 2055 i40e_free_rx_resources(vsi->rx_rings[i]); 2056 /* get the real tail offset */ 2057 rx_rings[i].tail = vsi->rx_rings[i]->tail; 2058 /* this is to fake out the allocation routine 2059 * into thinking it has to realloc everything 2060 * but the recycling logic will let us re-use 2061 * the buffers allocated above 2062 */ 2063 rx_rings[i].next_to_use = 0; 2064 rx_rings[i].next_to_clean = 0; 2065 rx_rings[i].next_to_alloc = 0; 2066 /* do a struct copy */ 2067 *vsi->rx_rings[i] = rx_rings[i]; 2068 } 2069 kfree(rx_rings); 2070 rx_rings = NULL; 2071 } 2072 2073 i40e_up(vsi); 2074 2075 free_tx: 2076 /* error cleanup if the Rx allocations failed after getting Tx */ 2077 if (tx_rings) { 2078 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2079 if (i40e_active_tx_ring_index(vsi, i)) 2080 i40e_free_tx_resources(vsi->tx_rings[i]); 2081 } 2082 kfree(tx_rings); 2083 tx_rings = NULL; 2084 } 2085 2086 done: 2087 clear_bit(__I40E_CONFIG_BUSY, pf->state); 2088 2089 return err; 2090 } 2091 2092 /** 2093 * i40e_get_stats_count - return the stats count for a device 2094 * @netdev: the netdev to return the count for 2095 * 2096 * Returns the total number of statistics for this netdev. Note that even 2097 * though this is a function, it is required that the count for a specific 2098 * netdev must never change. Basing the count on static values such as the 2099 * maximum number of queues or the device type is ok. However, the API for 2100 * obtaining stats is *not* safe against changes based on non-static 2101 * values such as the *current* number of queues, or runtime flags. 2102 * 2103 * If a statistic is not always enabled, return it as part of the count 2104 * anyways, always return its string, and report its value as zero. 2105 **/ 2106 static int i40e_get_stats_count(struct net_device *netdev) 2107 { 2108 struct i40e_netdev_priv *np = netdev_priv(netdev); 2109 struct i40e_vsi *vsi = np->vsi; 2110 struct i40e_pf *pf = vsi->back; 2111 int stats_len; 2112 2113 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 2114 stats_len = I40E_PF_STATS_LEN; 2115 else 2116 stats_len = I40E_VSI_STATS_LEN; 2117 2118 /* The number of stats reported for a given net_device must remain 2119 * constant throughout the life of that device. 2120 * 2121 * This is because the API for obtaining the size, strings, and stats 2122 * is spread out over three separate ethtool ioctls. There is no safe 2123 * way to lock the number of stats across these calls, so we must 2124 * assume that they will never change. 2125 * 2126 * Due to this, we report the maximum number of queues, even if not 2127 * every queue is currently configured. Since we always allocate 2128 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 2129 * works because the num_tx_queues is set at device creation and never 2130 * changes. 2131 */ 2132 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 2133 2134 return stats_len; 2135 } 2136 2137 static int i40e_get_sset_count(struct net_device *netdev, int sset) 2138 { 2139 struct i40e_netdev_priv *np = netdev_priv(netdev); 2140 struct i40e_vsi *vsi = np->vsi; 2141 struct i40e_pf *pf = vsi->back; 2142 2143 switch (sset) { 2144 case ETH_SS_TEST: 2145 return I40E_TEST_LEN; 2146 case ETH_SS_STATS: 2147 return i40e_get_stats_count(netdev); 2148 case ETH_SS_PRIV_FLAGS: 2149 return I40E_PRIV_FLAGS_STR_LEN + 2150 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 2151 default: 2152 return -EOPNOTSUPP; 2153 } 2154 } 2155 2156 /** 2157 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 2158 * @pf: the PF device structure 2159 * @i: the priority value to copy 2160 * 2161 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 2162 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 2163 * of the PFC stats for the given priority. 2164 **/ 2165 static inline struct i40e_pfc_stats 2166 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 2167 { 2168 #define I40E_GET_PFC_STAT(stat, priority) \ 2169 .stat = pf->stats.stat[priority] 2170 2171 struct i40e_pfc_stats pfc = { 2172 I40E_GET_PFC_STAT(priority_xon_rx, i), 2173 I40E_GET_PFC_STAT(priority_xoff_rx, i), 2174 I40E_GET_PFC_STAT(priority_xon_tx, i), 2175 I40E_GET_PFC_STAT(priority_xoff_tx, i), 2176 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 2177 }; 2178 return pfc; 2179 } 2180 2181 /** 2182 * i40e_get_ethtool_stats - copy stat values into supplied buffer 2183 * @netdev: the netdev to collect stats for 2184 * @stats: ethtool stats command structure 2185 * @data: ethtool supplied buffer 2186 * 2187 * Copy the stats values for this netdev into the buffer. Expects data to be 2188 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 2189 * statistics must be copied in a static order, and the count must not change 2190 * for a given netdev. See i40e_get_stats_count for more details. 2191 * 2192 * If a statistic is not currently valid (such as a disabled queue), this 2193 * function reports its value as zero. 2194 **/ 2195 static void i40e_get_ethtool_stats(struct net_device *netdev, 2196 struct ethtool_stats *stats, u64 *data) 2197 { 2198 struct i40e_netdev_priv *np = netdev_priv(netdev); 2199 struct i40e_vsi *vsi = np->vsi; 2200 struct i40e_pf *pf = vsi->back; 2201 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 2202 unsigned int i; 2203 bool veb_stats; 2204 u64 *p = data; 2205 2206 i40e_update_stats(vsi); 2207 2208 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2209 i40e_gstrings_net_stats); 2210 2211 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2212 2213 rcu_read_lock(); 2214 for (i = 0; i < netdev->num_tx_queues; i++) { 2215 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2216 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2217 } 2218 rcu_read_unlock(); 2219 2220 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2221 goto check_data_pointer; 2222 2223 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 2224 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 2225 2226 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2227 * we initialize stats to zero and update the data pointer 2228 * intelligently 2229 */ 2230 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2231 i40e_gstrings_veb_stats); 2232 2233 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2234 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2235 i40e_gstrings_veb_tc_stats); 2236 2237 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2238 2239 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2240 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2241 2242 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2243 } 2244 2245 check_data_pointer: 2246 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2247 "ethtool stats count mismatch!"); 2248 } 2249 2250 /** 2251 * i40e_get_stat_strings - copy stat strings into supplied buffer 2252 * @netdev: the netdev to collect strings for 2253 * @data: supplied buffer to copy strings into 2254 * 2255 * Copy the strings related to stats for this netdev. Expects data to be 2256 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2257 * strings must be copied in a static order and the total count must not 2258 * change for a given netdev. See i40e_get_stats_count for more details. 2259 **/ 2260 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2261 { 2262 struct i40e_netdev_priv *np = netdev_priv(netdev); 2263 struct i40e_vsi *vsi = np->vsi; 2264 struct i40e_pf *pf = vsi->back; 2265 unsigned int i; 2266 u8 *p = data; 2267 2268 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2269 2270 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2271 2272 for (i = 0; i < netdev->num_tx_queues; i++) { 2273 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2274 "tx", i); 2275 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2276 "rx", i); 2277 } 2278 2279 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2280 return; 2281 2282 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2283 2284 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2285 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2286 2287 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2288 2289 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2290 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2291 2292 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2293 "stat strings count mismatch!"); 2294 } 2295 2296 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2297 { 2298 struct i40e_netdev_priv *np = netdev_priv(netdev); 2299 struct i40e_vsi *vsi = np->vsi; 2300 struct i40e_pf *pf = vsi->back; 2301 char *p = (char *)data; 2302 unsigned int i; 2303 2304 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 2305 snprintf(p, ETH_GSTRING_LEN, "%s", 2306 i40e_gstrings_priv_flags[i].flag_string); 2307 p += ETH_GSTRING_LEN; 2308 } 2309 if (pf->hw.pf_id != 0) 2310 return; 2311 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 2312 snprintf(p, ETH_GSTRING_LEN, "%s", 2313 i40e_gl_gstrings_priv_flags[i].flag_string); 2314 p += ETH_GSTRING_LEN; 2315 } 2316 } 2317 2318 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2319 u8 *data) 2320 { 2321 switch (stringset) { 2322 case ETH_SS_TEST: 2323 memcpy(data, i40e_gstrings_test, 2324 I40E_TEST_LEN * ETH_GSTRING_LEN); 2325 break; 2326 case ETH_SS_STATS: 2327 i40e_get_stat_strings(netdev, data); 2328 break; 2329 case ETH_SS_PRIV_FLAGS: 2330 i40e_get_priv_flag_strings(netdev, data); 2331 break; 2332 default: 2333 break; 2334 } 2335 } 2336 2337 static int i40e_get_ts_info(struct net_device *dev, 2338 struct ethtool_ts_info *info) 2339 { 2340 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2341 2342 /* only report HW timestamping if PTP is enabled */ 2343 if (!(pf->flags & I40E_FLAG_PTP)) 2344 return ethtool_op_get_ts_info(dev, info); 2345 2346 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2347 SOF_TIMESTAMPING_RX_SOFTWARE | 2348 SOF_TIMESTAMPING_SOFTWARE | 2349 SOF_TIMESTAMPING_TX_HARDWARE | 2350 SOF_TIMESTAMPING_RX_HARDWARE | 2351 SOF_TIMESTAMPING_RAW_HARDWARE; 2352 2353 if (pf->ptp_clock) 2354 info->phc_index = ptp_clock_index(pf->ptp_clock); 2355 else 2356 info->phc_index = -1; 2357 2358 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2359 2360 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2361 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2362 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2363 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2364 2365 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 2366 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2367 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2368 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2369 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2370 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2371 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2372 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2373 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2374 2375 return 0; 2376 } 2377 2378 static u64 i40e_link_test(struct net_device *netdev, u64 *data) 2379 { 2380 struct i40e_netdev_priv *np = netdev_priv(netdev); 2381 struct i40e_pf *pf = np->vsi->back; 2382 i40e_status status; 2383 bool link_up = false; 2384 2385 netif_info(pf, hw, netdev, "link test\n"); 2386 status = i40e_get_link_status(&pf->hw, &link_up); 2387 if (status) { 2388 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2389 *data = 1; 2390 return *data; 2391 } 2392 2393 if (link_up) 2394 *data = 0; 2395 else 2396 *data = 1; 2397 2398 return *data; 2399 } 2400 2401 static u64 i40e_reg_test(struct net_device *netdev, u64 *data) 2402 { 2403 struct i40e_netdev_priv *np = netdev_priv(netdev); 2404 struct i40e_pf *pf = np->vsi->back; 2405 2406 netif_info(pf, hw, netdev, "register test\n"); 2407 *data = i40e_diag_reg_test(&pf->hw); 2408 2409 return *data; 2410 } 2411 2412 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data) 2413 { 2414 struct i40e_netdev_priv *np = netdev_priv(netdev); 2415 struct i40e_pf *pf = np->vsi->back; 2416 2417 netif_info(pf, hw, netdev, "eeprom test\n"); 2418 *data = i40e_diag_eeprom_test(&pf->hw); 2419 2420 /* forcebly clear the NVM Update state machine */ 2421 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2422 2423 return *data; 2424 } 2425 2426 static u64 i40e_intr_test(struct net_device *netdev, u64 *data) 2427 { 2428 struct i40e_netdev_priv *np = netdev_priv(netdev); 2429 struct i40e_pf *pf = np->vsi->back; 2430 u16 swc_old = pf->sw_int_count; 2431 2432 netif_info(pf, hw, netdev, "interrupt test\n"); 2433 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2434 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2435 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2436 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2437 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2438 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2439 usleep_range(1000, 2000); 2440 *data = (swc_old == pf->sw_int_count); 2441 2442 return *data; 2443 } 2444 2445 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2446 { 2447 struct i40e_vf *vfs = pf->vf; 2448 int i; 2449 2450 for (i = 0; i < pf->num_alloc_vfs; i++) 2451 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2452 return true; 2453 return false; 2454 } 2455 2456 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2457 { 2458 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2459 } 2460 2461 static void i40e_diag_test(struct net_device *netdev, 2462 struct ethtool_test *eth_test, u64 *data) 2463 { 2464 struct i40e_netdev_priv *np = netdev_priv(netdev); 2465 bool if_running = netif_running(netdev); 2466 struct i40e_pf *pf = np->vsi->back; 2467 2468 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2469 /* Offline tests */ 2470 netif_info(pf, drv, netdev, "offline testing starting\n"); 2471 2472 set_bit(__I40E_TESTING, pf->state); 2473 2474 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2475 dev_warn(&pf->pdev->dev, 2476 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2477 data[I40E_ETH_TEST_REG] = 1; 2478 data[I40E_ETH_TEST_EEPROM] = 1; 2479 data[I40E_ETH_TEST_INTR] = 1; 2480 data[I40E_ETH_TEST_LINK] = 1; 2481 eth_test->flags |= ETH_TEST_FL_FAILED; 2482 clear_bit(__I40E_TESTING, pf->state); 2483 goto skip_ol_tests; 2484 } 2485 2486 /* If the device is online then take it offline */ 2487 if (if_running) 2488 /* indicate we're in test mode */ 2489 i40e_close(netdev); 2490 else 2491 /* This reset does not affect link - if it is 2492 * changed to a type of reset that does affect 2493 * link then the following link test would have 2494 * to be moved to before the reset 2495 */ 2496 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2497 2498 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2499 eth_test->flags |= ETH_TEST_FL_FAILED; 2500 2501 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2502 eth_test->flags |= ETH_TEST_FL_FAILED; 2503 2504 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2505 eth_test->flags |= ETH_TEST_FL_FAILED; 2506 2507 /* run reg test last, a reset is required after it */ 2508 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2509 eth_test->flags |= ETH_TEST_FL_FAILED; 2510 2511 clear_bit(__I40E_TESTING, pf->state); 2512 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2513 2514 if (if_running) 2515 i40e_open(netdev); 2516 } else { 2517 /* Online tests */ 2518 netif_info(pf, drv, netdev, "online testing starting\n"); 2519 2520 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2521 eth_test->flags |= ETH_TEST_FL_FAILED; 2522 2523 /* Offline only tests, not run in online; pass by default */ 2524 data[I40E_ETH_TEST_REG] = 0; 2525 data[I40E_ETH_TEST_EEPROM] = 0; 2526 data[I40E_ETH_TEST_INTR] = 0; 2527 } 2528 2529 skip_ol_tests: 2530 2531 netif_info(pf, drv, netdev, "testing finished\n"); 2532 } 2533 2534 static void i40e_get_wol(struct net_device *netdev, 2535 struct ethtool_wolinfo *wol) 2536 { 2537 struct i40e_netdev_priv *np = netdev_priv(netdev); 2538 struct i40e_pf *pf = np->vsi->back; 2539 struct i40e_hw *hw = &pf->hw; 2540 u16 wol_nvm_bits; 2541 2542 /* NVM bit on means WoL disabled for the port */ 2543 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2544 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2545 wol->supported = 0; 2546 wol->wolopts = 0; 2547 } else { 2548 wol->supported = WAKE_MAGIC; 2549 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2550 } 2551 } 2552 2553 /** 2554 * i40e_set_wol - set the WakeOnLAN configuration 2555 * @netdev: the netdev in question 2556 * @wol: the ethtool WoL setting data 2557 **/ 2558 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2559 { 2560 struct i40e_netdev_priv *np = netdev_priv(netdev); 2561 struct i40e_pf *pf = np->vsi->back; 2562 struct i40e_vsi *vsi = np->vsi; 2563 struct i40e_hw *hw = &pf->hw; 2564 u16 wol_nvm_bits; 2565 2566 /* WoL not supported if this isn't the controlling PF on the port */ 2567 if (hw->partition_id != 1) { 2568 i40e_partition_setting_complaint(pf); 2569 return -EOPNOTSUPP; 2570 } 2571 2572 if (vsi != pf->vsi[pf->lan_vsi]) 2573 return -EOPNOTSUPP; 2574 2575 /* NVM bit on means WoL disabled for the port */ 2576 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2577 if (BIT(hw->port) & wol_nvm_bits) 2578 return -EOPNOTSUPP; 2579 2580 /* only magic packet is supported */ 2581 if (wol->wolopts & ~WAKE_MAGIC) 2582 return -EOPNOTSUPP; 2583 2584 /* is this a new value? */ 2585 if (pf->wol_en != !!wol->wolopts) { 2586 pf->wol_en = !!wol->wolopts; 2587 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2588 } 2589 2590 return 0; 2591 } 2592 2593 static int i40e_set_phys_id(struct net_device *netdev, 2594 enum ethtool_phys_id_state state) 2595 { 2596 struct i40e_netdev_priv *np = netdev_priv(netdev); 2597 i40e_status ret = 0; 2598 struct i40e_pf *pf = np->vsi->back; 2599 struct i40e_hw *hw = &pf->hw; 2600 int blink_freq = 2; 2601 u16 temp_status; 2602 2603 switch (state) { 2604 case ETHTOOL_ID_ACTIVE: 2605 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2606 pf->led_status = i40e_led_get(hw); 2607 } else { 2608 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2609 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2610 NULL); 2611 ret = i40e_led_get_phy(hw, &temp_status, 2612 &pf->phy_led_val); 2613 pf->led_status = temp_status; 2614 } 2615 return blink_freq; 2616 case ETHTOOL_ID_ON: 2617 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2618 i40e_led_set(hw, 0xf, false); 2619 else 2620 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2621 break; 2622 case ETHTOOL_ID_OFF: 2623 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2624 i40e_led_set(hw, 0x0, false); 2625 else 2626 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2627 break; 2628 case ETHTOOL_ID_INACTIVE: 2629 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2630 i40e_led_set(hw, pf->led_status, false); 2631 } else { 2632 ret = i40e_led_set_phy(hw, false, pf->led_status, 2633 (pf->phy_led_val | 2634 I40E_PHY_LED_MODE_ORIG)); 2635 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2636 i40e_aq_set_phy_debug(hw, 0, NULL); 2637 } 2638 break; 2639 default: 2640 break; 2641 } 2642 if (ret) 2643 return -ENOENT; 2644 else 2645 return 0; 2646 } 2647 2648 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2649 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2650 * 125us (8000 interrupts per second) == ITR(62) 2651 */ 2652 2653 /** 2654 * __i40e_get_coalesce - get per-queue coalesce settings 2655 * @netdev: the netdev to check 2656 * @ec: ethtool coalesce data structure 2657 * @queue: which queue to pick 2658 * 2659 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2660 * are per queue. If queue is <0 then we default to queue 0 as the 2661 * representative value. 2662 **/ 2663 static int __i40e_get_coalesce(struct net_device *netdev, 2664 struct ethtool_coalesce *ec, 2665 int queue) 2666 { 2667 struct i40e_netdev_priv *np = netdev_priv(netdev); 2668 struct i40e_ring *rx_ring, *tx_ring; 2669 struct i40e_vsi *vsi = np->vsi; 2670 2671 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2672 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2673 2674 /* rx and tx usecs has per queue value. If user doesn't specify the 2675 * queue, return queue 0's value to represent. 2676 */ 2677 if (queue < 0) 2678 queue = 0; 2679 else if (queue >= vsi->num_queue_pairs) 2680 return -EINVAL; 2681 2682 rx_ring = vsi->rx_rings[queue]; 2683 tx_ring = vsi->tx_rings[queue]; 2684 2685 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2686 ec->use_adaptive_rx_coalesce = 1; 2687 2688 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2689 ec->use_adaptive_tx_coalesce = 1; 2690 2691 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2692 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2693 2694 /* we use the _usecs_high to store/set the interrupt rate limit 2695 * that the hardware supports, that almost but not quite 2696 * fits the original intent of the ethtool variable, 2697 * the rx_coalesce_usecs_high limits total interrupts 2698 * per second from both tx/rx sources. 2699 */ 2700 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2701 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2702 2703 return 0; 2704 } 2705 2706 /** 2707 * i40e_get_coalesce - get a netdev's coalesce settings 2708 * @netdev: the netdev to check 2709 * @ec: ethtool coalesce data structure 2710 * 2711 * Gets the coalesce settings for a particular netdev. Note that if user has 2712 * modified per-queue settings, this only guarantees to represent queue 0. See 2713 * __i40e_get_coalesce for more details. 2714 **/ 2715 static int i40e_get_coalesce(struct net_device *netdev, 2716 struct ethtool_coalesce *ec) 2717 { 2718 return __i40e_get_coalesce(netdev, ec, -1); 2719 } 2720 2721 /** 2722 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2723 * @netdev: netdev structure 2724 * @ec: ethtool's coalesce settings 2725 * @queue: the particular queue to read 2726 * 2727 * Will read a specific queue's coalesce settings 2728 **/ 2729 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2730 struct ethtool_coalesce *ec) 2731 { 2732 return __i40e_get_coalesce(netdev, ec, queue); 2733 } 2734 2735 /** 2736 * i40e_set_itr_per_queue - set ITR values for specific queue 2737 * @vsi: the VSI to set values for 2738 * @ec: coalesce settings from ethtool 2739 * @queue: the queue to modify 2740 * 2741 * Change the ITR settings for a specific queue. 2742 **/ 2743 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2744 struct ethtool_coalesce *ec, 2745 int queue) 2746 { 2747 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2748 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2749 struct i40e_pf *pf = vsi->back; 2750 struct i40e_hw *hw = &pf->hw; 2751 struct i40e_q_vector *q_vector; 2752 u16 intrl; 2753 2754 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2755 2756 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2757 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2758 2759 if (ec->use_adaptive_rx_coalesce) 2760 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2761 else 2762 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2763 2764 if (ec->use_adaptive_tx_coalesce) 2765 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2766 else 2767 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2768 2769 q_vector = rx_ring->q_vector; 2770 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2771 2772 q_vector = tx_ring->q_vector; 2773 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2774 2775 /* The interrupt handler itself will take care of programming 2776 * the Tx and Rx ITR values based on the values we have entered 2777 * into the q_vector, no need to write the values now. 2778 */ 2779 2780 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2781 i40e_flush(hw); 2782 } 2783 2784 /** 2785 * __i40e_set_coalesce - set coalesce settings for particular queue 2786 * @netdev: the netdev to change 2787 * @ec: ethtool coalesce settings 2788 * @queue: the queue to change 2789 * 2790 * Sets the coalesce settings for a particular queue. 2791 **/ 2792 static int __i40e_set_coalesce(struct net_device *netdev, 2793 struct ethtool_coalesce *ec, 2794 int queue) 2795 { 2796 struct i40e_netdev_priv *np = netdev_priv(netdev); 2797 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2798 struct i40e_vsi *vsi = np->vsi; 2799 struct i40e_pf *pf = vsi->back; 2800 int i; 2801 2802 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2803 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2804 2805 if (queue < 0) { 2806 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2807 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2808 } else if (queue < vsi->num_queue_pairs) { 2809 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2810 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2811 } else { 2812 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2813 vsi->num_queue_pairs - 1); 2814 return -EINVAL; 2815 } 2816 2817 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2818 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2819 2820 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2821 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2822 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2823 return -EINVAL; 2824 } 2825 2826 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2827 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2828 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2829 return -EINVAL; 2830 } 2831 2832 if (ec->rx_coalesce_usecs != cur_rx_itr && 2833 ec->use_adaptive_rx_coalesce) { 2834 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2835 return -EINVAL; 2836 } 2837 2838 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2839 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2840 return -EINVAL; 2841 } 2842 2843 if (ec->tx_coalesce_usecs != cur_tx_itr && 2844 ec->use_adaptive_tx_coalesce) { 2845 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2846 return -EINVAL; 2847 } 2848 2849 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2850 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2851 return -EINVAL; 2852 } 2853 2854 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2855 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2856 2857 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2858 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2859 2860 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2861 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2862 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2863 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2864 vsi->int_rate_limit); 2865 } 2866 2867 /* rx and tx usecs has per queue value. If user doesn't specify the 2868 * queue, apply to all queues. 2869 */ 2870 if (queue < 0) { 2871 for (i = 0; i < vsi->num_queue_pairs; i++) 2872 i40e_set_itr_per_queue(vsi, ec, i); 2873 } else { 2874 i40e_set_itr_per_queue(vsi, ec, queue); 2875 } 2876 2877 return 0; 2878 } 2879 2880 /** 2881 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2882 * @netdev: the netdev to change 2883 * @ec: ethtool coalesce settings 2884 * 2885 * This will set each queue to the same coalesce settings. 2886 **/ 2887 static int i40e_set_coalesce(struct net_device *netdev, 2888 struct ethtool_coalesce *ec) 2889 { 2890 return __i40e_set_coalesce(netdev, ec, -1); 2891 } 2892 2893 /** 2894 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2895 * @netdev: the netdev to change 2896 * @ec: ethtool's coalesce settings 2897 * @queue: the queue to change 2898 * 2899 * Sets the specified queue's coalesce settings. 2900 **/ 2901 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2902 struct ethtool_coalesce *ec) 2903 { 2904 return __i40e_set_coalesce(netdev, ec, queue); 2905 } 2906 2907 /** 2908 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2909 * @pf: pointer to the physical function struct 2910 * @cmd: ethtool rxnfc command 2911 * 2912 * Returns Success if the flow is supported, else Invalid Input. 2913 **/ 2914 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2915 { 2916 struct i40e_hw *hw = &pf->hw; 2917 u8 flow_pctype = 0; 2918 u64 i_set = 0; 2919 2920 cmd->data = 0; 2921 2922 switch (cmd->flow_type) { 2923 case TCP_V4_FLOW: 2924 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2925 break; 2926 case UDP_V4_FLOW: 2927 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2928 break; 2929 case TCP_V6_FLOW: 2930 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2931 break; 2932 case UDP_V6_FLOW: 2933 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2934 break; 2935 case SCTP_V4_FLOW: 2936 case AH_ESP_V4_FLOW: 2937 case AH_V4_FLOW: 2938 case ESP_V4_FLOW: 2939 case IPV4_FLOW: 2940 case SCTP_V6_FLOW: 2941 case AH_ESP_V6_FLOW: 2942 case AH_V6_FLOW: 2943 case ESP_V6_FLOW: 2944 case IPV6_FLOW: 2945 /* Default is src/dest for IP, no matter the L4 hashing */ 2946 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2947 break; 2948 default: 2949 return -EINVAL; 2950 } 2951 2952 /* Read flow based hash input set register */ 2953 if (flow_pctype) { 2954 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2955 flow_pctype)) | 2956 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2957 flow_pctype)) << 32); 2958 } 2959 2960 /* Process bits of hash input set */ 2961 if (i_set) { 2962 if (i_set & I40E_L4_SRC_MASK) 2963 cmd->data |= RXH_L4_B_0_1; 2964 if (i_set & I40E_L4_DST_MASK) 2965 cmd->data |= RXH_L4_B_2_3; 2966 2967 if (cmd->flow_type == TCP_V4_FLOW || 2968 cmd->flow_type == UDP_V4_FLOW) { 2969 if (i_set & I40E_L3_SRC_MASK) 2970 cmd->data |= RXH_IP_SRC; 2971 if (i_set & I40E_L3_DST_MASK) 2972 cmd->data |= RXH_IP_DST; 2973 } else if (cmd->flow_type == TCP_V6_FLOW || 2974 cmd->flow_type == UDP_V6_FLOW) { 2975 if (i_set & I40E_L3_V6_SRC_MASK) 2976 cmd->data |= RXH_IP_SRC; 2977 if (i_set & I40E_L3_V6_DST_MASK) 2978 cmd->data |= RXH_IP_DST; 2979 } 2980 } 2981 2982 return 0; 2983 } 2984 2985 /** 2986 * i40e_check_mask - Check whether a mask field is set 2987 * @mask: the full mask value 2988 * @field: mask of the field to check 2989 * 2990 * If the given mask is fully set, return positive value. If the mask for the 2991 * field is fully unset, return zero. Otherwise return a negative error code. 2992 **/ 2993 static int i40e_check_mask(u64 mask, u64 field) 2994 { 2995 u64 value = mask & field; 2996 2997 if (value == field) 2998 return 1; 2999 else if (!value) 3000 return 0; 3001 else 3002 return -1; 3003 } 3004 3005 /** 3006 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 3007 * @fsp: pointer to rx flow specification 3008 * @data: pointer to userdef data structure for storage 3009 * 3010 * Read the user-defined data and deconstruct the value into a structure. No 3011 * other code should read the user-defined data, so as to ensure that every 3012 * place consistently reads the value correctly. 3013 * 3014 * The user-defined field is a 64bit Big Endian format value, which we 3015 * deconstruct by reading bits or bit fields from it. Single bit flags shall 3016 * be defined starting from the highest bits, while small bit field values 3017 * shall be defined starting from the lowest bits. 3018 * 3019 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 3020 * and the filter should be rejected. The data structure will always be 3021 * modified even if FLOW_EXT is not set. 3022 * 3023 **/ 3024 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3025 struct i40e_rx_flow_userdef *data) 3026 { 3027 u64 value, mask; 3028 int valid; 3029 3030 /* Zero memory first so it's always consistent. */ 3031 memset(data, 0, sizeof(*data)); 3032 3033 if (!(fsp->flow_type & FLOW_EXT)) 3034 return 0; 3035 3036 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 3037 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 3038 3039 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 3040 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 3041 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 3042 3043 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 3044 if (valid < 0) { 3045 return -EINVAL; 3046 } else if (valid) { 3047 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 3048 data->flex_offset = 3049 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 3050 data->flex_filter = true; 3051 } 3052 3053 return 0; 3054 } 3055 3056 /** 3057 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 3058 * @fsp: pointer to rx_flow specification 3059 * @data: pointer to return userdef data 3060 * 3061 * Reads the userdef data structure and properly fills in the user defined 3062 * fields of the rx_flow_spec. 3063 **/ 3064 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3065 struct i40e_rx_flow_userdef *data) 3066 { 3067 u64 value = 0, mask = 0; 3068 3069 if (data->flex_filter) { 3070 value |= data->flex_word; 3071 value |= (u64)data->flex_offset << 16; 3072 mask |= I40E_USERDEF_FLEX_FILTER; 3073 } 3074 3075 if (value || mask) 3076 fsp->flow_type |= FLOW_EXT; 3077 3078 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 3079 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 3080 } 3081 3082 /** 3083 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 3084 * @pf: Pointer to the physical function struct 3085 * @cmd: The command to get or set Rx flow classification rules 3086 * @rule_locs: Array of used rule locations 3087 * 3088 * This function populates both the total and actual rule count of 3089 * the ethtool flow classification command 3090 * 3091 * Returns 0 on success or -EMSGSIZE if entry not found 3092 **/ 3093 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 3094 struct ethtool_rxnfc *cmd, 3095 u32 *rule_locs) 3096 { 3097 struct i40e_fdir_filter *rule; 3098 struct hlist_node *node2; 3099 int cnt = 0; 3100 3101 /* report total rule count */ 3102 cmd->data = i40e_get_fd_cnt_all(pf); 3103 3104 hlist_for_each_entry_safe(rule, node2, 3105 &pf->fdir_filter_list, fdir_node) { 3106 if (cnt == cmd->rule_cnt) 3107 return -EMSGSIZE; 3108 3109 rule_locs[cnt] = rule->fd_id; 3110 cnt++; 3111 } 3112 3113 cmd->rule_cnt = cnt; 3114 3115 return 0; 3116 } 3117 3118 /** 3119 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 3120 * @pf: Pointer to the physical function struct 3121 * @cmd: The command to get or set Rx flow classification rules 3122 * 3123 * This function looks up a filter based on the Rx flow classification 3124 * command and fills the flow spec info for it if found 3125 * 3126 * Returns 0 on success or -EINVAL if filter not found 3127 **/ 3128 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 3129 struct ethtool_rxnfc *cmd) 3130 { 3131 struct ethtool_rx_flow_spec *fsp = 3132 (struct ethtool_rx_flow_spec *)&cmd->fs; 3133 struct i40e_rx_flow_userdef userdef = {0}; 3134 struct i40e_fdir_filter *rule = NULL; 3135 struct hlist_node *node2; 3136 u64 input_set; 3137 u16 index; 3138 3139 hlist_for_each_entry_safe(rule, node2, 3140 &pf->fdir_filter_list, fdir_node) { 3141 if (fsp->location <= rule->fd_id) 3142 break; 3143 } 3144 3145 if (!rule || fsp->location != rule->fd_id) 3146 return -EINVAL; 3147 3148 fsp->flow_type = rule->flow_type; 3149 if (fsp->flow_type == IP_USER_FLOW) { 3150 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 3151 fsp->h_u.usr_ip4_spec.proto = 0; 3152 fsp->m_u.usr_ip4_spec.proto = 0; 3153 } 3154 3155 /* Reverse the src and dest notion, since the HW views them from 3156 * Tx perspective where as the user expects it from Rx filter view. 3157 */ 3158 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 3159 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 3160 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 3161 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 3162 3163 switch (rule->flow_type) { 3164 case SCTP_V4_FLOW: 3165 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3166 break; 3167 case TCP_V4_FLOW: 3168 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3169 break; 3170 case UDP_V4_FLOW: 3171 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3172 break; 3173 case IP_USER_FLOW: 3174 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3175 break; 3176 default: 3177 /* If we have stored a filter with a flow type not listed here 3178 * it is almost certainly a driver bug. WARN(), and then 3179 * assign the input_set as if all fields are enabled to avoid 3180 * reading unassigned memory. 3181 */ 3182 WARN(1, "Missing input set index for flow_type %d\n", 3183 rule->flow_type); 3184 input_set = 0xFFFFFFFFFFFFFFFFULL; 3185 goto no_input_set; 3186 } 3187 3188 input_set = i40e_read_fd_input_set(pf, index); 3189 3190 no_input_set: 3191 if (input_set & I40E_L3_SRC_MASK) 3192 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 3193 3194 if (input_set & I40E_L3_DST_MASK) 3195 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 3196 3197 if (input_set & I40E_L4_SRC_MASK) 3198 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 3199 3200 if (input_set & I40E_L4_DST_MASK) 3201 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3202 3203 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3204 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3205 else 3206 fsp->ring_cookie = rule->q_index; 3207 3208 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 3209 struct i40e_vsi *vsi; 3210 3211 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3212 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3213 /* VFs are zero-indexed by the driver, but ethtool 3214 * expects them to be one-indexed, so add one here 3215 */ 3216 u64 ring_vf = vsi->vf_id + 1; 3217 3218 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3219 fsp->ring_cookie |= ring_vf; 3220 } 3221 } 3222 3223 if (rule->flex_filter) { 3224 userdef.flex_filter = true; 3225 userdef.flex_word = be16_to_cpu(rule->flex_word); 3226 userdef.flex_offset = rule->flex_offset; 3227 } 3228 3229 i40e_fill_rx_flow_user_data(fsp, &userdef); 3230 3231 return 0; 3232 } 3233 3234 /** 3235 * i40e_get_rxnfc - command to get RX flow classification rules 3236 * @netdev: network interface device structure 3237 * @cmd: ethtool rxnfc command 3238 * @rule_locs: pointer to store rule data 3239 * 3240 * Returns Success if the command is supported. 3241 **/ 3242 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3243 u32 *rule_locs) 3244 { 3245 struct i40e_netdev_priv *np = netdev_priv(netdev); 3246 struct i40e_vsi *vsi = np->vsi; 3247 struct i40e_pf *pf = vsi->back; 3248 int ret = -EOPNOTSUPP; 3249 3250 switch (cmd->cmd) { 3251 case ETHTOOL_GRXRINGS: 3252 cmd->data = vsi->rss_size; 3253 ret = 0; 3254 break; 3255 case ETHTOOL_GRXFH: 3256 ret = i40e_get_rss_hash_opts(pf, cmd); 3257 break; 3258 case ETHTOOL_GRXCLSRLCNT: 3259 cmd->rule_cnt = pf->fdir_pf_active_filters; 3260 /* report total rule count */ 3261 cmd->data = i40e_get_fd_cnt_all(pf); 3262 ret = 0; 3263 break; 3264 case ETHTOOL_GRXCLSRULE: 3265 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3266 break; 3267 case ETHTOOL_GRXCLSRLALL: 3268 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3269 break; 3270 default: 3271 break; 3272 } 3273 3274 return ret; 3275 } 3276 3277 /** 3278 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3279 * @nfc: pointer to user request 3280 * @i_setc: bits currently set 3281 * 3282 * Returns value of bits to be set per user request 3283 **/ 3284 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 3285 { 3286 u64 i_set = i_setc; 3287 u64 src_l3 = 0, dst_l3 = 0; 3288 3289 if (nfc->data & RXH_L4_B_0_1) 3290 i_set |= I40E_L4_SRC_MASK; 3291 else 3292 i_set &= ~I40E_L4_SRC_MASK; 3293 if (nfc->data & RXH_L4_B_2_3) 3294 i_set |= I40E_L4_DST_MASK; 3295 else 3296 i_set &= ~I40E_L4_DST_MASK; 3297 3298 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3299 src_l3 = I40E_L3_V6_SRC_MASK; 3300 dst_l3 = I40E_L3_V6_DST_MASK; 3301 } else if (nfc->flow_type == TCP_V4_FLOW || 3302 nfc->flow_type == UDP_V4_FLOW) { 3303 src_l3 = I40E_L3_SRC_MASK; 3304 dst_l3 = I40E_L3_DST_MASK; 3305 } else { 3306 /* Any other flow type are not supported here */ 3307 return i_set; 3308 } 3309 3310 if (nfc->data & RXH_IP_SRC) 3311 i_set |= src_l3; 3312 else 3313 i_set &= ~src_l3; 3314 if (nfc->data & RXH_IP_DST) 3315 i_set |= dst_l3; 3316 else 3317 i_set &= ~dst_l3; 3318 3319 return i_set; 3320 } 3321 3322 /** 3323 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3324 * @pf: pointer to the physical function struct 3325 * @nfc: ethtool rxnfc command 3326 * 3327 * Returns Success if the flow input set is supported. 3328 **/ 3329 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3330 { 3331 struct i40e_hw *hw = &pf->hw; 3332 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3333 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3334 u8 flow_pctype = 0; 3335 u64 i_set, i_setc; 3336 3337 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3338 dev_err(&pf->pdev->dev, 3339 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3340 return -EOPNOTSUPP; 3341 } 3342 3343 /* RSS does not support anything other than hashing 3344 * to queues on src and dst IPs and ports 3345 */ 3346 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3347 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3348 return -EINVAL; 3349 3350 switch (nfc->flow_type) { 3351 case TCP_V4_FLOW: 3352 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3353 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3354 hena |= 3355 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3356 break; 3357 case TCP_V6_FLOW: 3358 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3359 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3360 hena |= 3361 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3362 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3363 hena |= 3364 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 3365 break; 3366 case UDP_V4_FLOW: 3367 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3368 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3369 hena |= 3370 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 3371 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 3372 3373 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3374 break; 3375 case UDP_V6_FLOW: 3376 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3377 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3378 hena |= 3379 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 3380 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 3381 3382 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3383 break; 3384 case AH_ESP_V4_FLOW: 3385 case AH_V4_FLOW: 3386 case ESP_V4_FLOW: 3387 case SCTP_V4_FLOW: 3388 if ((nfc->data & RXH_L4_B_0_1) || 3389 (nfc->data & RXH_L4_B_2_3)) 3390 return -EINVAL; 3391 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3392 break; 3393 case AH_ESP_V6_FLOW: 3394 case AH_V6_FLOW: 3395 case ESP_V6_FLOW: 3396 case SCTP_V6_FLOW: 3397 if ((nfc->data & RXH_L4_B_0_1) || 3398 (nfc->data & RXH_L4_B_2_3)) 3399 return -EINVAL; 3400 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3401 break; 3402 case IPV4_FLOW: 3403 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3404 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3405 break; 3406 case IPV6_FLOW: 3407 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3408 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3409 break; 3410 default: 3411 return -EINVAL; 3412 } 3413 3414 if (flow_pctype) { 3415 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3416 flow_pctype)) | 3417 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3418 flow_pctype)) << 32); 3419 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3420 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3421 (u32)i_set); 3422 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3423 (u32)(i_set >> 32)); 3424 hena |= BIT_ULL(flow_pctype); 3425 } 3426 3427 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3428 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3429 i40e_flush(hw); 3430 3431 return 0; 3432 } 3433 3434 /** 3435 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3436 * @vsi: Pointer to the targeted VSI 3437 * @input: The filter to update or NULL to indicate deletion 3438 * @sw_idx: Software index to the filter 3439 * @cmd: The command to get or set Rx flow classification rules 3440 * 3441 * This function updates (or deletes) a Flow Director entry from 3442 * the hlist of the corresponding PF 3443 * 3444 * Returns 0 on success 3445 **/ 3446 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3447 struct i40e_fdir_filter *input, 3448 u16 sw_idx, 3449 struct ethtool_rxnfc *cmd) 3450 { 3451 struct i40e_fdir_filter *rule, *parent; 3452 struct i40e_pf *pf = vsi->back; 3453 struct hlist_node *node2; 3454 int err = -EINVAL; 3455 3456 parent = NULL; 3457 rule = NULL; 3458 3459 hlist_for_each_entry_safe(rule, node2, 3460 &pf->fdir_filter_list, fdir_node) { 3461 /* hash found, or no matching entry */ 3462 if (rule->fd_id >= sw_idx) 3463 break; 3464 parent = rule; 3465 } 3466 3467 /* if there is an old rule occupying our place remove it */ 3468 if (rule && (rule->fd_id == sw_idx)) { 3469 /* Remove this rule, since we're either deleting it, or 3470 * replacing it. 3471 */ 3472 err = i40e_add_del_fdir(vsi, rule, false); 3473 hlist_del(&rule->fdir_node); 3474 kfree(rule); 3475 pf->fdir_pf_active_filters--; 3476 } 3477 3478 /* If we weren't given an input, this is a delete, so just return the 3479 * error code indicating if there was an entry at the requested slot 3480 */ 3481 if (!input) 3482 return err; 3483 3484 /* Otherwise, install the new rule as requested */ 3485 INIT_HLIST_NODE(&input->fdir_node); 3486 3487 /* add filter to the list */ 3488 if (parent) 3489 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3490 else 3491 hlist_add_head(&input->fdir_node, 3492 &pf->fdir_filter_list); 3493 3494 /* update counts */ 3495 pf->fdir_pf_active_filters++; 3496 3497 return 0; 3498 } 3499 3500 /** 3501 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3502 * @pf: pointer to PF structure 3503 * 3504 * This function searches the list of filters and determines which FLX_PIT 3505 * entries are still required. It will prune any entries which are no longer 3506 * in use after the deletion. 3507 **/ 3508 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3509 { 3510 struct i40e_flex_pit *entry, *tmp; 3511 struct i40e_fdir_filter *rule; 3512 3513 /* First, we'll check the l3 table */ 3514 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3515 bool found = false; 3516 3517 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3518 if (rule->flow_type != IP_USER_FLOW) 3519 continue; 3520 if (rule->flex_filter && 3521 rule->flex_offset == entry->src_offset) { 3522 found = true; 3523 break; 3524 } 3525 } 3526 3527 /* If we didn't find the filter, then we can prune this entry 3528 * from the list. 3529 */ 3530 if (!found) { 3531 list_del(&entry->list); 3532 kfree(entry); 3533 } 3534 } 3535 3536 /* Followed by the L4 table */ 3537 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3538 bool found = false; 3539 3540 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3541 /* Skip this filter if it's L3, since we already 3542 * checked those in the above loop 3543 */ 3544 if (rule->flow_type == IP_USER_FLOW) 3545 continue; 3546 if (rule->flex_filter && 3547 rule->flex_offset == entry->src_offset) { 3548 found = true; 3549 break; 3550 } 3551 } 3552 3553 /* If we didn't find the filter, then we can prune this entry 3554 * from the list. 3555 */ 3556 if (!found) { 3557 list_del(&entry->list); 3558 kfree(entry); 3559 } 3560 } 3561 } 3562 3563 /** 3564 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3565 * @vsi: Pointer to the targeted VSI 3566 * @cmd: The command to get or set Rx flow classification rules 3567 * 3568 * The function removes a Flow Director filter entry from the 3569 * hlist of the corresponding PF 3570 * 3571 * Returns 0 on success 3572 */ 3573 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3574 struct ethtool_rxnfc *cmd) 3575 { 3576 struct ethtool_rx_flow_spec *fsp = 3577 (struct ethtool_rx_flow_spec *)&cmd->fs; 3578 struct i40e_pf *pf = vsi->back; 3579 int ret = 0; 3580 3581 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3582 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3583 return -EBUSY; 3584 3585 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3586 return -EBUSY; 3587 3588 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3589 3590 i40e_prune_flex_pit_list(pf); 3591 3592 i40e_fdir_check_and_reenable(pf); 3593 return ret; 3594 } 3595 3596 /** 3597 * i40e_unused_pit_index - Find an unused PIT index for given list 3598 * @pf: the PF data structure 3599 * 3600 * Find the first unused flexible PIT index entry. We search both the L3 and 3601 * L4 flexible PIT lists so that the returned index is unique and unused by 3602 * either currently programmed L3 or L4 filters. We use a bit field as storage 3603 * to track which indexes are already used. 3604 **/ 3605 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3606 { 3607 unsigned long available_index = 0xFF; 3608 struct i40e_flex_pit *entry; 3609 3610 /* We need to make sure that the new index isn't in use by either L3 3611 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3612 * L4 to use the same index. 3613 */ 3614 3615 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3616 clear_bit(entry->pit_index, &available_index); 3617 3618 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3619 clear_bit(entry->pit_index, &available_index); 3620 3621 return find_first_bit(&available_index, 8); 3622 } 3623 3624 /** 3625 * i40e_find_flex_offset - Find an existing flex src_offset 3626 * @flex_pit_list: L3 or L4 flex PIT list 3627 * @src_offset: new src_offset to find 3628 * 3629 * Searches the flex_pit_list for an existing offset. If no offset is 3630 * currently programmed, then this will return an ERR_PTR if there is no space 3631 * to add a new offset, otherwise it returns NULL. 3632 **/ 3633 static 3634 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3635 u16 src_offset) 3636 { 3637 struct i40e_flex_pit *entry; 3638 int size = 0; 3639 3640 /* Search for the src_offset first. If we find a matching entry 3641 * already programmed, we can simply re-use it. 3642 */ 3643 list_for_each_entry(entry, flex_pit_list, list) { 3644 size++; 3645 if (entry->src_offset == src_offset) 3646 return entry; 3647 } 3648 3649 /* If we haven't found an entry yet, then the provided src offset has 3650 * not yet been programmed. We will program the src offset later on, 3651 * but we need to indicate whether there is enough space to do so 3652 * here. We'll make use of ERR_PTR for this purpose. 3653 */ 3654 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3655 return ERR_PTR(-ENOSPC); 3656 3657 return NULL; 3658 } 3659 3660 /** 3661 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3662 * @flex_pit_list: L3 or L4 flex PIT list 3663 * @src_offset: new src_offset to add 3664 * @pit_index: the PIT index to program 3665 * 3666 * This function programs the new src_offset to the list. It is expected that 3667 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3668 * that this offset is not programmed, and that the list has enough space to 3669 * store another offset. 3670 * 3671 * Returns 0 on success, and negative value on error. 3672 **/ 3673 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3674 u16 src_offset, 3675 u8 pit_index) 3676 { 3677 struct i40e_flex_pit *new_pit, *entry; 3678 3679 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3680 if (!new_pit) 3681 return -ENOMEM; 3682 3683 new_pit->src_offset = src_offset; 3684 new_pit->pit_index = pit_index; 3685 3686 /* We need to insert this item such that the list is sorted by 3687 * src_offset in ascending order. 3688 */ 3689 list_for_each_entry(entry, flex_pit_list, list) { 3690 if (new_pit->src_offset < entry->src_offset) { 3691 list_add_tail(&new_pit->list, &entry->list); 3692 return 0; 3693 } 3694 3695 /* If we found an entry with our offset already programmed we 3696 * can simply return here, after freeing the memory. However, 3697 * if the pit_index does not match we need to report an error. 3698 */ 3699 if (new_pit->src_offset == entry->src_offset) { 3700 int err = 0; 3701 3702 /* If the PIT index is not the same we can't re-use 3703 * the entry, so we must report an error. 3704 */ 3705 if (new_pit->pit_index != entry->pit_index) 3706 err = -EINVAL; 3707 3708 kfree(new_pit); 3709 return err; 3710 } 3711 } 3712 3713 /* If we reached here, then we haven't yet added the item. This means 3714 * that we should add the item at the end of the list. 3715 */ 3716 list_add_tail(&new_pit->list, flex_pit_list); 3717 return 0; 3718 } 3719 3720 /** 3721 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3722 * @pf: Pointer to the PF structure 3723 * @flex_pit_list: list of flexible src offsets in use 3724 * @flex_pit_start: index to first entry for this section of the table 3725 * 3726 * In order to handle flexible data, the hardware uses a table of values 3727 * called the FLX_PIT table. This table is used to indicate which sections of 3728 * the input correspond to what PIT index values. Unfortunately, hardware is 3729 * very restrictive about programming this table. Entries must be ordered by 3730 * src_offset in ascending order, without duplicates. Additionally, unused 3731 * entries must be set to the unused index value, and must have valid size and 3732 * length according to the src_offset ordering. 3733 * 3734 * This function will reprogram the FLX_PIT register from a book-keeping 3735 * structure that we guarantee is already ordered correctly, and has no more 3736 * than 3 entries. 3737 * 3738 * To make things easier, we only support flexible values of one word length, 3739 * rather than allowing variable length flexible values. 3740 **/ 3741 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3742 struct list_head *flex_pit_list, 3743 int flex_pit_start) 3744 { 3745 struct i40e_flex_pit *entry = NULL; 3746 u16 last_offset = 0; 3747 int i = 0, j = 0; 3748 3749 /* First, loop over the list of flex PIT entries, and reprogram the 3750 * registers. 3751 */ 3752 list_for_each_entry(entry, flex_pit_list, list) { 3753 /* We have to be careful when programming values for the 3754 * largest SRC_OFFSET value. It is possible that adding 3755 * additional empty values at the end would overflow the space 3756 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3757 * we check here and add the empty values prior to adding the 3758 * largest value. 3759 * 3760 * To determine this, we will use a loop from i+1 to 3, which 3761 * will determine whether the unused entries would have valid 3762 * SRC_OFFSET. Note that there cannot be extra entries past 3763 * this value, because the only valid values would have been 3764 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3765 * have been added to the list in the first place. 3766 */ 3767 for (j = i + 1; j < 3; j++) { 3768 u16 offset = entry->src_offset + j; 3769 int index = flex_pit_start + i; 3770 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3771 1, 3772 offset - 3); 3773 3774 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3775 i40e_write_rx_ctl(&pf->hw, 3776 I40E_PRTQF_FLX_PIT(index), 3777 value); 3778 i++; 3779 } 3780 } 3781 3782 /* Now, we can program the actual value into the table */ 3783 i40e_write_rx_ctl(&pf->hw, 3784 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3785 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3786 1, 3787 entry->src_offset)); 3788 i++; 3789 } 3790 3791 /* In order to program the last entries in the table, we need to 3792 * determine the valid offset. If the list is empty, we'll just start 3793 * with 0. Otherwise, we'll start with the last item offset and add 1. 3794 * This ensures that all entries have valid sizes. If we don't do this 3795 * correctly, the hardware will disable flexible field parsing. 3796 */ 3797 if (!list_empty(flex_pit_list)) 3798 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3799 3800 for (; i < 3; i++, last_offset++) { 3801 i40e_write_rx_ctl(&pf->hw, 3802 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3803 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3804 1, 3805 last_offset)); 3806 } 3807 } 3808 3809 /** 3810 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3811 * @pf: pointer to the PF structure 3812 * 3813 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3814 * internal helper function for implementation details. 3815 **/ 3816 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3817 { 3818 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3819 I40E_FLEX_PIT_IDX_START_L3); 3820 3821 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3822 I40E_FLEX_PIT_IDX_START_L4); 3823 3824 /* We also need to program the L3 and L4 GLQF ORT register */ 3825 i40e_write_rx_ctl(&pf->hw, 3826 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3827 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3828 3, 1)); 3829 3830 i40e_write_rx_ctl(&pf->hw, 3831 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3832 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3833 3, 1)); 3834 } 3835 3836 /** 3837 * i40e_flow_str - Converts a flow_type into a human readable string 3838 * @fsp: the flow specification 3839 * 3840 * Currently only flow types we support are included here, and the string 3841 * value attempts to match what ethtool would use to configure this flow type. 3842 **/ 3843 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3844 { 3845 switch (fsp->flow_type & ~FLOW_EXT) { 3846 case TCP_V4_FLOW: 3847 return "tcp4"; 3848 case UDP_V4_FLOW: 3849 return "udp4"; 3850 case SCTP_V4_FLOW: 3851 return "sctp4"; 3852 case IP_USER_FLOW: 3853 return "ip4"; 3854 default: 3855 return "unknown"; 3856 } 3857 } 3858 3859 /** 3860 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3861 * @pit_index: PIT index to convert 3862 * 3863 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3864 * of range. 3865 **/ 3866 static u64 i40e_pit_index_to_mask(int pit_index) 3867 { 3868 switch (pit_index) { 3869 case 0: 3870 return I40E_FLEX_50_MASK; 3871 case 1: 3872 return I40E_FLEX_51_MASK; 3873 case 2: 3874 return I40E_FLEX_52_MASK; 3875 case 3: 3876 return I40E_FLEX_53_MASK; 3877 case 4: 3878 return I40E_FLEX_54_MASK; 3879 case 5: 3880 return I40E_FLEX_55_MASK; 3881 case 6: 3882 return I40E_FLEX_56_MASK; 3883 case 7: 3884 return I40E_FLEX_57_MASK; 3885 default: 3886 return 0; 3887 } 3888 } 3889 3890 /** 3891 * i40e_print_input_set - Show changes between two input sets 3892 * @vsi: the vsi being configured 3893 * @old: the old input set 3894 * @new: the new input set 3895 * 3896 * Print the difference between old and new input sets by showing which series 3897 * of words are toggled on or off. Only displays the bits we actually support 3898 * changing. 3899 **/ 3900 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3901 { 3902 struct i40e_pf *pf = vsi->back; 3903 bool old_value, new_value; 3904 int i; 3905 3906 old_value = !!(old & I40E_L3_SRC_MASK); 3907 new_value = !!(new & I40E_L3_SRC_MASK); 3908 if (old_value != new_value) 3909 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3910 old_value ? "ON" : "OFF", 3911 new_value ? "ON" : "OFF"); 3912 3913 old_value = !!(old & I40E_L3_DST_MASK); 3914 new_value = !!(new & I40E_L3_DST_MASK); 3915 if (old_value != new_value) 3916 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3917 old_value ? "ON" : "OFF", 3918 new_value ? "ON" : "OFF"); 3919 3920 old_value = !!(old & I40E_L4_SRC_MASK); 3921 new_value = !!(new & I40E_L4_SRC_MASK); 3922 if (old_value != new_value) 3923 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3924 old_value ? "ON" : "OFF", 3925 new_value ? "ON" : "OFF"); 3926 3927 old_value = !!(old & I40E_L4_DST_MASK); 3928 new_value = !!(new & I40E_L4_DST_MASK); 3929 if (old_value != new_value) 3930 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3931 old_value ? "ON" : "OFF", 3932 new_value ? "ON" : "OFF"); 3933 3934 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3935 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3936 if (old_value != new_value) 3937 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3938 old_value ? "ON" : "OFF", 3939 new_value ? "ON" : "OFF"); 3940 3941 /* Show change of flexible filter entries */ 3942 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3943 u64 flex_mask = i40e_pit_index_to_mask(i); 3944 3945 old_value = !!(old & flex_mask); 3946 new_value = !!(new & flex_mask); 3947 if (old_value != new_value) 3948 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3949 i, 3950 old_value ? "ON" : "OFF", 3951 new_value ? "ON" : "OFF"); 3952 } 3953 3954 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3955 old); 3956 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3957 new); 3958 } 3959 3960 /** 3961 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3962 * @vsi: pointer to the targeted VSI 3963 * @fsp: pointer to Rx flow specification 3964 * @userdef: userdefined data from flow specification 3965 * 3966 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3967 * for partial matches exists with a few limitations. First, hardware only 3968 * supports masking by word boundary (2 bytes) and not per individual bit. 3969 * Second, hardware is limited to using one mask for a flow type and cannot 3970 * use a separate mask for each filter. 3971 * 3972 * To support these limitations, if we already have a configured filter for 3973 * the specified type, this function enforces that new filters of the type 3974 * match the configured input set. Otherwise, if we do not have a filter of 3975 * the specified type, we allow the input set to be updated to match the 3976 * desired filter. 3977 * 3978 * To help ensure that administrators understand why filters weren't displayed 3979 * as supported, we print a diagnostic message displaying how the input set 3980 * would change and warning to delete the preexisting filters if required. 3981 * 3982 * Returns 0 on successful input set match, and a negative return code on 3983 * failure. 3984 **/ 3985 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3986 struct ethtool_rx_flow_spec *fsp, 3987 struct i40e_rx_flow_userdef *userdef) 3988 { 3989 struct i40e_pf *pf = vsi->back; 3990 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3991 struct ethtool_usrip4_spec *usr_ip4_spec; 3992 u64 current_mask, new_mask; 3993 bool new_flex_offset = false; 3994 bool flex_l3 = false; 3995 u16 *fdir_filter_count; 3996 u16 index, src_offset = 0; 3997 u8 pit_index = 0; 3998 int err; 3999 4000 switch (fsp->flow_type & ~FLOW_EXT) { 4001 case SCTP_V4_FLOW: 4002 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 4003 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 4004 break; 4005 case TCP_V4_FLOW: 4006 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 4007 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 4008 break; 4009 case UDP_V4_FLOW: 4010 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 4011 fdir_filter_count = &pf->fd_udp4_filter_cnt; 4012 break; 4013 case IP_USER_FLOW: 4014 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 4015 fdir_filter_count = &pf->fd_ip4_filter_cnt; 4016 flex_l3 = true; 4017 break; 4018 default: 4019 return -EOPNOTSUPP; 4020 } 4021 4022 /* Read the current input set from register memory. */ 4023 current_mask = i40e_read_fd_input_set(pf, index); 4024 new_mask = current_mask; 4025 4026 /* Determine, if any, the required changes to the input set in order 4027 * to support the provided mask. 4028 * 4029 * Hardware only supports masking at word (2 byte) granularity and does 4030 * not support full bitwise masking. This implementation simplifies 4031 * even further and only supports fully enabled or fully disabled 4032 * masks for each field, even though we could split the ip4src and 4033 * ip4dst fields. 4034 */ 4035 switch (fsp->flow_type & ~FLOW_EXT) { 4036 case SCTP_V4_FLOW: 4037 new_mask &= ~I40E_VERIFY_TAG_MASK; 4038 /* Fall through */ 4039 case TCP_V4_FLOW: 4040 case UDP_V4_FLOW: 4041 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 4042 4043 /* IPv4 source address */ 4044 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4045 new_mask |= I40E_L3_SRC_MASK; 4046 else if (!tcp_ip4_spec->ip4src) 4047 new_mask &= ~I40E_L3_SRC_MASK; 4048 else 4049 return -EOPNOTSUPP; 4050 4051 /* IPv4 destination address */ 4052 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4053 new_mask |= I40E_L3_DST_MASK; 4054 else if (!tcp_ip4_spec->ip4dst) 4055 new_mask &= ~I40E_L3_DST_MASK; 4056 else 4057 return -EOPNOTSUPP; 4058 4059 /* L4 source port */ 4060 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 4061 new_mask |= I40E_L4_SRC_MASK; 4062 else if (!tcp_ip4_spec->psrc) 4063 new_mask &= ~I40E_L4_SRC_MASK; 4064 else 4065 return -EOPNOTSUPP; 4066 4067 /* L4 destination port */ 4068 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 4069 new_mask |= I40E_L4_DST_MASK; 4070 else if (!tcp_ip4_spec->pdst) 4071 new_mask &= ~I40E_L4_DST_MASK; 4072 else 4073 return -EOPNOTSUPP; 4074 4075 /* Filtering on Type of Service is not supported. */ 4076 if (tcp_ip4_spec->tos) 4077 return -EOPNOTSUPP; 4078 4079 break; 4080 case IP_USER_FLOW: 4081 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 4082 4083 /* IPv4 source address */ 4084 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4085 new_mask |= I40E_L3_SRC_MASK; 4086 else if (!usr_ip4_spec->ip4src) 4087 new_mask &= ~I40E_L3_SRC_MASK; 4088 else 4089 return -EOPNOTSUPP; 4090 4091 /* IPv4 destination address */ 4092 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4093 new_mask |= I40E_L3_DST_MASK; 4094 else if (!usr_ip4_spec->ip4dst) 4095 new_mask &= ~I40E_L3_DST_MASK; 4096 else 4097 return -EOPNOTSUPP; 4098 4099 /* First 4 bytes of L4 header */ 4100 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 4101 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 4102 else if (!usr_ip4_spec->l4_4_bytes) 4103 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 4104 else 4105 return -EOPNOTSUPP; 4106 4107 /* Filtering on Type of Service is not supported. */ 4108 if (usr_ip4_spec->tos) 4109 return -EOPNOTSUPP; 4110 4111 /* Filtering on IP version is not supported */ 4112 if (usr_ip4_spec->ip_ver) 4113 return -EINVAL; 4114 4115 /* Filtering on L4 protocol is not supported */ 4116 if (usr_ip4_spec->proto) 4117 return -EINVAL; 4118 4119 break; 4120 default: 4121 return -EOPNOTSUPP; 4122 } 4123 4124 /* First, clear all flexible filter entries */ 4125 new_mask &= ~I40E_FLEX_INPUT_MASK; 4126 4127 /* If we have a flexible filter, try to add this offset to the correct 4128 * flexible filter PIT list. Once finished, we can update the mask. 4129 * If the src_offset changed, we will get a new mask value which will 4130 * trigger an input set change. 4131 */ 4132 if (userdef->flex_filter) { 4133 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 4134 4135 /* Flexible offset must be even, since the flexible payload 4136 * must be aligned on 2-byte boundary. 4137 */ 4138 if (userdef->flex_offset & 0x1) { 4139 dev_warn(&pf->pdev->dev, 4140 "Flexible data offset must be 2-byte aligned\n"); 4141 return -EINVAL; 4142 } 4143 4144 src_offset = userdef->flex_offset >> 1; 4145 4146 /* FLX_PIT source offset value is only so large */ 4147 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 4148 dev_warn(&pf->pdev->dev, 4149 "Flexible data must reside within first 64 bytes of the packet payload\n"); 4150 return -EINVAL; 4151 } 4152 4153 /* See if this offset has already been programmed. If we get 4154 * an ERR_PTR, then the filter is not safe to add. Otherwise, 4155 * if we get a NULL pointer, this means we will need to add 4156 * the offset. 4157 */ 4158 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 4159 src_offset); 4160 if (IS_ERR(flex_pit)) 4161 return PTR_ERR(flex_pit); 4162 4163 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 4164 * packet types, and thus we need to program both L3 and L4 4165 * flexible values. These must have identical flexible index, 4166 * as otherwise we can't correctly program the input set. So 4167 * we'll find both an L3 and L4 index and make sure they are 4168 * the same. 4169 */ 4170 if (flex_l3) { 4171 l3_flex_pit = 4172 i40e_find_flex_offset(&pf->l3_flex_pit_list, 4173 src_offset); 4174 if (IS_ERR(l3_flex_pit)) 4175 return PTR_ERR(l3_flex_pit); 4176 4177 if (flex_pit) { 4178 /* If we already had a matching L4 entry, we 4179 * need to make sure that the L3 entry we 4180 * obtained uses the same index. 4181 */ 4182 if (l3_flex_pit) { 4183 if (l3_flex_pit->pit_index != 4184 flex_pit->pit_index) { 4185 return -EINVAL; 4186 } 4187 } else { 4188 new_flex_offset = true; 4189 } 4190 } else { 4191 flex_pit = l3_flex_pit; 4192 } 4193 } 4194 4195 /* If we didn't find an existing flex offset, we need to 4196 * program a new one. However, we don't immediately program it 4197 * here because we will wait to program until after we check 4198 * that it is safe to change the input set. 4199 */ 4200 if (!flex_pit) { 4201 new_flex_offset = true; 4202 pit_index = i40e_unused_pit_index(pf); 4203 } else { 4204 pit_index = flex_pit->pit_index; 4205 } 4206 4207 /* Update the mask with the new offset */ 4208 new_mask |= i40e_pit_index_to_mask(pit_index); 4209 } 4210 4211 /* If the mask and flexible filter offsets for this filter match the 4212 * currently programmed values we don't need any input set change, so 4213 * this filter is safe to install. 4214 */ 4215 if (new_mask == current_mask && !new_flex_offset) 4216 return 0; 4217 4218 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4219 i40e_flow_str(fsp)); 4220 i40e_print_input_set(vsi, current_mask, new_mask); 4221 if (new_flex_offset) { 4222 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4223 pit_index, src_offset); 4224 } 4225 4226 /* Hardware input sets are global across multiple ports, so even the 4227 * main port cannot change them when in MFP mode as this would impact 4228 * any filters on the other ports. 4229 */ 4230 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4231 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4232 return -EOPNOTSUPP; 4233 } 4234 4235 /* This filter requires us to update the input set. However, hardware 4236 * only supports one input set per flow type, and does not support 4237 * separate masks for each filter. This means that we can only support 4238 * a single mask for all filters of a specific type. 4239 * 4240 * If we have preexisting filters, they obviously depend on the 4241 * current programmed input set. Display a diagnostic message in this 4242 * case explaining why the filter could not be accepted. 4243 */ 4244 if (*fdir_filter_count) { 4245 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4246 i40e_flow_str(fsp), 4247 *fdir_filter_count); 4248 return -EOPNOTSUPP; 4249 } 4250 4251 i40e_write_fd_input_set(pf, index, new_mask); 4252 4253 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4254 * frames. If we're programming the input set for IPv4/Other, we also 4255 * need to program the IPv4/Fragmented input set. Since we don't have 4256 * separate support, we'll always assume and enforce that the two flow 4257 * types must have matching input sets. 4258 */ 4259 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4260 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4261 new_mask); 4262 4263 /* Add the new offset and update table, if necessary */ 4264 if (new_flex_offset) { 4265 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4266 pit_index); 4267 if (err) 4268 return err; 4269 4270 if (flex_l3) { 4271 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4272 src_offset, 4273 pit_index); 4274 if (err) 4275 return err; 4276 } 4277 4278 i40e_reprogram_flex_pit(pf); 4279 } 4280 4281 return 0; 4282 } 4283 4284 /** 4285 * i40e_match_fdir_filter - Return true of two filters match 4286 * @a: pointer to filter struct 4287 * @b: pointer to filter struct 4288 * 4289 * Returns true if the two filters match exactly the same criteria. I.e. they 4290 * match the same flow type and have the same parameters. We don't need to 4291 * check any input-set since all filters of the same flow type must use the 4292 * same input set. 4293 **/ 4294 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4295 struct i40e_fdir_filter *b) 4296 { 4297 /* The filters do not much if any of these criteria differ. */ 4298 if (a->dst_ip != b->dst_ip || 4299 a->src_ip != b->src_ip || 4300 a->dst_port != b->dst_port || 4301 a->src_port != b->src_port || 4302 a->flow_type != b->flow_type || 4303 a->ip4_proto != b->ip4_proto) 4304 return false; 4305 4306 return true; 4307 } 4308 4309 /** 4310 * i40e_disallow_matching_filters - Check that new filters differ 4311 * @vsi: pointer to the targeted VSI 4312 * @input: new filter to check 4313 * 4314 * Due to hardware limitations, it is not possible for two filters that match 4315 * similar criteria to be programmed at the same time. This is true for a few 4316 * reasons: 4317 * 4318 * (a) all filters matching a particular flow type must use the same input 4319 * set, that is they must match the same criteria. 4320 * (b) different flow types will never match the same packet, as the flow type 4321 * is decided by hardware before checking which rules apply. 4322 * (c) hardware has no way to distinguish which order filters apply in. 4323 * 4324 * Due to this, we can't really support using the location data to order 4325 * filters in the hardware parsing. It is technically possible for the user to 4326 * request two filters matching the same criteria but which select different 4327 * queues. In this case, rather than keep both filters in the list, we reject 4328 * the 2nd filter when the user requests adding it. 4329 * 4330 * This avoids needing to track location for programming the filter to 4331 * hardware, and ensures that we avoid some strange scenarios involving 4332 * deleting filters which match the same criteria. 4333 **/ 4334 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4335 struct i40e_fdir_filter *input) 4336 { 4337 struct i40e_pf *pf = vsi->back; 4338 struct i40e_fdir_filter *rule; 4339 struct hlist_node *node2; 4340 4341 /* Loop through every filter, and check that it doesn't match */ 4342 hlist_for_each_entry_safe(rule, node2, 4343 &pf->fdir_filter_list, fdir_node) { 4344 /* Don't check the filters match if they share the same fd_id, 4345 * since the new filter is actually just updating the target 4346 * of the old filter. 4347 */ 4348 if (rule->fd_id == input->fd_id) 4349 continue; 4350 4351 /* If any filters match, then print a warning message to the 4352 * kernel message buffer and bail out. 4353 */ 4354 if (i40e_match_fdir_filter(rule, input)) { 4355 dev_warn(&pf->pdev->dev, 4356 "Existing user defined filter %d already matches this flow.\n", 4357 rule->fd_id); 4358 return -EINVAL; 4359 } 4360 } 4361 4362 return 0; 4363 } 4364 4365 /** 4366 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4367 * @vsi: pointer to the targeted VSI 4368 * @cmd: command to get or set RX flow classification rules 4369 * 4370 * Add Flow Director filters for a specific flow spec based on their 4371 * protocol. Returns 0 if the filters were successfully added. 4372 **/ 4373 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4374 struct ethtool_rxnfc *cmd) 4375 { 4376 struct i40e_rx_flow_userdef userdef; 4377 struct ethtool_rx_flow_spec *fsp; 4378 struct i40e_fdir_filter *input; 4379 u16 dest_vsi = 0, q_index = 0; 4380 struct i40e_pf *pf; 4381 int ret = -EINVAL; 4382 u8 dest_ctl; 4383 4384 if (!vsi) 4385 return -EINVAL; 4386 pf = vsi->back; 4387 4388 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4389 return -EOPNOTSUPP; 4390 4391 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4392 return -ENOSPC; 4393 4394 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4395 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4396 return -EBUSY; 4397 4398 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4399 return -EBUSY; 4400 4401 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4402 4403 /* Parse the user-defined field */ 4404 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4405 return -EINVAL; 4406 4407 /* Extended MAC field is not supported */ 4408 if (fsp->flow_type & FLOW_MAC_EXT) 4409 return -EINVAL; 4410 4411 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4412 if (ret) 4413 return ret; 4414 4415 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4416 pf->hw.func_caps.fd_filters_guaranteed)) { 4417 return -EINVAL; 4418 } 4419 4420 /* ring_cookie is either the drop index, or is a mask of the queue 4421 * index and VF id we wish to target. 4422 */ 4423 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4424 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4425 } else { 4426 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4427 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4428 4429 if (!vf) { 4430 if (ring >= vsi->num_queue_pairs) 4431 return -EINVAL; 4432 dest_vsi = vsi->id; 4433 } else { 4434 /* VFs are zero-indexed, so we subtract one here */ 4435 vf--; 4436 4437 if (vf >= pf->num_alloc_vfs) 4438 return -EINVAL; 4439 if (ring >= pf->vf[vf].num_queue_pairs) 4440 return -EINVAL; 4441 dest_vsi = pf->vf[vf].lan_vsi_id; 4442 } 4443 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4444 q_index = ring; 4445 } 4446 4447 input = kzalloc(sizeof(*input), GFP_KERNEL); 4448 4449 if (!input) 4450 return -ENOMEM; 4451 4452 input->fd_id = fsp->location; 4453 input->q_index = q_index; 4454 input->dest_vsi = dest_vsi; 4455 input->dest_ctl = dest_ctl; 4456 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4457 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4458 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4459 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4460 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4461 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4462 4463 /* Reverse the src and dest notion, since the HW expects them to be from 4464 * Tx perspective where as the input from user is from Rx filter view. 4465 */ 4466 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4467 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4468 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4469 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4470 4471 if (userdef.flex_filter) { 4472 input->flex_filter = true; 4473 input->flex_word = cpu_to_be16(userdef.flex_word); 4474 input->flex_offset = userdef.flex_offset; 4475 } 4476 4477 /* Avoid programming two filters with identical match criteria. */ 4478 ret = i40e_disallow_matching_filters(vsi, input); 4479 if (ret) 4480 goto free_filter_memory; 4481 4482 /* Add the input filter to the fdir_input_list, possibly replacing 4483 * a previous filter. Do not free the input structure after adding it 4484 * to the list as this would cause a use-after-free bug. 4485 */ 4486 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4487 ret = i40e_add_del_fdir(vsi, input, true); 4488 if (ret) 4489 goto remove_sw_rule; 4490 return 0; 4491 4492 remove_sw_rule: 4493 hlist_del(&input->fdir_node); 4494 pf->fdir_pf_active_filters--; 4495 free_filter_memory: 4496 kfree(input); 4497 return ret; 4498 } 4499 4500 /** 4501 * i40e_set_rxnfc - command to set RX flow classification rules 4502 * @netdev: network interface device structure 4503 * @cmd: ethtool rxnfc command 4504 * 4505 * Returns Success if the command is supported. 4506 **/ 4507 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4508 { 4509 struct i40e_netdev_priv *np = netdev_priv(netdev); 4510 struct i40e_vsi *vsi = np->vsi; 4511 struct i40e_pf *pf = vsi->back; 4512 int ret = -EOPNOTSUPP; 4513 4514 switch (cmd->cmd) { 4515 case ETHTOOL_SRXFH: 4516 ret = i40e_set_rss_hash_opt(pf, cmd); 4517 break; 4518 case ETHTOOL_SRXCLSRLINS: 4519 ret = i40e_add_fdir_ethtool(vsi, cmd); 4520 break; 4521 case ETHTOOL_SRXCLSRLDEL: 4522 ret = i40e_del_fdir_entry(vsi, cmd); 4523 break; 4524 default: 4525 break; 4526 } 4527 4528 return ret; 4529 } 4530 4531 /** 4532 * i40e_max_channels - get Max number of combined channels supported 4533 * @vsi: vsi pointer 4534 **/ 4535 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4536 { 4537 /* TODO: This code assumes DCB and FD is disabled for now. */ 4538 return vsi->alloc_queue_pairs; 4539 } 4540 4541 /** 4542 * i40e_get_channels - Get the current channels enabled and max supported etc. 4543 * @dev: network interface device structure 4544 * @ch: ethtool channels structure 4545 * 4546 * We don't support separate tx and rx queues as channels. The other count 4547 * represents how many queues are being used for control. max_combined counts 4548 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4549 * q_vectors since we support a lot more queue pairs than q_vectors. 4550 **/ 4551 static void i40e_get_channels(struct net_device *dev, 4552 struct ethtool_channels *ch) 4553 { 4554 struct i40e_netdev_priv *np = netdev_priv(dev); 4555 struct i40e_vsi *vsi = np->vsi; 4556 struct i40e_pf *pf = vsi->back; 4557 4558 /* report maximum channels */ 4559 ch->max_combined = i40e_max_channels(vsi); 4560 4561 /* report info for other vector */ 4562 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4563 ch->max_other = ch->other_count; 4564 4565 /* Note: This code assumes DCB is disabled for now. */ 4566 ch->combined_count = vsi->num_queue_pairs; 4567 } 4568 4569 /** 4570 * i40e_set_channels - Set the new channels count. 4571 * @dev: network interface device structure 4572 * @ch: ethtool channels structure 4573 * 4574 * The new channels count may not be the same as requested by the user 4575 * since it gets rounded down to a power of 2 value. 4576 **/ 4577 static int i40e_set_channels(struct net_device *dev, 4578 struct ethtool_channels *ch) 4579 { 4580 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4581 struct i40e_netdev_priv *np = netdev_priv(dev); 4582 unsigned int count = ch->combined_count; 4583 struct i40e_vsi *vsi = np->vsi; 4584 struct i40e_pf *pf = vsi->back; 4585 struct i40e_fdir_filter *rule; 4586 struct hlist_node *node2; 4587 int new_count; 4588 int err = 0; 4589 4590 /* We do not support setting channels for any other VSI at present */ 4591 if (vsi->type != I40E_VSI_MAIN) 4592 return -EINVAL; 4593 4594 /* We do not support setting channels via ethtool when TCs are 4595 * configured through mqprio 4596 */ 4597 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4598 return -EINVAL; 4599 4600 /* verify they are not requesting separate vectors */ 4601 if (!count || ch->rx_count || ch->tx_count) 4602 return -EINVAL; 4603 4604 /* verify other_count has not changed */ 4605 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4606 return -EINVAL; 4607 4608 /* verify the number of channels does not exceed hardware limits */ 4609 if (count > i40e_max_channels(vsi)) 4610 return -EINVAL; 4611 4612 /* verify that the number of channels does not invalidate any current 4613 * flow director rules 4614 */ 4615 hlist_for_each_entry_safe(rule, node2, 4616 &pf->fdir_filter_list, fdir_node) { 4617 if (rule->dest_ctl != drop && count <= rule->q_index) { 4618 dev_warn(&pf->pdev->dev, 4619 "Existing user defined filter %d assigns flow to queue %d\n", 4620 rule->fd_id, rule->q_index); 4621 err = -EINVAL; 4622 } 4623 } 4624 4625 if (err) { 4626 dev_err(&pf->pdev->dev, 4627 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4628 count); 4629 return err; 4630 } 4631 4632 /* update feature limits from largest to smallest supported values */ 4633 /* TODO: Flow director limit, DCB etc */ 4634 4635 /* use rss_reconfig to rebuild with new queue count and update traffic 4636 * class queue mapping 4637 */ 4638 new_count = i40e_reconfig_rss_queues(pf, count); 4639 if (new_count > 0) 4640 return 0; 4641 else 4642 return -EINVAL; 4643 } 4644 4645 /** 4646 * i40e_get_rxfh_key_size - get the RSS hash key size 4647 * @netdev: network interface device structure 4648 * 4649 * Returns the table size. 4650 **/ 4651 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4652 { 4653 return I40E_HKEY_ARRAY_SIZE; 4654 } 4655 4656 /** 4657 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4658 * @netdev: network interface device structure 4659 * 4660 * Returns the table size. 4661 **/ 4662 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4663 { 4664 return I40E_HLUT_ARRAY_SIZE; 4665 } 4666 4667 /** 4668 * i40e_get_rxfh - get the rx flow hash indirection table 4669 * @netdev: network interface device structure 4670 * @indir: indirection table 4671 * @key: hash key 4672 * @hfunc: hash function 4673 * 4674 * Reads the indirection table directly from the hardware. Returns 0 on 4675 * success. 4676 **/ 4677 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4678 u8 *hfunc) 4679 { 4680 struct i40e_netdev_priv *np = netdev_priv(netdev); 4681 struct i40e_vsi *vsi = np->vsi; 4682 u8 *lut, *seed = NULL; 4683 int ret; 4684 u16 i; 4685 4686 if (hfunc) 4687 *hfunc = ETH_RSS_HASH_TOP; 4688 4689 if (!indir) 4690 return 0; 4691 4692 seed = key; 4693 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4694 if (!lut) 4695 return -ENOMEM; 4696 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4697 if (ret) 4698 goto out; 4699 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4700 indir[i] = (u32)(lut[i]); 4701 4702 out: 4703 kfree(lut); 4704 4705 return ret; 4706 } 4707 4708 /** 4709 * i40e_set_rxfh - set the rx flow hash indirection table 4710 * @netdev: network interface device structure 4711 * @indir: indirection table 4712 * @key: hash key 4713 * @hfunc: hash function to use 4714 * 4715 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4716 * returns 0 after programming the table. 4717 **/ 4718 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4719 const u8 *key, const u8 hfunc) 4720 { 4721 struct i40e_netdev_priv *np = netdev_priv(netdev); 4722 struct i40e_vsi *vsi = np->vsi; 4723 struct i40e_pf *pf = vsi->back; 4724 u8 *seed = NULL; 4725 u16 i; 4726 4727 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4728 return -EOPNOTSUPP; 4729 4730 if (key) { 4731 if (!vsi->rss_hkey_user) { 4732 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4733 GFP_KERNEL); 4734 if (!vsi->rss_hkey_user) 4735 return -ENOMEM; 4736 } 4737 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4738 seed = vsi->rss_hkey_user; 4739 } 4740 if (!vsi->rss_lut_user) { 4741 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4742 if (!vsi->rss_lut_user) 4743 return -ENOMEM; 4744 } 4745 4746 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4747 if (indir) 4748 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4749 vsi->rss_lut_user[i] = (u8)(indir[i]); 4750 else 4751 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4752 vsi->rss_size); 4753 4754 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4755 I40E_HLUT_ARRAY_SIZE); 4756 } 4757 4758 /** 4759 * i40e_get_priv_flags - report device private flags 4760 * @dev: network interface device structure 4761 * 4762 * The get string set count and the string set should be matched for each 4763 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4764 * array. 4765 * 4766 * Returns a u32 bitmap of flags. 4767 **/ 4768 static u32 i40e_get_priv_flags(struct net_device *dev) 4769 { 4770 struct i40e_netdev_priv *np = netdev_priv(dev); 4771 struct i40e_vsi *vsi = np->vsi; 4772 struct i40e_pf *pf = vsi->back; 4773 u32 i, j, ret_flags = 0; 4774 4775 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4776 const struct i40e_priv_flags *priv_flags; 4777 4778 priv_flags = &i40e_gstrings_priv_flags[i]; 4779 4780 if (priv_flags->flag & pf->flags) 4781 ret_flags |= BIT(i); 4782 } 4783 4784 if (pf->hw.pf_id != 0) 4785 return ret_flags; 4786 4787 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4788 const struct i40e_priv_flags *priv_flags; 4789 4790 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4791 4792 if (priv_flags->flag & pf->flags) 4793 ret_flags |= BIT(i + j); 4794 } 4795 4796 return ret_flags; 4797 } 4798 4799 /** 4800 * i40e_set_priv_flags - set private flags 4801 * @dev: network interface device structure 4802 * @flags: bit flags to be set 4803 **/ 4804 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4805 { 4806 struct i40e_netdev_priv *np = netdev_priv(dev); 4807 struct i40e_vsi *vsi = np->vsi; 4808 struct i40e_pf *pf = vsi->back; 4809 u64 orig_flags, new_flags, changed_flags; 4810 u32 i, j; 4811 4812 orig_flags = READ_ONCE(pf->flags); 4813 new_flags = orig_flags; 4814 4815 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4816 const struct i40e_priv_flags *priv_flags; 4817 4818 priv_flags = &i40e_gstrings_priv_flags[i]; 4819 4820 if (flags & BIT(i)) 4821 new_flags |= priv_flags->flag; 4822 else 4823 new_flags &= ~(priv_flags->flag); 4824 4825 /* If this is a read-only flag, it can't be changed */ 4826 if (priv_flags->read_only && 4827 ((orig_flags ^ new_flags) & ~BIT(i))) 4828 return -EOPNOTSUPP; 4829 } 4830 4831 if (pf->hw.pf_id != 0) 4832 goto flags_complete; 4833 4834 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4835 const struct i40e_priv_flags *priv_flags; 4836 4837 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4838 4839 if (flags & BIT(i + j)) 4840 new_flags |= priv_flags->flag; 4841 else 4842 new_flags &= ~(priv_flags->flag); 4843 4844 /* If this is a read-only flag, it can't be changed */ 4845 if (priv_flags->read_only && 4846 ((orig_flags ^ new_flags) & ~BIT(i))) 4847 return -EOPNOTSUPP; 4848 } 4849 4850 flags_complete: 4851 changed_flags = orig_flags ^ new_flags; 4852 4853 /* Before we finalize any flag changes, we need to perform some 4854 * checks to ensure that the changes are supported and safe. 4855 */ 4856 4857 /* ATR eviction is not supported on all devices */ 4858 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4859 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4860 return -EOPNOTSUPP; 4861 4862 /* If the driver detected FW LLDP was disabled on init, this flag could 4863 * be set, however we do not support _changing_ the flag: 4864 * - on XL710 if NPAR is enabled or FW API version < 1.7 4865 * - on X722 with FW API version < 1.6 4866 * There are situations where older FW versions/NPAR enabled PFs could 4867 * disable LLDP, however we _must_ not allow the user to enable/disable 4868 * LLDP with this flag on unsupported FW versions. 4869 */ 4870 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4871 if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) { 4872 dev_warn(&pf->pdev->dev, 4873 "Device does not support changing FW LLDP\n"); 4874 return -EOPNOTSUPP; 4875 } 4876 } 4877 4878 if (((changed_flags & I40E_FLAG_RS_FEC) || 4879 (changed_flags & I40E_FLAG_BASE_R_FEC)) && 4880 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 4881 pf->hw.device_id != I40E_DEV_ID_25G_B) { 4882 dev_warn(&pf->pdev->dev, 4883 "Device does not support changing FEC configuration\n"); 4884 return -EOPNOTSUPP; 4885 } 4886 4887 /* Now that we've checked to ensure that the new flags are valid, load 4888 * them into place. Since we only modify flags either (a) during 4889 * initialization or (b) while holding the RTNL lock, we don't need 4890 * anything fancy here. 4891 */ 4892 pf->flags = new_flags; 4893 4894 /* Process any additional changes needed as a result of flag changes. 4895 * The changed_flags value reflects the list of bits that were 4896 * changed in the code above. 4897 */ 4898 4899 /* Flush current ATR settings if ATR was disabled */ 4900 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4901 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4902 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4903 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4904 } 4905 4906 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4907 u16 sw_flags = 0, valid_flags = 0; 4908 int ret; 4909 4910 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4911 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4912 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4913 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4914 0, NULL); 4915 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4916 dev_info(&pf->pdev->dev, 4917 "couldn't set switch config bits, err %s aq_err %s\n", 4918 i40e_stat_str(&pf->hw, ret), 4919 i40e_aq_str(&pf->hw, 4920 pf->hw.aq.asq_last_status)); 4921 /* not a fatal problem, just keep going */ 4922 } 4923 } 4924 4925 if ((changed_flags & I40E_FLAG_RS_FEC) || 4926 (changed_flags & I40E_FLAG_BASE_R_FEC)) { 4927 u8 fec_cfg = 0; 4928 4929 if (pf->flags & I40E_FLAG_RS_FEC && 4930 pf->flags & I40E_FLAG_BASE_R_FEC) { 4931 fec_cfg = I40E_AQ_SET_FEC_AUTO; 4932 } else if (pf->flags & I40E_FLAG_RS_FEC) { 4933 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 4934 I40E_AQ_SET_FEC_ABILITY_RS); 4935 } else if (pf->flags & I40E_FLAG_BASE_R_FEC) { 4936 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 4937 I40E_AQ_SET_FEC_ABILITY_KR); 4938 } 4939 if (i40e_set_fec_cfg(dev, fec_cfg)) 4940 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n"); 4941 } 4942 4943 if ((changed_flags & pf->flags & 4944 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4945 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4946 dev_warn(&pf->pdev->dev, 4947 "Turning on link-down-on-close flag may affect other partitions\n"); 4948 4949 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4950 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4951 struct i40e_dcbx_config *dcbcfg; 4952 4953 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4954 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4955 /* reset local_dcbx_config to default */ 4956 dcbcfg = &pf->hw.local_dcbx_config; 4957 dcbcfg->etscfg.willing = 1; 4958 dcbcfg->etscfg.maxtcs = 0; 4959 dcbcfg->etscfg.tcbwtable[0] = 100; 4960 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4961 dcbcfg->etscfg.tcbwtable[i] = 0; 4962 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4963 dcbcfg->etscfg.prioritytable[i] = 0; 4964 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4965 dcbcfg->pfc.willing = 1; 4966 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4967 } else { 4968 i40e_aq_start_lldp(&pf->hw, NULL); 4969 } 4970 } 4971 4972 /* Issue reset to cause things to take effect, as additional bits 4973 * are added we will need to create a mask of bits requiring reset 4974 */ 4975 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4976 I40E_FLAG_LEGACY_RX | 4977 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4978 I40E_FLAG_DISABLE_FW_LLDP)) 4979 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4980 4981 return 0; 4982 } 4983 4984 /** 4985 * i40e_get_module_info - get (Q)SFP+ module type info 4986 * @netdev: network interface device structure 4987 * @modinfo: module EEPROM size and layout information structure 4988 **/ 4989 static int i40e_get_module_info(struct net_device *netdev, 4990 struct ethtool_modinfo *modinfo) 4991 { 4992 struct i40e_netdev_priv *np = netdev_priv(netdev); 4993 struct i40e_vsi *vsi = np->vsi; 4994 struct i40e_pf *pf = vsi->back; 4995 struct i40e_hw *hw = &pf->hw; 4996 u32 sff8472_comp = 0; 4997 u32 sff8472_swap = 0; 4998 u32 sff8636_rev = 0; 4999 i40e_status status; 5000 u32 type = 0; 5001 5002 /* Check if firmware supports reading module EEPROM. */ 5003 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 5004 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 5005 return -EINVAL; 5006 } 5007 5008 status = i40e_update_link_info(hw); 5009 if (status) 5010 return -EIO; 5011 5012 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 5013 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 5014 return -EINVAL; 5015 } 5016 5017 type = hw->phy.link_info.module_type[0]; 5018 5019 switch (type) { 5020 case I40E_MODULE_TYPE_SFP: 5021 status = i40e_aq_get_phy_register(hw, 5022 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5023 I40E_I2C_EEPROM_DEV_ADDR, 5024 I40E_MODULE_SFF_8472_COMP, 5025 &sff8472_comp, NULL); 5026 if (status) 5027 return -EIO; 5028 5029 status = i40e_aq_get_phy_register(hw, 5030 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5031 I40E_I2C_EEPROM_DEV_ADDR, 5032 I40E_MODULE_SFF_8472_SWAP, 5033 &sff8472_swap, NULL); 5034 if (status) 5035 return -EIO; 5036 5037 /* Check if the module requires address swap to access 5038 * the other EEPROM memory page. 5039 */ 5040 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 5041 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 5042 modinfo->type = ETH_MODULE_SFF_8079; 5043 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5044 } else if (sff8472_comp == 0x00) { 5045 /* Module is not SFF-8472 compliant */ 5046 modinfo->type = ETH_MODULE_SFF_8079; 5047 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5048 } else { 5049 modinfo->type = ETH_MODULE_SFF_8472; 5050 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 5051 } 5052 break; 5053 case I40E_MODULE_TYPE_QSFP_PLUS: 5054 /* Read from memory page 0. */ 5055 status = i40e_aq_get_phy_register(hw, 5056 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5057 0, 5058 I40E_MODULE_REVISION_ADDR, 5059 &sff8636_rev, NULL); 5060 if (status) 5061 return -EIO; 5062 /* Determine revision compliance byte */ 5063 if (sff8636_rev > 0x02) { 5064 /* Module is SFF-8636 compliant */ 5065 modinfo->type = ETH_MODULE_SFF_8636; 5066 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5067 } else { 5068 modinfo->type = ETH_MODULE_SFF_8436; 5069 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5070 } 5071 break; 5072 case I40E_MODULE_TYPE_QSFP28: 5073 modinfo->type = ETH_MODULE_SFF_8636; 5074 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5075 break; 5076 default: 5077 netdev_err(vsi->netdev, "Module type unrecognized\n"); 5078 return -EINVAL; 5079 } 5080 return 0; 5081 } 5082 5083 /** 5084 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 5085 * @netdev: network interface device structure 5086 * @ee: EEPROM dump request structure 5087 * @data: buffer to be filled with EEPROM contents 5088 **/ 5089 static int i40e_get_module_eeprom(struct net_device *netdev, 5090 struct ethtool_eeprom *ee, 5091 u8 *data) 5092 { 5093 struct i40e_netdev_priv *np = netdev_priv(netdev); 5094 struct i40e_vsi *vsi = np->vsi; 5095 struct i40e_pf *pf = vsi->back; 5096 struct i40e_hw *hw = &pf->hw; 5097 bool is_sfp = false; 5098 i40e_status status; 5099 u32 value = 0; 5100 int i; 5101 5102 if (!ee || !ee->len || !data) 5103 return -EINVAL; 5104 5105 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 5106 is_sfp = true; 5107 5108 for (i = 0; i < ee->len; i++) { 5109 u32 offset = i + ee->offset; 5110 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 5111 5112 /* Check if we need to access the other memory page */ 5113 if (is_sfp) { 5114 if (offset >= ETH_MODULE_SFF_8079_LEN) { 5115 offset -= ETH_MODULE_SFF_8079_LEN; 5116 addr = I40E_I2C_EEPROM_DEV_ADDR2; 5117 } 5118 } else { 5119 while (offset >= ETH_MODULE_SFF_8436_LEN) { 5120 /* Compute memory page number and offset. */ 5121 offset -= ETH_MODULE_SFF_8436_LEN / 2; 5122 addr++; 5123 } 5124 } 5125 5126 status = i40e_aq_get_phy_register(hw, 5127 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5128 addr, offset, &value, NULL); 5129 if (status) 5130 return -EIO; 5131 data[i] = value; 5132 } 5133 return 0; 5134 } 5135 5136 static const struct ethtool_ops i40e_ethtool_ops = { 5137 .get_drvinfo = i40e_get_drvinfo, 5138 .get_regs_len = i40e_get_regs_len, 5139 .get_regs = i40e_get_regs, 5140 .nway_reset = i40e_nway_reset, 5141 .get_link = ethtool_op_get_link, 5142 .get_wol = i40e_get_wol, 5143 .set_wol = i40e_set_wol, 5144 .set_eeprom = i40e_set_eeprom, 5145 .get_eeprom_len = i40e_get_eeprom_len, 5146 .get_eeprom = i40e_get_eeprom, 5147 .get_ringparam = i40e_get_ringparam, 5148 .set_ringparam = i40e_set_ringparam, 5149 .get_pauseparam = i40e_get_pauseparam, 5150 .set_pauseparam = i40e_set_pauseparam, 5151 .get_msglevel = i40e_get_msglevel, 5152 .set_msglevel = i40e_set_msglevel, 5153 .get_rxnfc = i40e_get_rxnfc, 5154 .set_rxnfc = i40e_set_rxnfc, 5155 .self_test = i40e_diag_test, 5156 .get_strings = i40e_get_strings, 5157 .set_phys_id = i40e_set_phys_id, 5158 .get_sset_count = i40e_get_sset_count, 5159 .get_ethtool_stats = i40e_get_ethtool_stats, 5160 .get_coalesce = i40e_get_coalesce, 5161 .set_coalesce = i40e_set_coalesce, 5162 .get_rxfh_key_size = i40e_get_rxfh_key_size, 5163 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 5164 .get_rxfh = i40e_get_rxfh, 5165 .set_rxfh = i40e_set_rxfh, 5166 .get_channels = i40e_get_channels, 5167 .set_channels = i40e_set_channels, 5168 .get_module_info = i40e_get_module_info, 5169 .get_module_eeprom = i40e_get_module_eeprom, 5170 .get_ts_info = i40e_get_ts_info, 5171 .get_priv_flags = i40e_get_priv_flags, 5172 .set_priv_flags = i40e_set_priv_flags, 5173 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 5174 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 5175 .get_link_ksettings = i40e_get_link_ksettings, 5176 .set_link_ksettings = i40e_set_link_ksettings, 5177 .get_fecparam = i40e_get_fec_param, 5178 .set_fecparam = i40e_set_fec_param, 5179 .flash_device = i40e_ddp_flash, 5180 }; 5181 5182 void i40e_set_ethtool_ops(struct net_device *netdev) 5183 { 5184 netdev->ethtool_ops = &i40e_ethtool_ops; 5185 } 5186