1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 10 /* ethtool statistics helpers */ 11 12 /** 13 * struct i40e_stats - definition for an ethtool statistic 14 * @stat_string: statistic name to display in ethtool -S output 15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 16 * @stat_offset: offsetof() the stat from a base pointer 17 * 18 * This structure defines a statistic to be added to the ethtool stats buffer. 19 * It defines a statistic as offset from a common base pointer. Stats should 20 * be defined in constant arrays using the I40E_STAT macro, with every element 21 * of the array using the same _type for calculating the sizeof_stat and 22 * stat_offset. 23 * 24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 26 * the i40e_add_ethtool_stat() helper function. 27 * 28 * The @stat_string is interpreted as a format string, allowing formatted 29 * values to be inserted while looping over multiple structures for a given 30 * statistics array. Thus, every statistic string in an array should have the 31 * same type and number of format specifiers, to be formatted by variadic 32 * arguments to the i40e_add_stat_string() helper function. 33 **/ 34 struct i40e_stats { 35 char stat_string[ETH_GSTRING_LEN]; 36 int sizeof_stat; 37 int stat_offset; 38 }; 39 40 /* Helper macro to define an i40e_stat structure with proper size and type. 41 * Use this when defining constant statistics arrays. Note that @_type expects 42 * only a type name and is used multiple times. 43 */ 44 #define I40E_STAT(_type, _name, _stat) { \ 45 .stat_string = _name, \ 46 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 47 .stat_offset = offsetof(_type, _stat) \ 48 } 49 50 /* Helper macro for defining some statistics directly copied from the netdev 51 * stats structure. 52 */ 53 #define I40E_NETDEV_STAT(_net_stat) \ 54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 55 56 /* Helper macro for defining some statistics related to queues */ 57 #define I40E_QUEUE_STAT(_name, _stat) \ 58 I40E_STAT(struct i40e_ring, _name, _stat) 59 60 /* Stats associated with a Tx or Rx ring */ 61 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 64 }; 65 66 /** 67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 68 * @data: location to store the stat value 69 * @pointer: basis for where to copy from 70 * @stat: the stat definition 71 * 72 * Copies the stat data defined by the pointer and stat structure pair into 73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 75 */ 76 static void 77 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 78 const struct i40e_stats *stat) 79 { 80 char *p; 81 82 if (!pointer) { 83 /* ensure that the ethtool data buffer is zero'd for any stats 84 * which don't have a valid pointer. 85 */ 86 *data = 0; 87 return; 88 } 89 90 p = (char *)pointer + stat->stat_offset; 91 switch (stat->sizeof_stat) { 92 case sizeof(u64): 93 *data = *((u64 *)p); 94 break; 95 case sizeof(u32): 96 *data = *((u32 *)p); 97 break; 98 case sizeof(u16): 99 *data = *((u16 *)p); 100 break; 101 case sizeof(u8): 102 *data = *((u8 *)p); 103 break; 104 default: 105 WARN_ONCE(1, "unexpected stat size for %s", 106 stat->stat_string); 107 *data = 0; 108 } 109 } 110 111 /** 112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 113 * @data: ethtool stats buffer 114 * @pointer: location to copy stats from 115 * @stats: array of stats to copy 116 * @size: the size of the stats definition 117 * 118 * Copy the stats defined by the stats array using the pointer as a base into 119 * the data buffer supplied by ethtool. Updates the data pointer to point to 120 * the next empty location for successive calls to __i40e_add_ethtool_stats. 121 * If pointer is null, set the data values to zero and update the pointer to 122 * skip these stats. 123 **/ 124 static void 125 __i40e_add_ethtool_stats(u64 **data, void *pointer, 126 const struct i40e_stats stats[], 127 const unsigned int size) 128 { 129 unsigned int i; 130 131 for (i = 0; i < size; i++) 132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 133 } 134 135 /** 136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 137 * @data: ethtool stats buffer 138 * @pointer: location where stats are stored 139 * @stats: static const array of stat definitions 140 * 141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 143 * ensuring that we pass the size associated with the given stats array. 144 * 145 * The parameter @stats is evaluated twice, so parameters with side effects 146 * should be avoided. 147 **/ 148 #define i40e_add_ethtool_stats(data, pointer, stats) \ 149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 150 151 /** 152 * i40e_add_queue_stats - copy queue statistics into supplied buffer 153 * @data: ethtool stats buffer 154 * @ring: the ring to copy 155 * 156 * Queue statistics must be copied while protected by 157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats. 158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 159 * ring pointer is null, zero out the queue stat values and update the data 160 * pointer. Otherwise safely copy the stats from the ring into the supplied 161 * buffer and update the data pointer when finished. 162 * 163 * This function expects to be called while under rcu_read_lock(). 164 **/ 165 static void 166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 167 { 168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 169 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 170 unsigned int start; 171 unsigned int i; 172 173 /* To avoid invalid statistics values, ensure that we keep retrying 174 * the copy until we get a consistent value according to 175 * u64_stats_fetch_retry_irq. But first, make sure our ring is 176 * non-null before attempting to access its syncp. 177 */ 178 do { 179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp); 180 for (i = 0; i < size; i++) { 181 i40e_add_one_ethtool_stat(&(*data)[i], ring, 182 &stats[i]); 183 } 184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start)); 185 186 /* Once we successfully copy the stats in, update the data pointer */ 187 *data += size; 188 } 189 190 /** 191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 192 * @p: ethtool supplied buffer 193 * @stats: stat definitions array 194 * @size: size of the stats array 195 * 196 * Format and copy the strings described by stats into the buffer pointed at 197 * by p. 198 **/ 199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 200 const unsigned int size, ...) 201 { 202 unsigned int i; 203 204 for (i = 0; i < size; i++) { 205 va_list args; 206 207 va_start(args, size); 208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 209 *p += ETH_GSTRING_LEN; 210 va_end(args); 211 } 212 } 213 214 /** 215 * 40e_add_stat_strings - copy stat strings into ethtool buffer 216 * @p: ethtool supplied buffer 217 * @stats: stat definitions array 218 * 219 * Format and copy the strings described by the const static stats value into 220 * the buffer pointed at by p. 221 * 222 * The parameter @stats is evaluated twice, so parameters with side effects 223 * should be avoided. Additionally, stats must be an array such that 224 * ARRAY_SIZE can be called on it. 225 **/ 226 #define i40e_add_stat_strings(p, stats, ...) \ 227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 228 229 #define I40E_PF_STAT(_name, _stat) \ 230 I40E_STAT(struct i40e_pf, _name, _stat) 231 #define I40E_VSI_STAT(_name, _stat) \ 232 I40E_STAT(struct i40e_vsi, _name, _stat) 233 #define I40E_VEB_STAT(_name, _stat) \ 234 I40E_STAT(struct i40e_veb, _name, _stat) 235 #define I40E_PFC_STAT(_name, _stat) \ 236 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 237 #define I40E_QUEUE_STAT(_name, _stat) \ 238 I40E_STAT(struct i40e_ring, _name, _stat) 239 240 static const struct i40e_stats i40e_gstrings_net_stats[] = { 241 I40E_NETDEV_STAT(rx_packets), 242 I40E_NETDEV_STAT(tx_packets), 243 I40E_NETDEV_STAT(rx_bytes), 244 I40E_NETDEV_STAT(tx_bytes), 245 I40E_NETDEV_STAT(rx_errors), 246 I40E_NETDEV_STAT(tx_errors), 247 I40E_NETDEV_STAT(rx_dropped), 248 I40E_NETDEV_STAT(tx_dropped), 249 I40E_NETDEV_STAT(collisions), 250 I40E_NETDEV_STAT(rx_length_errors), 251 I40E_NETDEV_STAT(rx_crc_errors), 252 }; 253 254 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 255 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 256 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 257 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 258 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 259 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 260 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 261 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 262 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 263 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 264 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 265 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 266 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 267 }; 268 269 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 270 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets), 271 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes), 272 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets), 273 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes), 274 }; 275 276 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 277 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 278 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 279 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 280 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 281 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 282 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 283 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 284 I40E_VSI_STAT("tx_linearize", tx_linearize), 285 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 286 I40E_VSI_STAT("tx_busy", tx_busy), 287 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 288 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 289 }; 290 291 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 292 * but they are separate. This device supports Virtualization, and 293 * as such might have several netdevs supporting VMDq and FCoE going 294 * through a single port. The NETDEV_STATs are for individual netdevs 295 * seen at the top of the stack, and the PF_STATs are for the physical 296 * function at the bottom of the stack hosting those netdevs. 297 * 298 * The PF_STATs are appended to the netdev stats only when ethtool -S 299 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 300 */ 301 static const struct i40e_stats i40e_gstrings_stats[] = { 302 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 303 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 304 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 305 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 306 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 307 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 308 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 309 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 310 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 311 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 312 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 313 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 314 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 315 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 316 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 317 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 318 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 319 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 320 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 321 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 322 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 323 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 324 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 325 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 326 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 327 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 328 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 329 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 330 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 331 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 332 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 333 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 334 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 335 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 336 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 337 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 338 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 339 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 340 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 341 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 342 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 343 I40E_PF_STAT("port.arq_overflows", arq_overflows), 344 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 345 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 346 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 347 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 348 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 349 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 350 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 351 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 352 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 353 354 /* LPI stats */ 355 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 356 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 357 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 358 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 359 }; 360 361 struct i40e_pfc_stats { 362 u64 priority_xon_rx; 363 u64 priority_xoff_rx; 364 u64 priority_xon_tx; 365 u64 priority_xoff_tx; 366 u64 priority_xon_2_xoff; 367 }; 368 369 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 370 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 371 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 372 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 373 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 374 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 375 }; 376 377 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 378 379 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 380 381 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 382 383 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 384 I40E_MAX_USER_PRIORITY) 385 386 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 387 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 388 I40E_MAX_TRAFFIC_CLASS)) 389 390 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 391 392 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 393 I40E_PFC_STATS_LEN + \ 394 I40E_VEB_STATS_LEN + \ 395 I40E_VSI_STATS_LEN) 396 397 /* Length of stats for a single queue */ 398 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 399 400 enum i40e_ethtool_test_id { 401 I40E_ETH_TEST_REG = 0, 402 I40E_ETH_TEST_EEPROM, 403 I40E_ETH_TEST_INTR, 404 I40E_ETH_TEST_LINK, 405 }; 406 407 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 408 "Register test (offline)", 409 "Eeprom test (offline)", 410 "Interrupt test (offline)", 411 "Link test (on/offline)" 412 }; 413 414 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 415 416 struct i40e_priv_flags { 417 char flag_string[ETH_GSTRING_LEN]; 418 u64 flag; 419 bool read_only; 420 }; 421 422 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 423 .flag_string = _name, \ 424 .flag = _flag, \ 425 .read_only = _read_only, \ 426 } 427 428 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 429 /* NOTE: MFP setting cannot be changed */ 430 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 431 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 432 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 433 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 434 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 435 I40E_PRIV_FLAG("link-down-on-close", 436 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 437 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 438 I40E_PRIV_FLAG("disable-source-pruning", 439 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 440 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 441 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0), 442 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0), 443 }; 444 445 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 446 447 /* Private flags with a global effect, restricted to PF 0 */ 448 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 449 I40E_PRIV_FLAG("vf-true-promisc-support", 450 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 451 }; 452 453 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 454 455 /** 456 * i40e_partition_setting_complaint - generic complaint for MFP restriction 457 * @pf: the PF struct 458 **/ 459 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 460 { 461 dev_info(&pf->pdev->dev, 462 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 463 } 464 465 /** 466 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 467 * @pf: PF struct with phy_types 468 * @ks: ethtool link ksettings struct to fill out 469 * 470 **/ 471 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 472 struct ethtool_link_ksettings *ks) 473 { 474 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 475 u64 phy_types = pf->hw.phy.phy_types; 476 477 ethtool_link_ksettings_zero_link_mode(ks, supported); 478 ethtool_link_ksettings_zero_link_mode(ks, advertising); 479 480 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 481 ethtool_link_ksettings_add_link_mode(ks, supported, 482 1000baseT_Full); 483 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 484 ethtool_link_ksettings_add_link_mode(ks, advertising, 485 1000baseT_Full); 486 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 487 ethtool_link_ksettings_add_link_mode(ks, supported, 488 100baseT_Full); 489 ethtool_link_ksettings_add_link_mode(ks, advertising, 490 100baseT_Full); 491 } 492 } 493 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 494 phy_types & I40E_CAP_PHY_TYPE_XFI || 495 phy_types & I40E_CAP_PHY_TYPE_SFI || 496 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 497 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 498 ethtool_link_ksettings_add_link_mode(ks, supported, 499 10000baseT_Full); 500 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 501 ethtool_link_ksettings_add_link_mode(ks, advertising, 502 10000baseT_Full); 503 } 504 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 505 ethtool_link_ksettings_add_link_mode(ks, supported, 506 10000baseT_Full); 507 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 508 ethtool_link_ksettings_add_link_mode(ks, advertising, 509 10000baseT_Full); 510 } 511 if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) { 512 ethtool_link_ksettings_add_link_mode(ks, supported, 513 2500baseT_Full); 514 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 515 ethtool_link_ksettings_add_link_mode(ks, advertising, 516 2500baseT_Full); 517 } 518 if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) { 519 ethtool_link_ksettings_add_link_mode(ks, supported, 520 5000baseT_Full); 521 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 522 ethtool_link_ksettings_add_link_mode(ks, advertising, 523 5000baseT_Full); 524 } 525 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 526 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 527 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 528 ethtool_link_ksettings_add_link_mode(ks, supported, 529 40000baseCR4_Full); 530 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 531 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 532 ethtool_link_ksettings_add_link_mode(ks, supported, 533 40000baseCR4_Full); 534 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 535 ethtool_link_ksettings_add_link_mode(ks, advertising, 536 40000baseCR4_Full); 537 } 538 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 539 ethtool_link_ksettings_add_link_mode(ks, supported, 540 100baseT_Full); 541 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 542 ethtool_link_ksettings_add_link_mode(ks, advertising, 543 100baseT_Full); 544 } 545 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 546 ethtool_link_ksettings_add_link_mode(ks, supported, 547 1000baseT_Full); 548 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 549 ethtool_link_ksettings_add_link_mode(ks, advertising, 550 1000baseT_Full); 551 } 552 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) { 553 ethtool_link_ksettings_add_link_mode(ks, supported, 554 40000baseSR4_Full); 555 ethtool_link_ksettings_add_link_mode(ks, advertising, 556 40000baseSR4_Full); 557 } 558 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) { 559 ethtool_link_ksettings_add_link_mode(ks, supported, 560 40000baseLR4_Full); 561 ethtool_link_ksettings_add_link_mode(ks, advertising, 562 40000baseLR4_Full); 563 } 564 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 565 ethtool_link_ksettings_add_link_mode(ks, supported, 566 40000baseKR4_Full); 567 ethtool_link_ksettings_add_link_mode(ks, advertising, 568 40000baseKR4_Full); 569 } 570 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 571 ethtool_link_ksettings_add_link_mode(ks, supported, 572 20000baseKR2_Full); 573 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 574 ethtool_link_ksettings_add_link_mode(ks, advertising, 575 20000baseKR2_Full); 576 } 577 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 578 ethtool_link_ksettings_add_link_mode(ks, supported, 579 10000baseKX4_Full); 580 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 581 ethtool_link_ksettings_add_link_mode(ks, advertising, 582 10000baseKX4_Full); 583 } 584 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 585 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 586 ethtool_link_ksettings_add_link_mode(ks, supported, 587 10000baseKR_Full); 588 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 589 ethtool_link_ksettings_add_link_mode(ks, advertising, 590 10000baseKR_Full); 591 } 592 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 593 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 594 ethtool_link_ksettings_add_link_mode(ks, supported, 595 1000baseKX_Full); 596 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 597 ethtool_link_ksettings_add_link_mode(ks, advertising, 598 1000baseKX_Full); 599 } 600 /* need to add 25G PHY types */ 601 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 602 ethtool_link_ksettings_add_link_mode(ks, supported, 603 25000baseKR_Full); 604 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 605 ethtool_link_ksettings_add_link_mode(ks, advertising, 606 25000baseKR_Full); 607 } 608 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 609 ethtool_link_ksettings_add_link_mode(ks, supported, 610 25000baseCR_Full); 611 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 612 ethtool_link_ksettings_add_link_mode(ks, advertising, 613 25000baseCR_Full); 614 } 615 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 616 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 617 ethtool_link_ksettings_add_link_mode(ks, supported, 618 25000baseSR_Full); 619 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 620 ethtool_link_ksettings_add_link_mode(ks, advertising, 621 25000baseSR_Full); 622 } 623 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 624 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 625 ethtool_link_ksettings_add_link_mode(ks, supported, 626 25000baseCR_Full); 627 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 628 ethtool_link_ksettings_add_link_mode(ks, advertising, 629 25000baseCR_Full); 630 } 631 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 632 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 633 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 634 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 635 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 636 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 637 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 638 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 639 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 640 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) { 641 ethtool_link_ksettings_add_link_mode(ks, advertising, 642 FEC_NONE); 643 ethtool_link_ksettings_add_link_mode(ks, advertising, 644 FEC_RS); 645 ethtool_link_ksettings_add_link_mode(ks, advertising, 646 FEC_BASER); 647 } 648 } 649 /* need to add new 10G PHY types */ 650 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 651 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 652 ethtool_link_ksettings_add_link_mode(ks, supported, 653 10000baseCR_Full); 654 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 655 ethtool_link_ksettings_add_link_mode(ks, advertising, 656 10000baseCR_Full); 657 } 658 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 659 ethtool_link_ksettings_add_link_mode(ks, supported, 660 10000baseSR_Full); 661 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 662 ethtool_link_ksettings_add_link_mode(ks, advertising, 663 10000baseSR_Full); 664 } 665 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 666 ethtool_link_ksettings_add_link_mode(ks, supported, 667 10000baseLR_Full); 668 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 669 ethtool_link_ksettings_add_link_mode(ks, advertising, 670 10000baseLR_Full); 671 } 672 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 673 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 674 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 675 ethtool_link_ksettings_add_link_mode(ks, supported, 676 1000baseX_Full); 677 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 678 ethtool_link_ksettings_add_link_mode(ks, advertising, 679 1000baseX_Full); 680 } 681 /* Autoneg PHY types */ 682 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 683 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 684 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 685 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 686 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 687 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 688 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 689 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 690 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 691 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 692 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 693 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 694 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 695 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 696 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 697 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 698 phy_types & I40E_CAP_PHY_TYPE_5GBASE_T || 699 phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T || 700 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 701 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 702 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 703 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 704 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 705 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 706 ethtool_link_ksettings_add_link_mode(ks, supported, 707 Autoneg); 708 ethtool_link_ksettings_add_link_mode(ks, advertising, 709 Autoneg); 710 } 711 } 712 713 /** 714 * i40e_get_settings_link_up - Get the Link settings for when link is up 715 * @hw: hw structure 716 * @ks: ethtool ksettings to fill in 717 * @netdev: network interface device structure 718 * @pf: pointer to physical function struct 719 **/ 720 static void i40e_get_settings_link_up(struct i40e_hw *hw, 721 struct ethtool_link_ksettings *ks, 722 struct net_device *netdev, 723 struct i40e_pf *pf) 724 { 725 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 726 struct ethtool_link_ksettings cap_ksettings; 727 u32 link_speed = hw_link_info->link_speed; 728 729 /* Initialize supported and advertised settings based on phy settings */ 730 switch (hw_link_info->phy_type) { 731 case I40E_PHY_TYPE_40GBASE_CR4: 732 case I40E_PHY_TYPE_40GBASE_CR4_CU: 733 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 734 ethtool_link_ksettings_add_link_mode(ks, supported, 735 40000baseCR4_Full); 736 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 737 ethtool_link_ksettings_add_link_mode(ks, advertising, 738 40000baseCR4_Full); 739 break; 740 case I40E_PHY_TYPE_XLAUI: 741 case I40E_PHY_TYPE_XLPPI: 742 case I40E_PHY_TYPE_40GBASE_AOC: 743 ethtool_link_ksettings_add_link_mode(ks, supported, 744 40000baseCR4_Full); 745 ethtool_link_ksettings_add_link_mode(ks, advertising, 746 40000baseCR4_Full); 747 break; 748 case I40E_PHY_TYPE_40GBASE_SR4: 749 ethtool_link_ksettings_add_link_mode(ks, supported, 750 40000baseSR4_Full); 751 ethtool_link_ksettings_add_link_mode(ks, advertising, 752 40000baseSR4_Full); 753 break; 754 case I40E_PHY_TYPE_40GBASE_LR4: 755 ethtool_link_ksettings_add_link_mode(ks, supported, 756 40000baseLR4_Full); 757 ethtool_link_ksettings_add_link_mode(ks, advertising, 758 40000baseLR4_Full); 759 break; 760 case I40E_PHY_TYPE_25GBASE_SR: 761 case I40E_PHY_TYPE_25GBASE_LR: 762 case I40E_PHY_TYPE_10GBASE_SR: 763 case I40E_PHY_TYPE_10GBASE_LR: 764 case I40E_PHY_TYPE_1000BASE_SX: 765 case I40E_PHY_TYPE_1000BASE_LX: 766 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 767 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 768 ethtool_link_ksettings_add_link_mode(ks, supported, 769 25000baseSR_Full); 770 ethtool_link_ksettings_add_link_mode(ks, advertising, 771 25000baseSR_Full); 772 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 773 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 774 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 775 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 776 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 777 ethtool_link_ksettings_add_link_mode(ks, advertising, 778 FEC_BASER); 779 ethtool_link_ksettings_add_link_mode(ks, supported, 780 10000baseSR_Full); 781 ethtool_link_ksettings_add_link_mode(ks, advertising, 782 10000baseSR_Full); 783 ethtool_link_ksettings_add_link_mode(ks, supported, 784 10000baseLR_Full); 785 ethtool_link_ksettings_add_link_mode(ks, advertising, 786 10000baseLR_Full); 787 ethtool_link_ksettings_add_link_mode(ks, supported, 788 1000baseX_Full); 789 ethtool_link_ksettings_add_link_mode(ks, advertising, 790 1000baseX_Full); 791 ethtool_link_ksettings_add_link_mode(ks, supported, 792 10000baseT_Full); 793 if (hw_link_info->module_type[2] & 794 I40E_MODULE_TYPE_1000BASE_SX || 795 hw_link_info->module_type[2] & 796 I40E_MODULE_TYPE_1000BASE_LX) { 797 ethtool_link_ksettings_add_link_mode(ks, supported, 798 1000baseT_Full); 799 if (hw_link_info->requested_speeds & 800 I40E_LINK_SPEED_1GB) 801 ethtool_link_ksettings_add_link_mode( 802 ks, advertising, 1000baseT_Full); 803 } 804 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 805 ethtool_link_ksettings_add_link_mode(ks, advertising, 806 10000baseT_Full); 807 break; 808 case I40E_PHY_TYPE_10GBASE_T: 809 case I40E_PHY_TYPE_5GBASE_T: 810 case I40E_PHY_TYPE_2_5GBASE_T: 811 case I40E_PHY_TYPE_1000BASE_T: 812 case I40E_PHY_TYPE_100BASE_TX: 813 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 814 ethtool_link_ksettings_add_link_mode(ks, supported, 815 10000baseT_Full); 816 ethtool_link_ksettings_add_link_mode(ks, supported, 817 5000baseT_Full); 818 ethtool_link_ksettings_add_link_mode(ks, supported, 819 2500baseT_Full); 820 ethtool_link_ksettings_add_link_mode(ks, supported, 821 1000baseT_Full); 822 ethtool_link_ksettings_add_link_mode(ks, supported, 823 100baseT_Full); 824 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 825 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 826 ethtool_link_ksettings_add_link_mode(ks, advertising, 827 10000baseT_Full); 828 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 829 ethtool_link_ksettings_add_link_mode(ks, advertising, 830 5000baseT_Full); 831 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 832 ethtool_link_ksettings_add_link_mode(ks, advertising, 833 2500baseT_Full); 834 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 835 ethtool_link_ksettings_add_link_mode(ks, advertising, 836 1000baseT_Full); 837 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 838 ethtool_link_ksettings_add_link_mode(ks, advertising, 839 100baseT_Full); 840 break; 841 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 842 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 843 ethtool_link_ksettings_add_link_mode(ks, supported, 844 1000baseT_Full); 845 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 846 ethtool_link_ksettings_add_link_mode(ks, advertising, 847 1000baseT_Full); 848 break; 849 case I40E_PHY_TYPE_10GBASE_CR1_CU: 850 case I40E_PHY_TYPE_10GBASE_CR1: 851 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 852 ethtool_link_ksettings_add_link_mode(ks, supported, 853 10000baseT_Full); 854 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 855 ethtool_link_ksettings_add_link_mode(ks, advertising, 856 10000baseT_Full); 857 break; 858 case I40E_PHY_TYPE_XAUI: 859 case I40E_PHY_TYPE_XFI: 860 case I40E_PHY_TYPE_SFI: 861 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 862 case I40E_PHY_TYPE_10GBASE_AOC: 863 ethtool_link_ksettings_add_link_mode(ks, supported, 864 10000baseT_Full); 865 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 866 ethtool_link_ksettings_add_link_mode(ks, advertising, 867 10000baseT_Full); 868 break; 869 case I40E_PHY_TYPE_SGMII: 870 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 871 ethtool_link_ksettings_add_link_mode(ks, supported, 872 1000baseT_Full); 873 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 874 ethtool_link_ksettings_add_link_mode(ks, advertising, 875 1000baseT_Full); 876 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 877 ethtool_link_ksettings_add_link_mode(ks, supported, 878 100baseT_Full); 879 if (hw_link_info->requested_speeds & 880 I40E_LINK_SPEED_100MB) 881 ethtool_link_ksettings_add_link_mode( 882 ks, advertising, 100baseT_Full); 883 } 884 break; 885 case I40E_PHY_TYPE_40GBASE_KR4: 886 case I40E_PHY_TYPE_25GBASE_KR: 887 case I40E_PHY_TYPE_20GBASE_KR2: 888 case I40E_PHY_TYPE_10GBASE_KR: 889 case I40E_PHY_TYPE_10GBASE_KX4: 890 case I40E_PHY_TYPE_1000BASE_KX: 891 ethtool_link_ksettings_add_link_mode(ks, supported, 892 40000baseKR4_Full); 893 ethtool_link_ksettings_add_link_mode(ks, supported, 894 25000baseKR_Full); 895 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 896 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 897 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 898 ethtool_link_ksettings_add_link_mode(ks, supported, 899 20000baseKR2_Full); 900 ethtool_link_ksettings_add_link_mode(ks, supported, 901 10000baseKR_Full); 902 ethtool_link_ksettings_add_link_mode(ks, supported, 903 10000baseKX4_Full); 904 ethtool_link_ksettings_add_link_mode(ks, supported, 905 1000baseKX_Full); 906 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 907 ethtool_link_ksettings_add_link_mode(ks, advertising, 908 40000baseKR4_Full); 909 ethtool_link_ksettings_add_link_mode(ks, advertising, 910 25000baseKR_Full); 911 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 912 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 913 ethtool_link_ksettings_add_link_mode(ks, advertising, 914 FEC_BASER); 915 ethtool_link_ksettings_add_link_mode(ks, advertising, 916 20000baseKR2_Full); 917 ethtool_link_ksettings_add_link_mode(ks, advertising, 918 10000baseKR_Full); 919 ethtool_link_ksettings_add_link_mode(ks, advertising, 920 10000baseKX4_Full); 921 ethtool_link_ksettings_add_link_mode(ks, advertising, 922 1000baseKX_Full); 923 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 924 break; 925 case I40E_PHY_TYPE_25GBASE_CR: 926 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 927 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 928 ethtool_link_ksettings_add_link_mode(ks, supported, 929 25000baseCR_Full); 930 ethtool_link_ksettings_add_link_mode(ks, advertising, 931 25000baseCR_Full); 932 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 933 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 934 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 935 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 936 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 937 ethtool_link_ksettings_add_link_mode(ks, advertising, 938 FEC_BASER); 939 break; 940 case I40E_PHY_TYPE_25GBASE_AOC: 941 case I40E_PHY_TYPE_25GBASE_ACC: 942 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 943 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 944 ethtool_link_ksettings_add_link_mode(ks, supported, 945 25000baseCR_Full); 946 ethtool_link_ksettings_add_link_mode(ks, advertising, 947 25000baseCR_Full); 948 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 949 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 950 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 951 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_NONE); 952 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 953 ethtool_link_ksettings_add_link_mode(ks, advertising, 954 FEC_BASER); 955 ethtool_link_ksettings_add_link_mode(ks, supported, 956 10000baseCR_Full); 957 ethtool_link_ksettings_add_link_mode(ks, advertising, 958 10000baseCR_Full); 959 break; 960 default: 961 /* if we got here and link is up something bad is afoot */ 962 netdev_info(netdev, 963 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 964 hw_link_info->phy_type); 965 } 966 967 /* Now that we've worked out everything that could be supported by the 968 * current PHY type, get what is supported by the NVM and intersect 969 * them to get what is truly supported 970 */ 971 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 972 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 973 ethtool_intersect_link_masks(ks, &cap_ksettings); 974 975 /* Set speed and duplex */ 976 switch (link_speed) { 977 case I40E_LINK_SPEED_40GB: 978 ks->base.speed = SPEED_40000; 979 break; 980 case I40E_LINK_SPEED_25GB: 981 ks->base.speed = SPEED_25000; 982 break; 983 case I40E_LINK_SPEED_20GB: 984 ks->base.speed = SPEED_20000; 985 break; 986 case I40E_LINK_SPEED_10GB: 987 ks->base.speed = SPEED_10000; 988 break; 989 case I40E_LINK_SPEED_5GB: 990 ks->base.speed = SPEED_5000; 991 break; 992 case I40E_LINK_SPEED_2_5GB: 993 ks->base.speed = SPEED_2500; 994 break; 995 case I40E_LINK_SPEED_1GB: 996 ks->base.speed = SPEED_1000; 997 break; 998 case I40E_LINK_SPEED_100MB: 999 ks->base.speed = SPEED_100; 1000 break; 1001 default: 1002 ks->base.speed = SPEED_UNKNOWN; 1003 break; 1004 } 1005 ks->base.duplex = DUPLEX_FULL; 1006 } 1007 1008 /** 1009 * i40e_get_settings_link_down - Get the Link settings for when link is down 1010 * @hw: hw structure 1011 * @ks: ethtool ksettings to fill in 1012 * @pf: pointer to physical function struct 1013 * 1014 * Reports link settings that can be determined when link is down 1015 **/ 1016 static void i40e_get_settings_link_down(struct i40e_hw *hw, 1017 struct ethtool_link_ksettings *ks, 1018 struct i40e_pf *pf) 1019 { 1020 /* link is down and the driver needs to fall back on 1021 * supported phy types to figure out what info to display 1022 */ 1023 i40e_phy_type_to_ethtool(pf, ks); 1024 1025 /* With no link speed and duplex are unknown */ 1026 ks->base.speed = SPEED_UNKNOWN; 1027 ks->base.duplex = DUPLEX_UNKNOWN; 1028 } 1029 1030 /** 1031 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 1032 * @netdev: network interface device structure 1033 * @ks: ethtool ksettings 1034 * 1035 * Reports speed/duplex settings based on media_type 1036 **/ 1037 static int i40e_get_link_ksettings(struct net_device *netdev, 1038 struct ethtool_link_ksettings *ks) 1039 { 1040 struct i40e_netdev_priv *np = netdev_priv(netdev); 1041 struct i40e_pf *pf = np->vsi->back; 1042 struct i40e_hw *hw = &pf->hw; 1043 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1044 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1045 1046 ethtool_link_ksettings_zero_link_mode(ks, supported); 1047 ethtool_link_ksettings_zero_link_mode(ks, advertising); 1048 1049 if (link_up) 1050 i40e_get_settings_link_up(hw, ks, netdev, pf); 1051 else 1052 i40e_get_settings_link_down(hw, ks, pf); 1053 1054 /* Now set the settings that don't rely on link being up/down */ 1055 /* Set autoneg settings */ 1056 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1057 AUTONEG_ENABLE : AUTONEG_DISABLE); 1058 1059 /* Set media type settings */ 1060 switch (hw->phy.media_type) { 1061 case I40E_MEDIA_TYPE_BACKPLANE: 1062 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 1063 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 1064 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 1065 ethtool_link_ksettings_add_link_mode(ks, advertising, 1066 Backplane); 1067 ks->base.port = PORT_NONE; 1068 break; 1069 case I40E_MEDIA_TYPE_BASET: 1070 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 1071 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 1072 ks->base.port = PORT_TP; 1073 break; 1074 case I40E_MEDIA_TYPE_DA: 1075 case I40E_MEDIA_TYPE_CX4: 1076 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1077 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1078 ks->base.port = PORT_DA; 1079 break; 1080 case I40E_MEDIA_TYPE_FIBER: 1081 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1082 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1083 ks->base.port = PORT_FIBRE; 1084 break; 1085 case I40E_MEDIA_TYPE_UNKNOWN: 1086 default: 1087 ks->base.port = PORT_OTHER; 1088 break; 1089 } 1090 1091 /* Set flow control settings */ 1092 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 1093 1094 switch (hw->fc.requested_mode) { 1095 case I40E_FC_FULL: 1096 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1097 break; 1098 case I40E_FC_TX_PAUSE: 1099 ethtool_link_ksettings_add_link_mode(ks, advertising, 1100 Asym_Pause); 1101 break; 1102 case I40E_FC_RX_PAUSE: 1103 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1104 ethtool_link_ksettings_add_link_mode(ks, advertising, 1105 Asym_Pause); 1106 break; 1107 default: 1108 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1109 ethtool_link_ksettings_del_link_mode(ks, advertising, 1110 Asym_Pause); 1111 break; 1112 } 1113 1114 return 0; 1115 } 1116 1117 /** 1118 * i40e_set_link_ksettings - Set Speed and Duplex 1119 * @netdev: network interface device structure 1120 * @ks: ethtool ksettings 1121 * 1122 * Set speed/duplex per media_types advertised/forced 1123 **/ 1124 static int i40e_set_link_ksettings(struct net_device *netdev, 1125 const struct ethtool_link_ksettings *ks) 1126 { 1127 struct i40e_netdev_priv *np = netdev_priv(netdev); 1128 struct i40e_aq_get_phy_abilities_resp abilities; 1129 struct ethtool_link_ksettings safe_ks; 1130 struct ethtool_link_ksettings copy_ks; 1131 struct i40e_aq_set_phy_config config; 1132 struct i40e_pf *pf = np->vsi->back; 1133 struct i40e_vsi *vsi = np->vsi; 1134 struct i40e_hw *hw = &pf->hw; 1135 bool autoneg_changed = false; 1136 i40e_status status = 0; 1137 int timeout = 50; 1138 int err = 0; 1139 u8 autoneg; 1140 1141 /* Changing port settings is not supported if this isn't the 1142 * port's controlling PF 1143 */ 1144 if (hw->partition_id != 1) { 1145 i40e_partition_setting_complaint(pf); 1146 return -EOPNOTSUPP; 1147 } 1148 if (vsi != pf->vsi[pf->lan_vsi]) 1149 return -EOPNOTSUPP; 1150 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1151 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1152 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1153 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1154 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1155 return -EOPNOTSUPP; 1156 if (hw->device_id == I40E_DEV_ID_KX_B || 1157 hw->device_id == I40E_DEV_ID_KX_C || 1158 hw->device_id == I40E_DEV_ID_20G_KR2 || 1159 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1160 hw->device_id == I40E_DEV_ID_25G_B || 1161 hw->device_id == I40E_DEV_ID_KX_X722) { 1162 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1163 return -EOPNOTSUPP; 1164 } 1165 1166 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1167 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1168 1169 /* save autoneg out of ksettings */ 1170 autoneg = copy_ks.base.autoneg; 1171 1172 /* get our own copy of the bits to check against */ 1173 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1174 safe_ks.base.cmd = copy_ks.base.cmd; 1175 safe_ks.base.link_mode_masks_nwords = 1176 copy_ks.base.link_mode_masks_nwords; 1177 i40e_get_link_ksettings(netdev, &safe_ks); 1178 1179 /* Get link modes supported by hardware and check against modes 1180 * requested by the user. Return an error if unsupported mode was set. 1181 */ 1182 if (!bitmap_subset(copy_ks.link_modes.advertising, 1183 safe_ks.link_modes.supported, 1184 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1185 return -EINVAL; 1186 1187 /* set autoneg back to what it currently is */ 1188 copy_ks.base.autoneg = safe_ks.base.autoneg; 1189 1190 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1191 * trying to set something that we do not support. 1192 */ 1193 if (memcmp(©_ks.base, &safe_ks.base, 1194 sizeof(struct ethtool_link_settings))) 1195 return -EOPNOTSUPP; 1196 1197 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1198 timeout--; 1199 if (!timeout) 1200 return -EBUSY; 1201 usleep_range(1000, 2000); 1202 } 1203 1204 /* Get the current phy config */ 1205 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1206 NULL); 1207 if (status) { 1208 err = -EAGAIN; 1209 goto done; 1210 } 1211 1212 /* Copy abilities to config in case autoneg is not 1213 * set below 1214 */ 1215 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1216 config.abilities = abilities.abilities; 1217 1218 /* Check autoneg */ 1219 if (autoneg == AUTONEG_ENABLE) { 1220 /* If autoneg was not already enabled */ 1221 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1222 /* If autoneg is not supported, return error */ 1223 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1224 supported, 1225 Autoneg)) { 1226 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1227 err = -EINVAL; 1228 goto done; 1229 } 1230 /* Autoneg is allowed to change */ 1231 config.abilities = abilities.abilities | 1232 I40E_AQ_PHY_ENABLE_AN; 1233 autoneg_changed = true; 1234 } 1235 } else { 1236 /* If autoneg is currently enabled */ 1237 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1238 /* If autoneg is supported 10GBASE_T is the only PHY 1239 * that can disable it, so otherwise return error 1240 */ 1241 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1242 supported, 1243 Autoneg) && 1244 hw->phy.link_info.phy_type != 1245 I40E_PHY_TYPE_10GBASE_T) { 1246 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1247 err = -EINVAL; 1248 goto done; 1249 } 1250 /* Autoneg is allowed to change */ 1251 config.abilities = abilities.abilities & 1252 ~I40E_AQ_PHY_ENABLE_AN; 1253 autoneg_changed = true; 1254 } 1255 } 1256 1257 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1258 100baseT_Full)) 1259 config.link_speed |= I40E_LINK_SPEED_100MB; 1260 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1261 1000baseT_Full) || 1262 ethtool_link_ksettings_test_link_mode(ks, advertising, 1263 1000baseX_Full) || 1264 ethtool_link_ksettings_test_link_mode(ks, advertising, 1265 1000baseKX_Full)) 1266 config.link_speed |= I40E_LINK_SPEED_1GB; 1267 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1268 10000baseT_Full) || 1269 ethtool_link_ksettings_test_link_mode(ks, advertising, 1270 10000baseKX4_Full) || 1271 ethtool_link_ksettings_test_link_mode(ks, advertising, 1272 10000baseKR_Full) || 1273 ethtool_link_ksettings_test_link_mode(ks, advertising, 1274 10000baseCR_Full) || 1275 ethtool_link_ksettings_test_link_mode(ks, advertising, 1276 10000baseSR_Full) || 1277 ethtool_link_ksettings_test_link_mode(ks, advertising, 1278 10000baseLR_Full)) 1279 config.link_speed |= I40E_LINK_SPEED_10GB; 1280 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1281 2500baseT_Full)) 1282 config.link_speed |= I40E_LINK_SPEED_2_5GB; 1283 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1284 5000baseT_Full)) 1285 config.link_speed |= I40E_LINK_SPEED_5GB; 1286 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1287 20000baseKR2_Full)) 1288 config.link_speed |= I40E_LINK_SPEED_20GB; 1289 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1290 25000baseCR_Full) || 1291 ethtool_link_ksettings_test_link_mode(ks, advertising, 1292 25000baseKR_Full) || 1293 ethtool_link_ksettings_test_link_mode(ks, advertising, 1294 25000baseSR_Full)) 1295 config.link_speed |= I40E_LINK_SPEED_25GB; 1296 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1297 40000baseKR4_Full) || 1298 ethtool_link_ksettings_test_link_mode(ks, advertising, 1299 40000baseCR4_Full) || 1300 ethtool_link_ksettings_test_link_mode(ks, advertising, 1301 40000baseSR4_Full) || 1302 ethtool_link_ksettings_test_link_mode(ks, advertising, 1303 40000baseLR4_Full)) 1304 config.link_speed |= I40E_LINK_SPEED_40GB; 1305 1306 /* If speed didn't get set, set it to what it currently is. 1307 * This is needed because if advertise is 0 (as it is when autoneg 1308 * is disabled) then speed won't get set. 1309 */ 1310 if (!config.link_speed) 1311 config.link_speed = abilities.link_speed; 1312 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1313 /* copy over the rest of the abilities */ 1314 config.phy_type = abilities.phy_type; 1315 config.phy_type_ext = abilities.phy_type_ext; 1316 config.eee_capability = abilities.eee_capability; 1317 config.eeer = abilities.eeer_val; 1318 config.low_power_ctrl = abilities.d3_lpan; 1319 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1320 I40E_AQ_PHY_FEC_CONFIG_MASK; 1321 1322 /* save the requested speeds */ 1323 hw->phy.link_info.requested_speeds = config.link_speed; 1324 /* set link and auto negotiation so changes take effect */ 1325 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1326 /* If link is up put link down */ 1327 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1328 /* Tell the OS link is going down, the link will go 1329 * back up when fw says it is ready asynchronously 1330 */ 1331 i40e_print_link_message(vsi, false); 1332 netif_carrier_off(netdev); 1333 netif_tx_stop_all_queues(netdev); 1334 } 1335 1336 /* make the aq call */ 1337 status = i40e_aq_set_phy_config(hw, &config, NULL); 1338 if (status) { 1339 netdev_info(netdev, 1340 "Set phy config failed, err %s aq_err %s\n", 1341 i40e_stat_str(hw, status), 1342 i40e_aq_str(hw, hw->aq.asq_last_status)); 1343 err = -EAGAIN; 1344 goto done; 1345 } 1346 1347 status = i40e_update_link_info(hw); 1348 if (status) 1349 netdev_dbg(netdev, 1350 "Updating link info failed with err %s aq_err %s\n", 1351 i40e_stat_str(hw, status), 1352 i40e_aq_str(hw, hw->aq.asq_last_status)); 1353 1354 } else { 1355 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1356 } 1357 1358 done: 1359 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1360 1361 return err; 1362 } 1363 1364 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg) 1365 { 1366 struct i40e_netdev_priv *np = netdev_priv(netdev); 1367 struct i40e_aq_get_phy_abilities_resp abilities; 1368 struct i40e_pf *pf = np->vsi->back; 1369 struct i40e_hw *hw = &pf->hw; 1370 i40e_status status = 0; 1371 u32 flags = 0; 1372 int err = 0; 1373 1374 flags = READ_ONCE(pf->flags); 1375 i40e_set_fec_in_flags(fec_cfg, &flags); 1376 1377 /* Get the current phy config */ 1378 memset(&abilities, 0, sizeof(abilities)); 1379 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1380 NULL); 1381 if (status) { 1382 err = -EAGAIN; 1383 goto done; 1384 } 1385 1386 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) { 1387 struct i40e_aq_set_phy_config config; 1388 1389 memset(&config, 0, sizeof(config)); 1390 config.phy_type = abilities.phy_type; 1391 config.abilities = abilities.abilities; 1392 config.phy_type_ext = abilities.phy_type_ext; 1393 config.link_speed = abilities.link_speed; 1394 config.eee_capability = abilities.eee_capability; 1395 config.eeer = abilities.eeer_val; 1396 config.low_power_ctrl = abilities.d3_lpan; 1397 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK; 1398 status = i40e_aq_set_phy_config(hw, &config, NULL); 1399 if (status) { 1400 netdev_info(netdev, 1401 "Set phy config failed, err %s aq_err %s\n", 1402 i40e_stat_str(hw, status), 1403 i40e_aq_str(hw, hw->aq.asq_last_status)); 1404 err = -EAGAIN; 1405 goto done; 1406 } 1407 pf->flags = flags; 1408 status = i40e_update_link_info(hw); 1409 if (status) 1410 /* debug level message only due to relation to the link 1411 * itself rather than to the FEC settings 1412 * (e.g. no physical connection etc.) 1413 */ 1414 netdev_dbg(netdev, 1415 "Updating link info failed with err %s aq_err %s\n", 1416 i40e_stat_str(hw, status), 1417 i40e_aq_str(hw, hw->aq.asq_last_status)); 1418 } 1419 1420 done: 1421 return err; 1422 } 1423 1424 static int i40e_get_fec_param(struct net_device *netdev, 1425 struct ethtool_fecparam *fecparam) 1426 { 1427 struct i40e_netdev_priv *np = netdev_priv(netdev); 1428 struct i40e_aq_get_phy_abilities_resp abilities; 1429 struct i40e_pf *pf = np->vsi->back; 1430 struct i40e_hw *hw = &pf->hw; 1431 i40e_status status = 0; 1432 int err = 0; 1433 1434 /* Get the current phy config */ 1435 memset(&abilities, 0, sizeof(abilities)); 1436 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1437 NULL); 1438 if (status) { 1439 err = -EAGAIN; 1440 goto done; 1441 } 1442 1443 fecparam->fec = 0; 1444 if (abilities.fec_cfg_curr_mod_ext_info & I40E_AQ_SET_FEC_AUTO) 1445 fecparam->fec |= ETHTOOL_FEC_AUTO; 1446 if ((abilities.fec_cfg_curr_mod_ext_info & 1447 I40E_AQ_SET_FEC_REQUEST_RS) || 1448 (abilities.fec_cfg_curr_mod_ext_info & 1449 I40E_AQ_SET_FEC_ABILITY_RS)) 1450 fecparam->fec |= ETHTOOL_FEC_RS; 1451 if ((abilities.fec_cfg_curr_mod_ext_info & 1452 I40E_AQ_SET_FEC_REQUEST_KR) || 1453 (abilities.fec_cfg_curr_mod_ext_info & I40E_AQ_SET_FEC_ABILITY_KR)) 1454 fecparam->fec |= ETHTOOL_FEC_BASER; 1455 if (abilities.fec_cfg_curr_mod_ext_info == 0) 1456 fecparam->fec |= ETHTOOL_FEC_OFF; 1457 1458 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA) 1459 fecparam->active_fec = ETHTOOL_FEC_BASER; 1460 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA) 1461 fecparam->active_fec = ETHTOOL_FEC_RS; 1462 else 1463 fecparam->active_fec = ETHTOOL_FEC_OFF; 1464 done: 1465 return err; 1466 } 1467 1468 static int i40e_set_fec_param(struct net_device *netdev, 1469 struct ethtool_fecparam *fecparam) 1470 { 1471 struct i40e_netdev_priv *np = netdev_priv(netdev); 1472 struct i40e_pf *pf = np->vsi->back; 1473 struct i40e_hw *hw = &pf->hw; 1474 u8 fec_cfg = 0; 1475 int err = 0; 1476 1477 if (hw->device_id != I40E_DEV_ID_25G_SFP28 && 1478 hw->device_id != I40E_DEV_ID_25G_B) { 1479 err = -EPERM; 1480 goto done; 1481 } 1482 1483 switch (fecparam->fec) { 1484 case ETHTOOL_FEC_AUTO: 1485 fec_cfg = I40E_AQ_SET_FEC_AUTO; 1486 break; 1487 case ETHTOOL_FEC_RS: 1488 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 1489 I40E_AQ_SET_FEC_ABILITY_RS); 1490 break; 1491 case ETHTOOL_FEC_BASER: 1492 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 1493 I40E_AQ_SET_FEC_ABILITY_KR); 1494 break; 1495 case ETHTOOL_FEC_OFF: 1496 case ETHTOOL_FEC_NONE: 1497 fec_cfg = 0; 1498 break; 1499 default: 1500 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d", 1501 fecparam->fec); 1502 err = -EINVAL; 1503 goto done; 1504 } 1505 1506 err = i40e_set_fec_cfg(netdev, fec_cfg); 1507 1508 done: 1509 return err; 1510 } 1511 1512 static int i40e_nway_reset(struct net_device *netdev) 1513 { 1514 /* restart autonegotiation */ 1515 struct i40e_netdev_priv *np = netdev_priv(netdev); 1516 struct i40e_pf *pf = np->vsi->back; 1517 struct i40e_hw *hw = &pf->hw; 1518 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1519 i40e_status ret = 0; 1520 1521 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1522 if (ret) { 1523 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1524 i40e_stat_str(hw, ret), 1525 i40e_aq_str(hw, hw->aq.asq_last_status)); 1526 return -EIO; 1527 } 1528 1529 return 0; 1530 } 1531 1532 /** 1533 * i40e_get_pauseparam - Get Flow Control status 1534 * @netdev: netdevice structure 1535 * @pause: buffer to return pause parameters 1536 * 1537 * Return tx/rx-pause status 1538 **/ 1539 static void i40e_get_pauseparam(struct net_device *netdev, 1540 struct ethtool_pauseparam *pause) 1541 { 1542 struct i40e_netdev_priv *np = netdev_priv(netdev); 1543 struct i40e_pf *pf = np->vsi->back; 1544 struct i40e_hw *hw = &pf->hw; 1545 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1546 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1547 1548 pause->autoneg = 1549 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1550 AUTONEG_ENABLE : AUTONEG_DISABLE); 1551 1552 /* PFC enabled so report LFC as off */ 1553 if (dcbx_cfg->pfc.pfcenable) { 1554 pause->rx_pause = 0; 1555 pause->tx_pause = 0; 1556 return; 1557 } 1558 1559 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1560 pause->rx_pause = 1; 1561 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1562 pause->tx_pause = 1; 1563 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1564 pause->rx_pause = 1; 1565 pause->tx_pause = 1; 1566 } 1567 } 1568 1569 /** 1570 * i40e_set_pauseparam - Set Flow Control parameter 1571 * @netdev: network interface device structure 1572 * @pause: return tx/rx flow control status 1573 **/ 1574 static int i40e_set_pauseparam(struct net_device *netdev, 1575 struct ethtool_pauseparam *pause) 1576 { 1577 struct i40e_netdev_priv *np = netdev_priv(netdev); 1578 struct i40e_pf *pf = np->vsi->back; 1579 struct i40e_vsi *vsi = np->vsi; 1580 struct i40e_hw *hw = &pf->hw; 1581 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1582 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1583 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1584 i40e_status status; 1585 u8 aq_failures; 1586 int err = 0; 1587 u32 is_an; 1588 1589 /* Changing the port's flow control is not supported if this isn't the 1590 * port's controlling PF 1591 */ 1592 if (hw->partition_id != 1) { 1593 i40e_partition_setting_complaint(pf); 1594 return -EOPNOTSUPP; 1595 } 1596 1597 if (vsi != pf->vsi[pf->lan_vsi]) 1598 return -EOPNOTSUPP; 1599 1600 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED; 1601 if (pause->autoneg != is_an) { 1602 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1603 return -EOPNOTSUPP; 1604 } 1605 1606 /* If we have link and don't have autoneg */ 1607 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) { 1608 /* Send message that it might not necessarily work*/ 1609 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1610 } 1611 1612 if (dcbx_cfg->pfc.pfcenable) { 1613 netdev_info(netdev, 1614 "Priority flow control enabled. Cannot set link flow control.\n"); 1615 return -EOPNOTSUPP; 1616 } 1617 1618 if (pause->rx_pause && pause->tx_pause) 1619 hw->fc.requested_mode = I40E_FC_FULL; 1620 else if (pause->rx_pause && !pause->tx_pause) 1621 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1622 else if (!pause->rx_pause && pause->tx_pause) 1623 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1624 else if (!pause->rx_pause && !pause->tx_pause) 1625 hw->fc.requested_mode = I40E_FC_NONE; 1626 else 1627 return -EINVAL; 1628 1629 /* Tell the OS link is going down, the link will go back up when fw 1630 * says it is ready asynchronously 1631 */ 1632 i40e_print_link_message(vsi, false); 1633 netif_carrier_off(netdev); 1634 netif_tx_stop_all_queues(netdev); 1635 1636 /* Set the fc mode and only restart an if link is up*/ 1637 status = i40e_set_fc(hw, &aq_failures, link_up); 1638 1639 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1640 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1641 i40e_stat_str(hw, status), 1642 i40e_aq_str(hw, hw->aq.asq_last_status)); 1643 err = -EAGAIN; 1644 } 1645 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1646 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1647 i40e_stat_str(hw, status), 1648 i40e_aq_str(hw, hw->aq.asq_last_status)); 1649 err = -EAGAIN; 1650 } 1651 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1652 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1653 i40e_stat_str(hw, status), 1654 i40e_aq_str(hw, hw->aq.asq_last_status)); 1655 err = -EAGAIN; 1656 } 1657 1658 if (!test_bit(__I40E_DOWN, pf->state) && is_an) { 1659 /* Give it a little more time to try to come back */ 1660 msleep(75); 1661 if (!test_bit(__I40E_DOWN, pf->state)) 1662 return i40e_nway_reset(netdev); 1663 } 1664 1665 return err; 1666 } 1667 1668 static u32 i40e_get_msglevel(struct net_device *netdev) 1669 { 1670 struct i40e_netdev_priv *np = netdev_priv(netdev); 1671 struct i40e_pf *pf = np->vsi->back; 1672 u32 debug_mask = pf->hw.debug_mask; 1673 1674 if (debug_mask) 1675 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1676 1677 return pf->msg_enable; 1678 } 1679 1680 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1681 { 1682 struct i40e_netdev_priv *np = netdev_priv(netdev); 1683 struct i40e_pf *pf = np->vsi->back; 1684 1685 if (I40E_DEBUG_USER & data) 1686 pf->hw.debug_mask = data; 1687 else 1688 pf->msg_enable = data; 1689 } 1690 1691 static int i40e_get_regs_len(struct net_device *netdev) 1692 { 1693 int reg_count = 0; 1694 int i; 1695 1696 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1697 reg_count += i40e_reg_list[i].elements; 1698 1699 return reg_count * sizeof(u32); 1700 } 1701 1702 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1703 void *p) 1704 { 1705 struct i40e_netdev_priv *np = netdev_priv(netdev); 1706 struct i40e_pf *pf = np->vsi->back; 1707 struct i40e_hw *hw = &pf->hw; 1708 u32 *reg_buf = p; 1709 unsigned int i, j, ri; 1710 u32 reg; 1711 1712 /* Tell ethtool which driver-version-specific regs output we have. 1713 * 1714 * At some point, if we have ethtool doing special formatting of 1715 * this data, it will rely on this version number to know how to 1716 * interpret things. Hence, this needs to be updated if/when the 1717 * diags register table is changed. 1718 */ 1719 regs->version = 1; 1720 1721 /* loop through the diags reg table for what to print */ 1722 ri = 0; 1723 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1724 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1725 reg = i40e_reg_list[i].offset 1726 + (j * i40e_reg_list[i].stride); 1727 reg_buf[ri++] = rd32(hw, reg); 1728 } 1729 } 1730 1731 } 1732 1733 static int i40e_get_eeprom(struct net_device *netdev, 1734 struct ethtool_eeprom *eeprom, u8 *bytes) 1735 { 1736 struct i40e_netdev_priv *np = netdev_priv(netdev); 1737 struct i40e_hw *hw = &np->vsi->back->hw; 1738 struct i40e_pf *pf = np->vsi->back; 1739 int ret_val = 0, len, offset; 1740 u8 *eeprom_buff; 1741 u16 i, sectors; 1742 bool last; 1743 u32 magic; 1744 1745 #define I40E_NVM_SECTOR_SIZE 4096 1746 if (eeprom->len == 0) 1747 return -EINVAL; 1748 1749 /* check for NVMUpdate access method */ 1750 magic = hw->vendor_id | (hw->device_id << 16); 1751 if (eeprom->magic && eeprom->magic != magic) { 1752 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1753 int errno = 0; 1754 1755 /* make sure it is the right magic for NVMUpdate */ 1756 if ((eeprom->magic >> 16) != hw->device_id) 1757 errno = -EINVAL; 1758 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1759 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1760 errno = -EBUSY; 1761 else 1762 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1763 1764 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1765 dev_info(&pf->pdev->dev, 1766 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1767 ret_val, hw->aq.asq_last_status, errno, 1768 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1769 cmd->offset, cmd->data_size); 1770 1771 return errno; 1772 } 1773 1774 /* normal ethtool get_eeprom support */ 1775 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1776 1777 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1778 if (!eeprom_buff) 1779 return -ENOMEM; 1780 1781 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1782 if (ret_val) { 1783 dev_info(&pf->pdev->dev, 1784 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1785 ret_val, hw->aq.asq_last_status); 1786 goto free_buff; 1787 } 1788 1789 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1790 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1791 len = I40E_NVM_SECTOR_SIZE; 1792 last = false; 1793 for (i = 0; i < sectors; i++) { 1794 if (i == (sectors - 1)) { 1795 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1796 last = true; 1797 } 1798 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1799 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1800 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1801 last, NULL); 1802 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1803 dev_info(&pf->pdev->dev, 1804 "read NVM failed, invalid offset 0x%x\n", 1805 offset); 1806 break; 1807 } else if (ret_val && 1808 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1809 dev_info(&pf->pdev->dev, 1810 "read NVM failed, access, offset 0x%x\n", 1811 offset); 1812 break; 1813 } else if (ret_val) { 1814 dev_info(&pf->pdev->dev, 1815 "read NVM failed offset %d err=%d status=0x%x\n", 1816 offset, ret_val, hw->aq.asq_last_status); 1817 break; 1818 } 1819 } 1820 1821 i40e_release_nvm(hw); 1822 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1823 free_buff: 1824 kfree(eeprom_buff); 1825 return ret_val; 1826 } 1827 1828 static int i40e_get_eeprom_len(struct net_device *netdev) 1829 { 1830 struct i40e_netdev_priv *np = netdev_priv(netdev); 1831 struct i40e_hw *hw = &np->vsi->back->hw; 1832 u32 val; 1833 1834 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1835 if (hw->mac.type == I40E_MAC_X722) { 1836 val = X722_EEPROM_SCOPE_LIMIT + 1; 1837 return val; 1838 } 1839 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1840 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1841 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1842 /* register returns value in power of 2, 64Kbyte chunks. */ 1843 val = (64 * 1024) * BIT(val); 1844 return val; 1845 } 1846 1847 static int i40e_set_eeprom(struct net_device *netdev, 1848 struct ethtool_eeprom *eeprom, u8 *bytes) 1849 { 1850 struct i40e_netdev_priv *np = netdev_priv(netdev); 1851 struct i40e_hw *hw = &np->vsi->back->hw; 1852 struct i40e_pf *pf = np->vsi->back; 1853 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1854 int ret_val = 0; 1855 int errno = 0; 1856 u32 magic; 1857 1858 /* normal ethtool set_eeprom is not supported */ 1859 magic = hw->vendor_id | (hw->device_id << 16); 1860 if (eeprom->magic == magic) 1861 errno = -EOPNOTSUPP; 1862 /* check for NVMUpdate access method */ 1863 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1864 errno = -EINVAL; 1865 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1866 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1867 errno = -EBUSY; 1868 else 1869 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1870 1871 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1872 dev_info(&pf->pdev->dev, 1873 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1874 ret_val, hw->aq.asq_last_status, errno, 1875 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1876 cmd->offset, cmd->data_size); 1877 1878 return errno; 1879 } 1880 1881 static void i40e_get_drvinfo(struct net_device *netdev, 1882 struct ethtool_drvinfo *drvinfo) 1883 { 1884 struct i40e_netdev_priv *np = netdev_priv(netdev); 1885 struct i40e_vsi *vsi = np->vsi; 1886 struct i40e_pf *pf = vsi->back; 1887 1888 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1889 strlcpy(drvinfo->version, i40e_driver_version_str, 1890 sizeof(drvinfo->version)); 1891 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1892 sizeof(drvinfo->fw_version)); 1893 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1894 sizeof(drvinfo->bus_info)); 1895 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1896 if (pf->hw.pf_id == 0) 1897 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1898 } 1899 1900 static void i40e_get_ringparam(struct net_device *netdev, 1901 struct ethtool_ringparam *ring) 1902 { 1903 struct i40e_netdev_priv *np = netdev_priv(netdev); 1904 struct i40e_pf *pf = np->vsi->back; 1905 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1906 1907 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1908 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1909 ring->rx_mini_max_pending = 0; 1910 ring->rx_jumbo_max_pending = 0; 1911 ring->rx_pending = vsi->rx_rings[0]->count; 1912 ring->tx_pending = vsi->tx_rings[0]->count; 1913 ring->rx_mini_pending = 0; 1914 ring->rx_jumbo_pending = 0; 1915 } 1916 1917 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1918 { 1919 if (i40e_enabled_xdp_vsi(vsi)) { 1920 return index < vsi->num_queue_pairs || 1921 (index >= vsi->alloc_queue_pairs && 1922 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1923 } 1924 1925 return index < vsi->num_queue_pairs; 1926 } 1927 1928 static int i40e_set_ringparam(struct net_device *netdev, 1929 struct ethtool_ringparam *ring) 1930 { 1931 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1932 struct i40e_netdev_priv *np = netdev_priv(netdev); 1933 struct i40e_hw *hw = &np->vsi->back->hw; 1934 struct i40e_vsi *vsi = np->vsi; 1935 struct i40e_pf *pf = vsi->back; 1936 u32 new_rx_count, new_tx_count; 1937 u16 tx_alloc_queue_pairs; 1938 int timeout = 50; 1939 int i, err = 0; 1940 1941 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1942 return -EINVAL; 1943 1944 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1945 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1946 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1947 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1948 netdev_info(netdev, 1949 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1950 ring->tx_pending, ring->rx_pending, 1951 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1952 return -EINVAL; 1953 } 1954 1955 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1956 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1957 1958 /* if nothing to do return success */ 1959 if ((new_tx_count == vsi->tx_rings[0]->count) && 1960 (new_rx_count == vsi->rx_rings[0]->count)) 1961 return 0; 1962 1963 /* If there is a AF_XDP UMEM attached to any of Rx rings, 1964 * disallow changing the number of descriptors -- regardless 1965 * if the netdev is running or not. 1966 */ 1967 if (i40e_xsk_any_rx_ring_enabled(vsi)) 1968 return -EBUSY; 1969 1970 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1971 timeout--; 1972 if (!timeout) 1973 return -EBUSY; 1974 usleep_range(1000, 2000); 1975 } 1976 1977 if (!netif_running(vsi->netdev)) { 1978 /* simple case - set for the next time the netdev is started */ 1979 for (i = 0; i < vsi->num_queue_pairs; i++) { 1980 vsi->tx_rings[i]->count = new_tx_count; 1981 vsi->rx_rings[i]->count = new_rx_count; 1982 if (i40e_enabled_xdp_vsi(vsi)) 1983 vsi->xdp_rings[i]->count = new_tx_count; 1984 } 1985 goto done; 1986 } 1987 1988 /* We can't just free everything and then setup again, 1989 * because the ISRs in MSI-X mode get passed pointers 1990 * to the Tx and Rx ring structs. 1991 */ 1992 1993 /* alloc updated Tx and XDP Tx resources */ 1994 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1995 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1996 if (new_tx_count != vsi->tx_rings[0]->count) { 1997 netdev_info(netdev, 1998 "Changing Tx descriptor count from %d to %d.\n", 1999 vsi->tx_rings[0]->count, new_tx_count); 2000 tx_rings = kcalloc(tx_alloc_queue_pairs, 2001 sizeof(struct i40e_ring), GFP_KERNEL); 2002 if (!tx_rings) { 2003 err = -ENOMEM; 2004 goto done; 2005 } 2006 2007 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2008 if (!i40e_active_tx_ring_index(vsi, i)) 2009 continue; 2010 2011 tx_rings[i] = *vsi->tx_rings[i]; 2012 tx_rings[i].count = new_tx_count; 2013 /* the desc and bi pointers will be reallocated in the 2014 * setup call 2015 */ 2016 tx_rings[i].desc = NULL; 2017 tx_rings[i].rx_bi = NULL; 2018 err = i40e_setup_tx_descriptors(&tx_rings[i]); 2019 if (err) { 2020 while (i) { 2021 i--; 2022 if (!i40e_active_tx_ring_index(vsi, i)) 2023 continue; 2024 i40e_free_tx_resources(&tx_rings[i]); 2025 } 2026 kfree(tx_rings); 2027 tx_rings = NULL; 2028 2029 goto done; 2030 } 2031 } 2032 } 2033 2034 /* alloc updated Rx resources */ 2035 if (new_rx_count != vsi->rx_rings[0]->count) { 2036 netdev_info(netdev, 2037 "Changing Rx descriptor count from %d to %d\n", 2038 vsi->rx_rings[0]->count, new_rx_count); 2039 rx_rings = kcalloc(vsi->alloc_queue_pairs, 2040 sizeof(struct i40e_ring), GFP_KERNEL); 2041 if (!rx_rings) { 2042 err = -ENOMEM; 2043 goto free_tx; 2044 } 2045 2046 for (i = 0; i < vsi->num_queue_pairs; i++) { 2047 u16 unused; 2048 2049 /* clone ring and setup updated count */ 2050 rx_rings[i] = *vsi->rx_rings[i]; 2051 rx_rings[i].count = new_rx_count; 2052 /* the desc and bi pointers will be reallocated in the 2053 * setup call 2054 */ 2055 rx_rings[i].desc = NULL; 2056 rx_rings[i].rx_bi = NULL; 2057 /* Clear cloned XDP RX-queue info before setup call */ 2058 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 2059 /* this is to allow wr32 to have something to write to 2060 * during early allocation of Rx buffers 2061 */ 2062 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 2063 err = i40e_setup_rx_descriptors(&rx_rings[i]); 2064 if (err) 2065 goto rx_unwind; 2066 2067 /* now allocate the Rx buffers to make sure the OS 2068 * has enough memory, any failure here means abort 2069 */ 2070 unused = I40E_DESC_UNUSED(&rx_rings[i]); 2071 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 2072 rx_unwind: 2073 if (err) { 2074 do { 2075 i40e_free_rx_resources(&rx_rings[i]); 2076 } while (i--); 2077 kfree(rx_rings); 2078 rx_rings = NULL; 2079 2080 goto free_tx; 2081 } 2082 } 2083 } 2084 2085 /* Bring interface down, copy in the new ring info, 2086 * then restore the interface 2087 */ 2088 i40e_down(vsi); 2089 2090 if (tx_rings) { 2091 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2092 if (i40e_active_tx_ring_index(vsi, i)) { 2093 i40e_free_tx_resources(vsi->tx_rings[i]); 2094 *vsi->tx_rings[i] = tx_rings[i]; 2095 } 2096 } 2097 kfree(tx_rings); 2098 tx_rings = NULL; 2099 } 2100 2101 if (rx_rings) { 2102 for (i = 0; i < vsi->num_queue_pairs; i++) { 2103 i40e_free_rx_resources(vsi->rx_rings[i]); 2104 /* get the real tail offset */ 2105 rx_rings[i].tail = vsi->rx_rings[i]->tail; 2106 /* this is to fake out the allocation routine 2107 * into thinking it has to realloc everything 2108 * but the recycling logic will let us re-use 2109 * the buffers allocated above 2110 */ 2111 rx_rings[i].next_to_use = 0; 2112 rx_rings[i].next_to_clean = 0; 2113 rx_rings[i].next_to_alloc = 0; 2114 /* do a struct copy */ 2115 *vsi->rx_rings[i] = rx_rings[i]; 2116 } 2117 kfree(rx_rings); 2118 rx_rings = NULL; 2119 } 2120 2121 i40e_up(vsi); 2122 2123 free_tx: 2124 /* error cleanup if the Rx allocations failed after getting Tx */ 2125 if (tx_rings) { 2126 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2127 if (i40e_active_tx_ring_index(vsi, i)) 2128 i40e_free_tx_resources(vsi->tx_rings[i]); 2129 } 2130 kfree(tx_rings); 2131 tx_rings = NULL; 2132 } 2133 2134 done: 2135 clear_bit(__I40E_CONFIG_BUSY, pf->state); 2136 2137 return err; 2138 } 2139 2140 /** 2141 * i40e_get_stats_count - return the stats count for a device 2142 * @netdev: the netdev to return the count for 2143 * 2144 * Returns the total number of statistics for this netdev. Note that even 2145 * though this is a function, it is required that the count for a specific 2146 * netdev must never change. Basing the count on static values such as the 2147 * maximum number of queues or the device type is ok. However, the API for 2148 * obtaining stats is *not* safe against changes based on non-static 2149 * values such as the *current* number of queues, or runtime flags. 2150 * 2151 * If a statistic is not always enabled, return it as part of the count 2152 * anyways, always return its string, and report its value as zero. 2153 **/ 2154 static int i40e_get_stats_count(struct net_device *netdev) 2155 { 2156 struct i40e_netdev_priv *np = netdev_priv(netdev); 2157 struct i40e_vsi *vsi = np->vsi; 2158 struct i40e_pf *pf = vsi->back; 2159 int stats_len; 2160 2161 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 2162 stats_len = I40E_PF_STATS_LEN; 2163 else 2164 stats_len = I40E_VSI_STATS_LEN; 2165 2166 /* The number of stats reported for a given net_device must remain 2167 * constant throughout the life of that device. 2168 * 2169 * This is because the API for obtaining the size, strings, and stats 2170 * is spread out over three separate ethtool ioctls. There is no safe 2171 * way to lock the number of stats across these calls, so we must 2172 * assume that they will never change. 2173 * 2174 * Due to this, we report the maximum number of queues, even if not 2175 * every queue is currently configured. Since we always allocate 2176 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 2177 * works because the num_tx_queues is set at device creation and never 2178 * changes. 2179 */ 2180 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 2181 2182 return stats_len; 2183 } 2184 2185 static int i40e_get_sset_count(struct net_device *netdev, int sset) 2186 { 2187 struct i40e_netdev_priv *np = netdev_priv(netdev); 2188 struct i40e_vsi *vsi = np->vsi; 2189 struct i40e_pf *pf = vsi->back; 2190 2191 switch (sset) { 2192 case ETH_SS_TEST: 2193 return I40E_TEST_LEN; 2194 case ETH_SS_STATS: 2195 return i40e_get_stats_count(netdev); 2196 case ETH_SS_PRIV_FLAGS: 2197 return I40E_PRIV_FLAGS_STR_LEN + 2198 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 2199 default: 2200 return -EOPNOTSUPP; 2201 } 2202 } 2203 2204 /** 2205 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 2206 * @pf: the PF device structure 2207 * @i: the priority value to copy 2208 * 2209 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 2210 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 2211 * of the PFC stats for the given priority. 2212 **/ 2213 static inline struct i40e_pfc_stats 2214 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 2215 { 2216 #define I40E_GET_PFC_STAT(stat, priority) \ 2217 .stat = pf->stats.stat[priority] 2218 2219 struct i40e_pfc_stats pfc = { 2220 I40E_GET_PFC_STAT(priority_xon_rx, i), 2221 I40E_GET_PFC_STAT(priority_xoff_rx, i), 2222 I40E_GET_PFC_STAT(priority_xon_tx, i), 2223 I40E_GET_PFC_STAT(priority_xoff_tx, i), 2224 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 2225 }; 2226 return pfc; 2227 } 2228 2229 /** 2230 * i40e_get_ethtool_stats - copy stat values into supplied buffer 2231 * @netdev: the netdev to collect stats for 2232 * @stats: ethtool stats command structure 2233 * @data: ethtool supplied buffer 2234 * 2235 * Copy the stats values for this netdev into the buffer. Expects data to be 2236 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 2237 * statistics must be copied in a static order, and the count must not change 2238 * for a given netdev. See i40e_get_stats_count for more details. 2239 * 2240 * If a statistic is not currently valid (such as a disabled queue), this 2241 * function reports its value as zero. 2242 **/ 2243 static void i40e_get_ethtool_stats(struct net_device *netdev, 2244 struct ethtool_stats *stats, u64 *data) 2245 { 2246 struct i40e_netdev_priv *np = netdev_priv(netdev); 2247 struct i40e_vsi *vsi = np->vsi; 2248 struct i40e_pf *pf = vsi->back; 2249 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 2250 unsigned int i; 2251 bool veb_stats; 2252 u64 *p = data; 2253 2254 i40e_update_stats(vsi); 2255 2256 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2257 i40e_gstrings_net_stats); 2258 2259 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2260 2261 rcu_read_lock(); 2262 for (i = 0; i < netdev->num_tx_queues; i++) { 2263 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2264 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2265 } 2266 rcu_read_unlock(); 2267 2268 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2269 goto check_data_pointer; 2270 2271 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 2272 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 2273 2274 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2275 * we initialize stats to zero and update the data pointer 2276 * intelligently 2277 */ 2278 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2279 i40e_gstrings_veb_stats); 2280 2281 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2282 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2283 i40e_gstrings_veb_tc_stats); 2284 2285 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2286 2287 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2288 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2289 2290 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2291 } 2292 2293 check_data_pointer: 2294 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2295 "ethtool stats count mismatch!"); 2296 } 2297 2298 /** 2299 * i40e_get_stat_strings - copy stat strings into supplied buffer 2300 * @netdev: the netdev to collect strings for 2301 * @data: supplied buffer to copy strings into 2302 * 2303 * Copy the strings related to stats for this netdev. Expects data to be 2304 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2305 * strings must be copied in a static order and the total count must not 2306 * change for a given netdev. See i40e_get_stats_count for more details. 2307 **/ 2308 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2309 { 2310 struct i40e_netdev_priv *np = netdev_priv(netdev); 2311 struct i40e_vsi *vsi = np->vsi; 2312 struct i40e_pf *pf = vsi->back; 2313 unsigned int i; 2314 u8 *p = data; 2315 2316 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2317 2318 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2319 2320 for (i = 0; i < netdev->num_tx_queues; i++) { 2321 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2322 "tx", i); 2323 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2324 "rx", i); 2325 } 2326 2327 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2328 return; 2329 2330 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2331 2332 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2333 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2334 2335 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2336 2337 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2338 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2339 2340 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2341 "stat strings count mismatch!"); 2342 } 2343 2344 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2345 { 2346 struct i40e_netdev_priv *np = netdev_priv(netdev); 2347 struct i40e_vsi *vsi = np->vsi; 2348 struct i40e_pf *pf = vsi->back; 2349 char *p = (char *)data; 2350 unsigned int i; 2351 2352 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 2353 snprintf(p, ETH_GSTRING_LEN, "%s", 2354 i40e_gstrings_priv_flags[i].flag_string); 2355 p += ETH_GSTRING_LEN; 2356 } 2357 if (pf->hw.pf_id != 0) 2358 return; 2359 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 2360 snprintf(p, ETH_GSTRING_LEN, "%s", 2361 i40e_gl_gstrings_priv_flags[i].flag_string); 2362 p += ETH_GSTRING_LEN; 2363 } 2364 } 2365 2366 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2367 u8 *data) 2368 { 2369 switch (stringset) { 2370 case ETH_SS_TEST: 2371 memcpy(data, i40e_gstrings_test, 2372 I40E_TEST_LEN * ETH_GSTRING_LEN); 2373 break; 2374 case ETH_SS_STATS: 2375 i40e_get_stat_strings(netdev, data); 2376 break; 2377 case ETH_SS_PRIV_FLAGS: 2378 i40e_get_priv_flag_strings(netdev, data); 2379 break; 2380 default: 2381 break; 2382 } 2383 } 2384 2385 static int i40e_get_ts_info(struct net_device *dev, 2386 struct ethtool_ts_info *info) 2387 { 2388 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2389 2390 /* only report HW timestamping if PTP is enabled */ 2391 if (!(pf->flags & I40E_FLAG_PTP)) 2392 return ethtool_op_get_ts_info(dev, info); 2393 2394 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2395 SOF_TIMESTAMPING_RX_SOFTWARE | 2396 SOF_TIMESTAMPING_SOFTWARE | 2397 SOF_TIMESTAMPING_TX_HARDWARE | 2398 SOF_TIMESTAMPING_RX_HARDWARE | 2399 SOF_TIMESTAMPING_RAW_HARDWARE; 2400 2401 if (pf->ptp_clock) 2402 info->phc_index = ptp_clock_index(pf->ptp_clock); 2403 else 2404 info->phc_index = -1; 2405 2406 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2407 2408 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2409 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2410 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2411 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2412 2413 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 2414 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2415 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2416 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2417 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2418 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2419 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2420 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2421 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2422 2423 return 0; 2424 } 2425 2426 static u64 i40e_link_test(struct net_device *netdev, u64 *data) 2427 { 2428 struct i40e_netdev_priv *np = netdev_priv(netdev); 2429 struct i40e_pf *pf = np->vsi->back; 2430 i40e_status status; 2431 bool link_up = false; 2432 2433 netif_info(pf, hw, netdev, "link test\n"); 2434 status = i40e_get_link_status(&pf->hw, &link_up); 2435 if (status) { 2436 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2437 *data = 1; 2438 return *data; 2439 } 2440 2441 if (link_up) 2442 *data = 0; 2443 else 2444 *data = 1; 2445 2446 return *data; 2447 } 2448 2449 static u64 i40e_reg_test(struct net_device *netdev, u64 *data) 2450 { 2451 struct i40e_netdev_priv *np = netdev_priv(netdev); 2452 struct i40e_pf *pf = np->vsi->back; 2453 2454 netif_info(pf, hw, netdev, "register test\n"); 2455 *data = i40e_diag_reg_test(&pf->hw); 2456 2457 return *data; 2458 } 2459 2460 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data) 2461 { 2462 struct i40e_netdev_priv *np = netdev_priv(netdev); 2463 struct i40e_pf *pf = np->vsi->back; 2464 2465 netif_info(pf, hw, netdev, "eeprom test\n"); 2466 *data = i40e_diag_eeprom_test(&pf->hw); 2467 2468 /* forcebly clear the NVM Update state machine */ 2469 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2470 2471 return *data; 2472 } 2473 2474 static u64 i40e_intr_test(struct net_device *netdev, u64 *data) 2475 { 2476 struct i40e_netdev_priv *np = netdev_priv(netdev); 2477 struct i40e_pf *pf = np->vsi->back; 2478 u16 swc_old = pf->sw_int_count; 2479 2480 netif_info(pf, hw, netdev, "interrupt test\n"); 2481 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2482 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2483 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2484 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2485 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2486 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2487 usleep_range(1000, 2000); 2488 *data = (swc_old == pf->sw_int_count); 2489 2490 return *data; 2491 } 2492 2493 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2494 { 2495 struct i40e_vf *vfs = pf->vf; 2496 int i; 2497 2498 for (i = 0; i < pf->num_alloc_vfs; i++) 2499 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2500 return true; 2501 return false; 2502 } 2503 2504 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2505 { 2506 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2507 } 2508 2509 static void i40e_diag_test(struct net_device *netdev, 2510 struct ethtool_test *eth_test, u64 *data) 2511 { 2512 struct i40e_netdev_priv *np = netdev_priv(netdev); 2513 bool if_running = netif_running(netdev); 2514 struct i40e_pf *pf = np->vsi->back; 2515 2516 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2517 /* Offline tests */ 2518 netif_info(pf, drv, netdev, "offline testing starting\n"); 2519 2520 set_bit(__I40E_TESTING, pf->state); 2521 2522 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2523 dev_warn(&pf->pdev->dev, 2524 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2525 data[I40E_ETH_TEST_REG] = 1; 2526 data[I40E_ETH_TEST_EEPROM] = 1; 2527 data[I40E_ETH_TEST_INTR] = 1; 2528 data[I40E_ETH_TEST_LINK] = 1; 2529 eth_test->flags |= ETH_TEST_FL_FAILED; 2530 clear_bit(__I40E_TESTING, pf->state); 2531 goto skip_ol_tests; 2532 } 2533 2534 /* If the device is online then take it offline */ 2535 if (if_running) 2536 /* indicate we're in test mode */ 2537 i40e_close(netdev); 2538 else 2539 /* This reset does not affect link - if it is 2540 * changed to a type of reset that does affect 2541 * link then the following link test would have 2542 * to be moved to before the reset 2543 */ 2544 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2545 2546 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2547 eth_test->flags |= ETH_TEST_FL_FAILED; 2548 2549 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2550 eth_test->flags |= ETH_TEST_FL_FAILED; 2551 2552 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2553 eth_test->flags |= ETH_TEST_FL_FAILED; 2554 2555 /* run reg test last, a reset is required after it */ 2556 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2557 eth_test->flags |= ETH_TEST_FL_FAILED; 2558 2559 clear_bit(__I40E_TESTING, pf->state); 2560 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2561 2562 if (if_running) 2563 i40e_open(netdev); 2564 } else { 2565 /* Online tests */ 2566 netif_info(pf, drv, netdev, "online testing starting\n"); 2567 2568 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2569 eth_test->flags |= ETH_TEST_FL_FAILED; 2570 2571 /* Offline only tests, not run in online; pass by default */ 2572 data[I40E_ETH_TEST_REG] = 0; 2573 data[I40E_ETH_TEST_EEPROM] = 0; 2574 data[I40E_ETH_TEST_INTR] = 0; 2575 } 2576 2577 skip_ol_tests: 2578 2579 netif_info(pf, drv, netdev, "testing finished\n"); 2580 } 2581 2582 static void i40e_get_wol(struct net_device *netdev, 2583 struct ethtool_wolinfo *wol) 2584 { 2585 struct i40e_netdev_priv *np = netdev_priv(netdev); 2586 struct i40e_pf *pf = np->vsi->back; 2587 struct i40e_hw *hw = &pf->hw; 2588 u16 wol_nvm_bits; 2589 2590 /* NVM bit on means WoL disabled for the port */ 2591 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2592 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2593 wol->supported = 0; 2594 wol->wolopts = 0; 2595 } else { 2596 wol->supported = WAKE_MAGIC; 2597 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2598 } 2599 } 2600 2601 /** 2602 * i40e_set_wol - set the WakeOnLAN configuration 2603 * @netdev: the netdev in question 2604 * @wol: the ethtool WoL setting data 2605 **/ 2606 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2607 { 2608 struct i40e_netdev_priv *np = netdev_priv(netdev); 2609 struct i40e_pf *pf = np->vsi->back; 2610 struct i40e_vsi *vsi = np->vsi; 2611 struct i40e_hw *hw = &pf->hw; 2612 u16 wol_nvm_bits; 2613 2614 /* WoL not supported if this isn't the controlling PF on the port */ 2615 if (hw->partition_id != 1) { 2616 i40e_partition_setting_complaint(pf); 2617 return -EOPNOTSUPP; 2618 } 2619 2620 if (vsi != pf->vsi[pf->lan_vsi]) 2621 return -EOPNOTSUPP; 2622 2623 /* NVM bit on means WoL disabled for the port */ 2624 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2625 if (BIT(hw->port) & wol_nvm_bits) 2626 return -EOPNOTSUPP; 2627 2628 /* only magic packet is supported */ 2629 if (wol->wolopts & ~WAKE_MAGIC) 2630 return -EOPNOTSUPP; 2631 2632 /* is this a new value? */ 2633 if (pf->wol_en != !!wol->wolopts) { 2634 pf->wol_en = !!wol->wolopts; 2635 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2636 } 2637 2638 return 0; 2639 } 2640 2641 static int i40e_set_phys_id(struct net_device *netdev, 2642 enum ethtool_phys_id_state state) 2643 { 2644 struct i40e_netdev_priv *np = netdev_priv(netdev); 2645 i40e_status ret = 0; 2646 struct i40e_pf *pf = np->vsi->back; 2647 struct i40e_hw *hw = &pf->hw; 2648 int blink_freq = 2; 2649 u16 temp_status; 2650 2651 switch (state) { 2652 case ETHTOOL_ID_ACTIVE: 2653 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2654 pf->led_status = i40e_led_get(hw); 2655 } else { 2656 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2657 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2658 NULL); 2659 ret = i40e_led_get_phy(hw, &temp_status, 2660 &pf->phy_led_val); 2661 pf->led_status = temp_status; 2662 } 2663 return blink_freq; 2664 case ETHTOOL_ID_ON: 2665 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2666 i40e_led_set(hw, 0xf, false); 2667 else 2668 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2669 break; 2670 case ETHTOOL_ID_OFF: 2671 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2672 i40e_led_set(hw, 0x0, false); 2673 else 2674 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2675 break; 2676 case ETHTOOL_ID_INACTIVE: 2677 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2678 i40e_led_set(hw, pf->led_status, false); 2679 } else { 2680 ret = i40e_led_set_phy(hw, false, pf->led_status, 2681 (pf->phy_led_val | 2682 I40E_PHY_LED_MODE_ORIG)); 2683 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2684 i40e_aq_set_phy_debug(hw, 0, NULL); 2685 } 2686 break; 2687 default: 2688 break; 2689 } 2690 if (ret) 2691 return -ENOENT; 2692 else 2693 return 0; 2694 } 2695 2696 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2697 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2698 * 125us (8000 interrupts per second) == ITR(62) 2699 */ 2700 2701 /** 2702 * __i40e_get_coalesce - get per-queue coalesce settings 2703 * @netdev: the netdev to check 2704 * @ec: ethtool coalesce data structure 2705 * @queue: which queue to pick 2706 * 2707 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2708 * are per queue. If queue is <0 then we default to queue 0 as the 2709 * representative value. 2710 **/ 2711 static int __i40e_get_coalesce(struct net_device *netdev, 2712 struct ethtool_coalesce *ec, 2713 int queue) 2714 { 2715 struct i40e_netdev_priv *np = netdev_priv(netdev); 2716 struct i40e_ring *rx_ring, *tx_ring; 2717 struct i40e_vsi *vsi = np->vsi; 2718 2719 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2720 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2721 2722 /* rx and tx usecs has per queue value. If user doesn't specify the 2723 * queue, return queue 0's value to represent. 2724 */ 2725 if (queue < 0) 2726 queue = 0; 2727 else if (queue >= vsi->num_queue_pairs) 2728 return -EINVAL; 2729 2730 rx_ring = vsi->rx_rings[queue]; 2731 tx_ring = vsi->tx_rings[queue]; 2732 2733 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2734 ec->use_adaptive_rx_coalesce = 1; 2735 2736 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2737 ec->use_adaptive_tx_coalesce = 1; 2738 2739 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2740 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2741 2742 /* we use the _usecs_high to store/set the interrupt rate limit 2743 * that the hardware supports, that almost but not quite 2744 * fits the original intent of the ethtool variable, 2745 * the rx_coalesce_usecs_high limits total interrupts 2746 * per second from both tx/rx sources. 2747 */ 2748 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2749 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2750 2751 return 0; 2752 } 2753 2754 /** 2755 * i40e_get_coalesce - get a netdev's coalesce settings 2756 * @netdev: the netdev to check 2757 * @ec: ethtool coalesce data structure 2758 * 2759 * Gets the coalesce settings for a particular netdev. Note that if user has 2760 * modified per-queue settings, this only guarantees to represent queue 0. See 2761 * __i40e_get_coalesce for more details. 2762 **/ 2763 static int i40e_get_coalesce(struct net_device *netdev, 2764 struct ethtool_coalesce *ec) 2765 { 2766 return __i40e_get_coalesce(netdev, ec, -1); 2767 } 2768 2769 /** 2770 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2771 * @netdev: netdev structure 2772 * @ec: ethtool's coalesce settings 2773 * @queue: the particular queue to read 2774 * 2775 * Will read a specific queue's coalesce settings 2776 **/ 2777 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2778 struct ethtool_coalesce *ec) 2779 { 2780 return __i40e_get_coalesce(netdev, ec, queue); 2781 } 2782 2783 /** 2784 * i40e_set_itr_per_queue - set ITR values for specific queue 2785 * @vsi: the VSI to set values for 2786 * @ec: coalesce settings from ethtool 2787 * @queue: the queue to modify 2788 * 2789 * Change the ITR settings for a specific queue. 2790 **/ 2791 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2792 struct ethtool_coalesce *ec, 2793 int queue) 2794 { 2795 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2796 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2797 struct i40e_pf *pf = vsi->back; 2798 struct i40e_hw *hw = &pf->hw; 2799 struct i40e_q_vector *q_vector; 2800 u16 intrl; 2801 2802 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2803 2804 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2805 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2806 2807 if (ec->use_adaptive_rx_coalesce) 2808 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2809 else 2810 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2811 2812 if (ec->use_adaptive_tx_coalesce) 2813 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2814 else 2815 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2816 2817 q_vector = rx_ring->q_vector; 2818 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2819 2820 q_vector = tx_ring->q_vector; 2821 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2822 2823 /* The interrupt handler itself will take care of programming 2824 * the Tx and Rx ITR values based on the values we have entered 2825 * into the q_vector, no need to write the values now. 2826 */ 2827 2828 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2829 i40e_flush(hw); 2830 } 2831 2832 /** 2833 * __i40e_set_coalesce - set coalesce settings for particular queue 2834 * @netdev: the netdev to change 2835 * @ec: ethtool coalesce settings 2836 * @queue: the queue to change 2837 * 2838 * Sets the coalesce settings for a particular queue. 2839 **/ 2840 static int __i40e_set_coalesce(struct net_device *netdev, 2841 struct ethtool_coalesce *ec, 2842 int queue) 2843 { 2844 struct i40e_netdev_priv *np = netdev_priv(netdev); 2845 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2846 struct i40e_vsi *vsi = np->vsi; 2847 struct i40e_pf *pf = vsi->back; 2848 int i; 2849 2850 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2851 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2852 2853 if (queue < 0) { 2854 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2855 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2856 } else if (queue < vsi->num_queue_pairs) { 2857 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2858 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2859 } else { 2860 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2861 vsi->num_queue_pairs - 1); 2862 return -EINVAL; 2863 } 2864 2865 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2866 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2867 2868 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2869 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2870 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2871 return -EINVAL; 2872 } 2873 2874 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2875 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2876 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2877 return -EINVAL; 2878 } 2879 2880 if (ec->rx_coalesce_usecs != cur_rx_itr && 2881 ec->use_adaptive_rx_coalesce) { 2882 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2883 return -EINVAL; 2884 } 2885 2886 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2887 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2888 return -EINVAL; 2889 } 2890 2891 if (ec->tx_coalesce_usecs != cur_tx_itr && 2892 ec->use_adaptive_tx_coalesce) { 2893 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2894 return -EINVAL; 2895 } 2896 2897 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2898 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2899 return -EINVAL; 2900 } 2901 2902 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2903 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2904 2905 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2906 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2907 2908 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2909 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2910 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2911 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2912 vsi->int_rate_limit); 2913 } 2914 2915 /* rx and tx usecs has per queue value. If user doesn't specify the 2916 * queue, apply to all queues. 2917 */ 2918 if (queue < 0) { 2919 for (i = 0; i < vsi->num_queue_pairs; i++) 2920 i40e_set_itr_per_queue(vsi, ec, i); 2921 } else { 2922 i40e_set_itr_per_queue(vsi, ec, queue); 2923 } 2924 2925 return 0; 2926 } 2927 2928 /** 2929 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2930 * @netdev: the netdev to change 2931 * @ec: ethtool coalesce settings 2932 * 2933 * This will set each queue to the same coalesce settings. 2934 **/ 2935 static int i40e_set_coalesce(struct net_device *netdev, 2936 struct ethtool_coalesce *ec) 2937 { 2938 return __i40e_set_coalesce(netdev, ec, -1); 2939 } 2940 2941 /** 2942 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2943 * @netdev: the netdev to change 2944 * @ec: ethtool's coalesce settings 2945 * @queue: the queue to change 2946 * 2947 * Sets the specified queue's coalesce settings. 2948 **/ 2949 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2950 struct ethtool_coalesce *ec) 2951 { 2952 return __i40e_set_coalesce(netdev, ec, queue); 2953 } 2954 2955 /** 2956 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2957 * @pf: pointer to the physical function struct 2958 * @cmd: ethtool rxnfc command 2959 * 2960 * Returns Success if the flow is supported, else Invalid Input. 2961 **/ 2962 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2963 { 2964 struct i40e_hw *hw = &pf->hw; 2965 u8 flow_pctype = 0; 2966 u64 i_set = 0; 2967 2968 cmd->data = 0; 2969 2970 switch (cmd->flow_type) { 2971 case TCP_V4_FLOW: 2972 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2973 break; 2974 case UDP_V4_FLOW: 2975 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2976 break; 2977 case TCP_V6_FLOW: 2978 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2979 break; 2980 case UDP_V6_FLOW: 2981 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2982 break; 2983 case SCTP_V4_FLOW: 2984 case AH_ESP_V4_FLOW: 2985 case AH_V4_FLOW: 2986 case ESP_V4_FLOW: 2987 case IPV4_FLOW: 2988 case SCTP_V6_FLOW: 2989 case AH_ESP_V6_FLOW: 2990 case AH_V6_FLOW: 2991 case ESP_V6_FLOW: 2992 case IPV6_FLOW: 2993 /* Default is src/dest for IP, no matter the L4 hashing */ 2994 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2995 break; 2996 default: 2997 return -EINVAL; 2998 } 2999 3000 /* Read flow based hash input set register */ 3001 if (flow_pctype) { 3002 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3003 flow_pctype)) | 3004 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3005 flow_pctype)) << 32); 3006 } 3007 3008 /* Process bits of hash input set */ 3009 if (i_set) { 3010 if (i_set & I40E_L4_SRC_MASK) 3011 cmd->data |= RXH_L4_B_0_1; 3012 if (i_set & I40E_L4_DST_MASK) 3013 cmd->data |= RXH_L4_B_2_3; 3014 3015 if (cmd->flow_type == TCP_V4_FLOW || 3016 cmd->flow_type == UDP_V4_FLOW) { 3017 if (i_set & I40E_L3_SRC_MASK) 3018 cmd->data |= RXH_IP_SRC; 3019 if (i_set & I40E_L3_DST_MASK) 3020 cmd->data |= RXH_IP_DST; 3021 } else if (cmd->flow_type == TCP_V6_FLOW || 3022 cmd->flow_type == UDP_V6_FLOW) { 3023 if (i_set & I40E_L3_V6_SRC_MASK) 3024 cmd->data |= RXH_IP_SRC; 3025 if (i_set & I40E_L3_V6_DST_MASK) 3026 cmd->data |= RXH_IP_DST; 3027 } 3028 } 3029 3030 return 0; 3031 } 3032 3033 /** 3034 * i40e_check_mask - Check whether a mask field is set 3035 * @mask: the full mask value 3036 * @field: mask of the field to check 3037 * 3038 * If the given mask is fully set, return positive value. If the mask for the 3039 * field is fully unset, return zero. Otherwise return a negative error code. 3040 **/ 3041 static int i40e_check_mask(u64 mask, u64 field) 3042 { 3043 u64 value = mask & field; 3044 3045 if (value == field) 3046 return 1; 3047 else if (!value) 3048 return 0; 3049 else 3050 return -1; 3051 } 3052 3053 /** 3054 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 3055 * @fsp: pointer to rx flow specification 3056 * @data: pointer to userdef data structure for storage 3057 * 3058 * Read the user-defined data and deconstruct the value into a structure. No 3059 * other code should read the user-defined data, so as to ensure that every 3060 * place consistently reads the value correctly. 3061 * 3062 * The user-defined field is a 64bit Big Endian format value, which we 3063 * deconstruct by reading bits or bit fields from it. Single bit flags shall 3064 * be defined starting from the highest bits, while small bit field values 3065 * shall be defined starting from the lowest bits. 3066 * 3067 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 3068 * and the filter should be rejected. The data structure will always be 3069 * modified even if FLOW_EXT is not set. 3070 * 3071 **/ 3072 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3073 struct i40e_rx_flow_userdef *data) 3074 { 3075 u64 value, mask; 3076 int valid; 3077 3078 /* Zero memory first so it's always consistent. */ 3079 memset(data, 0, sizeof(*data)); 3080 3081 if (!(fsp->flow_type & FLOW_EXT)) 3082 return 0; 3083 3084 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 3085 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 3086 3087 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 3088 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 3089 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 3090 3091 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 3092 if (valid < 0) { 3093 return -EINVAL; 3094 } else if (valid) { 3095 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 3096 data->flex_offset = 3097 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 3098 data->flex_filter = true; 3099 } 3100 3101 return 0; 3102 } 3103 3104 /** 3105 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 3106 * @fsp: pointer to rx_flow specification 3107 * @data: pointer to return userdef data 3108 * 3109 * Reads the userdef data structure and properly fills in the user defined 3110 * fields of the rx_flow_spec. 3111 **/ 3112 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3113 struct i40e_rx_flow_userdef *data) 3114 { 3115 u64 value = 0, mask = 0; 3116 3117 if (data->flex_filter) { 3118 value |= data->flex_word; 3119 value |= (u64)data->flex_offset << 16; 3120 mask |= I40E_USERDEF_FLEX_FILTER; 3121 } 3122 3123 if (value || mask) 3124 fsp->flow_type |= FLOW_EXT; 3125 3126 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 3127 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 3128 } 3129 3130 /** 3131 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 3132 * @pf: Pointer to the physical function struct 3133 * @cmd: The command to get or set Rx flow classification rules 3134 * @rule_locs: Array of used rule locations 3135 * 3136 * This function populates both the total and actual rule count of 3137 * the ethtool flow classification command 3138 * 3139 * Returns 0 on success or -EMSGSIZE if entry not found 3140 **/ 3141 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 3142 struct ethtool_rxnfc *cmd, 3143 u32 *rule_locs) 3144 { 3145 struct i40e_fdir_filter *rule; 3146 struct hlist_node *node2; 3147 int cnt = 0; 3148 3149 /* report total rule count */ 3150 cmd->data = i40e_get_fd_cnt_all(pf); 3151 3152 hlist_for_each_entry_safe(rule, node2, 3153 &pf->fdir_filter_list, fdir_node) { 3154 if (cnt == cmd->rule_cnt) 3155 return -EMSGSIZE; 3156 3157 rule_locs[cnt] = rule->fd_id; 3158 cnt++; 3159 } 3160 3161 cmd->rule_cnt = cnt; 3162 3163 return 0; 3164 } 3165 3166 /** 3167 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 3168 * @pf: Pointer to the physical function struct 3169 * @cmd: The command to get or set Rx flow classification rules 3170 * 3171 * This function looks up a filter based on the Rx flow classification 3172 * command and fills the flow spec info for it if found 3173 * 3174 * Returns 0 on success or -EINVAL if filter not found 3175 **/ 3176 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 3177 struct ethtool_rxnfc *cmd) 3178 { 3179 struct ethtool_rx_flow_spec *fsp = 3180 (struct ethtool_rx_flow_spec *)&cmd->fs; 3181 struct i40e_rx_flow_userdef userdef = {0}; 3182 struct i40e_fdir_filter *rule = NULL; 3183 struct hlist_node *node2; 3184 u64 input_set; 3185 u16 index; 3186 3187 hlist_for_each_entry_safe(rule, node2, 3188 &pf->fdir_filter_list, fdir_node) { 3189 if (fsp->location <= rule->fd_id) 3190 break; 3191 } 3192 3193 if (!rule || fsp->location != rule->fd_id) 3194 return -EINVAL; 3195 3196 fsp->flow_type = rule->flow_type; 3197 if (fsp->flow_type == IP_USER_FLOW) { 3198 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 3199 fsp->h_u.usr_ip4_spec.proto = 0; 3200 fsp->m_u.usr_ip4_spec.proto = 0; 3201 } 3202 3203 /* Reverse the src and dest notion, since the HW views them from 3204 * Tx perspective where as the user expects it from Rx filter view. 3205 */ 3206 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 3207 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 3208 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 3209 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 3210 3211 switch (rule->flow_type) { 3212 case SCTP_V4_FLOW: 3213 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3214 break; 3215 case TCP_V4_FLOW: 3216 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3217 break; 3218 case UDP_V4_FLOW: 3219 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3220 break; 3221 case IP_USER_FLOW: 3222 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3223 break; 3224 default: 3225 /* If we have stored a filter with a flow type not listed here 3226 * it is almost certainly a driver bug. WARN(), and then 3227 * assign the input_set as if all fields are enabled to avoid 3228 * reading unassigned memory. 3229 */ 3230 WARN(1, "Missing input set index for flow_type %d\n", 3231 rule->flow_type); 3232 input_set = 0xFFFFFFFFFFFFFFFFULL; 3233 goto no_input_set; 3234 } 3235 3236 input_set = i40e_read_fd_input_set(pf, index); 3237 3238 no_input_set: 3239 if (input_set & I40E_L3_SRC_MASK) 3240 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 3241 3242 if (input_set & I40E_L3_DST_MASK) 3243 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 3244 3245 if (input_set & I40E_L4_SRC_MASK) 3246 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 3247 3248 if (input_set & I40E_L4_DST_MASK) 3249 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3250 3251 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3252 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3253 else 3254 fsp->ring_cookie = rule->q_index; 3255 3256 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 3257 struct i40e_vsi *vsi; 3258 3259 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3260 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3261 /* VFs are zero-indexed by the driver, but ethtool 3262 * expects them to be one-indexed, so add one here 3263 */ 3264 u64 ring_vf = vsi->vf_id + 1; 3265 3266 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3267 fsp->ring_cookie |= ring_vf; 3268 } 3269 } 3270 3271 if (rule->flex_filter) { 3272 userdef.flex_filter = true; 3273 userdef.flex_word = be16_to_cpu(rule->flex_word); 3274 userdef.flex_offset = rule->flex_offset; 3275 } 3276 3277 i40e_fill_rx_flow_user_data(fsp, &userdef); 3278 3279 return 0; 3280 } 3281 3282 /** 3283 * i40e_get_rxnfc - command to get RX flow classification rules 3284 * @netdev: network interface device structure 3285 * @cmd: ethtool rxnfc command 3286 * @rule_locs: pointer to store rule data 3287 * 3288 * Returns Success if the command is supported. 3289 **/ 3290 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3291 u32 *rule_locs) 3292 { 3293 struct i40e_netdev_priv *np = netdev_priv(netdev); 3294 struct i40e_vsi *vsi = np->vsi; 3295 struct i40e_pf *pf = vsi->back; 3296 int ret = -EOPNOTSUPP; 3297 3298 switch (cmd->cmd) { 3299 case ETHTOOL_GRXRINGS: 3300 cmd->data = vsi->rss_size; 3301 ret = 0; 3302 break; 3303 case ETHTOOL_GRXFH: 3304 ret = i40e_get_rss_hash_opts(pf, cmd); 3305 break; 3306 case ETHTOOL_GRXCLSRLCNT: 3307 cmd->rule_cnt = pf->fdir_pf_active_filters; 3308 /* report total rule count */ 3309 cmd->data = i40e_get_fd_cnt_all(pf); 3310 ret = 0; 3311 break; 3312 case ETHTOOL_GRXCLSRULE: 3313 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3314 break; 3315 case ETHTOOL_GRXCLSRLALL: 3316 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3317 break; 3318 default: 3319 break; 3320 } 3321 3322 return ret; 3323 } 3324 3325 /** 3326 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3327 * @nfc: pointer to user request 3328 * @i_setc: bits currently set 3329 * 3330 * Returns value of bits to be set per user request 3331 **/ 3332 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 3333 { 3334 u64 i_set = i_setc; 3335 u64 src_l3 = 0, dst_l3 = 0; 3336 3337 if (nfc->data & RXH_L4_B_0_1) 3338 i_set |= I40E_L4_SRC_MASK; 3339 else 3340 i_set &= ~I40E_L4_SRC_MASK; 3341 if (nfc->data & RXH_L4_B_2_3) 3342 i_set |= I40E_L4_DST_MASK; 3343 else 3344 i_set &= ~I40E_L4_DST_MASK; 3345 3346 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3347 src_l3 = I40E_L3_V6_SRC_MASK; 3348 dst_l3 = I40E_L3_V6_DST_MASK; 3349 } else if (nfc->flow_type == TCP_V4_FLOW || 3350 nfc->flow_type == UDP_V4_FLOW) { 3351 src_l3 = I40E_L3_SRC_MASK; 3352 dst_l3 = I40E_L3_DST_MASK; 3353 } else { 3354 /* Any other flow type are not supported here */ 3355 return i_set; 3356 } 3357 3358 if (nfc->data & RXH_IP_SRC) 3359 i_set |= src_l3; 3360 else 3361 i_set &= ~src_l3; 3362 if (nfc->data & RXH_IP_DST) 3363 i_set |= dst_l3; 3364 else 3365 i_set &= ~dst_l3; 3366 3367 return i_set; 3368 } 3369 3370 /** 3371 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3372 * @pf: pointer to the physical function struct 3373 * @nfc: ethtool rxnfc command 3374 * 3375 * Returns Success if the flow input set is supported. 3376 **/ 3377 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3378 { 3379 struct i40e_hw *hw = &pf->hw; 3380 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3381 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3382 u8 flow_pctype = 0; 3383 u64 i_set, i_setc; 3384 3385 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3386 dev_err(&pf->pdev->dev, 3387 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3388 return -EOPNOTSUPP; 3389 } 3390 3391 /* RSS does not support anything other than hashing 3392 * to queues on src and dst IPs and ports 3393 */ 3394 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3395 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3396 return -EINVAL; 3397 3398 switch (nfc->flow_type) { 3399 case TCP_V4_FLOW: 3400 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3401 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3402 hena |= 3403 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3404 break; 3405 case TCP_V6_FLOW: 3406 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3407 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3408 hena |= 3409 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3410 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3411 hena |= 3412 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 3413 break; 3414 case UDP_V4_FLOW: 3415 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3416 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3417 hena |= 3418 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 3419 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 3420 3421 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3422 break; 3423 case UDP_V6_FLOW: 3424 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3425 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3426 hena |= 3427 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 3428 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 3429 3430 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3431 break; 3432 case AH_ESP_V4_FLOW: 3433 case AH_V4_FLOW: 3434 case ESP_V4_FLOW: 3435 case SCTP_V4_FLOW: 3436 if ((nfc->data & RXH_L4_B_0_1) || 3437 (nfc->data & RXH_L4_B_2_3)) 3438 return -EINVAL; 3439 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3440 break; 3441 case AH_ESP_V6_FLOW: 3442 case AH_V6_FLOW: 3443 case ESP_V6_FLOW: 3444 case SCTP_V6_FLOW: 3445 if ((nfc->data & RXH_L4_B_0_1) || 3446 (nfc->data & RXH_L4_B_2_3)) 3447 return -EINVAL; 3448 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3449 break; 3450 case IPV4_FLOW: 3451 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3452 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3453 break; 3454 case IPV6_FLOW: 3455 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3456 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3457 break; 3458 default: 3459 return -EINVAL; 3460 } 3461 3462 if (flow_pctype) { 3463 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3464 flow_pctype)) | 3465 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3466 flow_pctype)) << 32); 3467 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3468 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3469 (u32)i_set); 3470 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3471 (u32)(i_set >> 32)); 3472 hena |= BIT_ULL(flow_pctype); 3473 } 3474 3475 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3476 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3477 i40e_flush(hw); 3478 3479 return 0; 3480 } 3481 3482 /** 3483 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3484 * @vsi: Pointer to the targeted VSI 3485 * @input: The filter to update or NULL to indicate deletion 3486 * @sw_idx: Software index to the filter 3487 * @cmd: The command to get or set Rx flow classification rules 3488 * 3489 * This function updates (or deletes) a Flow Director entry from 3490 * the hlist of the corresponding PF 3491 * 3492 * Returns 0 on success 3493 **/ 3494 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3495 struct i40e_fdir_filter *input, 3496 u16 sw_idx, 3497 struct ethtool_rxnfc *cmd) 3498 { 3499 struct i40e_fdir_filter *rule, *parent; 3500 struct i40e_pf *pf = vsi->back; 3501 struct hlist_node *node2; 3502 int err = -EINVAL; 3503 3504 parent = NULL; 3505 rule = NULL; 3506 3507 hlist_for_each_entry_safe(rule, node2, 3508 &pf->fdir_filter_list, fdir_node) { 3509 /* hash found, or no matching entry */ 3510 if (rule->fd_id >= sw_idx) 3511 break; 3512 parent = rule; 3513 } 3514 3515 /* if there is an old rule occupying our place remove it */ 3516 if (rule && (rule->fd_id == sw_idx)) { 3517 /* Remove this rule, since we're either deleting it, or 3518 * replacing it. 3519 */ 3520 err = i40e_add_del_fdir(vsi, rule, false); 3521 hlist_del(&rule->fdir_node); 3522 kfree(rule); 3523 pf->fdir_pf_active_filters--; 3524 } 3525 3526 /* If we weren't given an input, this is a delete, so just return the 3527 * error code indicating if there was an entry at the requested slot 3528 */ 3529 if (!input) 3530 return err; 3531 3532 /* Otherwise, install the new rule as requested */ 3533 INIT_HLIST_NODE(&input->fdir_node); 3534 3535 /* add filter to the list */ 3536 if (parent) 3537 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3538 else 3539 hlist_add_head(&input->fdir_node, 3540 &pf->fdir_filter_list); 3541 3542 /* update counts */ 3543 pf->fdir_pf_active_filters++; 3544 3545 return 0; 3546 } 3547 3548 /** 3549 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3550 * @pf: pointer to PF structure 3551 * 3552 * This function searches the list of filters and determines which FLX_PIT 3553 * entries are still required. It will prune any entries which are no longer 3554 * in use after the deletion. 3555 **/ 3556 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3557 { 3558 struct i40e_flex_pit *entry, *tmp; 3559 struct i40e_fdir_filter *rule; 3560 3561 /* First, we'll check the l3 table */ 3562 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3563 bool found = false; 3564 3565 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3566 if (rule->flow_type != IP_USER_FLOW) 3567 continue; 3568 if (rule->flex_filter && 3569 rule->flex_offset == entry->src_offset) { 3570 found = true; 3571 break; 3572 } 3573 } 3574 3575 /* If we didn't find the filter, then we can prune this entry 3576 * from the list. 3577 */ 3578 if (!found) { 3579 list_del(&entry->list); 3580 kfree(entry); 3581 } 3582 } 3583 3584 /* Followed by the L4 table */ 3585 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3586 bool found = false; 3587 3588 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3589 /* Skip this filter if it's L3, since we already 3590 * checked those in the above loop 3591 */ 3592 if (rule->flow_type == IP_USER_FLOW) 3593 continue; 3594 if (rule->flex_filter && 3595 rule->flex_offset == entry->src_offset) { 3596 found = true; 3597 break; 3598 } 3599 } 3600 3601 /* If we didn't find the filter, then we can prune this entry 3602 * from the list. 3603 */ 3604 if (!found) { 3605 list_del(&entry->list); 3606 kfree(entry); 3607 } 3608 } 3609 } 3610 3611 /** 3612 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3613 * @vsi: Pointer to the targeted VSI 3614 * @cmd: The command to get or set Rx flow classification rules 3615 * 3616 * The function removes a Flow Director filter entry from the 3617 * hlist of the corresponding PF 3618 * 3619 * Returns 0 on success 3620 */ 3621 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3622 struct ethtool_rxnfc *cmd) 3623 { 3624 struct ethtool_rx_flow_spec *fsp = 3625 (struct ethtool_rx_flow_spec *)&cmd->fs; 3626 struct i40e_pf *pf = vsi->back; 3627 int ret = 0; 3628 3629 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3630 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3631 return -EBUSY; 3632 3633 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3634 return -EBUSY; 3635 3636 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3637 3638 i40e_prune_flex_pit_list(pf); 3639 3640 i40e_fdir_check_and_reenable(pf); 3641 return ret; 3642 } 3643 3644 /** 3645 * i40e_unused_pit_index - Find an unused PIT index for given list 3646 * @pf: the PF data structure 3647 * 3648 * Find the first unused flexible PIT index entry. We search both the L3 and 3649 * L4 flexible PIT lists so that the returned index is unique and unused by 3650 * either currently programmed L3 or L4 filters. We use a bit field as storage 3651 * to track which indexes are already used. 3652 **/ 3653 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3654 { 3655 unsigned long available_index = 0xFF; 3656 struct i40e_flex_pit *entry; 3657 3658 /* We need to make sure that the new index isn't in use by either L3 3659 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3660 * L4 to use the same index. 3661 */ 3662 3663 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3664 clear_bit(entry->pit_index, &available_index); 3665 3666 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3667 clear_bit(entry->pit_index, &available_index); 3668 3669 return find_first_bit(&available_index, 8); 3670 } 3671 3672 /** 3673 * i40e_find_flex_offset - Find an existing flex src_offset 3674 * @flex_pit_list: L3 or L4 flex PIT list 3675 * @src_offset: new src_offset to find 3676 * 3677 * Searches the flex_pit_list for an existing offset. If no offset is 3678 * currently programmed, then this will return an ERR_PTR if there is no space 3679 * to add a new offset, otherwise it returns NULL. 3680 **/ 3681 static 3682 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3683 u16 src_offset) 3684 { 3685 struct i40e_flex_pit *entry; 3686 int size = 0; 3687 3688 /* Search for the src_offset first. If we find a matching entry 3689 * already programmed, we can simply re-use it. 3690 */ 3691 list_for_each_entry(entry, flex_pit_list, list) { 3692 size++; 3693 if (entry->src_offset == src_offset) 3694 return entry; 3695 } 3696 3697 /* If we haven't found an entry yet, then the provided src offset has 3698 * not yet been programmed. We will program the src offset later on, 3699 * but we need to indicate whether there is enough space to do so 3700 * here. We'll make use of ERR_PTR for this purpose. 3701 */ 3702 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3703 return ERR_PTR(-ENOSPC); 3704 3705 return NULL; 3706 } 3707 3708 /** 3709 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3710 * @flex_pit_list: L3 or L4 flex PIT list 3711 * @src_offset: new src_offset to add 3712 * @pit_index: the PIT index to program 3713 * 3714 * This function programs the new src_offset to the list. It is expected that 3715 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3716 * that this offset is not programmed, and that the list has enough space to 3717 * store another offset. 3718 * 3719 * Returns 0 on success, and negative value on error. 3720 **/ 3721 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3722 u16 src_offset, 3723 u8 pit_index) 3724 { 3725 struct i40e_flex_pit *new_pit, *entry; 3726 3727 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3728 if (!new_pit) 3729 return -ENOMEM; 3730 3731 new_pit->src_offset = src_offset; 3732 new_pit->pit_index = pit_index; 3733 3734 /* We need to insert this item such that the list is sorted by 3735 * src_offset in ascending order. 3736 */ 3737 list_for_each_entry(entry, flex_pit_list, list) { 3738 if (new_pit->src_offset < entry->src_offset) { 3739 list_add_tail(&new_pit->list, &entry->list); 3740 return 0; 3741 } 3742 3743 /* If we found an entry with our offset already programmed we 3744 * can simply return here, after freeing the memory. However, 3745 * if the pit_index does not match we need to report an error. 3746 */ 3747 if (new_pit->src_offset == entry->src_offset) { 3748 int err = 0; 3749 3750 /* If the PIT index is not the same we can't re-use 3751 * the entry, so we must report an error. 3752 */ 3753 if (new_pit->pit_index != entry->pit_index) 3754 err = -EINVAL; 3755 3756 kfree(new_pit); 3757 return err; 3758 } 3759 } 3760 3761 /* If we reached here, then we haven't yet added the item. This means 3762 * that we should add the item at the end of the list. 3763 */ 3764 list_add_tail(&new_pit->list, flex_pit_list); 3765 return 0; 3766 } 3767 3768 /** 3769 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3770 * @pf: Pointer to the PF structure 3771 * @flex_pit_list: list of flexible src offsets in use 3772 * @flex_pit_start: index to first entry for this section of the table 3773 * 3774 * In order to handle flexible data, the hardware uses a table of values 3775 * called the FLX_PIT table. This table is used to indicate which sections of 3776 * the input correspond to what PIT index values. Unfortunately, hardware is 3777 * very restrictive about programming this table. Entries must be ordered by 3778 * src_offset in ascending order, without duplicates. Additionally, unused 3779 * entries must be set to the unused index value, and must have valid size and 3780 * length according to the src_offset ordering. 3781 * 3782 * This function will reprogram the FLX_PIT register from a book-keeping 3783 * structure that we guarantee is already ordered correctly, and has no more 3784 * than 3 entries. 3785 * 3786 * To make things easier, we only support flexible values of one word length, 3787 * rather than allowing variable length flexible values. 3788 **/ 3789 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3790 struct list_head *flex_pit_list, 3791 int flex_pit_start) 3792 { 3793 struct i40e_flex_pit *entry = NULL; 3794 u16 last_offset = 0; 3795 int i = 0, j = 0; 3796 3797 /* First, loop over the list of flex PIT entries, and reprogram the 3798 * registers. 3799 */ 3800 list_for_each_entry(entry, flex_pit_list, list) { 3801 /* We have to be careful when programming values for the 3802 * largest SRC_OFFSET value. It is possible that adding 3803 * additional empty values at the end would overflow the space 3804 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3805 * we check here and add the empty values prior to adding the 3806 * largest value. 3807 * 3808 * To determine this, we will use a loop from i+1 to 3, which 3809 * will determine whether the unused entries would have valid 3810 * SRC_OFFSET. Note that there cannot be extra entries past 3811 * this value, because the only valid values would have been 3812 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3813 * have been added to the list in the first place. 3814 */ 3815 for (j = i + 1; j < 3; j++) { 3816 u16 offset = entry->src_offset + j; 3817 int index = flex_pit_start + i; 3818 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3819 1, 3820 offset - 3); 3821 3822 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3823 i40e_write_rx_ctl(&pf->hw, 3824 I40E_PRTQF_FLX_PIT(index), 3825 value); 3826 i++; 3827 } 3828 } 3829 3830 /* Now, we can program the actual value into the table */ 3831 i40e_write_rx_ctl(&pf->hw, 3832 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3833 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3834 1, 3835 entry->src_offset)); 3836 i++; 3837 } 3838 3839 /* In order to program the last entries in the table, we need to 3840 * determine the valid offset. If the list is empty, we'll just start 3841 * with 0. Otherwise, we'll start with the last item offset and add 1. 3842 * This ensures that all entries have valid sizes. If we don't do this 3843 * correctly, the hardware will disable flexible field parsing. 3844 */ 3845 if (!list_empty(flex_pit_list)) 3846 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3847 3848 for (; i < 3; i++, last_offset++) { 3849 i40e_write_rx_ctl(&pf->hw, 3850 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3851 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3852 1, 3853 last_offset)); 3854 } 3855 } 3856 3857 /** 3858 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3859 * @pf: pointer to the PF structure 3860 * 3861 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3862 * internal helper function for implementation details. 3863 **/ 3864 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3865 { 3866 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3867 I40E_FLEX_PIT_IDX_START_L3); 3868 3869 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3870 I40E_FLEX_PIT_IDX_START_L4); 3871 3872 /* We also need to program the L3 and L4 GLQF ORT register */ 3873 i40e_write_rx_ctl(&pf->hw, 3874 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3875 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3876 3, 1)); 3877 3878 i40e_write_rx_ctl(&pf->hw, 3879 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3880 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3881 3, 1)); 3882 } 3883 3884 /** 3885 * i40e_flow_str - Converts a flow_type into a human readable string 3886 * @fsp: the flow specification 3887 * 3888 * Currently only flow types we support are included here, and the string 3889 * value attempts to match what ethtool would use to configure this flow type. 3890 **/ 3891 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3892 { 3893 switch (fsp->flow_type & ~FLOW_EXT) { 3894 case TCP_V4_FLOW: 3895 return "tcp4"; 3896 case UDP_V4_FLOW: 3897 return "udp4"; 3898 case SCTP_V4_FLOW: 3899 return "sctp4"; 3900 case IP_USER_FLOW: 3901 return "ip4"; 3902 default: 3903 return "unknown"; 3904 } 3905 } 3906 3907 /** 3908 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3909 * @pit_index: PIT index to convert 3910 * 3911 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3912 * of range. 3913 **/ 3914 static u64 i40e_pit_index_to_mask(int pit_index) 3915 { 3916 switch (pit_index) { 3917 case 0: 3918 return I40E_FLEX_50_MASK; 3919 case 1: 3920 return I40E_FLEX_51_MASK; 3921 case 2: 3922 return I40E_FLEX_52_MASK; 3923 case 3: 3924 return I40E_FLEX_53_MASK; 3925 case 4: 3926 return I40E_FLEX_54_MASK; 3927 case 5: 3928 return I40E_FLEX_55_MASK; 3929 case 6: 3930 return I40E_FLEX_56_MASK; 3931 case 7: 3932 return I40E_FLEX_57_MASK; 3933 default: 3934 return 0; 3935 } 3936 } 3937 3938 /** 3939 * i40e_print_input_set - Show changes between two input sets 3940 * @vsi: the vsi being configured 3941 * @old: the old input set 3942 * @new: the new input set 3943 * 3944 * Print the difference between old and new input sets by showing which series 3945 * of words are toggled on or off. Only displays the bits we actually support 3946 * changing. 3947 **/ 3948 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3949 { 3950 struct i40e_pf *pf = vsi->back; 3951 bool old_value, new_value; 3952 int i; 3953 3954 old_value = !!(old & I40E_L3_SRC_MASK); 3955 new_value = !!(new & I40E_L3_SRC_MASK); 3956 if (old_value != new_value) 3957 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3958 old_value ? "ON" : "OFF", 3959 new_value ? "ON" : "OFF"); 3960 3961 old_value = !!(old & I40E_L3_DST_MASK); 3962 new_value = !!(new & I40E_L3_DST_MASK); 3963 if (old_value != new_value) 3964 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3965 old_value ? "ON" : "OFF", 3966 new_value ? "ON" : "OFF"); 3967 3968 old_value = !!(old & I40E_L4_SRC_MASK); 3969 new_value = !!(new & I40E_L4_SRC_MASK); 3970 if (old_value != new_value) 3971 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3972 old_value ? "ON" : "OFF", 3973 new_value ? "ON" : "OFF"); 3974 3975 old_value = !!(old & I40E_L4_DST_MASK); 3976 new_value = !!(new & I40E_L4_DST_MASK); 3977 if (old_value != new_value) 3978 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3979 old_value ? "ON" : "OFF", 3980 new_value ? "ON" : "OFF"); 3981 3982 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3983 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3984 if (old_value != new_value) 3985 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3986 old_value ? "ON" : "OFF", 3987 new_value ? "ON" : "OFF"); 3988 3989 /* Show change of flexible filter entries */ 3990 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3991 u64 flex_mask = i40e_pit_index_to_mask(i); 3992 3993 old_value = !!(old & flex_mask); 3994 new_value = !!(new & flex_mask); 3995 if (old_value != new_value) 3996 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3997 i, 3998 old_value ? "ON" : "OFF", 3999 new_value ? "ON" : "OFF"); 4000 } 4001 4002 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 4003 old); 4004 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 4005 new); 4006 } 4007 4008 /** 4009 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 4010 * @vsi: pointer to the targeted VSI 4011 * @fsp: pointer to Rx flow specification 4012 * @userdef: userdefined data from flow specification 4013 * 4014 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 4015 * for partial matches exists with a few limitations. First, hardware only 4016 * supports masking by word boundary (2 bytes) and not per individual bit. 4017 * Second, hardware is limited to using one mask for a flow type and cannot 4018 * use a separate mask for each filter. 4019 * 4020 * To support these limitations, if we already have a configured filter for 4021 * the specified type, this function enforces that new filters of the type 4022 * match the configured input set. Otherwise, if we do not have a filter of 4023 * the specified type, we allow the input set to be updated to match the 4024 * desired filter. 4025 * 4026 * To help ensure that administrators understand why filters weren't displayed 4027 * as supported, we print a diagnostic message displaying how the input set 4028 * would change and warning to delete the preexisting filters if required. 4029 * 4030 * Returns 0 on successful input set match, and a negative return code on 4031 * failure. 4032 **/ 4033 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 4034 struct ethtool_rx_flow_spec *fsp, 4035 struct i40e_rx_flow_userdef *userdef) 4036 { 4037 struct i40e_pf *pf = vsi->back; 4038 struct ethtool_tcpip4_spec *tcp_ip4_spec; 4039 struct ethtool_usrip4_spec *usr_ip4_spec; 4040 u64 current_mask, new_mask; 4041 bool new_flex_offset = false; 4042 bool flex_l3 = false; 4043 u16 *fdir_filter_count; 4044 u16 index, src_offset = 0; 4045 u8 pit_index = 0; 4046 int err; 4047 4048 switch (fsp->flow_type & ~FLOW_EXT) { 4049 case SCTP_V4_FLOW: 4050 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 4051 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 4052 break; 4053 case TCP_V4_FLOW: 4054 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 4055 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 4056 break; 4057 case UDP_V4_FLOW: 4058 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 4059 fdir_filter_count = &pf->fd_udp4_filter_cnt; 4060 break; 4061 case IP_USER_FLOW: 4062 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 4063 fdir_filter_count = &pf->fd_ip4_filter_cnt; 4064 flex_l3 = true; 4065 break; 4066 default: 4067 return -EOPNOTSUPP; 4068 } 4069 4070 /* Read the current input set from register memory. */ 4071 current_mask = i40e_read_fd_input_set(pf, index); 4072 new_mask = current_mask; 4073 4074 /* Determine, if any, the required changes to the input set in order 4075 * to support the provided mask. 4076 * 4077 * Hardware only supports masking at word (2 byte) granularity and does 4078 * not support full bitwise masking. This implementation simplifies 4079 * even further and only supports fully enabled or fully disabled 4080 * masks for each field, even though we could split the ip4src and 4081 * ip4dst fields. 4082 */ 4083 switch (fsp->flow_type & ~FLOW_EXT) { 4084 case SCTP_V4_FLOW: 4085 new_mask &= ~I40E_VERIFY_TAG_MASK; 4086 /* Fall through */ 4087 case TCP_V4_FLOW: 4088 case UDP_V4_FLOW: 4089 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 4090 4091 /* IPv4 source address */ 4092 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4093 new_mask |= I40E_L3_SRC_MASK; 4094 else if (!tcp_ip4_spec->ip4src) 4095 new_mask &= ~I40E_L3_SRC_MASK; 4096 else 4097 return -EOPNOTSUPP; 4098 4099 /* IPv4 destination address */ 4100 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4101 new_mask |= I40E_L3_DST_MASK; 4102 else if (!tcp_ip4_spec->ip4dst) 4103 new_mask &= ~I40E_L3_DST_MASK; 4104 else 4105 return -EOPNOTSUPP; 4106 4107 /* L4 source port */ 4108 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 4109 new_mask |= I40E_L4_SRC_MASK; 4110 else if (!tcp_ip4_spec->psrc) 4111 new_mask &= ~I40E_L4_SRC_MASK; 4112 else 4113 return -EOPNOTSUPP; 4114 4115 /* L4 destination port */ 4116 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 4117 new_mask |= I40E_L4_DST_MASK; 4118 else if (!tcp_ip4_spec->pdst) 4119 new_mask &= ~I40E_L4_DST_MASK; 4120 else 4121 return -EOPNOTSUPP; 4122 4123 /* Filtering on Type of Service is not supported. */ 4124 if (tcp_ip4_spec->tos) 4125 return -EOPNOTSUPP; 4126 4127 break; 4128 case IP_USER_FLOW: 4129 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 4130 4131 /* IPv4 source address */ 4132 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4133 new_mask |= I40E_L3_SRC_MASK; 4134 else if (!usr_ip4_spec->ip4src) 4135 new_mask &= ~I40E_L3_SRC_MASK; 4136 else 4137 return -EOPNOTSUPP; 4138 4139 /* IPv4 destination address */ 4140 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4141 new_mask |= I40E_L3_DST_MASK; 4142 else if (!usr_ip4_spec->ip4dst) 4143 new_mask &= ~I40E_L3_DST_MASK; 4144 else 4145 return -EOPNOTSUPP; 4146 4147 /* First 4 bytes of L4 header */ 4148 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 4149 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 4150 else if (!usr_ip4_spec->l4_4_bytes) 4151 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 4152 else 4153 return -EOPNOTSUPP; 4154 4155 /* Filtering on Type of Service is not supported. */ 4156 if (usr_ip4_spec->tos) 4157 return -EOPNOTSUPP; 4158 4159 /* Filtering on IP version is not supported */ 4160 if (usr_ip4_spec->ip_ver) 4161 return -EINVAL; 4162 4163 /* Filtering on L4 protocol is not supported */ 4164 if (usr_ip4_spec->proto) 4165 return -EINVAL; 4166 4167 break; 4168 default: 4169 return -EOPNOTSUPP; 4170 } 4171 4172 /* First, clear all flexible filter entries */ 4173 new_mask &= ~I40E_FLEX_INPUT_MASK; 4174 4175 /* If we have a flexible filter, try to add this offset to the correct 4176 * flexible filter PIT list. Once finished, we can update the mask. 4177 * If the src_offset changed, we will get a new mask value which will 4178 * trigger an input set change. 4179 */ 4180 if (userdef->flex_filter) { 4181 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 4182 4183 /* Flexible offset must be even, since the flexible payload 4184 * must be aligned on 2-byte boundary. 4185 */ 4186 if (userdef->flex_offset & 0x1) { 4187 dev_warn(&pf->pdev->dev, 4188 "Flexible data offset must be 2-byte aligned\n"); 4189 return -EINVAL; 4190 } 4191 4192 src_offset = userdef->flex_offset >> 1; 4193 4194 /* FLX_PIT source offset value is only so large */ 4195 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 4196 dev_warn(&pf->pdev->dev, 4197 "Flexible data must reside within first 64 bytes of the packet payload\n"); 4198 return -EINVAL; 4199 } 4200 4201 /* See if this offset has already been programmed. If we get 4202 * an ERR_PTR, then the filter is not safe to add. Otherwise, 4203 * if we get a NULL pointer, this means we will need to add 4204 * the offset. 4205 */ 4206 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 4207 src_offset); 4208 if (IS_ERR(flex_pit)) 4209 return PTR_ERR(flex_pit); 4210 4211 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 4212 * packet types, and thus we need to program both L3 and L4 4213 * flexible values. These must have identical flexible index, 4214 * as otherwise we can't correctly program the input set. So 4215 * we'll find both an L3 and L4 index and make sure they are 4216 * the same. 4217 */ 4218 if (flex_l3) { 4219 l3_flex_pit = 4220 i40e_find_flex_offset(&pf->l3_flex_pit_list, 4221 src_offset); 4222 if (IS_ERR(l3_flex_pit)) 4223 return PTR_ERR(l3_flex_pit); 4224 4225 if (flex_pit) { 4226 /* If we already had a matching L4 entry, we 4227 * need to make sure that the L3 entry we 4228 * obtained uses the same index. 4229 */ 4230 if (l3_flex_pit) { 4231 if (l3_flex_pit->pit_index != 4232 flex_pit->pit_index) { 4233 return -EINVAL; 4234 } 4235 } else { 4236 new_flex_offset = true; 4237 } 4238 } else { 4239 flex_pit = l3_flex_pit; 4240 } 4241 } 4242 4243 /* If we didn't find an existing flex offset, we need to 4244 * program a new one. However, we don't immediately program it 4245 * here because we will wait to program until after we check 4246 * that it is safe to change the input set. 4247 */ 4248 if (!flex_pit) { 4249 new_flex_offset = true; 4250 pit_index = i40e_unused_pit_index(pf); 4251 } else { 4252 pit_index = flex_pit->pit_index; 4253 } 4254 4255 /* Update the mask with the new offset */ 4256 new_mask |= i40e_pit_index_to_mask(pit_index); 4257 } 4258 4259 /* If the mask and flexible filter offsets for this filter match the 4260 * currently programmed values we don't need any input set change, so 4261 * this filter is safe to install. 4262 */ 4263 if (new_mask == current_mask && !new_flex_offset) 4264 return 0; 4265 4266 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4267 i40e_flow_str(fsp)); 4268 i40e_print_input_set(vsi, current_mask, new_mask); 4269 if (new_flex_offset) { 4270 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4271 pit_index, src_offset); 4272 } 4273 4274 /* Hardware input sets are global across multiple ports, so even the 4275 * main port cannot change them when in MFP mode as this would impact 4276 * any filters on the other ports. 4277 */ 4278 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4279 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4280 return -EOPNOTSUPP; 4281 } 4282 4283 /* This filter requires us to update the input set. However, hardware 4284 * only supports one input set per flow type, and does not support 4285 * separate masks for each filter. This means that we can only support 4286 * a single mask for all filters of a specific type. 4287 * 4288 * If we have preexisting filters, they obviously depend on the 4289 * current programmed input set. Display a diagnostic message in this 4290 * case explaining why the filter could not be accepted. 4291 */ 4292 if (*fdir_filter_count) { 4293 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4294 i40e_flow_str(fsp), 4295 *fdir_filter_count); 4296 return -EOPNOTSUPP; 4297 } 4298 4299 i40e_write_fd_input_set(pf, index, new_mask); 4300 4301 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4302 * frames. If we're programming the input set for IPv4/Other, we also 4303 * need to program the IPv4/Fragmented input set. Since we don't have 4304 * separate support, we'll always assume and enforce that the two flow 4305 * types must have matching input sets. 4306 */ 4307 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4308 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4309 new_mask); 4310 4311 /* Add the new offset and update table, if necessary */ 4312 if (new_flex_offset) { 4313 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4314 pit_index); 4315 if (err) 4316 return err; 4317 4318 if (flex_l3) { 4319 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4320 src_offset, 4321 pit_index); 4322 if (err) 4323 return err; 4324 } 4325 4326 i40e_reprogram_flex_pit(pf); 4327 } 4328 4329 return 0; 4330 } 4331 4332 /** 4333 * i40e_match_fdir_filter - Return true of two filters match 4334 * @a: pointer to filter struct 4335 * @b: pointer to filter struct 4336 * 4337 * Returns true if the two filters match exactly the same criteria. I.e. they 4338 * match the same flow type and have the same parameters. We don't need to 4339 * check any input-set since all filters of the same flow type must use the 4340 * same input set. 4341 **/ 4342 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4343 struct i40e_fdir_filter *b) 4344 { 4345 /* The filters do not much if any of these criteria differ. */ 4346 if (a->dst_ip != b->dst_ip || 4347 a->src_ip != b->src_ip || 4348 a->dst_port != b->dst_port || 4349 a->src_port != b->src_port || 4350 a->flow_type != b->flow_type || 4351 a->ip4_proto != b->ip4_proto) 4352 return false; 4353 4354 return true; 4355 } 4356 4357 /** 4358 * i40e_disallow_matching_filters - Check that new filters differ 4359 * @vsi: pointer to the targeted VSI 4360 * @input: new filter to check 4361 * 4362 * Due to hardware limitations, it is not possible for two filters that match 4363 * similar criteria to be programmed at the same time. This is true for a few 4364 * reasons: 4365 * 4366 * (a) all filters matching a particular flow type must use the same input 4367 * set, that is they must match the same criteria. 4368 * (b) different flow types will never match the same packet, as the flow type 4369 * is decided by hardware before checking which rules apply. 4370 * (c) hardware has no way to distinguish which order filters apply in. 4371 * 4372 * Due to this, we can't really support using the location data to order 4373 * filters in the hardware parsing. It is technically possible for the user to 4374 * request two filters matching the same criteria but which select different 4375 * queues. In this case, rather than keep both filters in the list, we reject 4376 * the 2nd filter when the user requests adding it. 4377 * 4378 * This avoids needing to track location for programming the filter to 4379 * hardware, and ensures that we avoid some strange scenarios involving 4380 * deleting filters which match the same criteria. 4381 **/ 4382 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4383 struct i40e_fdir_filter *input) 4384 { 4385 struct i40e_pf *pf = vsi->back; 4386 struct i40e_fdir_filter *rule; 4387 struct hlist_node *node2; 4388 4389 /* Loop through every filter, and check that it doesn't match */ 4390 hlist_for_each_entry_safe(rule, node2, 4391 &pf->fdir_filter_list, fdir_node) { 4392 /* Don't check the filters match if they share the same fd_id, 4393 * since the new filter is actually just updating the target 4394 * of the old filter. 4395 */ 4396 if (rule->fd_id == input->fd_id) 4397 continue; 4398 4399 /* If any filters match, then print a warning message to the 4400 * kernel message buffer and bail out. 4401 */ 4402 if (i40e_match_fdir_filter(rule, input)) { 4403 dev_warn(&pf->pdev->dev, 4404 "Existing user defined filter %d already matches this flow.\n", 4405 rule->fd_id); 4406 return -EINVAL; 4407 } 4408 } 4409 4410 return 0; 4411 } 4412 4413 /** 4414 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4415 * @vsi: pointer to the targeted VSI 4416 * @cmd: command to get or set RX flow classification rules 4417 * 4418 * Add Flow Director filters for a specific flow spec based on their 4419 * protocol. Returns 0 if the filters were successfully added. 4420 **/ 4421 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4422 struct ethtool_rxnfc *cmd) 4423 { 4424 struct i40e_rx_flow_userdef userdef; 4425 struct ethtool_rx_flow_spec *fsp; 4426 struct i40e_fdir_filter *input; 4427 u16 dest_vsi = 0, q_index = 0; 4428 struct i40e_pf *pf; 4429 int ret = -EINVAL; 4430 u8 dest_ctl; 4431 4432 if (!vsi) 4433 return -EINVAL; 4434 pf = vsi->back; 4435 4436 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4437 return -EOPNOTSUPP; 4438 4439 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4440 return -ENOSPC; 4441 4442 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4443 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4444 return -EBUSY; 4445 4446 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4447 return -EBUSY; 4448 4449 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4450 4451 /* Parse the user-defined field */ 4452 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4453 return -EINVAL; 4454 4455 /* Extended MAC field is not supported */ 4456 if (fsp->flow_type & FLOW_MAC_EXT) 4457 return -EINVAL; 4458 4459 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4460 if (ret) 4461 return ret; 4462 4463 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4464 pf->hw.func_caps.fd_filters_guaranteed)) { 4465 return -EINVAL; 4466 } 4467 4468 /* ring_cookie is either the drop index, or is a mask of the queue 4469 * index and VF id we wish to target. 4470 */ 4471 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4472 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4473 } else { 4474 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4475 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4476 4477 if (!vf) { 4478 if (ring >= vsi->num_queue_pairs) 4479 return -EINVAL; 4480 dest_vsi = vsi->id; 4481 } else { 4482 /* VFs are zero-indexed, so we subtract one here */ 4483 vf--; 4484 4485 if (vf >= pf->num_alloc_vfs) 4486 return -EINVAL; 4487 if (ring >= pf->vf[vf].num_queue_pairs) 4488 return -EINVAL; 4489 dest_vsi = pf->vf[vf].lan_vsi_id; 4490 } 4491 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4492 q_index = ring; 4493 } 4494 4495 input = kzalloc(sizeof(*input), GFP_KERNEL); 4496 4497 if (!input) 4498 return -ENOMEM; 4499 4500 input->fd_id = fsp->location; 4501 input->q_index = q_index; 4502 input->dest_vsi = dest_vsi; 4503 input->dest_ctl = dest_ctl; 4504 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4505 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4506 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4507 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4508 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4509 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4510 4511 /* Reverse the src and dest notion, since the HW expects them to be from 4512 * Tx perspective where as the input from user is from Rx filter view. 4513 */ 4514 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4515 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4516 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4517 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4518 4519 if (userdef.flex_filter) { 4520 input->flex_filter = true; 4521 input->flex_word = cpu_to_be16(userdef.flex_word); 4522 input->flex_offset = userdef.flex_offset; 4523 } 4524 4525 /* Avoid programming two filters with identical match criteria. */ 4526 ret = i40e_disallow_matching_filters(vsi, input); 4527 if (ret) 4528 goto free_filter_memory; 4529 4530 /* Add the input filter to the fdir_input_list, possibly replacing 4531 * a previous filter. Do not free the input structure after adding it 4532 * to the list as this would cause a use-after-free bug. 4533 */ 4534 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4535 ret = i40e_add_del_fdir(vsi, input, true); 4536 if (ret) 4537 goto remove_sw_rule; 4538 return 0; 4539 4540 remove_sw_rule: 4541 hlist_del(&input->fdir_node); 4542 pf->fdir_pf_active_filters--; 4543 free_filter_memory: 4544 kfree(input); 4545 return ret; 4546 } 4547 4548 /** 4549 * i40e_set_rxnfc - command to set RX flow classification rules 4550 * @netdev: network interface device structure 4551 * @cmd: ethtool rxnfc command 4552 * 4553 * Returns Success if the command is supported. 4554 **/ 4555 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4556 { 4557 struct i40e_netdev_priv *np = netdev_priv(netdev); 4558 struct i40e_vsi *vsi = np->vsi; 4559 struct i40e_pf *pf = vsi->back; 4560 int ret = -EOPNOTSUPP; 4561 4562 switch (cmd->cmd) { 4563 case ETHTOOL_SRXFH: 4564 ret = i40e_set_rss_hash_opt(pf, cmd); 4565 break; 4566 case ETHTOOL_SRXCLSRLINS: 4567 ret = i40e_add_fdir_ethtool(vsi, cmd); 4568 break; 4569 case ETHTOOL_SRXCLSRLDEL: 4570 ret = i40e_del_fdir_entry(vsi, cmd); 4571 break; 4572 default: 4573 break; 4574 } 4575 4576 return ret; 4577 } 4578 4579 /** 4580 * i40e_max_channels - get Max number of combined channels supported 4581 * @vsi: vsi pointer 4582 **/ 4583 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4584 { 4585 /* TODO: This code assumes DCB and FD is disabled for now. */ 4586 return vsi->alloc_queue_pairs; 4587 } 4588 4589 /** 4590 * i40e_get_channels - Get the current channels enabled and max supported etc. 4591 * @dev: network interface device structure 4592 * @ch: ethtool channels structure 4593 * 4594 * We don't support separate tx and rx queues as channels. The other count 4595 * represents how many queues are being used for control. max_combined counts 4596 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4597 * q_vectors since we support a lot more queue pairs than q_vectors. 4598 **/ 4599 static void i40e_get_channels(struct net_device *dev, 4600 struct ethtool_channels *ch) 4601 { 4602 struct i40e_netdev_priv *np = netdev_priv(dev); 4603 struct i40e_vsi *vsi = np->vsi; 4604 struct i40e_pf *pf = vsi->back; 4605 4606 /* report maximum channels */ 4607 ch->max_combined = i40e_max_channels(vsi); 4608 4609 /* report info for other vector */ 4610 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4611 ch->max_other = ch->other_count; 4612 4613 /* Note: This code assumes DCB is disabled for now. */ 4614 ch->combined_count = vsi->num_queue_pairs; 4615 } 4616 4617 /** 4618 * i40e_set_channels - Set the new channels count. 4619 * @dev: network interface device structure 4620 * @ch: ethtool channels structure 4621 * 4622 * The new channels count may not be the same as requested by the user 4623 * since it gets rounded down to a power of 2 value. 4624 **/ 4625 static int i40e_set_channels(struct net_device *dev, 4626 struct ethtool_channels *ch) 4627 { 4628 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4629 struct i40e_netdev_priv *np = netdev_priv(dev); 4630 unsigned int count = ch->combined_count; 4631 struct i40e_vsi *vsi = np->vsi; 4632 struct i40e_pf *pf = vsi->back; 4633 struct i40e_fdir_filter *rule; 4634 struct hlist_node *node2; 4635 int new_count; 4636 int err = 0; 4637 4638 /* We do not support setting channels for any other VSI at present */ 4639 if (vsi->type != I40E_VSI_MAIN) 4640 return -EINVAL; 4641 4642 /* We do not support setting channels via ethtool when TCs are 4643 * configured through mqprio 4644 */ 4645 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4646 return -EINVAL; 4647 4648 /* verify they are not requesting separate vectors */ 4649 if (!count || ch->rx_count || ch->tx_count) 4650 return -EINVAL; 4651 4652 /* verify other_count has not changed */ 4653 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4654 return -EINVAL; 4655 4656 /* verify the number of channels does not exceed hardware limits */ 4657 if (count > i40e_max_channels(vsi)) 4658 return -EINVAL; 4659 4660 /* verify that the number of channels does not invalidate any current 4661 * flow director rules 4662 */ 4663 hlist_for_each_entry_safe(rule, node2, 4664 &pf->fdir_filter_list, fdir_node) { 4665 if (rule->dest_ctl != drop && count <= rule->q_index) { 4666 dev_warn(&pf->pdev->dev, 4667 "Existing user defined filter %d assigns flow to queue %d\n", 4668 rule->fd_id, rule->q_index); 4669 err = -EINVAL; 4670 } 4671 } 4672 4673 if (err) { 4674 dev_err(&pf->pdev->dev, 4675 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4676 count); 4677 return err; 4678 } 4679 4680 /* update feature limits from largest to smallest supported values */ 4681 /* TODO: Flow director limit, DCB etc */ 4682 4683 /* use rss_reconfig to rebuild with new queue count and update traffic 4684 * class queue mapping 4685 */ 4686 new_count = i40e_reconfig_rss_queues(pf, count); 4687 if (new_count > 0) 4688 return 0; 4689 else 4690 return -EINVAL; 4691 } 4692 4693 /** 4694 * i40e_get_rxfh_key_size - get the RSS hash key size 4695 * @netdev: network interface device structure 4696 * 4697 * Returns the table size. 4698 **/ 4699 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4700 { 4701 return I40E_HKEY_ARRAY_SIZE; 4702 } 4703 4704 /** 4705 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4706 * @netdev: network interface device structure 4707 * 4708 * Returns the table size. 4709 **/ 4710 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4711 { 4712 return I40E_HLUT_ARRAY_SIZE; 4713 } 4714 4715 /** 4716 * i40e_get_rxfh - get the rx flow hash indirection table 4717 * @netdev: network interface device structure 4718 * @indir: indirection table 4719 * @key: hash key 4720 * @hfunc: hash function 4721 * 4722 * Reads the indirection table directly from the hardware. Returns 0 on 4723 * success. 4724 **/ 4725 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4726 u8 *hfunc) 4727 { 4728 struct i40e_netdev_priv *np = netdev_priv(netdev); 4729 struct i40e_vsi *vsi = np->vsi; 4730 u8 *lut, *seed = NULL; 4731 int ret; 4732 u16 i; 4733 4734 if (hfunc) 4735 *hfunc = ETH_RSS_HASH_TOP; 4736 4737 if (!indir) 4738 return 0; 4739 4740 seed = key; 4741 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4742 if (!lut) 4743 return -ENOMEM; 4744 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4745 if (ret) 4746 goto out; 4747 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4748 indir[i] = (u32)(lut[i]); 4749 4750 out: 4751 kfree(lut); 4752 4753 return ret; 4754 } 4755 4756 /** 4757 * i40e_set_rxfh - set the rx flow hash indirection table 4758 * @netdev: network interface device structure 4759 * @indir: indirection table 4760 * @key: hash key 4761 * @hfunc: hash function to use 4762 * 4763 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4764 * returns 0 after programming the table. 4765 **/ 4766 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4767 const u8 *key, const u8 hfunc) 4768 { 4769 struct i40e_netdev_priv *np = netdev_priv(netdev); 4770 struct i40e_vsi *vsi = np->vsi; 4771 struct i40e_pf *pf = vsi->back; 4772 u8 *seed = NULL; 4773 u16 i; 4774 4775 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4776 return -EOPNOTSUPP; 4777 4778 if (key) { 4779 if (!vsi->rss_hkey_user) { 4780 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4781 GFP_KERNEL); 4782 if (!vsi->rss_hkey_user) 4783 return -ENOMEM; 4784 } 4785 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4786 seed = vsi->rss_hkey_user; 4787 } 4788 if (!vsi->rss_lut_user) { 4789 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4790 if (!vsi->rss_lut_user) 4791 return -ENOMEM; 4792 } 4793 4794 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4795 if (indir) 4796 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4797 vsi->rss_lut_user[i] = (u8)(indir[i]); 4798 else 4799 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4800 vsi->rss_size); 4801 4802 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4803 I40E_HLUT_ARRAY_SIZE); 4804 } 4805 4806 /** 4807 * i40e_get_priv_flags - report device private flags 4808 * @dev: network interface device structure 4809 * 4810 * The get string set count and the string set should be matched for each 4811 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4812 * array. 4813 * 4814 * Returns a u32 bitmap of flags. 4815 **/ 4816 static u32 i40e_get_priv_flags(struct net_device *dev) 4817 { 4818 struct i40e_netdev_priv *np = netdev_priv(dev); 4819 struct i40e_vsi *vsi = np->vsi; 4820 struct i40e_pf *pf = vsi->back; 4821 u32 i, j, ret_flags = 0; 4822 4823 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4824 const struct i40e_priv_flags *priv_flags; 4825 4826 priv_flags = &i40e_gstrings_priv_flags[i]; 4827 4828 if (priv_flags->flag & pf->flags) 4829 ret_flags |= BIT(i); 4830 } 4831 4832 if (pf->hw.pf_id != 0) 4833 return ret_flags; 4834 4835 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4836 const struct i40e_priv_flags *priv_flags; 4837 4838 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4839 4840 if (priv_flags->flag & pf->flags) 4841 ret_flags |= BIT(i + j); 4842 } 4843 4844 return ret_flags; 4845 } 4846 4847 /** 4848 * i40e_set_priv_flags - set private flags 4849 * @dev: network interface device structure 4850 * @flags: bit flags to be set 4851 **/ 4852 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4853 { 4854 struct i40e_netdev_priv *np = netdev_priv(dev); 4855 struct i40e_vsi *vsi = np->vsi; 4856 struct i40e_pf *pf = vsi->back; 4857 u64 orig_flags, new_flags, changed_flags; 4858 u32 i, j; 4859 4860 orig_flags = READ_ONCE(pf->flags); 4861 new_flags = orig_flags; 4862 4863 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4864 const struct i40e_priv_flags *priv_flags; 4865 4866 priv_flags = &i40e_gstrings_priv_flags[i]; 4867 4868 if (flags & BIT(i)) 4869 new_flags |= priv_flags->flag; 4870 else 4871 new_flags &= ~(priv_flags->flag); 4872 4873 /* If this is a read-only flag, it can't be changed */ 4874 if (priv_flags->read_only && 4875 ((orig_flags ^ new_flags) & ~BIT(i))) 4876 return -EOPNOTSUPP; 4877 } 4878 4879 if (pf->hw.pf_id != 0) 4880 goto flags_complete; 4881 4882 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4883 const struct i40e_priv_flags *priv_flags; 4884 4885 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4886 4887 if (flags & BIT(i + j)) 4888 new_flags |= priv_flags->flag; 4889 else 4890 new_flags &= ~(priv_flags->flag); 4891 4892 /* If this is a read-only flag, it can't be changed */ 4893 if (priv_flags->read_only && 4894 ((orig_flags ^ new_flags) & ~BIT(i))) 4895 return -EOPNOTSUPP; 4896 } 4897 4898 flags_complete: 4899 changed_flags = orig_flags ^ new_flags; 4900 4901 /* Before we finalize any flag changes, we need to perform some 4902 * checks to ensure that the changes are supported and safe. 4903 */ 4904 4905 /* ATR eviction is not supported on all devices */ 4906 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4907 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4908 return -EOPNOTSUPP; 4909 4910 /* If the driver detected FW LLDP was disabled on init, this flag could 4911 * be set, however we do not support _changing_ the flag: 4912 * - on XL710 if NPAR is enabled or FW API version < 1.7 4913 * - on X722 with FW API version < 1.6 4914 * There are situations where older FW versions/NPAR enabled PFs could 4915 * disable LLDP, however we _must_ not allow the user to enable/disable 4916 * LLDP with this flag on unsupported FW versions. 4917 */ 4918 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4919 if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) { 4920 dev_warn(&pf->pdev->dev, 4921 "Device does not support changing FW LLDP\n"); 4922 return -EOPNOTSUPP; 4923 } 4924 } 4925 4926 if (((changed_flags & I40E_FLAG_RS_FEC) || 4927 (changed_flags & I40E_FLAG_BASE_R_FEC)) && 4928 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 4929 pf->hw.device_id != I40E_DEV_ID_25G_B) { 4930 dev_warn(&pf->pdev->dev, 4931 "Device does not support changing FEC configuration\n"); 4932 return -EOPNOTSUPP; 4933 } 4934 4935 /* Now that we've checked to ensure that the new flags are valid, load 4936 * them into place. Since we only modify flags either (a) during 4937 * initialization or (b) while holding the RTNL lock, we don't need 4938 * anything fancy here. 4939 */ 4940 pf->flags = new_flags; 4941 4942 /* Process any additional changes needed as a result of flag changes. 4943 * The changed_flags value reflects the list of bits that were 4944 * changed in the code above. 4945 */ 4946 4947 /* Flush current ATR settings if ATR was disabled */ 4948 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4949 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4950 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4951 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4952 } 4953 4954 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4955 u16 sw_flags = 0, valid_flags = 0; 4956 int ret; 4957 4958 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4959 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4960 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4961 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4962 0, NULL); 4963 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4964 dev_info(&pf->pdev->dev, 4965 "couldn't set switch config bits, err %s aq_err %s\n", 4966 i40e_stat_str(&pf->hw, ret), 4967 i40e_aq_str(&pf->hw, 4968 pf->hw.aq.asq_last_status)); 4969 /* not a fatal problem, just keep going */ 4970 } 4971 } 4972 4973 if ((changed_flags & I40E_FLAG_RS_FEC) || 4974 (changed_flags & I40E_FLAG_BASE_R_FEC)) { 4975 u8 fec_cfg = 0; 4976 4977 if (pf->flags & I40E_FLAG_RS_FEC && 4978 pf->flags & I40E_FLAG_BASE_R_FEC) { 4979 fec_cfg = I40E_AQ_SET_FEC_AUTO; 4980 } else if (pf->flags & I40E_FLAG_RS_FEC) { 4981 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 4982 I40E_AQ_SET_FEC_ABILITY_RS); 4983 } else if (pf->flags & I40E_FLAG_BASE_R_FEC) { 4984 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 4985 I40E_AQ_SET_FEC_ABILITY_KR); 4986 } 4987 if (i40e_set_fec_cfg(dev, fec_cfg)) 4988 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n"); 4989 } 4990 4991 if ((changed_flags & pf->flags & 4992 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4993 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4994 dev_warn(&pf->pdev->dev, 4995 "Turning on link-down-on-close flag may affect other partitions\n"); 4996 4997 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4998 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4999 struct i40e_dcbx_config *dcbcfg; 5000 5001 i40e_aq_stop_lldp(&pf->hw, true, false, NULL); 5002 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 5003 /* reset local_dcbx_config to default */ 5004 dcbcfg = &pf->hw.local_dcbx_config; 5005 dcbcfg->etscfg.willing = 1; 5006 dcbcfg->etscfg.maxtcs = 0; 5007 dcbcfg->etscfg.tcbwtable[0] = 100; 5008 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 5009 dcbcfg->etscfg.tcbwtable[i] = 0; 5010 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 5011 dcbcfg->etscfg.prioritytable[i] = 0; 5012 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 5013 dcbcfg->pfc.willing = 1; 5014 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 5015 } else { 5016 i40e_aq_start_lldp(&pf->hw, false, NULL); 5017 } 5018 } 5019 5020 /* Issue reset to cause things to take effect, as additional bits 5021 * are added we will need to create a mask of bits requiring reset 5022 */ 5023 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 5024 I40E_FLAG_LEGACY_RX | 5025 I40E_FLAG_SOURCE_PRUNING_DISABLED | 5026 I40E_FLAG_DISABLE_FW_LLDP)) 5027 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 5028 5029 return 0; 5030 } 5031 5032 /** 5033 * i40e_get_module_info - get (Q)SFP+ module type info 5034 * @netdev: network interface device structure 5035 * @modinfo: module EEPROM size and layout information structure 5036 **/ 5037 static int i40e_get_module_info(struct net_device *netdev, 5038 struct ethtool_modinfo *modinfo) 5039 { 5040 struct i40e_netdev_priv *np = netdev_priv(netdev); 5041 struct i40e_vsi *vsi = np->vsi; 5042 struct i40e_pf *pf = vsi->back; 5043 struct i40e_hw *hw = &pf->hw; 5044 u32 sff8472_comp = 0; 5045 u32 sff8472_swap = 0; 5046 u32 sff8636_rev = 0; 5047 i40e_status status; 5048 u32 type = 0; 5049 5050 /* Check if firmware supports reading module EEPROM. */ 5051 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 5052 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 5053 return -EINVAL; 5054 } 5055 5056 status = i40e_update_link_info(hw); 5057 if (status) 5058 return -EIO; 5059 5060 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 5061 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 5062 return -EINVAL; 5063 } 5064 5065 type = hw->phy.link_info.module_type[0]; 5066 5067 switch (type) { 5068 case I40E_MODULE_TYPE_SFP: 5069 status = i40e_aq_get_phy_register(hw, 5070 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5071 I40E_I2C_EEPROM_DEV_ADDR, 5072 I40E_MODULE_SFF_8472_COMP, 5073 &sff8472_comp, NULL); 5074 if (status) 5075 return -EIO; 5076 5077 status = i40e_aq_get_phy_register(hw, 5078 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5079 I40E_I2C_EEPROM_DEV_ADDR, 5080 I40E_MODULE_SFF_8472_SWAP, 5081 &sff8472_swap, NULL); 5082 if (status) 5083 return -EIO; 5084 5085 /* Check if the module requires address swap to access 5086 * the other EEPROM memory page. 5087 */ 5088 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 5089 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 5090 modinfo->type = ETH_MODULE_SFF_8079; 5091 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5092 } else if (sff8472_comp == 0x00) { 5093 /* Module is not SFF-8472 compliant */ 5094 modinfo->type = ETH_MODULE_SFF_8079; 5095 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5096 } else { 5097 modinfo->type = ETH_MODULE_SFF_8472; 5098 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 5099 } 5100 break; 5101 case I40E_MODULE_TYPE_QSFP_PLUS: 5102 /* Read from memory page 0. */ 5103 status = i40e_aq_get_phy_register(hw, 5104 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5105 0, 5106 I40E_MODULE_REVISION_ADDR, 5107 &sff8636_rev, NULL); 5108 if (status) 5109 return -EIO; 5110 /* Determine revision compliance byte */ 5111 if (sff8636_rev > 0x02) { 5112 /* Module is SFF-8636 compliant */ 5113 modinfo->type = ETH_MODULE_SFF_8636; 5114 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5115 } else { 5116 modinfo->type = ETH_MODULE_SFF_8436; 5117 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5118 } 5119 break; 5120 case I40E_MODULE_TYPE_QSFP28: 5121 modinfo->type = ETH_MODULE_SFF_8636; 5122 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5123 break; 5124 default: 5125 netdev_err(vsi->netdev, "Module type unrecognized\n"); 5126 return -EINVAL; 5127 } 5128 return 0; 5129 } 5130 5131 /** 5132 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 5133 * @netdev: network interface device structure 5134 * @ee: EEPROM dump request structure 5135 * @data: buffer to be filled with EEPROM contents 5136 **/ 5137 static int i40e_get_module_eeprom(struct net_device *netdev, 5138 struct ethtool_eeprom *ee, 5139 u8 *data) 5140 { 5141 struct i40e_netdev_priv *np = netdev_priv(netdev); 5142 struct i40e_vsi *vsi = np->vsi; 5143 struct i40e_pf *pf = vsi->back; 5144 struct i40e_hw *hw = &pf->hw; 5145 bool is_sfp = false; 5146 i40e_status status; 5147 u32 value = 0; 5148 int i; 5149 5150 if (!ee || !ee->len || !data) 5151 return -EINVAL; 5152 5153 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 5154 is_sfp = true; 5155 5156 for (i = 0; i < ee->len; i++) { 5157 u32 offset = i + ee->offset; 5158 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 5159 5160 /* Check if we need to access the other memory page */ 5161 if (is_sfp) { 5162 if (offset >= ETH_MODULE_SFF_8079_LEN) { 5163 offset -= ETH_MODULE_SFF_8079_LEN; 5164 addr = I40E_I2C_EEPROM_DEV_ADDR2; 5165 } 5166 } else { 5167 while (offset >= ETH_MODULE_SFF_8436_LEN) { 5168 /* Compute memory page number and offset. */ 5169 offset -= ETH_MODULE_SFF_8436_LEN / 2; 5170 addr++; 5171 } 5172 } 5173 5174 status = i40e_aq_get_phy_register(hw, 5175 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5176 addr, offset, &value, NULL); 5177 if (status) 5178 return -EIO; 5179 data[i] = value; 5180 } 5181 return 0; 5182 } 5183 5184 static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = { 5185 .set_eeprom = i40e_set_eeprom, 5186 .get_eeprom_len = i40e_get_eeprom_len, 5187 .get_eeprom = i40e_get_eeprom, 5188 }; 5189 5190 static const struct ethtool_ops i40e_ethtool_ops = { 5191 .get_drvinfo = i40e_get_drvinfo, 5192 .get_regs_len = i40e_get_regs_len, 5193 .get_regs = i40e_get_regs, 5194 .nway_reset = i40e_nway_reset, 5195 .get_link = ethtool_op_get_link, 5196 .get_wol = i40e_get_wol, 5197 .set_wol = i40e_set_wol, 5198 .set_eeprom = i40e_set_eeprom, 5199 .get_eeprom_len = i40e_get_eeprom_len, 5200 .get_eeprom = i40e_get_eeprom, 5201 .get_ringparam = i40e_get_ringparam, 5202 .set_ringparam = i40e_set_ringparam, 5203 .get_pauseparam = i40e_get_pauseparam, 5204 .set_pauseparam = i40e_set_pauseparam, 5205 .get_msglevel = i40e_get_msglevel, 5206 .set_msglevel = i40e_set_msglevel, 5207 .get_rxnfc = i40e_get_rxnfc, 5208 .set_rxnfc = i40e_set_rxnfc, 5209 .self_test = i40e_diag_test, 5210 .get_strings = i40e_get_strings, 5211 .set_phys_id = i40e_set_phys_id, 5212 .get_sset_count = i40e_get_sset_count, 5213 .get_ethtool_stats = i40e_get_ethtool_stats, 5214 .get_coalesce = i40e_get_coalesce, 5215 .set_coalesce = i40e_set_coalesce, 5216 .get_rxfh_key_size = i40e_get_rxfh_key_size, 5217 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 5218 .get_rxfh = i40e_get_rxfh, 5219 .set_rxfh = i40e_set_rxfh, 5220 .get_channels = i40e_get_channels, 5221 .set_channels = i40e_set_channels, 5222 .get_module_info = i40e_get_module_info, 5223 .get_module_eeprom = i40e_get_module_eeprom, 5224 .get_ts_info = i40e_get_ts_info, 5225 .get_priv_flags = i40e_get_priv_flags, 5226 .set_priv_flags = i40e_set_priv_flags, 5227 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 5228 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 5229 .get_link_ksettings = i40e_get_link_ksettings, 5230 .set_link_ksettings = i40e_set_link_ksettings, 5231 .get_fecparam = i40e_get_fec_param, 5232 .set_fecparam = i40e_set_fec_param, 5233 .flash_device = i40e_ddp_flash, 5234 }; 5235 5236 void i40e_set_ethtool_ops(struct net_device *netdev) 5237 { 5238 struct i40e_netdev_priv *np = netdev_priv(netdev); 5239 struct i40e_pf *pf = np->vsi->back; 5240 5241 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) 5242 netdev->ethtool_ops = &i40e_ethtool_ops; 5243 else 5244 netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops; 5245 } 5246