1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 10 /* ethtool statistics helpers */ 11 12 /** 13 * struct i40e_stats - definition for an ethtool statistic 14 * @stat_string: statistic name to display in ethtool -S output 15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 16 * @stat_offset: offsetof() the stat from a base pointer 17 * 18 * This structure defines a statistic to be added to the ethtool stats buffer. 19 * It defines a statistic as offset from a common base pointer. Stats should 20 * be defined in constant arrays using the I40E_STAT macro, with every element 21 * of the array using the same _type for calculating the sizeof_stat and 22 * stat_offset. 23 * 24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 26 * the i40e_add_ethtool_stat() helper function. 27 * 28 * The @stat_string is interpreted as a format string, allowing formatted 29 * values to be inserted while looping over multiple structures for a given 30 * statistics array. Thus, every statistic string in an array should have the 31 * same type and number of format specifiers, to be formatted by variadic 32 * arguments to the i40e_add_stat_string() helper function. 33 **/ 34 struct i40e_stats { 35 char stat_string[ETH_GSTRING_LEN]; 36 int sizeof_stat; 37 int stat_offset; 38 }; 39 40 /* Helper macro to define an i40e_stat structure with proper size and type. 41 * Use this when defining constant statistics arrays. Note that @_type expects 42 * only a type name and is used multiple times. 43 */ 44 #define I40E_STAT(_type, _name, _stat) { \ 45 .stat_string = _name, \ 46 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 47 .stat_offset = offsetof(_type, _stat) \ 48 } 49 50 /* Helper macro for defining some statistics directly copied from the netdev 51 * stats structure. 52 */ 53 #define I40E_NETDEV_STAT(_net_stat) \ 54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 55 56 /* Helper macro for defining some statistics related to queues */ 57 #define I40E_QUEUE_STAT(_name, _stat) \ 58 I40E_STAT(struct i40e_ring, _name, _stat) 59 60 /* Stats associated with a Tx or Rx ring */ 61 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 64 }; 65 66 /** 67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 68 * @data: location to store the stat value 69 * @pointer: basis for where to copy from 70 * @stat: the stat definition 71 * 72 * Copies the stat data defined by the pointer and stat structure pair into 73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 75 */ 76 static void 77 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 78 const struct i40e_stats *stat) 79 { 80 char *p; 81 82 if (!pointer) { 83 /* ensure that the ethtool data buffer is zero'd for any stats 84 * which don't have a valid pointer. 85 */ 86 *data = 0; 87 return; 88 } 89 90 p = (char *)pointer + stat->stat_offset; 91 switch (stat->sizeof_stat) { 92 case sizeof(u64): 93 *data = *((u64 *)p); 94 break; 95 case sizeof(u32): 96 *data = *((u32 *)p); 97 break; 98 case sizeof(u16): 99 *data = *((u16 *)p); 100 break; 101 case sizeof(u8): 102 *data = *((u8 *)p); 103 break; 104 default: 105 WARN_ONCE(1, "unexpected stat size for %s", 106 stat->stat_string); 107 *data = 0; 108 } 109 } 110 111 /** 112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 113 * @data: ethtool stats buffer 114 * @pointer: location to copy stats from 115 * @stats: array of stats to copy 116 * @size: the size of the stats definition 117 * 118 * Copy the stats defined by the stats array using the pointer as a base into 119 * the data buffer supplied by ethtool. Updates the data pointer to point to 120 * the next empty location for successive calls to __i40e_add_ethtool_stats. 121 * If pointer is null, set the data values to zero and update the pointer to 122 * skip these stats. 123 **/ 124 static void 125 __i40e_add_ethtool_stats(u64 **data, void *pointer, 126 const struct i40e_stats stats[], 127 const unsigned int size) 128 { 129 unsigned int i; 130 131 for (i = 0; i < size; i++) 132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 133 } 134 135 /** 136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 137 * @data: ethtool stats buffer 138 * @pointer: location where stats are stored 139 * @stats: static const array of stat definitions 140 * 141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 143 * ensuring that we pass the size associated with the given stats array. 144 * 145 * The parameter @stats is evaluated twice, so parameters with side effects 146 * should be avoided. 147 **/ 148 #define i40e_add_ethtool_stats(data, pointer, stats) \ 149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 150 151 /** 152 * i40e_add_queue_stats - copy queue statistics into supplied buffer 153 * @data: ethtool stats buffer 154 * @ring: the ring to copy 155 * 156 * Queue statistics must be copied while protected by 157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats. 158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 159 * ring pointer is null, zero out the queue stat values and update the data 160 * pointer. Otherwise safely copy the stats from the ring into the supplied 161 * buffer and update the data pointer when finished. 162 * 163 * This function expects to be called while under rcu_read_lock(). 164 **/ 165 static void 166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 167 { 168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 169 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 170 unsigned int start; 171 unsigned int i; 172 173 /* To avoid invalid statistics values, ensure that we keep retrying 174 * the copy until we get a consistent value according to 175 * u64_stats_fetch_retry_irq. But first, make sure our ring is 176 * non-null before attempting to access its syncp. 177 */ 178 do { 179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp); 180 for (i = 0; i < size; i++) { 181 i40e_add_one_ethtool_stat(&(*data)[i], ring, 182 &stats[i]); 183 } 184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start)); 185 186 /* Once we successfully copy the stats in, update the data pointer */ 187 *data += size; 188 } 189 190 /** 191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 192 * @p: ethtool supplied buffer 193 * @stats: stat definitions array 194 * @size: size of the stats array 195 * 196 * Format and copy the strings described by stats into the buffer pointed at 197 * by p. 198 **/ 199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 200 const unsigned int size, ...) 201 { 202 unsigned int i; 203 204 for (i = 0; i < size; i++) { 205 va_list args; 206 207 va_start(args, size); 208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 209 *p += ETH_GSTRING_LEN; 210 va_end(args); 211 } 212 } 213 214 /** 215 * 40e_add_stat_strings - copy stat strings into ethtool buffer 216 * @p: ethtool supplied buffer 217 * @stats: stat definitions array 218 * 219 * Format and copy the strings described by the const static stats value into 220 * the buffer pointed at by p. 221 * 222 * The parameter @stats is evaluated twice, so parameters with side effects 223 * should be avoided. Additionally, stats must be an array such that 224 * ARRAY_SIZE can be called on it. 225 **/ 226 #define i40e_add_stat_strings(p, stats, ...) \ 227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 228 229 #define I40E_PF_STAT(_name, _stat) \ 230 I40E_STAT(struct i40e_pf, _name, _stat) 231 #define I40E_VSI_STAT(_name, _stat) \ 232 I40E_STAT(struct i40e_vsi, _name, _stat) 233 #define I40E_VEB_STAT(_name, _stat) \ 234 I40E_STAT(struct i40e_veb, _name, _stat) 235 #define I40E_PFC_STAT(_name, _stat) \ 236 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 237 #define I40E_QUEUE_STAT(_name, _stat) \ 238 I40E_STAT(struct i40e_ring, _name, _stat) 239 240 static const struct i40e_stats i40e_gstrings_net_stats[] = { 241 I40E_NETDEV_STAT(rx_packets), 242 I40E_NETDEV_STAT(tx_packets), 243 I40E_NETDEV_STAT(rx_bytes), 244 I40E_NETDEV_STAT(tx_bytes), 245 I40E_NETDEV_STAT(rx_errors), 246 I40E_NETDEV_STAT(tx_errors), 247 I40E_NETDEV_STAT(rx_dropped), 248 I40E_NETDEV_STAT(tx_dropped), 249 I40E_NETDEV_STAT(collisions), 250 I40E_NETDEV_STAT(rx_length_errors), 251 I40E_NETDEV_STAT(rx_crc_errors), 252 }; 253 254 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 255 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 256 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 257 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 258 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 259 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 260 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 261 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 262 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 263 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 264 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 265 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 266 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 267 }; 268 269 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 270 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets), 271 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes), 272 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets), 273 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes), 274 }; 275 276 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 277 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 278 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 279 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 280 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 281 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 282 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 283 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 284 I40E_VSI_STAT("tx_linearize", tx_linearize), 285 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 286 I40E_VSI_STAT("tx_busy", tx_busy), 287 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 288 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 289 }; 290 291 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 292 * but they are separate. This device supports Virtualization, and 293 * as such might have several netdevs supporting VMDq and FCoE going 294 * through a single port. The NETDEV_STATs are for individual netdevs 295 * seen at the top of the stack, and the PF_STATs are for the physical 296 * function at the bottom of the stack hosting those netdevs. 297 * 298 * The PF_STATs are appended to the netdev stats only when ethtool -S 299 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 300 */ 301 static const struct i40e_stats i40e_gstrings_stats[] = { 302 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 303 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 304 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 305 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 306 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 307 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 308 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 309 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 310 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 311 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 312 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 313 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 314 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 315 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 316 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 317 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 318 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 319 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 320 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 321 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 322 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 323 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 324 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 325 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 326 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 327 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 328 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 329 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 330 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 331 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 332 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 333 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 334 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 335 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 336 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 337 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 338 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 339 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 340 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 341 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 342 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 343 I40E_PF_STAT("port.arq_overflows", arq_overflows), 344 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 345 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 346 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 347 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 348 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 349 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 350 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 351 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 352 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 353 354 /* LPI stats */ 355 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 356 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 357 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 358 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 359 }; 360 361 struct i40e_pfc_stats { 362 u64 priority_xon_rx; 363 u64 priority_xoff_rx; 364 u64 priority_xon_tx; 365 u64 priority_xoff_tx; 366 u64 priority_xon_2_xoff; 367 }; 368 369 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 370 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 371 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 372 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 373 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 374 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 375 }; 376 377 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 378 379 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 380 381 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 382 383 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 384 I40E_MAX_USER_PRIORITY) 385 386 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 387 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 388 I40E_MAX_TRAFFIC_CLASS)) 389 390 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 391 392 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 393 I40E_PFC_STATS_LEN + \ 394 I40E_VEB_STATS_LEN + \ 395 I40E_VSI_STATS_LEN) 396 397 /* Length of stats for a single queue */ 398 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 399 400 enum i40e_ethtool_test_id { 401 I40E_ETH_TEST_REG = 0, 402 I40E_ETH_TEST_EEPROM, 403 I40E_ETH_TEST_INTR, 404 I40E_ETH_TEST_LINK, 405 }; 406 407 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 408 "Register test (offline)", 409 "Eeprom test (offline)", 410 "Interrupt test (offline)", 411 "Link test (on/offline)" 412 }; 413 414 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 415 416 struct i40e_priv_flags { 417 char flag_string[ETH_GSTRING_LEN]; 418 u64 flag; 419 bool read_only; 420 }; 421 422 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 423 .flag_string = _name, \ 424 .flag = _flag, \ 425 .read_only = _read_only, \ 426 } 427 428 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 429 /* NOTE: MFP setting cannot be changed */ 430 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 431 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 432 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 433 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 434 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 435 I40E_PRIV_FLAG("link-down-on-close", 436 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 437 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 438 I40E_PRIV_FLAG("disable-source-pruning", 439 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 440 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 441 }; 442 443 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 444 445 /* Private flags with a global effect, restricted to PF 0 */ 446 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 447 I40E_PRIV_FLAG("vf-true-promisc-support", 448 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 449 }; 450 451 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 452 453 /** 454 * i40e_partition_setting_complaint - generic complaint for MFP restriction 455 * @pf: the PF struct 456 **/ 457 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 458 { 459 dev_info(&pf->pdev->dev, 460 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 461 } 462 463 /** 464 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 465 * @pf: PF struct with phy_types 466 * @ks: ethtool link ksettings struct to fill out 467 * 468 **/ 469 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 470 struct ethtool_link_ksettings *ks) 471 { 472 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 473 u64 phy_types = pf->hw.phy.phy_types; 474 475 ethtool_link_ksettings_zero_link_mode(ks, supported); 476 ethtool_link_ksettings_zero_link_mode(ks, advertising); 477 478 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 479 ethtool_link_ksettings_add_link_mode(ks, supported, 480 1000baseT_Full); 481 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 482 ethtool_link_ksettings_add_link_mode(ks, advertising, 483 1000baseT_Full); 484 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 485 ethtool_link_ksettings_add_link_mode(ks, supported, 486 100baseT_Full); 487 ethtool_link_ksettings_add_link_mode(ks, advertising, 488 100baseT_Full); 489 } 490 } 491 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 492 phy_types & I40E_CAP_PHY_TYPE_XFI || 493 phy_types & I40E_CAP_PHY_TYPE_SFI || 494 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 495 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 496 ethtool_link_ksettings_add_link_mode(ks, supported, 497 10000baseT_Full); 498 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 499 ethtool_link_ksettings_add_link_mode(ks, advertising, 500 10000baseT_Full); 501 } 502 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 503 ethtool_link_ksettings_add_link_mode(ks, supported, 504 10000baseT_Full); 505 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 506 ethtool_link_ksettings_add_link_mode(ks, advertising, 507 10000baseT_Full); 508 } 509 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 510 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 511 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 512 ethtool_link_ksettings_add_link_mode(ks, supported, 513 40000baseCR4_Full); 514 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 515 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 516 ethtool_link_ksettings_add_link_mode(ks, supported, 517 40000baseCR4_Full); 518 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 519 ethtool_link_ksettings_add_link_mode(ks, advertising, 520 40000baseCR4_Full); 521 } 522 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 523 ethtool_link_ksettings_add_link_mode(ks, supported, 524 100baseT_Full); 525 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 526 ethtool_link_ksettings_add_link_mode(ks, advertising, 527 100baseT_Full); 528 } 529 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 530 ethtool_link_ksettings_add_link_mode(ks, supported, 531 1000baseT_Full); 532 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 533 ethtool_link_ksettings_add_link_mode(ks, advertising, 534 1000baseT_Full); 535 } 536 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 537 ethtool_link_ksettings_add_link_mode(ks, supported, 538 40000baseSR4_Full); 539 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 540 ethtool_link_ksettings_add_link_mode(ks, supported, 541 40000baseLR4_Full); 542 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 543 ethtool_link_ksettings_add_link_mode(ks, supported, 544 40000baseLR4_Full); 545 ethtool_link_ksettings_add_link_mode(ks, advertising, 546 40000baseLR4_Full); 547 } 548 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 549 ethtool_link_ksettings_add_link_mode(ks, supported, 550 20000baseKR2_Full); 551 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 552 ethtool_link_ksettings_add_link_mode(ks, advertising, 553 20000baseKR2_Full); 554 } 555 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 556 ethtool_link_ksettings_add_link_mode(ks, supported, 557 10000baseKX4_Full); 558 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 559 ethtool_link_ksettings_add_link_mode(ks, advertising, 560 10000baseKX4_Full); 561 } 562 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 563 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 564 ethtool_link_ksettings_add_link_mode(ks, supported, 565 10000baseKR_Full); 566 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 567 ethtool_link_ksettings_add_link_mode(ks, advertising, 568 10000baseKR_Full); 569 } 570 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 571 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 572 ethtool_link_ksettings_add_link_mode(ks, supported, 573 1000baseKX_Full); 574 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 575 ethtool_link_ksettings_add_link_mode(ks, advertising, 576 1000baseKX_Full); 577 } 578 /* need to add 25G PHY types */ 579 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 580 ethtool_link_ksettings_add_link_mode(ks, supported, 581 25000baseKR_Full); 582 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 583 ethtool_link_ksettings_add_link_mode(ks, advertising, 584 25000baseKR_Full); 585 } 586 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 587 ethtool_link_ksettings_add_link_mode(ks, supported, 588 25000baseCR_Full); 589 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 590 ethtool_link_ksettings_add_link_mode(ks, advertising, 591 25000baseCR_Full); 592 } 593 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 594 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 595 ethtool_link_ksettings_add_link_mode(ks, supported, 596 25000baseSR_Full); 597 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 598 ethtool_link_ksettings_add_link_mode(ks, advertising, 599 25000baseSR_Full); 600 } 601 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 602 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 603 ethtool_link_ksettings_add_link_mode(ks, supported, 604 25000baseCR_Full); 605 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 606 ethtool_link_ksettings_add_link_mode(ks, advertising, 607 25000baseCR_Full); 608 } 609 /* need to add new 10G PHY types */ 610 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 611 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 612 ethtool_link_ksettings_add_link_mode(ks, supported, 613 10000baseCR_Full); 614 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 615 ethtool_link_ksettings_add_link_mode(ks, advertising, 616 10000baseCR_Full); 617 } 618 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 619 ethtool_link_ksettings_add_link_mode(ks, supported, 620 10000baseSR_Full); 621 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 622 ethtool_link_ksettings_add_link_mode(ks, advertising, 623 10000baseSR_Full); 624 } 625 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 626 ethtool_link_ksettings_add_link_mode(ks, supported, 627 10000baseLR_Full); 628 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 629 ethtool_link_ksettings_add_link_mode(ks, advertising, 630 10000baseLR_Full); 631 } 632 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 633 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 634 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 635 ethtool_link_ksettings_add_link_mode(ks, supported, 636 1000baseX_Full); 637 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 638 ethtool_link_ksettings_add_link_mode(ks, advertising, 639 1000baseX_Full); 640 } 641 /* Autoneg PHY types */ 642 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 643 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 644 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 645 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 646 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 647 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 648 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 649 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 650 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 651 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 652 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 653 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 654 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 655 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 656 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 657 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 658 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 659 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 660 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 661 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 662 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 663 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 664 ethtool_link_ksettings_add_link_mode(ks, supported, 665 Autoneg); 666 ethtool_link_ksettings_add_link_mode(ks, advertising, 667 Autoneg); 668 } 669 } 670 671 /** 672 * i40e_get_settings_link_up - Get the Link settings for when link is up 673 * @hw: hw structure 674 * @ks: ethtool ksettings to fill in 675 * @netdev: network interface device structure 676 * @pf: pointer to physical function struct 677 **/ 678 static void i40e_get_settings_link_up(struct i40e_hw *hw, 679 struct ethtool_link_ksettings *ks, 680 struct net_device *netdev, 681 struct i40e_pf *pf) 682 { 683 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 684 struct ethtool_link_ksettings cap_ksettings; 685 u32 link_speed = hw_link_info->link_speed; 686 687 /* Initialize supported and advertised settings based on phy settings */ 688 switch (hw_link_info->phy_type) { 689 case I40E_PHY_TYPE_40GBASE_CR4: 690 case I40E_PHY_TYPE_40GBASE_CR4_CU: 691 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 692 ethtool_link_ksettings_add_link_mode(ks, supported, 693 40000baseCR4_Full); 694 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 695 ethtool_link_ksettings_add_link_mode(ks, advertising, 696 40000baseCR4_Full); 697 break; 698 case I40E_PHY_TYPE_XLAUI: 699 case I40E_PHY_TYPE_XLPPI: 700 case I40E_PHY_TYPE_40GBASE_AOC: 701 ethtool_link_ksettings_add_link_mode(ks, supported, 702 40000baseCR4_Full); 703 break; 704 case I40E_PHY_TYPE_40GBASE_SR4: 705 ethtool_link_ksettings_add_link_mode(ks, supported, 706 40000baseSR4_Full); 707 break; 708 case I40E_PHY_TYPE_40GBASE_LR4: 709 ethtool_link_ksettings_add_link_mode(ks, supported, 710 40000baseLR4_Full); 711 break; 712 case I40E_PHY_TYPE_25GBASE_SR: 713 case I40E_PHY_TYPE_25GBASE_LR: 714 case I40E_PHY_TYPE_10GBASE_SR: 715 case I40E_PHY_TYPE_10GBASE_LR: 716 case I40E_PHY_TYPE_1000BASE_SX: 717 case I40E_PHY_TYPE_1000BASE_LX: 718 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 719 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 720 ethtool_link_ksettings_add_link_mode(ks, supported, 721 25000baseSR_Full); 722 ethtool_link_ksettings_add_link_mode(ks, advertising, 723 25000baseSR_Full); 724 ethtool_link_ksettings_add_link_mode(ks, supported, 725 10000baseSR_Full); 726 ethtool_link_ksettings_add_link_mode(ks, advertising, 727 10000baseSR_Full); 728 ethtool_link_ksettings_add_link_mode(ks, supported, 729 10000baseLR_Full); 730 ethtool_link_ksettings_add_link_mode(ks, advertising, 731 10000baseLR_Full); 732 ethtool_link_ksettings_add_link_mode(ks, supported, 733 1000baseX_Full); 734 ethtool_link_ksettings_add_link_mode(ks, advertising, 735 1000baseX_Full); 736 ethtool_link_ksettings_add_link_mode(ks, supported, 737 10000baseT_Full); 738 if (hw_link_info->module_type[2] & 739 I40E_MODULE_TYPE_1000BASE_SX || 740 hw_link_info->module_type[2] & 741 I40E_MODULE_TYPE_1000BASE_LX) { 742 ethtool_link_ksettings_add_link_mode(ks, supported, 743 1000baseT_Full); 744 if (hw_link_info->requested_speeds & 745 I40E_LINK_SPEED_1GB) 746 ethtool_link_ksettings_add_link_mode( 747 ks, advertising, 1000baseT_Full); 748 } 749 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 750 ethtool_link_ksettings_add_link_mode(ks, advertising, 751 10000baseT_Full); 752 break; 753 case I40E_PHY_TYPE_10GBASE_T: 754 case I40E_PHY_TYPE_1000BASE_T: 755 case I40E_PHY_TYPE_100BASE_TX: 756 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 757 ethtool_link_ksettings_add_link_mode(ks, supported, 758 10000baseT_Full); 759 ethtool_link_ksettings_add_link_mode(ks, supported, 760 1000baseT_Full); 761 ethtool_link_ksettings_add_link_mode(ks, supported, 762 100baseT_Full); 763 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 764 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 765 ethtool_link_ksettings_add_link_mode(ks, advertising, 766 10000baseT_Full); 767 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 768 ethtool_link_ksettings_add_link_mode(ks, advertising, 769 1000baseT_Full); 770 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 771 ethtool_link_ksettings_add_link_mode(ks, advertising, 772 100baseT_Full); 773 break; 774 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 775 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 776 ethtool_link_ksettings_add_link_mode(ks, supported, 777 1000baseT_Full); 778 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 779 ethtool_link_ksettings_add_link_mode(ks, advertising, 780 1000baseT_Full); 781 break; 782 case I40E_PHY_TYPE_10GBASE_CR1_CU: 783 case I40E_PHY_TYPE_10GBASE_CR1: 784 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 785 ethtool_link_ksettings_add_link_mode(ks, supported, 786 10000baseT_Full); 787 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 788 ethtool_link_ksettings_add_link_mode(ks, advertising, 789 10000baseT_Full); 790 break; 791 case I40E_PHY_TYPE_XAUI: 792 case I40E_PHY_TYPE_XFI: 793 case I40E_PHY_TYPE_SFI: 794 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 795 case I40E_PHY_TYPE_10GBASE_AOC: 796 ethtool_link_ksettings_add_link_mode(ks, supported, 797 10000baseT_Full); 798 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 799 ethtool_link_ksettings_add_link_mode(ks, advertising, 800 10000baseT_Full); 801 break; 802 case I40E_PHY_TYPE_SGMII: 803 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 804 ethtool_link_ksettings_add_link_mode(ks, supported, 805 1000baseT_Full); 806 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 807 ethtool_link_ksettings_add_link_mode(ks, advertising, 808 1000baseT_Full); 809 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 810 ethtool_link_ksettings_add_link_mode(ks, supported, 811 100baseT_Full); 812 if (hw_link_info->requested_speeds & 813 I40E_LINK_SPEED_100MB) 814 ethtool_link_ksettings_add_link_mode( 815 ks, advertising, 100baseT_Full); 816 } 817 break; 818 case I40E_PHY_TYPE_40GBASE_KR4: 819 case I40E_PHY_TYPE_25GBASE_KR: 820 case I40E_PHY_TYPE_20GBASE_KR2: 821 case I40E_PHY_TYPE_10GBASE_KR: 822 case I40E_PHY_TYPE_10GBASE_KX4: 823 case I40E_PHY_TYPE_1000BASE_KX: 824 ethtool_link_ksettings_add_link_mode(ks, supported, 825 40000baseKR4_Full); 826 ethtool_link_ksettings_add_link_mode(ks, supported, 827 25000baseKR_Full); 828 ethtool_link_ksettings_add_link_mode(ks, supported, 829 20000baseKR2_Full); 830 ethtool_link_ksettings_add_link_mode(ks, supported, 831 10000baseKR_Full); 832 ethtool_link_ksettings_add_link_mode(ks, supported, 833 10000baseKX4_Full); 834 ethtool_link_ksettings_add_link_mode(ks, supported, 835 1000baseKX_Full); 836 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 837 ethtool_link_ksettings_add_link_mode(ks, advertising, 838 40000baseKR4_Full); 839 ethtool_link_ksettings_add_link_mode(ks, advertising, 840 25000baseKR_Full); 841 ethtool_link_ksettings_add_link_mode(ks, advertising, 842 20000baseKR2_Full); 843 ethtool_link_ksettings_add_link_mode(ks, advertising, 844 10000baseKR_Full); 845 ethtool_link_ksettings_add_link_mode(ks, advertising, 846 10000baseKX4_Full); 847 ethtool_link_ksettings_add_link_mode(ks, advertising, 848 1000baseKX_Full); 849 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 850 break; 851 case I40E_PHY_TYPE_25GBASE_CR: 852 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 853 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 854 ethtool_link_ksettings_add_link_mode(ks, supported, 855 25000baseCR_Full); 856 ethtool_link_ksettings_add_link_mode(ks, advertising, 857 25000baseCR_Full); 858 break; 859 case I40E_PHY_TYPE_25GBASE_AOC: 860 case I40E_PHY_TYPE_25GBASE_ACC: 861 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 862 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 863 ethtool_link_ksettings_add_link_mode(ks, supported, 864 25000baseCR_Full); 865 866 ethtool_link_ksettings_add_link_mode(ks, advertising, 867 25000baseCR_Full); 868 ethtool_link_ksettings_add_link_mode(ks, supported, 869 10000baseCR_Full); 870 ethtool_link_ksettings_add_link_mode(ks, advertising, 871 10000baseCR_Full); 872 break; 873 default: 874 /* if we got here and link is up something bad is afoot */ 875 netdev_info(netdev, 876 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 877 hw_link_info->phy_type); 878 } 879 880 /* Now that we've worked out everything that could be supported by the 881 * current PHY type, get what is supported by the NVM and intersect 882 * them to get what is truly supported 883 */ 884 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 885 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 886 ethtool_intersect_link_masks(ks, &cap_ksettings); 887 888 /* Set speed and duplex */ 889 switch (link_speed) { 890 case I40E_LINK_SPEED_40GB: 891 ks->base.speed = SPEED_40000; 892 break; 893 case I40E_LINK_SPEED_25GB: 894 ks->base.speed = SPEED_25000; 895 break; 896 case I40E_LINK_SPEED_20GB: 897 ks->base.speed = SPEED_20000; 898 break; 899 case I40E_LINK_SPEED_10GB: 900 ks->base.speed = SPEED_10000; 901 break; 902 case I40E_LINK_SPEED_1GB: 903 ks->base.speed = SPEED_1000; 904 break; 905 case I40E_LINK_SPEED_100MB: 906 ks->base.speed = SPEED_100; 907 break; 908 default: 909 ks->base.speed = SPEED_UNKNOWN; 910 break; 911 } 912 ks->base.duplex = DUPLEX_FULL; 913 } 914 915 /** 916 * i40e_get_settings_link_down - Get the Link settings for when link is down 917 * @hw: hw structure 918 * @ks: ethtool ksettings to fill in 919 * @pf: pointer to physical function struct 920 * 921 * Reports link settings that can be determined when link is down 922 **/ 923 static void i40e_get_settings_link_down(struct i40e_hw *hw, 924 struct ethtool_link_ksettings *ks, 925 struct i40e_pf *pf) 926 { 927 /* link is down and the driver needs to fall back on 928 * supported phy types to figure out what info to display 929 */ 930 i40e_phy_type_to_ethtool(pf, ks); 931 932 /* With no link speed and duplex are unknown */ 933 ks->base.speed = SPEED_UNKNOWN; 934 ks->base.duplex = DUPLEX_UNKNOWN; 935 } 936 937 /** 938 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 939 * @netdev: network interface device structure 940 * @ks: ethtool ksettings 941 * 942 * Reports speed/duplex settings based on media_type 943 **/ 944 static int i40e_get_link_ksettings(struct net_device *netdev, 945 struct ethtool_link_ksettings *ks) 946 { 947 struct i40e_netdev_priv *np = netdev_priv(netdev); 948 struct i40e_pf *pf = np->vsi->back; 949 struct i40e_hw *hw = &pf->hw; 950 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 951 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 952 953 ethtool_link_ksettings_zero_link_mode(ks, supported); 954 ethtool_link_ksettings_zero_link_mode(ks, advertising); 955 956 if (link_up) 957 i40e_get_settings_link_up(hw, ks, netdev, pf); 958 else 959 i40e_get_settings_link_down(hw, ks, pf); 960 961 /* Now set the settings that don't rely on link being up/down */ 962 /* Set autoneg settings */ 963 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 964 AUTONEG_ENABLE : AUTONEG_DISABLE); 965 966 /* Set media type settings */ 967 switch (hw->phy.media_type) { 968 case I40E_MEDIA_TYPE_BACKPLANE: 969 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 970 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 971 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 972 ethtool_link_ksettings_add_link_mode(ks, advertising, 973 Backplane); 974 ks->base.port = PORT_NONE; 975 break; 976 case I40E_MEDIA_TYPE_BASET: 977 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 978 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 979 ks->base.port = PORT_TP; 980 break; 981 case I40E_MEDIA_TYPE_DA: 982 case I40E_MEDIA_TYPE_CX4: 983 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 984 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 985 ks->base.port = PORT_DA; 986 break; 987 case I40E_MEDIA_TYPE_FIBER: 988 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 989 ks->base.port = PORT_FIBRE; 990 break; 991 case I40E_MEDIA_TYPE_UNKNOWN: 992 default: 993 ks->base.port = PORT_OTHER; 994 break; 995 } 996 997 /* Set flow control settings */ 998 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 999 1000 switch (hw->fc.requested_mode) { 1001 case I40E_FC_FULL: 1002 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1003 break; 1004 case I40E_FC_TX_PAUSE: 1005 ethtool_link_ksettings_add_link_mode(ks, advertising, 1006 Asym_Pause); 1007 break; 1008 case I40E_FC_RX_PAUSE: 1009 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1010 ethtool_link_ksettings_add_link_mode(ks, advertising, 1011 Asym_Pause); 1012 break; 1013 default: 1014 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1015 ethtool_link_ksettings_del_link_mode(ks, advertising, 1016 Asym_Pause); 1017 break; 1018 } 1019 1020 return 0; 1021 } 1022 1023 /** 1024 * i40e_set_link_ksettings - Set Speed and Duplex 1025 * @netdev: network interface device structure 1026 * @ks: ethtool ksettings 1027 * 1028 * Set speed/duplex per media_types advertised/forced 1029 **/ 1030 static int i40e_set_link_ksettings(struct net_device *netdev, 1031 const struct ethtool_link_ksettings *ks) 1032 { 1033 struct i40e_netdev_priv *np = netdev_priv(netdev); 1034 struct i40e_aq_get_phy_abilities_resp abilities; 1035 struct ethtool_link_ksettings safe_ks; 1036 struct ethtool_link_ksettings copy_ks; 1037 struct i40e_aq_set_phy_config config; 1038 struct i40e_pf *pf = np->vsi->back; 1039 struct i40e_vsi *vsi = np->vsi; 1040 struct i40e_hw *hw = &pf->hw; 1041 bool autoneg_changed = false; 1042 i40e_status status = 0; 1043 int timeout = 50; 1044 int err = 0; 1045 u8 autoneg; 1046 1047 /* Changing port settings is not supported if this isn't the 1048 * port's controlling PF 1049 */ 1050 if (hw->partition_id != 1) { 1051 i40e_partition_setting_complaint(pf); 1052 return -EOPNOTSUPP; 1053 } 1054 if (vsi != pf->vsi[pf->lan_vsi]) 1055 return -EOPNOTSUPP; 1056 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1057 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1058 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1059 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1060 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1061 return -EOPNOTSUPP; 1062 if (hw->device_id == I40E_DEV_ID_KX_B || 1063 hw->device_id == I40E_DEV_ID_KX_C || 1064 hw->device_id == I40E_DEV_ID_20G_KR2 || 1065 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1066 hw->device_id == I40E_DEV_ID_25G_B || 1067 hw->device_id == I40E_DEV_ID_KX_X722) { 1068 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1069 return -EOPNOTSUPP; 1070 } 1071 1072 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1073 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1074 1075 /* save autoneg out of ksettings */ 1076 autoneg = copy_ks.base.autoneg; 1077 1078 /* get our own copy of the bits to check against */ 1079 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1080 safe_ks.base.cmd = copy_ks.base.cmd; 1081 safe_ks.base.link_mode_masks_nwords = 1082 copy_ks.base.link_mode_masks_nwords; 1083 i40e_get_link_ksettings(netdev, &safe_ks); 1084 1085 /* Get link modes supported by hardware and check against modes 1086 * requested by the user. Return an error if unsupported mode was set. 1087 */ 1088 if (!bitmap_subset(copy_ks.link_modes.advertising, 1089 safe_ks.link_modes.supported, 1090 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1091 return -EINVAL; 1092 1093 /* set autoneg back to what it currently is */ 1094 copy_ks.base.autoneg = safe_ks.base.autoneg; 1095 1096 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1097 * trying to set something that we do not support. 1098 */ 1099 if (memcmp(©_ks.base, &safe_ks.base, 1100 sizeof(struct ethtool_link_settings))) 1101 return -EOPNOTSUPP; 1102 1103 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1104 timeout--; 1105 if (!timeout) 1106 return -EBUSY; 1107 usleep_range(1000, 2000); 1108 } 1109 1110 /* Get the current phy config */ 1111 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1112 NULL); 1113 if (status) { 1114 err = -EAGAIN; 1115 goto done; 1116 } 1117 1118 /* Copy abilities to config in case autoneg is not 1119 * set below 1120 */ 1121 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1122 config.abilities = abilities.abilities; 1123 1124 /* Check autoneg */ 1125 if (autoneg == AUTONEG_ENABLE) { 1126 /* If autoneg was not already enabled */ 1127 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1128 /* If autoneg is not supported, return error */ 1129 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1130 supported, 1131 Autoneg)) { 1132 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1133 err = -EINVAL; 1134 goto done; 1135 } 1136 /* Autoneg is allowed to change */ 1137 config.abilities = abilities.abilities | 1138 I40E_AQ_PHY_ENABLE_AN; 1139 autoneg_changed = true; 1140 } 1141 } else { 1142 /* If autoneg is currently enabled */ 1143 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1144 /* If autoneg is supported 10GBASE_T is the only PHY 1145 * that can disable it, so otherwise return error 1146 */ 1147 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1148 supported, 1149 Autoneg) && 1150 hw->phy.link_info.phy_type != 1151 I40E_PHY_TYPE_10GBASE_T) { 1152 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1153 err = -EINVAL; 1154 goto done; 1155 } 1156 /* Autoneg is allowed to change */ 1157 config.abilities = abilities.abilities & 1158 ~I40E_AQ_PHY_ENABLE_AN; 1159 autoneg_changed = true; 1160 } 1161 } 1162 1163 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1164 100baseT_Full)) 1165 config.link_speed |= I40E_LINK_SPEED_100MB; 1166 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1167 1000baseT_Full) || 1168 ethtool_link_ksettings_test_link_mode(ks, advertising, 1169 1000baseX_Full) || 1170 ethtool_link_ksettings_test_link_mode(ks, advertising, 1171 1000baseKX_Full)) 1172 config.link_speed |= I40E_LINK_SPEED_1GB; 1173 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1174 10000baseT_Full) || 1175 ethtool_link_ksettings_test_link_mode(ks, advertising, 1176 10000baseKX4_Full) || 1177 ethtool_link_ksettings_test_link_mode(ks, advertising, 1178 10000baseKR_Full) || 1179 ethtool_link_ksettings_test_link_mode(ks, advertising, 1180 10000baseCR_Full) || 1181 ethtool_link_ksettings_test_link_mode(ks, advertising, 1182 10000baseSR_Full) || 1183 ethtool_link_ksettings_test_link_mode(ks, advertising, 1184 10000baseLR_Full)) 1185 config.link_speed |= I40E_LINK_SPEED_10GB; 1186 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1187 20000baseKR2_Full)) 1188 config.link_speed |= I40E_LINK_SPEED_20GB; 1189 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1190 25000baseCR_Full) || 1191 ethtool_link_ksettings_test_link_mode(ks, advertising, 1192 25000baseKR_Full) || 1193 ethtool_link_ksettings_test_link_mode(ks, advertising, 1194 25000baseSR_Full)) 1195 config.link_speed |= I40E_LINK_SPEED_25GB; 1196 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1197 40000baseKR4_Full) || 1198 ethtool_link_ksettings_test_link_mode(ks, advertising, 1199 40000baseCR4_Full) || 1200 ethtool_link_ksettings_test_link_mode(ks, advertising, 1201 40000baseSR4_Full) || 1202 ethtool_link_ksettings_test_link_mode(ks, advertising, 1203 40000baseLR4_Full)) 1204 config.link_speed |= I40E_LINK_SPEED_40GB; 1205 1206 /* If speed didn't get set, set it to what it currently is. 1207 * This is needed because if advertise is 0 (as it is when autoneg 1208 * is disabled) then speed won't get set. 1209 */ 1210 if (!config.link_speed) 1211 config.link_speed = abilities.link_speed; 1212 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1213 /* copy over the rest of the abilities */ 1214 config.phy_type = abilities.phy_type; 1215 config.phy_type_ext = abilities.phy_type_ext; 1216 config.eee_capability = abilities.eee_capability; 1217 config.eeer = abilities.eeer_val; 1218 config.low_power_ctrl = abilities.d3_lpan; 1219 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1220 I40E_AQ_PHY_FEC_CONFIG_MASK; 1221 1222 /* save the requested speeds */ 1223 hw->phy.link_info.requested_speeds = config.link_speed; 1224 /* set link and auto negotiation so changes take effect */ 1225 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1226 /* If link is up put link down */ 1227 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1228 /* Tell the OS link is going down, the link will go 1229 * back up when fw says it is ready asynchronously 1230 */ 1231 i40e_print_link_message(vsi, false); 1232 netif_carrier_off(netdev); 1233 netif_tx_stop_all_queues(netdev); 1234 } 1235 1236 /* make the aq call */ 1237 status = i40e_aq_set_phy_config(hw, &config, NULL); 1238 if (status) { 1239 netdev_info(netdev, 1240 "Set phy config failed, err %s aq_err %s\n", 1241 i40e_stat_str(hw, status), 1242 i40e_aq_str(hw, hw->aq.asq_last_status)); 1243 err = -EAGAIN; 1244 goto done; 1245 } 1246 1247 status = i40e_update_link_info(hw); 1248 if (status) 1249 netdev_dbg(netdev, 1250 "Updating link info failed with err %s aq_err %s\n", 1251 i40e_stat_str(hw, status), 1252 i40e_aq_str(hw, hw->aq.asq_last_status)); 1253 1254 } else { 1255 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1256 } 1257 1258 done: 1259 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1260 1261 return err; 1262 } 1263 1264 static int i40e_nway_reset(struct net_device *netdev) 1265 { 1266 /* restart autonegotiation */ 1267 struct i40e_netdev_priv *np = netdev_priv(netdev); 1268 struct i40e_pf *pf = np->vsi->back; 1269 struct i40e_hw *hw = &pf->hw; 1270 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1271 i40e_status ret = 0; 1272 1273 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1274 if (ret) { 1275 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1276 i40e_stat_str(hw, ret), 1277 i40e_aq_str(hw, hw->aq.asq_last_status)); 1278 return -EIO; 1279 } 1280 1281 return 0; 1282 } 1283 1284 /** 1285 * i40e_get_pauseparam - Get Flow Control status 1286 * @netdev: netdevice structure 1287 * @pause: buffer to return pause parameters 1288 * 1289 * Return tx/rx-pause status 1290 **/ 1291 static void i40e_get_pauseparam(struct net_device *netdev, 1292 struct ethtool_pauseparam *pause) 1293 { 1294 struct i40e_netdev_priv *np = netdev_priv(netdev); 1295 struct i40e_pf *pf = np->vsi->back; 1296 struct i40e_hw *hw = &pf->hw; 1297 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1298 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1299 1300 pause->autoneg = 1301 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1302 AUTONEG_ENABLE : AUTONEG_DISABLE); 1303 1304 /* PFC enabled so report LFC as off */ 1305 if (dcbx_cfg->pfc.pfcenable) { 1306 pause->rx_pause = 0; 1307 pause->tx_pause = 0; 1308 return; 1309 } 1310 1311 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1312 pause->rx_pause = 1; 1313 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1314 pause->tx_pause = 1; 1315 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1316 pause->rx_pause = 1; 1317 pause->tx_pause = 1; 1318 } 1319 } 1320 1321 /** 1322 * i40e_set_pauseparam - Set Flow Control parameter 1323 * @netdev: network interface device structure 1324 * @pause: return tx/rx flow control status 1325 **/ 1326 static int i40e_set_pauseparam(struct net_device *netdev, 1327 struct ethtool_pauseparam *pause) 1328 { 1329 struct i40e_netdev_priv *np = netdev_priv(netdev); 1330 struct i40e_pf *pf = np->vsi->back; 1331 struct i40e_vsi *vsi = np->vsi; 1332 struct i40e_hw *hw = &pf->hw; 1333 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1334 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1335 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1336 i40e_status status; 1337 u8 aq_failures; 1338 int err = 0; 1339 u32 is_an; 1340 1341 /* Changing the port's flow control is not supported if this isn't the 1342 * port's controlling PF 1343 */ 1344 if (hw->partition_id != 1) { 1345 i40e_partition_setting_complaint(pf); 1346 return -EOPNOTSUPP; 1347 } 1348 1349 if (vsi != pf->vsi[pf->lan_vsi]) 1350 return -EOPNOTSUPP; 1351 1352 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED; 1353 if (pause->autoneg != is_an) { 1354 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1355 return -EOPNOTSUPP; 1356 } 1357 1358 /* If we have link and don't have autoneg */ 1359 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) { 1360 /* Send message that it might not necessarily work*/ 1361 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1362 } 1363 1364 if (dcbx_cfg->pfc.pfcenable) { 1365 netdev_info(netdev, 1366 "Priority flow control enabled. Cannot set link flow control.\n"); 1367 return -EOPNOTSUPP; 1368 } 1369 1370 if (pause->rx_pause && pause->tx_pause) 1371 hw->fc.requested_mode = I40E_FC_FULL; 1372 else if (pause->rx_pause && !pause->tx_pause) 1373 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1374 else if (!pause->rx_pause && pause->tx_pause) 1375 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1376 else if (!pause->rx_pause && !pause->tx_pause) 1377 hw->fc.requested_mode = I40E_FC_NONE; 1378 else 1379 return -EINVAL; 1380 1381 /* Tell the OS link is going down, the link will go back up when fw 1382 * says it is ready asynchronously 1383 */ 1384 i40e_print_link_message(vsi, false); 1385 netif_carrier_off(netdev); 1386 netif_tx_stop_all_queues(netdev); 1387 1388 /* Set the fc mode and only restart an if link is up*/ 1389 status = i40e_set_fc(hw, &aq_failures, link_up); 1390 1391 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1392 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1393 i40e_stat_str(hw, status), 1394 i40e_aq_str(hw, hw->aq.asq_last_status)); 1395 err = -EAGAIN; 1396 } 1397 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1398 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1399 i40e_stat_str(hw, status), 1400 i40e_aq_str(hw, hw->aq.asq_last_status)); 1401 err = -EAGAIN; 1402 } 1403 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1404 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1405 i40e_stat_str(hw, status), 1406 i40e_aq_str(hw, hw->aq.asq_last_status)); 1407 err = -EAGAIN; 1408 } 1409 1410 if (!test_bit(__I40E_DOWN, pf->state) && is_an) { 1411 /* Give it a little more time to try to come back */ 1412 msleep(75); 1413 if (!test_bit(__I40E_DOWN, pf->state)) 1414 return i40e_nway_reset(netdev); 1415 } 1416 1417 return err; 1418 } 1419 1420 static u32 i40e_get_msglevel(struct net_device *netdev) 1421 { 1422 struct i40e_netdev_priv *np = netdev_priv(netdev); 1423 struct i40e_pf *pf = np->vsi->back; 1424 u32 debug_mask = pf->hw.debug_mask; 1425 1426 if (debug_mask) 1427 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1428 1429 return pf->msg_enable; 1430 } 1431 1432 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1433 { 1434 struct i40e_netdev_priv *np = netdev_priv(netdev); 1435 struct i40e_pf *pf = np->vsi->back; 1436 1437 if (I40E_DEBUG_USER & data) 1438 pf->hw.debug_mask = data; 1439 else 1440 pf->msg_enable = data; 1441 } 1442 1443 static int i40e_get_regs_len(struct net_device *netdev) 1444 { 1445 int reg_count = 0; 1446 int i; 1447 1448 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1449 reg_count += i40e_reg_list[i].elements; 1450 1451 return reg_count * sizeof(u32); 1452 } 1453 1454 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1455 void *p) 1456 { 1457 struct i40e_netdev_priv *np = netdev_priv(netdev); 1458 struct i40e_pf *pf = np->vsi->back; 1459 struct i40e_hw *hw = &pf->hw; 1460 u32 *reg_buf = p; 1461 unsigned int i, j, ri; 1462 u32 reg; 1463 1464 /* Tell ethtool which driver-version-specific regs output we have. 1465 * 1466 * At some point, if we have ethtool doing special formatting of 1467 * this data, it will rely on this version number to know how to 1468 * interpret things. Hence, this needs to be updated if/when the 1469 * diags register table is changed. 1470 */ 1471 regs->version = 1; 1472 1473 /* loop through the diags reg table for what to print */ 1474 ri = 0; 1475 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1476 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1477 reg = i40e_reg_list[i].offset 1478 + (j * i40e_reg_list[i].stride); 1479 reg_buf[ri++] = rd32(hw, reg); 1480 } 1481 } 1482 1483 } 1484 1485 static int i40e_get_eeprom(struct net_device *netdev, 1486 struct ethtool_eeprom *eeprom, u8 *bytes) 1487 { 1488 struct i40e_netdev_priv *np = netdev_priv(netdev); 1489 struct i40e_hw *hw = &np->vsi->back->hw; 1490 struct i40e_pf *pf = np->vsi->back; 1491 int ret_val = 0, len, offset; 1492 u8 *eeprom_buff; 1493 u16 i, sectors; 1494 bool last; 1495 u32 magic; 1496 1497 #define I40E_NVM_SECTOR_SIZE 4096 1498 if (eeprom->len == 0) 1499 return -EINVAL; 1500 1501 /* check for NVMUpdate access method */ 1502 magic = hw->vendor_id | (hw->device_id << 16); 1503 if (eeprom->magic && eeprom->magic != magic) { 1504 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1505 int errno = 0; 1506 1507 /* make sure it is the right magic for NVMUpdate */ 1508 if ((eeprom->magic >> 16) != hw->device_id) 1509 errno = -EINVAL; 1510 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1511 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1512 errno = -EBUSY; 1513 else 1514 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1515 1516 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1517 dev_info(&pf->pdev->dev, 1518 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1519 ret_val, hw->aq.asq_last_status, errno, 1520 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1521 cmd->offset, cmd->data_size); 1522 1523 return errno; 1524 } 1525 1526 /* normal ethtool get_eeprom support */ 1527 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1528 1529 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1530 if (!eeprom_buff) 1531 return -ENOMEM; 1532 1533 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1534 if (ret_val) { 1535 dev_info(&pf->pdev->dev, 1536 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1537 ret_val, hw->aq.asq_last_status); 1538 goto free_buff; 1539 } 1540 1541 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1542 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1543 len = I40E_NVM_SECTOR_SIZE; 1544 last = false; 1545 for (i = 0; i < sectors; i++) { 1546 if (i == (sectors - 1)) { 1547 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1548 last = true; 1549 } 1550 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1551 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1552 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1553 last, NULL); 1554 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1555 dev_info(&pf->pdev->dev, 1556 "read NVM failed, invalid offset 0x%x\n", 1557 offset); 1558 break; 1559 } else if (ret_val && 1560 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1561 dev_info(&pf->pdev->dev, 1562 "read NVM failed, access, offset 0x%x\n", 1563 offset); 1564 break; 1565 } else if (ret_val) { 1566 dev_info(&pf->pdev->dev, 1567 "read NVM failed offset %d err=%d status=0x%x\n", 1568 offset, ret_val, hw->aq.asq_last_status); 1569 break; 1570 } 1571 } 1572 1573 i40e_release_nvm(hw); 1574 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1575 free_buff: 1576 kfree(eeprom_buff); 1577 return ret_val; 1578 } 1579 1580 static int i40e_get_eeprom_len(struct net_device *netdev) 1581 { 1582 struct i40e_netdev_priv *np = netdev_priv(netdev); 1583 struct i40e_hw *hw = &np->vsi->back->hw; 1584 u32 val; 1585 1586 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1587 if (hw->mac.type == I40E_MAC_X722) { 1588 val = X722_EEPROM_SCOPE_LIMIT + 1; 1589 return val; 1590 } 1591 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1592 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1593 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1594 /* register returns value in power of 2, 64Kbyte chunks. */ 1595 val = (64 * 1024) * BIT(val); 1596 return val; 1597 } 1598 1599 static int i40e_set_eeprom(struct net_device *netdev, 1600 struct ethtool_eeprom *eeprom, u8 *bytes) 1601 { 1602 struct i40e_netdev_priv *np = netdev_priv(netdev); 1603 struct i40e_hw *hw = &np->vsi->back->hw; 1604 struct i40e_pf *pf = np->vsi->back; 1605 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1606 int ret_val = 0; 1607 int errno = 0; 1608 u32 magic; 1609 1610 /* normal ethtool set_eeprom is not supported */ 1611 magic = hw->vendor_id | (hw->device_id << 16); 1612 if (eeprom->magic == magic) 1613 errno = -EOPNOTSUPP; 1614 /* check for NVMUpdate access method */ 1615 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1616 errno = -EINVAL; 1617 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1618 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1619 errno = -EBUSY; 1620 else 1621 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1622 1623 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1624 dev_info(&pf->pdev->dev, 1625 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1626 ret_val, hw->aq.asq_last_status, errno, 1627 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1628 cmd->offset, cmd->data_size); 1629 1630 return errno; 1631 } 1632 1633 static void i40e_get_drvinfo(struct net_device *netdev, 1634 struct ethtool_drvinfo *drvinfo) 1635 { 1636 struct i40e_netdev_priv *np = netdev_priv(netdev); 1637 struct i40e_vsi *vsi = np->vsi; 1638 struct i40e_pf *pf = vsi->back; 1639 1640 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1641 strlcpy(drvinfo->version, i40e_driver_version_str, 1642 sizeof(drvinfo->version)); 1643 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1644 sizeof(drvinfo->fw_version)); 1645 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1646 sizeof(drvinfo->bus_info)); 1647 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1648 if (pf->hw.pf_id == 0) 1649 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1650 } 1651 1652 static void i40e_get_ringparam(struct net_device *netdev, 1653 struct ethtool_ringparam *ring) 1654 { 1655 struct i40e_netdev_priv *np = netdev_priv(netdev); 1656 struct i40e_pf *pf = np->vsi->back; 1657 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1658 1659 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1660 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1661 ring->rx_mini_max_pending = 0; 1662 ring->rx_jumbo_max_pending = 0; 1663 ring->rx_pending = vsi->rx_rings[0]->count; 1664 ring->tx_pending = vsi->tx_rings[0]->count; 1665 ring->rx_mini_pending = 0; 1666 ring->rx_jumbo_pending = 0; 1667 } 1668 1669 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1670 { 1671 if (i40e_enabled_xdp_vsi(vsi)) { 1672 return index < vsi->num_queue_pairs || 1673 (index >= vsi->alloc_queue_pairs && 1674 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1675 } 1676 1677 return index < vsi->num_queue_pairs; 1678 } 1679 1680 static int i40e_set_ringparam(struct net_device *netdev, 1681 struct ethtool_ringparam *ring) 1682 { 1683 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1684 struct i40e_netdev_priv *np = netdev_priv(netdev); 1685 struct i40e_hw *hw = &np->vsi->back->hw; 1686 struct i40e_vsi *vsi = np->vsi; 1687 struct i40e_pf *pf = vsi->back; 1688 u32 new_rx_count, new_tx_count; 1689 u16 tx_alloc_queue_pairs; 1690 int timeout = 50; 1691 int i, err = 0; 1692 1693 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1694 return -EINVAL; 1695 1696 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1697 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1698 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1699 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1700 netdev_info(netdev, 1701 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1702 ring->tx_pending, ring->rx_pending, 1703 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1704 return -EINVAL; 1705 } 1706 1707 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1708 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1709 1710 /* if nothing to do return success */ 1711 if ((new_tx_count == vsi->tx_rings[0]->count) && 1712 (new_rx_count == vsi->rx_rings[0]->count)) 1713 return 0; 1714 1715 /* If there is a AF_XDP UMEM attached to any of Rx rings, 1716 * disallow changing the number of descriptors -- regardless 1717 * if the netdev is running or not. 1718 */ 1719 if (i40e_xsk_any_rx_ring_enabled(vsi)) 1720 return -EBUSY; 1721 1722 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1723 timeout--; 1724 if (!timeout) 1725 return -EBUSY; 1726 usleep_range(1000, 2000); 1727 } 1728 1729 if (!netif_running(vsi->netdev)) { 1730 /* simple case - set for the next time the netdev is started */ 1731 for (i = 0; i < vsi->num_queue_pairs; i++) { 1732 vsi->tx_rings[i]->count = new_tx_count; 1733 vsi->rx_rings[i]->count = new_rx_count; 1734 if (i40e_enabled_xdp_vsi(vsi)) 1735 vsi->xdp_rings[i]->count = new_tx_count; 1736 } 1737 goto done; 1738 } 1739 1740 /* We can't just free everything and then setup again, 1741 * because the ISRs in MSI-X mode get passed pointers 1742 * to the Tx and Rx ring structs. 1743 */ 1744 1745 /* alloc updated Tx and XDP Tx resources */ 1746 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1747 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1748 if (new_tx_count != vsi->tx_rings[0]->count) { 1749 netdev_info(netdev, 1750 "Changing Tx descriptor count from %d to %d.\n", 1751 vsi->tx_rings[0]->count, new_tx_count); 1752 tx_rings = kcalloc(tx_alloc_queue_pairs, 1753 sizeof(struct i40e_ring), GFP_KERNEL); 1754 if (!tx_rings) { 1755 err = -ENOMEM; 1756 goto done; 1757 } 1758 1759 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1760 if (!i40e_active_tx_ring_index(vsi, i)) 1761 continue; 1762 1763 tx_rings[i] = *vsi->tx_rings[i]; 1764 tx_rings[i].count = new_tx_count; 1765 /* the desc and bi pointers will be reallocated in the 1766 * setup call 1767 */ 1768 tx_rings[i].desc = NULL; 1769 tx_rings[i].rx_bi = NULL; 1770 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1771 if (err) { 1772 while (i) { 1773 i--; 1774 if (!i40e_active_tx_ring_index(vsi, i)) 1775 continue; 1776 i40e_free_tx_resources(&tx_rings[i]); 1777 } 1778 kfree(tx_rings); 1779 tx_rings = NULL; 1780 1781 goto done; 1782 } 1783 } 1784 } 1785 1786 /* alloc updated Rx resources */ 1787 if (new_rx_count != vsi->rx_rings[0]->count) { 1788 netdev_info(netdev, 1789 "Changing Rx descriptor count from %d to %d\n", 1790 vsi->rx_rings[0]->count, new_rx_count); 1791 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1792 sizeof(struct i40e_ring), GFP_KERNEL); 1793 if (!rx_rings) { 1794 err = -ENOMEM; 1795 goto free_tx; 1796 } 1797 1798 for (i = 0; i < vsi->num_queue_pairs; i++) { 1799 u16 unused; 1800 1801 /* clone ring and setup updated count */ 1802 rx_rings[i] = *vsi->rx_rings[i]; 1803 rx_rings[i].count = new_rx_count; 1804 /* the desc and bi pointers will be reallocated in the 1805 * setup call 1806 */ 1807 rx_rings[i].desc = NULL; 1808 rx_rings[i].rx_bi = NULL; 1809 /* Clear cloned XDP RX-queue info before setup call */ 1810 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 1811 /* this is to allow wr32 to have something to write to 1812 * during early allocation of Rx buffers 1813 */ 1814 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1815 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1816 if (err) 1817 goto rx_unwind; 1818 1819 /* now allocate the Rx buffers to make sure the OS 1820 * has enough memory, any failure here means abort 1821 */ 1822 unused = I40E_DESC_UNUSED(&rx_rings[i]); 1823 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 1824 rx_unwind: 1825 if (err) { 1826 do { 1827 i40e_free_rx_resources(&rx_rings[i]); 1828 } while (i--); 1829 kfree(rx_rings); 1830 rx_rings = NULL; 1831 1832 goto free_tx; 1833 } 1834 } 1835 } 1836 1837 /* Bring interface down, copy in the new ring info, 1838 * then restore the interface 1839 */ 1840 i40e_down(vsi); 1841 1842 if (tx_rings) { 1843 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1844 if (i40e_active_tx_ring_index(vsi, i)) { 1845 i40e_free_tx_resources(vsi->tx_rings[i]); 1846 *vsi->tx_rings[i] = tx_rings[i]; 1847 } 1848 } 1849 kfree(tx_rings); 1850 tx_rings = NULL; 1851 } 1852 1853 if (rx_rings) { 1854 for (i = 0; i < vsi->num_queue_pairs; i++) { 1855 i40e_free_rx_resources(vsi->rx_rings[i]); 1856 /* get the real tail offset */ 1857 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1858 /* this is to fake out the allocation routine 1859 * into thinking it has to realloc everything 1860 * but the recycling logic will let us re-use 1861 * the buffers allocated above 1862 */ 1863 rx_rings[i].next_to_use = 0; 1864 rx_rings[i].next_to_clean = 0; 1865 rx_rings[i].next_to_alloc = 0; 1866 /* do a struct copy */ 1867 *vsi->rx_rings[i] = rx_rings[i]; 1868 } 1869 kfree(rx_rings); 1870 rx_rings = NULL; 1871 } 1872 1873 i40e_up(vsi); 1874 1875 free_tx: 1876 /* error cleanup if the Rx allocations failed after getting Tx */ 1877 if (tx_rings) { 1878 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1879 if (i40e_active_tx_ring_index(vsi, i)) 1880 i40e_free_tx_resources(vsi->tx_rings[i]); 1881 } 1882 kfree(tx_rings); 1883 tx_rings = NULL; 1884 } 1885 1886 done: 1887 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1888 1889 return err; 1890 } 1891 1892 /** 1893 * i40e_get_stats_count - return the stats count for a device 1894 * @netdev: the netdev to return the count for 1895 * 1896 * Returns the total number of statistics for this netdev. Note that even 1897 * though this is a function, it is required that the count for a specific 1898 * netdev must never change. Basing the count on static values such as the 1899 * maximum number of queues or the device type is ok. However, the API for 1900 * obtaining stats is *not* safe against changes based on non-static 1901 * values such as the *current* number of queues, or runtime flags. 1902 * 1903 * If a statistic is not always enabled, return it as part of the count 1904 * anyways, always return its string, and report its value as zero. 1905 **/ 1906 static int i40e_get_stats_count(struct net_device *netdev) 1907 { 1908 struct i40e_netdev_priv *np = netdev_priv(netdev); 1909 struct i40e_vsi *vsi = np->vsi; 1910 struct i40e_pf *pf = vsi->back; 1911 int stats_len; 1912 1913 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 1914 stats_len = I40E_PF_STATS_LEN; 1915 else 1916 stats_len = I40E_VSI_STATS_LEN; 1917 1918 /* The number of stats reported for a given net_device must remain 1919 * constant throughout the life of that device. 1920 * 1921 * This is because the API for obtaining the size, strings, and stats 1922 * is spread out over three separate ethtool ioctls. There is no safe 1923 * way to lock the number of stats across these calls, so we must 1924 * assume that they will never change. 1925 * 1926 * Due to this, we report the maximum number of queues, even if not 1927 * every queue is currently configured. Since we always allocate 1928 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 1929 * works because the num_tx_queues is set at device creation and never 1930 * changes. 1931 */ 1932 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 1933 1934 return stats_len; 1935 } 1936 1937 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1938 { 1939 struct i40e_netdev_priv *np = netdev_priv(netdev); 1940 struct i40e_vsi *vsi = np->vsi; 1941 struct i40e_pf *pf = vsi->back; 1942 1943 switch (sset) { 1944 case ETH_SS_TEST: 1945 return I40E_TEST_LEN; 1946 case ETH_SS_STATS: 1947 return i40e_get_stats_count(netdev); 1948 case ETH_SS_PRIV_FLAGS: 1949 return I40E_PRIV_FLAGS_STR_LEN + 1950 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1951 default: 1952 return -EOPNOTSUPP; 1953 } 1954 } 1955 1956 /** 1957 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 1958 * @pf: the PF device structure 1959 * @i: the priority value to copy 1960 * 1961 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 1962 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 1963 * of the PFC stats for the given priority. 1964 **/ 1965 static inline struct i40e_pfc_stats 1966 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 1967 { 1968 #define I40E_GET_PFC_STAT(stat, priority) \ 1969 .stat = pf->stats.stat[priority] 1970 1971 struct i40e_pfc_stats pfc = { 1972 I40E_GET_PFC_STAT(priority_xon_rx, i), 1973 I40E_GET_PFC_STAT(priority_xoff_rx, i), 1974 I40E_GET_PFC_STAT(priority_xon_tx, i), 1975 I40E_GET_PFC_STAT(priority_xoff_tx, i), 1976 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 1977 }; 1978 return pfc; 1979 } 1980 1981 /** 1982 * i40e_get_ethtool_stats - copy stat values into supplied buffer 1983 * @netdev: the netdev to collect stats for 1984 * @stats: ethtool stats command structure 1985 * @data: ethtool supplied buffer 1986 * 1987 * Copy the stats values for this netdev into the buffer. Expects data to be 1988 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 1989 * statistics must be copied in a static order, and the count must not change 1990 * for a given netdev. See i40e_get_stats_count for more details. 1991 * 1992 * If a statistic is not currently valid (such as a disabled queue), this 1993 * function reports its value as zero. 1994 **/ 1995 static void i40e_get_ethtool_stats(struct net_device *netdev, 1996 struct ethtool_stats *stats, u64 *data) 1997 { 1998 struct i40e_netdev_priv *np = netdev_priv(netdev); 1999 struct i40e_vsi *vsi = np->vsi; 2000 struct i40e_pf *pf = vsi->back; 2001 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 2002 unsigned int i; 2003 bool veb_stats; 2004 u64 *p = data; 2005 2006 i40e_update_stats(vsi); 2007 2008 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2009 i40e_gstrings_net_stats); 2010 2011 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2012 2013 rcu_read_lock(); 2014 for (i = 0; i < netdev->num_tx_queues; i++) { 2015 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2016 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2017 } 2018 rcu_read_unlock(); 2019 2020 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2021 goto check_data_pointer; 2022 2023 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 2024 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 2025 2026 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2027 * we initialize stats to zero and update the data pointer 2028 * intelligently 2029 */ 2030 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2031 i40e_gstrings_veb_stats); 2032 2033 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2034 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2035 i40e_gstrings_veb_tc_stats); 2036 2037 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2038 2039 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2040 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2041 2042 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2043 } 2044 2045 check_data_pointer: 2046 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2047 "ethtool stats count mismatch!"); 2048 } 2049 2050 /** 2051 * i40e_get_stat_strings - copy stat strings into supplied buffer 2052 * @netdev: the netdev to collect strings for 2053 * @data: supplied buffer to copy strings into 2054 * 2055 * Copy the strings related to stats for this netdev. Expects data to be 2056 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2057 * strings must be copied in a static order and the total count must not 2058 * change for a given netdev. See i40e_get_stats_count for more details. 2059 **/ 2060 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2061 { 2062 struct i40e_netdev_priv *np = netdev_priv(netdev); 2063 struct i40e_vsi *vsi = np->vsi; 2064 struct i40e_pf *pf = vsi->back; 2065 unsigned int i; 2066 u8 *p = data; 2067 2068 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2069 2070 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2071 2072 for (i = 0; i < netdev->num_tx_queues; i++) { 2073 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2074 "tx", i); 2075 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2076 "rx", i); 2077 } 2078 2079 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2080 return; 2081 2082 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2083 2084 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2085 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2086 2087 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2088 2089 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2090 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2091 2092 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2093 "stat strings count mismatch!"); 2094 } 2095 2096 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2097 { 2098 struct i40e_netdev_priv *np = netdev_priv(netdev); 2099 struct i40e_vsi *vsi = np->vsi; 2100 struct i40e_pf *pf = vsi->back; 2101 char *p = (char *)data; 2102 unsigned int i; 2103 2104 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 2105 snprintf(p, ETH_GSTRING_LEN, "%s", 2106 i40e_gstrings_priv_flags[i].flag_string); 2107 p += ETH_GSTRING_LEN; 2108 } 2109 if (pf->hw.pf_id != 0) 2110 return; 2111 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 2112 snprintf(p, ETH_GSTRING_LEN, "%s", 2113 i40e_gl_gstrings_priv_flags[i].flag_string); 2114 p += ETH_GSTRING_LEN; 2115 } 2116 } 2117 2118 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2119 u8 *data) 2120 { 2121 switch (stringset) { 2122 case ETH_SS_TEST: 2123 memcpy(data, i40e_gstrings_test, 2124 I40E_TEST_LEN * ETH_GSTRING_LEN); 2125 break; 2126 case ETH_SS_STATS: 2127 i40e_get_stat_strings(netdev, data); 2128 break; 2129 case ETH_SS_PRIV_FLAGS: 2130 i40e_get_priv_flag_strings(netdev, data); 2131 break; 2132 default: 2133 break; 2134 } 2135 } 2136 2137 static int i40e_get_ts_info(struct net_device *dev, 2138 struct ethtool_ts_info *info) 2139 { 2140 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2141 2142 /* only report HW timestamping if PTP is enabled */ 2143 if (!(pf->flags & I40E_FLAG_PTP)) 2144 return ethtool_op_get_ts_info(dev, info); 2145 2146 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2147 SOF_TIMESTAMPING_RX_SOFTWARE | 2148 SOF_TIMESTAMPING_SOFTWARE | 2149 SOF_TIMESTAMPING_TX_HARDWARE | 2150 SOF_TIMESTAMPING_RX_HARDWARE | 2151 SOF_TIMESTAMPING_RAW_HARDWARE; 2152 2153 if (pf->ptp_clock) 2154 info->phc_index = ptp_clock_index(pf->ptp_clock); 2155 else 2156 info->phc_index = -1; 2157 2158 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2159 2160 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2161 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2162 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2163 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2164 2165 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 2166 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2167 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2168 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2169 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2170 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2171 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2172 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2173 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2174 2175 return 0; 2176 } 2177 2178 static int i40e_link_test(struct net_device *netdev, u64 *data) 2179 { 2180 struct i40e_netdev_priv *np = netdev_priv(netdev); 2181 struct i40e_pf *pf = np->vsi->back; 2182 i40e_status status; 2183 bool link_up = false; 2184 2185 netif_info(pf, hw, netdev, "link test\n"); 2186 status = i40e_get_link_status(&pf->hw, &link_up); 2187 if (status) { 2188 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2189 *data = 1; 2190 return *data; 2191 } 2192 2193 if (link_up) 2194 *data = 0; 2195 else 2196 *data = 1; 2197 2198 return *data; 2199 } 2200 2201 static int i40e_reg_test(struct net_device *netdev, u64 *data) 2202 { 2203 struct i40e_netdev_priv *np = netdev_priv(netdev); 2204 struct i40e_pf *pf = np->vsi->back; 2205 2206 netif_info(pf, hw, netdev, "register test\n"); 2207 *data = i40e_diag_reg_test(&pf->hw); 2208 2209 return *data; 2210 } 2211 2212 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 2213 { 2214 struct i40e_netdev_priv *np = netdev_priv(netdev); 2215 struct i40e_pf *pf = np->vsi->back; 2216 2217 netif_info(pf, hw, netdev, "eeprom test\n"); 2218 *data = i40e_diag_eeprom_test(&pf->hw); 2219 2220 /* forcebly clear the NVM Update state machine */ 2221 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2222 2223 return *data; 2224 } 2225 2226 static int i40e_intr_test(struct net_device *netdev, u64 *data) 2227 { 2228 struct i40e_netdev_priv *np = netdev_priv(netdev); 2229 struct i40e_pf *pf = np->vsi->back; 2230 u16 swc_old = pf->sw_int_count; 2231 2232 netif_info(pf, hw, netdev, "interrupt test\n"); 2233 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2234 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2235 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2236 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2237 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2238 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2239 usleep_range(1000, 2000); 2240 *data = (swc_old == pf->sw_int_count); 2241 2242 return *data; 2243 } 2244 2245 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2246 { 2247 struct i40e_vf *vfs = pf->vf; 2248 int i; 2249 2250 for (i = 0; i < pf->num_alloc_vfs; i++) 2251 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2252 return true; 2253 return false; 2254 } 2255 2256 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2257 { 2258 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2259 } 2260 2261 static void i40e_diag_test(struct net_device *netdev, 2262 struct ethtool_test *eth_test, u64 *data) 2263 { 2264 struct i40e_netdev_priv *np = netdev_priv(netdev); 2265 bool if_running = netif_running(netdev); 2266 struct i40e_pf *pf = np->vsi->back; 2267 2268 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2269 /* Offline tests */ 2270 netif_info(pf, drv, netdev, "offline testing starting\n"); 2271 2272 set_bit(__I40E_TESTING, pf->state); 2273 2274 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2275 dev_warn(&pf->pdev->dev, 2276 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2277 data[I40E_ETH_TEST_REG] = 1; 2278 data[I40E_ETH_TEST_EEPROM] = 1; 2279 data[I40E_ETH_TEST_INTR] = 1; 2280 data[I40E_ETH_TEST_LINK] = 1; 2281 eth_test->flags |= ETH_TEST_FL_FAILED; 2282 clear_bit(__I40E_TESTING, pf->state); 2283 goto skip_ol_tests; 2284 } 2285 2286 /* If the device is online then take it offline */ 2287 if (if_running) 2288 /* indicate we're in test mode */ 2289 i40e_close(netdev); 2290 else 2291 /* This reset does not affect link - if it is 2292 * changed to a type of reset that does affect 2293 * link then the following link test would have 2294 * to be moved to before the reset 2295 */ 2296 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2297 2298 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2299 eth_test->flags |= ETH_TEST_FL_FAILED; 2300 2301 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2302 eth_test->flags |= ETH_TEST_FL_FAILED; 2303 2304 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2305 eth_test->flags |= ETH_TEST_FL_FAILED; 2306 2307 /* run reg test last, a reset is required after it */ 2308 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2309 eth_test->flags |= ETH_TEST_FL_FAILED; 2310 2311 clear_bit(__I40E_TESTING, pf->state); 2312 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2313 2314 if (if_running) 2315 i40e_open(netdev); 2316 } else { 2317 /* Online tests */ 2318 netif_info(pf, drv, netdev, "online testing starting\n"); 2319 2320 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2321 eth_test->flags |= ETH_TEST_FL_FAILED; 2322 2323 /* Offline only tests, not run in online; pass by default */ 2324 data[I40E_ETH_TEST_REG] = 0; 2325 data[I40E_ETH_TEST_EEPROM] = 0; 2326 data[I40E_ETH_TEST_INTR] = 0; 2327 } 2328 2329 skip_ol_tests: 2330 2331 netif_info(pf, drv, netdev, "testing finished\n"); 2332 } 2333 2334 static void i40e_get_wol(struct net_device *netdev, 2335 struct ethtool_wolinfo *wol) 2336 { 2337 struct i40e_netdev_priv *np = netdev_priv(netdev); 2338 struct i40e_pf *pf = np->vsi->back; 2339 struct i40e_hw *hw = &pf->hw; 2340 u16 wol_nvm_bits; 2341 2342 /* NVM bit on means WoL disabled for the port */ 2343 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2344 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2345 wol->supported = 0; 2346 wol->wolopts = 0; 2347 } else { 2348 wol->supported = WAKE_MAGIC; 2349 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2350 } 2351 } 2352 2353 /** 2354 * i40e_set_wol - set the WakeOnLAN configuration 2355 * @netdev: the netdev in question 2356 * @wol: the ethtool WoL setting data 2357 **/ 2358 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2359 { 2360 struct i40e_netdev_priv *np = netdev_priv(netdev); 2361 struct i40e_pf *pf = np->vsi->back; 2362 struct i40e_vsi *vsi = np->vsi; 2363 struct i40e_hw *hw = &pf->hw; 2364 u16 wol_nvm_bits; 2365 2366 /* WoL not supported if this isn't the controlling PF on the port */ 2367 if (hw->partition_id != 1) { 2368 i40e_partition_setting_complaint(pf); 2369 return -EOPNOTSUPP; 2370 } 2371 2372 if (vsi != pf->vsi[pf->lan_vsi]) 2373 return -EOPNOTSUPP; 2374 2375 /* NVM bit on means WoL disabled for the port */ 2376 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2377 if (BIT(hw->port) & wol_nvm_bits) 2378 return -EOPNOTSUPP; 2379 2380 /* only magic packet is supported */ 2381 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC) 2382 | (wol->wolopts != WAKE_FILTER)) 2383 return -EOPNOTSUPP; 2384 2385 /* is this a new value? */ 2386 if (pf->wol_en != !!wol->wolopts) { 2387 pf->wol_en = !!wol->wolopts; 2388 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2389 } 2390 2391 return 0; 2392 } 2393 2394 static int i40e_set_phys_id(struct net_device *netdev, 2395 enum ethtool_phys_id_state state) 2396 { 2397 struct i40e_netdev_priv *np = netdev_priv(netdev); 2398 i40e_status ret = 0; 2399 struct i40e_pf *pf = np->vsi->back; 2400 struct i40e_hw *hw = &pf->hw; 2401 int blink_freq = 2; 2402 u16 temp_status; 2403 2404 switch (state) { 2405 case ETHTOOL_ID_ACTIVE: 2406 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2407 pf->led_status = i40e_led_get(hw); 2408 } else { 2409 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2410 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2411 NULL); 2412 ret = i40e_led_get_phy(hw, &temp_status, 2413 &pf->phy_led_val); 2414 pf->led_status = temp_status; 2415 } 2416 return blink_freq; 2417 case ETHTOOL_ID_ON: 2418 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2419 i40e_led_set(hw, 0xf, false); 2420 else 2421 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2422 break; 2423 case ETHTOOL_ID_OFF: 2424 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2425 i40e_led_set(hw, 0x0, false); 2426 else 2427 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2428 break; 2429 case ETHTOOL_ID_INACTIVE: 2430 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2431 i40e_led_set(hw, pf->led_status, false); 2432 } else { 2433 ret = i40e_led_set_phy(hw, false, pf->led_status, 2434 (pf->phy_led_val | 2435 I40E_PHY_LED_MODE_ORIG)); 2436 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2437 i40e_aq_set_phy_debug(hw, 0, NULL); 2438 } 2439 break; 2440 default: 2441 break; 2442 } 2443 if (ret) 2444 return -ENOENT; 2445 else 2446 return 0; 2447 } 2448 2449 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2450 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2451 * 125us (8000 interrupts per second) == ITR(62) 2452 */ 2453 2454 /** 2455 * __i40e_get_coalesce - get per-queue coalesce settings 2456 * @netdev: the netdev to check 2457 * @ec: ethtool coalesce data structure 2458 * @queue: which queue to pick 2459 * 2460 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2461 * are per queue. If queue is <0 then we default to queue 0 as the 2462 * representative value. 2463 **/ 2464 static int __i40e_get_coalesce(struct net_device *netdev, 2465 struct ethtool_coalesce *ec, 2466 int queue) 2467 { 2468 struct i40e_netdev_priv *np = netdev_priv(netdev); 2469 struct i40e_ring *rx_ring, *tx_ring; 2470 struct i40e_vsi *vsi = np->vsi; 2471 2472 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2473 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2474 2475 /* rx and tx usecs has per queue value. If user doesn't specify the 2476 * queue, return queue 0's value to represent. 2477 */ 2478 if (queue < 0) 2479 queue = 0; 2480 else if (queue >= vsi->num_queue_pairs) 2481 return -EINVAL; 2482 2483 rx_ring = vsi->rx_rings[queue]; 2484 tx_ring = vsi->tx_rings[queue]; 2485 2486 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2487 ec->use_adaptive_rx_coalesce = 1; 2488 2489 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2490 ec->use_adaptive_tx_coalesce = 1; 2491 2492 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2493 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2494 2495 /* we use the _usecs_high to store/set the interrupt rate limit 2496 * that the hardware supports, that almost but not quite 2497 * fits the original intent of the ethtool variable, 2498 * the rx_coalesce_usecs_high limits total interrupts 2499 * per second from both tx/rx sources. 2500 */ 2501 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2502 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2503 2504 return 0; 2505 } 2506 2507 /** 2508 * i40e_get_coalesce - get a netdev's coalesce settings 2509 * @netdev: the netdev to check 2510 * @ec: ethtool coalesce data structure 2511 * 2512 * Gets the coalesce settings for a particular netdev. Note that if user has 2513 * modified per-queue settings, this only guarantees to represent queue 0. See 2514 * __i40e_get_coalesce for more details. 2515 **/ 2516 static int i40e_get_coalesce(struct net_device *netdev, 2517 struct ethtool_coalesce *ec) 2518 { 2519 return __i40e_get_coalesce(netdev, ec, -1); 2520 } 2521 2522 /** 2523 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2524 * @netdev: netdev structure 2525 * @ec: ethtool's coalesce settings 2526 * @queue: the particular queue to read 2527 * 2528 * Will read a specific queue's coalesce settings 2529 **/ 2530 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2531 struct ethtool_coalesce *ec) 2532 { 2533 return __i40e_get_coalesce(netdev, ec, queue); 2534 } 2535 2536 /** 2537 * i40e_set_itr_per_queue - set ITR values for specific queue 2538 * @vsi: the VSI to set values for 2539 * @ec: coalesce settings from ethtool 2540 * @queue: the queue to modify 2541 * 2542 * Change the ITR settings for a specific queue. 2543 **/ 2544 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2545 struct ethtool_coalesce *ec, 2546 int queue) 2547 { 2548 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2549 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2550 struct i40e_pf *pf = vsi->back; 2551 struct i40e_hw *hw = &pf->hw; 2552 struct i40e_q_vector *q_vector; 2553 u16 intrl; 2554 2555 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2556 2557 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2558 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2559 2560 if (ec->use_adaptive_rx_coalesce) 2561 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2562 else 2563 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2564 2565 if (ec->use_adaptive_tx_coalesce) 2566 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2567 else 2568 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2569 2570 q_vector = rx_ring->q_vector; 2571 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2572 2573 q_vector = tx_ring->q_vector; 2574 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2575 2576 /* The interrupt handler itself will take care of programming 2577 * the Tx and Rx ITR values based on the values we have entered 2578 * into the q_vector, no need to write the values now. 2579 */ 2580 2581 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2582 i40e_flush(hw); 2583 } 2584 2585 /** 2586 * __i40e_set_coalesce - set coalesce settings for particular queue 2587 * @netdev: the netdev to change 2588 * @ec: ethtool coalesce settings 2589 * @queue: the queue to change 2590 * 2591 * Sets the coalesce settings for a particular queue. 2592 **/ 2593 static int __i40e_set_coalesce(struct net_device *netdev, 2594 struct ethtool_coalesce *ec, 2595 int queue) 2596 { 2597 struct i40e_netdev_priv *np = netdev_priv(netdev); 2598 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2599 struct i40e_vsi *vsi = np->vsi; 2600 struct i40e_pf *pf = vsi->back; 2601 int i; 2602 2603 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2604 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2605 2606 if (queue < 0) { 2607 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2608 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2609 } else if (queue < vsi->num_queue_pairs) { 2610 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2611 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2612 } else { 2613 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2614 vsi->num_queue_pairs - 1); 2615 return -EINVAL; 2616 } 2617 2618 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2619 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2620 2621 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2622 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2623 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2624 return -EINVAL; 2625 } 2626 2627 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2628 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2629 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2630 return -EINVAL; 2631 } 2632 2633 if (ec->rx_coalesce_usecs != cur_rx_itr && 2634 ec->use_adaptive_rx_coalesce) { 2635 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2636 return -EINVAL; 2637 } 2638 2639 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2640 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2641 return -EINVAL; 2642 } 2643 2644 if (ec->tx_coalesce_usecs != cur_tx_itr && 2645 ec->use_adaptive_tx_coalesce) { 2646 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2647 return -EINVAL; 2648 } 2649 2650 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2651 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2652 return -EINVAL; 2653 } 2654 2655 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2656 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2657 2658 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2659 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2660 2661 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2662 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2663 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2664 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2665 vsi->int_rate_limit); 2666 } 2667 2668 /* rx and tx usecs has per queue value. If user doesn't specify the 2669 * queue, apply to all queues. 2670 */ 2671 if (queue < 0) { 2672 for (i = 0; i < vsi->num_queue_pairs; i++) 2673 i40e_set_itr_per_queue(vsi, ec, i); 2674 } else { 2675 i40e_set_itr_per_queue(vsi, ec, queue); 2676 } 2677 2678 return 0; 2679 } 2680 2681 /** 2682 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2683 * @netdev: the netdev to change 2684 * @ec: ethtool coalesce settings 2685 * 2686 * This will set each queue to the same coalesce settings. 2687 **/ 2688 static int i40e_set_coalesce(struct net_device *netdev, 2689 struct ethtool_coalesce *ec) 2690 { 2691 return __i40e_set_coalesce(netdev, ec, -1); 2692 } 2693 2694 /** 2695 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2696 * @netdev: the netdev to change 2697 * @ec: ethtool's coalesce settings 2698 * @queue: the queue to change 2699 * 2700 * Sets the specified queue's coalesce settings. 2701 **/ 2702 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2703 struct ethtool_coalesce *ec) 2704 { 2705 return __i40e_set_coalesce(netdev, ec, queue); 2706 } 2707 2708 /** 2709 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2710 * @pf: pointer to the physical function struct 2711 * @cmd: ethtool rxnfc command 2712 * 2713 * Returns Success if the flow is supported, else Invalid Input. 2714 **/ 2715 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2716 { 2717 struct i40e_hw *hw = &pf->hw; 2718 u8 flow_pctype = 0; 2719 u64 i_set = 0; 2720 2721 cmd->data = 0; 2722 2723 switch (cmd->flow_type) { 2724 case TCP_V4_FLOW: 2725 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2726 break; 2727 case UDP_V4_FLOW: 2728 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2729 break; 2730 case TCP_V6_FLOW: 2731 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2732 break; 2733 case UDP_V6_FLOW: 2734 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2735 break; 2736 case SCTP_V4_FLOW: 2737 case AH_ESP_V4_FLOW: 2738 case AH_V4_FLOW: 2739 case ESP_V4_FLOW: 2740 case IPV4_FLOW: 2741 case SCTP_V6_FLOW: 2742 case AH_ESP_V6_FLOW: 2743 case AH_V6_FLOW: 2744 case ESP_V6_FLOW: 2745 case IPV6_FLOW: 2746 /* Default is src/dest for IP, no matter the L4 hashing */ 2747 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2748 break; 2749 default: 2750 return -EINVAL; 2751 } 2752 2753 /* Read flow based hash input set register */ 2754 if (flow_pctype) { 2755 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2756 flow_pctype)) | 2757 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2758 flow_pctype)) << 32); 2759 } 2760 2761 /* Process bits of hash input set */ 2762 if (i_set) { 2763 if (i_set & I40E_L4_SRC_MASK) 2764 cmd->data |= RXH_L4_B_0_1; 2765 if (i_set & I40E_L4_DST_MASK) 2766 cmd->data |= RXH_L4_B_2_3; 2767 2768 if (cmd->flow_type == TCP_V4_FLOW || 2769 cmd->flow_type == UDP_V4_FLOW) { 2770 if (i_set & I40E_L3_SRC_MASK) 2771 cmd->data |= RXH_IP_SRC; 2772 if (i_set & I40E_L3_DST_MASK) 2773 cmd->data |= RXH_IP_DST; 2774 } else if (cmd->flow_type == TCP_V6_FLOW || 2775 cmd->flow_type == UDP_V6_FLOW) { 2776 if (i_set & I40E_L3_V6_SRC_MASK) 2777 cmd->data |= RXH_IP_SRC; 2778 if (i_set & I40E_L3_V6_DST_MASK) 2779 cmd->data |= RXH_IP_DST; 2780 } 2781 } 2782 2783 return 0; 2784 } 2785 2786 /** 2787 * i40e_check_mask - Check whether a mask field is set 2788 * @mask: the full mask value 2789 * @field: mask of the field to check 2790 * 2791 * If the given mask is fully set, return positive value. If the mask for the 2792 * field is fully unset, return zero. Otherwise return a negative error code. 2793 **/ 2794 static int i40e_check_mask(u64 mask, u64 field) 2795 { 2796 u64 value = mask & field; 2797 2798 if (value == field) 2799 return 1; 2800 else if (!value) 2801 return 0; 2802 else 2803 return -1; 2804 } 2805 2806 /** 2807 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2808 * @fsp: pointer to rx flow specification 2809 * @data: pointer to userdef data structure for storage 2810 * 2811 * Read the user-defined data and deconstruct the value into a structure. No 2812 * other code should read the user-defined data, so as to ensure that every 2813 * place consistently reads the value correctly. 2814 * 2815 * The user-defined field is a 64bit Big Endian format value, which we 2816 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2817 * be defined starting from the highest bits, while small bit field values 2818 * shall be defined starting from the lowest bits. 2819 * 2820 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2821 * and the filter should be rejected. The data structure will always be 2822 * modified even if FLOW_EXT is not set. 2823 * 2824 **/ 2825 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2826 struct i40e_rx_flow_userdef *data) 2827 { 2828 u64 value, mask; 2829 int valid; 2830 2831 /* Zero memory first so it's always consistent. */ 2832 memset(data, 0, sizeof(*data)); 2833 2834 if (!(fsp->flow_type & FLOW_EXT)) 2835 return 0; 2836 2837 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2838 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2839 2840 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2841 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2842 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2843 2844 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2845 if (valid < 0) { 2846 return -EINVAL; 2847 } else if (valid) { 2848 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2849 data->flex_offset = 2850 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2851 data->flex_filter = true; 2852 } 2853 2854 return 0; 2855 } 2856 2857 /** 2858 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2859 * @fsp: pointer to rx_flow specification 2860 * @data: pointer to return userdef data 2861 * 2862 * Reads the userdef data structure and properly fills in the user defined 2863 * fields of the rx_flow_spec. 2864 **/ 2865 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2866 struct i40e_rx_flow_userdef *data) 2867 { 2868 u64 value = 0, mask = 0; 2869 2870 if (data->flex_filter) { 2871 value |= data->flex_word; 2872 value |= (u64)data->flex_offset << 16; 2873 mask |= I40E_USERDEF_FLEX_FILTER; 2874 } 2875 2876 if (value || mask) 2877 fsp->flow_type |= FLOW_EXT; 2878 2879 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2880 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2881 } 2882 2883 /** 2884 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2885 * @pf: Pointer to the physical function struct 2886 * @cmd: The command to get or set Rx flow classification rules 2887 * @rule_locs: Array of used rule locations 2888 * 2889 * This function populates both the total and actual rule count of 2890 * the ethtool flow classification command 2891 * 2892 * Returns 0 on success or -EMSGSIZE if entry not found 2893 **/ 2894 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2895 struct ethtool_rxnfc *cmd, 2896 u32 *rule_locs) 2897 { 2898 struct i40e_fdir_filter *rule; 2899 struct hlist_node *node2; 2900 int cnt = 0; 2901 2902 /* report total rule count */ 2903 cmd->data = i40e_get_fd_cnt_all(pf); 2904 2905 hlist_for_each_entry_safe(rule, node2, 2906 &pf->fdir_filter_list, fdir_node) { 2907 if (cnt == cmd->rule_cnt) 2908 return -EMSGSIZE; 2909 2910 rule_locs[cnt] = rule->fd_id; 2911 cnt++; 2912 } 2913 2914 cmd->rule_cnt = cnt; 2915 2916 return 0; 2917 } 2918 2919 /** 2920 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2921 * @pf: Pointer to the physical function struct 2922 * @cmd: The command to get or set Rx flow classification rules 2923 * 2924 * This function looks up a filter based on the Rx flow classification 2925 * command and fills the flow spec info for it if found 2926 * 2927 * Returns 0 on success or -EINVAL if filter not found 2928 **/ 2929 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2930 struct ethtool_rxnfc *cmd) 2931 { 2932 struct ethtool_rx_flow_spec *fsp = 2933 (struct ethtool_rx_flow_spec *)&cmd->fs; 2934 struct i40e_rx_flow_userdef userdef = {0}; 2935 struct i40e_fdir_filter *rule = NULL; 2936 struct hlist_node *node2; 2937 u64 input_set; 2938 u16 index; 2939 2940 hlist_for_each_entry_safe(rule, node2, 2941 &pf->fdir_filter_list, fdir_node) { 2942 if (fsp->location <= rule->fd_id) 2943 break; 2944 } 2945 2946 if (!rule || fsp->location != rule->fd_id) 2947 return -EINVAL; 2948 2949 fsp->flow_type = rule->flow_type; 2950 if (fsp->flow_type == IP_USER_FLOW) { 2951 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2952 fsp->h_u.usr_ip4_spec.proto = 0; 2953 fsp->m_u.usr_ip4_spec.proto = 0; 2954 } 2955 2956 /* Reverse the src and dest notion, since the HW views them from 2957 * Tx perspective where as the user expects it from Rx filter view. 2958 */ 2959 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2960 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2961 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2962 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2963 2964 switch (rule->flow_type) { 2965 case SCTP_V4_FLOW: 2966 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2967 break; 2968 case TCP_V4_FLOW: 2969 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2970 break; 2971 case UDP_V4_FLOW: 2972 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2973 break; 2974 case IP_USER_FLOW: 2975 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2976 break; 2977 default: 2978 /* If we have stored a filter with a flow type not listed here 2979 * it is almost certainly a driver bug. WARN(), and then 2980 * assign the input_set as if all fields are enabled to avoid 2981 * reading unassigned memory. 2982 */ 2983 WARN(1, "Missing input set index for flow_type %d\n", 2984 rule->flow_type); 2985 input_set = 0xFFFFFFFFFFFFFFFFULL; 2986 goto no_input_set; 2987 } 2988 2989 input_set = i40e_read_fd_input_set(pf, index); 2990 2991 no_input_set: 2992 if (input_set & I40E_L3_SRC_MASK) 2993 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 2994 2995 if (input_set & I40E_L3_DST_MASK) 2996 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 2997 2998 if (input_set & I40E_L4_SRC_MASK) 2999 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 3000 3001 if (input_set & I40E_L4_DST_MASK) 3002 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3003 3004 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3005 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3006 else 3007 fsp->ring_cookie = rule->q_index; 3008 3009 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 3010 struct i40e_vsi *vsi; 3011 3012 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3013 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3014 /* VFs are zero-indexed by the driver, but ethtool 3015 * expects them to be one-indexed, so add one here 3016 */ 3017 u64 ring_vf = vsi->vf_id + 1; 3018 3019 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3020 fsp->ring_cookie |= ring_vf; 3021 } 3022 } 3023 3024 if (rule->flex_filter) { 3025 userdef.flex_filter = true; 3026 userdef.flex_word = be16_to_cpu(rule->flex_word); 3027 userdef.flex_offset = rule->flex_offset; 3028 } 3029 3030 i40e_fill_rx_flow_user_data(fsp, &userdef); 3031 3032 return 0; 3033 } 3034 3035 /** 3036 * i40e_get_rxnfc - command to get RX flow classification rules 3037 * @netdev: network interface device structure 3038 * @cmd: ethtool rxnfc command 3039 * @rule_locs: pointer to store rule data 3040 * 3041 * Returns Success if the command is supported. 3042 **/ 3043 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3044 u32 *rule_locs) 3045 { 3046 struct i40e_netdev_priv *np = netdev_priv(netdev); 3047 struct i40e_vsi *vsi = np->vsi; 3048 struct i40e_pf *pf = vsi->back; 3049 int ret = -EOPNOTSUPP; 3050 3051 switch (cmd->cmd) { 3052 case ETHTOOL_GRXRINGS: 3053 cmd->data = vsi->rss_size; 3054 ret = 0; 3055 break; 3056 case ETHTOOL_GRXFH: 3057 ret = i40e_get_rss_hash_opts(pf, cmd); 3058 break; 3059 case ETHTOOL_GRXCLSRLCNT: 3060 cmd->rule_cnt = pf->fdir_pf_active_filters; 3061 /* report total rule count */ 3062 cmd->data = i40e_get_fd_cnt_all(pf); 3063 ret = 0; 3064 break; 3065 case ETHTOOL_GRXCLSRULE: 3066 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3067 break; 3068 case ETHTOOL_GRXCLSRLALL: 3069 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3070 break; 3071 default: 3072 break; 3073 } 3074 3075 return ret; 3076 } 3077 3078 /** 3079 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3080 * @nfc: pointer to user request 3081 * @i_setc: bits currently set 3082 * 3083 * Returns value of bits to be set per user request 3084 **/ 3085 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 3086 { 3087 u64 i_set = i_setc; 3088 u64 src_l3 = 0, dst_l3 = 0; 3089 3090 if (nfc->data & RXH_L4_B_0_1) 3091 i_set |= I40E_L4_SRC_MASK; 3092 else 3093 i_set &= ~I40E_L4_SRC_MASK; 3094 if (nfc->data & RXH_L4_B_2_3) 3095 i_set |= I40E_L4_DST_MASK; 3096 else 3097 i_set &= ~I40E_L4_DST_MASK; 3098 3099 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3100 src_l3 = I40E_L3_V6_SRC_MASK; 3101 dst_l3 = I40E_L3_V6_DST_MASK; 3102 } else if (nfc->flow_type == TCP_V4_FLOW || 3103 nfc->flow_type == UDP_V4_FLOW) { 3104 src_l3 = I40E_L3_SRC_MASK; 3105 dst_l3 = I40E_L3_DST_MASK; 3106 } else { 3107 /* Any other flow type are not supported here */ 3108 return i_set; 3109 } 3110 3111 if (nfc->data & RXH_IP_SRC) 3112 i_set |= src_l3; 3113 else 3114 i_set &= ~src_l3; 3115 if (nfc->data & RXH_IP_DST) 3116 i_set |= dst_l3; 3117 else 3118 i_set &= ~dst_l3; 3119 3120 return i_set; 3121 } 3122 3123 /** 3124 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3125 * @pf: pointer to the physical function struct 3126 * @nfc: ethtool rxnfc command 3127 * 3128 * Returns Success if the flow input set is supported. 3129 **/ 3130 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3131 { 3132 struct i40e_hw *hw = &pf->hw; 3133 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3134 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3135 u8 flow_pctype = 0; 3136 u64 i_set, i_setc; 3137 3138 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3139 dev_err(&pf->pdev->dev, 3140 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3141 return -EOPNOTSUPP; 3142 } 3143 3144 /* RSS does not support anything other than hashing 3145 * to queues on src and dst IPs and ports 3146 */ 3147 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3148 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3149 return -EINVAL; 3150 3151 switch (nfc->flow_type) { 3152 case TCP_V4_FLOW: 3153 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3154 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3155 hena |= 3156 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3157 break; 3158 case TCP_V6_FLOW: 3159 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3160 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3161 hena |= 3162 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3163 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3164 hena |= 3165 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 3166 break; 3167 case UDP_V4_FLOW: 3168 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3169 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3170 hena |= 3171 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 3172 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 3173 3174 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3175 break; 3176 case UDP_V6_FLOW: 3177 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3178 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3179 hena |= 3180 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 3181 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 3182 3183 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3184 break; 3185 case AH_ESP_V4_FLOW: 3186 case AH_V4_FLOW: 3187 case ESP_V4_FLOW: 3188 case SCTP_V4_FLOW: 3189 if ((nfc->data & RXH_L4_B_0_1) || 3190 (nfc->data & RXH_L4_B_2_3)) 3191 return -EINVAL; 3192 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3193 break; 3194 case AH_ESP_V6_FLOW: 3195 case AH_V6_FLOW: 3196 case ESP_V6_FLOW: 3197 case SCTP_V6_FLOW: 3198 if ((nfc->data & RXH_L4_B_0_1) || 3199 (nfc->data & RXH_L4_B_2_3)) 3200 return -EINVAL; 3201 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3202 break; 3203 case IPV4_FLOW: 3204 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3205 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3206 break; 3207 case IPV6_FLOW: 3208 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3209 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3210 break; 3211 default: 3212 return -EINVAL; 3213 } 3214 3215 if (flow_pctype) { 3216 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3217 flow_pctype)) | 3218 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3219 flow_pctype)) << 32); 3220 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3221 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3222 (u32)i_set); 3223 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3224 (u32)(i_set >> 32)); 3225 hena |= BIT_ULL(flow_pctype); 3226 } 3227 3228 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3229 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3230 i40e_flush(hw); 3231 3232 return 0; 3233 } 3234 3235 /** 3236 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3237 * @vsi: Pointer to the targeted VSI 3238 * @input: The filter to update or NULL to indicate deletion 3239 * @sw_idx: Software index to the filter 3240 * @cmd: The command to get or set Rx flow classification rules 3241 * 3242 * This function updates (or deletes) a Flow Director entry from 3243 * the hlist of the corresponding PF 3244 * 3245 * Returns 0 on success 3246 **/ 3247 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3248 struct i40e_fdir_filter *input, 3249 u16 sw_idx, 3250 struct ethtool_rxnfc *cmd) 3251 { 3252 struct i40e_fdir_filter *rule, *parent; 3253 struct i40e_pf *pf = vsi->back; 3254 struct hlist_node *node2; 3255 int err = -EINVAL; 3256 3257 parent = NULL; 3258 rule = NULL; 3259 3260 hlist_for_each_entry_safe(rule, node2, 3261 &pf->fdir_filter_list, fdir_node) { 3262 /* hash found, or no matching entry */ 3263 if (rule->fd_id >= sw_idx) 3264 break; 3265 parent = rule; 3266 } 3267 3268 /* if there is an old rule occupying our place remove it */ 3269 if (rule && (rule->fd_id == sw_idx)) { 3270 /* Remove this rule, since we're either deleting it, or 3271 * replacing it. 3272 */ 3273 err = i40e_add_del_fdir(vsi, rule, false); 3274 hlist_del(&rule->fdir_node); 3275 kfree(rule); 3276 pf->fdir_pf_active_filters--; 3277 } 3278 3279 /* If we weren't given an input, this is a delete, so just return the 3280 * error code indicating if there was an entry at the requested slot 3281 */ 3282 if (!input) 3283 return err; 3284 3285 /* Otherwise, install the new rule as requested */ 3286 INIT_HLIST_NODE(&input->fdir_node); 3287 3288 /* add filter to the list */ 3289 if (parent) 3290 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3291 else 3292 hlist_add_head(&input->fdir_node, 3293 &pf->fdir_filter_list); 3294 3295 /* update counts */ 3296 pf->fdir_pf_active_filters++; 3297 3298 return 0; 3299 } 3300 3301 /** 3302 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3303 * @pf: pointer to PF structure 3304 * 3305 * This function searches the list of filters and determines which FLX_PIT 3306 * entries are still required. It will prune any entries which are no longer 3307 * in use after the deletion. 3308 **/ 3309 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3310 { 3311 struct i40e_flex_pit *entry, *tmp; 3312 struct i40e_fdir_filter *rule; 3313 3314 /* First, we'll check the l3 table */ 3315 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3316 bool found = false; 3317 3318 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3319 if (rule->flow_type != IP_USER_FLOW) 3320 continue; 3321 if (rule->flex_filter && 3322 rule->flex_offset == entry->src_offset) { 3323 found = true; 3324 break; 3325 } 3326 } 3327 3328 /* If we didn't find the filter, then we can prune this entry 3329 * from the list. 3330 */ 3331 if (!found) { 3332 list_del(&entry->list); 3333 kfree(entry); 3334 } 3335 } 3336 3337 /* Followed by the L4 table */ 3338 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3339 bool found = false; 3340 3341 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3342 /* Skip this filter if it's L3, since we already 3343 * checked those in the above loop 3344 */ 3345 if (rule->flow_type == IP_USER_FLOW) 3346 continue; 3347 if (rule->flex_filter && 3348 rule->flex_offset == entry->src_offset) { 3349 found = true; 3350 break; 3351 } 3352 } 3353 3354 /* If we didn't find the filter, then we can prune this entry 3355 * from the list. 3356 */ 3357 if (!found) { 3358 list_del(&entry->list); 3359 kfree(entry); 3360 } 3361 } 3362 } 3363 3364 /** 3365 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3366 * @vsi: Pointer to the targeted VSI 3367 * @cmd: The command to get or set Rx flow classification rules 3368 * 3369 * The function removes a Flow Director filter entry from the 3370 * hlist of the corresponding PF 3371 * 3372 * Returns 0 on success 3373 */ 3374 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3375 struct ethtool_rxnfc *cmd) 3376 { 3377 struct ethtool_rx_flow_spec *fsp = 3378 (struct ethtool_rx_flow_spec *)&cmd->fs; 3379 struct i40e_pf *pf = vsi->back; 3380 int ret = 0; 3381 3382 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3383 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3384 return -EBUSY; 3385 3386 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3387 return -EBUSY; 3388 3389 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3390 3391 i40e_prune_flex_pit_list(pf); 3392 3393 i40e_fdir_check_and_reenable(pf); 3394 return ret; 3395 } 3396 3397 /** 3398 * i40e_unused_pit_index - Find an unused PIT index for given list 3399 * @pf: the PF data structure 3400 * 3401 * Find the first unused flexible PIT index entry. We search both the L3 and 3402 * L4 flexible PIT lists so that the returned index is unique and unused by 3403 * either currently programmed L3 or L4 filters. We use a bit field as storage 3404 * to track which indexes are already used. 3405 **/ 3406 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3407 { 3408 unsigned long available_index = 0xFF; 3409 struct i40e_flex_pit *entry; 3410 3411 /* We need to make sure that the new index isn't in use by either L3 3412 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3413 * L4 to use the same index. 3414 */ 3415 3416 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3417 clear_bit(entry->pit_index, &available_index); 3418 3419 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3420 clear_bit(entry->pit_index, &available_index); 3421 3422 return find_first_bit(&available_index, 8); 3423 } 3424 3425 /** 3426 * i40e_find_flex_offset - Find an existing flex src_offset 3427 * @flex_pit_list: L3 or L4 flex PIT list 3428 * @src_offset: new src_offset to find 3429 * 3430 * Searches the flex_pit_list for an existing offset. If no offset is 3431 * currently programmed, then this will return an ERR_PTR if there is no space 3432 * to add a new offset, otherwise it returns NULL. 3433 **/ 3434 static 3435 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3436 u16 src_offset) 3437 { 3438 struct i40e_flex_pit *entry; 3439 int size = 0; 3440 3441 /* Search for the src_offset first. If we find a matching entry 3442 * already programmed, we can simply re-use it. 3443 */ 3444 list_for_each_entry(entry, flex_pit_list, list) { 3445 size++; 3446 if (entry->src_offset == src_offset) 3447 return entry; 3448 } 3449 3450 /* If we haven't found an entry yet, then the provided src offset has 3451 * not yet been programmed. We will program the src offset later on, 3452 * but we need to indicate whether there is enough space to do so 3453 * here. We'll make use of ERR_PTR for this purpose. 3454 */ 3455 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3456 return ERR_PTR(-ENOSPC); 3457 3458 return NULL; 3459 } 3460 3461 /** 3462 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3463 * @flex_pit_list: L3 or L4 flex PIT list 3464 * @src_offset: new src_offset to add 3465 * @pit_index: the PIT index to program 3466 * 3467 * This function programs the new src_offset to the list. It is expected that 3468 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3469 * that this offset is not programmed, and that the list has enough space to 3470 * store another offset. 3471 * 3472 * Returns 0 on success, and negative value on error. 3473 **/ 3474 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3475 u16 src_offset, 3476 u8 pit_index) 3477 { 3478 struct i40e_flex_pit *new_pit, *entry; 3479 3480 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3481 if (!new_pit) 3482 return -ENOMEM; 3483 3484 new_pit->src_offset = src_offset; 3485 new_pit->pit_index = pit_index; 3486 3487 /* We need to insert this item such that the list is sorted by 3488 * src_offset in ascending order. 3489 */ 3490 list_for_each_entry(entry, flex_pit_list, list) { 3491 if (new_pit->src_offset < entry->src_offset) { 3492 list_add_tail(&new_pit->list, &entry->list); 3493 return 0; 3494 } 3495 3496 /* If we found an entry with our offset already programmed we 3497 * can simply return here, after freeing the memory. However, 3498 * if the pit_index does not match we need to report an error. 3499 */ 3500 if (new_pit->src_offset == entry->src_offset) { 3501 int err = 0; 3502 3503 /* If the PIT index is not the same we can't re-use 3504 * the entry, so we must report an error. 3505 */ 3506 if (new_pit->pit_index != entry->pit_index) 3507 err = -EINVAL; 3508 3509 kfree(new_pit); 3510 return err; 3511 } 3512 } 3513 3514 /* If we reached here, then we haven't yet added the item. This means 3515 * that we should add the item at the end of the list. 3516 */ 3517 list_add_tail(&new_pit->list, flex_pit_list); 3518 return 0; 3519 } 3520 3521 /** 3522 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3523 * @pf: Pointer to the PF structure 3524 * @flex_pit_list: list of flexible src offsets in use 3525 * @flex_pit_start: index to first entry for this section of the table 3526 * 3527 * In order to handle flexible data, the hardware uses a table of values 3528 * called the FLX_PIT table. This table is used to indicate which sections of 3529 * the input correspond to what PIT index values. Unfortunately, hardware is 3530 * very restrictive about programming this table. Entries must be ordered by 3531 * src_offset in ascending order, without duplicates. Additionally, unused 3532 * entries must be set to the unused index value, and must have valid size and 3533 * length according to the src_offset ordering. 3534 * 3535 * This function will reprogram the FLX_PIT register from a book-keeping 3536 * structure that we guarantee is already ordered correctly, and has no more 3537 * than 3 entries. 3538 * 3539 * To make things easier, we only support flexible values of one word length, 3540 * rather than allowing variable length flexible values. 3541 **/ 3542 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3543 struct list_head *flex_pit_list, 3544 int flex_pit_start) 3545 { 3546 struct i40e_flex_pit *entry = NULL; 3547 u16 last_offset = 0; 3548 int i = 0, j = 0; 3549 3550 /* First, loop over the list of flex PIT entries, and reprogram the 3551 * registers. 3552 */ 3553 list_for_each_entry(entry, flex_pit_list, list) { 3554 /* We have to be careful when programming values for the 3555 * largest SRC_OFFSET value. It is possible that adding 3556 * additional empty values at the end would overflow the space 3557 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3558 * we check here and add the empty values prior to adding the 3559 * largest value. 3560 * 3561 * To determine this, we will use a loop from i+1 to 3, which 3562 * will determine whether the unused entries would have valid 3563 * SRC_OFFSET. Note that there cannot be extra entries past 3564 * this value, because the only valid values would have been 3565 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3566 * have been added to the list in the first place. 3567 */ 3568 for (j = i + 1; j < 3; j++) { 3569 u16 offset = entry->src_offset + j; 3570 int index = flex_pit_start + i; 3571 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3572 1, 3573 offset - 3); 3574 3575 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3576 i40e_write_rx_ctl(&pf->hw, 3577 I40E_PRTQF_FLX_PIT(index), 3578 value); 3579 i++; 3580 } 3581 } 3582 3583 /* Now, we can program the actual value into the table */ 3584 i40e_write_rx_ctl(&pf->hw, 3585 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3586 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3587 1, 3588 entry->src_offset)); 3589 i++; 3590 } 3591 3592 /* In order to program the last entries in the table, we need to 3593 * determine the valid offset. If the list is empty, we'll just start 3594 * with 0. Otherwise, we'll start with the last item offset and add 1. 3595 * This ensures that all entries have valid sizes. If we don't do this 3596 * correctly, the hardware will disable flexible field parsing. 3597 */ 3598 if (!list_empty(flex_pit_list)) 3599 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3600 3601 for (; i < 3; i++, last_offset++) { 3602 i40e_write_rx_ctl(&pf->hw, 3603 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3604 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3605 1, 3606 last_offset)); 3607 } 3608 } 3609 3610 /** 3611 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3612 * @pf: pointer to the PF structure 3613 * 3614 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3615 * internal helper function for implementation details. 3616 **/ 3617 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3618 { 3619 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3620 I40E_FLEX_PIT_IDX_START_L3); 3621 3622 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3623 I40E_FLEX_PIT_IDX_START_L4); 3624 3625 /* We also need to program the L3 and L4 GLQF ORT register */ 3626 i40e_write_rx_ctl(&pf->hw, 3627 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3628 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3629 3, 1)); 3630 3631 i40e_write_rx_ctl(&pf->hw, 3632 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3633 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3634 3, 1)); 3635 } 3636 3637 /** 3638 * i40e_flow_str - Converts a flow_type into a human readable string 3639 * @fsp: the flow specification 3640 * 3641 * Currently only flow types we support are included here, and the string 3642 * value attempts to match what ethtool would use to configure this flow type. 3643 **/ 3644 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3645 { 3646 switch (fsp->flow_type & ~FLOW_EXT) { 3647 case TCP_V4_FLOW: 3648 return "tcp4"; 3649 case UDP_V4_FLOW: 3650 return "udp4"; 3651 case SCTP_V4_FLOW: 3652 return "sctp4"; 3653 case IP_USER_FLOW: 3654 return "ip4"; 3655 default: 3656 return "unknown"; 3657 } 3658 } 3659 3660 /** 3661 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3662 * @pit_index: PIT index to convert 3663 * 3664 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3665 * of range. 3666 **/ 3667 static u64 i40e_pit_index_to_mask(int pit_index) 3668 { 3669 switch (pit_index) { 3670 case 0: 3671 return I40E_FLEX_50_MASK; 3672 case 1: 3673 return I40E_FLEX_51_MASK; 3674 case 2: 3675 return I40E_FLEX_52_MASK; 3676 case 3: 3677 return I40E_FLEX_53_MASK; 3678 case 4: 3679 return I40E_FLEX_54_MASK; 3680 case 5: 3681 return I40E_FLEX_55_MASK; 3682 case 6: 3683 return I40E_FLEX_56_MASK; 3684 case 7: 3685 return I40E_FLEX_57_MASK; 3686 default: 3687 return 0; 3688 } 3689 } 3690 3691 /** 3692 * i40e_print_input_set - Show changes between two input sets 3693 * @vsi: the vsi being configured 3694 * @old: the old input set 3695 * @new: the new input set 3696 * 3697 * Print the difference between old and new input sets by showing which series 3698 * of words are toggled on or off. Only displays the bits we actually support 3699 * changing. 3700 **/ 3701 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3702 { 3703 struct i40e_pf *pf = vsi->back; 3704 bool old_value, new_value; 3705 int i; 3706 3707 old_value = !!(old & I40E_L3_SRC_MASK); 3708 new_value = !!(new & I40E_L3_SRC_MASK); 3709 if (old_value != new_value) 3710 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3711 old_value ? "ON" : "OFF", 3712 new_value ? "ON" : "OFF"); 3713 3714 old_value = !!(old & I40E_L3_DST_MASK); 3715 new_value = !!(new & I40E_L3_DST_MASK); 3716 if (old_value != new_value) 3717 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3718 old_value ? "ON" : "OFF", 3719 new_value ? "ON" : "OFF"); 3720 3721 old_value = !!(old & I40E_L4_SRC_MASK); 3722 new_value = !!(new & I40E_L4_SRC_MASK); 3723 if (old_value != new_value) 3724 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3725 old_value ? "ON" : "OFF", 3726 new_value ? "ON" : "OFF"); 3727 3728 old_value = !!(old & I40E_L4_DST_MASK); 3729 new_value = !!(new & I40E_L4_DST_MASK); 3730 if (old_value != new_value) 3731 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3732 old_value ? "ON" : "OFF", 3733 new_value ? "ON" : "OFF"); 3734 3735 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3736 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3737 if (old_value != new_value) 3738 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3739 old_value ? "ON" : "OFF", 3740 new_value ? "ON" : "OFF"); 3741 3742 /* Show change of flexible filter entries */ 3743 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3744 u64 flex_mask = i40e_pit_index_to_mask(i); 3745 3746 old_value = !!(old & flex_mask); 3747 new_value = !!(new & flex_mask); 3748 if (old_value != new_value) 3749 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3750 i, 3751 old_value ? "ON" : "OFF", 3752 new_value ? "ON" : "OFF"); 3753 } 3754 3755 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3756 old); 3757 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3758 new); 3759 } 3760 3761 /** 3762 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3763 * @vsi: pointer to the targeted VSI 3764 * @fsp: pointer to Rx flow specification 3765 * @userdef: userdefined data from flow specification 3766 * 3767 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3768 * for partial matches exists with a few limitations. First, hardware only 3769 * supports masking by word boundary (2 bytes) and not per individual bit. 3770 * Second, hardware is limited to using one mask for a flow type and cannot 3771 * use a separate mask for each filter. 3772 * 3773 * To support these limitations, if we already have a configured filter for 3774 * the specified type, this function enforces that new filters of the type 3775 * match the configured input set. Otherwise, if we do not have a filter of 3776 * the specified type, we allow the input set to be updated to match the 3777 * desired filter. 3778 * 3779 * To help ensure that administrators understand why filters weren't displayed 3780 * as supported, we print a diagnostic message displaying how the input set 3781 * would change and warning to delete the preexisting filters if required. 3782 * 3783 * Returns 0 on successful input set match, and a negative return code on 3784 * failure. 3785 **/ 3786 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3787 struct ethtool_rx_flow_spec *fsp, 3788 struct i40e_rx_flow_userdef *userdef) 3789 { 3790 struct i40e_pf *pf = vsi->back; 3791 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3792 struct ethtool_usrip4_spec *usr_ip4_spec; 3793 u64 current_mask, new_mask; 3794 bool new_flex_offset = false; 3795 bool flex_l3 = false; 3796 u16 *fdir_filter_count; 3797 u16 index, src_offset = 0; 3798 u8 pit_index = 0; 3799 int err; 3800 3801 switch (fsp->flow_type & ~FLOW_EXT) { 3802 case SCTP_V4_FLOW: 3803 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3804 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3805 break; 3806 case TCP_V4_FLOW: 3807 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3808 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3809 break; 3810 case UDP_V4_FLOW: 3811 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3812 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3813 break; 3814 case IP_USER_FLOW: 3815 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3816 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3817 flex_l3 = true; 3818 break; 3819 default: 3820 return -EOPNOTSUPP; 3821 } 3822 3823 /* Read the current input set from register memory. */ 3824 current_mask = i40e_read_fd_input_set(pf, index); 3825 new_mask = current_mask; 3826 3827 /* Determine, if any, the required changes to the input set in order 3828 * to support the provided mask. 3829 * 3830 * Hardware only supports masking at word (2 byte) granularity and does 3831 * not support full bitwise masking. This implementation simplifies 3832 * even further and only supports fully enabled or fully disabled 3833 * masks for each field, even though we could split the ip4src and 3834 * ip4dst fields. 3835 */ 3836 switch (fsp->flow_type & ~FLOW_EXT) { 3837 case SCTP_V4_FLOW: 3838 new_mask &= ~I40E_VERIFY_TAG_MASK; 3839 /* Fall through */ 3840 case TCP_V4_FLOW: 3841 case UDP_V4_FLOW: 3842 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3843 3844 /* IPv4 source address */ 3845 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3846 new_mask |= I40E_L3_SRC_MASK; 3847 else if (!tcp_ip4_spec->ip4src) 3848 new_mask &= ~I40E_L3_SRC_MASK; 3849 else 3850 return -EOPNOTSUPP; 3851 3852 /* IPv4 destination address */ 3853 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3854 new_mask |= I40E_L3_DST_MASK; 3855 else if (!tcp_ip4_spec->ip4dst) 3856 new_mask &= ~I40E_L3_DST_MASK; 3857 else 3858 return -EOPNOTSUPP; 3859 3860 /* L4 source port */ 3861 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3862 new_mask |= I40E_L4_SRC_MASK; 3863 else if (!tcp_ip4_spec->psrc) 3864 new_mask &= ~I40E_L4_SRC_MASK; 3865 else 3866 return -EOPNOTSUPP; 3867 3868 /* L4 destination port */ 3869 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3870 new_mask |= I40E_L4_DST_MASK; 3871 else if (!tcp_ip4_spec->pdst) 3872 new_mask &= ~I40E_L4_DST_MASK; 3873 else 3874 return -EOPNOTSUPP; 3875 3876 /* Filtering on Type of Service is not supported. */ 3877 if (tcp_ip4_spec->tos) 3878 return -EOPNOTSUPP; 3879 3880 break; 3881 case IP_USER_FLOW: 3882 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3883 3884 /* IPv4 source address */ 3885 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3886 new_mask |= I40E_L3_SRC_MASK; 3887 else if (!usr_ip4_spec->ip4src) 3888 new_mask &= ~I40E_L3_SRC_MASK; 3889 else 3890 return -EOPNOTSUPP; 3891 3892 /* IPv4 destination address */ 3893 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3894 new_mask |= I40E_L3_DST_MASK; 3895 else if (!usr_ip4_spec->ip4dst) 3896 new_mask &= ~I40E_L3_DST_MASK; 3897 else 3898 return -EOPNOTSUPP; 3899 3900 /* First 4 bytes of L4 header */ 3901 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3902 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3903 else if (!usr_ip4_spec->l4_4_bytes) 3904 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3905 else 3906 return -EOPNOTSUPP; 3907 3908 /* Filtering on Type of Service is not supported. */ 3909 if (usr_ip4_spec->tos) 3910 return -EOPNOTSUPP; 3911 3912 /* Filtering on IP version is not supported */ 3913 if (usr_ip4_spec->ip_ver) 3914 return -EINVAL; 3915 3916 /* Filtering on L4 protocol is not supported */ 3917 if (usr_ip4_spec->proto) 3918 return -EINVAL; 3919 3920 break; 3921 default: 3922 return -EOPNOTSUPP; 3923 } 3924 3925 /* First, clear all flexible filter entries */ 3926 new_mask &= ~I40E_FLEX_INPUT_MASK; 3927 3928 /* If we have a flexible filter, try to add this offset to the correct 3929 * flexible filter PIT list. Once finished, we can update the mask. 3930 * If the src_offset changed, we will get a new mask value which will 3931 * trigger an input set change. 3932 */ 3933 if (userdef->flex_filter) { 3934 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3935 3936 /* Flexible offset must be even, since the flexible payload 3937 * must be aligned on 2-byte boundary. 3938 */ 3939 if (userdef->flex_offset & 0x1) { 3940 dev_warn(&pf->pdev->dev, 3941 "Flexible data offset must be 2-byte aligned\n"); 3942 return -EINVAL; 3943 } 3944 3945 src_offset = userdef->flex_offset >> 1; 3946 3947 /* FLX_PIT source offset value is only so large */ 3948 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3949 dev_warn(&pf->pdev->dev, 3950 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3951 return -EINVAL; 3952 } 3953 3954 /* See if this offset has already been programmed. If we get 3955 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3956 * if we get a NULL pointer, this means we will need to add 3957 * the offset. 3958 */ 3959 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3960 src_offset); 3961 if (IS_ERR(flex_pit)) 3962 return PTR_ERR(flex_pit); 3963 3964 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3965 * packet types, and thus we need to program both L3 and L4 3966 * flexible values. These must have identical flexible index, 3967 * as otherwise we can't correctly program the input set. So 3968 * we'll find both an L3 and L4 index and make sure they are 3969 * the same. 3970 */ 3971 if (flex_l3) { 3972 l3_flex_pit = 3973 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3974 src_offset); 3975 if (IS_ERR(l3_flex_pit)) 3976 return PTR_ERR(l3_flex_pit); 3977 3978 if (flex_pit) { 3979 /* If we already had a matching L4 entry, we 3980 * need to make sure that the L3 entry we 3981 * obtained uses the same index. 3982 */ 3983 if (l3_flex_pit) { 3984 if (l3_flex_pit->pit_index != 3985 flex_pit->pit_index) { 3986 return -EINVAL; 3987 } 3988 } else { 3989 new_flex_offset = true; 3990 } 3991 } else { 3992 flex_pit = l3_flex_pit; 3993 } 3994 } 3995 3996 /* If we didn't find an existing flex offset, we need to 3997 * program a new one. However, we don't immediately program it 3998 * here because we will wait to program until after we check 3999 * that it is safe to change the input set. 4000 */ 4001 if (!flex_pit) { 4002 new_flex_offset = true; 4003 pit_index = i40e_unused_pit_index(pf); 4004 } else { 4005 pit_index = flex_pit->pit_index; 4006 } 4007 4008 /* Update the mask with the new offset */ 4009 new_mask |= i40e_pit_index_to_mask(pit_index); 4010 } 4011 4012 /* If the mask and flexible filter offsets for this filter match the 4013 * currently programmed values we don't need any input set change, so 4014 * this filter is safe to install. 4015 */ 4016 if (new_mask == current_mask && !new_flex_offset) 4017 return 0; 4018 4019 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4020 i40e_flow_str(fsp)); 4021 i40e_print_input_set(vsi, current_mask, new_mask); 4022 if (new_flex_offset) { 4023 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4024 pit_index, src_offset); 4025 } 4026 4027 /* Hardware input sets are global across multiple ports, so even the 4028 * main port cannot change them when in MFP mode as this would impact 4029 * any filters on the other ports. 4030 */ 4031 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4032 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4033 return -EOPNOTSUPP; 4034 } 4035 4036 /* This filter requires us to update the input set. However, hardware 4037 * only supports one input set per flow type, and does not support 4038 * separate masks for each filter. This means that we can only support 4039 * a single mask for all filters of a specific type. 4040 * 4041 * If we have preexisting filters, they obviously depend on the 4042 * current programmed input set. Display a diagnostic message in this 4043 * case explaining why the filter could not be accepted. 4044 */ 4045 if (*fdir_filter_count) { 4046 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4047 i40e_flow_str(fsp), 4048 *fdir_filter_count); 4049 return -EOPNOTSUPP; 4050 } 4051 4052 i40e_write_fd_input_set(pf, index, new_mask); 4053 4054 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4055 * frames. If we're programming the input set for IPv4/Other, we also 4056 * need to program the IPv4/Fragmented input set. Since we don't have 4057 * separate support, we'll always assume and enforce that the two flow 4058 * types must have matching input sets. 4059 */ 4060 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4061 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4062 new_mask); 4063 4064 /* Add the new offset and update table, if necessary */ 4065 if (new_flex_offset) { 4066 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4067 pit_index); 4068 if (err) 4069 return err; 4070 4071 if (flex_l3) { 4072 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4073 src_offset, 4074 pit_index); 4075 if (err) 4076 return err; 4077 } 4078 4079 i40e_reprogram_flex_pit(pf); 4080 } 4081 4082 return 0; 4083 } 4084 4085 /** 4086 * i40e_match_fdir_filter - Return true of two filters match 4087 * @a: pointer to filter struct 4088 * @b: pointer to filter struct 4089 * 4090 * Returns true if the two filters match exactly the same criteria. I.e. they 4091 * match the same flow type and have the same parameters. We don't need to 4092 * check any input-set since all filters of the same flow type must use the 4093 * same input set. 4094 **/ 4095 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4096 struct i40e_fdir_filter *b) 4097 { 4098 /* The filters do not much if any of these criteria differ. */ 4099 if (a->dst_ip != b->dst_ip || 4100 a->src_ip != b->src_ip || 4101 a->dst_port != b->dst_port || 4102 a->src_port != b->src_port || 4103 a->flow_type != b->flow_type || 4104 a->ip4_proto != b->ip4_proto) 4105 return false; 4106 4107 return true; 4108 } 4109 4110 /** 4111 * i40e_disallow_matching_filters - Check that new filters differ 4112 * @vsi: pointer to the targeted VSI 4113 * @input: new filter to check 4114 * 4115 * Due to hardware limitations, it is not possible for two filters that match 4116 * similar criteria to be programmed at the same time. This is true for a few 4117 * reasons: 4118 * 4119 * (a) all filters matching a particular flow type must use the same input 4120 * set, that is they must match the same criteria. 4121 * (b) different flow types will never match the same packet, as the flow type 4122 * is decided by hardware before checking which rules apply. 4123 * (c) hardware has no way to distinguish which order filters apply in. 4124 * 4125 * Due to this, we can't really support using the location data to order 4126 * filters in the hardware parsing. It is technically possible for the user to 4127 * request two filters matching the same criteria but which select different 4128 * queues. In this case, rather than keep both filters in the list, we reject 4129 * the 2nd filter when the user requests adding it. 4130 * 4131 * This avoids needing to track location for programming the filter to 4132 * hardware, and ensures that we avoid some strange scenarios involving 4133 * deleting filters which match the same criteria. 4134 **/ 4135 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4136 struct i40e_fdir_filter *input) 4137 { 4138 struct i40e_pf *pf = vsi->back; 4139 struct i40e_fdir_filter *rule; 4140 struct hlist_node *node2; 4141 4142 /* Loop through every filter, and check that it doesn't match */ 4143 hlist_for_each_entry_safe(rule, node2, 4144 &pf->fdir_filter_list, fdir_node) { 4145 /* Don't check the filters match if they share the same fd_id, 4146 * since the new filter is actually just updating the target 4147 * of the old filter. 4148 */ 4149 if (rule->fd_id == input->fd_id) 4150 continue; 4151 4152 /* If any filters match, then print a warning message to the 4153 * kernel message buffer and bail out. 4154 */ 4155 if (i40e_match_fdir_filter(rule, input)) { 4156 dev_warn(&pf->pdev->dev, 4157 "Existing user defined filter %d already matches this flow.\n", 4158 rule->fd_id); 4159 return -EINVAL; 4160 } 4161 } 4162 4163 return 0; 4164 } 4165 4166 /** 4167 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4168 * @vsi: pointer to the targeted VSI 4169 * @cmd: command to get or set RX flow classification rules 4170 * 4171 * Add Flow Director filters for a specific flow spec based on their 4172 * protocol. Returns 0 if the filters were successfully added. 4173 **/ 4174 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4175 struct ethtool_rxnfc *cmd) 4176 { 4177 struct i40e_rx_flow_userdef userdef; 4178 struct ethtool_rx_flow_spec *fsp; 4179 struct i40e_fdir_filter *input; 4180 u16 dest_vsi = 0, q_index = 0; 4181 struct i40e_pf *pf; 4182 int ret = -EINVAL; 4183 u8 dest_ctl; 4184 4185 if (!vsi) 4186 return -EINVAL; 4187 pf = vsi->back; 4188 4189 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4190 return -EOPNOTSUPP; 4191 4192 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4193 return -ENOSPC; 4194 4195 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4196 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4197 return -EBUSY; 4198 4199 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4200 return -EBUSY; 4201 4202 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4203 4204 /* Parse the user-defined field */ 4205 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4206 return -EINVAL; 4207 4208 /* Extended MAC field is not supported */ 4209 if (fsp->flow_type & FLOW_MAC_EXT) 4210 return -EINVAL; 4211 4212 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4213 if (ret) 4214 return ret; 4215 4216 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4217 pf->hw.func_caps.fd_filters_guaranteed)) { 4218 return -EINVAL; 4219 } 4220 4221 /* ring_cookie is either the drop index, or is a mask of the queue 4222 * index and VF id we wish to target. 4223 */ 4224 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4225 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4226 } else { 4227 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4228 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4229 4230 if (!vf) { 4231 if (ring >= vsi->num_queue_pairs) 4232 return -EINVAL; 4233 dest_vsi = vsi->id; 4234 } else { 4235 /* VFs are zero-indexed, so we subtract one here */ 4236 vf--; 4237 4238 if (vf >= pf->num_alloc_vfs) 4239 return -EINVAL; 4240 if (ring >= pf->vf[vf].num_queue_pairs) 4241 return -EINVAL; 4242 dest_vsi = pf->vf[vf].lan_vsi_id; 4243 } 4244 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4245 q_index = ring; 4246 } 4247 4248 input = kzalloc(sizeof(*input), GFP_KERNEL); 4249 4250 if (!input) 4251 return -ENOMEM; 4252 4253 input->fd_id = fsp->location; 4254 input->q_index = q_index; 4255 input->dest_vsi = dest_vsi; 4256 input->dest_ctl = dest_ctl; 4257 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4258 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4259 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4260 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4261 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4262 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4263 4264 /* Reverse the src and dest notion, since the HW expects them to be from 4265 * Tx perspective where as the input from user is from Rx filter view. 4266 */ 4267 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4268 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4269 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4270 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4271 4272 if (userdef.flex_filter) { 4273 input->flex_filter = true; 4274 input->flex_word = cpu_to_be16(userdef.flex_word); 4275 input->flex_offset = userdef.flex_offset; 4276 } 4277 4278 /* Avoid programming two filters with identical match criteria. */ 4279 ret = i40e_disallow_matching_filters(vsi, input); 4280 if (ret) 4281 goto free_filter_memory; 4282 4283 /* Add the input filter to the fdir_input_list, possibly replacing 4284 * a previous filter. Do not free the input structure after adding it 4285 * to the list as this would cause a use-after-free bug. 4286 */ 4287 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4288 ret = i40e_add_del_fdir(vsi, input, true); 4289 if (ret) 4290 goto remove_sw_rule; 4291 return 0; 4292 4293 remove_sw_rule: 4294 hlist_del(&input->fdir_node); 4295 pf->fdir_pf_active_filters--; 4296 free_filter_memory: 4297 kfree(input); 4298 return ret; 4299 } 4300 4301 /** 4302 * i40e_set_rxnfc - command to set RX flow classification rules 4303 * @netdev: network interface device structure 4304 * @cmd: ethtool rxnfc command 4305 * 4306 * Returns Success if the command is supported. 4307 **/ 4308 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4309 { 4310 struct i40e_netdev_priv *np = netdev_priv(netdev); 4311 struct i40e_vsi *vsi = np->vsi; 4312 struct i40e_pf *pf = vsi->back; 4313 int ret = -EOPNOTSUPP; 4314 4315 switch (cmd->cmd) { 4316 case ETHTOOL_SRXFH: 4317 ret = i40e_set_rss_hash_opt(pf, cmd); 4318 break; 4319 case ETHTOOL_SRXCLSRLINS: 4320 ret = i40e_add_fdir_ethtool(vsi, cmd); 4321 break; 4322 case ETHTOOL_SRXCLSRLDEL: 4323 ret = i40e_del_fdir_entry(vsi, cmd); 4324 break; 4325 default: 4326 break; 4327 } 4328 4329 return ret; 4330 } 4331 4332 /** 4333 * i40e_max_channels - get Max number of combined channels supported 4334 * @vsi: vsi pointer 4335 **/ 4336 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4337 { 4338 /* TODO: This code assumes DCB and FD is disabled for now. */ 4339 return vsi->alloc_queue_pairs; 4340 } 4341 4342 /** 4343 * i40e_get_channels - Get the current channels enabled and max supported etc. 4344 * @dev: network interface device structure 4345 * @ch: ethtool channels structure 4346 * 4347 * We don't support separate tx and rx queues as channels. The other count 4348 * represents how many queues are being used for control. max_combined counts 4349 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4350 * q_vectors since we support a lot more queue pairs than q_vectors. 4351 **/ 4352 static void i40e_get_channels(struct net_device *dev, 4353 struct ethtool_channels *ch) 4354 { 4355 struct i40e_netdev_priv *np = netdev_priv(dev); 4356 struct i40e_vsi *vsi = np->vsi; 4357 struct i40e_pf *pf = vsi->back; 4358 4359 /* report maximum channels */ 4360 ch->max_combined = i40e_max_channels(vsi); 4361 4362 /* report info for other vector */ 4363 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4364 ch->max_other = ch->other_count; 4365 4366 /* Note: This code assumes DCB is disabled for now. */ 4367 ch->combined_count = vsi->num_queue_pairs; 4368 } 4369 4370 /** 4371 * i40e_set_channels - Set the new channels count. 4372 * @dev: network interface device structure 4373 * @ch: ethtool channels structure 4374 * 4375 * The new channels count may not be the same as requested by the user 4376 * since it gets rounded down to a power of 2 value. 4377 **/ 4378 static int i40e_set_channels(struct net_device *dev, 4379 struct ethtool_channels *ch) 4380 { 4381 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4382 struct i40e_netdev_priv *np = netdev_priv(dev); 4383 unsigned int count = ch->combined_count; 4384 struct i40e_vsi *vsi = np->vsi; 4385 struct i40e_pf *pf = vsi->back; 4386 struct i40e_fdir_filter *rule; 4387 struct hlist_node *node2; 4388 int new_count; 4389 int err = 0; 4390 4391 /* We do not support setting channels for any other VSI at present */ 4392 if (vsi->type != I40E_VSI_MAIN) 4393 return -EINVAL; 4394 4395 /* We do not support setting channels via ethtool when TCs are 4396 * configured through mqprio 4397 */ 4398 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4399 return -EINVAL; 4400 4401 /* verify they are not requesting separate vectors */ 4402 if (!count || ch->rx_count || ch->tx_count) 4403 return -EINVAL; 4404 4405 /* verify other_count has not changed */ 4406 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4407 return -EINVAL; 4408 4409 /* verify the number of channels does not exceed hardware limits */ 4410 if (count > i40e_max_channels(vsi)) 4411 return -EINVAL; 4412 4413 /* verify that the number of channels does not invalidate any current 4414 * flow director rules 4415 */ 4416 hlist_for_each_entry_safe(rule, node2, 4417 &pf->fdir_filter_list, fdir_node) { 4418 if (rule->dest_ctl != drop && count <= rule->q_index) { 4419 dev_warn(&pf->pdev->dev, 4420 "Existing user defined filter %d assigns flow to queue %d\n", 4421 rule->fd_id, rule->q_index); 4422 err = -EINVAL; 4423 } 4424 } 4425 4426 if (err) { 4427 dev_err(&pf->pdev->dev, 4428 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4429 count); 4430 return err; 4431 } 4432 4433 /* update feature limits from largest to smallest supported values */ 4434 /* TODO: Flow director limit, DCB etc */ 4435 4436 /* use rss_reconfig to rebuild with new queue count and update traffic 4437 * class queue mapping 4438 */ 4439 new_count = i40e_reconfig_rss_queues(pf, count); 4440 if (new_count > 0) 4441 return 0; 4442 else 4443 return -EINVAL; 4444 } 4445 4446 /** 4447 * i40e_get_rxfh_key_size - get the RSS hash key size 4448 * @netdev: network interface device structure 4449 * 4450 * Returns the table size. 4451 **/ 4452 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4453 { 4454 return I40E_HKEY_ARRAY_SIZE; 4455 } 4456 4457 /** 4458 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4459 * @netdev: network interface device structure 4460 * 4461 * Returns the table size. 4462 **/ 4463 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4464 { 4465 return I40E_HLUT_ARRAY_SIZE; 4466 } 4467 4468 /** 4469 * i40e_get_rxfh - get the rx flow hash indirection table 4470 * @netdev: network interface device structure 4471 * @indir: indirection table 4472 * @key: hash key 4473 * @hfunc: hash function 4474 * 4475 * Reads the indirection table directly from the hardware. Returns 0 on 4476 * success. 4477 **/ 4478 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4479 u8 *hfunc) 4480 { 4481 struct i40e_netdev_priv *np = netdev_priv(netdev); 4482 struct i40e_vsi *vsi = np->vsi; 4483 u8 *lut, *seed = NULL; 4484 int ret; 4485 u16 i; 4486 4487 if (hfunc) 4488 *hfunc = ETH_RSS_HASH_TOP; 4489 4490 if (!indir) 4491 return 0; 4492 4493 seed = key; 4494 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4495 if (!lut) 4496 return -ENOMEM; 4497 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4498 if (ret) 4499 goto out; 4500 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4501 indir[i] = (u32)(lut[i]); 4502 4503 out: 4504 kfree(lut); 4505 4506 return ret; 4507 } 4508 4509 /** 4510 * i40e_set_rxfh - set the rx flow hash indirection table 4511 * @netdev: network interface device structure 4512 * @indir: indirection table 4513 * @key: hash key 4514 * @hfunc: hash function to use 4515 * 4516 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4517 * returns 0 after programming the table. 4518 **/ 4519 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4520 const u8 *key, const u8 hfunc) 4521 { 4522 struct i40e_netdev_priv *np = netdev_priv(netdev); 4523 struct i40e_vsi *vsi = np->vsi; 4524 struct i40e_pf *pf = vsi->back; 4525 u8 *seed = NULL; 4526 u16 i; 4527 4528 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4529 return -EOPNOTSUPP; 4530 4531 if (key) { 4532 if (!vsi->rss_hkey_user) { 4533 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4534 GFP_KERNEL); 4535 if (!vsi->rss_hkey_user) 4536 return -ENOMEM; 4537 } 4538 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4539 seed = vsi->rss_hkey_user; 4540 } 4541 if (!vsi->rss_lut_user) { 4542 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4543 if (!vsi->rss_lut_user) 4544 return -ENOMEM; 4545 } 4546 4547 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4548 if (indir) 4549 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4550 vsi->rss_lut_user[i] = (u8)(indir[i]); 4551 else 4552 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4553 vsi->rss_size); 4554 4555 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4556 I40E_HLUT_ARRAY_SIZE); 4557 } 4558 4559 /** 4560 * i40e_get_priv_flags - report device private flags 4561 * @dev: network interface device structure 4562 * 4563 * The get string set count and the string set should be matched for each 4564 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4565 * array. 4566 * 4567 * Returns a u32 bitmap of flags. 4568 **/ 4569 static u32 i40e_get_priv_flags(struct net_device *dev) 4570 { 4571 struct i40e_netdev_priv *np = netdev_priv(dev); 4572 struct i40e_vsi *vsi = np->vsi; 4573 struct i40e_pf *pf = vsi->back; 4574 u32 i, j, ret_flags = 0; 4575 4576 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4577 const struct i40e_priv_flags *priv_flags; 4578 4579 priv_flags = &i40e_gstrings_priv_flags[i]; 4580 4581 if (priv_flags->flag & pf->flags) 4582 ret_flags |= BIT(i); 4583 } 4584 4585 if (pf->hw.pf_id != 0) 4586 return ret_flags; 4587 4588 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4589 const struct i40e_priv_flags *priv_flags; 4590 4591 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4592 4593 if (priv_flags->flag & pf->flags) 4594 ret_flags |= BIT(i + j); 4595 } 4596 4597 return ret_flags; 4598 } 4599 4600 /** 4601 * i40e_set_priv_flags - set private flags 4602 * @dev: network interface device structure 4603 * @flags: bit flags to be set 4604 **/ 4605 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4606 { 4607 struct i40e_netdev_priv *np = netdev_priv(dev); 4608 struct i40e_vsi *vsi = np->vsi; 4609 struct i40e_pf *pf = vsi->back; 4610 u64 orig_flags, new_flags, changed_flags; 4611 u32 i, j; 4612 4613 orig_flags = READ_ONCE(pf->flags); 4614 new_flags = orig_flags; 4615 4616 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4617 const struct i40e_priv_flags *priv_flags; 4618 4619 priv_flags = &i40e_gstrings_priv_flags[i]; 4620 4621 if (flags & BIT(i)) 4622 new_flags |= priv_flags->flag; 4623 else 4624 new_flags &= ~(priv_flags->flag); 4625 4626 /* If this is a read-only flag, it can't be changed */ 4627 if (priv_flags->read_only && 4628 ((orig_flags ^ new_flags) & ~BIT(i))) 4629 return -EOPNOTSUPP; 4630 } 4631 4632 if (pf->hw.pf_id != 0) 4633 goto flags_complete; 4634 4635 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4636 const struct i40e_priv_flags *priv_flags; 4637 4638 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4639 4640 if (flags & BIT(i + j)) 4641 new_flags |= priv_flags->flag; 4642 else 4643 new_flags &= ~(priv_flags->flag); 4644 4645 /* If this is a read-only flag, it can't be changed */ 4646 if (priv_flags->read_only && 4647 ((orig_flags ^ new_flags) & ~BIT(i))) 4648 return -EOPNOTSUPP; 4649 } 4650 4651 flags_complete: 4652 changed_flags = orig_flags ^ new_flags; 4653 4654 /* Before we finalize any flag changes, we need to perform some 4655 * checks to ensure that the changes are supported and safe. 4656 */ 4657 4658 /* ATR eviction is not supported on all devices */ 4659 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4660 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4661 return -EOPNOTSUPP; 4662 4663 /* If the driver detected FW LLDP was disabled on init, this flag could 4664 * be set, however we do not support _changing_ the flag: 4665 * - on XL710 if NPAR is enabled or FW API version < 1.7 4666 * - on X722 with FW API version < 1.6 4667 * There are situations where older FW versions/NPAR enabled PFs could 4668 * disable LLDP, however we _must_ not allow the user to enable/disable 4669 * LLDP with this flag on unsupported FW versions. 4670 */ 4671 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4672 if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) { 4673 dev_warn(&pf->pdev->dev, 4674 "Device does not support changing FW LLDP\n"); 4675 return -EOPNOTSUPP; 4676 } 4677 } 4678 4679 /* Now that we've checked to ensure that the new flags are valid, load 4680 * them into place. Since we only modify flags either (a) during 4681 * initialization or (b) while holding the RTNL lock, we don't need 4682 * anything fancy here. 4683 */ 4684 pf->flags = new_flags; 4685 4686 /* Process any additional changes needed as a result of flag changes. 4687 * The changed_flags value reflects the list of bits that were 4688 * changed in the code above. 4689 */ 4690 4691 /* Flush current ATR settings if ATR was disabled */ 4692 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4693 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4694 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4695 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4696 } 4697 4698 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4699 u16 sw_flags = 0, valid_flags = 0; 4700 int ret; 4701 4702 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4703 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4704 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4705 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4706 0, NULL); 4707 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4708 dev_info(&pf->pdev->dev, 4709 "couldn't set switch config bits, err %s aq_err %s\n", 4710 i40e_stat_str(&pf->hw, ret), 4711 i40e_aq_str(&pf->hw, 4712 pf->hw.aq.asq_last_status)); 4713 /* not a fatal problem, just keep going */ 4714 } 4715 } 4716 4717 if ((changed_flags & pf->flags & 4718 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4719 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4720 dev_warn(&pf->pdev->dev, 4721 "Turning on link-down-on-close flag may affect other partitions\n"); 4722 4723 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4724 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4725 struct i40e_dcbx_config *dcbcfg; 4726 4727 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4728 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4729 /* reset local_dcbx_config to default */ 4730 dcbcfg = &pf->hw.local_dcbx_config; 4731 dcbcfg->etscfg.willing = 1; 4732 dcbcfg->etscfg.maxtcs = 0; 4733 dcbcfg->etscfg.tcbwtable[0] = 100; 4734 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4735 dcbcfg->etscfg.tcbwtable[i] = 0; 4736 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4737 dcbcfg->etscfg.prioritytable[i] = 0; 4738 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4739 dcbcfg->pfc.willing = 1; 4740 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4741 } else { 4742 i40e_aq_start_lldp(&pf->hw, NULL); 4743 } 4744 } 4745 4746 /* Issue reset to cause things to take effect, as additional bits 4747 * are added we will need to create a mask of bits requiring reset 4748 */ 4749 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4750 I40E_FLAG_LEGACY_RX | 4751 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4752 I40E_FLAG_DISABLE_FW_LLDP)) 4753 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4754 4755 return 0; 4756 } 4757 4758 /** 4759 * i40e_get_module_info - get (Q)SFP+ module type info 4760 * @netdev: network interface device structure 4761 * @modinfo: module EEPROM size and layout information structure 4762 **/ 4763 static int i40e_get_module_info(struct net_device *netdev, 4764 struct ethtool_modinfo *modinfo) 4765 { 4766 struct i40e_netdev_priv *np = netdev_priv(netdev); 4767 struct i40e_vsi *vsi = np->vsi; 4768 struct i40e_pf *pf = vsi->back; 4769 struct i40e_hw *hw = &pf->hw; 4770 u32 sff8472_comp = 0; 4771 u32 sff8472_swap = 0; 4772 u32 sff8636_rev = 0; 4773 i40e_status status; 4774 u32 type = 0; 4775 4776 /* Check if firmware supports reading module EEPROM. */ 4777 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4778 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4779 return -EINVAL; 4780 } 4781 4782 status = i40e_update_link_info(hw); 4783 if (status) 4784 return -EIO; 4785 4786 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4787 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4788 return -EINVAL; 4789 } 4790 4791 type = hw->phy.link_info.module_type[0]; 4792 4793 switch (type) { 4794 case I40E_MODULE_TYPE_SFP: 4795 status = i40e_aq_get_phy_register(hw, 4796 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4797 I40E_I2C_EEPROM_DEV_ADDR, 4798 I40E_MODULE_SFF_8472_COMP, 4799 &sff8472_comp, NULL); 4800 if (status) 4801 return -EIO; 4802 4803 status = i40e_aq_get_phy_register(hw, 4804 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4805 I40E_I2C_EEPROM_DEV_ADDR, 4806 I40E_MODULE_SFF_8472_SWAP, 4807 &sff8472_swap, NULL); 4808 if (status) 4809 return -EIO; 4810 4811 /* Check if the module requires address swap to access 4812 * the other EEPROM memory page. 4813 */ 4814 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4815 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4816 modinfo->type = ETH_MODULE_SFF_8079; 4817 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4818 } else if (sff8472_comp == 0x00) { 4819 /* Module is not SFF-8472 compliant */ 4820 modinfo->type = ETH_MODULE_SFF_8079; 4821 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4822 } else { 4823 modinfo->type = ETH_MODULE_SFF_8472; 4824 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4825 } 4826 break; 4827 case I40E_MODULE_TYPE_QSFP_PLUS: 4828 /* Read from memory page 0. */ 4829 status = i40e_aq_get_phy_register(hw, 4830 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4831 0, 4832 I40E_MODULE_REVISION_ADDR, 4833 &sff8636_rev, NULL); 4834 if (status) 4835 return -EIO; 4836 /* Determine revision compliance byte */ 4837 if (sff8636_rev > 0x02) { 4838 /* Module is SFF-8636 compliant */ 4839 modinfo->type = ETH_MODULE_SFF_8636; 4840 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4841 } else { 4842 modinfo->type = ETH_MODULE_SFF_8436; 4843 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4844 } 4845 break; 4846 case I40E_MODULE_TYPE_QSFP28: 4847 modinfo->type = ETH_MODULE_SFF_8636; 4848 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4849 break; 4850 default: 4851 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4852 return -EINVAL; 4853 } 4854 return 0; 4855 } 4856 4857 /** 4858 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4859 * @netdev: network interface device structure 4860 * @ee: EEPROM dump request structure 4861 * @data: buffer to be filled with EEPROM contents 4862 **/ 4863 static int i40e_get_module_eeprom(struct net_device *netdev, 4864 struct ethtool_eeprom *ee, 4865 u8 *data) 4866 { 4867 struct i40e_netdev_priv *np = netdev_priv(netdev); 4868 struct i40e_vsi *vsi = np->vsi; 4869 struct i40e_pf *pf = vsi->back; 4870 struct i40e_hw *hw = &pf->hw; 4871 bool is_sfp = false; 4872 i40e_status status; 4873 u32 value = 0; 4874 int i; 4875 4876 if (!ee || !ee->len || !data) 4877 return -EINVAL; 4878 4879 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4880 is_sfp = true; 4881 4882 for (i = 0; i < ee->len; i++) { 4883 u32 offset = i + ee->offset; 4884 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4885 4886 /* Check if we need to access the other memory page */ 4887 if (is_sfp) { 4888 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4889 offset -= ETH_MODULE_SFF_8079_LEN; 4890 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4891 } 4892 } else { 4893 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4894 /* Compute memory page number and offset. */ 4895 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4896 addr++; 4897 } 4898 } 4899 4900 status = i40e_aq_get_phy_register(hw, 4901 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4902 addr, offset, &value, NULL); 4903 if (status) 4904 return -EIO; 4905 data[i] = value; 4906 } 4907 return 0; 4908 } 4909 4910 static const struct ethtool_ops i40e_ethtool_ops = { 4911 .get_drvinfo = i40e_get_drvinfo, 4912 .get_regs_len = i40e_get_regs_len, 4913 .get_regs = i40e_get_regs, 4914 .nway_reset = i40e_nway_reset, 4915 .get_link = ethtool_op_get_link, 4916 .get_wol = i40e_get_wol, 4917 .set_wol = i40e_set_wol, 4918 .set_eeprom = i40e_set_eeprom, 4919 .get_eeprom_len = i40e_get_eeprom_len, 4920 .get_eeprom = i40e_get_eeprom, 4921 .get_ringparam = i40e_get_ringparam, 4922 .set_ringparam = i40e_set_ringparam, 4923 .get_pauseparam = i40e_get_pauseparam, 4924 .set_pauseparam = i40e_set_pauseparam, 4925 .get_msglevel = i40e_get_msglevel, 4926 .set_msglevel = i40e_set_msglevel, 4927 .get_rxnfc = i40e_get_rxnfc, 4928 .set_rxnfc = i40e_set_rxnfc, 4929 .self_test = i40e_diag_test, 4930 .get_strings = i40e_get_strings, 4931 .set_phys_id = i40e_set_phys_id, 4932 .get_sset_count = i40e_get_sset_count, 4933 .get_ethtool_stats = i40e_get_ethtool_stats, 4934 .get_coalesce = i40e_get_coalesce, 4935 .set_coalesce = i40e_set_coalesce, 4936 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4937 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4938 .get_rxfh = i40e_get_rxfh, 4939 .set_rxfh = i40e_set_rxfh, 4940 .get_channels = i40e_get_channels, 4941 .set_channels = i40e_set_channels, 4942 .get_module_info = i40e_get_module_info, 4943 .get_module_eeprom = i40e_get_module_eeprom, 4944 .get_ts_info = i40e_get_ts_info, 4945 .get_priv_flags = i40e_get_priv_flags, 4946 .set_priv_flags = i40e_set_priv_flags, 4947 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4948 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4949 .get_link_ksettings = i40e_get_link_ksettings, 4950 .set_link_ksettings = i40e_set_link_ksettings, 4951 }; 4952 4953 void i40e_set_ethtool_ops(struct net_device *netdev) 4954 { 4955 netdev->ethtool_ops = &i40e_ethtool_ops; 4956 } 4957