1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 10 /* ethtool statistics helpers */ 11 12 /** 13 * struct i40e_stats - definition for an ethtool statistic 14 * @stat_string: statistic name to display in ethtool -S output 15 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 16 * @stat_offset: offsetof() the stat from a base pointer 17 * 18 * This structure defines a statistic to be added to the ethtool stats buffer. 19 * It defines a statistic as offset from a common base pointer. Stats should 20 * be defined in constant arrays using the I40E_STAT macro, with every element 21 * of the array using the same _type for calculating the sizeof_stat and 22 * stat_offset. 23 * 24 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 25 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 26 * the i40e_add_ethtool_stat() helper function. 27 * 28 * The @stat_string is interpreted as a format string, allowing formatted 29 * values to be inserted while looping over multiple structures for a given 30 * statistics array. Thus, every statistic string in an array should have the 31 * same type and number of format specifiers, to be formatted by variadic 32 * arguments to the i40e_add_stat_string() helper function. 33 **/ 34 struct i40e_stats { 35 char stat_string[ETH_GSTRING_LEN]; 36 int sizeof_stat; 37 int stat_offset; 38 }; 39 40 /* Helper macro to define an i40e_stat structure with proper size and type. 41 * Use this when defining constant statistics arrays. Note that @_type expects 42 * only a type name and is used multiple times. 43 */ 44 #define I40E_STAT(_type, _name, _stat) { \ 45 .stat_string = _name, \ 46 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 47 .stat_offset = offsetof(_type, _stat) \ 48 } 49 50 /* Helper macro for defining some statistics directly copied from the netdev 51 * stats structure. 52 */ 53 #define I40E_NETDEV_STAT(_net_stat) \ 54 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 55 56 /* Helper macro for defining some statistics related to queues */ 57 #define I40E_QUEUE_STAT(_name, _stat) \ 58 I40E_STAT(struct i40e_ring, _name, _stat) 59 60 /* Stats associated with a Tx or Rx ring */ 61 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 64 }; 65 66 /** 67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 68 * @data: location to store the stat value 69 * @pointer: basis for where to copy from 70 * @stat: the stat definition 71 * 72 * Copies the stat data defined by the pointer and stat structure pair into 73 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 74 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 75 */ 76 static void 77 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 78 const struct i40e_stats *stat) 79 { 80 char *p; 81 82 if (!pointer) { 83 /* ensure that the ethtool data buffer is zero'd for any stats 84 * which don't have a valid pointer. 85 */ 86 *data = 0; 87 return; 88 } 89 90 p = (char *)pointer + stat->stat_offset; 91 switch (stat->sizeof_stat) { 92 case sizeof(u64): 93 *data = *((u64 *)p); 94 break; 95 case sizeof(u32): 96 *data = *((u32 *)p); 97 break; 98 case sizeof(u16): 99 *data = *((u16 *)p); 100 break; 101 case sizeof(u8): 102 *data = *((u8 *)p); 103 break; 104 default: 105 WARN_ONCE(1, "unexpected stat size for %s", 106 stat->stat_string); 107 *data = 0; 108 } 109 } 110 111 /** 112 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 113 * @data: ethtool stats buffer 114 * @pointer: location to copy stats from 115 * @stats: array of stats to copy 116 * @size: the size of the stats definition 117 * 118 * Copy the stats defined by the stats array using the pointer as a base into 119 * the data buffer supplied by ethtool. Updates the data pointer to point to 120 * the next empty location for successive calls to __i40e_add_ethtool_stats. 121 * If pointer is null, set the data values to zero and update the pointer to 122 * skip these stats. 123 **/ 124 static void 125 __i40e_add_ethtool_stats(u64 **data, void *pointer, 126 const struct i40e_stats stats[], 127 const unsigned int size) 128 { 129 unsigned int i; 130 131 for (i = 0; i < size; i++) 132 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 133 } 134 135 /** 136 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 137 * @data: ethtool stats buffer 138 * @pointer: location where stats are stored 139 * @stats: static const array of stat definitions 140 * 141 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 142 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 143 * ensuring that we pass the size associated with the given stats array. 144 * 145 * The parameter @stats is evaluated twice, so parameters with side effects 146 * should be avoided. 147 **/ 148 #define i40e_add_ethtool_stats(data, pointer, stats) \ 149 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 150 151 /** 152 * i40e_add_queue_stats - copy queue statistics into supplied buffer 153 * @data: ethtool stats buffer 154 * @ring: the ring to copy 155 * 156 * Queue statistics must be copied while protected by 157 * u64_stats_fetch_begin_irq, so we can't directly use i40e_add_ethtool_stats. 158 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 159 * ring pointer is null, zero out the queue stat values and update the data 160 * pointer. Otherwise safely copy the stats from the ring into the supplied 161 * buffer and update the data pointer when finished. 162 * 163 * This function expects to be called while under rcu_read_lock(). 164 **/ 165 static void 166 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 167 { 168 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 169 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 170 unsigned int start; 171 unsigned int i; 172 173 /* To avoid invalid statistics values, ensure that we keep retrying 174 * the copy until we get a consistent value according to 175 * u64_stats_fetch_retry_irq. But first, make sure our ring is 176 * non-null before attempting to access its syncp. 177 */ 178 do { 179 start = !ring ? 0 : u64_stats_fetch_begin_irq(&ring->syncp); 180 for (i = 0; i < size; i++) { 181 i40e_add_one_ethtool_stat(&(*data)[i], ring, 182 &stats[i]); 183 } 184 } while (ring && u64_stats_fetch_retry_irq(&ring->syncp, start)); 185 186 /* Once we successfully copy the stats in, update the data pointer */ 187 *data += size; 188 } 189 190 /** 191 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 192 * @p: ethtool supplied buffer 193 * @stats: stat definitions array 194 * @size: size of the stats array 195 * 196 * Format and copy the strings described by stats into the buffer pointed at 197 * by p. 198 **/ 199 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 200 const unsigned int size, ...) 201 { 202 unsigned int i; 203 204 for (i = 0; i < size; i++) { 205 va_list args; 206 207 va_start(args, size); 208 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 209 *p += ETH_GSTRING_LEN; 210 va_end(args); 211 } 212 } 213 214 /** 215 * 40e_add_stat_strings - copy stat strings into ethtool buffer 216 * @p: ethtool supplied buffer 217 * @stats: stat definitions array 218 * 219 * Format and copy the strings described by the const static stats value into 220 * the buffer pointed at by p. 221 * 222 * The parameter @stats is evaluated twice, so parameters with side effects 223 * should be avoided. Additionally, stats must be an array such that 224 * ARRAY_SIZE can be called on it. 225 **/ 226 #define i40e_add_stat_strings(p, stats, ...) \ 227 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 228 229 #define I40E_PF_STAT(_name, _stat) \ 230 I40E_STAT(struct i40e_pf, _name, _stat) 231 #define I40E_VSI_STAT(_name, _stat) \ 232 I40E_STAT(struct i40e_vsi, _name, _stat) 233 #define I40E_VEB_STAT(_name, _stat) \ 234 I40E_STAT(struct i40e_veb, _name, _stat) 235 #define I40E_PFC_STAT(_name, _stat) \ 236 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 237 #define I40E_QUEUE_STAT(_name, _stat) \ 238 I40E_STAT(struct i40e_ring, _name, _stat) 239 240 static const struct i40e_stats i40e_gstrings_net_stats[] = { 241 I40E_NETDEV_STAT(rx_packets), 242 I40E_NETDEV_STAT(tx_packets), 243 I40E_NETDEV_STAT(rx_bytes), 244 I40E_NETDEV_STAT(tx_bytes), 245 I40E_NETDEV_STAT(rx_errors), 246 I40E_NETDEV_STAT(tx_errors), 247 I40E_NETDEV_STAT(rx_dropped), 248 I40E_NETDEV_STAT(tx_dropped), 249 I40E_NETDEV_STAT(collisions), 250 I40E_NETDEV_STAT(rx_length_errors), 251 I40E_NETDEV_STAT(rx_crc_errors), 252 }; 253 254 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 255 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 256 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 257 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 258 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 259 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 260 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 261 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 262 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 263 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 264 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 265 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 266 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 267 }; 268 269 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 270 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets), 271 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes), 272 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets), 273 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes), 274 }; 275 276 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 277 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 278 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 279 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 280 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 281 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 282 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 283 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 284 I40E_VSI_STAT("tx_linearize", tx_linearize), 285 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 286 I40E_VSI_STAT("tx_busy", tx_busy), 287 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 288 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 289 }; 290 291 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 292 * but they are separate. This device supports Virtualization, and 293 * as such might have several netdevs supporting VMDq and FCoE going 294 * through a single port. The NETDEV_STATs are for individual netdevs 295 * seen at the top of the stack, and the PF_STATs are for the physical 296 * function at the bottom of the stack hosting those netdevs. 297 * 298 * The PF_STATs are appended to the netdev stats only when ethtool -S 299 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 300 */ 301 static const struct i40e_stats i40e_gstrings_stats[] = { 302 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 303 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 304 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 305 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 306 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 307 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 308 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 309 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 310 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 311 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 312 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 313 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 314 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 315 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 316 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 317 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 318 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 319 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 320 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 321 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 322 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 323 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 324 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 325 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 326 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 327 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 328 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 329 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 330 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 331 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 332 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 333 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 334 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 335 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 336 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 337 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 338 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 339 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 340 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 341 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 342 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 343 I40E_PF_STAT("port.arq_overflows", arq_overflows), 344 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 345 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 346 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 347 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 348 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 349 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 350 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 351 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 352 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 353 354 /* LPI stats */ 355 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 356 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 357 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 358 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 359 }; 360 361 struct i40e_pfc_stats { 362 u64 priority_xon_rx; 363 u64 priority_xoff_rx; 364 u64 priority_xon_tx; 365 u64 priority_xoff_tx; 366 u64 priority_xon_2_xoff; 367 }; 368 369 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 370 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 371 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 372 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 373 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 374 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 375 }; 376 377 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 378 379 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 380 381 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 382 383 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 384 I40E_MAX_USER_PRIORITY) 385 386 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 387 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 388 I40E_MAX_TRAFFIC_CLASS)) 389 390 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 391 392 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 393 I40E_PFC_STATS_LEN + \ 394 I40E_VEB_STATS_LEN + \ 395 I40E_VSI_STATS_LEN) 396 397 /* Length of stats for a single queue */ 398 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 399 400 enum i40e_ethtool_test_id { 401 I40E_ETH_TEST_REG = 0, 402 I40E_ETH_TEST_EEPROM, 403 I40E_ETH_TEST_INTR, 404 I40E_ETH_TEST_LINK, 405 }; 406 407 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 408 "Register test (offline)", 409 "Eeprom test (offline)", 410 "Interrupt test (offline)", 411 "Link test (on/offline)" 412 }; 413 414 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 415 416 struct i40e_priv_flags { 417 char flag_string[ETH_GSTRING_LEN]; 418 u64 flag; 419 bool read_only; 420 }; 421 422 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 423 .flag_string = _name, \ 424 .flag = _flag, \ 425 .read_only = _read_only, \ 426 } 427 428 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 429 /* NOTE: MFP setting cannot be changed */ 430 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 431 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 432 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 433 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 434 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 435 I40E_PRIV_FLAG("link-down-on-close", 436 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 437 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 438 I40E_PRIV_FLAG("disable-source-pruning", 439 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 440 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 441 }; 442 443 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 444 445 /* Private flags with a global effect, restricted to PF 0 */ 446 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 447 I40E_PRIV_FLAG("vf-true-promisc-support", 448 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 449 }; 450 451 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 452 453 /** 454 * i40e_partition_setting_complaint - generic complaint for MFP restriction 455 * @pf: the PF struct 456 **/ 457 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 458 { 459 dev_info(&pf->pdev->dev, 460 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 461 } 462 463 /** 464 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 465 * @pf: PF struct with phy_types 466 * @ks: ethtool link ksettings struct to fill out 467 * 468 **/ 469 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 470 struct ethtool_link_ksettings *ks) 471 { 472 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 473 u64 phy_types = pf->hw.phy.phy_types; 474 475 ethtool_link_ksettings_zero_link_mode(ks, supported); 476 ethtool_link_ksettings_zero_link_mode(ks, advertising); 477 478 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 479 ethtool_link_ksettings_add_link_mode(ks, supported, 480 1000baseT_Full); 481 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 482 ethtool_link_ksettings_add_link_mode(ks, advertising, 483 1000baseT_Full); 484 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 485 ethtool_link_ksettings_add_link_mode(ks, supported, 486 100baseT_Full); 487 ethtool_link_ksettings_add_link_mode(ks, advertising, 488 100baseT_Full); 489 } 490 } 491 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 492 phy_types & I40E_CAP_PHY_TYPE_XFI || 493 phy_types & I40E_CAP_PHY_TYPE_SFI || 494 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 495 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 496 ethtool_link_ksettings_add_link_mode(ks, supported, 497 10000baseT_Full); 498 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 499 ethtool_link_ksettings_add_link_mode(ks, advertising, 500 10000baseT_Full); 501 } 502 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 503 ethtool_link_ksettings_add_link_mode(ks, supported, 504 10000baseT_Full); 505 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 506 ethtool_link_ksettings_add_link_mode(ks, advertising, 507 10000baseT_Full); 508 } 509 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 510 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 511 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 512 ethtool_link_ksettings_add_link_mode(ks, supported, 513 40000baseCR4_Full); 514 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 515 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 516 ethtool_link_ksettings_add_link_mode(ks, supported, 517 40000baseCR4_Full); 518 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 519 ethtool_link_ksettings_add_link_mode(ks, advertising, 520 40000baseCR4_Full); 521 } 522 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 523 ethtool_link_ksettings_add_link_mode(ks, supported, 524 100baseT_Full); 525 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 526 ethtool_link_ksettings_add_link_mode(ks, advertising, 527 100baseT_Full); 528 } 529 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 530 ethtool_link_ksettings_add_link_mode(ks, supported, 531 1000baseT_Full); 532 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 533 ethtool_link_ksettings_add_link_mode(ks, advertising, 534 1000baseT_Full); 535 } 536 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 537 ethtool_link_ksettings_add_link_mode(ks, supported, 538 40000baseSR4_Full); 539 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 540 ethtool_link_ksettings_add_link_mode(ks, supported, 541 40000baseLR4_Full); 542 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 543 ethtool_link_ksettings_add_link_mode(ks, supported, 544 40000baseLR4_Full); 545 ethtool_link_ksettings_add_link_mode(ks, advertising, 546 40000baseLR4_Full); 547 } 548 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 549 ethtool_link_ksettings_add_link_mode(ks, supported, 550 20000baseKR2_Full); 551 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 552 ethtool_link_ksettings_add_link_mode(ks, advertising, 553 20000baseKR2_Full); 554 } 555 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 556 ethtool_link_ksettings_add_link_mode(ks, supported, 557 10000baseKX4_Full); 558 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 559 ethtool_link_ksettings_add_link_mode(ks, advertising, 560 10000baseKX4_Full); 561 } 562 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 563 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 564 ethtool_link_ksettings_add_link_mode(ks, supported, 565 10000baseKR_Full); 566 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 567 ethtool_link_ksettings_add_link_mode(ks, advertising, 568 10000baseKR_Full); 569 } 570 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 571 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 572 ethtool_link_ksettings_add_link_mode(ks, supported, 573 1000baseKX_Full); 574 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 575 ethtool_link_ksettings_add_link_mode(ks, advertising, 576 1000baseKX_Full); 577 } 578 /* need to add 25G PHY types */ 579 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 580 ethtool_link_ksettings_add_link_mode(ks, supported, 581 25000baseKR_Full); 582 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 583 ethtool_link_ksettings_add_link_mode(ks, advertising, 584 25000baseKR_Full); 585 } 586 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 587 ethtool_link_ksettings_add_link_mode(ks, supported, 588 25000baseCR_Full); 589 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 590 ethtool_link_ksettings_add_link_mode(ks, advertising, 591 25000baseCR_Full); 592 } 593 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 594 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 595 ethtool_link_ksettings_add_link_mode(ks, supported, 596 25000baseSR_Full); 597 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 598 ethtool_link_ksettings_add_link_mode(ks, advertising, 599 25000baseSR_Full); 600 } 601 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 602 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 603 ethtool_link_ksettings_add_link_mode(ks, supported, 604 25000baseCR_Full); 605 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 606 ethtool_link_ksettings_add_link_mode(ks, advertising, 607 25000baseCR_Full); 608 } 609 /* need to add new 10G PHY types */ 610 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 611 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 612 ethtool_link_ksettings_add_link_mode(ks, supported, 613 10000baseCR_Full); 614 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 615 ethtool_link_ksettings_add_link_mode(ks, advertising, 616 10000baseCR_Full); 617 } 618 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 619 ethtool_link_ksettings_add_link_mode(ks, supported, 620 10000baseSR_Full); 621 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 622 ethtool_link_ksettings_add_link_mode(ks, advertising, 623 10000baseSR_Full); 624 } 625 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 626 ethtool_link_ksettings_add_link_mode(ks, supported, 627 10000baseLR_Full); 628 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 629 ethtool_link_ksettings_add_link_mode(ks, advertising, 630 10000baseLR_Full); 631 } 632 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 633 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 634 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 635 ethtool_link_ksettings_add_link_mode(ks, supported, 636 1000baseX_Full); 637 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 638 ethtool_link_ksettings_add_link_mode(ks, advertising, 639 1000baseX_Full); 640 } 641 /* Autoneg PHY types */ 642 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 643 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 644 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 645 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 646 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 647 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 648 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 649 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 650 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 651 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 652 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 653 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 654 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 655 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 656 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 657 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 658 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 659 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 660 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 661 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 662 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 663 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 664 ethtool_link_ksettings_add_link_mode(ks, supported, 665 Autoneg); 666 ethtool_link_ksettings_add_link_mode(ks, advertising, 667 Autoneg); 668 } 669 } 670 671 /** 672 * i40e_get_settings_link_up - Get the Link settings for when link is up 673 * @hw: hw structure 674 * @ks: ethtool ksettings to fill in 675 * @netdev: network interface device structure 676 * @pf: pointer to physical function struct 677 **/ 678 static void i40e_get_settings_link_up(struct i40e_hw *hw, 679 struct ethtool_link_ksettings *ks, 680 struct net_device *netdev, 681 struct i40e_pf *pf) 682 { 683 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 684 struct ethtool_link_ksettings cap_ksettings; 685 u32 link_speed = hw_link_info->link_speed; 686 687 /* Initialize supported and advertised settings based on phy settings */ 688 switch (hw_link_info->phy_type) { 689 case I40E_PHY_TYPE_40GBASE_CR4: 690 case I40E_PHY_TYPE_40GBASE_CR4_CU: 691 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 692 ethtool_link_ksettings_add_link_mode(ks, supported, 693 40000baseCR4_Full); 694 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 695 ethtool_link_ksettings_add_link_mode(ks, advertising, 696 40000baseCR4_Full); 697 break; 698 case I40E_PHY_TYPE_XLAUI: 699 case I40E_PHY_TYPE_XLPPI: 700 case I40E_PHY_TYPE_40GBASE_AOC: 701 ethtool_link_ksettings_add_link_mode(ks, supported, 702 40000baseCR4_Full); 703 break; 704 case I40E_PHY_TYPE_40GBASE_SR4: 705 ethtool_link_ksettings_add_link_mode(ks, supported, 706 40000baseSR4_Full); 707 break; 708 case I40E_PHY_TYPE_40GBASE_LR4: 709 ethtool_link_ksettings_add_link_mode(ks, supported, 710 40000baseLR4_Full); 711 break; 712 case I40E_PHY_TYPE_25GBASE_SR: 713 case I40E_PHY_TYPE_25GBASE_LR: 714 case I40E_PHY_TYPE_10GBASE_SR: 715 case I40E_PHY_TYPE_10GBASE_LR: 716 case I40E_PHY_TYPE_1000BASE_SX: 717 case I40E_PHY_TYPE_1000BASE_LX: 718 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 719 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 720 ethtool_link_ksettings_add_link_mode(ks, supported, 721 25000baseSR_Full); 722 ethtool_link_ksettings_add_link_mode(ks, advertising, 723 25000baseSR_Full); 724 ethtool_link_ksettings_add_link_mode(ks, supported, 725 10000baseSR_Full); 726 ethtool_link_ksettings_add_link_mode(ks, advertising, 727 10000baseSR_Full); 728 ethtool_link_ksettings_add_link_mode(ks, supported, 729 10000baseLR_Full); 730 ethtool_link_ksettings_add_link_mode(ks, advertising, 731 10000baseLR_Full); 732 ethtool_link_ksettings_add_link_mode(ks, supported, 733 1000baseX_Full); 734 ethtool_link_ksettings_add_link_mode(ks, advertising, 735 1000baseX_Full); 736 ethtool_link_ksettings_add_link_mode(ks, supported, 737 10000baseT_Full); 738 if (hw_link_info->module_type[2] & 739 I40E_MODULE_TYPE_1000BASE_SX || 740 hw_link_info->module_type[2] & 741 I40E_MODULE_TYPE_1000BASE_LX) { 742 ethtool_link_ksettings_add_link_mode(ks, supported, 743 1000baseT_Full); 744 if (hw_link_info->requested_speeds & 745 I40E_LINK_SPEED_1GB) 746 ethtool_link_ksettings_add_link_mode( 747 ks, advertising, 1000baseT_Full); 748 } 749 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 750 ethtool_link_ksettings_add_link_mode(ks, advertising, 751 10000baseT_Full); 752 break; 753 case I40E_PHY_TYPE_10GBASE_T: 754 case I40E_PHY_TYPE_1000BASE_T: 755 case I40E_PHY_TYPE_100BASE_TX: 756 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 757 ethtool_link_ksettings_add_link_mode(ks, supported, 758 10000baseT_Full); 759 ethtool_link_ksettings_add_link_mode(ks, supported, 760 1000baseT_Full); 761 ethtool_link_ksettings_add_link_mode(ks, supported, 762 100baseT_Full); 763 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 764 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 765 ethtool_link_ksettings_add_link_mode(ks, advertising, 766 10000baseT_Full); 767 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 768 ethtool_link_ksettings_add_link_mode(ks, advertising, 769 1000baseT_Full); 770 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 771 ethtool_link_ksettings_add_link_mode(ks, advertising, 772 100baseT_Full); 773 break; 774 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 775 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 776 ethtool_link_ksettings_add_link_mode(ks, supported, 777 1000baseT_Full); 778 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 779 ethtool_link_ksettings_add_link_mode(ks, advertising, 780 1000baseT_Full); 781 break; 782 case I40E_PHY_TYPE_10GBASE_CR1_CU: 783 case I40E_PHY_TYPE_10GBASE_CR1: 784 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 785 ethtool_link_ksettings_add_link_mode(ks, supported, 786 10000baseT_Full); 787 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 788 ethtool_link_ksettings_add_link_mode(ks, advertising, 789 10000baseT_Full); 790 break; 791 case I40E_PHY_TYPE_XAUI: 792 case I40E_PHY_TYPE_XFI: 793 case I40E_PHY_TYPE_SFI: 794 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 795 case I40E_PHY_TYPE_10GBASE_AOC: 796 ethtool_link_ksettings_add_link_mode(ks, supported, 797 10000baseT_Full); 798 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 799 ethtool_link_ksettings_add_link_mode(ks, advertising, 800 10000baseT_Full); 801 break; 802 case I40E_PHY_TYPE_SGMII: 803 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 804 ethtool_link_ksettings_add_link_mode(ks, supported, 805 1000baseT_Full); 806 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 807 ethtool_link_ksettings_add_link_mode(ks, advertising, 808 1000baseT_Full); 809 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 810 ethtool_link_ksettings_add_link_mode(ks, supported, 811 100baseT_Full); 812 if (hw_link_info->requested_speeds & 813 I40E_LINK_SPEED_100MB) 814 ethtool_link_ksettings_add_link_mode( 815 ks, advertising, 100baseT_Full); 816 } 817 break; 818 case I40E_PHY_TYPE_40GBASE_KR4: 819 case I40E_PHY_TYPE_25GBASE_KR: 820 case I40E_PHY_TYPE_20GBASE_KR2: 821 case I40E_PHY_TYPE_10GBASE_KR: 822 case I40E_PHY_TYPE_10GBASE_KX4: 823 case I40E_PHY_TYPE_1000BASE_KX: 824 ethtool_link_ksettings_add_link_mode(ks, supported, 825 40000baseKR4_Full); 826 ethtool_link_ksettings_add_link_mode(ks, supported, 827 25000baseKR_Full); 828 ethtool_link_ksettings_add_link_mode(ks, supported, 829 20000baseKR2_Full); 830 ethtool_link_ksettings_add_link_mode(ks, supported, 831 10000baseKR_Full); 832 ethtool_link_ksettings_add_link_mode(ks, supported, 833 10000baseKX4_Full); 834 ethtool_link_ksettings_add_link_mode(ks, supported, 835 1000baseKX_Full); 836 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 837 ethtool_link_ksettings_add_link_mode(ks, advertising, 838 40000baseKR4_Full); 839 ethtool_link_ksettings_add_link_mode(ks, advertising, 840 25000baseKR_Full); 841 ethtool_link_ksettings_add_link_mode(ks, advertising, 842 20000baseKR2_Full); 843 ethtool_link_ksettings_add_link_mode(ks, advertising, 844 10000baseKR_Full); 845 ethtool_link_ksettings_add_link_mode(ks, advertising, 846 10000baseKX4_Full); 847 ethtool_link_ksettings_add_link_mode(ks, advertising, 848 1000baseKX_Full); 849 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 850 break; 851 case I40E_PHY_TYPE_25GBASE_CR: 852 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 853 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 854 ethtool_link_ksettings_add_link_mode(ks, supported, 855 25000baseCR_Full); 856 ethtool_link_ksettings_add_link_mode(ks, advertising, 857 25000baseCR_Full); 858 break; 859 case I40E_PHY_TYPE_25GBASE_AOC: 860 case I40E_PHY_TYPE_25GBASE_ACC: 861 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 862 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 863 ethtool_link_ksettings_add_link_mode(ks, supported, 864 25000baseCR_Full); 865 866 ethtool_link_ksettings_add_link_mode(ks, advertising, 867 25000baseCR_Full); 868 ethtool_link_ksettings_add_link_mode(ks, supported, 869 10000baseCR_Full); 870 ethtool_link_ksettings_add_link_mode(ks, advertising, 871 10000baseCR_Full); 872 break; 873 default: 874 /* if we got here and link is up something bad is afoot */ 875 netdev_info(netdev, 876 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 877 hw_link_info->phy_type); 878 } 879 880 /* Now that we've worked out everything that could be supported by the 881 * current PHY type, get what is supported by the NVM and intersect 882 * them to get what is truly supported 883 */ 884 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 885 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 886 ethtool_intersect_link_masks(ks, &cap_ksettings); 887 888 /* Set speed and duplex */ 889 switch (link_speed) { 890 case I40E_LINK_SPEED_40GB: 891 ks->base.speed = SPEED_40000; 892 break; 893 case I40E_LINK_SPEED_25GB: 894 ks->base.speed = SPEED_25000; 895 break; 896 case I40E_LINK_SPEED_20GB: 897 ks->base.speed = SPEED_20000; 898 break; 899 case I40E_LINK_SPEED_10GB: 900 ks->base.speed = SPEED_10000; 901 break; 902 case I40E_LINK_SPEED_1GB: 903 ks->base.speed = SPEED_1000; 904 break; 905 case I40E_LINK_SPEED_100MB: 906 ks->base.speed = SPEED_100; 907 break; 908 default: 909 break; 910 } 911 ks->base.duplex = DUPLEX_FULL; 912 } 913 914 /** 915 * i40e_get_settings_link_down - Get the Link settings for when link is down 916 * @hw: hw structure 917 * @ks: ethtool ksettings to fill in 918 * @pf: pointer to physical function struct 919 * 920 * Reports link settings that can be determined when link is down 921 **/ 922 static void i40e_get_settings_link_down(struct i40e_hw *hw, 923 struct ethtool_link_ksettings *ks, 924 struct i40e_pf *pf) 925 { 926 /* link is down and the driver needs to fall back on 927 * supported phy types to figure out what info to display 928 */ 929 i40e_phy_type_to_ethtool(pf, ks); 930 931 /* With no link speed and duplex are unknown */ 932 ks->base.speed = SPEED_UNKNOWN; 933 ks->base.duplex = DUPLEX_UNKNOWN; 934 } 935 936 /** 937 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 938 * @netdev: network interface device structure 939 * @ks: ethtool ksettings 940 * 941 * Reports speed/duplex settings based on media_type 942 **/ 943 static int i40e_get_link_ksettings(struct net_device *netdev, 944 struct ethtool_link_ksettings *ks) 945 { 946 struct i40e_netdev_priv *np = netdev_priv(netdev); 947 struct i40e_pf *pf = np->vsi->back; 948 struct i40e_hw *hw = &pf->hw; 949 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 950 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 951 952 ethtool_link_ksettings_zero_link_mode(ks, supported); 953 ethtool_link_ksettings_zero_link_mode(ks, advertising); 954 955 if (link_up) 956 i40e_get_settings_link_up(hw, ks, netdev, pf); 957 else 958 i40e_get_settings_link_down(hw, ks, pf); 959 960 /* Now set the settings that don't rely on link being up/down */ 961 /* Set autoneg settings */ 962 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 963 AUTONEG_ENABLE : AUTONEG_DISABLE); 964 965 /* Set media type settings */ 966 switch (hw->phy.media_type) { 967 case I40E_MEDIA_TYPE_BACKPLANE: 968 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 969 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 970 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 971 ethtool_link_ksettings_add_link_mode(ks, advertising, 972 Backplane); 973 ks->base.port = PORT_NONE; 974 break; 975 case I40E_MEDIA_TYPE_BASET: 976 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 977 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 978 ks->base.port = PORT_TP; 979 break; 980 case I40E_MEDIA_TYPE_DA: 981 case I40E_MEDIA_TYPE_CX4: 982 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 983 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 984 ks->base.port = PORT_DA; 985 break; 986 case I40E_MEDIA_TYPE_FIBER: 987 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 988 ks->base.port = PORT_FIBRE; 989 break; 990 case I40E_MEDIA_TYPE_UNKNOWN: 991 default: 992 ks->base.port = PORT_OTHER; 993 break; 994 } 995 996 /* Set flow control settings */ 997 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 998 999 switch (hw->fc.requested_mode) { 1000 case I40E_FC_FULL: 1001 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1002 break; 1003 case I40E_FC_TX_PAUSE: 1004 ethtool_link_ksettings_add_link_mode(ks, advertising, 1005 Asym_Pause); 1006 break; 1007 case I40E_FC_RX_PAUSE: 1008 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1009 ethtool_link_ksettings_add_link_mode(ks, advertising, 1010 Asym_Pause); 1011 break; 1012 default: 1013 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1014 ethtool_link_ksettings_del_link_mode(ks, advertising, 1015 Asym_Pause); 1016 break; 1017 } 1018 1019 return 0; 1020 } 1021 1022 /** 1023 * i40e_set_link_ksettings - Set Speed and Duplex 1024 * @netdev: network interface device structure 1025 * @ks: ethtool ksettings 1026 * 1027 * Set speed/duplex per media_types advertised/forced 1028 **/ 1029 static int i40e_set_link_ksettings(struct net_device *netdev, 1030 const struct ethtool_link_ksettings *ks) 1031 { 1032 struct i40e_netdev_priv *np = netdev_priv(netdev); 1033 struct i40e_aq_get_phy_abilities_resp abilities; 1034 struct ethtool_link_ksettings safe_ks; 1035 struct ethtool_link_ksettings copy_ks; 1036 struct i40e_aq_set_phy_config config; 1037 struct i40e_pf *pf = np->vsi->back; 1038 struct i40e_vsi *vsi = np->vsi; 1039 struct i40e_hw *hw = &pf->hw; 1040 bool autoneg_changed = false; 1041 i40e_status status = 0; 1042 int timeout = 50; 1043 int err = 0; 1044 u8 autoneg; 1045 1046 /* Changing port settings is not supported if this isn't the 1047 * port's controlling PF 1048 */ 1049 if (hw->partition_id != 1) { 1050 i40e_partition_setting_complaint(pf); 1051 return -EOPNOTSUPP; 1052 } 1053 if (vsi != pf->vsi[pf->lan_vsi]) 1054 return -EOPNOTSUPP; 1055 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1056 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1057 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1058 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1059 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1060 return -EOPNOTSUPP; 1061 if (hw->device_id == I40E_DEV_ID_KX_B || 1062 hw->device_id == I40E_DEV_ID_KX_C || 1063 hw->device_id == I40E_DEV_ID_20G_KR2 || 1064 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1065 hw->device_id == I40E_DEV_ID_25G_B || 1066 hw->device_id == I40E_DEV_ID_KX_X722) { 1067 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1068 return -EOPNOTSUPP; 1069 } 1070 1071 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1072 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1073 1074 /* save autoneg out of ksettings */ 1075 autoneg = copy_ks.base.autoneg; 1076 1077 /* get our own copy of the bits to check against */ 1078 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1079 safe_ks.base.cmd = copy_ks.base.cmd; 1080 safe_ks.base.link_mode_masks_nwords = 1081 copy_ks.base.link_mode_masks_nwords; 1082 i40e_get_link_ksettings(netdev, &safe_ks); 1083 1084 /* Get link modes supported by hardware and check against modes 1085 * requested by the user. Return an error if unsupported mode was set. 1086 */ 1087 if (!bitmap_subset(copy_ks.link_modes.advertising, 1088 safe_ks.link_modes.supported, 1089 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1090 return -EINVAL; 1091 1092 /* set autoneg back to what it currently is */ 1093 copy_ks.base.autoneg = safe_ks.base.autoneg; 1094 1095 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1096 * trying to set something that we do not support. 1097 */ 1098 if (memcmp(©_ks.base, &safe_ks.base, 1099 sizeof(struct ethtool_link_settings))) 1100 return -EOPNOTSUPP; 1101 1102 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1103 timeout--; 1104 if (!timeout) 1105 return -EBUSY; 1106 usleep_range(1000, 2000); 1107 } 1108 1109 /* Get the current phy config */ 1110 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1111 NULL); 1112 if (status) { 1113 err = -EAGAIN; 1114 goto done; 1115 } 1116 1117 /* Copy abilities to config in case autoneg is not 1118 * set below 1119 */ 1120 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1121 config.abilities = abilities.abilities; 1122 1123 /* Check autoneg */ 1124 if (autoneg == AUTONEG_ENABLE) { 1125 /* If autoneg was not already enabled */ 1126 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1127 /* If autoneg is not supported, return error */ 1128 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1129 supported, 1130 Autoneg)) { 1131 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1132 err = -EINVAL; 1133 goto done; 1134 } 1135 /* Autoneg is allowed to change */ 1136 config.abilities = abilities.abilities | 1137 I40E_AQ_PHY_ENABLE_AN; 1138 autoneg_changed = true; 1139 } 1140 } else { 1141 /* If autoneg is currently enabled */ 1142 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1143 /* If autoneg is supported 10GBASE_T is the only PHY 1144 * that can disable it, so otherwise return error 1145 */ 1146 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1147 supported, 1148 Autoneg) && 1149 hw->phy.link_info.phy_type != 1150 I40E_PHY_TYPE_10GBASE_T) { 1151 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1152 err = -EINVAL; 1153 goto done; 1154 } 1155 /* Autoneg is allowed to change */ 1156 config.abilities = abilities.abilities & 1157 ~I40E_AQ_PHY_ENABLE_AN; 1158 autoneg_changed = true; 1159 } 1160 } 1161 1162 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1163 100baseT_Full)) 1164 config.link_speed |= I40E_LINK_SPEED_100MB; 1165 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1166 1000baseT_Full) || 1167 ethtool_link_ksettings_test_link_mode(ks, advertising, 1168 1000baseX_Full) || 1169 ethtool_link_ksettings_test_link_mode(ks, advertising, 1170 1000baseKX_Full)) 1171 config.link_speed |= I40E_LINK_SPEED_1GB; 1172 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1173 10000baseT_Full) || 1174 ethtool_link_ksettings_test_link_mode(ks, advertising, 1175 10000baseKX4_Full) || 1176 ethtool_link_ksettings_test_link_mode(ks, advertising, 1177 10000baseKR_Full) || 1178 ethtool_link_ksettings_test_link_mode(ks, advertising, 1179 10000baseCR_Full) || 1180 ethtool_link_ksettings_test_link_mode(ks, advertising, 1181 10000baseSR_Full) || 1182 ethtool_link_ksettings_test_link_mode(ks, advertising, 1183 10000baseLR_Full)) 1184 config.link_speed |= I40E_LINK_SPEED_10GB; 1185 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1186 20000baseKR2_Full)) 1187 config.link_speed |= I40E_LINK_SPEED_20GB; 1188 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1189 25000baseCR_Full) || 1190 ethtool_link_ksettings_test_link_mode(ks, advertising, 1191 25000baseKR_Full) || 1192 ethtool_link_ksettings_test_link_mode(ks, advertising, 1193 25000baseSR_Full)) 1194 config.link_speed |= I40E_LINK_SPEED_25GB; 1195 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1196 40000baseKR4_Full) || 1197 ethtool_link_ksettings_test_link_mode(ks, advertising, 1198 40000baseCR4_Full) || 1199 ethtool_link_ksettings_test_link_mode(ks, advertising, 1200 40000baseSR4_Full) || 1201 ethtool_link_ksettings_test_link_mode(ks, advertising, 1202 40000baseLR4_Full)) 1203 config.link_speed |= I40E_LINK_SPEED_40GB; 1204 1205 /* If speed didn't get set, set it to what it currently is. 1206 * This is needed because if advertise is 0 (as it is when autoneg 1207 * is disabled) then speed won't get set. 1208 */ 1209 if (!config.link_speed) 1210 config.link_speed = abilities.link_speed; 1211 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1212 /* copy over the rest of the abilities */ 1213 config.phy_type = abilities.phy_type; 1214 config.phy_type_ext = abilities.phy_type_ext; 1215 config.eee_capability = abilities.eee_capability; 1216 config.eeer = abilities.eeer_val; 1217 config.low_power_ctrl = abilities.d3_lpan; 1218 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1219 I40E_AQ_PHY_FEC_CONFIG_MASK; 1220 1221 /* save the requested speeds */ 1222 hw->phy.link_info.requested_speeds = config.link_speed; 1223 /* set link and auto negotiation so changes take effect */ 1224 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1225 /* If link is up put link down */ 1226 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1227 /* Tell the OS link is going down, the link will go 1228 * back up when fw says it is ready asynchronously 1229 */ 1230 i40e_print_link_message(vsi, false); 1231 netif_carrier_off(netdev); 1232 netif_tx_stop_all_queues(netdev); 1233 } 1234 1235 /* make the aq call */ 1236 status = i40e_aq_set_phy_config(hw, &config, NULL); 1237 if (status) { 1238 netdev_info(netdev, 1239 "Set phy config failed, err %s aq_err %s\n", 1240 i40e_stat_str(hw, status), 1241 i40e_aq_str(hw, hw->aq.asq_last_status)); 1242 err = -EAGAIN; 1243 goto done; 1244 } 1245 1246 status = i40e_update_link_info(hw); 1247 if (status) 1248 netdev_dbg(netdev, 1249 "Updating link info failed with err %s aq_err %s\n", 1250 i40e_stat_str(hw, status), 1251 i40e_aq_str(hw, hw->aq.asq_last_status)); 1252 1253 } else { 1254 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1255 } 1256 1257 done: 1258 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1259 1260 return err; 1261 } 1262 1263 static int i40e_nway_reset(struct net_device *netdev) 1264 { 1265 /* restart autonegotiation */ 1266 struct i40e_netdev_priv *np = netdev_priv(netdev); 1267 struct i40e_pf *pf = np->vsi->back; 1268 struct i40e_hw *hw = &pf->hw; 1269 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1270 i40e_status ret = 0; 1271 1272 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1273 if (ret) { 1274 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1275 i40e_stat_str(hw, ret), 1276 i40e_aq_str(hw, hw->aq.asq_last_status)); 1277 return -EIO; 1278 } 1279 1280 return 0; 1281 } 1282 1283 /** 1284 * i40e_get_pauseparam - Get Flow Control status 1285 * @netdev: netdevice structure 1286 * @pause: buffer to return pause parameters 1287 * 1288 * Return tx/rx-pause status 1289 **/ 1290 static void i40e_get_pauseparam(struct net_device *netdev, 1291 struct ethtool_pauseparam *pause) 1292 { 1293 struct i40e_netdev_priv *np = netdev_priv(netdev); 1294 struct i40e_pf *pf = np->vsi->back; 1295 struct i40e_hw *hw = &pf->hw; 1296 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1297 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1298 1299 pause->autoneg = 1300 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1301 AUTONEG_ENABLE : AUTONEG_DISABLE); 1302 1303 /* PFC enabled so report LFC as off */ 1304 if (dcbx_cfg->pfc.pfcenable) { 1305 pause->rx_pause = 0; 1306 pause->tx_pause = 0; 1307 return; 1308 } 1309 1310 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1311 pause->rx_pause = 1; 1312 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1313 pause->tx_pause = 1; 1314 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1315 pause->rx_pause = 1; 1316 pause->tx_pause = 1; 1317 } 1318 } 1319 1320 /** 1321 * i40e_set_pauseparam - Set Flow Control parameter 1322 * @netdev: network interface device structure 1323 * @pause: return tx/rx flow control status 1324 **/ 1325 static int i40e_set_pauseparam(struct net_device *netdev, 1326 struct ethtool_pauseparam *pause) 1327 { 1328 struct i40e_netdev_priv *np = netdev_priv(netdev); 1329 struct i40e_pf *pf = np->vsi->back; 1330 struct i40e_vsi *vsi = np->vsi; 1331 struct i40e_hw *hw = &pf->hw; 1332 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1333 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1334 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1335 i40e_status status; 1336 u8 aq_failures; 1337 int err = 0; 1338 1339 /* Changing the port's flow control is not supported if this isn't the 1340 * port's controlling PF 1341 */ 1342 if (hw->partition_id != 1) { 1343 i40e_partition_setting_complaint(pf); 1344 return -EOPNOTSUPP; 1345 } 1346 1347 if (vsi != pf->vsi[pf->lan_vsi]) 1348 return -EOPNOTSUPP; 1349 1350 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1351 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 1352 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1353 return -EOPNOTSUPP; 1354 } 1355 1356 /* If we have link and don't have autoneg */ 1357 if (!test_bit(__I40E_DOWN, pf->state) && 1358 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 1359 /* Send message that it might not necessarily work*/ 1360 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1361 } 1362 1363 if (dcbx_cfg->pfc.pfcenable) { 1364 netdev_info(netdev, 1365 "Priority flow control enabled. Cannot set link flow control.\n"); 1366 return -EOPNOTSUPP; 1367 } 1368 1369 if (pause->rx_pause && pause->tx_pause) 1370 hw->fc.requested_mode = I40E_FC_FULL; 1371 else if (pause->rx_pause && !pause->tx_pause) 1372 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1373 else if (!pause->rx_pause && pause->tx_pause) 1374 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1375 else if (!pause->rx_pause && !pause->tx_pause) 1376 hw->fc.requested_mode = I40E_FC_NONE; 1377 else 1378 return -EINVAL; 1379 1380 /* Tell the OS link is going down, the link will go back up when fw 1381 * says it is ready asynchronously 1382 */ 1383 i40e_print_link_message(vsi, false); 1384 netif_carrier_off(netdev); 1385 netif_tx_stop_all_queues(netdev); 1386 1387 /* Set the fc mode and only restart an if link is up*/ 1388 status = i40e_set_fc(hw, &aq_failures, link_up); 1389 1390 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1391 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1392 i40e_stat_str(hw, status), 1393 i40e_aq_str(hw, hw->aq.asq_last_status)); 1394 err = -EAGAIN; 1395 } 1396 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1397 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1398 i40e_stat_str(hw, status), 1399 i40e_aq_str(hw, hw->aq.asq_last_status)); 1400 err = -EAGAIN; 1401 } 1402 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1403 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1404 i40e_stat_str(hw, status), 1405 i40e_aq_str(hw, hw->aq.asq_last_status)); 1406 err = -EAGAIN; 1407 } 1408 1409 if (!test_bit(__I40E_DOWN, pf->state)) { 1410 /* Give it a little more time to try to come back */ 1411 msleep(75); 1412 if (!test_bit(__I40E_DOWN, pf->state)) 1413 return i40e_nway_reset(netdev); 1414 } 1415 1416 return err; 1417 } 1418 1419 static u32 i40e_get_msglevel(struct net_device *netdev) 1420 { 1421 struct i40e_netdev_priv *np = netdev_priv(netdev); 1422 struct i40e_pf *pf = np->vsi->back; 1423 u32 debug_mask = pf->hw.debug_mask; 1424 1425 if (debug_mask) 1426 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1427 1428 return pf->msg_enable; 1429 } 1430 1431 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1432 { 1433 struct i40e_netdev_priv *np = netdev_priv(netdev); 1434 struct i40e_pf *pf = np->vsi->back; 1435 1436 if (I40E_DEBUG_USER & data) 1437 pf->hw.debug_mask = data; 1438 else 1439 pf->msg_enable = data; 1440 } 1441 1442 static int i40e_get_regs_len(struct net_device *netdev) 1443 { 1444 int reg_count = 0; 1445 int i; 1446 1447 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1448 reg_count += i40e_reg_list[i].elements; 1449 1450 return reg_count * sizeof(u32); 1451 } 1452 1453 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1454 void *p) 1455 { 1456 struct i40e_netdev_priv *np = netdev_priv(netdev); 1457 struct i40e_pf *pf = np->vsi->back; 1458 struct i40e_hw *hw = &pf->hw; 1459 u32 *reg_buf = p; 1460 unsigned int i, j, ri; 1461 u32 reg; 1462 1463 /* Tell ethtool which driver-version-specific regs output we have. 1464 * 1465 * At some point, if we have ethtool doing special formatting of 1466 * this data, it will rely on this version number to know how to 1467 * interpret things. Hence, this needs to be updated if/when the 1468 * diags register table is changed. 1469 */ 1470 regs->version = 1; 1471 1472 /* loop through the diags reg table for what to print */ 1473 ri = 0; 1474 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1475 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1476 reg = i40e_reg_list[i].offset 1477 + (j * i40e_reg_list[i].stride); 1478 reg_buf[ri++] = rd32(hw, reg); 1479 } 1480 } 1481 1482 } 1483 1484 static int i40e_get_eeprom(struct net_device *netdev, 1485 struct ethtool_eeprom *eeprom, u8 *bytes) 1486 { 1487 struct i40e_netdev_priv *np = netdev_priv(netdev); 1488 struct i40e_hw *hw = &np->vsi->back->hw; 1489 struct i40e_pf *pf = np->vsi->back; 1490 int ret_val = 0, len, offset; 1491 u8 *eeprom_buff; 1492 u16 i, sectors; 1493 bool last; 1494 u32 magic; 1495 1496 #define I40E_NVM_SECTOR_SIZE 4096 1497 if (eeprom->len == 0) 1498 return -EINVAL; 1499 1500 /* check for NVMUpdate access method */ 1501 magic = hw->vendor_id | (hw->device_id << 16); 1502 if (eeprom->magic && eeprom->magic != magic) { 1503 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1504 int errno = 0; 1505 1506 /* make sure it is the right magic for NVMUpdate */ 1507 if ((eeprom->magic >> 16) != hw->device_id) 1508 errno = -EINVAL; 1509 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1510 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1511 errno = -EBUSY; 1512 else 1513 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1514 1515 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1516 dev_info(&pf->pdev->dev, 1517 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1518 ret_val, hw->aq.asq_last_status, errno, 1519 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1520 cmd->offset, cmd->data_size); 1521 1522 return errno; 1523 } 1524 1525 /* normal ethtool get_eeprom support */ 1526 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1527 1528 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1529 if (!eeprom_buff) 1530 return -ENOMEM; 1531 1532 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1533 if (ret_val) { 1534 dev_info(&pf->pdev->dev, 1535 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1536 ret_val, hw->aq.asq_last_status); 1537 goto free_buff; 1538 } 1539 1540 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1541 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1542 len = I40E_NVM_SECTOR_SIZE; 1543 last = false; 1544 for (i = 0; i < sectors; i++) { 1545 if (i == (sectors - 1)) { 1546 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1547 last = true; 1548 } 1549 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1550 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1551 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1552 last, NULL); 1553 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1554 dev_info(&pf->pdev->dev, 1555 "read NVM failed, invalid offset 0x%x\n", 1556 offset); 1557 break; 1558 } else if (ret_val && 1559 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1560 dev_info(&pf->pdev->dev, 1561 "read NVM failed, access, offset 0x%x\n", 1562 offset); 1563 break; 1564 } else if (ret_val) { 1565 dev_info(&pf->pdev->dev, 1566 "read NVM failed offset %d err=%d status=0x%x\n", 1567 offset, ret_val, hw->aq.asq_last_status); 1568 break; 1569 } 1570 } 1571 1572 i40e_release_nvm(hw); 1573 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1574 free_buff: 1575 kfree(eeprom_buff); 1576 return ret_val; 1577 } 1578 1579 static int i40e_get_eeprom_len(struct net_device *netdev) 1580 { 1581 struct i40e_netdev_priv *np = netdev_priv(netdev); 1582 struct i40e_hw *hw = &np->vsi->back->hw; 1583 u32 val; 1584 1585 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1586 if (hw->mac.type == I40E_MAC_X722) { 1587 val = X722_EEPROM_SCOPE_LIMIT + 1; 1588 return val; 1589 } 1590 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1591 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1592 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1593 /* register returns value in power of 2, 64Kbyte chunks. */ 1594 val = (64 * 1024) * BIT(val); 1595 return val; 1596 } 1597 1598 static int i40e_set_eeprom(struct net_device *netdev, 1599 struct ethtool_eeprom *eeprom, u8 *bytes) 1600 { 1601 struct i40e_netdev_priv *np = netdev_priv(netdev); 1602 struct i40e_hw *hw = &np->vsi->back->hw; 1603 struct i40e_pf *pf = np->vsi->back; 1604 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1605 int ret_val = 0; 1606 int errno = 0; 1607 u32 magic; 1608 1609 /* normal ethtool set_eeprom is not supported */ 1610 magic = hw->vendor_id | (hw->device_id << 16); 1611 if (eeprom->magic == magic) 1612 errno = -EOPNOTSUPP; 1613 /* check for NVMUpdate access method */ 1614 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1615 errno = -EINVAL; 1616 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1617 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1618 errno = -EBUSY; 1619 else 1620 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1621 1622 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1623 dev_info(&pf->pdev->dev, 1624 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1625 ret_val, hw->aq.asq_last_status, errno, 1626 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1627 cmd->offset, cmd->data_size); 1628 1629 return errno; 1630 } 1631 1632 static void i40e_get_drvinfo(struct net_device *netdev, 1633 struct ethtool_drvinfo *drvinfo) 1634 { 1635 struct i40e_netdev_priv *np = netdev_priv(netdev); 1636 struct i40e_vsi *vsi = np->vsi; 1637 struct i40e_pf *pf = vsi->back; 1638 1639 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1640 strlcpy(drvinfo->version, i40e_driver_version_str, 1641 sizeof(drvinfo->version)); 1642 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1643 sizeof(drvinfo->fw_version)); 1644 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1645 sizeof(drvinfo->bus_info)); 1646 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1647 if (pf->hw.pf_id == 0) 1648 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1649 } 1650 1651 static void i40e_get_ringparam(struct net_device *netdev, 1652 struct ethtool_ringparam *ring) 1653 { 1654 struct i40e_netdev_priv *np = netdev_priv(netdev); 1655 struct i40e_pf *pf = np->vsi->back; 1656 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1657 1658 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1659 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1660 ring->rx_mini_max_pending = 0; 1661 ring->rx_jumbo_max_pending = 0; 1662 ring->rx_pending = vsi->rx_rings[0]->count; 1663 ring->tx_pending = vsi->tx_rings[0]->count; 1664 ring->rx_mini_pending = 0; 1665 ring->rx_jumbo_pending = 0; 1666 } 1667 1668 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1669 { 1670 if (i40e_enabled_xdp_vsi(vsi)) { 1671 return index < vsi->num_queue_pairs || 1672 (index >= vsi->alloc_queue_pairs && 1673 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1674 } 1675 1676 return index < vsi->num_queue_pairs; 1677 } 1678 1679 static int i40e_set_ringparam(struct net_device *netdev, 1680 struct ethtool_ringparam *ring) 1681 { 1682 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1683 struct i40e_netdev_priv *np = netdev_priv(netdev); 1684 struct i40e_hw *hw = &np->vsi->back->hw; 1685 struct i40e_vsi *vsi = np->vsi; 1686 struct i40e_pf *pf = vsi->back; 1687 u32 new_rx_count, new_tx_count; 1688 u16 tx_alloc_queue_pairs; 1689 int timeout = 50; 1690 int i, err = 0; 1691 1692 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1693 return -EINVAL; 1694 1695 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1696 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1697 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1698 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1699 netdev_info(netdev, 1700 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1701 ring->tx_pending, ring->rx_pending, 1702 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1703 return -EINVAL; 1704 } 1705 1706 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1707 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1708 1709 /* if nothing to do return success */ 1710 if ((new_tx_count == vsi->tx_rings[0]->count) && 1711 (new_rx_count == vsi->rx_rings[0]->count)) 1712 return 0; 1713 1714 /* If there is a AF_XDP UMEM attached to any of Rx rings, 1715 * disallow changing the number of descriptors -- regardless 1716 * if the netdev is running or not. 1717 */ 1718 if (i40e_xsk_any_rx_ring_enabled(vsi)) 1719 return -EBUSY; 1720 1721 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1722 timeout--; 1723 if (!timeout) 1724 return -EBUSY; 1725 usleep_range(1000, 2000); 1726 } 1727 1728 if (!netif_running(vsi->netdev)) { 1729 /* simple case - set for the next time the netdev is started */ 1730 for (i = 0; i < vsi->num_queue_pairs; i++) { 1731 vsi->tx_rings[i]->count = new_tx_count; 1732 vsi->rx_rings[i]->count = new_rx_count; 1733 if (i40e_enabled_xdp_vsi(vsi)) 1734 vsi->xdp_rings[i]->count = new_tx_count; 1735 } 1736 goto done; 1737 } 1738 1739 /* We can't just free everything and then setup again, 1740 * because the ISRs in MSI-X mode get passed pointers 1741 * to the Tx and Rx ring structs. 1742 */ 1743 1744 /* alloc updated Tx and XDP Tx resources */ 1745 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1746 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1747 if (new_tx_count != vsi->tx_rings[0]->count) { 1748 netdev_info(netdev, 1749 "Changing Tx descriptor count from %d to %d.\n", 1750 vsi->tx_rings[0]->count, new_tx_count); 1751 tx_rings = kcalloc(tx_alloc_queue_pairs, 1752 sizeof(struct i40e_ring), GFP_KERNEL); 1753 if (!tx_rings) { 1754 err = -ENOMEM; 1755 goto done; 1756 } 1757 1758 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1759 if (!i40e_active_tx_ring_index(vsi, i)) 1760 continue; 1761 1762 tx_rings[i] = *vsi->tx_rings[i]; 1763 tx_rings[i].count = new_tx_count; 1764 /* the desc and bi pointers will be reallocated in the 1765 * setup call 1766 */ 1767 tx_rings[i].desc = NULL; 1768 tx_rings[i].rx_bi = NULL; 1769 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1770 if (err) { 1771 while (i) { 1772 i--; 1773 if (!i40e_active_tx_ring_index(vsi, i)) 1774 continue; 1775 i40e_free_tx_resources(&tx_rings[i]); 1776 } 1777 kfree(tx_rings); 1778 tx_rings = NULL; 1779 1780 goto done; 1781 } 1782 } 1783 } 1784 1785 /* alloc updated Rx resources */ 1786 if (new_rx_count != vsi->rx_rings[0]->count) { 1787 netdev_info(netdev, 1788 "Changing Rx descriptor count from %d to %d\n", 1789 vsi->rx_rings[0]->count, new_rx_count); 1790 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1791 sizeof(struct i40e_ring), GFP_KERNEL); 1792 if (!rx_rings) { 1793 err = -ENOMEM; 1794 goto free_tx; 1795 } 1796 1797 for (i = 0; i < vsi->num_queue_pairs; i++) { 1798 u16 unused; 1799 1800 /* clone ring and setup updated count */ 1801 rx_rings[i] = *vsi->rx_rings[i]; 1802 rx_rings[i].count = new_rx_count; 1803 /* the desc and bi pointers will be reallocated in the 1804 * setup call 1805 */ 1806 rx_rings[i].desc = NULL; 1807 rx_rings[i].rx_bi = NULL; 1808 /* Clear cloned XDP RX-queue info before setup call */ 1809 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 1810 /* this is to allow wr32 to have something to write to 1811 * during early allocation of Rx buffers 1812 */ 1813 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1814 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1815 if (err) 1816 goto rx_unwind; 1817 1818 /* now allocate the Rx buffers to make sure the OS 1819 * has enough memory, any failure here means abort 1820 */ 1821 unused = I40E_DESC_UNUSED(&rx_rings[i]); 1822 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 1823 rx_unwind: 1824 if (err) { 1825 do { 1826 i40e_free_rx_resources(&rx_rings[i]); 1827 } while (i--); 1828 kfree(rx_rings); 1829 rx_rings = NULL; 1830 1831 goto free_tx; 1832 } 1833 } 1834 } 1835 1836 /* Bring interface down, copy in the new ring info, 1837 * then restore the interface 1838 */ 1839 i40e_down(vsi); 1840 1841 if (tx_rings) { 1842 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1843 if (i40e_active_tx_ring_index(vsi, i)) { 1844 i40e_free_tx_resources(vsi->tx_rings[i]); 1845 *vsi->tx_rings[i] = tx_rings[i]; 1846 } 1847 } 1848 kfree(tx_rings); 1849 tx_rings = NULL; 1850 } 1851 1852 if (rx_rings) { 1853 for (i = 0; i < vsi->num_queue_pairs; i++) { 1854 i40e_free_rx_resources(vsi->rx_rings[i]); 1855 /* get the real tail offset */ 1856 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1857 /* this is to fake out the allocation routine 1858 * into thinking it has to realloc everything 1859 * but the recycling logic will let us re-use 1860 * the buffers allocated above 1861 */ 1862 rx_rings[i].next_to_use = 0; 1863 rx_rings[i].next_to_clean = 0; 1864 rx_rings[i].next_to_alloc = 0; 1865 /* do a struct copy */ 1866 *vsi->rx_rings[i] = rx_rings[i]; 1867 } 1868 kfree(rx_rings); 1869 rx_rings = NULL; 1870 } 1871 1872 i40e_up(vsi); 1873 1874 free_tx: 1875 /* error cleanup if the Rx allocations failed after getting Tx */ 1876 if (tx_rings) { 1877 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1878 if (i40e_active_tx_ring_index(vsi, i)) 1879 i40e_free_tx_resources(vsi->tx_rings[i]); 1880 } 1881 kfree(tx_rings); 1882 tx_rings = NULL; 1883 } 1884 1885 done: 1886 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1887 1888 return err; 1889 } 1890 1891 /** 1892 * i40e_get_stats_count - return the stats count for a device 1893 * @netdev: the netdev to return the count for 1894 * 1895 * Returns the total number of statistics for this netdev. Note that even 1896 * though this is a function, it is required that the count for a specific 1897 * netdev must never change. Basing the count on static values such as the 1898 * maximum number of queues or the device type is ok. However, the API for 1899 * obtaining stats is *not* safe against changes based on non-static 1900 * values such as the *current* number of queues, or runtime flags. 1901 * 1902 * If a statistic is not always enabled, return it as part of the count 1903 * anyways, always return its string, and report its value as zero. 1904 **/ 1905 static int i40e_get_stats_count(struct net_device *netdev) 1906 { 1907 struct i40e_netdev_priv *np = netdev_priv(netdev); 1908 struct i40e_vsi *vsi = np->vsi; 1909 struct i40e_pf *pf = vsi->back; 1910 int stats_len; 1911 1912 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 1913 stats_len = I40E_PF_STATS_LEN; 1914 else 1915 stats_len = I40E_VSI_STATS_LEN; 1916 1917 /* The number of stats reported for a given net_device must remain 1918 * constant throughout the life of that device. 1919 * 1920 * This is because the API for obtaining the size, strings, and stats 1921 * is spread out over three separate ethtool ioctls. There is no safe 1922 * way to lock the number of stats across these calls, so we must 1923 * assume that they will never change. 1924 * 1925 * Due to this, we report the maximum number of queues, even if not 1926 * every queue is currently configured. Since we always allocate 1927 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 1928 * works because the num_tx_queues is set at device creation and never 1929 * changes. 1930 */ 1931 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 1932 1933 return stats_len; 1934 } 1935 1936 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1937 { 1938 struct i40e_netdev_priv *np = netdev_priv(netdev); 1939 struct i40e_vsi *vsi = np->vsi; 1940 struct i40e_pf *pf = vsi->back; 1941 1942 switch (sset) { 1943 case ETH_SS_TEST: 1944 return I40E_TEST_LEN; 1945 case ETH_SS_STATS: 1946 return i40e_get_stats_count(netdev); 1947 case ETH_SS_PRIV_FLAGS: 1948 return I40E_PRIV_FLAGS_STR_LEN + 1949 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1950 default: 1951 return -EOPNOTSUPP; 1952 } 1953 } 1954 1955 /** 1956 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 1957 * @pf: the PF device structure 1958 * @i: the priority value to copy 1959 * 1960 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 1961 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 1962 * of the PFC stats for the given priority. 1963 **/ 1964 static inline struct i40e_pfc_stats 1965 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 1966 { 1967 #define I40E_GET_PFC_STAT(stat, priority) \ 1968 .stat = pf->stats.stat[priority] 1969 1970 struct i40e_pfc_stats pfc = { 1971 I40E_GET_PFC_STAT(priority_xon_rx, i), 1972 I40E_GET_PFC_STAT(priority_xoff_rx, i), 1973 I40E_GET_PFC_STAT(priority_xon_tx, i), 1974 I40E_GET_PFC_STAT(priority_xoff_tx, i), 1975 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 1976 }; 1977 return pfc; 1978 } 1979 1980 /** 1981 * i40e_get_ethtool_stats - copy stat values into supplied buffer 1982 * @netdev: the netdev to collect stats for 1983 * @stats: ethtool stats command structure 1984 * @data: ethtool supplied buffer 1985 * 1986 * Copy the stats values for this netdev into the buffer. Expects data to be 1987 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 1988 * statistics must be copied in a static order, and the count must not change 1989 * for a given netdev. See i40e_get_stats_count for more details. 1990 * 1991 * If a statistic is not currently valid (such as a disabled queue), this 1992 * function reports its value as zero. 1993 **/ 1994 static void i40e_get_ethtool_stats(struct net_device *netdev, 1995 struct ethtool_stats *stats, u64 *data) 1996 { 1997 struct i40e_netdev_priv *np = netdev_priv(netdev); 1998 struct i40e_vsi *vsi = np->vsi; 1999 struct i40e_pf *pf = vsi->back; 2000 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 2001 unsigned int i; 2002 bool veb_stats; 2003 u64 *p = data; 2004 2005 i40e_update_stats(vsi); 2006 2007 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2008 i40e_gstrings_net_stats); 2009 2010 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2011 2012 rcu_read_lock(); 2013 for (i = 0; i < netdev->num_tx_queues; i++) { 2014 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2015 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2016 } 2017 rcu_read_unlock(); 2018 2019 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2020 goto check_data_pointer; 2021 2022 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 2023 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 2024 2025 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2026 * we initialize stats to zero and update the data pointer 2027 * intelligently 2028 */ 2029 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2030 i40e_gstrings_veb_stats); 2031 2032 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2033 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2034 i40e_gstrings_veb_tc_stats); 2035 2036 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2037 2038 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2039 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2040 2041 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2042 } 2043 2044 check_data_pointer: 2045 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2046 "ethtool stats count mismatch!"); 2047 } 2048 2049 /** 2050 * i40e_get_stat_strings - copy stat strings into supplied buffer 2051 * @netdev: the netdev to collect strings for 2052 * @data: supplied buffer to copy strings into 2053 * 2054 * Copy the strings related to stats for this netdev. Expects data to be 2055 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2056 * strings must be copied in a static order and the total count must not 2057 * change for a given netdev. See i40e_get_stats_count for more details. 2058 **/ 2059 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2060 { 2061 struct i40e_netdev_priv *np = netdev_priv(netdev); 2062 struct i40e_vsi *vsi = np->vsi; 2063 struct i40e_pf *pf = vsi->back; 2064 unsigned int i; 2065 u8 *p = data; 2066 2067 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2068 2069 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2070 2071 for (i = 0; i < netdev->num_tx_queues; i++) { 2072 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2073 "tx", i); 2074 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2075 "rx", i); 2076 } 2077 2078 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 2079 return; 2080 2081 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2082 2083 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2084 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2085 2086 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2087 2088 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2089 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2090 2091 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2092 "stat strings count mismatch!"); 2093 } 2094 2095 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2096 { 2097 struct i40e_netdev_priv *np = netdev_priv(netdev); 2098 struct i40e_vsi *vsi = np->vsi; 2099 struct i40e_pf *pf = vsi->back; 2100 char *p = (char *)data; 2101 unsigned int i; 2102 2103 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 2104 snprintf(p, ETH_GSTRING_LEN, "%s", 2105 i40e_gstrings_priv_flags[i].flag_string); 2106 p += ETH_GSTRING_LEN; 2107 } 2108 if (pf->hw.pf_id != 0) 2109 return; 2110 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 2111 snprintf(p, ETH_GSTRING_LEN, "%s", 2112 i40e_gl_gstrings_priv_flags[i].flag_string); 2113 p += ETH_GSTRING_LEN; 2114 } 2115 } 2116 2117 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2118 u8 *data) 2119 { 2120 switch (stringset) { 2121 case ETH_SS_TEST: 2122 memcpy(data, i40e_gstrings_test, 2123 I40E_TEST_LEN * ETH_GSTRING_LEN); 2124 break; 2125 case ETH_SS_STATS: 2126 i40e_get_stat_strings(netdev, data); 2127 break; 2128 case ETH_SS_PRIV_FLAGS: 2129 i40e_get_priv_flag_strings(netdev, data); 2130 break; 2131 default: 2132 break; 2133 } 2134 } 2135 2136 static int i40e_get_ts_info(struct net_device *dev, 2137 struct ethtool_ts_info *info) 2138 { 2139 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2140 2141 /* only report HW timestamping if PTP is enabled */ 2142 if (!(pf->flags & I40E_FLAG_PTP)) 2143 return ethtool_op_get_ts_info(dev, info); 2144 2145 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2146 SOF_TIMESTAMPING_RX_SOFTWARE | 2147 SOF_TIMESTAMPING_SOFTWARE | 2148 SOF_TIMESTAMPING_TX_HARDWARE | 2149 SOF_TIMESTAMPING_RX_HARDWARE | 2150 SOF_TIMESTAMPING_RAW_HARDWARE; 2151 2152 if (pf->ptp_clock) 2153 info->phc_index = ptp_clock_index(pf->ptp_clock); 2154 else 2155 info->phc_index = -1; 2156 2157 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2158 2159 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2160 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2161 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2162 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2163 2164 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 2165 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2166 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2167 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2168 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2169 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2170 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2171 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2172 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2173 2174 return 0; 2175 } 2176 2177 static int i40e_link_test(struct net_device *netdev, u64 *data) 2178 { 2179 struct i40e_netdev_priv *np = netdev_priv(netdev); 2180 struct i40e_pf *pf = np->vsi->back; 2181 i40e_status status; 2182 bool link_up = false; 2183 2184 netif_info(pf, hw, netdev, "link test\n"); 2185 status = i40e_get_link_status(&pf->hw, &link_up); 2186 if (status) { 2187 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2188 *data = 1; 2189 return *data; 2190 } 2191 2192 if (link_up) 2193 *data = 0; 2194 else 2195 *data = 1; 2196 2197 return *data; 2198 } 2199 2200 static int i40e_reg_test(struct net_device *netdev, u64 *data) 2201 { 2202 struct i40e_netdev_priv *np = netdev_priv(netdev); 2203 struct i40e_pf *pf = np->vsi->back; 2204 2205 netif_info(pf, hw, netdev, "register test\n"); 2206 *data = i40e_diag_reg_test(&pf->hw); 2207 2208 return *data; 2209 } 2210 2211 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 2212 { 2213 struct i40e_netdev_priv *np = netdev_priv(netdev); 2214 struct i40e_pf *pf = np->vsi->back; 2215 2216 netif_info(pf, hw, netdev, "eeprom test\n"); 2217 *data = i40e_diag_eeprom_test(&pf->hw); 2218 2219 /* forcebly clear the NVM Update state machine */ 2220 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2221 2222 return *data; 2223 } 2224 2225 static int i40e_intr_test(struct net_device *netdev, u64 *data) 2226 { 2227 struct i40e_netdev_priv *np = netdev_priv(netdev); 2228 struct i40e_pf *pf = np->vsi->back; 2229 u16 swc_old = pf->sw_int_count; 2230 2231 netif_info(pf, hw, netdev, "interrupt test\n"); 2232 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2233 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2234 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2235 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2236 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2237 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2238 usleep_range(1000, 2000); 2239 *data = (swc_old == pf->sw_int_count); 2240 2241 return *data; 2242 } 2243 2244 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2245 { 2246 struct i40e_vf *vfs = pf->vf; 2247 int i; 2248 2249 for (i = 0; i < pf->num_alloc_vfs; i++) 2250 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2251 return true; 2252 return false; 2253 } 2254 2255 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2256 { 2257 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2258 } 2259 2260 static void i40e_diag_test(struct net_device *netdev, 2261 struct ethtool_test *eth_test, u64 *data) 2262 { 2263 struct i40e_netdev_priv *np = netdev_priv(netdev); 2264 bool if_running = netif_running(netdev); 2265 struct i40e_pf *pf = np->vsi->back; 2266 2267 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2268 /* Offline tests */ 2269 netif_info(pf, drv, netdev, "offline testing starting\n"); 2270 2271 set_bit(__I40E_TESTING, pf->state); 2272 2273 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2274 dev_warn(&pf->pdev->dev, 2275 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2276 data[I40E_ETH_TEST_REG] = 1; 2277 data[I40E_ETH_TEST_EEPROM] = 1; 2278 data[I40E_ETH_TEST_INTR] = 1; 2279 data[I40E_ETH_TEST_LINK] = 1; 2280 eth_test->flags |= ETH_TEST_FL_FAILED; 2281 clear_bit(__I40E_TESTING, pf->state); 2282 goto skip_ol_tests; 2283 } 2284 2285 /* If the device is online then take it offline */ 2286 if (if_running) 2287 /* indicate we're in test mode */ 2288 i40e_close(netdev); 2289 else 2290 /* This reset does not affect link - if it is 2291 * changed to a type of reset that does affect 2292 * link then the following link test would have 2293 * to be moved to before the reset 2294 */ 2295 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2296 2297 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2298 eth_test->flags |= ETH_TEST_FL_FAILED; 2299 2300 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2301 eth_test->flags |= ETH_TEST_FL_FAILED; 2302 2303 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2304 eth_test->flags |= ETH_TEST_FL_FAILED; 2305 2306 /* run reg test last, a reset is required after it */ 2307 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2308 eth_test->flags |= ETH_TEST_FL_FAILED; 2309 2310 clear_bit(__I40E_TESTING, pf->state); 2311 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2312 2313 if (if_running) 2314 i40e_open(netdev); 2315 } else { 2316 /* Online tests */ 2317 netif_info(pf, drv, netdev, "online testing starting\n"); 2318 2319 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2320 eth_test->flags |= ETH_TEST_FL_FAILED; 2321 2322 /* Offline only tests, not run in online; pass by default */ 2323 data[I40E_ETH_TEST_REG] = 0; 2324 data[I40E_ETH_TEST_EEPROM] = 0; 2325 data[I40E_ETH_TEST_INTR] = 0; 2326 } 2327 2328 skip_ol_tests: 2329 2330 netif_info(pf, drv, netdev, "testing finished\n"); 2331 } 2332 2333 static void i40e_get_wol(struct net_device *netdev, 2334 struct ethtool_wolinfo *wol) 2335 { 2336 struct i40e_netdev_priv *np = netdev_priv(netdev); 2337 struct i40e_pf *pf = np->vsi->back; 2338 struct i40e_hw *hw = &pf->hw; 2339 u16 wol_nvm_bits; 2340 2341 /* NVM bit on means WoL disabled for the port */ 2342 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2343 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2344 wol->supported = 0; 2345 wol->wolopts = 0; 2346 } else { 2347 wol->supported = WAKE_MAGIC; 2348 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2349 } 2350 } 2351 2352 /** 2353 * i40e_set_wol - set the WakeOnLAN configuration 2354 * @netdev: the netdev in question 2355 * @wol: the ethtool WoL setting data 2356 **/ 2357 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2358 { 2359 struct i40e_netdev_priv *np = netdev_priv(netdev); 2360 struct i40e_pf *pf = np->vsi->back; 2361 struct i40e_vsi *vsi = np->vsi; 2362 struct i40e_hw *hw = &pf->hw; 2363 u16 wol_nvm_bits; 2364 2365 /* WoL not supported if this isn't the controlling PF on the port */ 2366 if (hw->partition_id != 1) { 2367 i40e_partition_setting_complaint(pf); 2368 return -EOPNOTSUPP; 2369 } 2370 2371 if (vsi != pf->vsi[pf->lan_vsi]) 2372 return -EOPNOTSUPP; 2373 2374 /* NVM bit on means WoL disabled for the port */ 2375 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2376 if (BIT(hw->port) & wol_nvm_bits) 2377 return -EOPNOTSUPP; 2378 2379 /* only magic packet is supported */ 2380 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 2381 return -EOPNOTSUPP; 2382 2383 /* is this a new value? */ 2384 if (pf->wol_en != !!wol->wolopts) { 2385 pf->wol_en = !!wol->wolopts; 2386 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2387 } 2388 2389 return 0; 2390 } 2391 2392 static int i40e_set_phys_id(struct net_device *netdev, 2393 enum ethtool_phys_id_state state) 2394 { 2395 struct i40e_netdev_priv *np = netdev_priv(netdev); 2396 i40e_status ret = 0; 2397 struct i40e_pf *pf = np->vsi->back; 2398 struct i40e_hw *hw = &pf->hw; 2399 int blink_freq = 2; 2400 u16 temp_status; 2401 2402 switch (state) { 2403 case ETHTOOL_ID_ACTIVE: 2404 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2405 pf->led_status = i40e_led_get(hw); 2406 } else { 2407 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2408 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2409 NULL); 2410 ret = i40e_led_get_phy(hw, &temp_status, 2411 &pf->phy_led_val); 2412 pf->led_status = temp_status; 2413 } 2414 return blink_freq; 2415 case ETHTOOL_ID_ON: 2416 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2417 i40e_led_set(hw, 0xf, false); 2418 else 2419 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2420 break; 2421 case ETHTOOL_ID_OFF: 2422 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2423 i40e_led_set(hw, 0x0, false); 2424 else 2425 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2426 break; 2427 case ETHTOOL_ID_INACTIVE: 2428 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2429 i40e_led_set(hw, pf->led_status, false); 2430 } else { 2431 ret = i40e_led_set_phy(hw, false, pf->led_status, 2432 (pf->phy_led_val | 2433 I40E_PHY_LED_MODE_ORIG)); 2434 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2435 i40e_aq_set_phy_debug(hw, 0, NULL); 2436 } 2437 break; 2438 default: 2439 break; 2440 } 2441 if (ret) 2442 return -ENOENT; 2443 else 2444 return 0; 2445 } 2446 2447 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2448 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2449 * 125us (8000 interrupts per second) == ITR(62) 2450 */ 2451 2452 /** 2453 * __i40e_get_coalesce - get per-queue coalesce settings 2454 * @netdev: the netdev to check 2455 * @ec: ethtool coalesce data structure 2456 * @queue: which queue to pick 2457 * 2458 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2459 * are per queue. If queue is <0 then we default to queue 0 as the 2460 * representative value. 2461 **/ 2462 static int __i40e_get_coalesce(struct net_device *netdev, 2463 struct ethtool_coalesce *ec, 2464 int queue) 2465 { 2466 struct i40e_netdev_priv *np = netdev_priv(netdev); 2467 struct i40e_ring *rx_ring, *tx_ring; 2468 struct i40e_vsi *vsi = np->vsi; 2469 2470 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2471 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2472 2473 /* rx and tx usecs has per queue value. If user doesn't specify the 2474 * queue, return queue 0's value to represent. 2475 */ 2476 if (queue < 0) 2477 queue = 0; 2478 else if (queue >= vsi->num_queue_pairs) 2479 return -EINVAL; 2480 2481 rx_ring = vsi->rx_rings[queue]; 2482 tx_ring = vsi->tx_rings[queue]; 2483 2484 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2485 ec->use_adaptive_rx_coalesce = 1; 2486 2487 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2488 ec->use_adaptive_tx_coalesce = 1; 2489 2490 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2491 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2492 2493 /* we use the _usecs_high to store/set the interrupt rate limit 2494 * that the hardware supports, that almost but not quite 2495 * fits the original intent of the ethtool variable, 2496 * the rx_coalesce_usecs_high limits total interrupts 2497 * per second from both tx/rx sources. 2498 */ 2499 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2500 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2501 2502 return 0; 2503 } 2504 2505 /** 2506 * i40e_get_coalesce - get a netdev's coalesce settings 2507 * @netdev: the netdev to check 2508 * @ec: ethtool coalesce data structure 2509 * 2510 * Gets the coalesce settings for a particular netdev. Note that if user has 2511 * modified per-queue settings, this only guarantees to represent queue 0. See 2512 * __i40e_get_coalesce for more details. 2513 **/ 2514 static int i40e_get_coalesce(struct net_device *netdev, 2515 struct ethtool_coalesce *ec) 2516 { 2517 return __i40e_get_coalesce(netdev, ec, -1); 2518 } 2519 2520 /** 2521 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2522 * @netdev: netdev structure 2523 * @ec: ethtool's coalesce settings 2524 * @queue: the particular queue to read 2525 * 2526 * Will read a specific queue's coalesce settings 2527 **/ 2528 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2529 struct ethtool_coalesce *ec) 2530 { 2531 return __i40e_get_coalesce(netdev, ec, queue); 2532 } 2533 2534 /** 2535 * i40e_set_itr_per_queue - set ITR values for specific queue 2536 * @vsi: the VSI to set values for 2537 * @ec: coalesce settings from ethtool 2538 * @queue: the queue to modify 2539 * 2540 * Change the ITR settings for a specific queue. 2541 **/ 2542 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2543 struct ethtool_coalesce *ec, 2544 int queue) 2545 { 2546 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2547 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2548 struct i40e_pf *pf = vsi->back; 2549 struct i40e_hw *hw = &pf->hw; 2550 struct i40e_q_vector *q_vector; 2551 u16 intrl; 2552 2553 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2554 2555 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2556 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2557 2558 if (ec->use_adaptive_rx_coalesce) 2559 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2560 else 2561 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2562 2563 if (ec->use_adaptive_tx_coalesce) 2564 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2565 else 2566 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2567 2568 q_vector = rx_ring->q_vector; 2569 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2570 2571 q_vector = tx_ring->q_vector; 2572 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2573 2574 /* The interrupt handler itself will take care of programming 2575 * the Tx and Rx ITR values based on the values we have entered 2576 * into the q_vector, no need to write the values now. 2577 */ 2578 2579 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2580 i40e_flush(hw); 2581 } 2582 2583 /** 2584 * __i40e_set_coalesce - set coalesce settings for particular queue 2585 * @netdev: the netdev to change 2586 * @ec: ethtool coalesce settings 2587 * @queue: the queue to change 2588 * 2589 * Sets the coalesce settings for a particular queue. 2590 **/ 2591 static int __i40e_set_coalesce(struct net_device *netdev, 2592 struct ethtool_coalesce *ec, 2593 int queue) 2594 { 2595 struct i40e_netdev_priv *np = netdev_priv(netdev); 2596 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2597 struct i40e_vsi *vsi = np->vsi; 2598 struct i40e_pf *pf = vsi->back; 2599 int i; 2600 2601 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2602 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2603 2604 if (queue < 0) { 2605 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2606 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2607 } else if (queue < vsi->num_queue_pairs) { 2608 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2609 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2610 } else { 2611 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2612 vsi->num_queue_pairs - 1); 2613 return -EINVAL; 2614 } 2615 2616 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2617 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2618 2619 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2620 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2621 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2622 return -EINVAL; 2623 } 2624 2625 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2626 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2627 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2628 return -EINVAL; 2629 } 2630 2631 if (ec->rx_coalesce_usecs != cur_rx_itr && 2632 ec->use_adaptive_rx_coalesce) { 2633 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2634 return -EINVAL; 2635 } 2636 2637 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2638 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2639 return -EINVAL; 2640 } 2641 2642 if (ec->tx_coalesce_usecs != cur_tx_itr && 2643 ec->use_adaptive_tx_coalesce) { 2644 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2645 return -EINVAL; 2646 } 2647 2648 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2649 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2650 return -EINVAL; 2651 } 2652 2653 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2654 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2655 2656 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2657 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2658 2659 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2660 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2661 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2662 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2663 vsi->int_rate_limit); 2664 } 2665 2666 /* rx and tx usecs has per queue value. If user doesn't specify the 2667 * queue, apply to all queues. 2668 */ 2669 if (queue < 0) { 2670 for (i = 0; i < vsi->num_queue_pairs; i++) 2671 i40e_set_itr_per_queue(vsi, ec, i); 2672 } else { 2673 i40e_set_itr_per_queue(vsi, ec, queue); 2674 } 2675 2676 return 0; 2677 } 2678 2679 /** 2680 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2681 * @netdev: the netdev to change 2682 * @ec: ethtool coalesce settings 2683 * 2684 * This will set each queue to the same coalesce settings. 2685 **/ 2686 static int i40e_set_coalesce(struct net_device *netdev, 2687 struct ethtool_coalesce *ec) 2688 { 2689 return __i40e_set_coalesce(netdev, ec, -1); 2690 } 2691 2692 /** 2693 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2694 * @netdev: the netdev to change 2695 * @ec: ethtool's coalesce settings 2696 * @queue: the queue to change 2697 * 2698 * Sets the specified queue's coalesce settings. 2699 **/ 2700 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2701 struct ethtool_coalesce *ec) 2702 { 2703 return __i40e_set_coalesce(netdev, ec, queue); 2704 } 2705 2706 /** 2707 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2708 * @pf: pointer to the physical function struct 2709 * @cmd: ethtool rxnfc command 2710 * 2711 * Returns Success if the flow is supported, else Invalid Input. 2712 **/ 2713 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2714 { 2715 struct i40e_hw *hw = &pf->hw; 2716 u8 flow_pctype = 0; 2717 u64 i_set = 0; 2718 2719 cmd->data = 0; 2720 2721 switch (cmd->flow_type) { 2722 case TCP_V4_FLOW: 2723 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2724 break; 2725 case UDP_V4_FLOW: 2726 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2727 break; 2728 case TCP_V6_FLOW: 2729 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2730 break; 2731 case UDP_V6_FLOW: 2732 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2733 break; 2734 case SCTP_V4_FLOW: 2735 case AH_ESP_V4_FLOW: 2736 case AH_V4_FLOW: 2737 case ESP_V4_FLOW: 2738 case IPV4_FLOW: 2739 case SCTP_V6_FLOW: 2740 case AH_ESP_V6_FLOW: 2741 case AH_V6_FLOW: 2742 case ESP_V6_FLOW: 2743 case IPV6_FLOW: 2744 /* Default is src/dest for IP, no matter the L4 hashing */ 2745 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2746 break; 2747 default: 2748 return -EINVAL; 2749 } 2750 2751 /* Read flow based hash input set register */ 2752 if (flow_pctype) { 2753 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2754 flow_pctype)) | 2755 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2756 flow_pctype)) << 32); 2757 } 2758 2759 /* Process bits of hash input set */ 2760 if (i_set) { 2761 if (i_set & I40E_L4_SRC_MASK) 2762 cmd->data |= RXH_L4_B_0_1; 2763 if (i_set & I40E_L4_DST_MASK) 2764 cmd->data |= RXH_L4_B_2_3; 2765 2766 if (cmd->flow_type == TCP_V4_FLOW || 2767 cmd->flow_type == UDP_V4_FLOW) { 2768 if (i_set & I40E_L3_SRC_MASK) 2769 cmd->data |= RXH_IP_SRC; 2770 if (i_set & I40E_L3_DST_MASK) 2771 cmd->data |= RXH_IP_DST; 2772 } else if (cmd->flow_type == TCP_V6_FLOW || 2773 cmd->flow_type == UDP_V6_FLOW) { 2774 if (i_set & I40E_L3_V6_SRC_MASK) 2775 cmd->data |= RXH_IP_SRC; 2776 if (i_set & I40E_L3_V6_DST_MASK) 2777 cmd->data |= RXH_IP_DST; 2778 } 2779 } 2780 2781 return 0; 2782 } 2783 2784 /** 2785 * i40e_check_mask - Check whether a mask field is set 2786 * @mask: the full mask value 2787 * @field: mask of the field to check 2788 * 2789 * If the given mask is fully set, return positive value. If the mask for the 2790 * field is fully unset, return zero. Otherwise return a negative error code. 2791 **/ 2792 static int i40e_check_mask(u64 mask, u64 field) 2793 { 2794 u64 value = mask & field; 2795 2796 if (value == field) 2797 return 1; 2798 else if (!value) 2799 return 0; 2800 else 2801 return -1; 2802 } 2803 2804 /** 2805 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2806 * @fsp: pointer to rx flow specification 2807 * @data: pointer to userdef data structure for storage 2808 * 2809 * Read the user-defined data and deconstruct the value into a structure. No 2810 * other code should read the user-defined data, so as to ensure that every 2811 * place consistently reads the value correctly. 2812 * 2813 * The user-defined field is a 64bit Big Endian format value, which we 2814 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2815 * be defined starting from the highest bits, while small bit field values 2816 * shall be defined starting from the lowest bits. 2817 * 2818 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2819 * and the filter should be rejected. The data structure will always be 2820 * modified even if FLOW_EXT is not set. 2821 * 2822 **/ 2823 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2824 struct i40e_rx_flow_userdef *data) 2825 { 2826 u64 value, mask; 2827 int valid; 2828 2829 /* Zero memory first so it's always consistent. */ 2830 memset(data, 0, sizeof(*data)); 2831 2832 if (!(fsp->flow_type & FLOW_EXT)) 2833 return 0; 2834 2835 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2836 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2837 2838 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2839 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2840 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2841 2842 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2843 if (valid < 0) { 2844 return -EINVAL; 2845 } else if (valid) { 2846 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2847 data->flex_offset = 2848 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2849 data->flex_filter = true; 2850 } 2851 2852 return 0; 2853 } 2854 2855 /** 2856 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2857 * @fsp: pointer to rx_flow specification 2858 * @data: pointer to return userdef data 2859 * 2860 * Reads the userdef data structure and properly fills in the user defined 2861 * fields of the rx_flow_spec. 2862 **/ 2863 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2864 struct i40e_rx_flow_userdef *data) 2865 { 2866 u64 value = 0, mask = 0; 2867 2868 if (data->flex_filter) { 2869 value |= data->flex_word; 2870 value |= (u64)data->flex_offset << 16; 2871 mask |= I40E_USERDEF_FLEX_FILTER; 2872 } 2873 2874 if (value || mask) 2875 fsp->flow_type |= FLOW_EXT; 2876 2877 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2878 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2879 } 2880 2881 /** 2882 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2883 * @pf: Pointer to the physical function struct 2884 * @cmd: The command to get or set Rx flow classification rules 2885 * @rule_locs: Array of used rule locations 2886 * 2887 * This function populates both the total and actual rule count of 2888 * the ethtool flow classification command 2889 * 2890 * Returns 0 on success or -EMSGSIZE if entry not found 2891 **/ 2892 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2893 struct ethtool_rxnfc *cmd, 2894 u32 *rule_locs) 2895 { 2896 struct i40e_fdir_filter *rule; 2897 struct hlist_node *node2; 2898 int cnt = 0; 2899 2900 /* report total rule count */ 2901 cmd->data = i40e_get_fd_cnt_all(pf); 2902 2903 hlist_for_each_entry_safe(rule, node2, 2904 &pf->fdir_filter_list, fdir_node) { 2905 if (cnt == cmd->rule_cnt) 2906 return -EMSGSIZE; 2907 2908 rule_locs[cnt] = rule->fd_id; 2909 cnt++; 2910 } 2911 2912 cmd->rule_cnt = cnt; 2913 2914 return 0; 2915 } 2916 2917 /** 2918 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2919 * @pf: Pointer to the physical function struct 2920 * @cmd: The command to get or set Rx flow classification rules 2921 * 2922 * This function looks up a filter based on the Rx flow classification 2923 * command and fills the flow spec info for it if found 2924 * 2925 * Returns 0 on success or -EINVAL if filter not found 2926 **/ 2927 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2928 struct ethtool_rxnfc *cmd) 2929 { 2930 struct ethtool_rx_flow_spec *fsp = 2931 (struct ethtool_rx_flow_spec *)&cmd->fs; 2932 struct i40e_rx_flow_userdef userdef = {0}; 2933 struct i40e_fdir_filter *rule = NULL; 2934 struct hlist_node *node2; 2935 u64 input_set; 2936 u16 index; 2937 2938 hlist_for_each_entry_safe(rule, node2, 2939 &pf->fdir_filter_list, fdir_node) { 2940 if (fsp->location <= rule->fd_id) 2941 break; 2942 } 2943 2944 if (!rule || fsp->location != rule->fd_id) 2945 return -EINVAL; 2946 2947 fsp->flow_type = rule->flow_type; 2948 if (fsp->flow_type == IP_USER_FLOW) { 2949 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2950 fsp->h_u.usr_ip4_spec.proto = 0; 2951 fsp->m_u.usr_ip4_spec.proto = 0; 2952 } 2953 2954 /* Reverse the src and dest notion, since the HW views them from 2955 * Tx perspective where as the user expects it from Rx filter view. 2956 */ 2957 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2958 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2959 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2960 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2961 2962 switch (rule->flow_type) { 2963 case SCTP_V4_FLOW: 2964 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2965 break; 2966 case TCP_V4_FLOW: 2967 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2968 break; 2969 case UDP_V4_FLOW: 2970 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2971 break; 2972 case IP_USER_FLOW: 2973 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2974 break; 2975 default: 2976 /* If we have stored a filter with a flow type not listed here 2977 * it is almost certainly a driver bug. WARN(), and then 2978 * assign the input_set as if all fields are enabled to avoid 2979 * reading unassigned memory. 2980 */ 2981 WARN(1, "Missing input set index for flow_type %d\n", 2982 rule->flow_type); 2983 input_set = 0xFFFFFFFFFFFFFFFFULL; 2984 goto no_input_set; 2985 } 2986 2987 input_set = i40e_read_fd_input_set(pf, index); 2988 2989 no_input_set: 2990 if (input_set & I40E_L3_SRC_MASK) 2991 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 2992 2993 if (input_set & I40E_L3_DST_MASK) 2994 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 2995 2996 if (input_set & I40E_L4_SRC_MASK) 2997 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 2998 2999 if (input_set & I40E_L4_DST_MASK) 3000 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3001 3002 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3003 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3004 else 3005 fsp->ring_cookie = rule->q_index; 3006 3007 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 3008 struct i40e_vsi *vsi; 3009 3010 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3011 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3012 /* VFs are zero-indexed by the driver, but ethtool 3013 * expects them to be one-indexed, so add one here 3014 */ 3015 u64 ring_vf = vsi->vf_id + 1; 3016 3017 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3018 fsp->ring_cookie |= ring_vf; 3019 } 3020 } 3021 3022 if (rule->flex_filter) { 3023 userdef.flex_filter = true; 3024 userdef.flex_word = be16_to_cpu(rule->flex_word); 3025 userdef.flex_offset = rule->flex_offset; 3026 } 3027 3028 i40e_fill_rx_flow_user_data(fsp, &userdef); 3029 3030 return 0; 3031 } 3032 3033 /** 3034 * i40e_get_rxnfc - command to get RX flow classification rules 3035 * @netdev: network interface device structure 3036 * @cmd: ethtool rxnfc command 3037 * @rule_locs: pointer to store rule data 3038 * 3039 * Returns Success if the command is supported. 3040 **/ 3041 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3042 u32 *rule_locs) 3043 { 3044 struct i40e_netdev_priv *np = netdev_priv(netdev); 3045 struct i40e_vsi *vsi = np->vsi; 3046 struct i40e_pf *pf = vsi->back; 3047 int ret = -EOPNOTSUPP; 3048 3049 switch (cmd->cmd) { 3050 case ETHTOOL_GRXRINGS: 3051 cmd->data = vsi->rss_size; 3052 ret = 0; 3053 break; 3054 case ETHTOOL_GRXFH: 3055 ret = i40e_get_rss_hash_opts(pf, cmd); 3056 break; 3057 case ETHTOOL_GRXCLSRLCNT: 3058 cmd->rule_cnt = pf->fdir_pf_active_filters; 3059 /* report total rule count */ 3060 cmd->data = i40e_get_fd_cnt_all(pf); 3061 ret = 0; 3062 break; 3063 case ETHTOOL_GRXCLSRULE: 3064 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3065 break; 3066 case ETHTOOL_GRXCLSRLALL: 3067 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3068 break; 3069 default: 3070 break; 3071 } 3072 3073 return ret; 3074 } 3075 3076 /** 3077 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3078 * @nfc: pointer to user request 3079 * @i_setc: bits currently set 3080 * 3081 * Returns value of bits to be set per user request 3082 **/ 3083 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 3084 { 3085 u64 i_set = i_setc; 3086 u64 src_l3 = 0, dst_l3 = 0; 3087 3088 if (nfc->data & RXH_L4_B_0_1) 3089 i_set |= I40E_L4_SRC_MASK; 3090 else 3091 i_set &= ~I40E_L4_SRC_MASK; 3092 if (nfc->data & RXH_L4_B_2_3) 3093 i_set |= I40E_L4_DST_MASK; 3094 else 3095 i_set &= ~I40E_L4_DST_MASK; 3096 3097 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3098 src_l3 = I40E_L3_V6_SRC_MASK; 3099 dst_l3 = I40E_L3_V6_DST_MASK; 3100 } else if (nfc->flow_type == TCP_V4_FLOW || 3101 nfc->flow_type == UDP_V4_FLOW) { 3102 src_l3 = I40E_L3_SRC_MASK; 3103 dst_l3 = I40E_L3_DST_MASK; 3104 } else { 3105 /* Any other flow type are not supported here */ 3106 return i_set; 3107 } 3108 3109 if (nfc->data & RXH_IP_SRC) 3110 i_set |= src_l3; 3111 else 3112 i_set &= ~src_l3; 3113 if (nfc->data & RXH_IP_DST) 3114 i_set |= dst_l3; 3115 else 3116 i_set &= ~dst_l3; 3117 3118 return i_set; 3119 } 3120 3121 /** 3122 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3123 * @pf: pointer to the physical function struct 3124 * @nfc: ethtool rxnfc command 3125 * 3126 * Returns Success if the flow input set is supported. 3127 **/ 3128 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3129 { 3130 struct i40e_hw *hw = &pf->hw; 3131 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3132 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3133 u8 flow_pctype = 0; 3134 u64 i_set, i_setc; 3135 3136 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3137 dev_err(&pf->pdev->dev, 3138 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3139 return -EOPNOTSUPP; 3140 } 3141 3142 /* RSS does not support anything other than hashing 3143 * to queues on src and dst IPs and ports 3144 */ 3145 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3146 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3147 return -EINVAL; 3148 3149 switch (nfc->flow_type) { 3150 case TCP_V4_FLOW: 3151 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3152 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3153 hena |= 3154 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3155 break; 3156 case TCP_V6_FLOW: 3157 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3158 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3159 hena |= 3160 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 3161 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3162 hena |= 3163 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 3164 break; 3165 case UDP_V4_FLOW: 3166 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3167 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3168 hena |= 3169 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 3170 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 3171 3172 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3173 break; 3174 case UDP_V6_FLOW: 3175 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3176 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 3177 hena |= 3178 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 3179 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 3180 3181 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3182 break; 3183 case AH_ESP_V4_FLOW: 3184 case AH_V4_FLOW: 3185 case ESP_V4_FLOW: 3186 case SCTP_V4_FLOW: 3187 if ((nfc->data & RXH_L4_B_0_1) || 3188 (nfc->data & RXH_L4_B_2_3)) 3189 return -EINVAL; 3190 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3191 break; 3192 case AH_ESP_V6_FLOW: 3193 case AH_V6_FLOW: 3194 case ESP_V6_FLOW: 3195 case SCTP_V6_FLOW: 3196 if ((nfc->data & RXH_L4_B_0_1) || 3197 (nfc->data & RXH_L4_B_2_3)) 3198 return -EINVAL; 3199 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3200 break; 3201 case IPV4_FLOW: 3202 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3203 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3204 break; 3205 case IPV6_FLOW: 3206 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3207 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3208 break; 3209 default: 3210 return -EINVAL; 3211 } 3212 3213 if (flow_pctype) { 3214 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3215 flow_pctype)) | 3216 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3217 flow_pctype)) << 32); 3218 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 3219 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 3220 (u32)i_set); 3221 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 3222 (u32)(i_set >> 32)); 3223 hena |= BIT_ULL(flow_pctype); 3224 } 3225 3226 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3227 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3228 i40e_flush(hw); 3229 3230 return 0; 3231 } 3232 3233 /** 3234 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3235 * @vsi: Pointer to the targeted VSI 3236 * @input: The filter to update or NULL to indicate deletion 3237 * @sw_idx: Software index to the filter 3238 * @cmd: The command to get or set Rx flow classification rules 3239 * 3240 * This function updates (or deletes) a Flow Director entry from 3241 * the hlist of the corresponding PF 3242 * 3243 * Returns 0 on success 3244 **/ 3245 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3246 struct i40e_fdir_filter *input, 3247 u16 sw_idx, 3248 struct ethtool_rxnfc *cmd) 3249 { 3250 struct i40e_fdir_filter *rule, *parent; 3251 struct i40e_pf *pf = vsi->back; 3252 struct hlist_node *node2; 3253 int err = -EINVAL; 3254 3255 parent = NULL; 3256 rule = NULL; 3257 3258 hlist_for_each_entry_safe(rule, node2, 3259 &pf->fdir_filter_list, fdir_node) { 3260 /* hash found, or no matching entry */ 3261 if (rule->fd_id >= sw_idx) 3262 break; 3263 parent = rule; 3264 } 3265 3266 /* if there is an old rule occupying our place remove it */ 3267 if (rule && (rule->fd_id == sw_idx)) { 3268 /* Remove this rule, since we're either deleting it, or 3269 * replacing it. 3270 */ 3271 err = i40e_add_del_fdir(vsi, rule, false); 3272 hlist_del(&rule->fdir_node); 3273 kfree(rule); 3274 pf->fdir_pf_active_filters--; 3275 } 3276 3277 /* If we weren't given an input, this is a delete, so just return the 3278 * error code indicating if there was an entry at the requested slot 3279 */ 3280 if (!input) 3281 return err; 3282 3283 /* Otherwise, install the new rule as requested */ 3284 INIT_HLIST_NODE(&input->fdir_node); 3285 3286 /* add filter to the list */ 3287 if (parent) 3288 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3289 else 3290 hlist_add_head(&input->fdir_node, 3291 &pf->fdir_filter_list); 3292 3293 /* update counts */ 3294 pf->fdir_pf_active_filters++; 3295 3296 return 0; 3297 } 3298 3299 /** 3300 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3301 * @pf: pointer to PF structure 3302 * 3303 * This function searches the list of filters and determines which FLX_PIT 3304 * entries are still required. It will prune any entries which are no longer 3305 * in use after the deletion. 3306 **/ 3307 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3308 { 3309 struct i40e_flex_pit *entry, *tmp; 3310 struct i40e_fdir_filter *rule; 3311 3312 /* First, we'll check the l3 table */ 3313 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3314 bool found = false; 3315 3316 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3317 if (rule->flow_type != IP_USER_FLOW) 3318 continue; 3319 if (rule->flex_filter && 3320 rule->flex_offset == entry->src_offset) { 3321 found = true; 3322 break; 3323 } 3324 } 3325 3326 /* If we didn't find the filter, then we can prune this entry 3327 * from the list. 3328 */ 3329 if (!found) { 3330 list_del(&entry->list); 3331 kfree(entry); 3332 } 3333 } 3334 3335 /* Followed by the L4 table */ 3336 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3337 bool found = false; 3338 3339 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3340 /* Skip this filter if it's L3, since we already 3341 * checked those in the above loop 3342 */ 3343 if (rule->flow_type == IP_USER_FLOW) 3344 continue; 3345 if (rule->flex_filter && 3346 rule->flex_offset == entry->src_offset) { 3347 found = true; 3348 break; 3349 } 3350 } 3351 3352 /* If we didn't find the filter, then we can prune this entry 3353 * from the list. 3354 */ 3355 if (!found) { 3356 list_del(&entry->list); 3357 kfree(entry); 3358 } 3359 } 3360 } 3361 3362 /** 3363 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3364 * @vsi: Pointer to the targeted VSI 3365 * @cmd: The command to get or set Rx flow classification rules 3366 * 3367 * The function removes a Flow Director filter entry from the 3368 * hlist of the corresponding PF 3369 * 3370 * Returns 0 on success 3371 */ 3372 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3373 struct ethtool_rxnfc *cmd) 3374 { 3375 struct ethtool_rx_flow_spec *fsp = 3376 (struct ethtool_rx_flow_spec *)&cmd->fs; 3377 struct i40e_pf *pf = vsi->back; 3378 int ret = 0; 3379 3380 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3381 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3382 return -EBUSY; 3383 3384 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3385 return -EBUSY; 3386 3387 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3388 3389 i40e_prune_flex_pit_list(pf); 3390 3391 i40e_fdir_check_and_reenable(pf); 3392 return ret; 3393 } 3394 3395 /** 3396 * i40e_unused_pit_index - Find an unused PIT index for given list 3397 * @pf: the PF data structure 3398 * 3399 * Find the first unused flexible PIT index entry. We search both the L3 and 3400 * L4 flexible PIT lists so that the returned index is unique and unused by 3401 * either currently programmed L3 or L4 filters. We use a bit field as storage 3402 * to track which indexes are already used. 3403 **/ 3404 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3405 { 3406 unsigned long available_index = 0xFF; 3407 struct i40e_flex_pit *entry; 3408 3409 /* We need to make sure that the new index isn't in use by either L3 3410 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3411 * L4 to use the same index. 3412 */ 3413 3414 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3415 clear_bit(entry->pit_index, &available_index); 3416 3417 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3418 clear_bit(entry->pit_index, &available_index); 3419 3420 return find_first_bit(&available_index, 8); 3421 } 3422 3423 /** 3424 * i40e_find_flex_offset - Find an existing flex src_offset 3425 * @flex_pit_list: L3 or L4 flex PIT list 3426 * @src_offset: new src_offset to find 3427 * 3428 * Searches the flex_pit_list for an existing offset. If no offset is 3429 * currently programmed, then this will return an ERR_PTR if there is no space 3430 * to add a new offset, otherwise it returns NULL. 3431 **/ 3432 static 3433 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3434 u16 src_offset) 3435 { 3436 struct i40e_flex_pit *entry; 3437 int size = 0; 3438 3439 /* Search for the src_offset first. If we find a matching entry 3440 * already programmed, we can simply re-use it. 3441 */ 3442 list_for_each_entry(entry, flex_pit_list, list) { 3443 size++; 3444 if (entry->src_offset == src_offset) 3445 return entry; 3446 } 3447 3448 /* If we haven't found an entry yet, then the provided src offset has 3449 * not yet been programmed. We will program the src offset later on, 3450 * but we need to indicate whether there is enough space to do so 3451 * here. We'll make use of ERR_PTR for this purpose. 3452 */ 3453 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3454 return ERR_PTR(-ENOSPC); 3455 3456 return NULL; 3457 } 3458 3459 /** 3460 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3461 * @flex_pit_list: L3 or L4 flex PIT list 3462 * @src_offset: new src_offset to add 3463 * @pit_index: the PIT index to program 3464 * 3465 * This function programs the new src_offset to the list. It is expected that 3466 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3467 * that this offset is not programmed, and that the list has enough space to 3468 * store another offset. 3469 * 3470 * Returns 0 on success, and negative value on error. 3471 **/ 3472 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3473 u16 src_offset, 3474 u8 pit_index) 3475 { 3476 struct i40e_flex_pit *new_pit, *entry; 3477 3478 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3479 if (!new_pit) 3480 return -ENOMEM; 3481 3482 new_pit->src_offset = src_offset; 3483 new_pit->pit_index = pit_index; 3484 3485 /* We need to insert this item such that the list is sorted by 3486 * src_offset in ascending order. 3487 */ 3488 list_for_each_entry(entry, flex_pit_list, list) { 3489 if (new_pit->src_offset < entry->src_offset) { 3490 list_add_tail(&new_pit->list, &entry->list); 3491 return 0; 3492 } 3493 3494 /* If we found an entry with our offset already programmed we 3495 * can simply return here, after freeing the memory. However, 3496 * if the pit_index does not match we need to report an error. 3497 */ 3498 if (new_pit->src_offset == entry->src_offset) { 3499 int err = 0; 3500 3501 /* If the PIT index is not the same we can't re-use 3502 * the entry, so we must report an error. 3503 */ 3504 if (new_pit->pit_index != entry->pit_index) 3505 err = -EINVAL; 3506 3507 kfree(new_pit); 3508 return err; 3509 } 3510 } 3511 3512 /* If we reached here, then we haven't yet added the item. This means 3513 * that we should add the item at the end of the list. 3514 */ 3515 list_add_tail(&new_pit->list, flex_pit_list); 3516 return 0; 3517 } 3518 3519 /** 3520 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3521 * @pf: Pointer to the PF structure 3522 * @flex_pit_list: list of flexible src offsets in use 3523 * @flex_pit_start: index to first entry for this section of the table 3524 * 3525 * In order to handle flexible data, the hardware uses a table of values 3526 * called the FLX_PIT table. This table is used to indicate which sections of 3527 * the input correspond to what PIT index values. Unfortunately, hardware is 3528 * very restrictive about programming this table. Entries must be ordered by 3529 * src_offset in ascending order, without duplicates. Additionally, unused 3530 * entries must be set to the unused index value, and must have valid size and 3531 * length according to the src_offset ordering. 3532 * 3533 * This function will reprogram the FLX_PIT register from a book-keeping 3534 * structure that we guarantee is already ordered correctly, and has no more 3535 * than 3 entries. 3536 * 3537 * To make things easier, we only support flexible values of one word length, 3538 * rather than allowing variable length flexible values. 3539 **/ 3540 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3541 struct list_head *flex_pit_list, 3542 int flex_pit_start) 3543 { 3544 struct i40e_flex_pit *entry = NULL; 3545 u16 last_offset = 0; 3546 int i = 0, j = 0; 3547 3548 /* First, loop over the list of flex PIT entries, and reprogram the 3549 * registers. 3550 */ 3551 list_for_each_entry(entry, flex_pit_list, list) { 3552 /* We have to be careful when programming values for the 3553 * largest SRC_OFFSET value. It is possible that adding 3554 * additional empty values at the end would overflow the space 3555 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3556 * we check here and add the empty values prior to adding the 3557 * largest value. 3558 * 3559 * To determine this, we will use a loop from i+1 to 3, which 3560 * will determine whether the unused entries would have valid 3561 * SRC_OFFSET. Note that there cannot be extra entries past 3562 * this value, because the only valid values would have been 3563 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3564 * have been added to the list in the first place. 3565 */ 3566 for (j = i + 1; j < 3; j++) { 3567 u16 offset = entry->src_offset + j; 3568 int index = flex_pit_start + i; 3569 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3570 1, 3571 offset - 3); 3572 3573 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3574 i40e_write_rx_ctl(&pf->hw, 3575 I40E_PRTQF_FLX_PIT(index), 3576 value); 3577 i++; 3578 } 3579 } 3580 3581 /* Now, we can program the actual value into the table */ 3582 i40e_write_rx_ctl(&pf->hw, 3583 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3584 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3585 1, 3586 entry->src_offset)); 3587 i++; 3588 } 3589 3590 /* In order to program the last entries in the table, we need to 3591 * determine the valid offset. If the list is empty, we'll just start 3592 * with 0. Otherwise, we'll start with the last item offset and add 1. 3593 * This ensures that all entries have valid sizes. If we don't do this 3594 * correctly, the hardware will disable flexible field parsing. 3595 */ 3596 if (!list_empty(flex_pit_list)) 3597 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3598 3599 for (; i < 3; i++, last_offset++) { 3600 i40e_write_rx_ctl(&pf->hw, 3601 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3602 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3603 1, 3604 last_offset)); 3605 } 3606 } 3607 3608 /** 3609 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3610 * @pf: pointer to the PF structure 3611 * 3612 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3613 * internal helper function for implementation details. 3614 **/ 3615 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3616 { 3617 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3618 I40E_FLEX_PIT_IDX_START_L3); 3619 3620 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3621 I40E_FLEX_PIT_IDX_START_L4); 3622 3623 /* We also need to program the L3 and L4 GLQF ORT register */ 3624 i40e_write_rx_ctl(&pf->hw, 3625 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3626 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3627 3, 1)); 3628 3629 i40e_write_rx_ctl(&pf->hw, 3630 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3631 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3632 3, 1)); 3633 } 3634 3635 /** 3636 * i40e_flow_str - Converts a flow_type into a human readable string 3637 * @fsp: the flow specification 3638 * 3639 * Currently only flow types we support are included here, and the string 3640 * value attempts to match what ethtool would use to configure this flow type. 3641 **/ 3642 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3643 { 3644 switch (fsp->flow_type & ~FLOW_EXT) { 3645 case TCP_V4_FLOW: 3646 return "tcp4"; 3647 case UDP_V4_FLOW: 3648 return "udp4"; 3649 case SCTP_V4_FLOW: 3650 return "sctp4"; 3651 case IP_USER_FLOW: 3652 return "ip4"; 3653 default: 3654 return "unknown"; 3655 } 3656 } 3657 3658 /** 3659 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3660 * @pit_index: PIT index to convert 3661 * 3662 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3663 * of range. 3664 **/ 3665 static u64 i40e_pit_index_to_mask(int pit_index) 3666 { 3667 switch (pit_index) { 3668 case 0: 3669 return I40E_FLEX_50_MASK; 3670 case 1: 3671 return I40E_FLEX_51_MASK; 3672 case 2: 3673 return I40E_FLEX_52_MASK; 3674 case 3: 3675 return I40E_FLEX_53_MASK; 3676 case 4: 3677 return I40E_FLEX_54_MASK; 3678 case 5: 3679 return I40E_FLEX_55_MASK; 3680 case 6: 3681 return I40E_FLEX_56_MASK; 3682 case 7: 3683 return I40E_FLEX_57_MASK; 3684 default: 3685 return 0; 3686 } 3687 } 3688 3689 /** 3690 * i40e_print_input_set - Show changes between two input sets 3691 * @vsi: the vsi being configured 3692 * @old: the old input set 3693 * @new: the new input set 3694 * 3695 * Print the difference between old and new input sets by showing which series 3696 * of words are toggled on or off. Only displays the bits we actually support 3697 * changing. 3698 **/ 3699 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3700 { 3701 struct i40e_pf *pf = vsi->back; 3702 bool old_value, new_value; 3703 int i; 3704 3705 old_value = !!(old & I40E_L3_SRC_MASK); 3706 new_value = !!(new & I40E_L3_SRC_MASK); 3707 if (old_value != new_value) 3708 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3709 old_value ? "ON" : "OFF", 3710 new_value ? "ON" : "OFF"); 3711 3712 old_value = !!(old & I40E_L3_DST_MASK); 3713 new_value = !!(new & I40E_L3_DST_MASK); 3714 if (old_value != new_value) 3715 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3716 old_value ? "ON" : "OFF", 3717 new_value ? "ON" : "OFF"); 3718 3719 old_value = !!(old & I40E_L4_SRC_MASK); 3720 new_value = !!(new & I40E_L4_SRC_MASK); 3721 if (old_value != new_value) 3722 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3723 old_value ? "ON" : "OFF", 3724 new_value ? "ON" : "OFF"); 3725 3726 old_value = !!(old & I40E_L4_DST_MASK); 3727 new_value = !!(new & I40E_L4_DST_MASK); 3728 if (old_value != new_value) 3729 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3730 old_value ? "ON" : "OFF", 3731 new_value ? "ON" : "OFF"); 3732 3733 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3734 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3735 if (old_value != new_value) 3736 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3737 old_value ? "ON" : "OFF", 3738 new_value ? "ON" : "OFF"); 3739 3740 /* Show change of flexible filter entries */ 3741 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3742 u64 flex_mask = i40e_pit_index_to_mask(i); 3743 3744 old_value = !!(old & flex_mask); 3745 new_value = !!(new & flex_mask); 3746 if (old_value != new_value) 3747 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3748 i, 3749 old_value ? "ON" : "OFF", 3750 new_value ? "ON" : "OFF"); 3751 } 3752 3753 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3754 old); 3755 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3756 new); 3757 } 3758 3759 /** 3760 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3761 * @vsi: pointer to the targeted VSI 3762 * @fsp: pointer to Rx flow specification 3763 * @userdef: userdefined data from flow specification 3764 * 3765 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3766 * for partial matches exists with a few limitations. First, hardware only 3767 * supports masking by word boundary (2 bytes) and not per individual bit. 3768 * Second, hardware is limited to using one mask for a flow type and cannot 3769 * use a separate mask for each filter. 3770 * 3771 * To support these limitations, if we already have a configured filter for 3772 * the specified type, this function enforces that new filters of the type 3773 * match the configured input set. Otherwise, if we do not have a filter of 3774 * the specified type, we allow the input set to be updated to match the 3775 * desired filter. 3776 * 3777 * To help ensure that administrators understand why filters weren't displayed 3778 * as supported, we print a diagnostic message displaying how the input set 3779 * would change and warning to delete the preexisting filters if required. 3780 * 3781 * Returns 0 on successful input set match, and a negative return code on 3782 * failure. 3783 **/ 3784 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3785 struct ethtool_rx_flow_spec *fsp, 3786 struct i40e_rx_flow_userdef *userdef) 3787 { 3788 struct i40e_pf *pf = vsi->back; 3789 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3790 struct ethtool_usrip4_spec *usr_ip4_spec; 3791 u64 current_mask, new_mask; 3792 bool new_flex_offset = false; 3793 bool flex_l3 = false; 3794 u16 *fdir_filter_count; 3795 u16 index, src_offset = 0; 3796 u8 pit_index = 0; 3797 int err; 3798 3799 switch (fsp->flow_type & ~FLOW_EXT) { 3800 case SCTP_V4_FLOW: 3801 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3802 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3803 break; 3804 case TCP_V4_FLOW: 3805 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3806 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3807 break; 3808 case UDP_V4_FLOW: 3809 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3810 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3811 break; 3812 case IP_USER_FLOW: 3813 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3814 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3815 flex_l3 = true; 3816 break; 3817 default: 3818 return -EOPNOTSUPP; 3819 } 3820 3821 /* Read the current input set from register memory. */ 3822 current_mask = i40e_read_fd_input_set(pf, index); 3823 new_mask = current_mask; 3824 3825 /* Determine, if any, the required changes to the input set in order 3826 * to support the provided mask. 3827 * 3828 * Hardware only supports masking at word (2 byte) granularity and does 3829 * not support full bitwise masking. This implementation simplifies 3830 * even further and only supports fully enabled or fully disabled 3831 * masks for each field, even though we could split the ip4src and 3832 * ip4dst fields. 3833 */ 3834 switch (fsp->flow_type & ~FLOW_EXT) { 3835 case SCTP_V4_FLOW: 3836 new_mask &= ~I40E_VERIFY_TAG_MASK; 3837 /* Fall through */ 3838 case TCP_V4_FLOW: 3839 case UDP_V4_FLOW: 3840 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3841 3842 /* IPv4 source address */ 3843 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3844 new_mask |= I40E_L3_SRC_MASK; 3845 else if (!tcp_ip4_spec->ip4src) 3846 new_mask &= ~I40E_L3_SRC_MASK; 3847 else 3848 return -EOPNOTSUPP; 3849 3850 /* IPv4 destination address */ 3851 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3852 new_mask |= I40E_L3_DST_MASK; 3853 else if (!tcp_ip4_spec->ip4dst) 3854 new_mask &= ~I40E_L3_DST_MASK; 3855 else 3856 return -EOPNOTSUPP; 3857 3858 /* L4 source port */ 3859 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3860 new_mask |= I40E_L4_SRC_MASK; 3861 else if (!tcp_ip4_spec->psrc) 3862 new_mask &= ~I40E_L4_SRC_MASK; 3863 else 3864 return -EOPNOTSUPP; 3865 3866 /* L4 destination port */ 3867 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3868 new_mask |= I40E_L4_DST_MASK; 3869 else if (!tcp_ip4_spec->pdst) 3870 new_mask &= ~I40E_L4_DST_MASK; 3871 else 3872 return -EOPNOTSUPP; 3873 3874 /* Filtering on Type of Service is not supported. */ 3875 if (tcp_ip4_spec->tos) 3876 return -EOPNOTSUPP; 3877 3878 break; 3879 case IP_USER_FLOW: 3880 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3881 3882 /* IPv4 source address */ 3883 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3884 new_mask |= I40E_L3_SRC_MASK; 3885 else if (!usr_ip4_spec->ip4src) 3886 new_mask &= ~I40E_L3_SRC_MASK; 3887 else 3888 return -EOPNOTSUPP; 3889 3890 /* IPv4 destination address */ 3891 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3892 new_mask |= I40E_L3_DST_MASK; 3893 else if (!usr_ip4_spec->ip4dst) 3894 new_mask &= ~I40E_L3_DST_MASK; 3895 else 3896 return -EOPNOTSUPP; 3897 3898 /* First 4 bytes of L4 header */ 3899 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3900 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3901 else if (!usr_ip4_spec->l4_4_bytes) 3902 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3903 else 3904 return -EOPNOTSUPP; 3905 3906 /* Filtering on Type of Service is not supported. */ 3907 if (usr_ip4_spec->tos) 3908 return -EOPNOTSUPP; 3909 3910 /* Filtering on IP version is not supported */ 3911 if (usr_ip4_spec->ip_ver) 3912 return -EINVAL; 3913 3914 /* Filtering on L4 protocol is not supported */ 3915 if (usr_ip4_spec->proto) 3916 return -EINVAL; 3917 3918 break; 3919 default: 3920 return -EOPNOTSUPP; 3921 } 3922 3923 /* First, clear all flexible filter entries */ 3924 new_mask &= ~I40E_FLEX_INPUT_MASK; 3925 3926 /* If we have a flexible filter, try to add this offset to the correct 3927 * flexible filter PIT list. Once finished, we can update the mask. 3928 * If the src_offset changed, we will get a new mask value which will 3929 * trigger an input set change. 3930 */ 3931 if (userdef->flex_filter) { 3932 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3933 3934 /* Flexible offset must be even, since the flexible payload 3935 * must be aligned on 2-byte boundary. 3936 */ 3937 if (userdef->flex_offset & 0x1) { 3938 dev_warn(&pf->pdev->dev, 3939 "Flexible data offset must be 2-byte aligned\n"); 3940 return -EINVAL; 3941 } 3942 3943 src_offset = userdef->flex_offset >> 1; 3944 3945 /* FLX_PIT source offset value is only so large */ 3946 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3947 dev_warn(&pf->pdev->dev, 3948 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3949 return -EINVAL; 3950 } 3951 3952 /* See if this offset has already been programmed. If we get 3953 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3954 * if we get a NULL pointer, this means we will need to add 3955 * the offset. 3956 */ 3957 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3958 src_offset); 3959 if (IS_ERR(flex_pit)) 3960 return PTR_ERR(flex_pit); 3961 3962 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3963 * packet types, and thus we need to program both L3 and L4 3964 * flexible values. These must have identical flexible index, 3965 * as otherwise we can't correctly program the input set. So 3966 * we'll find both an L3 and L4 index and make sure they are 3967 * the same. 3968 */ 3969 if (flex_l3) { 3970 l3_flex_pit = 3971 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3972 src_offset); 3973 if (IS_ERR(l3_flex_pit)) 3974 return PTR_ERR(l3_flex_pit); 3975 3976 if (flex_pit) { 3977 /* If we already had a matching L4 entry, we 3978 * need to make sure that the L3 entry we 3979 * obtained uses the same index. 3980 */ 3981 if (l3_flex_pit) { 3982 if (l3_flex_pit->pit_index != 3983 flex_pit->pit_index) { 3984 return -EINVAL; 3985 } 3986 } else { 3987 new_flex_offset = true; 3988 } 3989 } else { 3990 flex_pit = l3_flex_pit; 3991 } 3992 } 3993 3994 /* If we didn't find an existing flex offset, we need to 3995 * program a new one. However, we don't immediately program it 3996 * here because we will wait to program until after we check 3997 * that it is safe to change the input set. 3998 */ 3999 if (!flex_pit) { 4000 new_flex_offset = true; 4001 pit_index = i40e_unused_pit_index(pf); 4002 } else { 4003 pit_index = flex_pit->pit_index; 4004 } 4005 4006 /* Update the mask with the new offset */ 4007 new_mask |= i40e_pit_index_to_mask(pit_index); 4008 } 4009 4010 /* If the mask and flexible filter offsets for this filter match the 4011 * currently programmed values we don't need any input set change, so 4012 * this filter is safe to install. 4013 */ 4014 if (new_mask == current_mask && !new_flex_offset) 4015 return 0; 4016 4017 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4018 i40e_flow_str(fsp)); 4019 i40e_print_input_set(vsi, current_mask, new_mask); 4020 if (new_flex_offset) { 4021 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4022 pit_index, src_offset); 4023 } 4024 4025 /* Hardware input sets are global across multiple ports, so even the 4026 * main port cannot change them when in MFP mode as this would impact 4027 * any filters on the other ports. 4028 */ 4029 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 4030 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4031 return -EOPNOTSUPP; 4032 } 4033 4034 /* This filter requires us to update the input set. However, hardware 4035 * only supports one input set per flow type, and does not support 4036 * separate masks for each filter. This means that we can only support 4037 * a single mask for all filters of a specific type. 4038 * 4039 * If we have preexisting filters, they obviously depend on the 4040 * current programmed input set. Display a diagnostic message in this 4041 * case explaining why the filter could not be accepted. 4042 */ 4043 if (*fdir_filter_count) { 4044 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4045 i40e_flow_str(fsp), 4046 *fdir_filter_count); 4047 return -EOPNOTSUPP; 4048 } 4049 4050 i40e_write_fd_input_set(pf, index, new_mask); 4051 4052 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4053 * frames. If we're programming the input set for IPv4/Other, we also 4054 * need to program the IPv4/Fragmented input set. Since we don't have 4055 * separate support, we'll always assume and enforce that the two flow 4056 * types must have matching input sets. 4057 */ 4058 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4059 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4060 new_mask); 4061 4062 /* Add the new offset and update table, if necessary */ 4063 if (new_flex_offset) { 4064 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4065 pit_index); 4066 if (err) 4067 return err; 4068 4069 if (flex_l3) { 4070 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4071 src_offset, 4072 pit_index); 4073 if (err) 4074 return err; 4075 } 4076 4077 i40e_reprogram_flex_pit(pf); 4078 } 4079 4080 return 0; 4081 } 4082 4083 /** 4084 * i40e_match_fdir_filter - Return true of two filters match 4085 * @a: pointer to filter struct 4086 * @b: pointer to filter struct 4087 * 4088 * Returns true if the two filters match exactly the same criteria. I.e. they 4089 * match the same flow type and have the same parameters. We don't need to 4090 * check any input-set since all filters of the same flow type must use the 4091 * same input set. 4092 **/ 4093 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4094 struct i40e_fdir_filter *b) 4095 { 4096 /* The filters do not much if any of these criteria differ. */ 4097 if (a->dst_ip != b->dst_ip || 4098 a->src_ip != b->src_ip || 4099 a->dst_port != b->dst_port || 4100 a->src_port != b->src_port || 4101 a->flow_type != b->flow_type || 4102 a->ip4_proto != b->ip4_proto) 4103 return false; 4104 4105 return true; 4106 } 4107 4108 /** 4109 * i40e_disallow_matching_filters - Check that new filters differ 4110 * @vsi: pointer to the targeted VSI 4111 * @input: new filter to check 4112 * 4113 * Due to hardware limitations, it is not possible for two filters that match 4114 * similar criteria to be programmed at the same time. This is true for a few 4115 * reasons: 4116 * 4117 * (a) all filters matching a particular flow type must use the same input 4118 * set, that is they must match the same criteria. 4119 * (b) different flow types will never match the same packet, as the flow type 4120 * is decided by hardware before checking which rules apply. 4121 * (c) hardware has no way to distinguish which order filters apply in. 4122 * 4123 * Due to this, we can't really support using the location data to order 4124 * filters in the hardware parsing. It is technically possible for the user to 4125 * request two filters matching the same criteria but which select different 4126 * queues. In this case, rather than keep both filters in the list, we reject 4127 * the 2nd filter when the user requests adding it. 4128 * 4129 * This avoids needing to track location for programming the filter to 4130 * hardware, and ensures that we avoid some strange scenarios involving 4131 * deleting filters which match the same criteria. 4132 **/ 4133 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4134 struct i40e_fdir_filter *input) 4135 { 4136 struct i40e_pf *pf = vsi->back; 4137 struct i40e_fdir_filter *rule; 4138 struct hlist_node *node2; 4139 4140 /* Loop through every filter, and check that it doesn't match */ 4141 hlist_for_each_entry_safe(rule, node2, 4142 &pf->fdir_filter_list, fdir_node) { 4143 /* Don't check the filters match if they share the same fd_id, 4144 * since the new filter is actually just updating the target 4145 * of the old filter. 4146 */ 4147 if (rule->fd_id == input->fd_id) 4148 continue; 4149 4150 /* If any filters match, then print a warning message to the 4151 * kernel message buffer and bail out. 4152 */ 4153 if (i40e_match_fdir_filter(rule, input)) { 4154 dev_warn(&pf->pdev->dev, 4155 "Existing user defined filter %d already matches this flow.\n", 4156 rule->fd_id); 4157 return -EINVAL; 4158 } 4159 } 4160 4161 return 0; 4162 } 4163 4164 /** 4165 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4166 * @vsi: pointer to the targeted VSI 4167 * @cmd: command to get or set RX flow classification rules 4168 * 4169 * Add Flow Director filters for a specific flow spec based on their 4170 * protocol. Returns 0 if the filters were successfully added. 4171 **/ 4172 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4173 struct ethtool_rxnfc *cmd) 4174 { 4175 struct i40e_rx_flow_userdef userdef; 4176 struct ethtool_rx_flow_spec *fsp; 4177 struct i40e_fdir_filter *input; 4178 u16 dest_vsi = 0, q_index = 0; 4179 struct i40e_pf *pf; 4180 int ret = -EINVAL; 4181 u8 dest_ctl; 4182 4183 if (!vsi) 4184 return -EINVAL; 4185 pf = vsi->back; 4186 4187 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4188 return -EOPNOTSUPP; 4189 4190 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4191 return -ENOSPC; 4192 4193 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4194 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4195 return -EBUSY; 4196 4197 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4198 return -EBUSY; 4199 4200 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4201 4202 /* Parse the user-defined field */ 4203 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4204 return -EINVAL; 4205 4206 /* Extended MAC field is not supported */ 4207 if (fsp->flow_type & FLOW_MAC_EXT) 4208 return -EINVAL; 4209 4210 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4211 if (ret) 4212 return ret; 4213 4214 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4215 pf->hw.func_caps.fd_filters_guaranteed)) { 4216 return -EINVAL; 4217 } 4218 4219 /* ring_cookie is either the drop index, or is a mask of the queue 4220 * index and VF id we wish to target. 4221 */ 4222 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4223 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4224 } else { 4225 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4226 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4227 4228 if (!vf) { 4229 if (ring >= vsi->num_queue_pairs) 4230 return -EINVAL; 4231 dest_vsi = vsi->id; 4232 } else { 4233 /* VFs are zero-indexed, so we subtract one here */ 4234 vf--; 4235 4236 if (vf >= pf->num_alloc_vfs) 4237 return -EINVAL; 4238 if (ring >= pf->vf[vf].num_queue_pairs) 4239 return -EINVAL; 4240 dest_vsi = pf->vf[vf].lan_vsi_id; 4241 } 4242 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4243 q_index = ring; 4244 } 4245 4246 input = kzalloc(sizeof(*input), GFP_KERNEL); 4247 4248 if (!input) 4249 return -ENOMEM; 4250 4251 input->fd_id = fsp->location; 4252 input->q_index = q_index; 4253 input->dest_vsi = dest_vsi; 4254 input->dest_ctl = dest_ctl; 4255 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4256 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4257 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4258 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4259 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4260 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4261 4262 /* Reverse the src and dest notion, since the HW expects them to be from 4263 * Tx perspective where as the input from user is from Rx filter view. 4264 */ 4265 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4266 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4267 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4268 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4269 4270 if (userdef.flex_filter) { 4271 input->flex_filter = true; 4272 input->flex_word = cpu_to_be16(userdef.flex_word); 4273 input->flex_offset = userdef.flex_offset; 4274 } 4275 4276 /* Avoid programming two filters with identical match criteria. */ 4277 ret = i40e_disallow_matching_filters(vsi, input); 4278 if (ret) 4279 goto free_filter_memory; 4280 4281 /* Add the input filter to the fdir_input_list, possibly replacing 4282 * a previous filter. Do not free the input structure after adding it 4283 * to the list as this would cause a use-after-free bug. 4284 */ 4285 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4286 ret = i40e_add_del_fdir(vsi, input, true); 4287 if (ret) 4288 goto remove_sw_rule; 4289 return 0; 4290 4291 remove_sw_rule: 4292 hlist_del(&input->fdir_node); 4293 pf->fdir_pf_active_filters--; 4294 free_filter_memory: 4295 kfree(input); 4296 return ret; 4297 } 4298 4299 /** 4300 * i40e_set_rxnfc - command to set RX flow classification rules 4301 * @netdev: network interface device structure 4302 * @cmd: ethtool rxnfc command 4303 * 4304 * Returns Success if the command is supported. 4305 **/ 4306 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4307 { 4308 struct i40e_netdev_priv *np = netdev_priv(netdev); 4309 struct i40e_vsi *vsi = np->vsi; 4310 struct i40e_pf *pf = vsi->back; 4311 int ret = -EOPNOTSUPP; 4312 4313 switch (cmd->cmd) { 4314 case ETHTOOL_SRXFH: 4315 ret = i40e_set_rss_hash_opt(pf, cmd); 4316 break; 4317 case ETHTOOL_SRXCLSRLINS: 4318 ret = i40e_add_fdir_ethtool(vsi, cmd); 4319 break; 4320 case ETHTOOL_SRXCLSRLDEL: 4321 ret = i40e_del_fdir_entry(vsi, cmd); 4322 break; 4323 default: 4324 break; 4325 } 4326 4327 return ret; 4328 } 4329 4330 /** 4331 * i40e_max_channels - get Max number of combined channels supported 4332 * @vsi: vsi pointer 4333 **/ 4334 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4335 { 4336 /* TODO: This code assumes DCB and FD is disabled for now. */ 4337 return vsi->alloc_queue_pairs; 4338 } 4339 4340 /** 4341 * i40e_get_channels - Get the current channels enabled and max supported etc. 4342 * @dev: network interface device structure 4343 * @ch: ethtool channels structure 4344 * 4345 * We don't support separate tx and rx queues as channels. The other count 4346 * represents how many queues are being used for control. max_combined counts 4347 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4348 * q_vectors since we support a lot more queue pairs than q_vectors. 4349 **/ 4350 static void i40e_get_channels(struct net_device *dev, 4351 struct ethtool_channels *ch) 4352 { 4353 struct i40e_netdev_priv *np = netdev_priv(dev); 4354 struct i40e_vsi *vsi = np->vsi; 4355 struct i40e_pf *pf = vsi->back; 4356 4357 /* report maximum channels */ 4358 ch->max_combined = i40e_max_channels(vsi); 4359 4360 /* report info for other vector */ 4361 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4362 ch->max_other = ch->other_count; 4363 4364 /* Note: This code assumes DCB is disabled for now. */ 4365 ch->combined_count = vsi->num_queue_pairs; 4366 } 4367 4368 /** 4369 * i40e_set_channels - Set the new channels count. 4370 * @dev: network interface device structure 4371 * @ch: ethtool channels structure 4372 * 4373 * The new channels count may not be the same as requested by the user 4374 * since it gets rounded down to a power of 2 value. 4375 **/ 4376 static int i40e_set_channels(struct net_device *dev, 4377 struct ethtool_channels *ch) 4378 { 4379 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4380 struct i40e_netdev_priv *np = netdev_priv(dev); 4381 unsigned int count = ch->combined_count; 4382 struct i40e_vsi *vsi = np->vsi; 4383 struct i40e_pf *pf = vsi->back; 4384 struct i40e_fdir_filter *rule; 4385 struct hlist_node *node2; 4386 int new_count; 4387 int err = 0; 4388 4389 /* We do not support setting channels for any other VSI at present */ 4390 if (vsi->type != I40E_VSI_MAIN) 4391 return -EINVAL; 4392 4393 /* We do not support setting channels via ethtool when TCs are 4394 * configured through mqprio 4395 */ 4396 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4397 return -EINVAL; 4398 4399 /* verify they are not requesting separate vectors */ 4400 if (!count || ch->rx_count || ch->tx_count) 4401 return -EINVAL; 4402 4403 /* verify other_count has not changed */ 4404 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4405 return -EINVAL; 4406 4407 /* verify the number of channels does not exceed hardware limits */ 4408 if (count > i40e_max_channels(vsi)) 4409 return -EINVAL; 4410 4411 /* verify that the number of channels does not invalidate any current 4412 * flow director rules 4413 */ 4414 hlist_for_each_entry_safe(rule, node2, 4415 &pf->fdir_filter_list, fdir_node) { 4416 if (rule->dest_ctl != drop && count <= rule->q_index) { 4417 dev_warn(&pf->pdev->dev, 4418 "Existing user defined filter %d assigns flow to queue %d\n", 4419 rule->fd_id, rule->q_index); 4420 err = -EINVAL; 4421 } 4422 } 4423 4424 if (err) { 4425 dev_err(&pf->pdev->dev, 4426 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4427 count); 4428 return err; 4429 } 4430 4431 /* update feature limits from largest to smallest supported values */ 4432 /* TODO: Flow director limit, DCB etc */ 4433 4434 /* use rss_reconfig to rebuild with new queue count and update traffic 4435 * class queue mapping 4436 */ 4437 new_count = i40e_reconfig_rss_queues(pf, count); 4438 if (new_count > 0) 4439 return 0; 4440 else 4441 return -EINVAL; 4442 } 4443 4444 /** 4445 * i40e_get_rxfh_key_size - get the RSS hash key size 4446 * @netdev: network interface device structure 4447 * 4448 * Returns the table size. 4449 **/ 4450 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4451 { 4452 return I40E_HKEY_ARRAY_SIZE; 4453 } 4454 4455 /** 4456 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4457 * @netdev: network interface device structure 4458 * 4459 * Returns the table size. 4460 **/ 4461 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4462 { 4463 return I40E_HLUT_ARRAY_SIZE; 4464 } 4465 4466 /** 4467 * i40e_get_rxfh - get the rx flow hash indirection table 4468 * @netdev: network interface device structure 4469 * @indir: indirection table 4470 * @key: hash key 4471 * @hfunc: hash function 4472 * 4473 * Reads the indirection table directly from the hardware. Returns 0 on 4474 * success. 4475 **/ 4476 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4477 u8 *hfunc) 4478 { 4479 struct i40e_netdev_priv *np = netdev_priv(netdev); 4480 struct i40e_vsi *vsi = np->vsi; 4481 u8 *lut, *seed = NULL; 4482 int ret; 4483 u16 i; 4484 4485 if (hfunc) 4486 *hfunc = ETH_RSS_HASH_TOP; 4487 4488 if (!indir) 4489 return 0; 4490 4491 seed = key; 4492 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4493 if (!lut) 4494 return -ENOMEM; 4495 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4496 if (ret) 4497 goto out; 4498 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4499 indir[i] = (u32)(lut[i]); 4500 4501 out: 4502 kfree(lut); 4503 4504 return ret; 4505 } 4506 4507 /** 4508 * i40e_set_rxfh - set the rx flow hash indirection table 4509 * @netdev: network interface device structure 4510 * @indir: indirection table 4511 * @key: hash key 4512 * @hfunc: hash function to use 4513 * 4514 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4515 * returns 0 after programming the table. 4516 **/ 4517 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4518 const u8 *key, const u8 hfunc) 4519 { 4520 struct i40e_netdev_priv *np = netdev_priv(netdev); 4521 struct i40e_vsi *vsi = np->vsi; 4522 struct i40e_pf *pf = vsi->back; 4523 u8 *seed = NULL; 4524 u16 i; 4525 4526 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4527 return -EOPNOTSUPP; 4528 4529 if (key) { 4530 if (!vsi->rss_hkey_user) { 4531 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4532 GFP_KERNEL); 4533 if (!vsi->rss_hkey_user) 4534 return -ENOMEM; 4535 } 4536 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4537 seed = vsi->rss_hkey_user; 4538 } 4539 if (!vsi->rss_lut_user) { 4540 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4541 if (!vsi->rss_lut_user) 4542 return -ENOMEM; 4543 } 4544 4545 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4546 if (indir) 4547 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4548 vsi->rss_lut_user[i] = (u8)(indir[i]); 4549 else 4550 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4551 vsi->rss_size); 4552 4553 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4554 I40E_HLUT_ARRAY_SIZE); 4555 } 4556 4557 /** 4558 * i40e_get_priv_flags - report device private flags 4559 * @dev: network interface device structure 4560 * 4561 * The get string set count and the string set should be matched for each 4562 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4563 * array. 4564 * 4565 * Returns a u32 bitmap of flags. 4566 **/ 4567 static u32 i40e_get_priv_flags(struct net_device *dev) 4568 { 4569 struct i40e_netdev_priv *np = netdev_priv(dev); 4570 struct i40e_vsi *vsi = np->vsi; 4571 struct i40e_pf *pf = vsi->back; 4572 u32 i, j, ret_flags = 0; 4573 4574 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4575 const struct i40e_priv_flags *priv_flags; 4576 4577 priv_flags = &i40e_gstrings_priv_flags[i]; 4578 4579 if (priv_flags->flag & pf->flags) 4580 ret_flags |= BIT(i); 4581 } 4582 4583 if (pf->hw.pf_id != 0) 4584 return ret_flags; 4585 4586 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4587 const struct i40e_priv_flags *priv_flags; 4588 4589 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4590 4591 if (priv_flags->flag & pf->flags) 4592 ret_flags |= BIT(i + j); 4593 } 4594 4595 return ret_flags; 4596 } 4597 4598 /** 4599 * i40e_set_priv_flags - set private flags 4600 * @dev: network interface device structure 4601 * @flags: bit flags to be set 4602 **/ 4603 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4604 { 4605 struct i40e_netdev_priv *np = netdev_priv(dev); 4606 struct i40e_vsi *vsi = np->vsi; 4607 struct i40e_pf *pf = vsi->back; 4608 u64 orig_flags, new_flags, changed_flags; 4609 u32 i, j; 4610 4611 orig_flags = READ_ONCE(pf->flags); 4612 new_flags = orig_flags; 4613 4614 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4615 const struct i40e_priv_flags *priv_flags; 4616 4617 priv_flags = &i40e_gstrings_priv_flags[i]; 4618 4619 if (flags & BIT(i)) 4620 new_flags |= priv_flags->flag; 4621 else 4622 new_flags &= ~(priv_flags->flag); 4623 4624 /* If this is a read-only flag, it can't be changed */ 4625 if (priv_flags->read_only && 4626 ((orig_flags ^ new_flags) & ~BIT(i))) 4627 return -EOPNOTSUPP; 4628 } 4629 4630 if (pf->hw.pf_id != 0) 4631 goto flags_complete; 4632 4633 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4634 const struct i40e_priv_flags *priv_flags; 4635 4636 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4637 4638 if (flags & BIT(i + j)) 4639 new_flags |= priv_flags->flag; 4640 else 4641 new_flags &= ~(priv_flags->flag); 4642 4643 /* If this is a read-only flag, it can't be changed */ 4644 if (priv_flags->read_only && 4645 ((orig_flags ^ new_flags) & ~BIT(i))) 4646 return -EOPNOTSUPP; 4647 } 4648 4649 flags_complete: 4650 changed_flags = orig_flags ^ new_flags; 4651 4652 /* Before we finalize any flag changes, we need to perform some 4653 * checks to ensure that the changes are supported and safe. 4654 */ 4655 4656 /* ATR eviction is not supported on all devices */ 4657 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4658 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4659 return -EOPNOTSUPP; 4660 4661 /* If the driver detected FW LLDP was disabled on init, this flag could 4662 * be set, however we do not support _changing_ the flag if NPAR is 4663 * enabled or FW API version < 1.7. There are situations where older 4664 * FW versions/NPAR enabled PFs could disable LLDP, however we _must_ 4665 * not allow the user to enable/disable LLDP with this flag on 4666 * unsupported FW versions. 4667 */ 4668 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4669 if (!(pf->hw_features & I40E_HW_STOPPABLE_FW_LLDP)) { 4670 dev_warn(&pf->pdev->dev, 4671 "Device does not support changing FW LLDP\n"); 4672 return -EOPNOTSUPP; 4673 } 4674 } 4675 4676 /* Now that we've checked to ensure that the new flags are valid, load 4677 * them into place. Since we only modify flags either (a) during 4678 * initialization or (b) while holding the RTNL lock, we don't need 4679 * anything fancy here. 4680 */ 4681 pf->flags = new_flags; 4682 4683 /* Process any additional changes needed as a result of flag changes. 4684 * The changed_flags value reflects the list of bits that were 4685 * changed in the code above. 4686 */ 4687 4688 /* Flush current ATR settings if ATR was disabled */ 4689 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4690 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4691 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4692 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4693 } 4694 4695 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4696 u16 sw_flags = 0, valid_flags = 0; 4697 int ret; 4698 4699 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4700 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4701 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4702 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4703 0, NULL); 4704 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4705 dev_info(&pf->pdev->dev, 4706 "couldn't set switch config bits, err %s aq_err %s\n", 4707 i40e_stat_str(&pf->hw, ret), 4708 i40e_aq_str(&pf->hw, 4709 pf->hw.aq.asq_last_status)); 4710 /* not a fatal problem, just keep going */ 4711 } 4712 } 4713 4714 if ((changed_flags & pf->flags & 4715 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4716 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4717 dev_warn(&pf->pdev->dev, 4718 "Turning on link-down-on-close flag may affect other partitions\n"); 4719 4720 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4721 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4722 struct i40e_dcbx_config *dcbcfg; 4723 4724 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4725 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4726 /* reset local_dcbx_config to default */ 4727 dcbcfg = &pf->hw.local_dcbx_config; 4728 dcbcfg->etscfg.willing = 1; 4729 dcbcfg->etscfg.maxtcs = 0; 4730 dcbcfg->etscfg.tcbwtable[0] = 100; 4731 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4732 dcbcfg->etscfg.tcbwtable[i] = 0; 4733 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4734 dcbcfg->etscfg.prioritytable[i] = 0; 4735 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4736 dcbcfg->pfc.willing = 1; 4737 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4738 } else { 4739 i40e_aq_start_lldp(&pf->hw, NULL); 4740 } 4741 } 4742 4743 /* Issue reset to cause things to take effect, as additional bits 4744 * are added we will need to create a mask of bits requiring reset 4745 */ 4746 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4747 I40E_FLAG_LEGACY_RX | 4748 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4749 I40E_FLAG_DISABLE_FW_LLDP)) 4750 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4751 4752 return 0; 4753 } 4754 4755 /** 4756 * i40e_get_module_info - get (Q)SFP+ module type info 4757 * @netdev: network interface device structure 4758 * @modinfo: module EEPROM size and layout information structure 4759 **/ 4760 static int i40e_get_module_info(struct net_device *netdev, 4761 struct ethtool_modinfo *modinfo) 4762 { 4763 struct i40e_netdev_priv *np = netdev_priv(netdev); 4764 struct i40e_vsi *vsi = np->vsi; 4765 struct i40e_pf *pf = vsi->back; 4766 struct i40e_hw *hw = &pf->hw; 4767 u32 sff8472_comp = 0; 4768 u32 sff8472_swap = 0; 4769 u32 sff8636_rev = 0; 4770 i40e_status status; 4771 u32 type = 0; 4772 4773 /* Check if firmware supports reading module EEPROM. */ 4774 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4775 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4776 return -EINVAL; 4777 } 4778 4779 status = i40e_update_link_info(hw); 4780 if (status) 4781 return -EIO; 4782 4783 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4784 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4785 return -EINVAL; 4786 } 4787 4788 type = hw->phy.link_info.module_type[0]; 4789 4790 switch (type) { 4791 case I40E_MODULE_TYPE_SFP: 4792 status = i40e_aq_get_phy_register(hw, 4793 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4794 I40E_I2C_EEPROM_DEV_ADDR, 4795 I40E_MODULE_SFF_8472_COMP, 4796 &sff8472_comp, NULL); 4797 if (status) 4798 return -EIO; 4799 4800 status = i40e_aq_get_phy_register(hw, 4801 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4802 I40E_I2C_EEPROM_DEV_ADDR, 4803 I40E_MODULE_SFF_8472_SWAP, 4804 &sff8472_swap, NULL); 4805 if (status) 4806 return -EIO; 4807 4808 /* Check if the module requires address swap to access 4809 * the other EEPROM memory page. 4810 */ 4811 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4812 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4813 modinfo->type = ETH_MODULE_SFF_8079; 4814 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4815 } else if (sff8472_comp == 0x00) { 4816 /* Module is not SFF-8472 compliant */ 4817 modinfo->type = ETH_MODULE_SFF_8079; 4818 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4819 } else { 4820 modinfo->type = ETH_MODULE_SFF_8472; 4821 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4822 } 4823 break; 4824 case I40E_MODULE_TYPE_QSFP_PLUS: 4825 /* Read from memory page 0. */ 4826 status = i40e_aq_get_phy_register(hw, 4827 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4828 0, 4829 I40E_MODULE_REVISION_ADDR, 4830 &sff8636_rev, NULL); 4831 if (status) 4832 return -EIO; 4833 /* Determine revision compliance byte */ 4834 if (sff8636_rev > 0x02) { 4835 /* Module is SFF-8636 compliant */ 4836 modinfo->type = ETH_MODULE_SFF_8636; 4837 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4838 } else { 4839 modinfo->type = ETH_MODULE_SFF_8436; 4840 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4841 } 4842 break; 4843 case I40E_MODULE_TYPE_QSFP28: 4844 modinfo->type = ETH_MODULE_SFF_8636; 4845 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4846 break; 4847 default: 4848 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4849 return -EINVAL; 4850 } 4851 return 0; 4852 } 4853 4854 /** 4855 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4856 * @netdev: network interface device structure 4857 * @ee: EEPROM dump request structure 4858 * @data: buffer to be filled with EEPROM contents 4859 **/ 4860 static int i40e_get_module_eeprom(struct net_device *netdev, 4861 struct ethtool_eeprom *ee, 4862 u8 *data) 4863 { 4864 struct i40e_netdev_priv *np = netdev_priv(netdev); 4865 struct i40e_vsi *vsi = np->vsi; 4866 struct i40e_pf *pf = vsi->back; 4867 struct i40e_hw *hw = &pf->hw; 4868 bool is_sfp = false; 4869 i40e_status status; 4870 u32 value = 0; 4871 int i; 4872 4873 if (!ee || !ee->len || !data) 4874 return -EINVAL; 4875 4876 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4877 is_sfp = true; 4878 4879 for (i = 0; i < ee->len; i++) { 4880 u32 offset = i + ee->offset; 4881 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4882 4883 /* Check if we need to access the other memory page */ 4884 if (is_sfp) { 4885 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4886 offset -= ETH_MODULE_SFF_8079_LEN; 4887 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4888 } 4889 } else { 4890 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4891 /* Compute memory page number and offset. */ 4892 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4893 addr++; 4894 } 4895 } 4896 4897 status = i40e_aq_get_phy_register(hw, 4898 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4899 addr, offset, &value, NULL); 4900 if (status) 4901 return -EIO; 4902 data[i] = value; 4903 } 4904 return 0; 4905 } 4906 4907 static const struct ethtool_ops i40e_ethtool_ops = { 4908 .get_drvinfo = i40e_get_drvinfo, 4909 .get_regs_len = i40e_get_regs_len, 4910 .get_regs = i40e_get_regs, 4911 .nway_reset = i40e_nway_reset, 4912 .get_link = ethtool_op_get_link, 4913 .get_wol = i40e_get_wol, 4914 .set_wol = i40e_set_wol, 4915 .set_eeprom = i40e_set_eeprom, 4916 .get_eeprom_len = i40e_get_eeprom_len, 4917 .get_eeprom = i40e_get_eeprom, 4918 .get_ringparam = i40e_get_ringparam, 4919 .set_ringparam = i40e_set_ringparam, 4920 .get_pauseparam = i40e_get_pauseparam, 4921 .set_pauseparam = i40e_set_pauseparam, 4922 .get_msglevel = i40e_get_msglevel, 4923 .set_msglevel = i40e_set_msglevel, 4924 .get_rxnfc = i40e_get_rxnfc, 4925 .set_rxnfc = i40e_set_rxnfc, 4926 .self_test = i40e_diag_test, 4927 .get_strings = i40e_get_strings, 4928 .set_phys_id = i40e_set_phys_id, 4929 .get_sset_count = i40e_get_sset_count, 4930 .get_ethtool_stats = i40e_get_ethtool_stats, 4931 .get_coalesce = i40e_get_coalesce, 4932 .set_coalesce = i40e_set_coalesce, 4933 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4934 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4935 .get_rxfh = i40e_get_rxfh, 4936 .set_rxfh = i40e_set_rxfh, 4937 .get_channels = i40e_get_channels, 4938 .set_channels = i40e_set_channels, 4939 .get_module_info = i40e_get_module_info, 4940 .get_module_eeprom = i40e_get_module_eeprom, 4941 .get_ts_info = i40e_get_ts_info, 4942 .get_priv_flags = i40e_get_priv_flags, 4943 .set_priv_flags = i40e_set_priv_flags, 4944 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4945 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4946 .get_link_ksettings = i40e_get_link_ksettings, 4947 .set_link_ksettings = i40e_set_link_ksettings, 4948 }; 4949 4950 void i40e_set_ethtool_ops(struct net_device *netdev) 4951 { 4952 netdev->ethtool_ops = &i40e_ethtool_ops; 4953 } 4954