1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * The full GNU General Public License is included in this distribution in 20 * the file called "COPYING". 21 * 22 * Contact Information: 23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 * 26 ******************************************************************************/ 27 28 #include "i40e_type.h" 29 #include "i40e_adminq.h" 30 #include "i40e_prototype.h" 31 #include "i40e_virtchnl.h" 32 33 /** 34 * i40e_set_mac_type - Sets MAC type 35 * @hw: pointer to the HW structure 36 * 37 * This function sets the mac type of the adapter based on the 38 * vendor ID and device ID stored in the hw structure. 39 **/ 40 static i40e_status i40e_set_mac_type(struct i40e_hw *hw) 41 { 42 i40e_status status = 0; 43 44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) { 45 switch (hw->device_id) { 46 case I40E_SFP_XL710_DEVICE_ID: 47 case I40E_SFP_X710_DEVICE_ID: 48 case I40E_QEMU_DEVICE_ID: 49 case I40E_KX_A_DEVICE_ID: 50 case I40E_KX_B_DEVICE_ID: 51 case I40E_KX_C_DEVICE_ID: 52 case I40E_KX_D_DEVICE_ID: 53 case I40E_QSFP_A_DEVICE_ID: 54 case I40E_QSFP_B_DEVICE_ID: 55 case I40E_QSFP_C_DEVICE_ID: 56 hw->mac.type = I40E_MAC_XL710; 57 break; 58 case I40E_VF_DEVICE_ID: 59 case I40E_VF_HV_DEVICE_ID: 60 hw->mac.type = I40E_MAC_VF; 61 break; 62 default: 63 hw->mac.type = I40E_MAC_GENERIC; 64 break; 65 } 66 } else { 67 status = I40E_ERR_DEVICE_NOT_SUPPORTED; 68 } 69 70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n", 71 hw->mac.type, status); 72 return status; 73 } 74 75 /** 76 * i40e_debug_aq 77 * @hw: debug mask related to admin queue 78 * @cap: pointer to adminq command descriptor 79 * @buffer: pointer to command buffer 80 * 81 * Dumps debug log about adminq command with descriptor contents. 82 **/ 83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc, 84 void *buffer) 85 { 86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc; 87 u8 *aq_buffer = (u8 *)buffer; 88 u32 data[4]; 89 u32 i = 0; 90 91 if ((!(mask & hw->debug_mask)) || (desc == NULL)) 92 return; 93 94 i40e_debug(hw, mask, 95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n", 96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen, 97 aq_desc->retval); 98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n", 99 aq_desc->cookie_high, aq_desc->cookie_low); 100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n", 101 aq_desc->params.internal.param0, 102 aq_desc->params.internal.param1); 103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n", 104 aq_desc->params.external.addr_high, 105 aq_desc->params.external.addr_low); 106 107 if ((buffer != NULL) && (aq_desc->datalen != 0)) { 108 memset(data, 0, sizeof(data)); 109 i40e_debug(hw, mask, "AQ CMD Buffer:\n"); 110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) { 111 data[((i % 16) / 4)] |= 112 ((u32)aq_buffer[i]) << (8 * (i % 4)); 113 if ((i % 16) == 15) { 114 i40e_debug(hw, mask, 115 "\t0x%04X %08X %08X %08X %08X\n", 116 i - 15, data[0], data[1], data[2], 117 data[3]); 118 memset(data, 0, sizeof(data)); 119 } 120 } 121 if ((i % 16) != 0) 122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n", 123 i - (i % 16), data[0], data[1], data[2], 124 data[3]); 125 } 126 } 127 128 /** 129 * i40e_init_shared_code - Initialize the shared code 130 * @hw: pointer to hardware structure 131 * 132 * This assigns the MAC type and PHY code and inits the NVM. 133 * Does not touch the hardware. This function must be called prior to any 134 * other function in the shared code. The i40e_hw structure should be 135 * memset to 0 prior to calling this function. The following fields in 136 * hw structure should be filled in prior to calling this function: 137 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 138 * subsystem_vendor_id, and revision_id 139 **/ 140 i40e_status i40e_init_shared_code(struct i40e_hw *hw) 141 { 142 i40e_status status = 0; 143 u32 reg; 144 145 hw->phy.get_link_info = true; 146 147 /* Determine port number */ 148 reg = rd32(hw, I40E_PFGEN_PORTNUM); 149 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >> 150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT); 151 hw->port = (u8)reg; 152 153 i40e_set_mac_type(hw); 154 155 switch (hw->mac.type) { 156 case I40E_MAC_XL710: 157 break; 158 default: 159 return I40E_ERR_DEVICE_NOT_SUPPORTED; 160 break; 161 } 162 163 status = i40e_init_nvm(hw); 164 return status; 165 } 166 167 /** 168 * i40e_aq_mac_address_read - Retrieve the MAC addresses 169 * @hw: pointer to the hw struct 170 * @flags: a return indicator of what addresses were added to the addr store 171 * @addrs: the requestor's mac addr store 172 * @cmd_details: pointer to command details structure or NULL 173 **/ 174 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw, 175 u16 *flags, 176 struct i40e_aqc_mac_address_read_data *addrs, 177 struct i40e_asq_cmd_details *cmd_details) 178 { 179 struct i40e_aq_desc desc; 180 struct i40e_aqc_mac_address_read *cmd_data = 181 (struct i40e_aqc_mac_address_read *)&desc.params.raw; 182 i40e_status status; 183 184 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read); 185 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF); 186 187 status = i40e_asq_send_command(hw, &desc, addrs, 188 sizeof(*addrs), cmd_details); 189 *flags = le16_to_cpu(cmd_data->command_flags); 190 191 return status; 192 } 193 194 /** 195 * i40e_aq_mac_address_write - Change the MAC addresses 196 * @hw: pointer to the hw struct 197 * @flags: indicates which MAC to be written 198 * @mac_addr: address to write 199 * @cmd_details: pointer to command details structure or NULL 200 **/ 201 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw, 202 u16 flags, u8 *mac_addr, 203 struct i40e_asq_cmd_details *cmd_details) 204 { 205 struct i40e_aq_desc desc; 206 struct i40e_aqc_mac_address_write *cmd_data = 207 (struct i40e_aqc_mac_address_write *)&desc.params.raw; 208 i40e_status status; 209 210 i40e_fill_default_direct_cmd_desc(&desc, 211 i40e_aqc_opc_mac_address_write); 212 cmd_data->command_flags = cpu_to_le16(flags); 213 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4); 214 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2); 215 216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 217 218 return status; 219 } 220 221 /** 222 * i40e_get_mac_addr - get MAC address 223 * @hw: pointer to the HW structure 224 * @mac_addr: pointer to MAC address 225 * 226 * Reads the adapter's MAC address from register 227 **/ 228 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr) 229 { 230 struct i40e_aqc_mac_address_read_data addrs; 231 i40e_status status; 232 u16 flags = 0; 233 234 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL); 235 236 if (flags & I40E_AQC_LAN_ADDR_VALID) 237 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac)); 238 239 return status; 240 } 241 242 /** 243 * i40e_validate_mac_addr - Validate MAC address 244 * @mac_addr: pointer to MAC address 245 * 246 * Tests a MAC address to ensure it is a valid Individual Address 247 **/ 248 i40e_status i40e_validate_mac_addr(u8 *mac_addr) 249 { 250 i40e_status status = 0; 251 252 /* Make sure it is not a multicast address */ 253 if (I40E_IS_MULTICAST(mac_addr)) { 254 hw_dbg(hw, "MAC address is multicast\n"); 255 status = I40E_ERR_INVALID_MAC_ADDR; 256 /* Not a broadcast address */ 257 } else if (I40E_IS_BROADCAST(mac_addr)) { 258 hw_dbg(hw, "MAC address is broadcast\n"); 259 status = I40E_ERR_INVALID_MAC_ADDR; 260 /* Reject the zero address */ 261 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 && 262 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) { 263 hw_dbg(hw, "MAC address is all zeros\n"); 264 status = I40E_ERR_INVALID_MAC_ADDR; 265 } 266 return status; 267 } 268 269 /** 270 * i40e_pf_reset - Reset the PF 271 * @hw: pointer to the hardware structure 272 * 273 * Assuming someone else has triggered a global reset, 274 * assure the global reset is complete and then reset the PF 275 **/ 276 i40e_status i40e_pf_reset(struct i40e_hw *hw) 277 { 278 u32 wait_cnt = 0; 279 u32 reg = 0; 280 u32 grst_del; 281 282 /* Poll for Global Reset steady state in case of recent GRST. 283 * The grst delay value is in 100ms units, and we'll wait a 284 * couple counts longer to be sure we don't just miss the end. 285 */ 286 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK 287 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT; 288 for (wait_cnt = 0; wait_cnt < grst_del + 2; wait_cnt++) { 289 reg = rd32(hw, I40E_GLGEN_RSTAT); 290 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK)) 291 break; 292 msleep(100); 293 } 294 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) { 295 hw_dbg(hw, "Global reset polling failed to complete.\n"); 296 return I40E_ERR_RESET_FAILED; 297 } 298 299 /* Determine the PF number based on the PCI fn */ 300 hw->pf_id = (u8)hw->bus.func; 301 302 /* If there was a Global Reset in progress when we got here, 303 * we don't need to do the PF Reset 304 */ 305 if (!wait_cnt) { 306 reg = rd32(hw, I40E_PFGEN_CTRL); 307 wr32(hw, I40E_PFGEN_CTRL, 308 (reg | I40E_PFGEN_CTRL_PFSWR_MASK)); 309 for (wait_cnt = 0; wait_cnt < 10; wait_cnt++) { 310 reg = rd32(hw, I40E_PFGEN_CTRL); 311 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK)) 312 break; 313 usleep_range(1000, 2000); 314 } 315 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) { 316 hw_dbg(hw, "PF reset polling failed to complete.\n"); 317 return I40E_ERR_RESET_FAILED; 318 } 319 } 320 321 i40e_clear_pxe_mode(hw); 322 return 0; 323 } 324 325 /** 326 * i40e_clear_pxe_mode - clear pxe operations mode 327 * @hw: pointer to the hw struct 328 * 329 * Make sure all PXE mode settings are cleared, including things 330 * like descriptor fetch/write-back mode. 331 **/ 332 void i40e_clear_pxe_mode(struct i40e_hw *hw) 333 { 334 u32 reg; 335 336 /* Clear single descriptor fetch/write-back mode */ 337 reg = rd32(hw, I40E_GLLAN_RCTL_0); 338 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK)); 339 } 340 341 /** 342 * i40e_led_get - return current on/off mode 343 * @hw: pointer to the hw struct 344 * 345 * The value returned is the 'mode' field as defined in the 346 * GPIO register definitions: 0x0 = off, 0xf = on, and other 347 * values are variations of possible behaviors relating to 348 * blink, link, and wire. 349 **/ 350 u32 i40e_led_get(struct i40e_hw *hw) 351 { 352 u32 gpio_val = 0; 353 u32 mode = 0; 354 u32 port; 355 int i; 356 357 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) { 358 if (!hw->func_caps.led[i]) 359 continue; 360 361 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i)); 362 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK) 363 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT; 364 365 if (port != hw->port) 366 continue; 367 368 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) 369 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT; 370 break; 371 } 372 373 return mode; 374 } 375 376 /** 377 * i40e_led_set - set new on/off mode 378 * @hw: pointer to the hw struct 379 * @mode: 0=off, else on (see EAS for mode details) 380 **/ 381 void i40e_led_set(struct i40e_hw *hw, u32 mode) 382 { 383 u32 gpio_val = 0; 384 u32 led_mode = 0; 385 u32 port; 386 int i; 387 388 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) { 389 if (!hw->func_caps.led[i]) 390 continue; 391 392 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i)); 393 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK) 394 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT; 395 396 if (port != hw->port) 397 continue; 398 399 led_mode = (mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) & 400 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK; 401 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK; 402 gpio_val |= led_mode; 403 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val); 404 } 405 } 406 407 /* Admin command wrappers */ 408 /** 409 * i40e_aq_queue_shutdown 410 * @hw: pointer to the hw struct 411 * @unloading: is the driver unloading itself 412 * 413 * Tell the Firmware that we're shutting down the AdminQ and whether 414 * or not the driver is unloading as well. 415 **/ 416 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw, 417 bool unloading) 418 { 419 struct i40e_aq_desc desc; 420 struct i40e_aqc_queue_shutdown *cmd = 421 (struct i40e_aqc_queue_shutdown *)&desc.params.raw; 422 i40e_status status; 423 424 i40e_fill_default_direct_cmd_desc(&desc, 425 i40e_aqc_opc_queue_shutdown); 426 427 if (unloading) 428 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING); 429 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL); 430 431 return status; 432 } 433 434 /** 435 * i40e_aq_set_link_restart_an 436 * @hw: pointer to the hw struct 437 * @cmd_details: pointer to command details structure or NULL 438 * 439 * Sets up the link and restarts the Auto-Negotiation over the link. 440 **/ 441 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw, 442 struct i40e_asq_cmd_details *cmd_details) 443 { 444 struct i40e_aq_desc desc; 445 struct i40e_aqc_set_link_restart_an *cmd = 446 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw; 447 i40e_status status; 448 449 i40e_fill_default_direct_cmd_desc(&desc, 450 i40e_aqc_opc_set_link_restart_an); 451 452 cmd->command = I40E_AQ_PHY_RESTART_AN; 453 454 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 455 456 return status; 457 } 458 459 /** 460 * i40e_aq_get_link_info 461 * @hw: pointer to the hw struct 462 * @enable_lse: enable/disable LinkStatusEvent reporting 463 * @link: pointer to link status structure - optional 464 * @cmd_details: pointer to command details structure or NULL 465 * 466 * Returns the link status of the adapter. 467 **/ 468 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw, 469 bool enable_lse, struct i40e_link_status *link, 470 struct i40e_asq_cmd_details *cmd_details) 471 { 472 struct i40e_aq_desc desc; 473 struct i40e_aqc_get_link_status *resp = 474 (struct i40e_aqc_get_link_status *)&desc.params.raw; 475 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 476 i40e_status status; 477 u16 command_flags; 478 479 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status); 480 481 if (enable_lse) 482 command_flags = I40E_AQ_LSE_ENABLE; 483 else 484 command_flags = I40E_AQ_LSE_DISABLE; 485 resp->command_flags = cpu_to_le16(command_flags); 486 487 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 488 489 if (status) 490 goto aq_get_link_info_exit; 491 492 /* save off old link status information */ 493 memcpy(&hw->phy.link_info_old, hw_link_info, 494 sizeof(struct i40e_link_status)); 495 496 /* update link status */ 497 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type; 498 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed; 499 hw_link_info->link_info = resp->link_info; 500 hw_link_info->an_info = resp->an_info; 501 hw_link_info->ext_info = resp->ext_info; 502 503 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE)) 504 hw_link_info->lse_enable = true; 505 else 506 hw_link_info->lse_enable = false; 507 508 /* save link status information */ 509 if (link) 510 *link = *hw_link_info; 511 512 /* flag cleared so helper functions don't call AQ again */ 513 hw->phy.get_link_info = false; 514 515 aq_get_link_info_exit: 516 return status; 517 } 518 519 /** 520 * i40e_aq_add_vsi 521 * @hw: pointer to the hw struct 522 * @vsi: pointer to a vsi context struct 523 * @cmd_details: pointer to command details structure or NULL 524 * 525 * Add a VSI context to the hardware. 526 **/ 527 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw, 528 struct i40e_vsi_context *vsi_ctx, 529 struct i40e_asq_cmd_details *cmd_details) 530 { 531 struct i40e_aq_desc desc; 532 struct i40e_aqc_add_get_update_vsi *cmd = 533 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw; 534 struct i40e_aqc_add_get_update_vsi_completion *resp = 535 (struct i40e_aqc_add_get_update_vsi_completion *) 536 &desc.params.raw; 537 i40e_status status; 538 539 i40e_fill_default_direct_cmd_desc(&desc, 540 i40e_aqc_opc_add_vsi); 541 542 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid); 543 cmd->connection_type = vsi_ctx->connection_type; 544 cmd->vf_id = vsi_ctx->vf_num; 545 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags); 546 547 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 548 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF) 549 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 550 551 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info, 552 sizeof(vsi_ctx->info), cmd_details); 553 554 if (status) 555 goto aq_add_vsi_exit; 556 557 vsi_ctx->seid = le16_to_cpu(resp->seid); 558 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number); 559 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used); 560 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free); 561 562 aq_add_vsi_exit: 563 return status; 564 } 565 566 /** 567 * i40e_aq_set_vsi_unicast_promiscuous 568 * @hw: pointer to the hw struct 569 * @seid: vsi number 570 * @set: set unicast promiscuous enable/disable 571 * @cmd_details: pointer to command details structure or NULL 572 **/ 573 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw, 574 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details) 575 { 576 struct i40e_aq_desc desc; 577 struct i40e_aqc_set_vsi_promiscuous_modes *cmd = 578 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw; 579 i40e_status status; 580 u16 flags = 0; 581 582 i40e_fill_default_direct_cmd_desc(&desc, 583 i40e_aqc_opc_set_vsi_promiscuous_modes); 584 585 if (set) 586 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST; 587 588 cmd->promiscuous_flags = cpu_to_le16(flags); 589 590 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST); 591 592 cmd->seid = cpu_to_le16(seid); 593 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 594 595 return status; 596 } 597 598 /** 599 * i40e_aq_set_vsi_multicast_promiscuous 600 * @hw: pointer to the hw struct 601 * @seid: vsi number 602 * @set: set multicast promiscuous enable/disable 603 * @cmd_details: pointer to command details structure or NULL 604 **/ 605 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw, 606 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details) 607 { 608 struct i40e_aq_desc desc; 609 struct i40e_aqc_set_vsi_promiscuous_modes *cmd = 610 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw; 611 i40e_status status; 612 u16 flags = 0; 613 614 i40e_fill_default_direct_cmd_desc(&desc, 615 i40e_aqc_opc_set_vsi_promiscuous_modes); 616 617 if (set) 618 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST; 619 620 cmd->promiscuous_flags = cpu_to_le16(flags); 621 622 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST); 623 624 cmd->seid = cpu_to_le16(seid); 625 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 626 627 return status; 628 } 629 630 /** 631 * i40e_aq_set_vsi_broadcast 632 * @hw: pointer to the hw struct 633 * @seid: vsi number 634 * @set_filter: true to set filter, false to clear filter 635 * @cmd_details: pointer to command details structure or NULL 636 * 637 * Set or clear the broadcast promiscuous flag (filter) for a given VSI. 638 **/ 639 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw, 640 u16 seid, bool set_filter, 641 struct i40e_asq_cmd_details *cmd_details) 642 { 643 struct i40e_aq_desc desc; 644 struct i40e_aqc_set_vsi_promiscuous_modes *cmd = 645 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw; 646 i40e_status status; 647 648 i40e_fill_default_direct_cmd_desc(&desc, 649 i40e_aqc_opc_set_vsi_promiscuous_modes); 650 651 if (set_filter) 652 cmd->promiscuous_flags 653 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST); 654 else 655 cmd->promiscuous_flags 656 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST); 657 658 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST); 659 cmd->seid = cpu_to_le16(seid); 660 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 661 662 return status; 663 } 664 665 /** 666 * i40e_get_vsi_params - get VSI configuration info 667 * @hw: pointer to the hw struct 668 * @vsi: pointer to a vsi context struct 669 * @cmd_details: pointer to command details structure or NULL 670 **/ 671 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw, 672 struct i40e_vsi_context *vsi_ctx, 673 struct i40e_asq_cmd_details *cmd_details) 674 { 675 struct i40e_aq_desc desc; 676 struct i40e_aqc_switch_seid *cmd = 677 (struct i40e_aqc_switch_seid *)&desc.params.raw; 678 struct i40e_aqc_add_get_update_vsi_completion *resp = 679 (struct i40e_aqc_add_get_update_vsi_completion *) 680 &desc.params.raw; 681 i40e_status status; 682 683 i40e_fill_default_direct_cmd_desc(&desc, 684 i40e_aqc_opc_get_vsi_parameters); 685 686 cmd->seid = cpu_to_le16(vsi_ctx->seid); 687 688 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 689 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF) 690 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 691 692 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info, 693 sizeof(vsi_ctx->info), NULL); 694 695 if (status) 696 goto aq_get_vsi_params_exit; 697 698 vsi_ctx->seid = le16_to_cpu(resp->seid); 699 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number); 700 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used); 701 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free); 702 703 aq_get_vsi_params_exit: 704 return status; 705 } 706 707 /** 708 * i40e_aq_update_vsi_params 709 * @hw: pointer to the hw struct 710 * @vsi: pointer to a vsi context struct 711 * @cmd_details: pointer to command details structure or NULL 712 * 713 * Update a VSI context. 714 **/ 715 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw, 716 struct i40e_vsi_context *vsi_ctx, 717 struct i40e_asq_cmd_details *cmd_details) 718 { 719 struct i40e_aq_desc desc; 720 struct i40e_aqc_switch_seid *cmd = 721 (struct i40e_aqc_switch_seid *)&desc.params.raw; 722 i40e_status status; 723 724 i40e_fill_default_direct_cmd_desc(&desc, 725 i40e_aqc_opc_update_vsi_parameters); 726 cmd->seid = cpu_to_le16(vsi_ctx->seid); 727 728 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 729 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF) 730 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 731 732 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info, 733 sizeof(vsi_ctx->info), cmd_details); 734 735 return status; 736 } 737 738 /** 739 * i40e_aq_get_switch_config 740 * @hw: pointer to the hardware structure 741 * @buf: pointer to the result buffer 742 * @buf_size: length of input buffer 743 * @start_seid: seid to start for the report, 0 == beginning 744 * @cmd_details: pointer to command details structure or NULL 745 * 746 * Fill the buf with switch configuration returned from AdminQ command 747 **/ 748 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw, 749 struct i40e_aqc_get_switch_config_resp *buf, 750 u16 buf_size, u16 *start_seid, 751 struct i40e_asq_cmd_details *cmd_details) 752 { 753 struct i40e_aq_desc desc; 754 struct i40e_aqc_switch_seid *scfg = 755 (struct i40e_aqc_switch_seid *)&desc.params.raw; 756 i40e_status status; 757 758 i40e_fill_default_direct_cmd_desc(&desc, 759 i40e_aqc_opc_get_switch_config); 760 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 761 if (buf_size > I40E_AQ_LARGE_BUF) 762 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 763 scfg->seid = cpu_to_le16(*start_seid); 764 765 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details); 766 *start_seid = le16_to_cpu(scfg->seid); 767 768 return status; 769 } 770 771 /** 772 * i40e_aq_get_firmware_version 773 * @hw: pointer to the hw struct 774 * @fw_major_version: firmware major version 775 * @fw_minor_version: firmware minor version 776 * @api_major_version: major queue version 777 * @api_minor_version: minor queue version 778 * @cmd_details: pointer to command details structure or NULL 779 * 780 * Get the firmware version from the admin queue commands 781 **/ 782 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw, 783 u16 *fw_major_version, u16 *fw_minor_version, 784 u16 *api_major_version, u16 *api_minor_version, 785 struct i40e_asq_cmd_details *cmd_details) 786 { 787 struct i40e_aq_desc desc; 788 struct i40e_aqc_get_version *resp = 789 (struct i40e_aqc_get_version *)&desc.params.raw; 790 i40e_status status; 791 792 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version); 793 794 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 795 796 if (!status) { 797 if (fw_major_version != NULL) 798 *fw_major_version = le16_to_cpu(resp->fw_major); 799 if (fw_minor_version != NULL) 800 *fw_minor_version = le16_to_cpu(resp->fw_minor); 801 if (api_major_version != NULL) 802 *api_major_version = le16_to_cpu(resp->api_major); 803 if (api_minor_version != NULL) 804 *api_minor_version = le16_to_cpu(resp->api_minor); 805 } 806 807 return status; 808 } 809 810 /** 811 * i40e_aq_send_driver_version 812 * @hw: pointer to the hw struct 813 * @event: driver event: driver ok, start or stop 814 * @dv: driver's major, minor version 815 * @cmd_details: pointer to command details structure or NULL 816 * 817 * Send the driver version to the firmware 818 **/ 819 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw, 820 struct i40e_driver_version *dv, 821 struct i40e_asq_cmd_details *cmd_details) 822 { 823 struct i40e_aq_desc desc; 824 struct i40e_aqc_driver_version *cmd = 825 (struct i40e_aqc_driver_version *)&desc.params.raw; 826 i40e_status status; 827 828 if (dv == NULL) 829 return I40E_ERR_PARAM; 830 831 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version); 832 833 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI); 834 cmd->driver_major_ver = dv->major_version; 835 cmd->driver_minor_ver = dv->minor_version; 836 cmd->driver_build_ver = dv->build_version; 837 cmd->driver_subbuild_ver = dv->subbuild_version; 838 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 839 840 return status; 841 } 842 843 /** 844 * i40e_get_link_status - get status of the HW network link 845 * @hw: pointer to the hw struct 846 * 847 * Returns true if link is up, false if link is down. 848 * 849 * Side effect: LinkStatusEvent reporting becomes enabled 850 **/ 851 bool i40e_get_link_status(struct i40e_hw *hw) 852 { 853 i40e_status status = 0; 854 bool link_status = false; 855 856 if (hw->phy.get_link_info) { 857 status = i40e_aq_get_link_info(hw, true, NULL, NULL); 858 859 if (status) 860 goto i40e_get_link_status_exit; 861 } 862 863 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 864 865 i40e_get_link_status_exit: 866 return link_status; 867 } 868 869 /** 870 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC 871 * @hw: pointer to the hw struct 872 * @uplink_seid: the MAC or other gizmo SEID 873 * @downlink_seid: the VSI SEID 874 * @enabled_tc: bitmap of TCs to be enabled 875 * @default_port: true for default port VSI, false for control port 876 * @veb_seid: pointer to where to put the resulting VEB SEID 877 * @cmd_details: pointer to command details structure or NULL 878 * 879 * This asks the FW to add a VEB between the uplink and downlink 880 * elements. If the uplink SEID is 0, this will be a floating VEB. 881 **/ 882 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid, 883 u16 downlink_seid, u8 enabled_tc, 884 bool default_port, u16 *veb_seid, 885 struct i40e_asq_cmd_details *cmd_details) 886 { 887 struct i40e_aq_desc desc; 888 struct i40e_aqc_add_veb *cmd = 889 (struct i40e_aqc_add_veb *)&desc.params.raw; 890 struct i40e_aqc_add_veb_completion *resp = 891 (struct i40e_aqc_add_veb_completion *)&desc.params.raw; 892 i40e_status status; 893 u16 veb_flags = 0; 894 895 /* SEIDs need to either both be set or both be 0 for floating VEB */ 896 if (!!uplink_seid != !!downlink_seid) 897 return I40E_ERR_PARAM; 898 899 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb); 900 901 cmd->uplink_seid = cpu_to_le16(uplink_seid); 902 cmd->downlink_seid = cpu_to_le16(downlink_seid); 903 cmd->enable_tcs = enabled_tc; 904 if (!uplink_seid) 905 veb_flags |= I40E_AQC_ADD_VEB_FLOATING; 906 if (default_port) 907 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT; 908 else 909 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA; 910 cmd->veb_flags = cpu_to_le16(veb_flags); 911 912 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 913 914 if (!status && veb_seid) 915 *veb_seid = le16_to_cpu(resp->veb_seid); 916 917 return status; 918 } 919 920 /** 921 * i40e_aq_get_veb_parameters - Retrieve VEB parameters 922 * @hw: pointer to the hw struct 923 * @veb_seid: the SEID of the VEB to query 924 * @switch_id: the uplink switch id 925 * @floating_veb: set to true if the VEB is floating 926 * @statistic_index: index of the stats counter block for this VEB 927 * @vebs_used: number of VEB's used by function 928 * @vebs_unallocated: total VEB's not reserved by any function 929 * @cmd_details: pointer to command details structure or NULL 930 * 931 * This retrieves the parameters for a particular VEB, specified by 932 * uplink_seid, and returns them to the caller. 933 **/ 934 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw, 935 u16 veb_seid, u16 *switch_id, 936 bool *floating, u16 *statistic_index, 937 u16 *vebs_used, u16 *vebs_free, 938 struct i40e_asq_cmd_details *cmd_details) 939 { 940 struct i40e_aq_desc desc; 941 struct i40e_aqc_get_veb_parameters_completion *cmd_resp = 942 (struct i40e_aqc_get_veb_parameters_completion *) 943 &desc.params.raw; 944 i40e_status status; 945 946 if (veb_seid == 0) 947 return I40E_ERR_PARAM; 948 949 i40e_fill_default_direct_cmd_desc(&desc, 950 i40e_aqc_opc_get_veb_parameters); 951 cmd_resp->seid = cpu_to_le16(veb_seid); 952 953 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 954 if (status) 955 goto get_veb_exit; 956 957 if (switch_id) 958 *switch_id = le16_to_cpu(cmd_resp->switch_id); 959 if (statistic_index) 960 *statistic_index = le16_to_cpu(cmd_resp->statistic_index); 961 if (vebs_used) 962 *vebs_used = le16_to_cpu(cmd_resp->vebs_used); 963 if (vebs_free) 964 *vebs_free = le16_to_cpu(cmd_resp->vebs_free); 965 if (floating) { 966 u16 flags = le16_to_cpu(cmd_resp->veb_flags); 967 if (flags & I40E_AQC_ADD_VEB_FLOATING) 968 *floating = true; 969 else 970 *floating = false; 971 } 972 973 get_veb_exit: 974 return status; 975 } 976 977 /** 978 * i40e_aq_add_macvlan 979 * @hw: pointer to the hw struct 980 * @seid: VSI for the mac address 981 * @mv_list: list of macvlans to be added 982 * @count: length of the list 983 * @cmd_details: pointer to command details structure or NULL 984 * 985 * Add MAC/VLAN addresses to the HW filtering 986 **/ 987 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid, 988 struct i40e_aqc_add_macvlan_element_data *mv_list, 989 u16 count, struct i40e_asq_cmd_details *cmd_details) 990 { 991 struct i40e_aq_desc desc; 992 struct i40e_aqc_macvlan *cmd = 993 (struct i40e_aqc_macvlan *)&desc.params.raw; 994 i40e_status status; 995 u16 buf_size; 996 997 if (count == 0 || !mv_list || !hw) 998 return I40E_ERR_PARAM; 999 1000 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data); 1001 1002 /* prep the rest of the request */ 1003 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan); 1004 cmd->num_addresses = cpu_to_le16(count); 1005 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid); 1006 cmd->seid[1] = 0; 1007 cmd->seid[2] = 0; 1008 1009 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 1010 if (buf_size > I40E_AQ_LARGE_BUF) 1011 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1012 1013 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size, 1014 cmd_details); 1015 1016 return status; 1017 } 1018 1019 /** 1020 * i40e_aq_remove_macvlan 1021 * @hw: pointer to the hw struct 1022 * @seid: VSI for the mac address 1023 * @mv_list: list of macvlans to be removed 1024 * @count: length of the list 1025 * @cmd_details: pointer to command details structure or NULL 1026 * 1027 * Remove MAC/VLAN addresses from the HW filtering 1028 **/ 1029 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid, 1030 struct i40e_aqc_remove_macvlan_element_data *mv_list, 1031 u16 count, struct i40e_asq_cmd_details *cmd_details) 1032 { 1033 struct i40e_aq_desc desc; 1034 struct i40e_aqc_macvlan *cmd = 1035 (struct i40e_aqc_macvlan *)&desc.params.raw; 1036 i40e_status status; 1037 u16 buf_size; 1038 1039 if (count == 0 || !mv_list || !hw) 1040 return I40E_ERR_PARAM; 1041 1042 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data); 1043 1044 /* prep the rest of the request */ 1045 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan); 1046 cmd->num_addresses = cpu_to_le16(count); 1047 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid); 1048 cmd->seid[1] = 0; 1049 cmd->seid[2] = 0; 1050 1051 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 1052 if (buf_size > I40E_AQ_LARGE_BUF) 1053 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1054 1055 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size, 1056 cmd_details); 1057 1058 return status; 1059 } 1060 1061 /** 1062 * i40e_aq_add_vlan - Add VLAN ids to the HW filtering 1063 * @hw: pointer to the hw struct 1064 * @seid: VSI for the vlan filters 1065 * @v_list: list of vlan filters to be added 1066 * @count: length of the list 1067 * @cmd_details: pointer to command details structure or NULL 1068 **/ 1069 i40e_status i40e_aq_add_vlan(struct i40e_hw *hw, u16 seid, 1070 struct i40e_aqc_add_remove_vlan_element_data *v_list, 1071 u8 count, struct i40e_asq_cmd_details *cmd_details) 1072 { 1073 struct i40e_aq_desc desc; 1074 struct i40e_aqc_macvlan *cmd = 1075 (struct i40e_aqc_macvlan *)&desc.params.raw; 1076 i40e_status status; 1077 u16 buf_size; 1078 1079 if (count == 0 || !v_list || !hw) 1080 return I40E_ERR_PARAM; 1081 1082 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data); 1083 1084 /* prep the rest of the request */ 1085 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_vlan); 1086 cmd->num_addresses = cpu_to_le16(count); 1087 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID); 1088 cmd->seid[1] = 0; 1089 cmd->seid[2] = 0; 1090 1091 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 1092 if (buf_size > I40E_AQ_LARGE_BUF) 1093 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1094 1095 status = i40e_asq_send_command(hw, &desc, v_list, buf_size, 1096 cmd_details); 1097 1098 return status; 1099 } 1100 1101 /** 1102 * i40e_aq_remove_vlan - Remove VLANs from the HW filtering 1103 * @hw: pointer to the hw struct 1104 * @seid: VSI for the vlan filters 1105 * @v_list: list of macvlans to be removed 1106 * @count: length of the list 1107 * @cmd_details: pointer to command details structure or NULL 1108 **/ 1109 i40e_status i40e_aq_remove_vlan(struct i40e_hw *hw, u16 seid, 1110 struct i40e_aqc_add_remove_vlan_element_data *v_list, 1111 u8 count, struct i40e_asq_cmd_details *cmd_details) 1112 { 1113 struct i40e_aq_desc desc; 1114 struct i40e_aqc_macvlan *cmd = 1115 (struct i40e_aqc_macvlan *)&desc.params.raw; 1116 i40e_status status; 1117 u16 buf_size; 1118 1119 if (count == 0 || !v_list || !hw) 1120 return I40E_ERR_PARAM; 1121 1122 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data); 1123 1124 /* prep the rest of the request */ 1125 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_vlan); 1126 cmd->num_addresses = cpu_to_le16(count); 1127 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID); 1128 cmd->seid[1] = 0; 1129 cmd->seid[2] = 0; 1130 1131 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 1132 if (buf_size > I40E_AQ_LARGE_BUF) 1133 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1134 1135 status = i40e_asq_send_command(hw, &desc, v_list, buf_size, 1136 cmd_details); 1137 1138 return status; 1139 } 1140 1141 /** 1142 * i40e_aq_send_msg_to_vf 1143 * @hw: pointer to the hardware structure 1144 * @vfid: vf id to send msg 1145 * @msg: pointer to the msg buffer 1146 * @msglen: msg length 1147 * @cmd_details: pointer to command details 1148 * 1149 * send msg to vf 1150 **/ 1151 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid, 1152 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen, 1153 struct i40e_asq_cmd_details *cmd_details) 1154 { 1155 struct i40e_aq_desc desc; 1156 struct i40e_aqc_pf_vf_message *cmd = 1157 (struct i40e_aqc_pf_vf_message *)&desc.params.raw; 1158 i40e_status status; 1159 1160 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf); 1161 cmd->id = cpu_to_le32(vfid); 1162 desc.cookie_high = cpu_to_le32(v_opcode); 1163 desc.cookie_low = cpu_to_le32(v_retval); 1164 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI); 1165 if (msglen) { 1166 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | 1167 I40E_AQ_FLAG_RD)); 1168 if (msglen > I40E_AQ_LARGE_BUF) 1169 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1170 desc.datalen = cpu_to_le16(msglen); 1171 } 1172 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details); 1173 1174 return status; 1175 } 1176 1177 /** 1178 * i40e_aq_set_hmc_resource_profile 1179 * @hw: pointer to the hw struct 1180 * @profile: type of profile the HMC is to be set as 1181 * @pe_vf_enabled_count: the number of PE enabled VFs the system has 1182 * @cmd_details: pointer to command details structure or NULL 1183 * 1184 * set the HMC profile of the device. 1185 **/ 1186 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw, 1187 enum i40e_aq_hmc_profile profile, 1188 u8 pe_vf_enabled_count, 1189 struct i40e_asq_cmd_details *cmd_details) 1190 { 1191 struct i40e_aq_desc desc; 1192 struct i40e_aq_get_set_hmc_resource_profile *cmd = 1193 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw; 1194 i40e_status status; 1195 1196 i40e_fill_default_direct_cmd_desc(&desc, 1197 i40e_aqc_opc_set_hmc_resource_profile); 1198 1199 cmd->pm_profile = (u8)profile; 1200 cmd->pe_vf_enabled = pe_vf_enabled_count; 1201 1202 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1203 1204 return status; 1205 } 1206 1207 /** 1208 * i40e_aq_request_resource 1209 * @hw: pointer to the hw struct 1210 * @resource: resource id 1211 * @access: access type 1212 * @sdp_number: resource number 1213 * @timeout: the maximum time in ms that the driver may hold the resource 1214 * @cmd_details: pointer to command details structure or NULL 1215 * 1216 * requests common resource using the admin queue commands 1217 **/ 1218 i40e_status i40e_aq_request_resource(struct i40e_hw *hw, 1219 enum i40e_aq_resources_ids resource, 1220 enum i40e_aq_resource_access_type access, 1221 u8 sdp_number, u64 *timeout, 1222 struct i40e_asq_cmd_details *cmd_details) 1223 { 1224 struct i40e_aq_desc desc; 1225 struct i40e_aqc_request_resource *cmd_resp = 1226 (struct i40e_aqc_request_resource *)&desc.params.raw; 1227 i40e_status status; 1228 1229 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource); 1230 1231 cmd_resp->resource_id = cpu_to_le16(resource); 1232 cmd_resp->access_type = cpu_to_le16(access); 1233 cmd_resp->resource_number = cpu_to_le32(sdp_number); 1234 1235 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1236 /* The completion specifies the maximum time in ms that the driver 1237 * may hold the resource in the Timeout field. 1238 * If the resource is held by someone else, the command completes with 1239 * busy return value and the timeout field indicates the maximum time 1240 * the current owner of the resource has to free it. 1241 */ 1242 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY) 1243 *timeout = le32_to_cpu(cmd_resp->timeout); 1244 1245 return status; 1246 } 1247 1248 /** 1249 * i40e_aq_release_resource 1250 * @hw: pointer to the hw struct 1251 * @resource: resource id 1252 * @sdp_number: resource number 1253 * @cmd_details: pointer to command details structure or NULL 1254 * 1255 * release common resource using the admin queue commands 1256 **/ 1257 i40e_status i40e_aq_release_resource(struct i40e_hw *hw, 1258 enum i40e_aq_resources_ids resource, 1259 u8 sdp_number, 1260 struct i40e_asq_cmd_details *cmd_details) 1261 { 1262 struct i40e_aq_desc desc; 1263 struct i40e_aqc_request_resource *cmd = 1264 (struct i40e_aqc_request_resource *)&desc.params.raw; 1265 i40e_status status; 1266 1267 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource); 1268 1269 cmd->resource_id = cpu_to_le16(resource); 1270 cmd->resource_number = cpu_to_le32(sdp_number); 1271 1272 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1273 1274 return status; 1275 } 1276 1277 /** 1278 * i40e_aq_read_nvm 1279 * @hw: pointer to the hw struct 1280 * @module_pointer: module pointer location in words from the NVM beginning 1281 * @offset: byte offset from the module beginning 1282 * @length: length of the section to be read (in bytes from the offset) 1283 * @data: command buffer (size [bytes] = length) 1284 * @last_command: tells if this is the last command in a series 1285 * @cmd_details: pointer to command details structure or NULL 1286 * 1287 * Read the NVM using the admin queue commands 1288 **/ 1289 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer, 1290 u32 offset, u16 length, void *data, 1291 bool last_command, 1292 struct i40e_asq_cmd_details *cmd_details) 1293 { 1294 struct i40e_aq_desc desc; 1295 struct i40e_aqc_nvm_update *cmd = 1296 (struct i40e_aqc_nvm_update *)&desc.params.raw; 1297 i40e_status status; 1298 1299 /* In offset the highest byte must be zeroed. */ 1300 if (offset & 0xFF000000) { 1301 status = I40E_ERR_PARAM; 1302 goto i40e_aq_read_nvm_exit; 1303 } 1304 1305 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read); 1306 1307 /* If this is the last command in a series, set the proper flag. */ 1308 if (last_command) 1309 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD; 1310 cmd->module_pointer = module_pointer; 1311 cmd->offset = cpu_to_le32(offset); 1312 cmd->length = cpu_to_le16(length); 1313 1314 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 1315 if (length > I40E_AQ_LARGE_BUF) 1316 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1317 1318 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details); 1319 1320 i40e_aq_read_nvm_exit: 1321 return status; 1322 } 1323 1324 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01 1325 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02 1326 #define I40E_DEV_FUNC_CAP_NPAR 0x03 1327 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04 1328 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05 1329 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12 1330 #define I40E_DEV_FUNC_CAP_VF 0x13 1331 #define I40E_DEV_FUNC_CAP_VMDQ 0x14 1332 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15 1333 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16 1334 #define I40E_DEV_FUNC_CAP_VSI 0x17 1335 #define I40E_DEV_FUNC_CAP_DCB 0x18 1336 #define I40E_DEV_FUNC_CAP_FCOE 0x21 1337 #define I40E_DEV_FUNC_CAP_RSS 0x40 1338 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41 1339 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42 1340 #define I40E_DEV_FUNC_CAP_MSIX 0x43 1341 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44 1342 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45 1343 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46 1344 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1 1345 #define I40E_DEV_FUNC_CAP_CEM 0xF2 1346 #define I40E_DEV_FUNC_CAP_IWARP 0x51 1347 #define I40E_DEV_FUNC_CAP_LED 0x61 1348 #define I40E_DEV_FUNC_CAP_SDP 0x62 1349 #define I40E_DEV_FUNC_CAP_MDIO 0x63 1350 1351 /** 1352 * i40e_parse_discover_capabilities 1353 * @hw: pointer to the hw struct 1354 * @buff: pointer to a buffer containing device/function capability records 1355 * @cap_count: number of capability records in the list 1356 * @list_type_opc: type of capabilities list to parse 1357 * 1358 * Parse the device/function capabilities list. 1359 **/ 1360 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, 1361 u32 cap_count, 1362 enum i40e_admin_queue_opc list_type_opc) 1363 { 1364 struct i40e_aqc_list_capabilities_element_resp *cap; 1365 u32 number, logical_id, phys_id; 1366 struct i40e_hw_capabilities *p; 1367 u32 reg_val; 1368 u32 i = 0; 1369 u16 id; 1370 1371 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff; 1372 1373 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities) 1374 p = (struct i40e_hw_capabilities *)&hw->dev_caps; 1375 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities) 1376 p = (struct i40e_hw_capabilities *)&hw->func_caps; 1377 else 1378 return; 1379 1380 for (i = 0; i < cap_count; i++, cap++) { 1381 id = le16_to_cpu(cap->id); 1382 number = le32_to_cpu(cap->number); 1383 logical_id = le32_to_cpu(cap->logical_id); 1384 phys_id = le32_to_cpu(cap->phys_id); 1385 1386 switch (id) { 1387 case I40E_DEV_FUNC_CAP_SWITCH_MODE: 1388 p->switch_mode = number; 1389 break; 1390 case I40E_DEV_FUNC_CAP_MGMT_MODE: 1391 p->management_mode = number; 1392 break; 1393 case I40E_DEV_FUNC_CAP_NPAR: 1394 p->npar_enable = number; 1395 break; 1396 case I40E_DEV_FUNC_CAP_OS2BMC: 1397 p->os2bmc = number; 1398 break; 1399 case I40E_DEV_FUNC_CAP_VALID_FUNC: 1400 p->valid_functions = number; 1401 break; 1402 case I40E_DEV_FUNC_CAP_SRIOV_1_1: 1403 if (number == 1) 1404 p->sr_iov_1_1 = true; 1405 break; 1406 case I40E_DEV_FUNC_CAP_VF: 1407 p->num_vfs = number; 1408 p->vf_base_id = logical_id; 1409 break; 1410 case I40E_DEV_FUNC_CAP_VMDQ: 1411 if (number == 1) 1412 p->vmdq = true; 1413 break; 1414 case I40E_DEV_FUNC_CAP_802_1_QBG: 1415 if (number == 1) 1416 p->evb_802_1_qbg = true; 1417 break; 1418 case I40E_DEV_FUNC_CAP_802_1_QBH: 1419 if (number == 1) 1420 p->evb_802_1_qbh = true; 1421 break; 1422 case I40E_DEV_FUNC_CAP_VSI: 1423 p->num_vsis = number; 1424 break; 1425 case I40E_DEV_FUNC_CAP_DCB: 1426 if (number == 1) { 1427 p->dcb = true; 1428 p->enabled_tcmap = logical_id; 1429 p->maxtc = phys_id; 1430 } 1431 break; 1432 case I40E_DEV_FUNC_CAP_FCOE: 1433 if (number == 1) 1434 p->fcoe = true; 1435 break; 1436 case I40E_DEV_FUNC_CAP_RSS: 1437 p->rss = true; 1438 reg_val = rd32(hw, I40E_PFQF_CTL_0); 1439 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK) 1440 p->rss_table_size = number; 1441 else 1442 p->rss_table_size = 128; 1443 p->rss_table_entry_width = logical_id; 1444 break; 1445 case I40E_DEV_FUNC_CAP_RX_QUEUES: 1446 p->num_rx_qp = number; 1447 p->base_queue = phys_id; 1448 break; 1449 case I40E_DEV_FUNC_CAP_TX_QUEUES: 1450 p->num_tx_qp = number; 1451 p->base_queue = phys_id; 1452 break; 1453 case I40E_DEV_FUNC_CAP_MSIX: 1454 p->num_msix_vectors = number; 1455 break; 1456 case I40E_DEV_FUNC_CAP_MSIX_VF: 1457 p->num_msix_vectors_vf = number; 1458 break; 1459 case I40E_DEV_FUNC_CAP_MFP_MODE_1: 1460 if (number == 1) 1461 p->mfp_mode_1 = true; 1462 break; 1463 case I40E_DEV_FUNC_CAP_CEM: 1464 if (number == 1) 1465 p->mgmt_cem = true; 1466 break; 1467 case I40E_DEV_FUNC_CAP_IWARP: 1468 if (number == 1) 1469 p->iwarp = true; 1470 break; 1471 case I40E_DEV_FUNC_CAP_LED: 1472 if (phys_id < I40E_HW_CAP_MAX_GPIO) 1473 p->led[phys_id] = true; 1474 break; 1475 case I40E_DEV_FUNC_CAP_SDP: 1476 if (phys_id < I40E_HW_CAP_MAX_GPIO) 1477 p->sdp[phys_id] = true; 1478 break; 1479 case I40E_DEV_FUNC_CAP_MDIO: 1480 if (number == 1) { 1481 p->mdio_port_num = phys_id; 1482 p->mdio_port_mode = logical_id; 1483 } 1484 break; 1485 case I40E_DEV_FUNC_CAP_IEEE_1588: 1486 if (number == 1) 1487 p->ieee_1588 = true; 1488 break; 1489 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR: 1490 p->fd = true; 1491 p->fd_filters_guaranteed = number; 1492 p->fd_filters_best_effort = logical_id; 1493 break; 1494 default: 1495 break; 1496 } 1497 } 1498 1499 /* additional HW specific goodies that might 1500 * someday be HW version specific 1501 */ 1502 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS; 1503 } 1504 1505 /** 1506 * i40e_aq_discover_capabilities 1507 * @hw: pointer to the hw struct 1508 * @buff: a virtual buffer to hold the capabilities 1509 * @buff_size: Size of the virtual buffer 1510 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM 1511 * @list_type_opc: capabilities type to discover - pass in the command opcode 1512 * @cmd_details: pointer to command details structure or NULL 1513 * 1514 * Get the device capabilities descriptions from the firmware 1515 **/ 1516 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw, 1517 void *buff, u16 buff_size, u16 *data_size, 1518 enum i40e_admin_queue_opc list_type_opc, 1519 struct i40e_asq_cmd_details *cmd_details) 1520 { 1521 struct i40e_aqc_list_capabilites *cmd; 1522 i40e_status status = 0; 1523 struct i40e_aq_desc desc; 1524 1525 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw; 1526 1527 if (list_type_opc != i40e_aqc_opc_list_func_capabilities && 1528 list_type_opc != i40e_aqc_opc_list_dev_capabilities) { 1529 status = I40E_ERR_PARAM; 1530 goto exit; 1531 } 1532 1533 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc); 1534 1535 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 1536 if (buff_size > I40E_AQ_LARGE_BUF) 1537 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1538 1539 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details); 1540 *data_size = le16_to_cpu(desc.datalen); 1541 1542 if (status) 1543 goto exit; 1544 1545 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count), 1546 list_type_opc); 1547 1548 exit: 1549 return status; 1550 } 1551 1552 /** 1553 * i40e_aq_get_lldp_mib 1554 * @hw: pointer to the hw struct 1555 * @bridge_type: type of bridge requested 1556 * @mib_type: Local, Remote or both Local and Remote MIBs 1557 * @buff: pointer to a user supplied buffer to store the MIB block 1558 * @buff_size: size of the buffer (in bytes) 1559 * @local_len : length of the returned Local LLDP MIB 1560 * @remote_len: length of the returned Remote LLDP MIB 1561 * @cmd_details: pointer to command details structure or NULL 1562 * 1563 * Requests the complete LLDP MIB (entire packet). 1564 **/ 1565 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type, 1566 u8 mib_type, void *buff, u16 buff_size, 1567 u16 *local_len, u16 *remote_len, 1568 struct i40e_asq_cmd_details *cmd_details) 1569 { 1570 struct i40e_aq_desc desc; 1571 struct i40e_aqc_lldp_get_mib *cmd = 1572 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw; 1573 struct i40e_aqc_lldp_get_mib *resp = 1574 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw; 1575 i40e_status status; 1576 1577 if (buff_size == 0 || !buff) 1578 return I40E_ERR_PARAM; 1579 1580 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib); 1581 /* Indirect Command */ 1582 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 1583 1584 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK; 1585 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) & 1586 I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 1587 1588 desc.datalen = cpu_to_le16(buff_size); 1589 1590 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 1591 if (buff_size > I40E_AQ_LARGE_BUF) 1592 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1593 1594 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details); 1595 if (!status) { 1596 if (local_len != NULL) 1597 *local_len = le16_to_cpu(resp->local_len); 1598 if (remote_len != NULL) 1599 *remote_len = le16_to_cpu(resp->remote_len); 1600 } 1601 1602 return status; 1603 } 1604 1605 /** 1606 * i40e_aq_cfg_lldp_mib_change_event 1607 * @hw: pointer to the hw struct 1608 * @enable_update: Enable or Disable event posting 1609 * @cmd_details: pointer to command details structure or NULL 1610 * 1611 * Enable or Disable posting of an event on ARQ when LLDP MIB 1612 * associated with the interface changes 1613 **/ 1614 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw, 1615 bool enable_update, 1616 struct i40e_asq_cmd_details *cmd_details) 1617 { 1618 struct i40e_aq_desc desc; 1619 struct i40e_aqc_lldp_update_mib *cmd = 1620 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw; 1621 i40e_status status; 1622 1623 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib); 1624 1625 if (!enable_update) 1626 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE; 1627 1628 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1629 1630 return status; 1631 } 1632 1633 /** 1634 * i40e_aq_stop_lldp 1635 * @hw: pointer to the hw struct 1636 * @shutdown_agent: True if LLDP Agent needs to be Shutdown 1637 * @cmd_details: pointer to command details structure or NULL 1638 * 1639 * Stop or Shutdown the embedded LLDP Agent 1640 **/ 1641 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent, 1642 struct i40e_asq_cmd_details *cmd_details) 1643 { 1644 struct i40e_aq_desc desc; 1645 struct i40e_aqc_lldp_stop *cmd = 1646 (struct i40e_aqc_lldp_stop *)&desc.params.raw; 1647 i40e_status status; 1648 1649 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop); 1650 1651 if (shutdown_agent) 1652 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN; 1653 1654 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1655 1656 return status; 1657 } 1658 1659 /** 1660 * i40e_aq_start_lldp 1661 * @hw: pointer to the hw struct 1662 * @cmd_details: pointer to command details structure or NULL 1663 * 1664 * Start the embedded LLDP Agent on all ports. 1665 **/ 1666 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw, 1667 struct i40e_asq_cmd_details *cmd_details) 1668 { 1669 struct i40e_aq_desc desc; 1670 struct i40e_aqc_lldp_start *cmd = 1671 (struct i40e_aqc_lldp_start *)&desc.params.raw; 1672 i40e_status status; 1673 1674 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start); 1675 1676 cmd->command = I40E_AQ_LLDP_AGENT_START; 1677 1678 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1679 1680 return status; 1681 } 1682 1683 /** 1684 * i40e_aq_delete_element - Delete switch element 1685 * @hw: pointer to the hw struct 1686 * @seid: the SEID to delete from the switch 1687 * @cmd_details: pointer to command details structure or NULL 1688 * 1689 * This deletes a switch element from the switch. 1690 **/ 1691 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid, 1692 struct i40e_asq_cmd_details *cmd_details) 1693 { 1694 struct i40e_aq_desc desc; 1695 struct i40e_aqc_switch_seid *cmd = 1696 (struct i40e_aqc_switch_seid *)&desc.params.raw; 1697 i40e_status status; 1698 1699 if (seid == 0) 1700 return I40E_ERR_PARAM; 1701 1702 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element); 1703 1704 cmd->seid = cpu_to_le16(seid); 1705 1706 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1707 1708 return status; 1709 } 1710 1711 /** 1712 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler 1713 * @hw: pointer to the hw struct 1714 * @seid: seid for the physical port/switching component/vsi 1715 * @buff: Indirect buffer to hold data parameters and response 1716 * @buff_size: Indirect buffer size 1717 * @opcode: Tx scheduler AQ command opcode 1718 * @cmd_details: pointer to command details structure or NULL 1719 * 1720 * Generic command handler for Tx scheduler AQ commands 1721 **/ 1722 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid, 1723 void *buff, u16 buff_size, 1724 enum i40e_admin_queue_opc opcode, 1725 struct i40e_asq_cmd_details *cmd_details) 1726 { 1727 struct i40e_aq_desc desc; 1728 struct i40e_aqc_tx_sched_ind *cmd = 1729 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw; 1730 i40e_status status; 1731 bool cmd_param_flag = false; 1732 1733 switch (opcode) { 1734 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit: 1735 case i40e_aqc_opc_configure_vsi_tc_bw: 1736 case i40e_aqc_opc_enable_switching_comp_ets: 1737 case i40e_aqc_opc_modify_switching_comp_ets: 1738 case i40e_aqc_opc_disable_switching_comp_ets: 1739 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit: 1740 case i40e_aqc_opc_configure_switching_comp_bw_config: 1741 cmd_param_flag = true; 1742 break; 1743 case i40e_aqc_opc_query_vsi_bw_config: 1744 case i40e_aqc_opc_query_vsi_ets_sla_config: 1745 case i40e_aqc_opc_query_switching_comp_ets_config: 1746 case i40e_aqc_opc_query_port_ets_config: 1747 case i40e_aqc_opc_query_switching_comp_bw_config: 1748 cmd_param_flag = false; 1749 break; 1750 default: 1751 return I40E_ERR_PARAM; 1752 } 1753 1754 i40e_fill_default_direct_cmd_desc(&desc, opcode); 1755 1756 /* Indirect command */ 1757 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 1758 if (cmd_param_flag) 1759 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD); 1760 if (buff_size > I40E_AQ_LARGE_BUF) 1761 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB); 1762 1763 desc.datalen = cpu_to_le16(buff_size); 1764 1765 cmd->vsi_seid = cpu_to_le16(seid); 1766 1767 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details); 1768 1769 return status; 1770 } 1771 1772 /** 1773 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC 1774 * @hw: pointer to the hw struct 1775 * @seid: VSI seid 1776 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits 1777 * @cmd_details: pointer to command details structure or NULL 1778 **/ 1779 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw, 1780 u16 seid, 1781 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data, 1782 struct i40e_asq_cmd_details *cmd_details) 1783 { 1784 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data), 1785 i40e_aqc_opc_configure_vsi_tc_bw, 1786 cmd_details); 1787 } 1788 1789 /** 1790 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration 1791 * @hw: pointer to the hw struct 1792 * @seid: seid of the VSI 1793 * @bw_data: Buffer to hold VSI BW configuration 1794 * @cmd_details: pointer to command details structure or NULL 1795 **/ 1796 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw, 1797 u16 seid, 1798 struct i40e_aqc_query_vsi_bw_config_resp *bw_data, 1799 struct i40e_asq_cmd_details *cmd_details) 1800 { 1801 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data), 1802 i40e_aqc_opc_query_vsi_bw_config, 1803 cmd_details); 1804 } 1805 1806 /** 1807 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC 1808 * @hw: pointer to the hw struct 1809 * @seid: seid of the VSI 1810 * @bw_data: Buffer to hold VSI BW configuration per TC 1811 * @cmd_details: pointer to command details structure or NULL 1812 **/ 1813 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw, 1814 u16 seid, 1815 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data, 1816 struct i40e_asq_cmd_details *cmd_details) 1817 { 1818 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data), 1819 i40e_aqc_opc_query_vsi_ets_sla_config, 1820 cmd_details); 1821 } 1822 1823 /** 1824 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC 1825 * @hw: pointer to the hw struct 1826 * @seid: seid of the switching component 1827 * @bw_data: Buffer to hold switching component's per TC BW config 1828 * @cmd_details: pointer to command details structure or NULL 1829 **/ 1830 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw, 1831 u16 seid, 1832 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data, 1833 struct i40e_asq_cmd_details *cmd_details) 1834 { 1835 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data), 1836 i40e_aqc_opc_query_switching_comp_ets_config, 1837 cmd_details); 1838 } 1839 1840 /** 1841 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration 1842 * @hw: pointer to the hw struct 1843 * @seid: seid of the VSI or switching component connected to Physical Port 1844 * @bw_data: Buffer to hold current ETS configuration for the Physical Port 1845 * @cmd_details: pointer to command details structure or NULL 1846 **/ 1847 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw, 1848 u16 seid, 1849 struct i40e_aqc_query_port_ets_config_resp *bw_data, 1850 struct i40e_asq_cmd_details *cmd_details) 1851 { 1852 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data), 1853 i40e_aqc_opc_query_port_ets_config, 1854 cmd_details); 1855 } 1856 1857 /** 1858 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration 1859 * @hw: pointer to the hw struct 1860 * @seid: seid of the switching component 1861 * @bw_data: Buffer to hold switching component's BW configuration 1862 * @cmd_details: pointer to command details structure or NULL 1863 **/ 1864 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw, 1865 u16 seid, 1866 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data, 1867 struct i40e_asq_cmd_details *cmd_details) 1868 { 1869 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data), 1870 i40e_aqc_opc_query_switching_comp_bw_config, 1871 cmd_details); 1872 } 1873 1874 /** 1875 * i40e_validate_filter_settings 1876 * @hw: pointer to the hardware structure 1877 * @settings: Filter control settings 1878 * 1879 * Check and validate the filter control settings passed. 1880 * The function checks for the valid filter/context sizes being 1881 * passed for FCoE and PE. 1882 * 1883 * Returns 0 if the values passed are valid and within 1884 * range else returns an error. 1885 **/ 1886 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw, 1887 struct i40e_filter_control_settings *settings) 1888 { 1889 u32 fcoe_cntx_size, fcoe_filt_size; 1890 u32 pe_cntx_size, pe_filt_size; 1891 u32 fcoe_fmax, pe_fmax; 1892 u32 val; 1893 1894 /* Validate FCoE settings passed */ 1895 switch (settings->fcoe_filt_num) { 1896 case I40E_HASH_FILTER_SIZE_1K: 1897 case I40E_HASH_FILTER_SIZE_2K: 1898 case I40E_HASH_FILTER_SIZE_4K: 1899 case I40E_HASH_FILTER_SIZE_8K: 1900 case I40E_HASH_FILTER_SIZE_16K: 1901 case I40E_HASH_FILTER_SIZE_32K: 1902 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE; 1903 fcoe_filt_size <<= (u32)settings->fcoe_filt_num; 1904 break; 1905 default: 1906 return I40E_ERR_PARAM; 1907 } 1908 1909 switch (settings->fcoe_cntx_num) { 1910 case I40E_DMA_CNTX_SIZE_512: 1911 case I40E_DMA_CNTX_SIZE_1K: 1912 case I40E_DMA_CNTX_SIZE_2K: 1913 case I40E_DMA_CNTX_SIZE_4K: 1914 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE; 1915 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num; 1916 break; 1917 default: 1918 return I40E_ERR_PARAM; 1919 } 1920 1921 /* Validate PE settings passed */ 1922 switch (settings->pe_filt_num) { 1923 case I40E_HASH_FILTER_SIZE_1K: 1924 case I40E_HASH_FILTER_SIZE_2K: 1925 case I40E_HASH_FILTER_SIZE_4K: 1926 case I40E_HASH_FILTER_SIZE_8K: 1927 case I40E_HASH_FILTER_SIZE_16K: 1928 case I40E_HASH_FILTER_SIZE_32K: 1929 case I40E_HASH_FILTER_SIZE_64K: 1930 case I40E_HASH_FILTER_SIZE_128K: 1931 case I40E_HASH_FILTER_SIZE_256K: 1932 case I40E_HASH_FILTER_SIZE_512K: 1933 case I40E_HASH_FILTER_SIZE_1M: 1934 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE; 1935 pe_filt_size <<= (u32)settings->pe_filt_num; 1936 break; 1937 default: 1938 return I40E_ERR_PARAM; 1939 } 1940 1941 switch (settings->pe_cntx_num) { 1942 case I40E_DMA_CNTX_SIZE_512: 1943 case I40E_DMA_CNTX_SIZE_1K: 1944 case I40E_DMA_CNTX_SIZE_2K: 1945 case I40E_DMA_CNTX_SIZE_4K: 1946 case I40E_DMA_CNTX_SIZE_8K: 1947 case I40E_DMA_CNTX_SIZE_16K: 1948 case I40E_DMA_CNTX_SIZE_32K: 1949 case I40E_DMA_CNTX_SIZE_64K: 1950 case I40E_DMA_CNTX_SIZE_128K: 1951 case I40E_DMA_CNTX_SIZE_256K: 1952 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE; 1953 pe_cntx_size <<= (u32)settings->pe_cntx_num; 1954 break; 1955 default: 1956 return I40E_ERR_PARAM; 1957 } 1958 1959 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */ 1960 val = rd32(hw, I40E_GLHMC_FCOEFMAX); 1961 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK) 1962 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT; 1963 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax) 1964 return I40E_ERR_INVALID_SIZE; 1965 1966 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */ 1967 val = rd32(hw, I40E_GLHMC_PEXFMAX); 1968 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK) 1969 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT; 1970 if (pe_filt_size + pe_cntx_size > pe_fmax) 1971 return I40E_ERR_INVALID_SIZE; 1972 1973 return 0; 1974 } 1975 1976 /** 1977 * i40e_set_filter_control 1978 * @hw: pointer to the hardware structure 1979 * @settings: Filter control settings 1980 * 1981 * Set the Queue Filters for PE/FCoE and enable filters required 1982 * for a single PF. It is expected that these settings are programmed 1983 * at the driver initialization time. 1984 **/ 1985 i40e_status i40e_set_filter_control(struct i40e_hw *hw, 1986 struct i40e_filter_control_settings *settings) 1987 { 1988 i40e_status ret = 0; 1989 u32 hash_lut_size = 0; 1990 u32 val; 1991 1992 if (!settings) 1993 return I40E_ERR_PARAM; 1994 1995 /* Validate the input settings */ 1996 ret = i40e_validate_filter_settings(hw, settings); 1997 if (ret) 1998 return ret; 1999 2000 /* Read the PF Queue Filter control register */ 2001 val = rd32(hw, I40E_PFQF_CTL_0); 2002 2003 /* Program required PE hash buckets for the PF */ 2004 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK; 2005 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) & 2006 I40E_PFQF_CTL_0_PEHSIZE_MASK; 2007 /* Program required PE contexts for the PF */ 2008 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK; 2009 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) & 2010 I40E_PFQF_CTL_0_PEDSIZE_MASK; 2011 2012 /* Program required FCoE hash buckets for the PF */ 2013 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK; 2014 val |= ((u32)settings->fcoe_filt_num << 2015 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) & 2016 I40E_PFQF_CTL_0_PFFCHSIZE_MASK; 2017 /* Program required FCoE DDP contexts for the PF */ 2018 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK; 2019 val |= ((u32)settings->fcoe_cntx_num << 2020 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) & 2021 I40E_PFQF_CTL_0_PFFCDSIZE_MASK; 2022 2023 /* Program Hash LUT size for the PF */ 2024 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK; 2025 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512) 2026 hash_lut_size = 1; 2027 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) & 2028 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK; 2029 2030 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */ 2031 if (settings->enable_fdir) 2032 val |= I40E_PFQF_CTL_0_FD_ENA_MASK; 2033 if (settings->enable_ethtype) 2034 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK; 2035 if (settings->enable_macvlan) 2036 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK; 2037 2038 wr32(hw, I40E_PFQF_CTL_0, val); 2039 2040 return 0; 2041 } 2042