1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2014 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 #ifndef _I40E_ADMINQ_H_ 28 #define _I40E_ADMINQ_H_ 29 30 #include "i40e_osdep.h" 31 #include "i40e_status.h" 32 #include "i40e_adminq_cmd.h" 33 34 #define I40E_ADMINQ_DESC(R, i) \ 35 (&(((struct i40e_aq_desc *)((R).desc_buf.va))[i])) 36 37 #define I40E_ADMINQ_DESC_ALIGNMENT 4096 38 39 struct i40e_adminq_ring { 40 struct i40e_virt_mem dma_head; /* space for dma structures */ 41 struct i40e_dma_mem desc_buf; /* descriptor ring memory */ 42 struct i40e_virt_mem cmd_buf; /* command buffer memory */ 43 44 union { 45 struct i40e_dma_mem *asq_bi; 46 struct i40e_dma_mem *arq_bi; 47 } r; 48 49 u16 count; /* Number of descriptors */ 50 u16 rx_buf_len; /* Admin Receive Queue buffer length */ 51 52 /* used for interrupt processing */ 53 u16 next_to_use; 54 u16 next_to_clean; 55 56 /* used for queue tracking */ 57 u32 head; 58 u32 tail; 59 u32 len; 60 u32 bah; 61 u32 bal; 62 }; 63 64 /* ASQ transaction details */ 65 struct i40e_asq_cmd_details { 66 void *callback; /* cast from type I40E_ADMINQ_CALLBACK */ 67 u64 cookie; 68 u16 flags_ena; 69 u16 flags_dis; 70 bool async; 71 bool postpone; 72 struct i40e_aq_desc *wb_desc; 73 }; 74 75 #define I40E_ADMINQ_DETAILS(R, i) \ 76 (&(((struct i40e_asq_cmd_details *)((R).cmd_buf.va))[i])) 77 78 /* ARQ event information */ 79 struct i40e_arq_event_info { 80 struct i40e_aq_desc desc; 81 u16 msg_len; 82 u16 buf_len; 83 u8 *msg_buf; 84 }; 85 86 /* Admin Queue information */ 87 struct i40e_adminq_info { 88 struct i40e_adminq_ring arq; /* receive queue */ 89 struct i40e_adminq_ring asq; /* send queue */ 90 u32 asq_cmd_timeout; /* send queue cmd write back timeout*/ 91 u16 num_arq_entries; /* receive queue depth */ 92 u16 num_asq_entries; /* send queue depth */ 93 u16 arq_buf_size; /* receive queue buffer size */ 94 u16 asq_buf_size; /* send queue buffer size */ 95 u16 fw_maj_ver; /* firmware major version */ 96 u16 fw_min_ver; /* firmware minor version */ 97 u32 fw_build; /* firmware build number */ 98 u16 api_maj_ver; /* api major version */ 99 u16 api_min_ver; /* api minor version */ 100 101 struct mutex asq_mutex; /* Send queue lock */ 102 struct mutex arq_mutex; /* Receive queue lock */ 103 104 /* last status values on send and receive queues */ 105 enum i40e_admin_queue_err asq_last_status; 106 enum i40e_admin_queue_err arq_last_status; 107 }; 108 109 /** 110 * i40e_aq_rc_to_posix - convert errors to user-land codes 111 * aq_ret: AdminQ handler error code can override aq_rc 112 * aq_rc: AdminQ firmware error code to convert 113 **/ 114 static inline int i40e_aq_rc_to_posix(int aq_ret, int aq_rc) 115 { 116 int aq_to_posix[] = { 117 0, /* I40E_AQ_RC_OK */ 118 -EPERM, /* I40E_AQ_RC_EPERM */ 119 -ENOENT, /* I40E_AQ_RC_ENOENT */ 120 -ESRCH, /* I40E_AQ_RC_ESRCH */ 121 -EINTR, /* I40E_AQ_RC_EINTR */ 122 -EIO, /* I40E_AQ_RC_EIO */ 123 -ENXIO, /* I40E_AQ_RC_ENXIO */ 124 -E2BIG, /* I40E_AQ_RC_E2BIG */ 125 -EAGAIN, /* I40E_AQ_RC_EAGAIN */ 126 -ENOMEM, /* I40E_AQ_RC_ENOMEM */ 127 -EACCES, /* I40E_AQ_RC_EACCES */ 128 -EFAULT, /* I40E_AQ_RC_EFAULT */ 129 -EBUSY, /* I40E_AQ_RC_EBUSY */ 130 -EEXIST, /* I40E_AQ_RC_EEXIST */ 131 -EINVAL, /* I40E_AQ_RC_EINVAL */ 132 -ENOTTY, /* I40E_AQ_RC_ENOTTY */ 133 -ENOSPC, /* I40E_AQ_RC_ENOSPC */ 134 -ENOSYS, /* I40E_AQ_RC_ENOSYS */ 135 -ERANGE, /* I40E_AQ_RC_ERANGE */ 136 -EPIPE, /* I40E_AQ_RC_EFLUSHED */ 137 -ESPIPE, /* I40E_AQ_RC_BAD_ADDR */ 138 -EROFS, /* I40E_AQ_RC_EMODE */ 139 -EFBIG, /* I40E_AQ_RC_EFBIG */ 140 }; 141 142 /* aq_rc is invalid if AQ timed out */ 143 if (aq_ret == I40E_ERR_ADMIN_QUEUE_TIMEOUT) 144 return -EAGAIN; 145 146 if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0])))) 147 return -ERANGE; 148 149 return aq_to_posix[aq_rc]; 150 } 151 152 /* general information */ 153 #define I40E_AQ_LARGE_BUF 512 154 #define I40E_ASQ_CMD_TIMEOUT 250000 /* usecs */ 155 156 void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, 157 u16 opcode); 158 159 #endif /* _I40E_ADMINQ_H_ */ 160