1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /******************************************************************************* 3 * 4 * Intel Ethernet Controller XL710 Family Linux Driver 5 * Copyright(c) 2013 - 2014 Intel Corporation. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, 9 * version 2, as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program. If not, see <http://www.gnu.org/licenses/>. 18 * 19 * The full GNU General Public License is included in this distribution in 20 * the file called "COPYING". 21 * 22 * Contact Information: 23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 * 26 ******************************************************************************/ 27 28 #ifndef _I40E_ADMINQ_H_ 29 #define _I40E_ADMINQ_H_ 30 31 #include "i40e_osdep.h" 32 #include "i40e_status.h" 33 #include "i40e_adminq_cmd.h" 34 35 #define I40E_ADMINQ_DESC(R, i) \ 36 (&(((struct i40e_aq_desc *)((R).desc_buf.va))[i])) 37 38 #define I40E_ADMINQ_DESC_ALIGNMENT 4096 39 40 struct i40e_adminq_ring { 41 struct i40e_virt_mem dma_head; /* space for dma structures */ 42 struct i40e_dma_mem desc_buf; /* descriptor ring memory */ 43 struct i40e_virt_mem cmd_buf; /* command buffer memory */ 44 45 union { 46 struct i40e_dma_mem *asq_bi; 47 struct i40e_dma_mem *arq_bi; 48 } r; 49 50 u16 count; /* Number of descriptors */ 51 u16 rx_buf_len; /* Admin Receive Queue buffer length */ 52 53 /* used for interrupt processing */ 54 u16 next_to_use; 55 u16 next_to_clean; 56 57 /* used for queue tracking */ 58 u32 head; 59 u32 tail; 60 u32 len; 61 u32 bah; 62 u32 bal; 63 }; 64 65 /* ASQ transaction details */ 66 struct i40e_asq_cmd_details { 67 void *callback; /* cast from type I40E_ADMINQ_CALLBACK */ 68 u64 cookie; 69 u16 flags_ena; 70 u16 flags_dis; 71 bool async; 72 bool postpone; 73 struct i40e_aq_desc *wb_desc; 74 }; 75 76 #define I40E_ADMINQ_DETAILS(R, i) \ 77 (&(((struct i40e_asq_cmd_details *)((R).cmd_buf.va))[i])) 78 79 /* ARQ event information */ 80 struct i40e_arq_event_info { 81 struct i40e_aq_desc desc; 82 u16 msg_len; 83 u16 buf_len; 84 u8 *msg_buf; 85 }; 86 87 /* Admin Queue information */ 88 struct i40e_adminq_info { 89 struct i40e_adminq_ring arq; /* receive queue */ 90 struct i40e_adminq_ring asq; /* send queue */ 91 u32 asq_cmd_timeout; /* send queue cmd write back timeout*/ 92 u16 num_arq_entries; /* receive queue depth */ 93 u16 num_asq_entries; /* send queue depth */ 94 u16 arq_buf_size; /* receive queue buffer size */ 95 u16 asq_buf_size; /* send queue buffer size */ 96 u16 fw_maj_ver; /* firmware major version */ 97 u16 fw_min_ver; /* firmware minor version */ 98 u32 fw_build; /* firmware build number */ 99 u16 api_maj_ver; /* api major version */ 100 u16 api_min_ver; /* api minor version */ 101 102 struct mutex asq_mutex; /* Send queue lock */ 103 struct mutex arq_mutex; /* Receive queue lock */ 104 105 /* last status values on send and receive queues */ 106 enum i40e_admin_queue_err asq_last_status; 107 enum i40e_admin_queue_err arq_last_status; 108 }; 109 110 /** 111 * i40e_aq_rc_to_posix - convert errors to user-land codes 112 * aq_ret: AdminQ handler error code can override aq_rc 113 * aq_rc: AdminQ firmware error code to convert 114 **/ 115 static inline int i40e_aq_rc_to_posix(int aq_ret, int aq_rc) 116 { 117 int aq_to_posix[] = { 118 0, /* I40E_AQ_RC_OK */ 119 -EPERM, /* I40E_AQ_RC_EPERM */ 120 -ENOENT, /* I40E_AQ_RC_ENOENT */ 121 -ESRCH, /* I40E_AQ_RC_ESRCH */ 122 -EINTR, /* I40E_AQ_RC_EINTR */ 123 -EIO, /* I40E_AQ_RC_EIO */ 124 -ENXIO, /* I40E_AQ_RC_ENXIO */ 125 -E2BIG, /* I40E_AQ_RC_E2BIG */ 126 -EAGAIN, /* I40E_AQ_RC_EAGAIN */ 127 -ENOMEM, /* I40E_AQ_RC_ENOMEM */ 128 -EACCES, /* I40E_AQ_RC_EACCES */ 129 -EFAULT, /* I40E_AQ_RC_EFAULT */ 130 -EBUSY, /* I40E_AQ_RC_EBUSY */ 131 -EEXIST, /* I40E_AQ_RC_EEXIST */ 132 -EINVAL, /* I40E_AQ_RC_EINVAL */ 133 -ENOTTY, /* I40E_AQ_RC_ENOTTY */ 134 -ENOSPC, /* I40E_AQ_RC_ENOSPC */ 135 -ENOSYS, /* I40E_AQ_RC_ENOSYS */ 136 -ERANGE, /* I40E_AQ_RC_ERANGE */ 137 -EPIPE, /* I40E_AQ_RC_EFLUSHED */ 138 -ESPIPE, /* I40E_AQ_RC_BAD_ADDR */ 139 -EROFS, /* I40E_AQ_RC_EMODE */ 140 -EFBIG, /* I40E_AQ_RC_EFBIG */ 141 }; 142 143 /* aq_rc is invalid if AQ timed out */ 144 if (aq_ret == I40E_ERR_ADMIN_QUEUE_TIMEOUT) 145 return -EAGAIN; 146 147 if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0])))) 148 return -ERANGE; 149 150 return aq_to_posix[aq_rc]; 151 } 152 153 /* general information */ 154 #define I40E_AQ_LARGE_BUF 512 155 #define I40E_ASQ_CMD_TIMEOUT 250000 /* usecs */ 156 157 void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, 158 u16 opcode); 159 160 #endif /* _I40E_ADMINQ_H_ */ 161