1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 #ifndef _I40E_H_ 28 #define _I40E_H_ 29 30 #include <net/tcp.h> 31 #include <net/udp.h> 32 #include <linux/types.h> 33 #include <linux/errno.h> 34 #include <linux/module.h> 35 #include <linux/pci.h> 36 #include <linux/aer.h> 37 #include <linux/netdevice.h> 38 #include <linux/ioport.h> 39 #include <linux/iommu.h> 40 #include <linux/slab.h> 41 #include <linux/list.h> 42 #include <linux/hashtable.h> 43 #include <linux/string.h> 44 #include <linux/in.h> 45 #include <linux/ip.h> 46 #include <linux/sctp.h> 47 #include <linux/pkt_sched.h> 48 #include <linux/ipv6.h> 49 #include <net/checksum.h> 50 #include <net/ip6_checksum.h> 51 #include <linux/ethtool.h> 52 #include <linux/if_vlan.h> 53 #include <linux/if_bridge.h> 54 #include <linux/clocksource.h> 55 #include <linux/net_tstamp.h> 56 #include <linux/ptp_clock_kernel.h> 57 #include "i40e_type.h" 58 #include "i40e_prototype.h" 59 #include "i40e_client.h" 60 #include "i40e_virtchnl.h" 61 #include "i40e_virtchnl_pf.h" 62 #include "i40e_txrx.h" 63 #include "i40e_dcb.h" 64 65 /* Useful i40e defaults */ 66 #define I40E_MAX_VEB 16 67 68 #define I40E_MAX_NUM_DESCRIPTORS 4096 69 #define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024) 70 #define I40E_DEFAULT_NUM_DESCRIPTORS 512 71 #define I40E_REQ_DESCRIPTOR_MULTIPLE 32 72 #define I40E_MIN_NUM_DESCRIPTORS 64 73 #define I40E_MIN_MSIX 2 74 #define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */ 75 #define I40E_MIN_VSI_ALLOC 83 /* LAN, ATR, FCOE, 64 VF */ 76 /* max 16 qps */ 77 #define i40e_default_queues_per_vmdq(pf) \ 78 (((pf)->flags & I40E_FLAG_RSS_AQ_CAPABLE) ? 4 : 1) 79 #define I40E_DEFAULT_QUEUES_PER_VF 4 80 #define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */ 81 #define i40e_pf_get_max_q_per_tc(pf) \ 82 (((pf)->flags & I40E_FLAG_128_QP_RSS_CAPABLE) ? 128 : 64) 83 #define I40E_FDIR_RING 0 84 #define I40E_FDIR_RING_COUNT 32 85 #define I40E_MAX_AQ_BUF_SIZE 4096 86 #define I40E_AQ_LEN 256 87 #define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */ 88 #define I40E_MAX_USER_PRIORITY 8 89 #define I40E_DEFAULT_TRAFFIC_CLASS BIT(0) 90 #define I40E_DEFAULT_MSG_ENABLE 4 91 #define I40E_QUEUE_WAIT_RETRY_LIMIT 10 92 #define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16) 93 94 #define I40E_NVM_VERSION_LO_SHIFT 0 95 #define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT) 96 #define I40E_NVM_VERSION_HI_SHIFT 12 97 #define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT) 98 #define I40E_OEM_VER_BUILD_MASK 0xffff 99 #define I40E_OEM_VER_PATCH_MASK 0xff 100 #define I40E_OEM_VER_BUILD_SHIFT 8 101 #define I40E_OEM_VER_SHIFT 24 102 #define I40E_PHY_DEBUG_ALL \ 103 (I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW | \ 104 I40E_AQ_PHY_DEBUG_DISABLE_ALL_LINK_FW) 105 106 /* The values in here are decimal coded as hex as is the case in the NVM map*/ 107 #define I40E_CURRENT_NVM_VERSION_HI 0x2 108 #define I40E_CURRENT_NVM_VERSION_LO 0x40 109 110 #define I40E_RX_DESC(R, i) \ 111 (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])) 112 #define I40E_TX_DESC(R, i) \ 113 (&(((struct i40e_tx_desc *)((R)->desc))[i])) 114 #define I40E_TX_CTXTDESC(R, i) \ 115 (&(((struct i40e_tx_context_desc *)((R)->desc))[i])) 116 #define I40E_TX_FDIRDESC(R, i) \ 117 (&(((struct i40e_filter_program_desc *)((R)->desc))[i])) 118 119 /* default to trying for four seconds */ 120 #define I40E_TRY_LINK_TIMEOUT (4 * HZ) 121 122 /* driver state flags */ 123 enum i40e_state_t { 124 __I40E_TESTING, 125 __I40E_CONFIG_BUSY, 126 __I40E_CONFIG_DONE, 127 __I40E_DOWN, 128 __I40E_SERVICE_SCHED, 129 __I40E_ADMINQ_EVENT_PENDING, 130 __I40E_MDD_EVENT_PENDING, 131 __I40E_VFLR_EVENT_PENDING, 132 __I40E_RESET_RECOVERY_PENDING, 133 __I40E_RESET_INTR_RECEIVED, 134 __I40E_REINIT_REQUESTED, 135 __I40E_PF_RESET_REQUESTED, 136 __I40E_CORE_RESET_REQUESTED, 137 __I40E_GLOBAL_RESET_REQUESTED, 138 __I40E_EMP_RESET_REQUESTED, 139 __I40E_EMP_RESET_INTR_RECEIVED, 140 __I40E_SUSPENDED, 141 __I40E_PTP_TX_IN_PROGRESS, 142 __I40E_BAD_EEPROM, 143 __I40E_DOWN_REQUESTED, 144 __I40E_FD_FLUSH_REQUESTED, 145 __I40E_RESET_FAILED, 146 __I40E_PORT_SUSPENDED, 147 __I40E_VF_DISABLE, 148 /* This must be last as it determines the size of the BITMAP */ 149 __I40E_STATE_SIZE__, 150 }; 151 152 /* VSI state flags */ 153 enum i40e_vsi_state_t { 154 __I40E_VSI_DOWN, 155 __I40E_VSI_NEEDS_RESTART, 156 __I40E_VSI_SYNCING_FILTERS, 157 __I40E_VSI_OVERFLOW_PROMISC, 158 __I40E_VSI_REINIT_REQUESTED, 159 __I40E_VSI_DOWN_REQUESTED, 160 /* This must be last as it determines the size of the BITMAP */ 161 __I40E_VSI_STATE_SIZE__, 162 }; 163 164 enum i40e_interrupt_policy { 165 I40E_INTERRUPT_BEST_CASE, 166 I40E_INTERRUPT_MEDIUM, 167 I40E_INTERRUPT_LOWEST 168 }; 169 170 struct i40e_lump_tracking { 171 u16 num_entries; 172 u16 search_hint; 173 u16 list[0]; 174 #define I40E_PILE_VALID_BIT 0x8000 175 #define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2) 176 }; 177 178 #define I40E_DEFAULT_ATR_SAMPLE_RATE 20 179 #define I40E_FDIR_MAX_RAW_PACKET_SIZE 512 180 #define I40E_FDIR_BUFFER_FULL_MARGIN 10 181 #define I40E_FDIR_BUFFER_HEAD_ROOM 32 182 #define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4) 183 184 #define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4) 185 #define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4) 186 #define I40E_VF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4) 187 188 enum i40e_fd_stat_idx { 189 I40E_FD_STAT_ATR, 190 I40E_FD_STAT_SB, 191 I40E_FD_STAT_ATR_TUNNEL, 192 I40E_FD_STAT_PF_COUNT 193 }; 194 #define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT) 195 #define I40E_FD_ATR_STAT_IDX(pf_id) \ 196 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR) 197 #define I40E_FD_SB_STAT_IDX(pf_id) \ 198 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB) 199 #define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \ 200 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL) 201 202 /* The following structure contains the data parsed from the user-defined 203 * field of the ethtool_rx_flow_spec structure. 204 */ 205 struct i40e_rx_flow_userdef { 206 bool flex_filter; 207 u16 flex_word; 208 u16 flex_offset; 209 }; 210 211 struct i40e_fdir_filter { 212 struct hlist_node fdir_node; 213 /* filter ipnut set */ 214 u8 flow_type; 215 u8 ip4_proto; 216 /* TX packet view of src and dst */ 217 __be32 dst_ip; 218 __be32 src_ip; 219 __be16 src_port; 220 __be16 dst_port; 221 __be32 sctp_v_tag; 222 223 /* Flexible data to match within the packet payload */ 224 __be16 flex_word; 225 u16 flex_offset; 226 bool flex_filter; 227 228 /* filter control */ 229 u16 q_index; 230 u8 flex_off; 231 u8 pctype; 232 u16 dest_vsi; 233 u8 dest_ctl; 234 u8 fd_status; 235 u16 cnt_index; 236 u32 fd_id; 237 }; 238 239 #define I40E_ETH_P_LLDP 0x88cc 240 241 #define I40E_DCB_PRIO_TYPE_STRICT 0 242 #define I40E_DCB_PRIO_TYPE_ETS 1 243 #define I40E_DCB_STRICT_PRIO_CREDITS 127 244 /* DCB per TC information data structure */ 245 struct i40e_tc_info { 246 u16 qoffset; /* Queue offset from base queue */ 247 u16 qcount; /* Total Queues */ 248 u8 netdev_tc; /* Netdev TC index if netdev associated */ 249 }; 250 251 /* TC configuration data structure */ 252 struct i40e_tc_configuration { 253 u8 numtc; /* Total number of enabled TCs */ 254 u8 enabled_tc; /* TC map */ 255 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS]; 256 }; 257 258 struct i40e_udp_port_config { 259 /* AdminQ command interface expects port number in Host byte order */ 260 u16 port; 261 u8 type; 262 }; 263 264 /* macros related to FLX_PIT */ 265 #define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \ 266 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \ 267 I40E_PRTQF_FLX_PIT_FSIZE_MASK) 268 #define I40E_FLEX_SET_DST_WORD(dst) (((dst) << \ 269 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) & \ 270 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK) 271 #define I40E_FLEX_SET_SRC_WORD(src) (((src) << \ 272 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) & \ 273 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK) 274 #define I40E_FLEX_PREP_VAL(dst, fsize, src) (I40E_FLEX_SET_DST_WORD(dst) | \ 275 I40E_FLEX_SET_FSIZE(fsize) | \ 276 I40E_FLEX_SET_SRC_WORD(src)) 277 278 #define I40E_FLEX_PIT_GET_SRC(flex) (((flex) & \ 279 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK) >> \ 280 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) 281 #define I40E_FLEX_PIT_GET_DST(flex) (((flex) & \ 282 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK) >> \ 283 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) 284 #define I40E_FLEX_PIT_GET_FSIZE(flex) (((flex) & \ 285 I40E_PRTQF_FLX_PIT_FSIZE_MASK) >> \ 286 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) 287 288 #define I40E_MAX_FLEX_SRC_OFFSET 0x1F 289 290 /* macros related to GLQF_ORT */ 291 #define I40E_ORT_SET_IDX(idx) (((idx) << \ 292 I40E_GLQF_ORT_PIT_INDX_SHIFT) & \ 293 I40E_GLQF_ORT_PIT_INDX_MASK) 294 295 #define I40E_ORT_SET_COUNT(count) (((count) << \ 296 I40E_GLQF_ORT_FIELD_CNT_SHIFT) & \ 297 I40E_GLQF_ORT_FIELD_CNT_MASK) 298 299 #define I40E_ORT_SET_PAYLOAD(payload) (((payload) << \ 300 I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) & \ 301 I40E_GLQF_ORT_FLX_PAYLOAD_MASK) 302 303 #define I40E_ORT_PREP_VAL(idx, count, payload) (I40E_ORT_SET_IDX(idx) | \ 304 I40E_ORT_SET_COUNT(count) | \ 305 I40E_ORT_SET_PAYLOAD(payload)) 306 307 #define I40E_L3_GLQF_ORT_IDX 34 308 #define I40E_L4_GLQF_ORT_IDX 35 309 310 /* Flex PIT register index */ 311 #define I40E_FLEX_PIT_IDX_START_L2 0 312 #define I40E_FLEX_PIT_IDX_START_L3 3 313 #define I40E_FLEX_PIT_IDX_START_L4 6 314 315 #define I40E_FLEX_PIT_TABLE_SIZE 3 316 317 #define I40E_FLEX_DEST_UNUSED 63 318 319 #define I40E_FLEX_INDEX_ENTRIES 8 320 321 /* Flex MASK to disable all flexible entries */ 322 #define I40E_FLEX_INPUT_MASK (I40E_FLEX_50_MASK | I40E_FLEX_51_MASK | \ 323 I40E_FLEX_52_MASK | I40E_FLEX_53_MASK | \ 324 I40E_FLEX_54_MASK | I40E_FLEX_55_MASK | \ 325 I40E_FLEX_56_MASK | I40E_FLEX_57_MASK) 326 327 struct i40e_flex_pit { 328 struct list_head list; 329 u16 src_offset; 330 u8 pit_index; 331 }; 332 333 /* struct that defines the Ethernet device */ 334 struct i40e_pf { 335 struct pci_dev *pdev; 336 struct i40e_hw hw; 337 DECLARE_BITMAP(state, __I40E_STATE_SIZE__); 338 struct msix_entry *msix_entries; 339 bool fc_autoneg_status; 340 341 u16 eeprom_version; 342 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */ 343 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */ 344 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */ 345 u16 num_req_vfs; /* num VFs requested for this VF */ 346 u16 num_vf_qps; /* num queue pairs per VF */ 347 u16 num_lan_qps; /* num lan queues this PF has set up */ 348 u16 num_lan_msix; /* num queue vectors for the base PF vsi */ 349 u16 num_fdsb_msix; /* num queue vectors for sideband Fdir */ 350 u16 num_iwarp_msix; /* num of iwarp vectors for this PF */ 351 int iwarp_base_vector; 352 int queues_left; /* queues left unclaimed */ 353 u16 alloc_rss_size; /* allocated RSS queues */ 354 u16 rss_size_max; /* HW defined max RSS queues */ 355 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */ 356 u16 num_alloc_vsi; /* num VSIs this driver supports */ 357 u8 atr_sample_rate; 358 bool wol_en; 359 360 struct hlist_head fdir_filter_list; 361 u16 fdir_pf_active_filters; 362 unsigned long fd_flush_timestamp; 363 u32 fd_flush_cnt; 364 u32 fd_add_err; 365 u32 fd_atr_cnt; 366 367 /* Book-keeping of side-band filter count per flow-type. 368 * This is used to detect and handle input set changes for 369 * respective flow-type. 370 */ 371 u16 fd_tcp4_filter_cnt; 372 u16 fd_udp4_filter_cnt; 373 u16 fd_sctp4_filter_cnt; 374 u16 fd_ip4_filter_cnt; 375 376 /* Flexible filter table values that need to be programmed into 377 * hardware, which expects L3 and L4 to be programmed separately. We 378 * need to ensure that the values are in ascended order and don't have 379 * duplicates, so we track each L3 and L4 values in separate lists. 380 */ 381 struct list_head l3_flex_pit_list; 382 struct list_head l4_flex_pit_list; 383 384 struct i40e_udp_port_config udp_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS]; 385 u16 pending_udp_bitmap; 386 387 enum i40e_interrupt_policy int_policy; 388 u16 rx_itr_default; 389 u16 tx_itr_default; 390 u32 msg_enable; 391 char int_name[I40E_INT_NAME_STR_LEN]; 392 u16 adminq_work_limit; /* num of admin receive queue desc to process */ 393 unsigned long service_timer_period; 394 unsigned long service_timer_previous; 395 struct timer_list service_timer; 396 struct work_struct service_task; 397 398 u64 flags; 399 #define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1) 400 #define I40E_FLAG_MSI_ENABLED BIT_ULL(2) 401 #define I40E_FLAG_MSIX_ENABLED BIT_ULL(3) 402 #define I40E_FLAG_HW_ATR_EVICT_ENABLED BIT_ULL(4) 403 #define I40E_FLAG_RSS_ENABLED BIT_ULL(6) 404 #define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7) 405 #define I40E_FLAG_IWARP_ENABLED BIT_ULL(10) 406 #define I40E_FLAG_FILTER_SYNC BIT_ULL(15) 407 #define I40E_FLAG_SERVICE_CLIENT_REQUESTED BIT_ULL(16) 408 #define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19) 409 #define I40E_FLAG_DCB_ENABLED BIT_ULL(20) 410 #define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21) 411 #define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22) 412 #define I40E_FLAG_FD_SB_AUTO_DISABLED BIT_ULL(23) 413 #define I40E_FLAG_FD_ATR_AUTO_DISABLED BIT_ULL(24) 414 #define I40E_FLAG_PTP BIT_ULL(25) 415 #define I40E_FLAG_MFP_ENABLED BIT_ULL(26) 416 #define I40E_FLAG_UDP_FILTER_SYNC BIT_ULL(27) 417 #define I40E_FLAG_PORT_ID_VALID BIT_ULL(28) 418 #define I40E_FLAG_DCB_CAPABLE BIT_ULL(29) 419 #define I40E_FLAG_RSS_AQ_CAPABLE BIT_ULL(31) 420 #define I40E_FLAG_HW_ATR_EVICT_CAPABLE BIT_ULL(32) 421 #define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE BIT_ULL(33) 422 #define I40E_FLAG_128_QP_RSS_CAPABLE BIT_ULL(34) 423 #define I40E_FLAG_WB_ON_ITR_CAPABLE BIT_ULL(35) 424 #define I40E_FLAG_VEB_STATS_ENABLED BIT_ULL(37) 425 #define I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT_ULL(38) 426 #define I40E_FLAG_LINK_POLLING_ENABLED BIT_ULL(39) 427 #define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40) 428 #define I40E_FLAG_GENEVE_OFFLOAD_CAPABLE BIT_ULL(41) 429 #define I40E_FLAG_NO_PCI_LINK_CHECK BIT_ULL(42) 430 #define I40E_FLAG_100M_SGMII_CAPABLE BIT_ULL(43) 431 #define I40E_FLAG_RESTART_AUTONEG BIT_ULL(44) 432 #define I40E_FLAG_NO_DCB_SUPPORT BIT_ULL(45) 433 #define I40E_FLAG_USE_SET_LLDP_MIB BIT_ULL(46) 434 #define I40E_FLAG_STOP_FW_LLDP BIT_ULL(47) 435 #define I40E_FLAG_PHY_CONTROLS_LEDS BIT_ULL(48) 436 #define I40E_FLAG_PF_MAC BIT_ULL(50) 437 #define I40E_FLAG_TRUE_PROMISC_SUPPORT BIT_ULL(51) 438 #define I40E_FLAG_HAVE_CRT_RETIMER BIT_ULL(52) 439 #define I40E_FLAG_PTP_L4_CAPABLE BIT_ULL(53) 440 #define I40E_FLAG_CLIENT_RESET BIT_ULL(54) 441 #define I40E_FLAG_TEMP_LINK_POLLING BIT_ULL(55) 442 #define I40E_FLAG_CLIENT_L2_CHANGE BIT_ULL(56) 443 #define I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE BIT_ULL(57) 444 #define I40E_FLAG_LEGACY_RX BIT_ULL(58) 445 446 struct i40e_client_instance *cinst; 447 bool stat_offsets_loaded; 448 struct i40e_hw_port_stats stats; 449 struct i40e_hw_port_stats stats_offsets; 450 u32 tx_timeout_count; 451 u32 tx_timeout_recovery_level; 452 unsigned long tx_timeout_last_recovery; 453 u32 tx_sluggish_count; 454 u32 hw_csum_rx_error; 455 u32 led_status; 456 u16 corer_count; /* Core reset count */ 457 u16 globr_count; /* Global reset count */ 458 u16 empr_count; /* EMP reset count */ 459 u16 pfr_count; /* PF reset count */ 460 u16 sw_int_count; /* SW interrupt count */ 461 462 struct mutex switch_mutex; 463 u16 lan_vsi; /* our default LAN VSI */ 464 u16 lan_veb; /* initial relay, if exists */ 465 #define I40E_NO_VEB 0xffff 466 #define I40E_NO_VSI 0xffff 467 u16 next_vsi; /* Next unallocated VSI - 0-based! */ 468 struct i40e_vsi **vsi; 469 struct i40e_veb *veb[I40E_MAX_VEB]; 470 471 struct i40e_lump_tracking *qp_pile; 472 struct i40e_lump_tracking *irq_pile; 473 474 /* switch config info */ 475 u16 pf_seid; 476 u16 main_vsi_seid; 477 u16 mac_seid; 478 struct kobject *switch_kobj; 479 #ifdef CONFIG_DEBUG_FS 480 struct dentry *i40e_dbg_pf; 481 #endif /* CONFIG_DEBUG_FS */ 482 bool cur_promisc; 483 484 u16 instance; /* A unique number per i40e_pf instance in the system */ 485 486 /* sr-iov config info */ 487 struct i40e_vf *vf; 488 int num_alloc_vfs; /* actual number of VFs allocated */ 489 u32 vf_aq_requests; 490 u32 arq_overflows; /* Not fatal, possibly indicative of problems */ 491 492 /* DCBx/DCBNL capability for PF that indicates 493 * whether DCBx is managed by firmware or host 494 * based agent (LLDPAD). Also, indicates what 495 * flavor of DCBx protocol (IEEE/CEE) is supported 496 * by the device. For now we're supporting IEEE 497 * mode only. 498 */ 499 u16 dcbx_cap; 500 501 struct i40e_filter_control_settings filter_settings; 502 503 struct ptp_clock *ptp_clock; 504 struct ptp_clock_info ptp_caps; 505 struct sk_buff *ptp_tx_skb; 506 struct hwtstamp_config tstamp_config; 507 struct mutex tmreg_lock; /* Used to protect the SYSTIME registers. */ 508 u64 ptp_base_adj; 509 u32 tx_hwtstamp_timeouts; 510 u32 rx_hwtstamp_cleared; 511 u32 latch_event_flags; 512 spinlock_t ptp_rx_lock; /* Used to protect Rx timestamp registers. */ 513 unsigned long latch_events[4]; 514 bool ptp_tx; 515 bool ptp_rx; 516 u16 rss_table_size; /* HW RSS table size */ 517 /* These are only valid in NPAR modes */ 518 u32 npar_max_bw; 519 u32 npar_min_bw; 520 521 u32 ioremap_len; 522 u32 fd_inv; 523 u16 phy_led_val; 524 }; 525 526 /** 527 * i40e_mac_to_hkey - Convert a 6-byte MAC Address to a u64 hash key 528 * @macaddr: the MAC Address as the base key 529 * 530 * Simply copies the address and returns it as a u64 for hashing 531 **/ 532 static inline u64 i40e_addr_to_hkey(const u8 *macaddr) 533 { 534 u64 key = 0; 535 536 ether_addr_copy((u8 *)&key, macaddr); 537 return key; 538 } 539 540 enum i40e_filter_state { 541 I40E_FILTER_INVALID = 0, /* Invalid state */ 542 I40E_FILTER_NEW, /* New, not sent to FW yet */ 543 I40E_FILTER_ACTIVE, /* Added to switch by FW */ 544 I40E_FILTER_FAILED, /* Rejected by FW */ 545 I40E_FILTER_REMOVE, /* To be removed */ 546 /* There is no 'removed' state; the filter struct is freed */ 547 }; 548 struct i40e_mac_filter { 549 struct hlist_node hlist; 550 u8 macaddr[ETH_ALEN]; 551 #define I40E_VLAN_ANY -1 552 s16 vlan; 553 enum i40e_filter_state state; 554 }; 555 556 /* Wrapper structure to keep track of filters while we are preparing to send 557 * firmware commands. We cannot send firmware commands while holding a 558 * spinlock, since it might sleep. To avoid this, we wrap the added filters in 559 * a separate structure, which will track the state change and update the real 560 * filter while under lock. We can't simply hold the filters in a separate 561 * list, as this opens a window for a race condition when adding new MAC 562 * addresses to all VLANs, or when adding new VLANs to all MAC addresses. 563 */ 564 struct i40e_new_mac_filter { 565 struct hlist_node hlist; 566 struct i40e_mac_filter *f; 567 568 /* Track future changes to state separately */ 569 enum i40e_filter_state state; 570 }; 571 572 struct i40e_veb { 573 struct i40e_pf *pf; 574 u16 idx; 575 u16 veb_idx; /* index of VEB parent */ 576 u16 seid; 577 u16 uplink_seid; 578 u16 stats_idx; /* index of VEB parent */ 579 u8 enabled_tc; 580 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */ 581 u16 flags; 582 u16 bw_limit; 583 u8 bw_max_quanta; 584 bool is_abs_credits; 585 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS]; 586 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS]; 587 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS]; 588 struct kobject *kobj; 589 bool stat_offsets_loaded; 590 struct i40e_eth_stats stats; 591 struct i40e_eth_stats stats_offsets; 592 struct i40e_veb_tc_stats tc_stats; 593 struct i40e_veb_tc_stats tc_stats_offsets; 594 }; 595 596 /* struct that defines a VSI, associated with a dev */ 597 struct i40e_vsi { 598 struct net_device *netdev; 599 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 600 bool netdev_registered; 601 bool stat_offsets_loaded; 602 603 u32 current_netdev_flags; 604 DECLARE_BITMAP(state, __I40E_VSI_STATE_SIZE__); 605 #define I40E_VSI_FLAG_FILTER_CHANGED BIT(0) 606 #define I40E_VSI_FLAG_VEB_OWNER BIT(1) 607 unsigned long flags; 608 609 /* Per VSI lock to protect elements/hash (MAC filter) */ 610 spinlock_t mac_filter_hash_lock; 611 /* Fixed size hash table with 2^8 buckets for MAC filters */ 612 DECLARE_HASHTABLE(mac_filter_hash, 8); 613 bool has_vlan_filter; 614 615 /* VSI stats */ 616 struct rtnl_link_stats64 net_stats; 617 struct rtnl_link_stats64 net_stats_offsets; 618 struct i40e_eth_stats eth_stats; 619 struct i40e_eth_stats eth_stats_offsets; 620 u32 tx_restart; 621 u32 tx_busy; 622 u64 tx_linearize; 623 u64 tx_force_wb; 624 u32 rx_buf_failed; 625 u32 rx_page_failed; 626 627 /* These are containers of ring pointers, allocated at run-time */ 628 struct i40e_ring **rx_rings; 629 struct i40e_ring **tx_rings; 630 631 u32 active_filters; 632 u32 promisc_threshold; 633 634 u16 work_limit; 635 u16 int_rate_limit; /* value in usecs */ 636 637 u16 rss_table_size; /* HW RSS table size */ 638 u16 rss_size; /* Allocated RSS queues */ 639 u8 *rss_hkey_user; /* User configured hash keys */ 640 u8 *rss_lut_user; /* User configured lookup table entries */ 641 642 643 u16 max_frame; 644 u16 rx_buf_len; 645 646 /* List of q_vectors allocated to this VSI */ 647 struct i40e_q_vector **q_vectors; 648 int num_q_vectors; 649 int base_vector; 650 bool irqs_ready; 651 652 u16 seid; /* HW index of this VSI (absolute index) */ 653 u16 id; /* VSI number */ 654 u16 uplink_seid; 655 656 u16 base_queue; /* vsi's first queue in hw array */ 657 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */ 658 u16 req_queue_pairs; /* User requested queue pairs */ 659 u16 num_queue_pairs; /* Used tx and rx pairs */ 660 u16 num_desc; 661 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */ 662 s16 vf_id; /* Virtual function ID for SRIOV VSIs */ 663 664 struct i40e_tc_configuration tc_config; 665 struct i40e_aqc_vsi_properties_data info; 666 667 /* VSI BW limit (absolute across all TCs) */ 668 u16 bw_limit; /* VSI BW Limit (0 = disabled) */ 669 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */ 670 671 /* Relative TC credits across VSIs */ 672 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS]; 673 /* TC BW limit credits within VSI */ 674 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS]; 675 /* TC BW limit max quanta within VSI */ 676 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS]; 677 678 struct i40e_pf *back; /* Backreference to associated PF */ 679 u16 idx; /* index in pf->vsi[] */ 680 u16 veb_idx; /* index of VEB parent */ 681 struct kobject *kobj; /* sysfs object */ 682 bool current_isup; /* Sync 'link up' logging */ 683 enum i40e_aq_link_speed current_speed; /* Sync link speed logging */ 684 685 void *priv; /* client driver data reference. */ 686 687 /* VSI specific handlers */ 688 irqreturn_t (*irq_handler)(int irq, void *data); 689 } ____cacheline_internodealigned_in_smp; 690 691 struct i40e_netdev_priv { 692 struct i40e_vsi *vsi; 693 }; 694 695 /* struct that defines an interrupt vector */ 696 struct i40e_q_vector { 697 struct i40e_vsi *vsi; 698 699 u16 v_idx; /* index in the vsi->q_vector array. */ 700 u16 reg_idx; /* register index of the interrupt */ 701 702 struct napi_struct napi; 703 704 struct i40e_ring_container rx; 705 struct i40e_ring_container tx; 706 707 u8 num_ringpairs; /* total number of ring pairs in vector */ 708 709 cpumask_t affinity_mask; 710 struct irq_affinity_notify affinity_notify; 711 712 struct rcu_head rcu; /* to avoid race with update stats on free */ 713 char name[I40E_INT_NAME_STR_LEN]; 714 bool arm_wb_state; 715 #define ITR_COUNTDOWN_START 100 716 u8 itr_countdown; /* when 0 should adjust ITR */ 717 } ____cacheline_internodealigned_in_smp; 718 719 /* lan device */ 720 struct i40e_device { 721 struct list_head list; 722 struct i40e_pf *pf; 723 }; 724 725 /** 726 * i40e_nvm_version_str - format the NVM version strings 727 * @hw: ptr to the hardware info 728 **/ 729 static inline char *i40e_nvm_version_str(struct i40e_hw *hw) 730 { 731 static char buf[32]; 732 u32 full_ver; 733 u8 ver, patch; 734 u16 build; 735 736 full_ver = hw->nvm.oem_ver; 737 ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT); 738 build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) & 739 I40E_OEM_VER_BUILD_MASK); 740 patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK); 741 742 snprintf(buf, sizeof(buf), 743 "%x.%02x 0x%x %d.%d.%d", 744 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >> 745 I40E_NVM_VERSION_HI_SHIFT, 746 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >> 747 I40E_NVM_VERSION_LO_SHIFT, 748 hw->nvm.eetrack, ver, build, patch); 749 750 return buf; 751 } 752 753 /** 754 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev 755 * @netdev: the corresponding netdev 756 * 757 * Return the PF struct for the given netdev 758 **/ 759 static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev) 760 { 761 struct i40e_netdev_priv *np = netdev_priv(netdev); 762 struct i40e_vsi *vsi = np->vsi; 763 764 return vsi->back; 765 } 766 767 static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi, 768 irqreturn_t (*irq_handler)(int, void *)) 769 { 770 vsi->irq_handler = irq_handler; 771 } 772 773 /** 774 * i40e_get_fd_cnt_all - get the total FD filter space available 775 * @pf: pointer to the PF struct 776 **/ 777 static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf) 778 { 779 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count; 780 } 781 782 /** 783 * i40e_read_fd_input_set - reads value of flow director input set register 784 * @pf: pointer to the PF struct 785 * @addr: register addr 786 * 787 * This function reads value of flow director input set register 788 * specified by 'addr' (which is specific to flow-type) 789 **/ 790 static inline u64 i40e_read_fd_input_set(struct i40e_pf *pf, u16 addr) 791 { 792 u64 val; 793 794 val = i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1)); 795 val <<= 32; 796 val += i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0)); 797 798 return val; 799 } 800 801 /** 802 * i40e_write_fd_input_set - writes value into flow director input set register 803 * @pf: pointer to the PF struct 804 * @addr: register addr 805 * @val: value to be written 806 * 807 * This function writes specified value to the register specified by 'addr'. 808 * This register is input set register based on flow-type. 809 **/ 810 static inline void i40e_write_fd_input_set(struct i40e_pf *pf, 811 u16 addr, u64 val) 812 { 813 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1), 814 (u32)(val >> 32)); 815 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0), 816 (u32)(val & 0xFFFFFFFFULL)); 817 } 818 819 /* needed by i40e_ethtool.c */ 820 int i40e_up(struct i40e_vsi *vsi); 821 void i40e_down(struct i40e_vsi *vsi); 822 extern const char i40e_driver_name[]; 823 extern const char i40e_driver_version_str[]; 824 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags); 825 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired); 826 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 827 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 828 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, 829 u16 rss_table_size, u16 rss_size); 830 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id); 831 /** 832 * i40e_find_vsi_by_type - Find and return Flow Director VSI 833 * @pf: PF to search for VSI 834 * @type: Value indicating type of VSI we are looking for 835 **/ 836 static inline struct i40e_vsi * 837 i40e_find_vsi_by_type(struct i40e_pf *pf, u16 type) 838 { 839 int i; 840 841 for (i = 0; i < pf->num_alloc_vsi; i++) { 842 struct i40e_vsi *vsi = pf->vsi[i]; 843 844 if (vsi && vsi->type == type) 845 return vsi; 846 } 847 848 return NULL; 849 } 850 void i40e_update_stats(struct i40e_vsi *vsi); 851 void i40e_update_eth_stats(struct i40e_vsi *vsi); 852 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi); 853 int i40e_fetch_switch_configuration(struct i40e_pf *pf, 854 bool printconfig); 855 856 int i40e_add_del_fdir(struct i40e_vsi *vsi, 857 struct i40e_fdir_filter *input, bool add); 858 void i40e_fdir_check_and_reenable(struct i40e_pf *pf); 859 u32 i40e_get_current_fd_count(struct i40e_pf *pf); 860 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf); 861 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf); 862 u32 i40e_get_global_fd_count(struct i40e_pf *pf); 863 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features); 864 void i40e_set_ethtool_ops(struct net_device *netdev); 865 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 866 const u8 *macaddr, s16 vlan); 867 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f); 868 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan); 869 int i40e_sync_vsi_filters(struct i40e_vsi *vsi); 870 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 871 u16 uplink, u32 param1); 872 int i40e_vsi_release(struct i40e_vsi *vsi); 873 void i40e_service_event_schedule(struct i40e_pf *pf); 874 void i40e_notify_client_of_vf_msg(struct i40e_vsi *vsi, u32 vf_id, 875 u8 *msg, u16 len); 876 877 int i40e_vsi_start_rings(struct i40e_vsi *vsi); 878 void i40e_vsi_stop_rings(struct i40e_vsi *vsi); 879 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi); 880 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi); 881 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count); 882 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid, 883 u16 downlink_seid, u8 enabled_tc); 884 void i40e_veb_release(struct i40e_veb *veb); 885 886 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc); 887 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid); 888 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi); 889 void i40e_vsi_reset_stats(struct i40e_vsi *vsi); 890 void i40e_pf_reset_stats(struct i40e_pf *pf); 891 #ifdef CONFIG_DEBUG_FS 892 void i40e_dbg_pf_init(struct i40e_pf *pf); 893 void i40e_dbg_pf_exit(struct i40e_pf *pf); 894 void i40e_dbg_init(void); 895 void i40e_dbg_exit(void); 896 #else 897 static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {} 898 static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {} 899 static inline void i40e_dbg_init(void) {} 900 static inline void i40e_dbg_exit(void) {} 901 #endif /* CONFIG_DEBUG_FS*/ 902 /* needed by client drivers */ 903 int i40e_lan_add_device(struct i40e_pf *pf); 904 int i40e_lan_del_device(struct i40e_pf *pf); 905 void i40e_client_subtask(struct i40e_pf *pf); 906 void i40e_notify_client_of_l2_param_changes(struct i40e_vsi *vsi); 907 void i40e_notify_client_of_netdev_close(struct i40e_vsi *vsi, bool reset); 908 void i40e_notify_client_of_vf_enable(struct i40e_pf *pf, u32 num_vfs); 909 void i40e_notify_client_of_vf_reset(struct i40e_pf *pf, u32 vf_id); 910 int i40e_vf_client_capable(struct i40e_pf *pf, u32 vf_id); 911 /** 912 * i40e_irq_dynamic_enable - Enable default interrupt generation settings 913 * @vsi: pointer to a vsi 914 * @vector: enable a particular Hw Interrupt vector, without base_vector 915 **/ 916 static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) 917 { 918 struct i40e_pf *pf = vsi->back; 919 struct i40e_hw *hw = &pf->hw; 920 u32 val; 921 922 /* definitely clear the PBA here, as this function is meant to 923 * clean out all previous interrupts AND enable the interrupt 924 */ 925 val = I40E_PFINT_DYN_CTLN_INTENA_MASK | 926 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | 927 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 928 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val); 929 /* skip the flush */ 930 } 931 932 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf); 933 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba); 934 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); 935 int i40e_open(struct net_device *netdev); 936 int i40e_close(struct net_device *netdev); 937 int i40e_vsi_open(struct i40e_vsi *vsi); 938 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi); 939 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid); 940 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid); 941 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid); 942 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid); 943 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi, 944 const u8 *macaddr); 945 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr); 946 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi); 947 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr); 948 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi); 949 #ifdef CONFIG_I40E_DCB 950 void i40e_dcbnl_flush_apps(struct i40e_pf *pf, 951 struct i40e_dcbx_config *old_cfg, 952 struct i40e_dcbx_config *new_cfg); 953 void i40e_dcbnl_set_all(struct i40e_vsi *vsi); 954 void i40e_dcbnl_setup(struct i40e_vsi *vsi); 955 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 956 struct i40e_dcbx_config *old_cfg, 957 struct i40e_dcbx_config *new_cfg); 958 #endif /* CONFIG_I40E_DCB */ 959 void i40e_ptp_rx_hang(struct i40e_vsi *vsi); 960 void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf); 961 void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index); 962 void i40e_ptp_set_increment(struct i40e_pf *pf); 963 int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr); 964 int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr); 965 void i40e_ptp_init(struct i40e_pf *pf); 966 void i40e_ptp_stop(struct i40e_pf *pf); 967 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi); 968 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf); 969 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf); 970 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf); 971 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup); 972 #endif /* _I40E_H_ */ 973