1 /* Intel(R) Ethernet Switch Host Interface Driver 2 * Copyright(c) 2013 - 2016 Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 * 16 * Contact Information: 17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 19 */ 20 21 #include <linux/module.h> 22 #include <linux/aer.h> 23 24 #include "fm10k.h" 25 26 static const struct fm10k_info *fm10k_info_tbl[] = { 27 [fm10k_device_pf] = &fm10k_pf_info, 28 [fm10k_device_vf] = &fm10k_vf_info, 29 }; 30 31 /** 32 * fm10k_pci_tbl - PCI Device ID Table 33 * 34 * Wildcard entries (PCI_ANY_ID) should come last 35 * Last entry must be all 0s 36 * 37 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 38 * Class, Class Mask, private data (not used) } 39 */ 40 static const struct pci_device_id fm10k_pci_tbl[] = { 41 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf }, 42 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf }, 43 /* required last entry */ 44 { 0, } 45 }; 46 MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl); 47 48 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg) 49 { 50 struct fm10k_intfc *interface = hw->back; 51 u16 value = 0; 52 53 if (FM10K_REMOVED(hw->hw_addr)) 54 return ~value; 55 56 pci_read_config_word(interface->pdev, reg, &value); 57 if (value == 0xFFFF) 58 fm10k_write_flush(hw); 59 60 return value; 61 } 62 63 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg) 64 { 65 u32 __iomem *hw_addr = READ_ONCE(hw->hw_addr); 66 u32 value = 0; 67 68 if (FM10K_REMOVED(hw_addr)) 69 return ~value; 70 71 value = readl(&hw_addr[reg]); 72 if (!(~value) && (!reg || !(~readl(hw_addr)))) { 73 struct fm10k_intfc *interface = hw->back; 74 struct net_device *netdev = interface->netdev; 75 76 hw->hw_addr = NULL; 77 netif_device_detach(netdev); 78 netdev_err(netdev, "PCIe link lost, device now detached\n"); 79 } 80 81 return value; 82 } 83 84 static int fm10k_hw_ready(struct fm10k_intfc *interface) 85 { 86 struct fm10k_hw *hw = &interface->hw; 87 88 fm10k_write_flush(hw); 89 90 return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0; 91 } 92 93 void fm10k_service_event_schedule(struct fm10k_intfc *interface) 94 { 95 if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) && 96 !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state)) 97 queue_work(fm10k_workqueue, &interface->service_task); 98 } 99 100 static void fm10k_service_event_complete(struct fm10k_intfc *interface) 101 { 102 WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state)); 103 104 /* flush memory to make sure state is correct before next watchog */ 105 smp_mb__before_atomic(); 106 clear_bit(__FM10K_SERVICE_SCHED, &interface->state); 107 } 108 109 /** 110 * fm10k_service_timer - Timer Call-back 111 * @data: pointer to interface cast into an unsigned long 112 **/ 113 static void fm10k_service_timer(unsigned long data) 114 { 115 struct fm10k_intfc *interface = (struct fm10k_intfc *)data; 116 117 /* Reset the timer */ 118 mod_timer(&interface->service_timer, (HZ * 2) + jiffies); 119 120 fm10k_service_event_schedule(interface); 121 } 122 123 static void fm10k_detach_subtask(struct fm10k_intfc *interface) 124 { 125 struct net_device *netdev = interface->netdev; 126 u32 __iomem *hw_addr; 127 u32 value; 128 129 /* do nothing if device is still present or hw_addr is set */ 130 if (netif_device_present(netdev) || interface->hw.hw_addr) 131 return; 132 133 /* check the real address space to see if we've recovered */ 134 hw_addr = READ_ONCE(interface->uc_addr); 135 value = readl(hw_addr); 136 if (~value) { 137 interface->hw.hw_addr = interface->uc_addr; 138 netif_device_attach(netdev); 139 interface->flags |= FM10K_FLAG_RESET_REQUESTED; 140 netdev_warn(netdev, "PCIe link restored, device now attached\n"); 141 return; 142 } 143 144 rtnl_lock(); 145 146 if (netif_running(netdev)) 147 dev_close(netdev); 148 149 rtnl_unlock(); 150 } 151 152 static void fm10k_prepare_for_reset(struct fm10k_intfc *interface) 153 { 154 struct net_device *netdev = interface->netdev; 155 156 WARN_ON(in_interrupt()); 157 158 /* put off any impending NetWatchDogTimeout */ 159 netif_trans_update(netdev); 160 161 while (test_and_set_bit(__FM10K_RESETTING, &interface->state)) 162 usleep_range(1000, 2000); 163 164 rtnl_lock(); 165 166 fm10k_iov_suspend(interface->pdev); 167 168 if (netif_running(netdev)) 169 fm10k_close(netdev); 170 171 fm10k_mbx_free_irq(interface); 172 173 /* free interrupts */ 174 fm10k_clear_queueing_scheme(interface); 175 176 /* delay any future reset requests */ 177 interface->last_reset = jiffies + (10 * HZ); 178 179 rtnl_unlock(); 180 } 181 182 static int fm10k_handle_reset(struct fm10k_intfc *interface) 183 { 184 struct net_device *netdev = interface->netdev; 185 struct fm10k_hw *hw = &interface->hw; 186 int err; 187 188 rtnl_lock(); 189 190 pci_set_master(interface->pdev); 191 192 /* reset and initialize the hardware so it is in a known state */ 193 err = hw->mac.ops.reset_hw(hw); 194 if (err) { 195 dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err); 196 goto reinit_err; 197 } 198 199 err = hw->mac.ops.init_hw(hw); 200 if (err) { 201 dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err); 202 goto reinit_err; 203 } 204 205 err = fm10k_init_queueing_scheme(interface); 206 if (err) { 207 dev_err(&interface->pdev->dev, 208 "init_queueing_scheme failed: %d\n", err); 209 goto reinit_err; 210 } 211 212 /* re-associate interrupts */ 213 err = fm10k_mbx_request_irq(interface); 214 if (err) 215 goto err_mbx_irq; 216 217 err = fm10k_hw_ready(interface); 218 if (err) 219 goto err_open; 220 221 /* update hardware address for VFs if perm_addr has changed */ 222 if (hw->mac.type == fm10k_mac_vf) { 223 if (is_valid_ether_addr(hw->mac.perm_addr)) { 224 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr); 225 ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr); 226 ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr); 227 netdev->addr_assign_type &= ~NET_ADDR_RANDOM; 228 } 229 230 if (hw->mac.vlan_override) 231 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 232 else 233 netdev->features |= NETIF_F_HW_VLAN_CTAG_RX; 234 } 235 236 err = netif_running(netdev) ? fm10k_open(netdev) : 0; 237 if (err) 238 goto err_open; 239 240 fm10k_iov_resume(interface->pdev); 241 242 rtnl_unlock(); 243 244 clear_bit(__FM10K_RESETTING, &interface->state); 245 246 return err; 247 err_open: 248 fm10k_mbx_free_irq(interface); 249 err_mbx_irq: 250 fm10k_clear_queueing_scheme(interface); 251 reinit_err: 252 netif_device_detach(netdev); 253 254 rtnl_unlock(); 255 256 clear_bit(__FM10K_RESETTING, &interface->state); 257 258 return err; 259 } 260 261 static void fm10k_reinit(struct fm10k_intfc *interface) 262 { 263 int err; 264 265 fm10k_prepare_for_reset(interface); 266 267 err = fm10k_handle_reset(interface); 268 if (err) 269 dev_err(&interface->pdev->dev, 270 "fm10k_handle_reset failed: %d\n", err); 271 } 272 273 static void fm10k_reset_subtask(struct fm10k_intfc *interface) 274 { 275 if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED)) 276 return; 277 278 interface->flags &= ~FM10K_FLAG_RESET_REQUESTED; 279 280 netdev_err(interface->netdev, "Reset interface\n"); 281 282 fm10k_reinit(interface); 283 } 284 285 /** 286 * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping 287 * @interface: board private structure 288 * 289 * Configure the SWPRI to PC mapping for the port. 290 **/ 291 static void fm10k_configure_swpri_map(struct fm10k_intfc *interface) 292 { 293 struct net_device *netdev = interface->netdev; 294 struct fm10k_hw *hw = &interface->hw; 295 int i; 296 297 /* clear flag indicating update is needed */ 298 interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG; 299 300 /* these registers are only available on the PF */ 301 if (hw->mac.type != fm10k_mac_pf) 302 return; 303 304 /* configure SWPRI to PC map */ 305 for (i = 0; i < FM10K_SWPRI_MAX; i++) 306 fm10k_write_reg(hw, FM10K_SWPRI_MAP(i), 307 netdev_get_prio_tc_map(netdev, i)); 308 } 309 310 /** 311 * fm10k_watchdog_update_host_state - Update the link status based on host. 312 * @interface: board private structure 313 **/ 314 static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface) 315 { 316 struct fm10k_hw *hw = &interface->hw; 317 s32 err; 318 319 if (test_bit(__FM10K_LINK_DOWN, &interface->state)) { 320 interface->host_ready = false; 321 if (time_is_after_jiffies(interface->link_down_event)) 322 return; 323 clear_bit(__FM10K_LINK_DOWN, &interface->state); 324 } 325 326 if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) { 327 if (rtnl_trylock()) { 328 fm10k_configure_swpri_map(interface); 329 rtnl_unlock(); 330 } 331 } 332 333 /* lock the mailbox for transmit and receive */ 334 fm10k_mbx_lock(interface); 335 336 err = hw->mac.ops.get_host_state(hw, &interface->host_ready); 337 if (err && time_is_before_jiffies(interface->last_reset)) 338 interface->flags |= FM10K_FLAG_RESET_REQUESTED; 339 340 /* free the lock */ 341 fm10k_mbx_unlock(interface); 342 } 343 344 /** 345 * fm10k_mbx_subtask - Process upstream and downstream mailboxes 346 * @interface: board private structure 347 * 348 * This function will process both the upstream and downstream mailboxes. 349 **/ 350 static void fm10k_mbx_subtask(struct fm10k_intfc *interface) 351 { 352 /* process upstream mailbox and update device state */ 353 fm10k_watchdog_update_host_state(interface); 354 355 /* process downstream mailboxes */ 356 fm10k_iov_mbx(interface); 357 } 358 359 /** 360 * fm10k_watchdog_host_is_ready - Update netdev status based on host ready 361 * @interface: board private structure 362 **/ 363 static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface) 364 { 365 struct net_device *netdev = interface->netdev; 366 367 /* only continue if link state is currently down */ 368 if (netif_carrier_ok(netdev)) 369 return; 370 371 netif_info(interface, drv, netdev, "NIC Link is up\n"); 372 373 netif_carrier_on(netdev); 374 netif_tx_wake_all_queues(netdev); 375 } 376 377 /** 378 * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready 379 * @interface: board private structure 380 **/ 381 static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface) 382 { 383 struct net_device *netdev = interface->netdev; 384 385 /* only continue if link state is currently up */ 386 if (!netif_carrier_ok(netdev)) 387 return; 388 389 netif_info(interface, drv, netdev, "NIC Link is down\n"); 390 391 netif_carrier_off(netdev); 392 netif_tx_stop_all_queues(netdev); 393 } 394 395 /** 396 * fm10k_update_stats - Update the board statistics counters. 397 * @interface: board private structure 398 **/ 399 void fm10k_update_stats(struct fm10k_intfc *interface) 400 { 401 struct net_device_stats *net_stats = &interface->netdev->stats; 402 struct fm10k_hw *hw = &interface->hw; 403 u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0; 404 u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0; 405 u64 rx_link_errors = 0; 406 u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0; 407 u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0; 408 u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0; 409 u64 tx_bytes_nic = 0, tx_pkts_nic = 0; 410 u64 bytes, pkts; 411 int i; 412 413 /* ensure only one thread updates stats at a time */ 414 if (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state)) 415 return; 416 417 /* do not allow stats update via service task for next second */ 418 interface->next_stats_update = jiffies + HZ; 419 420 /* gather some stats to the interface struct that are per queue */ 421 for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) { 422 struct fm10k_ring *tx_ring = READ_ONCE(interface->tx_ring[i]); 423 424 if (!tx_ring) 425 continue; 426 427 restart_queue += tx_ring->tx_stats.restart_queue; 428 tx_busy += tx_ring->tx_stats.tx_busy; 429 tx_csum_errors += tx_ring->tx_stats.csum_err; 430 bytes += tx_ring->stats.bytes; 431 pkts += tx_ring->stats.packets; 432 hw_csum_tx_good += tx_ring->tx_stats.csum_good; 433 } 434 435 interface->restart_queue = restart_queue; 436 interface->tx_busy = tx_busy; 437 net_stats->tx_bytes = bytes; 438 net_stats->tx_packets = pkts; 439 interface->tx_csum_errors = tx_csum_errors; 440 interface->hw_csum_tx_good = hw_csum_tx_good; 441 442 /* gather some stats to the interface struct that are per queue */ 443 for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) { 444 struct fm10k_ring *rx_ring = READ_ONCE(interface->rx_ring[i]); 445 446 if (!rx_ring) 447 continue; 448 449 bytes += rx_ring->stats.bytes; 450 pkts += rx_ring->stats.packets; 451 alloc_failed += rx_ring->rx_stats.alloc_failed; 452 rx_csum_errors += rx_ring->rx_stats.csum_err; 453 rx_errors += rx_ring->rx_stats.errors; 454 hw_csum_rx_good += rx_ring->rx_stats.csum_good; 455 rx_switch_errors += rx_ring->rx_stats.switch_errors; 456 rx_drops += rx_ring->rx_stats.drops; 457 rx_pp_errors += rx_ring->rx_stats.pp_errors; 458 rx_link_errors += rx_ring->rx_stats.link_errors; 459 rx_length_errors += rx_ring->rx_stats.length_errors; 460 } 461 462 net_stats->rx_bytes = bytes; 463 net_stats->rx_packets = pkts; 464 interface->alloc_failed = alloc_failed; 465 interface->rx_csum_errors = rx_csum_errors; 466 interface->hw_csum_rx_good = hw_csum_rx_good; 467 interface->rx_switch_errors = rx_switch_errors; 468 interface->rx_drops = rx_drops; 469 interface->rx_pp_errors = rx_pp_errors; 470 interface->rx_link_errors = rx_link_errors; 471 interface->rx_length_errors = rx_length_errors; 472 473 hw->mac.ops.update_hw_stats(hw, &interface->stats); 474 475 for (i = 0; i < hw->mac.max_queues; i++) { 476 struct fm10k_hw_stats_q *q = &interface->stats.q[i]; 477 478 tx_bytes_nic += q->tx_bytes.count; 479 tx_pkts_nic += q->tx_packets.count; 480 rx_bytes_nic += q->rx_bytes.count; 481 rx_pkts_nic += q->rx_packets.count; 482 rx_drops_nic += q->rx_drops.count; 483 } 484 485 interface->tx_bytes_nic = tx_bytes_nic; 486 interface->tx_packets_nic = tx_pkts_nic; 487 interface->rx_bytes_nic = rx_bytes_nic; 488 interface->rx_packets_nic = rx_pkts_nic; 489 interface->rx_drops_nic = rx_drops_nic; 490 491 /* Fill out the OS statistics structure */ 492 net_stats->rx_errors = rx_errors; 493 net_stats->rx_dropped = interface->stats.nodesc_drop.count; 494 495 clear_bit(__FM10K_UPDATING_STATS, &interface->state); 496 } 497 498 /** 499 * fm10k_watchdog_flush_tx - flush queues on host not ready 500 * @interface - pointer to the device interface structure 501 **/ 502 static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface) 503 { 504 int some_tx_pending = 0; 505 int i; 506 507 /* nothing to do if carrier is up */ 508 if (netif_carrier_ok(interface->netdev)) 509 return; 510 511 for (i = 0; i < interface->num_tx_queues; i++) { 512 struct fm10k_ring *tx_ring = interface->tx_ring[i]; 513 514 if (tx_ring->next_to_use != tx_ring->next_to_clean) { 515 some_tx_pending = 1; 516 break; 517 } 518 } 519 520 /* We've lost link, so the controller stops DMA, but we've got 521 * queued Tx work that's never going to get done, so reset 522 * controller to flush Tx. 523 */ 524 if (some_tx_pending) 525 interface->flags |= FM10K_FLAG_RESET_REQUESTED; 526 } 527 528 /** 529 * fm10k_watchdog_subtask - check and bring link up 530 * @interface - pointer to the device interface structure 531 **/ 532 static void fm10k_watchdog_subtask(struct fm10k_intfc *interface) 533 { 534 /* if interface is down do nothing */ 535 if (test_bit(__FM10K_DOWN, &interface->state) || 536 test_bit(__FM10K_RESETTING, &interface->state)) 537 return; 538 539 if (interface->host_ready) 540 fm10k_watchdog_host_is_ready(interface); 541 else 542 fm10k_watchdog_host_not_ready(interface); 543 544 /* update stats only once every second */ 545 if (time_is_before_jiffies(interface->next_stats_update)) 546 fm10k_update_stats(interface); 547 548 /* flush any uncompleted work */ 549 fm10k_watchdog_flush_tx(interface); 550 } 551 552 /** 553 * fm10k_check_hang_subtask - check for hung queues and dropped interrupts 554 * @interface - pointer to the device interface structure 555 * 556 * This function serves two purposes. First it strobes the interrupt lines 557 * in order to make certain interrupts are occurring. Secondly it sets the 558 * bits needed to check for TX hangs. As a result we should immediately 559 * determine if a hang has occurred. 560 */ 561 static void fm10k_check_hang_subtask(struct fm10k_intfc *interface) 562 { 563 int i; 564 565 /* If we're down or resetting, just bail */ 566 if (test_bit(__FM10K_DOWN, &interface->state) || 567 test_bit(__FM10K_RESETTING, &interface->state)) 568 return; 569 570 /* rate limit tx hang checks to only once every 2 seconds */ 571 if (time_is_after_eq_jiffies(interface->next_tx_hang_check)) 572 return; 573 interface->next_tx_hang_check = jiffies + (2 * HZ); 574 575 if (netif_carrier_ok(interface->netdev)) { 576 /* Force detection of hung controller */ 577 for (i = 0; i < interface->num_tx_queues; i++) 578 set_check_for_tx_hang(interface->tx_ring[i]); 579 580 /* Rearm all in-use q_vectors for immediate firing */ 581 for (i = 0; i < interface->num_q_vectors; i++) { 582 struct fm10k_q_vector *qv = interface->q_vector[i]; 583 584 if (!qv->tx.count && !qv->rx.count) 585 continue; 586 writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr); 587 } 588 } 589 } 590 591 /** 592 * fm10k_service_task - manages and runs subtasks 593 * @work: pointer to work_struct containing our data 594 **/ 595 static void fm10k_service_task(struct work_struct *work) 596 { 597 struct fm10k_intfc *interface; 598 599 interface = container_of(work, struct fm10k_intfc, service_task); 600 601 /* tasks run even when interface is down */ 602 fm10k_mbx_subtask(interface); 603 fm10k_detach_subtask(interface); 604 fm10k_reset_subtask(interface); 605 606 /* tasks only run when interface is up */ 607 fm10k_watchdog_subtask(interface); 608 fm10k_check_hang_subtask(interface); 609 610 /* release lock on service events to allow scheduling next event */ 611 fm10k_service_event_complete(interface); 612 } 613 614 /** 615 * fm10k_configure_tx_ring - Configure Tx ring after Reset 616 * @interface: board private structure 617 * @ring: structure containing ring specific data 618 * 619 * Configure the Tx descriptor ring after a reset. 620 **/ 621 static void fm10k_configure_tx_ring(struct fm10k_intfc *interface, 622 struct fm10k_ring *ring) 623 { 624 struct fm10k_hw *hw = &interface->hw; 625 u64 tdba = ring->dma; 626 u32 size = ring->count * sizeof(struct fm10k_tx_desc); 627 u32 txint = FM10K_INT_MAP_DISABLE; 628 u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE; 629 u8 reg_idx = ring->reg_idx; 630 631 /* disable queue to avoid issues while updating state */ 632 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0); 633 fm10k_write_flush(hw); 634 635 /* possible poll here to verify ring resources have been cleaned */ 636 637 /* set location and size for descriptor ring */ 638 fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); 639 fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32); 640 fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size); 641 642 /* reset head and tail pointers */ 643 fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0); 644 fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0); 645 646 /* store tail pointer */ 647 ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)]; 648 649 /* reset ntu and ntc to place SW in sync with hardware */ 650 ring->next_to_clean = 0; 651 ring->next_to_use = 0; 652 653 /* Map interrupt */ 654 if (ring->q_vector) { 655 txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw); 656 txint |= FM10K_INT_MAP_TIMER0; 657 } 658 659 fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint); 660 661 /* enable use of FTAG bit in Tx descriptor, register is RO for VF */ 662 fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx), 663 FM10K_PFVTCTL_FTAG_DESC_ENABLE); 664 665 /* Initialize XPS */ 666 if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, &ring->state) && 667 ring->q_vector) 668 netif_set_xps_queue(ring->netdev, 669 &ring->q_vector->affinity_mask, 670 ring->queue_index); 671 672 /* enable queue */ 673 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl); 674 } 675 676 /** 677 * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration 678 * @interface: board private structure 679 * @ring: structure containing ring specific data 680 * 681 * Verify the Tx descriptor ring is ready for transmit. 682 **/ 683 static void fm10k_enable_tx_ring(struct fm10k_intfc *interface, 684 struct fm10k_ring *ring) 685 { 686 struct fm10k_hw *hw = &interface->hw; 687 int wait_loop = 10; 688 u32 txdctl; 689 u8 reg_idx = ring->reg_idx; 690 691 /* if we are already enabled just exit */ 692 if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE) 693 return; 694 695 /* poll to verify queue is enabled */ 696 do { 697 usleep_range(1000, 2000); 698 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)); 699 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop); 700 if (!wait_loop) 701 netif_err(interface, drv, interface->netdev, 702 "Could not enable Tx Queue %d\n", reg_idx); 703 } 704 705 /** 706 * fm10k_configure_tx - Configure Transmit Unit after Reset 707 * @interface: board private structure 708 * 709 * Configure the Tx unit of the MAC after a reset. 710 **/ 711 static void fm10k_configure_tx(struct fm10k_intfc *interface) 712 { 713 int i; 714 715 /* Setup the HW Tx Head and Tail descriptor pointers */ 716 for (i = 0; i < interface->num_tx_queues; i++) 717 fm10k_configure_tx_ring(interface, interface->tx_ring[i]); 718 719 /* poll here to verify that Tx rings are now enabled */ 720 for (i = 0; i < interface->num_tx_queues; i++) 721 fm10k_enable_tx_ring(interface, interface->tx_ring[i]); 722 } 723 724 /** 725 * fm10k_configure_rx_ring - Configure Rx ring after Reset 726 * @interface: board private structure 727 * @ring: structure containing ring specific data 728 * 729 * Configure the Rx descriptor ring after a reset. 730 **/ 731 static void fm10k_configure_rx_ring(struct fm10k_intfc *interface, 732 struct fm10k_ring *ring) 733 { 734 u64 rdba = ring->dma; 735 struct fm10k_hw *hw = &interface->hw; 736 u32 size = ring->count * sizeof(union fm10k_rx_desc); 737 u32 rxqctl, rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; 738 u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN; 739 u32 rxint = FM10K_INT_MAP_DISABLE; 740 u8 rx_pause = interface->rx_pause; 741 u8 reg_idx = ring->reg_idx; 742 743 /* disable queue to avoid issues while updating state */ 744 rxqctl = fm10k_read_reg(hw, FM10K_RXQCTL(reg_idx)); 745 rxqctl &= ~FM10K_RXQCTL_ENABLE; 746 fm10k_write_flush(hw); 747 748 /* possible poll here to verify ring resources have been cleaned */ 749 750 /* set location and size for descriptor ring */ 751 fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32)); 752 fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32); 753 fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size); 754 755 /* reset head and tail pointers */ 756 fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0); 757 fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0); 758 759 /* store tail pointer */ 760 ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)]; 761 762 /* reset ntu and ntc to place SW in sync with hardware */ 763 ring->next_to_clean = 0; 764 ring->next_to_use = 0; 765 ring->next_to_alloc = 0; 766 767 /* Configure the Rx buffer size for one buff without split */ 768 srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT; 769 770 /* Configure the Rx ring to suppress loopback packets */ 771 srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS; 772 fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl); 773 774 /* Enable drop on empty */ 775 #ifdef CONFIG_DCB 776 if (interface->pfc_en) 777 rx_pause = interface->pfc_en; 778 #endif 779 if (!(rx_pause & BIT(ring->qos_pc))) 780 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY; 781 782 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl); 783 784 /* assign default VLAN to queue */ 785 ring->vid = hw->mac.default_vid; 786 787 /* if we have an active VLAN, disable default VLAN ID */ 788 if (test_bit(hw->mac.default_vid, interface->active_vlans)) 789 ring->vid |= FM10K_VLAN_CLEAR; 790 791 /* Map interrupt */ 792 if (ring->q_vector) { 793 rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw); 794 rxint |= FM10K_INT_MAP_TIMER1; 795 } 796 797 fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint); 798 799 /* enable queue */ 800 rxqctl = fm10k_read_reg(hw, FM10K_RXQCTL(reg_idx)); 801 rxqctl |= FM10K_RXQCTL_ENABLE; 802 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl); 803 804 /* place buffers on ring for receive data */ 805 fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring)); 806 } 807 808 /** 809 * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings 810 * @interface: board private structure 811 * 812 * Configure the drop enable bits for the Rx rings. 813 **/ 814 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface) 815 { 816 struct fm10k_hw *hw = &interface->hw; 817 u8 rx_pause = interface->rx_pause; 818 int i; 819 820 #ifdef CONFIG_DCB 821 if (interface->pfc_en) 822 rx_pause = interface->pfc_en; 823 824 #endif 825 for (i = 0; i < interface->num_rx_queues; i++) { 826 struct fm10k_ring *ring = interface->rx_ring[i]; 827 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; 828 u8 reg_idx = ring->reg_idx; 829 830 if (!(rx_pause & BIT(ring->qos_pc))) 831 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY; 832 833 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl); 834 } 835 } 836 837 /** 838 * fm10k_configure_dglort - Configure Receive DGLORT after reset 839 * @interface: board private structure 840 * 841 * Configure the DGLORT description and RSS tables. 842 **/ 843 static void fm10k_configure_dglort(struct fm10k_intfc *interface) 844 { 845 struct fm10k_dglort_cfg dglort = { 0 }; 846 struct fm10k_hw *hw = &interface->hw; 847 int i; 848 u32 mrqc; 849 850 /* Fill out hash function seeds */ 851 for (i = 0; i < FM10K_RSSRK_SIZE; i++) 852 fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]); 853 854 /* Write RETA table to hardware */ 855 for (i = 0; i < FM10K_RETA_SIZE; i++) 856 fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]); 857 858 /* Generate RSS hash based on packet types, TCP/UDP 859 * port numbers and/or IPv4/v6 src and dst addresses 860 */ 861 mrqc = FM10K_MRQC_IPV4 | 862 FM10K_MRQC_TCP_IPV4 | 863 FM10K_MRQC_IPV6 | 864 FM10K_MRQC_TCP_IPV6; 865 866 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP) 867 mrqc |= FM10K_MRQC_UDP_IPV4; 868 if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP) 869 mrqc |= FM10K_MRQC_UDP_IPV6; 870 871 fm10k_write_reg(hw, FM10K_MRQC(0), mrqc); 872 873 /* configure default DGLORT mapping for RSS/DCB */ 874 dglort.inner_rss = 1; 875 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask); 876 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask); 877 hw->mac.ops.configure_dglort_map(hw, &dglort); 878 879 /* assign GLORT per queue for queue mapped testing */ 880 if (interface->glort_count > 64) { 881 memset(&dglort, 0, sizeof(dglort)); 882 dglort.inner_rss = 1; 883 dglort.glort = interface->glort + 64; 884 dglort.idx = fm10k_dglort_pf_queue; 885 dglort.queue_l = fls(interface->num_rx_queues - 1); 886 hw->mac.ops.configure_dglort_map(hw, &dglort); 887 } 888 889 /* assign glort value for RSS/DCB specific to this interface */ 890 memset(&dglort, 0, sizeof(dglort)); 891 dglort.inner_rss = 1; 892 dglort.glort = interface->glort; 893 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask); 894 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask); 895 /* configure DGLORT mapping for RSS/DCB */ 896 dglort.idx = fm10k_dglort_pf_rss; 897 if (interface->l2_accel) 898 dglort.shared_l = fls(interface->l2_accel->size); 899 hw->mac.ops.configure_dglort_map(hw, &dglort); 900 } 901 902 /** 903 * fm10k_configure_rx - Configure Receive Unit after Reset 904 * @interface: board private structure 905 * 906 * Configure the Rx unit of the MAC after a reset. 907 **/ 908 static void fm10k_configure_rx(struct fm10k_intfc *interface) 909 { 910 int i; 911 912 /* Configure SWPRI to PC map */ 913 fm10k_configure_swpri_map(interface); 914 915 /* Configure RSS and DGLORT map */ 916 fm10k_configure_dglort(interface); 917 918 /* Setup the HW Rx Head and Tail descriptor pointers */ 919 for (i = 0; i < interface->num_rx_queues; i++) 920 fm10k_configure_rx_ring(interface, interface->rx_ring[i]); 921 922 /* possible poll here to verify that Rx rings are now enabled */ 923 } 924 925 static void fm10k_napi_enable_all(struct fm10k_intfc *interface) 926 { 927 struct fm10k_q_vector *q_vector; 928 int q_idx; 929 930 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) { 931 q_vector = interface->q_vector[q_idx]; 932 napi_enable(&q_vector->napi); 933 } 934 } 935 936 static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data) 937 { 938 struct fm10k_q_vector *q_vector = data; 939 940 if (q_vector->rx.count || q_vector->tx.count) 941 napi_schedule_irqoff(&q_vector->napi); 942 943 return IRQ_HANDLED; 944 } 945 946 static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data) 947 { 948 struct fm10k_intfc *interface = data; 949 struct fm10k_hw *hw = &interface->hw; 950 struct fm10k_mbx_info *mbx = &hw->mbx; 951 952 /* re-enable mailbox interrupt and indicate 20us delay */ 953 fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR), 954 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) | 955 FM10K_ITR_ENABLE); 956 957 /* service upstream mailbox */ 958 if (fm10k_mbx_trylock(interface)) { 959 mbx->ops.process(hw, mbx); 960 fm10k_mbx_unlock(interface); 961 } 962 963 hw->mac.get_host_state = true; 964 fm10k_service_event_schedule(interface); 965 966 return IRQ_HANDLED; 967 } 968 969 #ifdef CONFIG_NET_POLL_CONTROLLER 970 /** 971 * fm10k_netpoll - A Polling 'interrupt' handler 972 * @netdev: network interface device structure 973 * 974 * This is used by netconsole to send skbs without having to re-enable 975 * interrupts. It's not called while the normal interrupt routine is executing. 976 **/ 977 void fm10k_netpoll(struct net_device *netdev) 978 { 979 struct fm10k_intfc *interface = netdev_priv(netdev); 980 int i; 981 982 /* if interface is down do nothing */ 983 if (test_bit(__FM10K_DOWN, &interface->state)) 984 return; 985 986 for (i = 0; i < interface->num_q_vectors; i++) 987 fm10k_msix_clean_rings(0, interface->q_vector[i]); 988 } 989 990 #endif 991 #define FM10K_ERR_MSG(type) case (type): error = #type; break 992 static void fm10k_handle_fault(struct fm10k_intfc *interface, int type, 993 struct fm10k_fault *fault) 994 { 995 struct pci_dev *pdev = interface->pdev; 996 struct fm10k_hw *hw = &interface->hw; 997 struct fm10k_iov_data *iov_data = interface->iov_data; 998 char *error; 999 1000 switch (type) { 1001 case FM10K_PCA_FAULT: 1002 switch (fault->type) { 1003 default: 1004 error = "Unknown PCA error"; 1005 break; 1006 FM10K_ERR_MSG(PCA_NO_FAULT); 1007 FM10K_ERR_MSG(PCA_UNMAPPED_ADDR); 1008 FM10K_ERR_MSG(PCA_BAD_QACCESS_PF); 1009 FM10K_ERR_MSG(PCA_BAD_QACCESS_VF); 1010 FM10K_ERR_MSG(PCA_MALICIOUS_REQ); 1011 FM10K_ERR_MSG(PCA_POISONED_TLP); 1012 FM10K_ERR_MSG(PCA_TLP_ABORT); 1013 } 1014 break; 1015 case FM10K_THI_FAULT: 1016 switch (fault->type) { 1017 default: 1018 error = "Unknown THI error"; 1019 break; 1020 FM10K_ERR_MSG(THI_NO_FAULT); 1021 FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT); 1022 } 1023 break; 1024 case FM10K_FUM_FAULT: 1025 switch (fault->type) { 1026 default: 1027 error = "Unknown FUM error"; 1028 break; 1029 FM10K_ERR_MSG(FUM_NO_FAULT); 1030 FM10K_ERR_MSG(FUM_UNMAPPED_ADDR); 1031 FM10K_ERR_MSG(FUM_BAD_VF_QACCESS); 1032 FM10K_ERR_MSG(FUM_ADD_DECODE_ERR); 1033 FM10K_ERR_MSG(FUM_RO_ERROR); 1034 FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR); 1035 FM10K_ERR_MSG(FUM_CSR_TIMEOUT); 1036 FM10K_ERR_MSG(FUM_INVALID_TYPE); 1037 FM10K_ERR_MSG(FUM_INVALID_LENGTH); 1038 FM10K_ERR_MSG(FUM_INVALID_BE); 1039 FM10K_ERR_MSG(FUM_INVALID_ALIGN); 1040 } 1041 break; 1042 default: 1043 error = "Undocumented fault"; 1044 break; 1045 } 1046 1047 dev_warn(&pdev->dev, 1048 "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n", 1049 error, fault->address, fault->specinfo, 1050 PCI_SLOT(fault->func), PCI_FUNC(fault->func)); 1051 1052 /* For VF faults, clear out the respective LPORT, reset the queue 1053 * resources, and then reconnect to the mailbox. This allows the 1054 * VF in question to resume behavior. For transient faults that are 1055 * the result of non-malicious behavior this will log the fault and 1056 * allow the VF to resume functionality. Obviously for malicious VFs 1057 * they will be able to attempt malicious behavior again. In this 1058 * case, the system administrator will need to step in and manually 1059 * remove or disable the VF in question. 1060 */ 1061 if (fault->func && iov_data) { 1062 int vf = fault->func - 1; 1063 struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf]; 1064 1065 hw->iov.ops.reset_lport(hw, vf_info); 1066 hw->iov.ops.reset_resources(hw, vf_info); 1067 1068 /* reset_lport disables the VF, so re-enable it */ 1069 hw->iov.ops.set_lport(hw, vf_info, vf, 1070 FM10K_VF_FLAG_MULTI_CAPABLE); 1071 1072 /* reset_resources will disconnect from the mbx */ 1073 vf_info->mbx.ops.connect(hw, &vf_info->mbx); 1074 } 1075 } 1076 1077 static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr) 1078 { 1079 struct fm10k_hw *hw = &interface->hw; 1080 struct fm10k_fault fault = { 0 }; 1081 int type, err; 1082 1083 for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT; 1084 eicr; 1085 eicr >>= 1, type += FM10K_FAULT_SIZE) { 1086 /* only check if there is an error reported */ 1087 if (!(eicr & 0x1)) 1088 continue; 1089 1090 /* retrieve fault info */ 1091 err = hw->mac.ops.get_fault(hw, type, &fault); 1092 if (err) { 1093 dev_err(&interface->pdev->dev, 1094 "error reading fault\n"); 1095 continue; 1096 } 1097 1098 fm10k_handle_fault(interface, type, &fault); 1099 } 1100 } 1101 1102 static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr) 1103 { 1104 struct fm10k_hw *hw = &interface->hw; 1105 const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; 1106 u32 maxholdq; 1107 int q; 1108 1109 if (!(eicr & FM10K_EICR_MAXHOLDTIME)) 1110 return; 1111 1112 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7)); 1113 if (maxholdq) 1114 fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq); 1115 for (q = 255;;) { 1116 if (maxholdq & BIT(31)) { 1117 if (q < FM10K_MAX_QUEUES_PF) { 1118 interface->rx_overrun_pf++; 1119 fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl); 1120 } else { 1121 interface->rx_overrun_vf++; 1122 } 1123 } 1124 1125 maxholdq *= 2; 1126 if (!maxholdq) 1127 q &= ~(32 - 1); 1128 1129 if (!q) 1130 break; 1131 1132 if (q-- % 32) 1133 continue; 1134 1135 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32)); 1136 if (maxholdq) 1137 fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq); 1138 } 1139 } 1140 1141 static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data) 1142 { 1143 struct fm10k_intfc *interface = data; 1144 struct fm10k_hw *hw = &interface->hw; 1145 struct fm10k_mbx_info *mbx = &hw->mbx; 1146 u32 eicr; 1147 1148 /* unmask any set bits related to this interrupt */ 1149 eicr = fm10k_read_reg(hw, FM10K_EICR); 1150 fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX | 1151 FM10K_EICR_SWITCHREADY | 1152 FM10K_EICR_SWITCHNOTREADY)); 1153 1154 /* report any faults found to the message log */ 1155 fm10k_report_fault(interface, eicr); 1156 1157 /* reset any queues disabled due to receiver overrun */ 1158 fm10k_reset_drop_on_empty(interface, eicr); 1159 1160 /* service mailboxes */ 1161 if (fm10k_mbx_trylock(interface)) { 1162 mbx->ops.process(hw, mbx); 1163 /* handle VFLRE events */ 1164 fm10k_iov_event(interface); 1165 fm10k_mbx_unlock(interface); 1166 } 1167 1168 /* if switch toggled state we should reset GLORTs */ 1169 if (eicr & FM10K_EICR_SWITCHNOTREADY) { 1170 /* force link down for at least 4 seconds */ 1171 interface->link_down_event = jiffies + (4 * HZ); 1172 set_bit(__FM10K_LINK_DOWN, &interface->state); 1173 1174 /* reset dglort_map back to no config */ 1175 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE; 1176 } 1177 1178 /* we should validate host state after interrupt event */ 1179 hw->mac.get_host_state = true; 1180 1181 /* validate host state, and handle VF mailboxes in the service task */ 1182 fm10k_service_event_schedule(interface); 1183 1184 /* re-enable mailbox interrupt and indicate 20us delay */ 1185 fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR), 1186 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) | 1187 FM10K_ITR_ENABLE); 1188 1189 return IRQ_HANDLED; 1190 } 1191 1192 void fm10k_mbx_free_irq(struct fm10k_intfc *interface) 1193 { 1194 struct fm10k_hw *hw = &interface->hw; 1195 struct msix_entry *entry; 1196 int itr_reg; 1197 1198 /* no mailbox IRQ to free if MSI-X is not enabled */ 1199 if (!interface->msix_entries) 1200 return; 1201 1202 entry = &interface->msix_entries[FM10K_MBX_VECTOR]; 1203 1204 /* disconnect the mailbox */ 1205 hw->mbx.ops.disconnect(hw, &hw->mbx); 1206 1207 /* disable Mailbox cause */ 1208 if (hw->mac.type == fm10k_mac_pf) { 1209 fm10k_write_reg(hw, FM10K_EIMR, 1210 FM10K_EIMR_DISABLE(PCA_FAULT) | 1211 FM10K_EIMR_DISABLE(FUM_FAULT) | 1212 FM10K_EIMR_DISABLE(MAILBOX) | 1213 FM10K_EIMR_DISABLE(SWITCHREADY) | 1214 FM10K_EIMR_DISABLE(SWITCHNOTREADY) | 1215 FM10K_EIMR_DISABLE(SRAMERROR) | 1216 FM10K_EIMR_DISABLE(VFLR) | 1217 FM10K_EIMR_DISABLE(MAXHOLDTIME)); 1218 itr_reg = FM10K_ITR(FM10K_MBX_VECTOR); 1219 } else { 1220 itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR); 1221 } 1222 1223 fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET); 1224 1225 free_irq(entry->vector, interface); 1226 } 1227 1228 static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results, 1229 struct fm10k_mbx_info *mbx) 1230 { 1231 bool vlan_override = hw->mac.vlan_override; 1232 u16 default_vid = hw->mac.default_vid; 1233 struct fm10k_intfc *interface; 1234 s32 err; 1235 1236 err = fm10k_msg_mac_vlan_vf(hw, results, mbx); 1237 if (err) 1238 return err; 1239 1240 interface = container_of(hw, struct fm10k_intfc, hw); 1241 1242 /* MAC was changed so we need reset */ 1243 if (is_valid_ether_addr(hw->mac.perm_addr) && 1244 !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr)) 1245 interface->flags |= FM10K_FLAG_RESET_REQUESTED; 1246 1247 /* VLAN override was changed, or default VLAN changed */ 1248 if ((vlan_override != hw->mac.vlan_override) || 1249 (default_vid != hw->mac.default_vid)) 1250 interface->flags |= FM10K_FLAG_RESET_REQUESTED; 1251 1252 return 0; 1253 } 1254 1255 /* generic error handler for mailbox issues */ 1256 static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results, 1257 struct fm10k_mbx_info __always_unused *mbx) 1258 { 1259 struct fm10k_intfc *interface; 1260 struct pci_dev *pdev; 1261 1262 interface = container_of(hw, struct fm10k_intfc, hw); 1263 pdev = interface->pdev; 1264 1265 dev_err(&pdev->dev, "Unknown message ID %u\n", 1266 **results & FM10K_TLV_ID_MASK); 1267 1268 return 0; 1269 } 1270 1271 static const struct fm10k_msg_data vf_mbx_data[] = { 1272 FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test), 1273 FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr), 1274 FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf), 1275 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error), 1276 }; 1277 1278 static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface) 1279 { 1280 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR]; 1281 struct net_device *dev = interface->netdev; 1282 struct fm10k_hw *hw = &interface->hw; 1283 int err; 1284 1285 /* Use timer0 for interrupt moderation on the mailbox */ 1286 u32 itr = entry->entry | FM10K_INT_MAP_TIMER0; 1287 1288 /* register mailbox handlers */ 1289 err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data); 1290 if (err) 1291 return err; 1292 1293 /* request the IRQ */ 1294 err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0, 1295 dev->name, interface); 1296 if (err) { 1297 netif_err(interface, probe, dev, 1298 "request_irq for msix_mbx failed: %d\n", err); 1299 return err; 1300 } 1301 1302 /* map all of the interrupt sources */ 1303 fm10k_write_reg(hw, FM10K_VFINT_MAP, itr); 1304 1305 /* enable interrupt */ 1306 fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE); 1307 1308 return 0; 1309 } 1310 1311 static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results, 1312 struct fm10k_mbx_info *mbx) 1313 { 1314 struct fm10k_intfc *interface; 1315 u32 dglort_map = hw->mac.dglort_map; 1316 s32 err; 1317 1318 interface = container_of(hw, struct fm10k_intfc, hw); 1319 1320 err = fm10k_msg_err_pf(hw, results, mbx); 1321 if (!err && hw->swapi.status) { 1322 /* force link down for a reasonable delay */ 1323 interface->link_down_event = jiffies + (2 * HZ); 1324 set_bit(__FM10K_LINK_DOWN, &interface->state); 1325 1326 /* reset dglort_map back to no config */ 1327 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE; 1328 1329 fm10k_service_event_schedule(interface); 1330 1331 /* prevent overloading kernel message buffer */ 1332 if (interface->lport_map_failed) 1333 return 0; 1334 1335 interface->lport_map_failed = true; 1336 1337 if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED) 1338 dev_warn(&interface->pdev->dev, 1339 "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n"); 1340 dev_warn(&interface->pdev->dev, 1341 "request logical port map failed: %d\n", 1342 hw->swapi.status); 1343 1344 return 0; 1345 } 1346 1347 err = fm10k_msg_lport_map_pf(hw, results, mbx); 1348 if (err) 1349 return err; 1350 1351 interface->lport_map_failed = false; 1352 1353 /* we need to reset if port count was just updated */ 1354 if (dglort_map != hw->mac.dglort_map) 1355 interface->flags |= FM10K_FLAG_RESET_REQUESTED; 1356 1357 return 0; 1358 } 1359 1360 static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results, 1361 struct fm10k_mbx_info __always_unused *mbx) 1362 { 1363 struct fm10k_intfc *interface; 1364 u16 glort, pvid; 1365 u32 pvid_update; 1366 s32 err; 1367 1368 err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID], 1369 &pvid_update); 1370 if (err) 1371 return err; 1372 1373 /* extract values from the pvid update */ 1374 glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT); 1375 pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID); 1376 1377 /* if glort is not valid return error */ 1378 if (!fm10k_glort_valid_pf(hw, glort)) 1379 return FM10K_ERR_PARAM; 1380 1381 /* verify VLAN ID is valid */ 1382 if (pvid >= FM10K_VLAN_TABLE_VID_MAX) 1383 return FM10K_ERR_PARAM; 1384 1385 interface = container_of(hw, struct fm10k_intfc, hw); 1386 1387 /* check to see if this belongs to one of the VFs */ 1388 err = fm10k_iov_update_pvid(interface, glort, pvid); 1389 if (!err) 1390 return 0; 1391 1392 /* we need to reset if default VLAN was just updated */ 1393 if (pvid != hw->mac.default_vid) 1394 interface->flags |= FM10K_FLAG_RESET_REQUESTED; 1395 1396 hw->mac.default_vid = pvid; 1397 1398 return 0; 1399 } 1400 1401 static const struct fm10k_msg_data pf_mbx_data[] = { 1402 FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf), 1403 FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf), 1404 FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map), 1405 FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf), 1406 FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf), 1407 FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid), 1408 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error), 1409 }; 1410 1411 static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface) 1412 { 1413 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR]; 1414 struct net_device *dev = interface->netdev; 1415 struct fm10k_hw *hw = &interface->hw; 1416 int err; 1417 1418 /* Use timer0 for interrupt moderation on the mailbox */ 1419 u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0; 1420 u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE; 1421 1422 /* register mailbox handlers */ 1423 err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data); 1424 if (err) 1425 return err; 1426 1427 /* request the IRQ */ 1428 err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0, 1429 dev->name, interface); 1430 if (err) { 1431 netif_err(interface, probe, dev, 1432 "request_irq for msix_mbx failed: %d\n", err); 1433 return err; 1434 } 1435 1436 /* Enable interrupts w/ no moderation for "other" interrupts */ 1437 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr); 1438 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr); 1439 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr); 1440 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr); 1441 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr); 1442 1443 /* Enable interrupts w/ moderation for mailbox */ 1444 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr); 1445 1446 /* Enable individual interrupt causes */ 1447 fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) | 1448 FM10K_EIMR_ENABLE(FUM_FAULT) | 1449 FM10K_EIMR_ENABLE(MAILBOX) | 1450 FM10K_EIMR_ENABLE(SWITCHREADY) | 1451 FM10K_EIMR_ENABLE(SWITCHNOTREADY) | 1452 FM10K_EIMR_ENABLE(SRAMERROR) | 1453 FM10K_EIMR_ENABLE(VFLR) | 1454 FM10K_EIMR_ENABLE(MAXHOLDTIME)); 1455 1456 /* enable interrupt */ 1457 fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE); 1458 1459 return 0; 1460 } 1461 1462 int fm10k_mbx_request_irq(struct fm10k_intfc *interface) 1463 { 1464 struct fm10k_hw *hw = &interface->hw; 1465 int err; 1466 1467 /* enable Mailbox cause */ 1468 if (hw->mac.type == fm10k_mac_pf) 1469 err = fm10k_mbx_request_irq_pf(interface); 1470 else 1471 err = fm10k_mbx_request_irq_vf(interface); 1472 if (err) 1473 return err; 1474 1475 /* connect mailbox */ 1476 err = hw->mbx.ops.connect(hw, &hw->mbx); 1477 1478 /* if the mailbox failed to connect, then free IRQ */ 1479 if (err) 1480 fm10k_mbx_free_irq(interface); 1481 1482 return err; 1483 } 1484 1485 /** 1486 * fm10k_qv_free_irq - release interrupts associated with queue vectors 1487 * @interface: board private structure 1488 * 1489 * Release all interrupts associated with this interface 1490 **/ 1491 void fm10k_qv_free_irq(struct fm10k_intfc *interface) 1492 { 1493 int vector = interface->num_q_vectors; 1494 struct fm10k_hw *hw = &interface->hw; 1495 struct msix_entry *entry; 1496 1497 entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector]; 1498 1499 while (vector) { 1500 struct fm10k_q_vector *q_vector; 1501 1502 vector--; 1503 entry--; 1504 q_vector = interface->q_vector[vector]; 1505 1506 if (!q_vector->tx.count && !q_vector->rx.count) 1507 continue; 1508 1509 /* clear the affinity_mask in the IRQ descriptor */ 1510 irq_set_affinity_hint(entry->vector, NULL); 1511 1512 /* disable interrupts */ 1513 writel(FM10K_ITR_MASK_SET, q_vector->itr); 1514 1515 free_irq(entry->vector, q_vector); 1516 } 1517 } 1518 1519 /** 1520 * fm10k_qv_request_irq - initialize interrupts for queue vectors 1521 * @interface: board private structure 1522 * 1523 * Attempts to configure interrupts using the best available 1524 * capabilities of the hardware and kernel. 1525 **/ 1526 int fm10k_qv_request_irq(struct fm10k_intfc *interface) 1527 { 1528 struct net_device *dev = interface->netdev; 1529 struct fm10k_hw *hw = &interface->hw; 1530 struct msix_entry *entry; 1531 int ri = 0, ti = 0; 1532 int vector, err; 1533 1534 entry = &interface->msix_entries[NON_Q_VECTORS(hw)]; 1535 1536 for (vector = 0; vector < interface->num_q_vectors; vector++) { 1537 struct fm10k_q_vector *q_vector = interface->q_vector[vector]; 1538 1539 /* name the vector */ 1540 if (q_vector->tx.count && q_vector->rx.count) { 1541 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 1542 "%s-TxRx-%d", dev->name, ri++); 1543 ti++; 1544 } else if (q_vector->rx.count) { 1545 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 1546 "%s-rx-%d", dev->name, ri++); 1547 } else if (q_vector->tx.count) { 1548 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 1549 "%s-tx-%d", dev->name, ti++); 1550 } else { 1551 /* skip this unused q_vector */ 1552 continue; 1553 } 1554 1555 /* Assign ITR register to q_vector */ 1556 q_vector->itr = (hw->mac.type == fm10k_mac_pf) ? 1557 &interface->uc_addr[FM10K_ITR(entry->entry)] : 1558 &interface->uc_addr[FM10K_VFITR(entry->entry)]; 1559 1560 /* request the IRQ */ 1561 err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0, 1562 q_vector->name, q_vector); 1563 if (err) { 1564 netif_err(interface, probe, dev, 1565 "request_irq failed for MSIX interrupt Error: %d\n", 1566 err); 1567 goto err_out; 1568 } 1569 1570 /* assign the mask for this irq */ 1571 irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask); 1572 1573 /* Enable q_vector */ 1574 writel(FM10K_ITR_ENABLE, q_vector->itr); 1575 1576 entry++; 1577 } 1578 1579 return 0; 1580 1581 err_out: 1582 /* wind through the ring freeing all entries and vectors */ 1583 while (vector) { 1584 struct fm10k_q_vector *q_vector; 1585 1586 entry--; 1587 vector--; 1588 q_vector = interface->q_vector[vector]; 1589 1590 if (!q_vector->tx.count && !q_vector->rx.count) 1591 continue; 1592 1593 /* clear the affinity_mask in the IRQ descriptor */ 1594 irq_set_affinity_hint(entry->vector, NULL); 1595 1596 /* disable interrupts */ 1597 writel(FM10K_ITR_MASK_SET, q_vector->itr); 1598 1599 free_irq(entry->vector, q_vector); 1600 } 1601 1602 return err; 1603 } 1604 1605 void fm10k_up(struct fm10k_intfc *interface) 1606 { 1607 struct fm10k_hw *hw = &interface->hw; 1608 1609 /* Enable Tx/Rx DMA */ 1610 hw->mac.ops.start_hw(hw); 1611 1612 /* configure Tx descriptor rings */ 1613 fm10k_configure_tx(interface); 1614 1615 /* configure Rx descriptor rings */ 1616 fm10k_configure_rx(interface); 1617 1618 /* configure interrupts */ 1619 hw->mac.ops.update_int_moderator(hw); 1620 1621 /* enable statistics capture again */ 1622 clear_bit(__FM10K_UPDATING_STATS, &interface->state); 1623 1624 /* clear down bit to indicate we are ready to go */ 1625 clear_bit(__FM10K_DOWN, &interface->state); 1626 1627 /* enable polling cleanups */ 1628 fm10k_napi_enable_all(interface); 1629 1630 /* re-establish Rx filters */ 1631 fm10k_restore_rx_state(interface); 1632 1633 /* enable transmits */ 1634 netif_tx_start_all_queues(interface->netdev); 1635 1636 /* kick off the service timer now */ 1637 hw->mac.get_host_state = true; 1638 mod_timer(&interface->service_timer, jiffies); 1639 } 1640 1641 static void fm10k_napi_disable_all(struct fm10k_intfc *interface) 1642 { 1643 struct fm10k_q_vector *q_vector; 1644 int q_idx; 1645 1646 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) { 1647 q_vector = interface->q_vector[q_idx]; 1648 napi_disable(&q_vector->napi); 1649 } 1650 } 1651 1652 void fm10k_down(struct fm10k_intfc *interface) 1653 { 1654 struct net_device *netdev = interface->netdev; 1655 struct fm10k_hw *hw = &interface->hw; 1656 int err, i = 0, count = 0; 1657 1658 /* signal that we are down to the interrupt handler and service task */ 1659 if (test_and_set_bit(__FM10K_DOWN, &interface->state)) 1660 return; 1661 1662 /* call carrier off first to avoid false dev_watchdog timeouts */ 1663 netif_carrier_off(netdev); 1664 1665 /* disable transmits */ 1666 netif_tx_stop_all_queues(netdev); 1667 netif_tx_disable(netdev); 1668 1669 /* reset Rx filters */ 1670 fm10k_reset_rx_state(interface); 1671 1672 /* disable polling routines */ 1673 fm10k_napi_disable_all(interface); 1674 1675 /* capture stats one last time before stopping interface */ 1676 fm10k_update_stats(interface); 1677 1678 /* prevent updating statistics while we're down */ 1679 while (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state)) 1680 usleep_range(1000, 2000); 1681 1682 /* skip waiting for TX DMA if we lost PCIe link */ 1683 if (FM10K_REMOVED(hw->hw_addr)) 1684 goto skip_tx_dma_drain; 1685 1686 /* In some rare circumstances it can take a while for Tx queues to 1687 * quiesce and be fully disabled. Attempt to .stop_hw() first, and 1688 * then if we get ERR_REQUESTS_PENDING, go ahead and wait in a loop 1689 * until the Tx queues have emptied, or until a number of retries. If 1690 * we fail to clear within the retry loop, we will issue a warning 1691 * indicating that Tx DMA is probably hung. Note this means we call 1692 * .stop_hw() twice but this shouldn't cause any problems. 1693 */ 1694 err = hw->mac.ops.stop_hw(hw); 1695 if (err != FM10K_ERR_REQUESTS_PENDING) 1696 goto skip_tx_dma_drain; 1697 1698 #define TX_DMA_DRAIN_RETRIES 25 1699 for (count = 0; count < TX_DMA_DRAIN_RETRIES; count++) { 1700 usleep_range(10000, 20000); 1701 1702 /* start checking at the last ring to have pending Tx */ 1703 for (; i < interface->num_tx_queues; i++) 1704 if (fm10k_get_tx_pending(interface->tx_ring[i], false)) 1705 break; 1706 1707 /* if all the queues are drained, we can break now */ 1708 if (i == interface->num_tx_queues) 1709 break; 1710 } 1711 1712 if (count >= TX_DMA_DRAIN_RETRIES) 1713 dev_err(&interface->pdev->dev, 1714 "Tx queues failed to drain after %d tries. Tx DMA is probably hung.\n", 1715 count); 1716 skip_tx_dma_drain: 1717 /* Disable DMA engine for Tx/Rx */ 1718 err = hw->mac.ops.stop_hw(hw); 1719 if (err == FM10K_ERR_REQUESTS_PENDING) 1720 dev_err(&interface->pdev->dev, 1721 "due to pending requests hw was not shut down gracefully\n"); 1722 else if (err) 1723 dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err); 1724 1725 /* free any buffers still on the rings */ 1726 fm10k_clean_all_tx_rings(interface); 1727 fm10k_clean_all_rx_rings(interface); 1728 } 1729 1730 /** 1731 * fm10k_sw_init - Initialize general software structures 1732 * @interface: host interface private structure to initialize 1733 * 1734 * fm10k_sw_init initializes the interface private data structure. 1735 * Fields are initialized based on PCI device information and 1736 * OS network device settings (MTU size). 1737 **/ 1738 static int fm10k_sw_init(struct fm10k_intfc *interface, 1739 const struct pci_device_id *ent) 1740 { 1741 const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data]; 1742 struct fm10k_hw *hw = &interface->hw; 1743 struct pci_dev *pdev = interface->pdev; 1744 struct net_device *netdev = interface->netdev; 1745 u32 rss_key[FM10K_RSSRK_SIZE]; 1746 unsigned int rss; 1747 int err; 1748 1749 /* initialize back pointer */ 1750 hw->back = interface; 1751 hw->hw_addr = interface->uc_addr; 1752 1753 /* PCI config space info */ 1754 hw->vendor_id = pdev->vendor; 1755 hw->device_id = pdev->device; 1756 hw->revision_id = pdev->revision; 1757 hw->subsystem_vendor_id = pdev->subsystem_vendor; 1758 hw->subsystem_device_id = pdev->subsystem_device; 1759 1760 /* Setup hw api */ 1761 memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops)); 1762 hw->mac.type = fi->mac; 1763 1764 /* Setup IOV handlers */ 1765 if (fi->iov_ops) 1766 memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops)); 1767 1768 /* Set common capability flags and settings */ 1769 rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus()); 1770 interface->ring_feature[RING_F_RSS].limit = rss; 1771 fi->get_invariants(hw); 1772 1773 /* pick up the PCIe bus settings for reporting later */ 1774 if (hw->mac.ops.get_bus_info) 1775 hw->mac.ops.get_bus_info(hw); 1776 1777 /* limit the usable DMA range */ 1778 if (hw->mac.ops.set_dma_mask) 1779 hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev)); 1780 1781 /* update netdev with DMA restrictions */ 1782 if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) { 1783 netdev->features |= NETIF_F_HIGHDMA; 1784 netdev->vlan_features |= NETIF_F_HIGHDMA; 1785 } 1786 1787 /* delay any future reset requests */ 1788 interface->last_reset = jiffies + (10 * HZ); 1789 1790 /* reset and initialize the hardware so it is in a known state */ 1791 err = hw->mac.ops.reset_hw(hw); 1792 if (err) { 1793 dev_err(&pdev->dev, "reset_hw failed: %d\n", err); 1794 return err; 1795 } 1796 1797 err = hw->mac.ops.init_hw(hw); 1798 if (err) { 1799 dev_err(&pdev->dev, "init_hw failed: %d\n", err); 1800 return err; 1801 } 1802 1803 /* initialize hardware statistics */ 1804 hw->mac.ops.update_hw_stats(hw, &interface->stats); 1805 1806 /* Set upper limit on IOV VFs that can be allocated */ 1807 pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs); 1808 1809 /* Start with random Ethernet address */ 1810 eth_random_addr(hw->mac.addr); 1811 1812 /* Initialize MAC address from hardware */ 1813 err = hw->mac.ops.read_mac_addr(hw); 1814 if (err) { 1815 dev_warn(&pdev->dev, 1816 "Failed to obtain MAC address defaulting to random\n"); 1817 /* tag address assignment as random */ 1818 netdev->addr_assign_type |= NET_ADDR_RANDOM; 1819 } 1820 1821 ether_addr_copy(netdev->dev_addr, hw->mac.addr); 1822 ether_addr_copy(netdev->perm_addr, hw->mac.addr); 1823 1824 if (!is_valid_ether_addr(netdev->perm_addr)) { 1825 dev_err(&pdev->dev, "Invalid MAC Address\n"); 1826 return -EIO; 1827 } 1828 1829 /* initialize DCBNL interface */ 1830 fm10k_dcbnl_set_ops(netdev); 1831 1832 /* set default ring sizes */ 1833 interface->tx_ring_count = FM10K_DEFAULT_TXD; 1834 interface->rx_ring_count = FM10K_DEFAULT_RXD; 1835 1836 /* set default interrupt moderation */ 1837 interface->tx_itr = FM10K_TX_ITR_DEFAULT; 1838 interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT; 1839 1840 /* initialize udp port lists */ 1841 INIT_LIST_HEAD(&interface->vxlan_port); 1842 INIT_LIST_HEAD(&interface->geneve_port); 1843 1844 netdev_rss_key_fill(rss_key, sizeof(rss_key)); 1845 memcpy(interface->rssrk, rss_key, sizeof(rss_key)); 1846 1847 /* Start off interface as being down */ 1848 set_bit(__FM10K_DOWN, &interface->state); 1849 set_bit(__FM10K_UPDATING_STATS, &interface->state); 1850 1851 return 0; 1852 } 1853 1854 static void fm10k_slot_warn(struct fm10k_intfc *interface) 1855 { 1856 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN; 1857 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN; 1858 struct fm10k_hw *hw = &interface->hw; 1859 int max_gts = 0, expected_gts = 0; 1860 1861 if (pcie_get_minimum_link(interface->pdev, &speed, &width) || 1862 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) { 1863 dev_warn(&interface->pdev->dev, 1864 "Unable to determine PCI Express bandwidth.\n"); 1865 return; 1866 } 1867 1868 switch (speed) { 1869 case PCIE_SPEED_2_5GT: 1870 /* 8b/10b encoding reduces max throughput by 20% */ 1871 max_gts = 2 * width; 1872 break; 1873 case PCIE_SPEED_5_0GT: 1874 /* 8b/10b encoding reduces max throughput by 20% */ 1875 max_gts = 4 * width; 1876 break; 1877 case PCIE_SPEED_8_0GT: 1878 /* 128b/130b encoding has less than 2% impact on throughput */ 1879 max_gts = 8 * width; 1880 break; 1881 default: 1882 dev_warn(&interface->pdev->dev, 1883 "Unable to determine PCI Express bandwidth.\n"); 1884 return; 1885 } 1886 1887 dev_info(&interface->pdev->dev, 1888 "PCI Express bandwidth of %dGT/s available\n", 1889 max_gts); 1890 dev_info(&interface->pdev->dev, 1891 "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n", 1892 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" : 1893 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" : 1894 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" : 1895 "Unknown"), 1896 hw->bus.width, 1897 (speed == PCIE_SPEED_2_5GT ? "20%" : 1898 speed == PCIE_SPEED_5_0GT ? "20%" : 1899 speed == PCIE_SPEED_8_0GT ? "<2%" : 1900 "Unknown"), 1901 (hw->bus.payload == fm10k_bus_payload_128 ? "128B" : 1902 hw->bus.payload == fm10k_bus_payload_256 ? "256B" : 1903 hw->bus.payload == fm10k_bus_payload_512 ? "512B" : 1904 "Unknown")); 1905 1906 switch (hw->bus_caps.speed) { 1907 case fm10k_bus_speed_2500: 1908 /* 8b/10b encoding reduces max throughput by 20% */ 1909 expected_gts = 2 * hw->bus_caps.width; 1910 break; 1911 case fm10k_bus_speed_5000: 1912 /* 8b/10b encoding reduces max throughput by 20% */ 1913 expected_gts = 4 * hw->bus_caps.width; 1914 break; 1915 case fm10k_bus_speed_8000: 1916 /* 128b/130b encoding has less than 2% impact on throughput */ 1917 expected_gts = 8 * hw->bus_caps.width; 1918 break; 1919 default: 1920 dev_warn(&interface->pdev->dev, 1921 "Unable to determine expected PCI Express bandwidth.\n"); 1922 return; 1923 } 1924 1925 if (max_gts >= expected_gts) 1926 return; 1927 1928 dev_warn(&interface->pdev->dev, 1929 "This device requires %dGT/s of bandwidth for optimal performance.\n", 1930 expected_gts); 1931 dev_warn(&interface->pdev->dev, 1932 "A %sslot with x%d lanes is suggested.\n", 1933 (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " : 1934 hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " : 1935 hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""), 1936 hw->bus_caps.width); 1937 } 1938 1939 /** 1940 * fm10k_probe - Device Initialization Routine 1941 * @pdev: PCI device information struct 1942 * @ent: entry in fm10k_pci_tbl 1943 * 1944 * Returns 0 on success, negative on failure 1945 * 1946 * fm10k_probe initializes an interface identified by a pci_dev structure. 1947 * The OS initialization, configuring of the interface private structure, 1948 * and a hardware reset occur. 1949 **/ 1950 static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1951 { 1952 struct net_device *netdev; 1953 struct fm10k_intfc *interface; 1954 int err; 1955 1956 if (pdev->error_state != pci_channel_io_normal) { 1957 dev_err(&pdev->dev, 1958 "PCI device still in an error state. Unable to load...\n"); 1959 return -EIO; 1960 } 1961 1962 err = pci_enable_device_mem(pdev); 1963 if (err) { 1964 dev_err(&pdev->dev, 1965 "PCI enable device failed: %d\n", err); 1966 return err; 1967 } 1968 1969 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); 1970 if (err) 1971 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 1972 if (err) { 1973 dev_err(&pdev->dev, 1974 "DMA configuration failed: %d\n", err); 1975 goto err_dma; 1976 } 1977 1978 err = pci_request_mem_regions(pdev, fm10k_driver_name); 1979 if (err) { 1980 dev_err(&pdev->dev, 1981 "pci_request_selected_regions failed: %d\n", err); 1982 goto err_pci_reg; 1983 } 1984 1985 pci_enable_pcie_error_reporting(pdev); 1986 1987 pci_set_master(pdev); 1988 pci_save_state(pdev); 1989 1990 netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]); 1991 if (!netdev) { 1992 err = -ENOMEM; 1993 goto err_alloc_netdev; 1994 } 1995 1996 SET_NETDEV_DEV(netdev, &pdev->dev); 1997 1998 interface = netdev_priv(netdev); 1999 pci_set_drvdata(pdev, interface); 2000 2001 interface->netdev = netdev; 2002 interface->pdev = pdev; 2003 2004 interface->uc_addr = ioremap(pci_resource_start(pdev, 0), 2005 FM10K_UC_ADDR_SIZE); 2006 if (!interface->uc_addr) { 2007 err = -EIO; 2008 goto err_ioremap; 2009 } 2010 2011 err = fm10k_sw_init(interface, ent); 2012 if (err) 2013 goto err_sw_init; 2014 2015 /* enable debugfs support */ 2016 fm10k_dbg_intfc_init(interface); 2017 2018 err = fm10k_init_queueing_scheme(interface); 2019 if (err) 2020 goto err_sw_init; 2021 2022 /* the mbx interrupt might attempt to schedule the service task, so we 2023 * must ensure it is disabled since we haven't yet requested the timer 2024 * or work item. 2025 */ 2026 set_bit(__FM10K_SERVICE_DISABLE, &interface->state); 2027 2028 err = fm10k_mbx_request_irq(interface); 2029 if (err) 2030 goto err_mbx_interrupt; 2031 2032 /* final check of hardware state before registering the interface */ 2033 err = fm10k_hw_ready(interface); 2034 if (err) 2035 goto err_register; 2036 2037 err = register_netdev(netdev); 2038 if (err) 2039 goto err_register; 2040 2041 /* carrier off reporting is important to ethtool even BEFORE open */ 2042 netif_carrier_off(netdev); 2043 2044 /* stop all the transmit queues from transmitting until link is up */ 2045 netif_tx_stop_all_queues(netdev); 2046 2047 /* Initialize service timer and service task late in order to avoid 2048 * cleanup issues. 2049 */ 2050 setup_timer(&interface->service_timer, &fm10k_service_timer, 2051 (unsigned long)interface); 2052 INIT_WORK(&interface->service_task, fm10k_service_task); 2053 2054 /* kick off service timer now, even when interface is down */ 2055 mod_timer(&interface->service_timer, (HZ * 2) + jiffies); 2056 2057 /* print warning for non-optimal configurations */ 2058 fm10k_slot_warn(interface); 2059 2060 /* report MAC address for logging */ 2061 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr); 2062 2063 /* enable SR-IOV after registering netdev to enforce PF/VF ordering */ 2064 fm10k_iov_configure(pdev, 0); 2065 2066 /* clear the service task disable bit to allow service task to start */ 2067 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state); 2068 2069 return 0; 2070 2071 err_register: 2072 fm10k_mbx_free_irq(interface); 2073 err_mbx_interrupt: 2074 fm10k_clear_queueing_scheme(interface); 2075 err_sw_init: 2076 if (interface->sw_addr) 2077 iounmap(interface->sw_addr); 2078 iounmap(interface->uc_addr); 2079 err_ioremap: 2080 free_netdev(netdev); 2081 err_alloc_netdev: 2082 pci_release_mem_regions(pdev); 2083 err_pci_reg: 2084 err_dma: 2085 pci_disable_device(pdev); 2086 return err; 2087 } 2088 2089 /** 2090 * fm10k_remove - Device Removal Routine 2091 * @pdev: PCI device information struct 2092 * 2093 * fm10k_remove is called by the PCI subsystem to alert the driver 2094 * that it should release a PCI device. The could be caused by a 2095 * Hot-Plug event, or because the driver is going to be removed from 2096 * memory. 2097 **/ 2098 static void fm10k_remove(struct pci_dev *pdev) 2099 { 2100 struct fm10k_intfc *interface = pci_get_drvdata(pdev); 2101 struct net_device *netdev = interface->netdev; 2102 2103 del_timer_sync(&interface->service_timer); 2104 2105 set_bit(__FM10K_SERVICE_DISABLE, &interface->state); 2106 cancel_work_sync(&interface->service_task); 2107 2108 /* free netdev, this may bounce the interrupts due to setup_tc */ 2109 if (netdev->reg_state == NETREG_REGISTERED) 2110 unregister_netdev(netdev); 2111 2112 /* release VFs */ 2113 fm10k_iov_disable(pdev); 2114 2115 /* disable mailbox interrupt */ 2116 fm10k_mbx_free_irq(interface); 2117 2118 /* free interrupts */ 2119 fm10k_clear_queueing_scheme(interface); 2120 2121 /* remove any debugfs interfaces */ 2122 fm10k_dbg_intfc_exit(interface); 2123 2124 if (interface->sw_addr) 2125 iounmap(interface->sw_addr); 2126 iounmap(interface->uc_addr); 2127 2128 free_netdev(netdev); 2129 2130 pci_release_mem_regions(pdev); 2131 2132 pci_disable_pcie_error_reporting(pdev); 2133 2134 pci_disable_device(pdev); 2135 } 2136 2137 static void fm10k_prepare_suspend(struct fm10k_intfc *interface) 2138 { 2139 /* the watchdog task reads from registers, which might appear like 2140 * a surprise remove if the PCIe device is disabled while we're 2141 * stopped. We stop the watchdog task until after we resume software 2142 * activity. 2143 */ 2144 set_bit(__FM10K_SERVICE_DISABLE, &interface->state); 2145 cancel_work_sync(&interface->service_task); 2146 2147 fm10k_prepare_for_reset(interface); 2148 } 2149 2150 static int fm10k_handle_resume(struct fm10k_intfc *interface) 2151 { 2152 struct fm10k_hw *hw = &interface->hw; 2153 int err; 2154 2155 /* reset statistics starting values */ 2156 hw->mac.ops.rebind_hw_stats(hw, &interface->stats); 2157 2158 err = fm10k_handle_reset(interface); 2159 if (err) 2160 return err; 2161 2162 /* assume host is not ready, to prevent race with watchdog in case we 2163 * actually don't have connection to the switch 2164 */ 2165 interface->host_ready = false; 2166 fm10k_watchdog_host_not_ready(interface); 2167 2168 /* force link to stay down for a second to prevent link flutter */ 2169 interface->link_down_event = jiffies + (HZ); 2170 set_bit(__FM10K_LINK_DOWN, &interface->state); 2171 2172 /* clear the service task disable bit to allow service task to start */ 2173 clear_bit(__FM10K_SERVICE_DISABLE, &interface->state); 2174 fm10k_service_event_schedule(interface); 2175 2176 return err; 2177 } 2178 2179 #ifdef CONFIG_PM 2180 /** 2181 * fm10k_resume - Restore device to pre-sleep state 2182 * @pdev: PCI device information struct 2183 * 2184 * fm10k_resume is called after the system has powered back up from a sleep 2185 * state and is ready to resume operation. This function is meant to restore 2186 * the device back to its pre-sleep state. 2187 **/ 2188 static int fm10k_resume(struct pci_dev *pdev) 2189 { 2190 struct fm10k_intfc *interface = pci_get_drvdata(pdev); 2191 struct net_device *netdev = interface->netdev; 2192 struct fm10k_hw *hw = &interface->hw; 2193 u32 err; 2194 2195 pci_set_power_state(pdev, PCI_D0); 2196 pci_restore_state(pdev); 2197 2198 /* pci_restore_state clears dev->state_saved so call 2199 * pci_save_state to restore it. 2200 */ 2201 pci_save_state(pdev); 2202 2203 err = pci_enable_device_mem(pdev); 2204 if (err) { 2205 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); 2206 return err; 2207 } 2208 pci_set_master(pdev); 2209 2210 pci_wake_from_d3(pdev, false); 2211 2212 /* refresh hw_addr in case it was dropped */ 2213 hw->hw_addr = interface->uc_addr; 2214 2215 err = fm10k_handle_resume(interface); 2216 if (err) 2217 return err; 2218 2219 netif_device_attach(netdev); 2220 2221 return 0; 2222 } 2223 2224 /** 2225 * fm10k_suspend - Prepare the device for a system sleep state 2226 * @pdev: PCI device information struct 2227 * 2228 * fm10k_suspend is meant to shutdown the device prior to the system entering 2229 * a sleep state. The fm10k hardware does not support wake on lan so the 2230 * driver simply needs to shut down the device so it is in a low power state. 2231 **/ 2232 static int fm10k_suspend(struct pci_dev *pdev, 2233 pm_message_t __always_unused state) 2234 { 2235 struct fm10k_intfc *interface = pci_get_drvdata(pdev); 2236 struct net_device *netdev = interface->netdev; 2237 int err = 0; 2238 2239 netif_device_detach(netdev); 2240 2241 fm10k_prepare_suspend(interface); 2242 2243 err = pci_save_state(pdev); 2244 if (err) 2245 return err; 2246 2247 pci_disable_device(pdev); 2248 pci_wake_from_d3(pdev, false); 2249 pci_set_power_state(pdev, PCI_D3hot); 2250 2251 return 0; 2252 } 2253 2254 #endif /* CONFIG_PM */ 2255 /** 2256 * fm10k_io_error_detected - called when PCI error is detected 2257 * @pdev: Pointer to PCI device 2258 * @state: The current pci connection state 2259 * 2260 * This function is called after a PCI bus error affecting 2261 * this device has been detected. 2262 */ 2263 static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev, 2264 pci_channel_state_t state) 2265 { 2266 struct fm10k_intfc *interface = pci_get_drvdata(pdev); 2267 struct net_device *netdev = interface->netdev; 2268 2269 netif_device_detach(netdev); 2270 2271 if (state == pci_channel_io_perm_failure) 2272 return PCI_ERS_RESULT_DISCONNECT; 2273 2274 fm10k_prepare_suspend(interface); 2275 2276 /* Request a slot reset. */ 2277 return PCI_ERS_RESULT_NEED_RESET; 2278 } 2279 2280 /** 2281 * fm10k_io_slot_reset - called after the pci bus has been reset. 2282 * @pdev: Pointer to PCI device 2283 * 2284 * Restart the card from scratch, as if from a cold-boot. 2285 */ 2286 static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev) 2287 { 2288 pci_ers_result_t result; 2289 2290 if (pci_reenable_device(pdev)) { 2291 dev_err(&pdev->dev, 2292 "Cannot re-enable PCI device after reset.\n"); 2293 result = PCI_ERS_RESULT_DISCONNECT; 2294 } else { 2295 pci_set_master(pdev); 2296 pci_restore_state(pdev); 2297 2298 /* After second error pci->state_saved is false, this 2299 * resets it so EEH doesn't break. 2300 */ 2301 pci_save_state(pdev); 2302 2303 pci_wake_from_d3(pdev, false); 2304 2305 result = PCI_ERS_RESULT_RECOVERED; 2306 } 2307 2308 pci_cleanup_aer_uncorrect_error_status(pdev); 2309 2310 return result; 2311 } 2312 2313 /** 2314 * fm10k_io_resume - called when traffic can start flowing again. 2315 * @pdev: Pointer to PCI device 2316 * 2317 * This callback is called when the error recovery driver tells us that 2318 * its OK to resume normal operation. 2319 */ 2320 static void fm10k_io_resume(struct pci_dev *pdev) 2321 { 2322 struct fm10k_intfc *interface = pci_get_drvdata(pdev); 2323 struct net_device *netdev = interface->netdev; 2324 int err; 2325 2326 err = fm10k_handle_resume(interface); 2327 2328 if (err) 2329 dev_warn(&pdev->dev, 2330 "fm10k_io_resume failed: %d\n", err); 2331 else 2332 netif_device_attach(netdev); 2333 } 2334 2335 /** 2336 * fm10k_io_reset_notify - called when PCI function is reset 2337 * @pdev: Pointer to PCI device 2338 * 2339 * This callback is called when the PCI function is reset such as from 2340 * /sys/class/net/<enpX>/device/reset or similar. When prepare is true, it 2341 * means we should prepare for a function reset. If prepare is false, it means 2342 * the function reset just occurred. 2343 */ 2344 static void fm10k_io_reset_notify(struct pci_dev *pdev, bool prepare) 2345 { 2346 struct fm10k_intfc *interface = pci_get_drvdata(pdev); 2347 int err = 0; 2348 2349 if (prepare) { 2350 /* warn incase we have any active VF devices */ 2351 if (pci_num_vf(pdev)) 2352 dev_warn(&pdev->dev, 2353 "PCIe FLR may cause issues for any active VF devices\n"); 2354 2355 fm10k_prepare_suspend(interface); 2356 } else { 2357 err = fm10k_handle_resume(interface); 2358 } 2359 2360 if (err) { 2361 dev_warn(&pdev->dev, 2362 "fm10k_io_reset_notify failed: %d\n", err); 2363 netif_device_detach(interface->netdev); 2364 } 2365 } 2366 2367 static const struct pci_error_handlers fm10k_err_handler = { 2368 .error_detected = fm10k_io_error_detected, 2369 .slot_reset = fm10k_io_slot_reset, 2370 .resume = fm10k_io_resume, 2371 .reset_notify = fm10k_io_reset_notify, 2372 }; 2373 2374 static struct pci_driver fm10k_driver = { 2375 .name = fm10k_driver_name, 2376 .id_table = fm10k_pci_tbl, 2377 .probe = fm10k_probe, 2378 .remove = fm10k_remove, 2379 #ifdef CONFIG_PM 2380 .suspend = fm10k_suspend, 2381 .resume = fm10k_resume, 2382 #endif 2383 .sriov_configure = fm10k_iov_configure, 2384 .err_handler = &fm10k_err_handler 2385 }; 2386 2387 /** 2388 * fm10k_register_pci_driver - register driver interface 2389 * 2390 * This function is called on module load in order to register the driver. 2391 **/ 2392 int fm10k_register_pci_driver(void) 2393 { 2394 return pci_register_driver(&fm10k_driver); 2395 } 2396 2397 /** 2398 * fm10k_unregister_pci_driver - unregister driver interface 2399 * 2400 * This function is called on module unload in order to remove the driver. 2401 **/ 2402 void fm10k_unregister_pci_driver(void) 2403 { 2404 pci_unregister_driver(&fm10k_driver); 2405 } 2406