1 /* Intel(R) Ethernet Switch Host Interface Driver 2 * Copyright(c) 2013 - 2017 Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 * 16 * Contact Information: 17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 19 */ 20 21 #ifndef _FM10K_H_ 22 #define _FM10K_H_ 23 24 #include <linux/types.h> 25 #include <linux/etherdevice.h> 26 #include <linux/cpumask.h> 27 #include <linux/rtnetlink.h> 28 #include <linux/if_vlan.h> 29 #include <linux/pci.h> 30 31 #include "fm10k_pf.h" 32 #include "fm10k_vf.h" 33 34 #define FM10K_MAX_JUMBO_FRAME_SIZE 15342 /* Maximum supported size 15K */ 35 36 #define MAX_QUEUES FM10K_MAX_QUEUES_PF 37 38 #define FM10K_MIN_RXD 128 39 #define FM10K_MAX_RXD 4096 40 #define FM10K_DEFAULT_RXD 256 41 42 #define FM10K_MIN_TXD 128 43 #define FM10K_MAX_TXD 4096 44 #define FM10K_DEFAULT_TXD 256 45 #define FM10K_DEFAULT_TX_WORK 256 46 47 #define FM10K_RXBUFFER_256 256 48 #define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256 49 #define FM10K_RXBUFFER_2048 2048 50 #define FM10K_RX_BUFSZ FM10K_RXBUFFER_2048 51 52 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 53 #define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 54 55 #define FM10K_MAX_STATIONS 63 56 struct fm10k_l2_accel { 57 int size; 58 u16 count; 59 u16 dglort; 60 struct rcu_head rcu; 61 struct net_device *macvlan[0]; 62 }; 63 64 enum fm10k_ring_state_t { 65 __FM10K_TX_DETECT_HANG, 66 __FM10K_HANG_CHECK_ARMED, 67 __FM10K_TX_XPS_INIT_DONE, 68 /* This must be last and is used to calculate BITMAP size */ 69 __FM10K_TX_STATE_SIZE__, 70 }; 71 72 #define check_for_tx_hang(ring) \ 73 test_bit(__FM10K_TX_DETECT_HANG, (ring)->state) 74 #define set_check_for_tx_hang(ring) \ 75 set_bit(__FM10K_TX_DETECT_HANG, (ring)->state) 76 #define clear_check_for_tx_hang(ring) \ 77 clear_bit(__FM10K_TX_DETECT_HANG, (ring)->state) 78 79 struct fm10k_tx_buffer { 80 struct fm10k_tx_desc *next_to_watch; 81 struct sk_buff *skb; 82 unsigned int bytecount; 83 u16 gso_segs; 84 u16 tx_flags; 85 DEFINE_DMA_UNMAP_ADDR(dma); 86 DEFINE_DMA_UNMAP_LEN(len); 87 }; 88 89 struct fm10k_rx_buffer { 90 dma_addr_t dma; 91 struct page *page; 92 u32 page_offset; 93 }; 94 95 struct fm10k_queue_stats { 96 u64 packets; 97 u64 bytes; 98 }; 99 100 struct fm10k_tx_queue_stats { 101 u64 restart_queue; 102 u64 csum_err; 103 u64 tx_busy; 104 u64 tx_done_old; 105 u64 csum_good; 106 }; 107 108 struct fm10k_rx_queue_stats { 109 u64 alloc_failed; 110 u64 csum_err; 111 u64 errors; 112 u64 csum_good; 113 u64 switch_errors; 114 u64 drops; 115 u64 pp_errors; 116 u64 link_errors; 117 u64 length_errors; 118 }; 119 120 struct fm10k_ring { 121 struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */ 122 struct net_device *netdev; /* netdev ring belongs to */ 123 struct device *dev; /* device for DMA mapping */ 124 struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */ 125 void *desc; /* descriptor ring memory */ 126 union { 127 struct fm10k_tx_buffer *tx_buffer; 128 struct fm10k_rx_buffer *rx_buffer; 129 }; 130 u32 __iomem *tail; 131 DECLARE_BITMAP(state, __FM10K_TX_STATE_SIZE__); 132 dma_addr_t dma; /* phys. address of descriptor ring */ 133 unsigned int size; /* length in bytes */ 134 135 u8 queue_index; /* needed for queue management */ 136 u8 reg_idx; /* holds the special value that gets 137 * the hardware register offset 138 * associated with this ring, which is 139 * different for DCB and RSS modes 140 */ 141 u8 qos_pc; /* priority class of queue */ 142 u16 vid; /* default VLAN ID of queue */ 143 u16 count; /* amount of descriptors */ 144 145 u16 next_to_alloc; 146 u16 next_to_use; 147 u16 next_to_clean; 148 149 struct fm10k_queue_stats stats; 150 struct u64_stats_sync syncp; 151 union { 152 /* Tx */ 153 struct fm10k_tx_queue_stats tx_stats; 154 /* Rx */ 155 struct { 156 struct fm10k_rx_queue_stats rx_stats; 157 struct sk_buff *skb; 158 }; 159 }; 160 } ____cacheline_internodealigned_in_smp; 161 162 struct fm10k_ring_container { 163 struct fm10k_ring *ring; /* pointer to linked list of rings */ 164 unsigned int total_bytes; /* total bytes processed this int */ 165 unsigned int total_packets; /* total packets processed this int */ 166 u16 work_limit; /* total work allowed per interrupt */ 167 u16 itr; /* interrupt throttle rate value */ 168 u8 itr_scale; /* ITR adjustment based on PCI speed */ 169 u8 count; /* total number of rings in vector */ 170 }; 171 172 #define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */ 173 #define FM10K_ITR_10K 100 /* 100us */ 174 #define FM10K_ITR_20K 50 /* 50us */ 175 #define FM10K_ITR_40K 25 /* 25us */ 176 #define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */ 177 178 #define ITR_IS_ADAPTIVE(itr) (!!(itr & FM10K_ITR_ADAPTIVE)) 179 180 #define FM10K_TX_ITR_DEFAULT FM10K_ITR_40K 181 #define FM10K_RX_ITR_DEFAULT FM10K_ITR_20K 182 #define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR) 183 184 static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring) 185 { 186 return &ring->netdev->_tx[ring->queue_index]; 187 } 188 189 /* iterator for handling rings in ring container */ 190 #define fm10k_for_each_ring(pos, head) \ 191 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;) 192 193 #define MAX_Q_VECTORS 256 194 #define MIN_Q_VECTORS 1 195 enum fm10k_non_q_vectors { 196 FM10K_MBX_VECTOR, 197 #define NON_Q_VECTORS_VF NON_Q_VECTORS_PF 198 NON_Q_VECTORS_PF 199 }; 200 201 #define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \ 202 NON_Q_VECTORS_PF : \ 203 NON_Q_VECTORS_VF) 204 #define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw)) 205 206 struct fm10k_q_vector { 207 struct fm10k_intfc *interface; 208 u32 __iomem *itr; /* pointer to ITR register for this vector */ 209 u16 v_idx; /* index of q_vector within interface array */ 210 struct fm10k_ring_container rx, tx; 211 212 struct napi_struct napi; 213 cpumask_t affinity_mask; 214 char name[IFNAMSIZ + 9]; 215 216 #ifdef CONFIG_DEBUG_FS 217 struct dentry *dbg_q_vector; 218 #endif /* CONFIG_DEBUG_FS */ 219 struct rcu_head rcu; /* to avoid race with update stats on free */ 220 221 /* for dynamic allocation of rings associated with this q_vector */ 222 struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp; 223 }; 224 225 enum fm10k_ring_f_enum { 226 RING_F_RSS, 227 RING_F_QOS, 228 RING_F_ARRAY_SIZE /* must be last in enum set */ 229 }; 230 231 struct fm10k_ring_feature { 232 u16 limit; /* upper limit on feature indices */ 233 u16 indices; /* current value of indices */ 234 u16 mask; /* Mask used for feature to ring mapping */ 235 u16 offset; /* offset to start of feature */ 236 }; 237 238 struct fm10k_iov_data { 239 unsigned int num_vfs; 240 unsigned int next_vf_mbx; 241 struct rcu_head rcu; 242 struct fm10k_vf_info vf_info[0]; 243 }; 244 245 struct fm10k_udp_port { 246 struct list_head list; 247 sa_family_t sa_family; 248 __be16 port; 249 }; 250 251 /* one work queue for entire driver */ 252 extern struct workqueue_struct *fm10k_workqueue; 253 254 /* The following enumeration contains flags which indicate or enable modified 255 * driver behaviors. To avoid race conditions, the flags are stored in 256 * a BITMAP in the fm10k_intfc structure. The BITMAP should be accessed using 257 * atomic *_bit() operations. 258 */ 259 enum fm10k_flags_t { 260 FM10K_FLAG_RESET_REQUESTED, 261 FM10K_FLAG_RSS_FIELD_IPV4_UDP, 262 FM10K_FLAG_RSS_FIELD_IPV6_UDP, 263 FM10K_FLAG_SWPRI_CONFIG, 264 /* __FM10K_FLAGS_SIZE__ is used to calculate the size of 265 * interface->flags and must be the last value in this 266 * enumeration. 267 */ 268 __FM10K_FLAGS_SIZE__ 269 }; 270 271 enum fm10k_state_t { 272 __FM10K_RESETTING, 273 __FM10K_DOWN, 274 __FM10K_SERVICE_SCHED, 275 __FM10K_SERVICE_REQUEST, 276 __FM10K_SERVICE_DISABLE, 277 __FM10K_MBX_LOCK, 278 __FM10K_LINK_DOWN, 279 __FM10K_UPDATING_STATS, 280 /* This value must be last and determines the BITMAP size */ 281 __FM10K_STATE_SIZE__, 282 }; 283 284 struct fm10k_intfc { 285 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 286 struct net_device *netdev; 287 struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */ 288 struct pci_dev *pdev; 289 DECLARE_BITMAP(state, __FM10K_STATE_SIZE__); 290 291 /* Access flag values using atomic *_bit() operations */ 292 DECLARE_BITMAP(flags, __FM10K_FLAGS_SIZE__); 293 294 int xcast_mode; 295 296 /* Tx fast path data */ 297 int num_tx_queues; 298 u16 tx_itr; 299 300 /* Rx fast path data */ 301 int num_rx_queues; 302 u16 rx_itr; 303 304 /* TX */ 305 struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp; 306 307 u64 restart_queue; 308 u64 tx_busy; 309 u64 tx_csum_errors; 310 u64 alloc_failed; 311 u64 rx_csum_errors; 312 313 u64 tx_bytes_nic; 314 u64 tx_packets_nic; 315 u64 rx_bytes_nic; 316 u64 rx_packets_nic; 317 u64 rx_drops_nic; 318 u64 rx_overrun_pf; 319 u64 rx_overrun_vf; 320 321 /* Debug Statistics */ 322 u64 hw_sm_mbx_full; 323 u64 hw_csum_tx_good; 324 u64 hw_csum_rx_good; 325 u64 rx_switch_errors; 326 u64 rx_drops; 327 u64 rx_pp_errors; 328 u64 rx_link_errors; 329 u64 rx_length_errors; 330 331 u32 tx_timeout_count; 332 333 /* RX */ 334 struct fm10k_ring *rx_ring[MAX_QUEUES]; 335 336 /* Queueing vectors */ 337 struct fm10k_q_vector *q_vector[MAX_Q_VECTORS]; 338 struct msix_entry *msix_entries; 339 int num_q_vectors; /* current number of q_vectors for device */ 340 struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE]; 341 342 /* SR-IOV information management structure */ 343 struct fm10k_iov_data *iov_data; 344 345 struct fm10k_hw_stats stats; 346 struct fm10k_hw hw; 347 u32 __iomem *uc_addr; 348 u32 __iomem *sw_addr; 349 u16 msg_enable; 350 u16 tx_ring_count; 351 u16 rx_ring_count; 352 struct timer_list service_timer; 353 struct work_struct service_task; 354 unsigned long next_stats_update; 355 unsigned long next_tx_hang_check; 356 unsigned long last_reset; 357 unsigned long link_down_event; 358 bool host_ready; 359 bool lport_map_failed; 360 361 u32 reta[FM10K_RETA_SIZE]; 362 u32 rssrk[FM10K_RSSRK_SIZE]; 363 364 /* UDP encapsulation port tracking information */ 365 struct list_head vxlan_port; 366 struct list_head geneve_port; 367 368 #ifdef CONFIG_DEBUG_FS 369 struct dentry *dbg_intfc; 370 #endif /* CONFIG_DEBUG_FS */ 371 372 #ifdef CONFIG_DCB 373 u8 pfc_en; 374 #endif 375 u8 rx_pause; 376 377 /* GLORT resources in use by PF */ 378 u16 glort; 379 u16 glort_count; 380 381 /* VLAN ID for updating multicast/unicast lists */ 382 u16 vid; 383 }; 384 385 static inline void fm10k_mbx_lock(struct fm10k_intfc *interface) 386 { 387 /* busy loop if we cannot obtain the lock as some calls 388 * such as ndo_set_rx_mode may be made in atomic context 389 */ 390 while (test_and_set_bit(__FM10K_MBX_LOCK, interface->state)) 391 udelay(20); 392 } 393 394 static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface) 395 { 396 /* flush memory to make sure state is correct */ 397 smp_mb__before_atomic(); 398 clear_bit(__FM10K_MBX_LOCK, interface->state); 399 } 400 401 static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface) 402 { 403 return !test_and_set_bit(__FM10K_MBX_LOCK, interface->state); 404 } 405 406 /* fm10k_test_staterr - test bits in Rx descriptor status and error fields */ 407 static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc, 408 const u32 stat_err_bits) 409 { 410 return rx_desc->d.staterr & cpu_to_le32(stat_err_bits); 411 } 412 413 /* fm10k_desc_unused - calculate if we have unused descriptors */ 414 static inline u16 fm10k_desc_unused(struct fm10k_ring *ring) 415 { 416 s16 unused = ring->next_to_clean - ring->next_to_use - 1; 417 418 return likely(unused < 0) ? unused + ring->count : unused; 419 } 420 421 #define FM10K_TX_DESC(R, i) \ 422 (&(((struct fm10k_tx_desc *)((R)->desc))[i])) 423 #define FM10K_RX_DESC(R, i) \ 424 (&(((union fm10k_rx_desc *)((R)->desc))[i])) 425 426 #define FM10K_MAX_TXD_PWR 14 427 #define FM10K_MAX_DATA_PER_TXD (1u << FM10K_MAX_TXD_PWR) 428 429 /* Tx Descriptors needed, worst case */ 430 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD) 431 #define DESC_NEEDED (MAX_SKB_FRAGS + 4) 432 433 enum fm10k_tx_flags { 434 /* Tx offload flags */ 435 FM10K_TX_FLAGS_CSUM = 0x01, 436 }; 437 438 /* This structure is stored as little endian values as that is the native 439 * format of the Rx descriptor. The ordering of these fields is reversed 440 * from the actual ftag header to allow for a single bswap to take care 441 * of placing all of the values in network order 442 */ 443 union fm10k_ftag_info { 444 __le64 ftag; 445 struct { 446 /* dglort and sglort combined into a single 32bit desc read */ 447 __le32 glort; 448 /* upper 16 bits of VLAN are reserved 0 for swpri_type_user */ 449 __le32 vlan; 450 } d; 451 struct { 452 __le16 dglort; 453 __le16 sglort; 454 __le16 vlan; 455 __le16 swpri_type_user; 456 } w; 457 }; 458 459 struct fm10k_cb { 460 union { 461 __le64 tstamp; 462 unsigned long ts_tx_timeout; 463 }; 464 union fm10k_ftag_info fi; 465 }; 466 467 #define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb) 468 469 /* main */ 470 extern char fm10k_driver_name[]; 471 extern const char fm10k_driver_version[]; 472 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface); 473 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface); 474 __be16 fm10k_tx_encap_offload(struct sk_buff *skb); 475 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb, 476 struct fm10k_ring *tx_ring); 477 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface); 478 u64 fm10k_get_tx_pending(struct fm10k_ring *ring, bool in_sw); 479 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring); 480 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count); 481 482 /* PCI */ 483 void fm10k_mbx_free_irq(struct fm10k_intfc *); 484 int fm10k_mbx_request_irq(struct fm10k_intfc *); 485 void fm10k_qv_free_irq(struct fm10k_intfc *interface); 486 int fm10k_qv_request_irq(struct fm10k_intfc *interface); 487 int fm10k_register_pci_driver(void); 488 void fm10k_unregister_pci_driver(void); 489 void fm10k_up(struct fm10k_intfc *interface); 490 void fm10k_down(struct fm10k_intfc *interface); 491 void fm10k_update_stats(struct fm10k_intfc *interface); 492 void fm10k_service_event_schedule(struct fm10k_intfc *interface); 493 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface); 494 #ifdef CONFIG_NET_POLL_CONTROLLER 495 void fm10k_netpoll(struct net_device *netdev); 496 #endif 497 498 /* Netdev */ 499 struct net_device *fm10k_alloc_netdev(const struct fm10k_info *info); 500 int fm10k_setup_rx_resources(struct fm10k_ring *); 501 int fm10k_setup_tx_resources(struct fm10k_ring *); 502 void fm10k_free_rx_resources(struct fm10k_ring *); 503 void fm10k_free_tx_resources(struct fm10k_ring *); 504 void fm10k_clean_all_rx_rings(struct fm10k_intfc *); 505 void fm10k_clean_all_tx_rings(struct fm10k_intfc *); 506 void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *, 507 struct fm10k_tx_buffer *); 508 void fm10k_restore_rx_state(struct fm10k_intfc *); 509 void fm10k_reset_rx_state(struct fm10k_intfc *); 510 int fm10k_setup_tc(struct net_device *dev, u8 tc); 511 int fm10k_open(struct net_device *netdev); 512 int fm10k_close(struct net_device *netdev); 513 514 /* Ethtool */ 515 void fm10k_set_ethtool_ops(struct net_device *dev); 516 void fm10k_write_reta(struct fm10k_intfc *interface, const u32 *indir); 517 518 /* IOV */ 519 s32 fm10k_iov_event(struct fm10k_intfc *interface); 520 s32 fm10k_iov_mbx(struct fm10k_intfc *interface); 521 void fm10k_iov_suspend(struct pci_dev *pdev); 522 int fm10k_iov_resume(struct pci_dev *pdev); 523 void fm10k_iov_disable(struct pci_dev *pdev); 524 int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs); 525 s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid); 526 int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac); 527 int fm10k_ndo_set_vf_vlan(struct net_device *netdev, 528 int vf_idx, u16 vid, u8 qos, __be16 vlan_proto); 529 int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate, 530 int unused); 531 int fm10k_ndo_get_vf_config(struct net_device *netdev, 532 int vf_idx, struct ifla_vf_info *ivi); 533 534 /* DebugFS */ 535 #ifdef CONFIG_DEBUG_FS 536 void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector); 537 void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector); 538 void fm10k_dbg_intfc_init(struct fm10k_intfc *interface); 539 void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface); 540 void fm10k_dbg_init(void); 541 void fm10k_dbg_exit(void); 542 #else 543 static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {} 544 static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {} 545 static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {} 546 static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {} 547 static inline void fm10k_dbg_init(void) {} 548 static inline void fm10k_dbg_exit(void) {} 549 #endif /* CONFIG_DEBUG_FS */ 550 551 /* DCB */ 552 #ifdef CONFIG_DCB 553 void fm10k_dcbnl_set_ops(struct net_device *dev); 554 #else 555 static inline void fm10k_dcbnl_set_ops(struct net_device *dev) {} 556 #endif 557 #endif /* _FM10K_H_ */ 558