1 // SPDX-License-Identifier: GPL-2.0 2 /* Intel PRO/1000 Linux driver 3 * Copyright(c) 1999 - 2015 Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in 15 * the file called "COPYING". 16 * 17 * Contact Information: 18 * Linux NICS <linux.nics@intel.com> 19 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 20 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 21 */ 22 23 /* PTP 1588 Hardware Clock (PHC) 24 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb) 25 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com> 26 */ 27 28 #include "e1000.h" 29 30 #ifdef CONFIG_E1000E_HWTS 31 #include <linux/clocksource.h> 32 #include <linux/ktime.h> 33 #include <asm/tsc.h> 34 #endif 35 36 /** 37 * e1000e_phc_adjfreq - adjust the frequency of the hardware clock 38 * @ptp: ptp clock structure 39 * @delta: Desired frequency change in parts per billion 40 * 41 * Adjust the frequency of the PHC cycle counter by the indicated delta from 42 * the base frequency. 43 **/ 44 static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) 45 { 46 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 47 ptp_clock_info); 48 struct e1000_hw *hw = &adapter->hw; 49 bool neg_adj = false; 50 unsigned long flags; 51 u64 adjustment; 52 u32 timinca, incvalue; 53 s32 ret_val; 54 55 if ((delta > ptp->max_adj) || (delta <= -1000000000)) 56 return -EINVAL; 57 58 if (delta < 0) { 59 neg_adj = true; 60 delta = -delta; 61 } 62 63 /* Get the System Time Register SYSTIM base frequency */ 64 ret_val = e1000e_get_base_timinca(adapter, &timinca); 65 if (ret_val) 66 return ret_val; 67 68 spin_lock_irqsave(&adapter->systim_lock, flags); 69 70 incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK; 71 72 adjustment = incvalue; 73 adjustment *= delta; 74 adjustment = div_u64(adjustment, 1000000000); 75 76 incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment); 77 78 timinca &= ~E1000_TIMINCA_INCVALUE_MASK; 79 timinca |= incvalue; 80 81 ew32(TIMINCA, timinca); 82 83 adapter->ptp_delta = delta; 84 85 spin_unlock_irqrestore(&adapter->systim_lock, flags); 86 87 return 0; 88 } 89 90 /** 91 * e1000e_phc_adjtime - Shift the time of the hardware clock 92 * @ptp: ptp clock structure 93 * @delta: Desired change in nanoseconds 94 * 95 * Adjust the timer by resetting the timecounter structure. 96 **/ 97 static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta) 98 { 99 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 100 ptp_clock_info); 101 unsigned long flags; 102 103 spin_lock_irqsave(&adapter->systim_lock, flags); 104 timecounter_adjtime(&adapter->tc, delta); 105 spin_unlock_irqrestore(&adapter->systim_lock, flags); 106 107 return 0; 108 } 109 110 #ifdef CONFIG_E1000E_HWTS 111 #define MAX_HW_WAIT_COUNT (3) 112 113 /** 114 * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers 115 * @device: current device time 116 * @system: system counter value read synchronously with device time 117 * @ctx: context provided by timekeeping code 118 * 119 * Read device and system (ART) clock simultaneously and return the corrected 120 * clock values in ns. 121 **/ 122 static int e1000e_phc_get_syncdevicetime(ktime_t *device, 123 struct system_counterval_t *system, 124 void *ctx) 125 { 126 struct e1000_adapter *adapter = (struct e1000_adapter *)ctx; 127 struct e1000_hw *hw = &adapter->hw; 128 unsigned long flags; 129 int i; 130 u32 tsync_ctrl; 131 u64 dev_cycles; 132 u64 sys_cycles; 133 134 tsync_ctrl = er32(TSYNCTXCTL); 135 tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC | 136 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK; 137 ew32(TSYNCTXCTL, tsync_ctrl); 138 for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) { 139 udelay(1); 140 tsync_ctrl = er32(TSYNCTXCTL); 141 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP) 142 break; 143 } 144 145 if (i == MAX_HW_WAIT_COUNT) 146 return -ETIMEDOUT; 147 148 dev_cycles = er32(SYSSTMPH); 149 dev_cycles <<= 32; 150 dev_cycles |= er32(SYSSTMPL); 151 spin_lock_irqsave(&adapter->systim_lock, flags); 152 *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles)); 153 spin_unlock_irqrestore(&adapter->systim_lock, flags); 154 155 sys_cycles = er32(PLTSTMPH); 156 sys_cycles <<= 32; 157 sys_cycles |= er32(PLTSTMPL); 158 *system = convert_art_to_tsc(sys_cycles); 159 160 return 0; 161 } 162 163 /** 164 * e1000e_phc_getsynctime - Reads the current system/device cross timestamp 165 * @ptp: ptp clock structure 166 * @cts: structure containing timestamp 167 * 168 * Read device and system (ART) clock simultaneously and return the scaled 169 * clock values in ns. 170 **/ 171 static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp, 172 struct system_device_crosststamp *xtstamp) 173 { 174 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 175 ptp_clock_info); 176 177 return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime, 178 adapter, NULL, xtstamp); 179 } 180 #endif/*CONFIG_E1000E_HWTS*/ 181 182 /** 183 * e1000e_phc_gettime - Reads the current time from the hardware clock 184 * @ptp: ptp clock structure 185 * @ts: timespec structure to hold the current time value 186 * 187 * Read the timecounter and return the correct value in ns after converting 188 * it into a struct timespec. 189 **/ 190 static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) 191 { 192 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 193 ptp_clock_info); 194 unsigned long flags; 195 u64 ns; 196 197 spin_lock_irqsave(&adapter->systim_lock, flags); 198 ns = timecounter_read(&adapter->tc); 199 spin_unlock_irqrestore(&adapter->systim_lock, flags); 200 201 *ts = ns_to_timespec64(ns); 202 203 return 0; 204 } 205 206 /** 207 * e1000e_phc_settime - Set the current time on the hardware clock 208 * @ptp: ptp clock structure 209 * @ts: timespec containing the new time for the cycle counter 210 * 211 * Reset the timecounter to use a new base value instead of the kernel 212 * wall timer value. 213 **/ 214 static int e1000e_phc_settime(struct ptp_clock_info *ptp, 215 const struct timespec64 *ts) 216 { 217 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 218 ptp_clock_info); 219 unsigned long flags; 220 u64 ns; 221 222 ns = timespec64_to_ns(ts); 223 224 /* reset the timecounter */ 225 spin_lock_irqsave(&adapter->systim_lock, flags); 226 timecounter_init(&adapter->tc, &adapter->cc, ns); 227 spin_unlock_irqrestore(&adapter->systim_lock, flags); 228 229 return 0; 230 } 231 232 /** 233 * e1000e_phc_enable - enable or disable an ancillary feature 234 * @ptp: ptp clock structure 235 * @request: Desired resource to enable or disable 236 * @on: Caller passes one to enable or zero to disable 237 * 238 * Enable (or disable) ancillary features of the PHC subsystem. 239 * Currently, no ancillary features are supported. 240 **/ 241 static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp, 242 struct ptp_clock_request __always_unused *request, 243 int __always_unused on) 244 { 245 return -EOPNOTSUPP; 246 } 247 248 static void e1000e_systim_overflow_work(struct work_struct *work) 249 { 250 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, 251 systim_overflow_work.work); 252 struct e1000_hw *hw = &adapter->hw; 253 struct timespec64 ts; 254 255 adapter->ptp_clock_info.gettime64(&adapter->ptp_clock_info, &ts); 256 257 e_dbg("SYSTIM overflow check at %lld.%09lu\n", 258 (long long) ts.tv_sec, ts.tv_nsec); 259 260 schedule_delayed_work(&adapter->systim_overflow_work, 261 E1000_SYSTIM_OVERFLOW_PERIOD); 262 } 263 264 static const struct ptp_clock_info e1000e_ptp_clock_info = { 265 .owner = THIS_MODULE, 266 .n_alarm = 0, 267 .n_ext_ts = 0, 268 .n_per_out = 0, 269 .n_pins = 0, 270 .pps = 0, 271 .adjfreq = e1000e_phc_adjfreq, 272 .adjtime = e1000e_phc_adjtime, 273 .gettime64 = e1000e_phc_gettime, 274 .settime64 = e1000e_phc_settime, 275 .enable = e1000e_phc_enable, 276 }; 277 278 /** 279 * e1000e_ptp_init - initialize PTP for devices which support it 280 * @adapter: board private structure 281 * 282 * This function performs the required steps for enabling PTP support. 283 * If PTP support has already been loaded it simply calls the cyclecounter 284 * init routine and exits. 285 **/ 286 void e1000e_ptp_init(struct e1000_adapter *adapter) 287 { 288 struct e1000_hw *hw = &adapter->hw; 289 290 adapter->ptp_clock = NULL; 291 292 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) 293 return; 294 295 adapter->ptp_clock_info = e1000e_ptp_clock_info; 296 297 snprintf(adapter->ptp_clock_info.name, 298 sizeof(adapter->ptp_clock_info.name), "%pm", 299 adapter->netdev->perm_addr); 300 301 switch (hw->mac.type) { 302 case e1000_pch2lan: 303 case e1000_pch_lpt: 304 case e1000_pch_spt: 305 case e1000_pch_cnp: 306 if ((hw->mac.type < e1000_pch_lpt) || 307 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { 308 adapter->ptp_clock_info.max_adj = 24000000 - 1; 309 break; 310 } 311 /* fall-through */ 312 case e1000_82574: 313 case e1000_82583: 314 adapter->ptp_clock_info.max_adj = 600000000 - 1; 315 break; 316 default: 317 break; 318 } 319 320 #ifdef CONFIG_E1000E_HWTS 321 /* CPU must have ART and GBe must be from Sunrise Point or greater */ 322 if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART)) 323 adapter->ptp_clock_info.getcrosststamp = 324 e1000e_phc_getcrosststamp; 325 #endif/*CONFIG_E1000E_HWTS*/ 326 327 INIT_DELAYED_WORK(&adapter->systim_overflow_work, 328 e1000e_systim_overflow_work); 329 330 schedule_delayed_work(&adapter->systim_overflow_work, 331 E1000_SYSTIM_OVERFLOW_PERIOD); 332 333 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info, 334 &adapter->pdev->dev); 335 if (IS_ERR(adapter->ptp_clock)) { 336 adapter->ptp_clock = NULL; 337 e_err("ptp_clock_register failed\n"); 338 } else if (adapter->ptp_clock) { 339 e_info("registered PHC clock\n"); 340 } 341 } 342 343 /** 344 * e1000e_ptp_remove - disable PTP device and stop the overflow check 345 * @adapter: board private structure 346 * 347 * Stop the PTP support, and cancel the delayed work. 348 **/ 349 void e1000e_ptp_remove(struct e1000_adapter *adapter) 350 { 351 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) 352 return; 353 354 cancel_delayed_work_sync(&adapter->systim_overflow_work); 355 356 if (adapter->ptp_clock) { 357 ptp_clock_unregister(adapter->ptp_clock); 358 adapter->ptp_clock = NULL; 359 e_info("removed PHC\n"); 360 } 361 } 362