1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2018 Intel Corporation. */ 3 4 /* PTP 1588 Hardware Clock (PHC) 5 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb) 6 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com> 7 */ 8 9 #include "e1000.h" 10 11 #ifdef CONFIG_E1000E_HWTS 12 #include <linux/clocksource.h> 13 #include <linux/ktime.h> 14 #include <asm/tsc.h> 15 #endif 16 17 /** 18 * e1000e_phc_adjfine - adjust the frequency of the hardware clock 19 * @ptp: ptp clock structure 20 * @delta: Desired frequency chance in scaled parts per million 21 * 22 * Adjust the frequency of the PHC cycle counter by the indicated delta from 23 * the base frequency. 24 * 25 * Scaled parts per million is ppm but with a 16 bit binary fractional field. 26 **/ 27 static int e1000e_phc_adjfine(struct ptp_clock_info *ptp, long delta) 28 { 29 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 30 ptp_clock_info); 31 struct e1000_hw *hw = &adapter->hw; 32 bool neg_adj = false; 33 unsigned long flags; 34 u64 adjustment; 35 u32 timinca, incvalue; 36 s32 ret_val; 37 38 if (delta < 0) { 39 neg_adj = true; 40 delta = -delta; 41 } 42 43 /* Get the System Time Register SYSTIM base frequency */ 44 ret_val = e1000e_get_base_timinca(adapter, &timinca); 45 if (ret_val) 46 return ret_val; 47 48 spin_lock_irqsave(&adapter->systim_lock, flags); 49 50 incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK; 51 52 adjustment = mul_u64_u64_div_u64(incvalue, (u64)delta, 53 1000000ULL << 16); 54 55 incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment); 56 57 timinca &= ~E1000_TIMINCA_INCVALUE_MASK; 58 timinca |= incvalue; 59 60 ew32(TIMINCA, timinca); 61 62 adapter->ptp_delta = delta; 63 64 spin_unlock_irqrestore(&adapter->systim_lock, flags); 65 66 return 0; 67 } 68 69 /** 70 * e1000e_phc_adjtime - Shift the time of the hardware clock 71 * @ptp: ptp clock structure 72 * @delta: Desired change in nanoseconds 73 * 74 * Adjust the timer by resetting the timecounter structure. 75 **/ 76 static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta) 77 { 78 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 79 ptp_clock_info); 80 unsigned long flags; 81 82 spin_lock_irqsave(&adapter->systim_lock, flags); 83 timecounter_adjtime(&adapter->tc, delta); 84 spin_unlock_irqrestore(&adapter->systim_lock, flags); 85 86 return 0; 87 } 88 89 #ifdef CONFIG_E1000E_HWTS 90 #define MAX_HW_WAIT_COUNT (3) 91 92 /** 93 * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers 94 * @device: current device time 95 * @system: system counter value read synchronously with device time 96 * @ctx: context provided by timekeeping code 97 * 98 * Read device and system (ART) clock simultaneously and return the corrected 99 * clock values in ns. 100 **/ 101 static int e1000e_phc_get_syncdevicetime(ktime_t *device, 102 struct system_counterval_t *system, 103 void *ctx) 104 { 105 struct e1000_adapter *adapter = (struct e1000_adapter *)ctx; 106 struct e1000_hw *hw = &adapter->hw; 107 unsigned long flags; 108 int i; 109 u32 tsync_ctrl; 110 u64 dev_cycles; 111 u64 sys_cycles; 112 113 tsync_ctrl = er32(TSYNCTXCTL); 114 tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC | 115 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK; 116 ew32(TSYNCTXCTL, tsync_ctrl); 117 for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) { 118 udelay(1); 119 tsync_ctrl = er32(TSYNCTXCTL); 120 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP) 121 break; 122 } 123 124 if (i == MAX_HW_WAIT_COUNT) 125 return -ETIMEDOUT; 126 127 dev_cycles = er32(SYSSTMPH); 128 dev_cycles <<= 32; 129 dev_cycles |= er32(SYSSTMPL); 130 spin_lock_irqsave(&adapter->systim_lock, flags); 131 *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles)); 132 spin_unlock_irqrestore(&adapter->systim_lock, flags); 133 134 sys_cycles = er32(PLTSTMPH); 135 sys_cycles <<= 32; 136 sys_cycles |= er32(PLTSTMPL); 137 *system = convert_art_to_tsc(sys_cycles); 138 139 return 0; 140 } 141 142 /** 143 * e1000e_phc_getcrosststamp - Reads the current system/device cross timestamp 144 * @ptp: ptp clock structure 145 * @xtstamp: structure containing timestamp 146 * 147 * Read device and system (ART) clock simultaneously and return the scaled 148 * clock values in ns. 149 **/ 150 static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp, 151 struct system_device_crosststamp *xtstamp) 152 { 153 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 154 ptp_clock_info); 155 156 return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime, 157 adapter, NULL, xtstamp); 158 } 159 #endif/*CONFIG_E1000E_HWTS*/ 160 161 /** 162 * e1000e_phc_gettimex - Reads the current time from the hardware clock and 163 * system clock 164 * @ptp: ptp clock structure 165 * @ts: timespec structure to hold the current PHC time 166 * @sts: structure to hold the current system time 167 * 168 * Read the timecounter and return the correct value in ns after converting 169 * it into a struct timespec. 170 **/ 171 static int e1000e_phc_gettimex(struct ptp_clock_info *ptp, 172 struct timespec64 *ts, 173 struct ptp_system_timestamp *sts) 174 { 175 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 176 ptp_clock_info); 177 unsigned long flags; 178 u64 cycles, ns; 179 180 spin_lock_irqsave(&adapter->systim_lock, flags); 181 182 /* NOTE: Non-monotonic SYSTIM readings may be returned */ 183 cycles = e1000e_read_systim(adapter, sts); 184 ns = timecounter_cyc2time(&adapter->tc, cycles); 185 186 spin_unlock_irqrestore(&adapter->systim_lock, flags); 187 188 *ts = ns_to_timespec64(ns); 189 190 return 0; 191 } 192 193 /** 194 * e1000e_phc_settime - Set the current time on the hardware clock 195 * @ptp: ptp clock structure 196 * @ts: timespec containing the new time for the cycle counter 197 * 198 * Reset the timecounter to use a new base value instead of the kernel 199 * wall timer value. 200 **/ 201 static int e1000e_phc_settime(struct ptp_clock_info *ptp, 202 const struct timespec64 *ts) 203 { 204 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, 205 ptp_clock_info); 206 unsigned long flags; 207 u64 ns; 208 209 ns = timespec64_to_ns(ts); 210 211 /* reset the timecounter */ 212 spin_lock_irqsave(&adapter->systim_lock, flags); 213 timecounter_init(&adapter->tc, &adapter->cc, ns); 214 spin_unlock_irqrestore(&adapter->systim_lock, flags); 215 216 return 0; 217 } 218 219 /** 220 * e1000e_phc_enable - enable or disable an ancillary feature 221 * @ptp: ptp clock structure 222 * @request: Desired resource to enable or disable 223 * @on: Caller passes one to enable or zero to disable 224 * 225 * Enable (or disable) ancillary features of the PHC subsystem. 226 * Currently, no ancillary features are supported. 227 **/ 228 static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp, 229 struct ptp_clock_request __always_unused *request, 230 int __always_unused on) 231 { 232 return -EOPNOTSUPP; 233 } 234 235 static void e1000e_systim_overflow_work(struct work_struct *work) 236 { 237 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, 238 systim_overflow_work.work); 239 struct e1000_hw *hw = &adapter->hw; 240 struct timespec64 ts; 241 u64 ns; 242 243 /* Update the timecounter */ 244 ns = timecounter_read(&adapter->tc); 245 246 ts = ns_to_timespec64(ns); 247 e_dbg("SYSTIM overflow check at %lld.%09lu\n", 248 (long long) ts.tv_sec, ts.tv_nsec); 249 250 schedule_delayed_work(&adapter->systim_overflow_work, 251 E1000_SYSTIM_OVERFLOW_PERIOD); 252 } 253 254 static const struct ptp_clock_info e1000e_ptp_clock_info = { 255 .owner = THIS_MODULE, 256 .n_alarm = 0, 257 .n_ext_ts = 0, 258 .n_per_out = 0, 259 .n_pins = 0, 260 .pps = 0, 261 .adjfine = e1000e_phc_adjfine, 262 .adjtime = e1000e_phc_adjtime, 263 .gettimex64 = e1000e_phc_gettimex, 264 .settime64 = e1000e_phc_settime, 265 .enable = e1000e_phc_enable, 266 }; 267 268 /** 269 * e1000e_ptp_init - initialize PTP for devices which support it 270 * @adapter: board private structure 271 * 272 * This function performs the required steps for enabling PTP support. 273 * If PTP support has already been loaded it simply calls the cyclecounter 274 * init routine and exits. 275 **/ 276 void e1000e_ptp_init(struct e1000_adapter *adapter) 277 { 278 struct e1000_hw *hw = &adapter->hw; 279 280 adapter->ptp_clock = NULL; 281 282 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) 283 return; 284 285 adapter->ptp_clock_info = e1000e_ptp_clock_info; 286 287 snprintf(adapter->ptp_clock_info.name, 288 sizeof(adapter->ptp_clock_info.name), "%pm", 289 adapter->netdev->perm_addr); 290 291 switch (hw->mac.type) { 292 case e1000_pch2lan: 293 case e1000_pch_lpt: 294 case e1000_pch_spt: 295 case e1000_pch_cnp: 296 case e1000_pch_tgp: 297 case e1000_pch_adp: 298 case e1000_pch_mtp: 299 case e1000_pch_lnp: 300 if ((hw->mac.type < e1000_pch_lpt) || 301 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { 302 adapter->ptp_clock_info.max_adj = 24000000 - 1; 303 break; 304 } 305 fallthrough; 306 case e1000_82574: 307 case e1000_82583: 308 adapter->ptp_clock_info.max_adj = 600000000 - 1; 309 break; 310 default: 311 break; 312 } 313 314 #ifdef CONFIG_E1000E_HWTS 315 /* CPU must have ART and GBe must be from Sunrise Point or greater */ 316 if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART)) 317 adapter->ptp_clock_info.getcrosststamp = 318 e1000e_phc_getcrosststamp; 319 #endif/*CONFIG_E1000E_HWTS*/ 320 321 INIT_DELAYED_WORK(&adapter->systim_overflow_work, 322 e1000e_systim_overflow_work); 323 324 schedule_delayed_work(&adapter->systim_overflow_work, 325 E1000_SYSTIM_OVERFLOW_PERIOD); 326 327 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info, 328 &adapter->pdev->dev); 329 if (IS_ERR(adapter->ptp_clock)) { 330 adapter->ptp_clock = NULL; 331 e_err("ptp_clock_register failed\n"); 332 } else if (adapter->ptp_clock) { 333 e_info("registered PHC clock\n"); 334 } 335 } 336 337 /** 338 * e1000e_ptp_remove - disable PTP device and stop the overflow check 339 * @adapter: board private structure 340 * 341 * Stop the PTP support, and cancel the delayed work. 342 **/ 343 void e1000e_ptp_remove(struct e1000_adapter *adapter) 344 { 345 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) 346 return; 347 348 cancel_delayed_work_sync(&adapter->systim_overflow_work); 349 350 if (adapter->ptp_clock) { 351 ptp_clock_unregister(adapter->ptp_clock); 352 adapter->ptp_clock = NULL; 353 e_info("removed PHC\n"); 354 } 355 } 356