1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
3 
4 /* PTP 1588 Hardware Clock (PHC)
5  * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
6  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
7  */
8 
9 #include "e1000.h"
10 
11 #ifdef CONFIG_E1000E_HWTS
12 #include <linux/clocksource.h>
13 #include <linux/ktime.h>
14 #include <asm/tsc.h>
15 #endif
16 
17 /**
18  * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
19  * @ptp: ptp clock structure
20  * @delta: Desired frequency change in parts per billion
21  *
22  * Adjust the frequency of the PHC cycle counter by the indicated delta from
23  * the base frequency.
24  **/
25 static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
26 {
27 	struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
28 						     ptp_clock_info);
29 	struct e1000_hw *hw = &adapter->hw;
30 	bool neg_adj = false;
31 	unsigned long flags;
32 	u64 adjustment;
33 	u32 timinca, incvalue;
34 	s32 ret_val;
35 
36 	if ((delta > ptp->max_adj) || (delta <= -1000000000))
37 		return -EINVAL;
38 
39 	if (delta < 0) {
40 		neg_adj = true;
41 		delta = -delta;
42 	}
43 
44 	/* Get the System Time Register SYSTIM base frequency */
45 	ret_val = e1000e_get_base_timinca(adapter, &timinca);
46 	if (ret_val)
47 		return ret_val;
48 
49 	spin_lock_irqsave(&adapter->systim_lock, flags);
50 
51 	incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
52 
53 	adjustment = incvalue;
54 	adjustment *= delta;
55 	adjustment = div_u64(adjustment, 1000000000);
56 
57 	incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
58 
59 	timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
60 	timinca |= incvalue;
61 
62 	ew32(TIMINCA, timinca);
63 
64 	adapter->ptp_delta = delta;
65 
66 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
67 
68 	return 0;
69 }
70 
71 /**
72  * e1000e_phc_adjtime - Shift the time of the hardware clock
73  * @ptp: ptp clock structure
74  * @delta: Desired change in nanoseconds
75  *
76  * Adjust the timer by resetting the timecounter structure.
77  **/
78 static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
79 {
80 	struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
81 						     ptp_clock_info);
82 	unsigned long flags;
83 
84 	spin_lock_irqsave(&adapter->systim_lock, flags);
85 	timecounter_adjtime(&adapter->tc, delta);
86 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
87 
88 	return 0;
89 }
90 
91 #ifdef CONFIG_E1000E_HWTS
92 #define MAX_HW_WAIT_COUNT (3)
93 
94 /**
95  * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
96  * @device: current device time
97  * @system: system counter value read synchronously with device time
98  * @ctx: context provided by timekeeping code
99  *
100  * Read device and system (ART) clock simultaneously and return the corrected
101  * clock values in ns.
102  **/
103 static int e1000e_phc_get_syncdevicetime(ktime_t *device,
104 					 struct system_counterval_t *system,
105 					 void *ctx)
106 {
107 	struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
108 	struct e1000_hw *hw = &adapter->hw;
109 	unsigned long flags;
110 	int i;
111 	u32 tsync_ctrl;
112 	u64 dev_cycles;
113 	u64 sys_cycles;
114 
115 	tsync_ctrl = er32(TSYNCTXCTL);
116 	tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
117 		E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
118 	ew32(TSYNCTXCTL, tsync_ctrl);
119 	for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
120 		udelay(1);
121 		tsync_ctrl = er32(TSYNCTXCTL);
122 		if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
123 			break;
124 	}
125 
126 	if (i == MAX_HW_WAIT_COUNT)
127 		return -ETIMEDOUT;
128 
129 	dev_cycles = er32(SYSSTMPH);
130 	dev_cycles <<= 32;
131 	dev_cycles |= er32(SYSSTMPL);
132 	spin_lock_irqsave(&adapter->systim_lock, flags);
133 	*device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
134 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
135 
136 	sys_cycles = er32(PLTSTMPH);
137 	sys_cycles <<= 32;
138 	sys_cycles |= er32(PLTSTMPL);
139 	*system = convert_art_to_tsc(sys_cycles);
140 
141 	return 0;
142 }
143 
144 /**
145  * e1000e_phc_getcrosststamp - Reads the current system/device cross timestamp
146  * @ptp: ptp clock structure
147  * @xtstamp: structure containing timestamp
148  *
149  * Read device and system (ART) clock simultaneously and return the scaled
150  * clock values in ns.
151  **/
152 static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
153 				     struct system_device_crosststamp *xtstamp)
154 {
155 	struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
156 						     ptp_clock_info);
157 
158 	return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
159 						adapter, NULL, xtstamp);
160 }
161 #endif/*CONFIG_E1000E_HWTS*/
162 
163 /**
164  * e1000e_phc_gettimex - Reads the current time from the hardware clock and
165  *                       system clock
166  * @ptp: ptp clock structure
167  * @ts: timespec structure to hold the current PHC time
168  * @sts: structure to hold the current system time
169  *
170  * Read the timecounter and return the correct value in ns after converting
171  * it into a struct timespec.
172  **/
173 static int e1000e_phc_gettimex(struct ptp_clock_info *ptp,
174 			       struct timespec64 *ts,
175 			       struct ptp_system_timestamp *sts)
176 {
177 	struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
178 						     ptp_clock_info);
179 	unsigned long flags;
180 	u64 cycles, ns;
181 
182 	spin_lock_irqsave(&adapter->systim_lock, flags);
183 
184 	/* NOTE: Non-monotonic SYSTIM readings may be returned */
185 	cycles = e1000e_read_systim(adapter, sts);
186 	ns = timecounter_cyc2time(&adapter->tc, cycles);
187 
188 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
189 
190 	*ts = ns_to_timespec64(ns);
191 
192 	return 0;
193 }
194 
195 /**
196  * e1000e_phc_settime - Set the current time on the hardware clock
197  * @ptp: ptp clock structure
198  * @ts: timespec containing the new time for the cycle counter
199  *
200  * Reset the timecounter to use a new base value instead of the kernel
201  * wall timer value.
202  **/
203 static int e1000e_phc_settime(struct ptp_clock_info *ptp,
204 			      const struct timespec64 *ts)
205 {
206 	struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
207 						     ptp_clock_info);
208 	unsigned long flags;
209 	u64 ns;
210 
211 	ns = timespec64_to_ns(ts);
212 
213 	/* reset the timecounter */
214 	spin_lock_irqsave(&adapter->systim_lock, flags);
215 	timecounter_init(&adapter->tc, &adapter->cc, ns);
216 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
217 
218 	return 0;
219 }
220 
221 /**
222  * e1000e_phc_enable - enable or disable an ancillary feature
223  * @ptp: ptp clock structure
224  * @request: Desired resource to enable or disable
225  * @on: Caller passes one to enable or zero to disable
226  *
227  * Enable (or disable) ancillary features of the PHC subsystem.
228  * Currently, no ancillary features are supported.
229  **/
230 static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
231 			     struct ptp_clock_request __always_unused *request,
232 			     int __always_unused on)
233 {
234 	return -EOPNOTSUPP;
235 }
236 
237 static void e1000e_systim_overflow_work(struct work_struct *work)
238 {
239 	struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
240 						     systim_overflow_work.work);
241 	struct e1000_hw *hw = &adapter->hw;
242 	struct timespec64 ts;
243 	u64 ns;
244 
245 	/* Update the timecounter */
246 	ns = timecounter_read(&adapter->tc);
247 
248 	ts = ns_to_timespec64(ns);
249 	e_dbg("SYSTIM overflow check at %lld.%09lu\n",
250 	      (long long) ts.tv_sec, ts.tv_nsec);
251 
252 	schedule_delayed_work(&adapter->systim_overflow_work,
253 			      E1000_SYSTIM_OVERFLOW_PERIOD);
254 }
255 
256 static const struct ptp_clock_info e1000e_ptp_clock_info = {
257 	.owner		= THIS_MODULE,
258 	.n_alarm	= 0,
259 	.n_ext_ts	= 0,
260 	.n_per_out	= 0,
261 	.n_pins		= 0,
262 	.pps		= 0,
263 	.adjfreq	= e1000e_phc_adjfreq,
264 	.adjtime	= e1000e_phc_adjtime,
265 	.gettimex64	= e1000e_phc_gettimex,
266 	.settime64	= e1000e_phc_settime,
267 	.enable		= e1000e_phc_enable,
268 };
269 
270 /**
271  * e1000e_ptp_init - initialize PTP for devices which support it
272  * @adapter: board private structure
273  *
274  * This function performs the required steps for enabling PTP support.
275  * If PTP support has already been loaded it simply calls the cyclecounter
276  * init routine and exits.
277  **/
278 void e1000e_ptp_init(struct e1000_adapter *adapter)
279 {
280 	struct e1000_hw *hw = &adapter->hw;
281 
282 	adapter->ptp_clock = NULL;
283 
284 	if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
285 		return;
286 
287 	adapter->ptp_clock_info = e1000e_ptp_clock_info;
288 
289 	snprintf(adapter->ptp_clock_info.name,
290 		 sizeof(adapter->ptp_clock_info.name), "%pm",
291 		 adapter->netdev->perm_addr);
292 
293 	switch (hw->mac.type) {
294 	case e1000_pch2lan:
295 	case e1000_pch_lpt:
296 	case e1000_pch_spt:
297 	case e1000_pch_cnp:
298 	case e1000_pch_tgp:
299 	case e1000_pch_adp:
300 	case e1000_pch_mtp:
301 	case e1000_pch_lnp:
302 		if ((hw->mac.type < e1000_pch_lpt) ||
303 		    (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
304 			adapter->ptp_clock_info.max_adj = 24000000 - 1;
305 			break;
306 		}
307 		fallthrough;
308 	case e1000_82574:
309 	case e1000_82583:
310 		adapter->ptp_clock_info.max_adj = 600000000 - 1;
311 		break;
312 	default:
313 		break;
314 	}
315 
316 #ifdef CONFIG_E1000E_HWTS
317 	/* CPU must have ART and GBe must be from Sunrise Point or greater */
318 	if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
319 		adapter->ptp_clock_info.getcrosststamp =
320 			e1000e_phc_getcrosststamp;
321 #endif/*CONFIG_E1000E_HWTS*/
322 
323 	INIT_DELAYED_WORK(&adapter->systim_overflow_work,
324 			  e1000e_systim_overflow_work);
325 
326 	schedule_delayed_work(&adapter->systim_overflow_work,
327 			      E1000_SYSTIM_OVERFLOW_PERIOD);
328 
329 	adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
330 						&adapter->pdev->dev);
331 	if (IS_ERR(adapter->ptp_clock)) {
332 		adapter->ptp_clock = NULL;
333 		e_err("ptp_clock_register failed\n");
334 	} else if (adapter->ptp_clock) {
335 		e_info("registered PHC clock\n");
336 	}
337 }
338 
339 /**
340  * e1000e_ptp_remove - disable PTP device and stop the overflow check
341  * @adapter: board private structure
342  *
343  * Stop the PTP support, and cancel the delayed work.
344  **/
345 void e1000e_ptp_remove(struct e1000_adapter *adapter)
346 {
347 	if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
348 		return;
349 
350 	cancel_delayed_work_sync(&adapter->systim_overflow_work);
351 
352 	if (adapter->ptp_clock) {
353 		ptp_clock_unregister(adapter->ptp_clock);
354 		adapter->ptp_clock = NULL;
355 		e_info("removed PHC\n");
356 	}
357 }
358