1ae06c70bSJeff Kirsher /* SPDX-License-Identifier: GPL-2.0 */ 251dce24bSJeff Kirsher /* Copyright(c) 1999 - 2018 Intel Corporation. */ 3d2263113SBruce Allan 4d2263113SBruce Allan #ifndef _E1000E_NVM_H_ 5d2263113SBruce Allan #define _E1000E_NVM_H_ 6d2263113SBruce Allan 7d2263113SBruce Allan s32 e1000e_acquire_nvm(struct e1000_hw *hw); 8d2263113SBruce Allan 9d2263113SBruce Allan s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg); 10d2263113SBruce Allan s32 e1000_read_mac_addr_generic(struct e1000_hw *hw); 11d2263113SBruce Allan s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, 12d2263113SBruce Allan u32 pba_num_size); 13d2263113SBruce Allan s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 14d2263113SBruce Allan s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data); 15d2263113SBruce Allan s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw); 16d2263113SBruce Allan s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 17d2263113SBruce Allan s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw); 18d2263113SBruce Allan void e1000e_release_nvm(struct e1000_hw *hw); 19d2263113SBruce Allan 20d2263113SBruce Allan #define E1000_STM_OPCODE 0xDB00 21d2263113SBruce Allan 22d2263113SBruce Allan #endif 23