1 /* Intel PRO/1000 Linux driver 2 * Copyright(c) 1999 - 2015 Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 * 16 * Contact Information: 17 * Linux NICS <linux.nics@intel.com> 18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 20 */ 21 22 #ifndef _E1000E_MANAGE_H_ 23 #define _E1000E_MANAGE_H_ 24 25 bool e1000e_check_mng_mode_generic(struct e1000_hw *hw); 26 bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); 27 s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); 28 bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw); 29 30 enum e1000_mng_mode { 31 e1000_mng_mode_none = 0, 32 e1000_mng_mode_asf, 33 e1000_mng_mode_pt, 34 e1000_mng_mode_ipmi, 35 e1000_mng_mode_host_if_only 36 }; 37 38 #define E1000_FACTPS_MNGCG 0x20000000 39 40 #define E1000_FWSM_MODE_MASK 0xE 41 #define E1000_FWSM_MODE_SHIFT 1 42 43 #define E1000_MNG_IAMT_MODE 0x3 44 #define E1000_MNG_DHCP_COOKIE_LENGTH 0x10 45 #define E1000_MNG_DHCP_COOKIE_OFFSET 0x6F0 46 #define E1000_MNG_DHCP_COMMAND_TIMEOUT 10 47 #define E1000_MNG_DHCP_TX_PAYLOAD_CMD 64 48 #define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1 49 #define E1000_MNG_DHCP_COOKIE_STATUS_VLAN 0x2 50 51 #define E1000_VFTA_ENTRY_SHIFT 5 52 #define E1000_VFTA_ENTRY_MASK 0x7F 53 #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F 54 55 #define E1000_HICR_EN 0x01 /* Enable bit - RO */ 56 /* Driver sets this bit when done to put command in RAM */ 57 #define E1000_HICR_C 0x02 58 #define E1000_HICR_SV 0x04 /* Status Validity */ 59 #define E1000_HICR_FW_RESET_ENABLE 0x40 60 #define E1000_HICR_FW_RESET 0x80 61 62 /* Intel(R) Active Management Technology signature */ 63 #define E1000_IAMT_SIGNATURE 0x544D4149 64 65 #endif 66