1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Intel PRO/1000 Linux driver 3 * Copyright(c) 1999 - 2015 Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in 15 * the file called "COPYING". 16 * 17 * Contact Information: 18 * Linux NICS <linux.nics@intel.com> 19 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 20 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 21 */ 22 23 #ifndef _E1000E_MANAGE_H_ 24 #define _E1000E_MANAGE_H_ 25 26 bool e1000e_check_mng_mode_generic(struct e1000_hw *hw); 27 bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); 28 s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); 29 bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw); 30 31 enum e1000_mng_mode { 32 e1000_mng_mode_none = 0, 33 e1000_mng_mode_asf, 34 e1000_mng_mode_pt, 35 e1000_mng_mode_ipmi, 36 e1000_mng_mode_host_if_only 37 }; 38 39 #define E1000_FACTPS_MNGCG 0x20000000 40 41 #define E1000_FWSM_MODE_MASK 0xE 42 #define E1000_FWSM_MODE_SHIFT 1 43 44 #define E1000_MNG_IAMT_MODE 0x3 45 #define E1000_MNG_DHCP_COOKIE_LENGTH 0x10 46 #define E1000_MNG_DHCP_COOKIE_OFFSET 0x6F0 47 #define E1000_MNG_DHCP_COMMAND_TIMEOUT 10 48 #define E1000_MNG_DHCP_TX_PAYLOAD_CMD 64 49 #define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1 50 #define E1000_MNG_DHCP_COOKIE_STATUS_VLAN 0x2 51 52 #define E1000_VFTA_ENTRY_SHIFT 5 53 #define E1000_VFTA_ENTRY_MASK 0x7F 54 #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F 55 56 #define E1000_HICR_EN 0x01 /* Enable bit - RO */ 57 /* Driver sets this bit when done to put command in RAM */ 58 #define E1000_HICR_C 0x02 59 #define E1000_HICR_SV 0x04 /* Status Validity */ 60 #define E1000_HICR_FW_RESET_ENABLE 0x40 61 #define E1000_HICR_FW_RESET 0x80 62 63 /* Intel(R) Active Management Technology signature */ 64 #define E1000_IAMT_SIGNATURE 0x544D4149 65 66 #endif 67