1 // SPDX-License-Identifier: GPL-2.0 2 /* Intel PRO/1000 Linux driver 3 * Copyright(c) 1999 - 2015 Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in 15 * the file called "COPYING". 16 * 17 * Contact Information: 18 * Linux NICS <linux.nics@intel.com> 19 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 20 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 21 */ 22 23 #include "e1000.h" 24 25 /** 26 * e1000_calculate_checksum - Calculate checksum for buffer 27 * @buffer: pointer to EEPROM 28 * @length: size of EEPROM to calculate a checksum for 29 * 30 * Calculates the checksum for some buffer on a specified length. The 31 * checksum calculated is returned. 32 **/ 33 static u8 e1000_calculate_checksum(u8 *buffer, u32 length) 34 { 35 u32 i; 36 u8 sum = 0; 37 38 if (!buffer) 39 return 0; 40 41 for (i = 0; i < length; i++) 42 sum += buffer[i]; 43 44 return (u8)(0 - sum); 45 } 46 47 /** 48 * e1000_mng_enable_host_if - Checks host interface is enabled 49 * @hw: pointer to the HW structure 50 * 51 * Returns 0 upon success, else -E1000_ERR_HOST_INTERFACE_COMMAND 52 * 53 * This function checks whether the HOST IF is enabled for command operation 54 * and also checks whether the previous command is completed. It busy waits 55 * in case of previous command is not completed. 56 **/ 57 static s32 e1000_mng_enable_host_if(struct e1000_hw *hw) 58 { 59 u32 hicr; 60 u8 i; 61 62 if (!hw->mac.arc_subsystem_valid) { 63 e_dbg("ARC subsystem not valid.\n"); 64 return -E1000_ERR_HOST_INTERFACE_COMMAND; 65 } 66 67 /* Check that the host interface is enabled. */ 68 hicr = er32(HICR); 69 if (!(hicr & E1000_HICR_EN)) { 70 e_dbg("E1000_HOST_EN bit disabled.\n"); 71 return -E1000_ERR_HOST_INTERFACE_COMMAND; 72 } 73 /* check the previous command is completed */ 74 for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) { 75 hicr = er32(HICR); 76 if (!(hicr & E1000_HICR_C)) 77 break; 78 mdelay(1); 79 } 80 81 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) { 82 e_dbg("Previous command timeout failed.\n"); 83 return -E1000_ERR_HOST_INTERFACE_COMMAND; 84 } 85 86 return 0; 87 } 88 89 /** 90 * e1000e_check_mng_mode_generic - Generic check management mode 91 * @hw: pointer to the HW structure 92 * 93 * Reads the firmware semaphore register and returns true (>0) if 94 * manageability is enabled, else false (0). 95 **/ 96 bool e1000e_check_mng_mode_generic(struct e1000_hw *hw) 97 { 98 u32 fwsm = er32(FWSM); 99 100 return (fwsm & E1000_FWSM_MODE_MASK) == 101 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT); 102 } 103 104 /** 105 * e1000e_enable_tx_pkt_filtering - Enable packet filtering on Tx 106 * @hw: pointer to the HW structure 107 * 108 * Enables packet filtering on transmit packets if manageability is enabled 109 * and host interface is enabled. 110 **/ 111 bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw) 112 { 113 struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie; 114 u32 *buffer = (u32 *)&hw->mng_cookie; 115 u32 offset; 116 s32 ret_val, hdr_csum, csum; 117 u8 i, len; 118 119 hw->mac.tx_pkt_filtering = true; 120 121 /* No manageability, no filtering */ 122 if (!hw->mac.ops.check_mng_mode(hw)) { 123 hw->mac.tx_pkt_filtering = false; 124 return hw->mac.tx_pkt_filtering; 125 } 126 127 /* If we can't read from the host interface for whatever 128 * reason, disable filtering. 129 */ 130 ret_val = e1000_mng_enable_host_if(hw); 131 if (ret_val) { 132 hw->mac.tx_pkt_filtering = false; 133 return hw->mac.tx_pkt_filtering; 134 } 135 136 /* Read in the header. Length and offset are in dwords. */ 137 len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2; 138 offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2; 139 for (i = 0; i < len; i++) 140 *(buffer + i) = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, 141 offset + i); 142 hdr_csum = hdr->checksum; 143 hdr->checksum = 0; 144 csum = e1000_calculate_checksum((u8 *)hdr, 145 E1000_MNG_DHCP_COOKIE_LENGTH); 146 /* If either the checksums or signature don't match, then 147 * the cookie area isn't considered valid, in which case we 148 * take the safe route of assuming Tx filtering is enabled. 149 */ 150 if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) { 151 hw->mac.tx_pkt_filtering = true; 152 return hw->mac.tx_pkt_filtering; 153 } 154 155 /* Cookie area is valid, make the final check for filtering. */ 156 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) 157 hw->mac.tx_pkt_filtering = false; 158 159 return hw->mac.tx_pkt_filtering; 160 } 161 162 /** 163 * e1000_mng_write_cmd_header - Writes manageability command header 164 * @hw: pointer to the HW structure 165 * @hdr: pointer to the host interface command header 166 * 167 * Writes the command header after does the checksum calculation. 168 **/ 169 static s32 e1000_mng_write_cmd_header(struct e1000_hw *hw, 170 struct e1000_host_mng_command_header *hdr) 171 { 172 u16 i, length = sizeof(struct e1000_host_mng_command_header); 173 174 /* Write the whole command header structure with new checksum. */ 175 176 hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length); 177 178 length >>= 2; 179 /* Write the relevant command block into the ram area. */ 180 for (i = 0; i < length; i++) { 181 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, i, *((u32 *)hdr + i)); 182 e1e_flush(); 183 } 184 185 return 0; 186 } 187 188 /** 189 * e1000_mng_host_if_write - Write to the manageability host interface 190 * @hw: pointer to the HW structure 191 * @buffer: pointer to the host interface buffer 192 * @length: size of the buffer 193 * @offset: location in the buffer to write to 194 * @sum: sum of the data (not checksum) 195 * 196 * This function writes the buffer content at the offset given on the host if. 197 * It also does alignment considerations to do the writes in most efficient 198 * way. Also fills up the sum of the buffer in *buffer parameter. 199 **/ 200 static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, 201 u16 length, u16 offset, u8 *sum) 202 { 203 u8 *tmp; 204 u8 *bufptr = buffer; 205 u32 data = 0; 206 u16 remaining, i, j, prev_bytes; 207 208 /* sum = only sum of the data and it is not checksum */ 209 210 if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) 211 return -E1000_ERR_PARAM; 212 213 tmp = (u8 *)&data; 214 prev_bytes = offset & 0x3; 215 offset >>= 2; 216 217 if (prev_bytes) { 218 data = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, offset); 219 for (j = prev_bytes; j < sizeof(u32); j++) { 220 *(tmp + j) = *bufptr++; 221 *sum += *(tmp + j); 222 } 223 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset, data); 224 length -= j - prev_bytes; 225 offset++; 226 } 227 228 remaining = length & 0x3; 229 length -= remaining; 230 231 /* Calculate length in DWORDs */ 232 length >>= 2; 233 234 /* The device driver writes the relevant command block into the 235 * ram area. 236 */ 237 for (i = 0; i < length; i++) { 238 for (j = 0; j < sizeof(u32); j++) { 239 *(tmp + j) = *bufptr++; 240 *sum += *(tmp + j); 241 } 242 243 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data); 244 } 245 if (remaining) { 246 for (j = 0; j < sizeof(u32); j++) { 247 if (j < remaining) 248 *(tmp + j) = *bufptr++; 249 else 250 *(tmp + j) = 0; 251 252 *sum += *(tmp + j); 253 } 254 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data); 255 } 256 257 return 0; 258 } 259 260 /** 261 * e1000e_mng_write_dhcp_info - Writes DHCP info to host interface 262 * @hw: pointer to the HW structure 263 * @buffer: pointer to the host interface 264 * @length: size of the buffer 265 * 266 * Writes the DHCP information to the host interface. 267 **/ 268 s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length) 269 { 270 struct e1000_host_mng_command_header hdr; 271 s32 ret_val; 272 u32 hicr; 273 274 hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD; 275 hdr.command_length = length; 276 hdr.reserved1 = 0; 277 hdr.reserved2 = 0; 278 hdr.checksum = 0; 279 280 /* Enable the host interface */ 281 ret_val = e1000_mng_enable_host_if(hw); 282 if (ret_val) 283 return ret_val; 284 285 /* Populate the host interface with the contents of "buffer". */ 286 ret_val = e1000_mng_host_if_write(hw, buffer, length, 287 sizeof(hdr), &(hdr.checksum)); 288 if (ret_val) 289 return ret_val; 290 291 /* Write the manageability command header */ 292 ret_val = e1000_mng_write_cmd_header(hw, &hdr); 293 if (ret_val) 294 return ret_val; 295 296 /* Tell the ARC a new command is pending. */ 297 hicr = er32(HICR); 298 ew32(HICR, hicr | E1000_HICR_C); 299 300 return 0; 301 } 302 303 /** 304 * e1000e_enable_mng_pass_thru - Check if management passthrough is needed 305 * @hw: pointer to the HW structure 306 * 307 * Verifies the hardware needs to leave interface enabled so that frames can 308 * be directed to and from the management interface. 309 **/ 310 bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw) 311 { 312 u32 manc; 313 u32 fwsm, factps; 314 315 manc = er32(MANC); 316 317 if (!(manc & E1000_MANC_RCV_TCO_EN)) 318 return false; 319 320 if (hw->mac.has_fwsm) { 321 fwsm = er32(FWSM); 322 factps = er32(FACTPS); 323 324 if (!(factps & E1000_FACTPS_MNGCG) && 325 ((fwsm & E1000_FWSM_MODE_MASK) == 326 (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) 327 return true; 328 } else if ((hw->mac.type == e1000_82574) || 329 (hw->mac.type == e1000_82583)) { 330 u16 data; 331 s32 ret_val; 332 333 factps = er32(FACTPS); 334 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data); 335 if (ret_val) 336 return false; 337 338 if (!(factps & E1000_FACTPS_MNGCG) && 339 ((data & E1000_NVM_INIT_CTRL2_MNGM) == 340 (e1000_mng_mode_pt << 13))) 341 return true; 342 } else if ((manc & E1000_MANC_SMBUS_EN) && 343 !(manc & E1000_MANC_ASF_EN)) { 344 return true; 345 } 346 347 return false; 348 } 349