1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /******************************************************************************* 3 4 Intel PRO/1000 Linux driver 5 Copyright(c) 1999 - 2006 Intel Corporation. 6 7 This program is free software; you can redistribute it and/or modify it 8 under the terms and conditions of the GNU General Public License, 9 version 2, as published by the Free Software Foundation. 10 11 This program is distributed in the hope it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 more details. 15 16 You should have received a copy of the GNU General Public License along with 17 this program; if not, write to the Free Software Foundation, Inc., 18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 19 20 The full GNU General Public License is included in this distribution in 21 the file called "COPYING". 22 23 Contact Information: 24 Linux NICS <linux.nics@intel.com> 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 28 *******************************************************************************/ 29 30 31 /* glue for the OS independent part of e1000 32 * includes register access macros 33 */ 34 35 #ifndef _E1000_OSDEP_H_ 36 #define _E1000_OSDEP_H_ 37 38 #include <asm/io.h> 39 40 #define CONFIG_RAM_BASE 0x60000 41 #define GBE_CONFIG_OFFSET 0x0 42 43 #define GBE_CONFIG_RAM_BASE \ 44 ((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET)) 45 46 #define GBE_CONFIG_BASE_VIRT \ 47 ((void __iomem *)phys_to_virt(GBE_CONFIG_RAM_BASE)) 48 49 #define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \ 50 (iowrite16_rep(base + offset, data, count)) 51 52 #define GBE_CONFIG_FLASH_READ(base, offset, count, data) \ 53 (ioread16_rep(base + (offset << 1), data, count)) 54 55 #define er32(reg) \ 56 (readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \ 57 ? E1000_##reg : E1000_82542_##reg))) 58 59 #define ew32(reg, value) \ 60 (writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543) \ 61 ? E1000_##reg : E1000_82542_##reg)))) 62 63 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \ 64 writel((value), ((a)->hw_addr + \ 65 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 66 ((offset) << 2)))) 67 68 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \ 69 readl((a)->hw_addr + \ 70 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 71 ((offset) << 2))) 72 73 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY 74 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY 75 76 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \ 77 writew((value), ((a)->hw_addr + \ 78 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 79 ((offset) << 1)))) 80 81 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \ 82 readw((a)->hw_addr + \ 83 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 84 ((offset) << 1))) 85 86 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \ 87 writeb((value), ((a)->hw_addr + \ 88 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 89 (offset)))) 90 91 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \ 92 readb((a)->hw_addr + \ 93 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 94 (offset))) 95 96 #define E1000_WRITE_FLUSH() er32(STATUS) 97 98 #define E1000_WRITE_ICH_FLASH_REG(a, reg, value) ( \ 99 writel((value), ((a)->flash_address + reg))) 100 101 #define E1000_READ_ICH_FLASH_REG(a, reg) ( \ 102 readl((a)->flash_address + reg)) 103 104 #define E1000_WRITE_ICH_FLASH_REG16(a, reg, value) ( \ 105 writew((value), ((a)->flash_address + reg))) 106 107 #define E1000_READ_ICH_FLASH_REG16(a, reg) ( \ 108 readw((a)->flash_address + reg)) 109 110 #endif /* _E1000_OSDEP_H_ */ 111