1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Huawei HiNIC PCI Express Linux driver 3 * Copyright(c) 2017 Huawei Technologies Co., Ltd 4 */ 5 6 #ifndef __HINIC_DEVLINK_H__ 7 #define __HINIC_DEVLINK_H__ 8 9 #include <net/devlink.h> 10 11 #define MAX_FW_TYPE_NUM 30 12 #define HINIC_MAGIC_NUM 0x18221100 13 #define UPDATEFW_IMAGE_HEAD_SIZE 1024 14 #define FW_UPDATE_COLD 0 15 #define FW_UPDATE_HOT 1 16 17 #define UP_TYPE_A 0x0 18 #define UP_TYPE_B 0x1 19 20 #define MAX_FW_FRAGMENT_LEN 1536 21 #define HINIC_FW_DISMATCH_ERROR 10 22 23 enum hinic_fw_type { 24 UP_FW_UPDATE_UP_TEXT_A = 0x0, 25 UP_FW_UPDATE_UP_DATA_A, 26 UP_FW_UPDATE_UP_TEXT_B, 27 UP_FW_UPDATE_UP_DATA_B, 28 UP_FW_UPDATE_UP_DICT, 29 30 UP_FW_UPDATE_HLINK_ONE = 0x5, 31 UP_FW_UPDATE_HLINK_TWO, 32 UP_FW_UPDATE_HLINK_THR, 33 UP_FW_UPDATE_PHY, 34 UP_FW_UPDATE_TILE_TEXT, 35 36 UP_FW_UPDATE_TILE_DATA = 0xa, 37 UP_FW_UPDATE_TILE_DICT, 38 UP_FW_UPDATE_PPE_STATE, 39 UP_FW_UPDATE_PPE_BRANCH, 40 UP_FW_UPDATE_PPE_EXTACT, 41 42 UP_FW_UPDATE_CLP_LEGACY = 0xf, 43 UP_FW_UPDATE_PXE_LEGACY, 44 UP_FW_UPDATE_ISCSI_LEGACY, 45 UP_FW_UPDATE_CLP_EFI, 46 UP_FW_UPDATE_PXE_EFI, 47 48 UP_FW_UPDATE_ISCSI_EFI = 0x14, 49 UP_FW_UPDATE_CFG, 50 UP_FW_UPDATE_BOOT, 51 UP_FW_UPDATE_VPD, 52 FILE_TYPE_TOTAL_NUM 53 }; 54 55 #define _IMAGE_UP_ALL_IN ((1 << UP_FW_UPDATE_UP_TEXT_A) | \ 56 (1 << UP_FW_UPDATE_UP_DATA_A) | \ 57 (1 << UP_FW_UPDATE_UP_TEXT_B) | \ 58 (1 << UP_FW_UPDATE_UP_DATA_B) | \ 59 (1 << UP_FW_UPDATE_UP_DICT) | \ 60 (1 << UP_FW_UPDATE_BOOT) | \ 61 (1 << UP_FW_UPDATE_HLINK_ONE) | \ 62 (1 << UP_FW_UPDATE_HLINK_TWO) | \ 63 (1 << UP_FW_UPDATE_HLINK_THR)) 64 65 #define _IMAGE_UCODE_ALL_IN ((1 << UP_FW_UPDATE_TILE_TEXT) | \ 66 (1 << UP_FW_UPDATE_TILE_DICT) | \ 67 (1 << UP_FW_UPDATE_PPE_STATE) | \ 68 (1 << UP_FW_UPDATE_PPE_BRANCH) | \ 69 (1 << UP_FW_UPDATE_PPE_EXTACT)) 70 71 #define _IMAGE_COLD_SUB_MODULES_MUST_IN (_IMAGE_UP_ALL_IN | _IMAGE_UCODE_ALL_IN) 72 #define _IMAGE_HOT_SUB_MODULES_MUST_IN (_IMAGE_UP_ALL_IN | _IMAGE_UCODE_ALL_IN) 73 #define _IMAGE_CFG_SUB_MODULES_MUST_IN BIT(UP_FW_UPDATE_CFG) 74 #define UP_FW_UPDATE_UP_TEXT 0x0 75 #define UP_FW_UPDATE_UP_DATA 0x1 76 #define UP_FW_UPDATE_VPD_B 0x15 77 78 struct fw_section_info_st { 79 u32 fw_section_len; 80 u32 fw_section_offset; 81 u32 fw_section_version; 82 u32 fw_section_type; 83 u32 fw_section_crc; 84 }; 85 86 struct fw_image_st { 87 u32 fw_version; 88 u32 fw_len; 89 u32 fw_magic; 90 struct { 91 u32 fw_section_cnt:16; 92 u32 resd:16; 93 } fw_info; 94 struct fw_section_info_st fw_section_info[MAX_FW_TYPE_NUM]; 95 u32 device_id; 96 u32 res[101]; 97 void *bin_data; 98 }; 99 100 struct host_image_st { 101 struct fw_section_info_st image_section_info[MAX_FW_TYPE_NUM]; 102 struct { 103 u32 up_total_len; 104 u32 fw_version; 105 } image_info; 106 u32 section_type_num; 107 u32 device_id; 108 }; 109 110 struct devlink *hinic_devlink_alloc(void); 111 void hinic_devlink_free(struct devlink *devlink); 112 int hinic_devlink_register(struct devlink *devlink, struct device *dev); 113 void hinic_devlink_unregister(struct devlink *devlink); 114 115 #endif /* __HINIC_DEVLINK_H__ */ 116