1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #include "hclge_mbx.h" 5 #include "hclgevf_main.h" 6 #include "hnae3.h" 7 8 static int hclgevf_resp_to_errno(u16 resp_code) 9 { 10 return resp_code ? -resp_code : 0; 11 } 12 13 static void hclgevf_reset_mbx_resp_status(struct hclgevf_dev *hdev) 14 { 15 /* this function should be called with mbx_resp.mbx_mutex held 16 * to prtect the received_response from race condition 17 */ 18 hdev->mbx_resp.received_resp = false; 19 hdev->mbx_resp.origin_mbx_msg = 0; 20 hdev->mbx_resp.resp_status = 0; 21 memset(hdev->mbx_resp.additional_info, 0, HCLGE_MBX_MAX_RESP_DATA_SIZE); 22 } 23 24 /* hclgevf_get_mbx_resp: used to get a response from PF after VF sends a mailbox 25 * message to PF. 26 * @hdev: pointer to struct hclgevf_dev 27 * @resp_msg: pointer to store the original message type and response status 28 * @len: the resp_msg data array length. 29 */ 30 static int hclgevf_get_mbx_resp(struct hclgevf_dev *hdev, u16 code0, u16 code1, 31 u8 *resp_data, u16 resp_len) 32 { 33 #define HCLGEVF_MAX_TRY_TIMES 500 34 #define HCLGEVF_SLEEP_USECOND 1000 35 struct hclgevf_mbx_resp_status *mbx_resp; 36 u16 r_code0, r_code1; 37 int i = 0; 38 39 if (resp_len > HCLGE_MBX_MAX_RESP_DATA_SIZE) { 40 dev_err(&hdev->pdev->dev, 41 "VF mbx response len(=%u) exceeds maximum(=%u)\n", 42 resp_len, 43 HCLGE_MBX_MAX_RESP_DATA_SIZE); 44 return -EINVAL; 45 } 46 47 while ((!hdev->mbx_resp.received_resp) && (i < HCLGEVF_MAX_TRY_TIMES)) { 48 if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) 49 return -EIO; 50 51 usleep_range(HCLGEVF_SLEEP_USECOND, HCLGEVF_SLEEP_USECOND * 2); 52 i++; 53 } 54 55 if (i >= HCLGEVF_MAX_TRY_TIMES) { 56 dev_err(&hdev->pdev->dev, 57 "VF could not get mbx(%u,%u) resp(=%d) from PF in %d tries\n", 58 code0, code1, hdev->mbx_resp.received_resp, i); 59 return -EIO; 60 } 61 62 mbx_resp = &hdev->mbx_resp; 63 r_code0 = (u16)(mbx_resp->origin_mbx_msg >> 16); 64 r_code1 = (u16)(mbx_resp->origin_mbx_msg & 0xff); 65 66 if (mbx_resp->resp_status) 67 return mbx_resp->resp_status; 68 69 if (resp_data) 70 memcpy(resp_data, &mbx_resp->additional_info[0], resp_len); 71 72 hclgevf_reset_mbx_resp_status(hdev); 73 74 if (!(r_code0 == code0 && r_code1 == code1 && !mbx_resp->resp_status)) { 75 dev_err(&hdev->pdev->dev, 76 "VF could not match resp code(code0=%u,code1=%u), %d\n", 77 code0, code1, mbx_resp->resp_status); 78 dev_err(&hdev->pdev->dev, 79 "VF could not match resp r_code(r_code0=%u,r_code1=%u)\n", 80 r_code0, r_code1); 81 return -EIO; 82 } 83 84 return 0; 85 } 86 87 int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev, 88 struct hclge_vf_to_pf_msg *send_msg, bool need_resp, 89 u8 *resp_data, u16 resp_len) 90 { 91 struct hclge_mbx_vf_to_pf_cmd *req; 92 struct hclgevf_desc desc; 93 int status; 94 95 req = (struct hclge_mbx_vf_to_pf_cmd *)desc.data; 96 97 if (!send_msg) { 98 dev_err(&hdev->pdev->dev, 99 "failed to send mbx, msg is NULL\n"); 100 return -EINVAL; 101 } 102 103 hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_VF_TO_PF, false); 104 if (need_resp) 105 hnae3_set_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B, 1); 106 107 memcpy(&req->msg, send_msg, sizeof(struct hclge_vf_to_pf_msg)); 108 109 /* synchronous send */ 110 if (need_resp) { 111 mutex_lock(&hdev->mbx_resp.mbx_mutex); 112 hclgevf_reset_mbx_resp_status(hdev); 113 status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 114 if (status) { 115 dev_err(&hdev->pdev->dev, 116 "VF failed(=%d) to send mbx message to PF\n", 117 status); 118 mutex_unlock(&hdev->mbx_resp.mbx_mutex); 119 return status; 120 } 121 122 status = hclgevf_get_mbx_resp(hdev, send_msg->code, 123 send_msg->subcode, resp_data, 124 resp_len); 125 mutex_unlock(&hdev->mbx_resp.mbx_mutex); 126 } else { 127 /* asynchronous send */ 128 status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 129 if (status) { 130 dev_err(&hdev->pdev->dev, 131 "VF failed(=%d) to send mbx message to PF\n", 132 status); 133 return status; 134 } 135 } 136 137 return status; 138 } 139 140 static bool hclgevf_cmd_crq_empty(struct hclgevf_hw *hw) 141 { 142 u32 tail = hclgevf_read_dev(hw, HCLGEVF_NIC_CRQ_TAIL_REG); 143 144 return tail == hw->cmq.crq.next_to_use; 145 } 146 147 void hclgevf_mbx_handler(struct hclgevf_dev *hdev) 148 { 149 struct hclgevf_mbx_resp_status *resp; 150 struct hclge_mbx_pf_to_vf_cmd *req; 151 struct hclgevf_cmq_ring *crq; 152 struct hclgevf_desc *desc; 153 u16 *msg_q; 154 u16 flag; 155 u8 *temp; 156 int i; 157 158 resp = &hdev->mbx_resp; 159 crq = &hdev->hw.cmq.crq; 160 161 while (!hclgevf_cmd_crq_empty(&hdev->hw)) { 162 if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) { 163 dev_info(&hdev->pdev->dev, "vf crq need init\n"); 164 return; 165 } 166 167 desc = &crq->desc[crq->next_to_use]; 168 req = (struct hclge_mbx_pf_to_vf_cmd *)desc->data; 169 170 flag = le16_to_cpu(crq->desc[crq->next_to_use].flag); 171 if (unlikely(!hnae3_get_bit(flag, HCLGEVF_CMDQ_RX_OUTVLD_B))) { 172 dev_warn(&hdev->pdev->dev, 173 "dropped invalid mailbox message, code = %u\n", 174 req->msg.code); 175 176 /* dropping/not processing this invalid message */ 177 crq->desc[crq->next_to_use].flag = 0; 178 hclge_mbx_ring_ptr_move_crq(crq); 179 continue; 180 } 181 182 /* synchronous messages are time critical and need preferential 183 * treatment. Therefore, we need to acknowledge all the sync 184 * responses as quickly as possible so that waiting tasks do not 185 * timeout and simultaneously queue the async messages for later 186 * prcessing in context of mailbox task i.e. the slow path. 187 */ 188 switch (req->msg.code) { 189 case HCLGE_MBX_PF_VF_RESP: 190 if (resp->received_resp) 191 dev_warn(&hdev->pdev->dev, 192 "VF mbx resp flag not clear(%u)\n", 193 req->msg.vf_mbx_msg_code); 194 resp->received_resp = true; 195 196 resp->origin_mbx_msg = 197 (req->msg.vf_mbx_msg_code << 16); 198 resp->origin_mbx_msg |= req->msg.vf_mbx_msg_subcode; 199 resp->resp_status = 200 hclgevf_resp_to_errno(req->msg.resp_status); 201 202 temp = (u8 *)req->msg.resp_data; 203 for (i = 0; i < HCLGE_MBX_MAX_RESP_DATA_SIZE; i++) { 204 resp->additional_info[i] = *temp; 205 temp++; 206 } 207 break; 208 case HCLGE_MBX_LINK_STAT_CHANGE: 209 case HCLGE_MBX_ASSERTING_RESET: 210 case HCLGE_MBX_LINK_STAT_MODE: 211 case HCLGE_MBX_PUSH_VLAN_INFO: 212 case HCLGE_MBX_PUSH_PROMISC_INFO: 213 /* set this mbx event as pending. This is required as we 214 * might loose interrupt event when mbx task is busy 215 * handling. This shall be cleared when mbx task just 216 * enters handling state. 217 */ 218 hdev->mbx_event_pending = true; 219 220 /* we will drop the async msg if we find ARQ as full 221 * and continue with next message 222 */ 223 if (atomic_read(&hdev->arq.count) >= 224 HCLGE_MBX_MAX_ARQ_MSG_NUM) { 225 dev_warn(&hdev->pdev->dev, 226 "Async Q full, dropping msg(%u)\n", 227 req->msg.code); 228 break; 229 } 230 231 /* tail the async message in arq */ 232 msg_q = hdev->arq.msg_q[hdev->arq.tail]; 233 memcpy(&msg_q[0], &req->msg, 234 HCLGE_MBX_MAX_ARQ_MSG_SIZE * sizeof(u16)); 235 hclge_mbx_tail_ptr_move_arq(hdev->arq); 236 atomic_inc(&hdev->arq.count); 237 238 hclgevf_mbx_task_schedule(hdev); 239 240 break; 241 default: 242 dev_err(&hdev->pdev->dev, 243 "VF received unsupported(%u) mbx msg from PF\n", 244 req->msg.code); 245 break; 246 } 247 crq->desc[crq->next_to_use].flag = 0; 248 hclge_mbx_ring_ptr_move_crq(crq); 249 } 250 251 /* Write back CMDQ_RQ header pointer, M7 need this pointer */ 252 hclgevf_write_dev(&hdev->hw, HCLGEVF_NIC_CRQ_HEAD_REG, 253 crq->next_to_use); 254 } 255 256 static void hclgevf_parse_promisc_info(struct hclgevf_dev *hdev, 257 u16 promisc_info) 258 { 259 if (!promisc_info) 260 dev_info(&hdev->pdev->dev, 261 "Promisc mode is closed by host for being untrusted.\n"); 262 } 263 264 void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev) 265 { 266 enum hnae3_reset_type reset_type; 267 u16 link_status, state; 268 u16 *msg_q, *vlan_info; 269 u8 duplex; 270 u32 speed; 271 u32 tail; 272 u8 idx; 273 274 /* we can safely clear it now as we are at start of the async message 275 * processing 276 */ 277 hdev->mbx_event_pending = false; 278 279 tail = hdev->arq.tail; 280 281 /* process all the async queue messages */ 282 while (tail != hdev->arq.head) { 283 if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) { 284 dev_info(&hdev->pdev->dev, 285 "vf crq need init in async\n"); 286 return; 287 } 288 289 msg_q = hdev->arq.msg_q[hdev->arq.head]; 290 291 switch (msg_q[0]) { 292 case HCLGE_MBX_LINK_STAT_CHANGE: 293 link_status = msg_q[1]; 294 memcpy(&speed, &msg_q[2], sizeof(speed)); 295 duplex = (u8)msg_q[4]; 296 297 /* update upper layer with new link link status */ 298 hclgevf_update_link_status(hdev, link_status); 299 hclgevf_update_speed_duplex(hdev, speed, duplex); 300 301 break; 302 case HCLGE_MBX_LINK_STAT_MODE: 303 idx = (u8)msg_q[1]; 304 if (idx) 305 memcpy(&hdev->hw.mac.supported, &msg_q[2], 306 sizeof(unsigned long)); 307 else 308 memcpy(&hdev->hw.mac.advertising, &msg_q[2], 309 sizeof(unsigned long)); 310 break; 311 case HCLGE_MBX_ASSERTING_RESET: 312 /* PF has asserted reset hence VF should go in pending 313 * state and poll for the hardware reset status till it 314 * has been completely reset. After this stack should 315 * eventually be re-initialized. 316 */ 317 reset_type = (enum hnae3_reset_type)msg_q[1]; 318 set_bit(reset_type, &hdev->reset_pending); 319 set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 320 hclgevf_reset_task_schedule(hdev); 321 322 break; 323 case HCLGE_MBX_PUSH_VLAN_INFO: 324 state = msg_q[1]; 325 vlan_info = &msg_q[1]; 326 hclgevf_update_port_base_vlan_info(hdev, state, 327 (u8 *)vlan_info, 8); 328 break; 329 case HCLGE_MBX_PUSH_PROMISC_INFO: 330 hclgevf_parse_promisc_info(hdev, msg_q[1]); 331 break; 332 default: 333 dev_err(&hdev->pdev->dev, 334 "fetched unsupported(%u) message from arq\n", 335 msg_q[0]); 336 break; 337 } 338 339 hclge_mbx_head_ptr_move_arq(hdev->arq); 340 atomic_dec(&hdev->arq.count); 341 msg_q = hdev->arq.msg_q[hdev->arq.head]; 342 } 343 } 344