1e2cb1decSSalil Mehta // SPDX-License-Identifier: GPL-2.0+ 2e2cb1decSSalil Mehta // Copyright (c) 2016-2017 Hisilicon Limited. 3e2cb1decSSalil Mehta 4e2cb1decSSalil Mehta #include <linux/etherdevice.h> 5aa5c4f17SHuazhong Tan #include <linux/iopoll.h> 66988eb2aSSalil Mehta #include <net/rtnetlink.h> 7e2cb1decSSalil Mehta #include "hclgevf_cmd.h" 8e2cb1decSSalil Mehta #include "hclgevf_main.h" 9e2cb1decSSalil Mehta #include "hclge_mbx.h" 10e2cb1decSSalil Mehta #include "hnae3.h" 11cd624299SYufeng Mo #include "hclgevf_devlink.h" 12027733b1SJie Wang #include "hclge_comm_rss.h" 13e2cb1decSSalil Mehta 14e2cb1decSSalil Mehta #define HCLGEVF_NAME "hclgevf" 15e2cb1decSSalil Mehta 16bbe6540eSHuazhong Tan #define HCLGEVF_RESET_MAX_FAIL_CNT 5 17bbe6540eSHuazhong Tan 189c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev); 195e7414cdSJian Shen static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 205e7414cdSJian Shen unsigned long delay); 215e7414cdSJian Shen 22e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf; 23e2cb1decSSalil Mehta 240ea68902SYunsheng Lin static struct workqueue_struct *hclgevf_wq; 250ea68902SYunsheng Lin 26e2cb1decSSalil Mehta static const struct pci_device_id ae_algovf_pci_tbl[] = { 27c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_VF), 0}, 28c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF), 29c155e22bSGuangbin Huang HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 30e2cb1decSSalil Mehta /* required last entry */ 31e2cb1decSSalil Mehta {0, } 32e2cb1decSSalil Mehta }; 33e2cb1decSSalil Mehta 342f550a46SYunsheng Lin MODULE_DEVICE_TABLE(pci, ae_algovf_pci_tbl); 352f550a46SYunsheng Lin 36cb413bfaSJie Wang static const u32 cmdq_reg_addr_list[] = {HCLGE_COMM_NIC_CSQ_BASEADDR_L_REG, 37cb413bfaSJie Wang HCLGE_COMM_NIC_CSQ_BASEADDR_H_REG, 38cb413bfaSJie Wang HCLGE_COMM_NIC_CSQ_DEPTH_REG, 39cb413bfaSJie Wang HCLGE_COMM_NIC_CSQ_TAIL_REG, 40cb413bfaSJie Wang HCLGE_COMM_NIC_CSQ_HEAD_REG, 41cb413bfaSJie Wang HCLGE_COMM_NIC_CRQ_BASEADDR_L_REG, 42cb413bfaSJie Wang HCLGE_COMM_NIC_CRQ_BASEADDR_H_REG, 43cb413bfaSJie Wang HCLGE_COMM_NIC_CRQ_DEPTH_REG, 44cb413bfaSJie Wang HCLGE_COMM_NIC_CRQ_TAIL_REG, 45cb413bfaSJie Wang HCLGE_COMM_NIC_CRQ_HEAD_REG, 46cb413bfaSJie Wang HCLGE_COMM_VECTOR0_CMDQ_SRC_REG, 47cb413bfaSJie Wang HCLGE_COMM_VECTOR0_CMDQ_STATE_REG, 48cb413bfaSJie Wang HCLGE_COMM_CMDQ_INTR_EN_REG, 49cb413bfaSJie Wang HCLGE_COMM_CMDQ_INTR_GEN_REG}; 501600c3e5SJian Shen 511600c3e5SJian Shen static const u32 common_reg_addr_list[] = {HCLGEVF_MISC_VECTOR_REG_BASE, 521600c3e5SJian Shen HCLGEVF_RST_ING, 531600c3e5SJian Shen HCLGEVF_GRO_EN_REG}; 541600c3e5SJian Shen 551600c3e5SJian Shen static const u32 ring_reg_addr_list[] = {HCLGEVF_RING_RX_ADDR_L_REG, 561600c3e5SJian Shen HCLGEVF_RING_RX_ADDR_H_REG, 571600c3e5SJian Shen HCLGEVF_RING_RX_BD_NUM_REG, 581600c3e5SJian Shen HCLGEVF_RING_RX_BD_LENGTH_REG, 591600c3e5SJian Shen HCLGEVF_RING_RX_MERGE_EN_REG, 601600c3e5SJian Shen HCLGEVF_RING_RX_TAIL_REG, 611600c3e5SJian Shen HCLGEVF_RING_RX_HEAD_REG, 621600c3e5SJian Shen HCLGEVF_RING_RX_FBD_NUM_REG, 631600c3e5SJian Shen HCLGEVF_RING_RX_OFFSET_REG, 641600c3e5SJian Shen HCLGEVF_RING_RX_FBD_OFFSET_REG, 651600c3e5SJian Shen HCLGEVF_RING_RX_STASH_REG, 661600c3e5SJian Shen HCLGEVF_RING_RX_BD_ERR_REG, 671600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_L_REG, 681600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_H_REG, 691600c3e5SJian Shen HCLGEVF_RING_TX_BD_NUM_REG, 701600c3e5SJian Shen HCLGEVF_RING_TX_PRIORITY_REG, 711600c3e5SJian Shen HCLGEVF_RING_TX_TC_REG, 721600c3e5SJian Shen HCLGEVF_RING_TX_MERGE_EN_REG, 731600c3e5SJian Shen HCLGEVF_RING_TX_TAIL_REG, 741600c3e5SJian Shen HCLGEVF_RING_TX_HEAD_REG, 751600c3e5SJian Shen HCLGEVF_RING_TX_FBD_NUM_REG, 761600c3e5SJian Shen HCLGEVF_RING_TX_OFFSET_REG, 771600c3e5SJian Shen HCLGEVF_RING_TX_EBD_NUM_REG, 781600c3e5SJian Shen HCLGEVF_RING_TX_EBD_OFFSET_REG, 791600c3e5SJian Shen HCLGEVF_RING_TX_BD_ERR_REG, 801600c3e5SJian Shen HCLGEVF_RING_EN_REG}; 811600c3e5SJian Shen 821600c3e5SJian Shen static const u32 tqp_intr_reg_addr_list[] = {HCLGEVF_TQP_INTR_CTRL_REG, 831600c3e5SJian Shen HCLGEVF_TQP_INTR_GL0_REG, 841600c3e5SJian Shen HCLGEVF_TQP_INTR_GL1_REG, 851600c3e5SJian Shen HCLGEVF_TQP_INTR_GL2_REG, 861600c3e5SJian Shen HCLGEVF_TQP_INTR_RL_REG}; 871600c3e5SJian Shen 88aab8d1c6SJie Wang /* hclgevf_cmd_send - send command to command queue 89aab8d1c6SJie Wang * @hw: pointer to the hw struct 90aab8d1c6SJie Wang * @desc: prefilled descriptor for describing the command 91aab8d1c6SJie Wang * @num : the number of descriptors to be sent 92aab8d1c6SJie Wang * 93aab8d1c6SJie Wang * This is the main send command for command queue, it 94aab8d1c6SJie Wang * sends the queue, cleans the queue, etc 95aab8d1c6SJie Wang */ 96aab8d1c6SJie Wang int hclgevf_cmd_send(struct hclgevf_hw *hw, struct hclge_desc *desc, int num) 97aab8d1c6SJie Wang { 989970308fSJie Wang return hclge_comm_cmd_send(&hw->hw, desc, num); 99aab8d1c6SJie Wang } 100aab8d1c6SJie Wang 101aab8d1c6SJie Wang void hclgevf_arq_init(struct hclgevf_dev *hdev) 102aab8d1c6SJie Wang { 103aab8d1c6SJie Wang struct hclge_comm_cmq *cmdq = &hdev->hw.hw.cmq; 104aab8d1c6SJie Wang 105aab8d1c6SJie Wang spin_lock(&cmdq->crq.lock); 106aab8d1c6SJie Wang /* initialize the pointers of async rx queue of mailbox */ 107aab8d1c6SJie Wang hdev->arq.hdev = hdev; 108aab8d1c6SJie Wang hdev->arq.head = 0; 109aab8d1c6SJie Wang hdev->arq.tail = 0; 110aab8d1c6SJie Wang atomic_set(&hdev->arq.count, 0); 111aab8d1c6SJie Wang spin_unlock(&cmdq->crq.lock); 112aab8d1c6SJie Wang } 113aab8d1c6SJie Wang 1149b2f3477SWeihang Li static struct hclgevf_dev *hclgevf_ae_get_hdev(struct hnae3_handle *handle) 115e2cb1decSSalil Mehta { 116eed9535fSPeng Li if (!handle->client) 117eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, nic); 118eed9535fSPeng Li else if (handle->client->type == HNAE3_CLIENT_ROCE) 119eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, roce); 120eed9535fSPeng Li else 121e2cb1decSSalil Mehta return container_of(handle, struct hclgevf_dev, nic); 122e2cb1decSSalil Mehta } 123e2cb1decSSalil Mehta 124e2cb1decSSalil Mehta static int hclgevf_tqps_update_stats(struct hnae3_handle *handle) 125e2cb1decSSalil Mehta { 126b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 127e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1286befad60SJie Wang struct hclge_desc desc; 129e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 130e2cb1decSSalil Mehta int status; 131e2cb1decSSalil Mehta int i; 132e2cb1decSSalil Mehta 133b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 134b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 135e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, 136e2cb1decSSalil Mehta HCLGEVF_OPC_QUERY_RX_STATUS, 137e2cb1decSSalil Mehta true); 138e2cb1decSSalil Mehta 139e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 140e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 141e2cb1decSSalil Mehta if (status) { 142e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 143e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 144e2cb1decSSalil Mehta status, i); 145e2cb1decSSalil Mehta return status; 146e2cb1decSSalil Mehta } 147e2cb1decSSalil Mehta tqp->tqp_stats.rcb_rx_ring_pktnum_rcd += 148cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 149e2cb1decSSalil Mehta 150e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_TX_STATUS, 151e2cb1decSSalil Mehta true); 152e2cb1decSSalil Mehta 153e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 154e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 155e2cb1decSSalil Mehta if (status) { 156e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 157e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 158e2cb1decSSalil Mehta status, i); 159e2cb1decSSalil Mehta return status; 160e2cb1decSSalil Mehta } 161e2cb1decSSalil Mehta tqp->tqp_stats.rcb_tx_ring_pktnum_rcd += 162cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 163e2cb1decSSalil Mehta } 164e2cb1decSSalil Mehta 165e2cb1decSSalil Mehta return 0; 166e2cb1decSSalil Mehta } 167e2cb1decSSalil Mehta 168e2cb1decSSalil Mehta static u64 *hclgevf_tqps_get_stats(struct hnae3_handle *handle, u64 *data) 169e2cb1decSSalil Mehta { 170e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo = &handle->kinfo; 171e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 172e2cb1decSSalil Mehta u64 *buff = data; 173e2cb1decSSalil Mehta int i; 174e2cb1decSSalil Mehta 175b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 176b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 177e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_tx_ring_pktnum_rcd; 178e2cb1decSSalil Mehta } 179e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 180b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 181e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_rx_ring_pktnum_rcd; 182e2cb1decSSalil Mehta } 183e2cb1decSSalil Mehta 184e2cb1decSSalil Mehta return buff; 185e2cb1decSSalil Mehta } 186e2cb1decSSalil Mehta 187e2cb1decSSalil Mehta static int hclgevf_tqps_get_sset_count(struct hnae3_handle *handle, int strset) 188e2cb1decSSalil Mehta { 189b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 190e2cb1decSSalil Mehta 191b4f1d303SJian Shen return kinfo->num_tqps * 2; 192e2cb1decSSalil Mehta } 193e2cb1decSSalil Mehta 194e2cb1decSSalil Mehta static u8 *hclgevf_tqps_get_strings(struct hnae3_handle *handle, u8 *data) 195e2cb1decSSalil Mehta { 196b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 197e2cb1decSSalil Mehta u8 *buff = data; 1989d8d5a36SYufeng Mo int i; 199e2cb1decSSalil Mehta 200b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 201b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 202e2cb1decSSalil Mehta struct hclgevf_tqp, q); 203c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "txq%u_pktnum_rcd", 204e2cb1decSSalil Mehta tqp->index); 205e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 206e2cb1decSSalil Mehta } 207e2cb1decSSalil Mehta 208b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 209b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 210e2cb1decSSalil Mehta struct hclgevf_tqp, q); 211c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "rxq%u_pktnum_rcd", 212e2cb1decSSalil Mehta tqp->index); 213e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 214e2cb1decSSalil Mehta } 215e2cb1decSSalil Mehta 216e2cb1decSSalil Mehta return buff; 217e2cb1decSSalil Mehta } 218e2cb1decSSalil Mehta 219e2cb1decSSalil Mehta static void hclgevf_update_stats(struct hnae3_handle *handle, 220e2cb1decSSalil Mehta struct net_device_stats *net_stats) 221e2cb1decSSalil Mehta { 222e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 223e2cb1decSSalil Mehta int status; 224e2cb1decSSalil Mehta 225e2cb1decSSalil Mehta status = hclgevf_tqps_update_stats(handle); 226e2cb1decSSalil Mehta if (status) 227e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 228e2cb1decSSalil Mehta "VF update of TQPS stats fail, status = %d.\n", 229e2cb1decSSalil Mehta status); 230e2cb1decSSalil Mehta } 231e2cb1decSSalil Mehta 232e2cb1decSSalil Mehta static int hclgevf_get_sset_count(struct hnae3_handle *handle, int strset) 233e2cb1decSSalil Mehta { 234e2cb1decSSalil Mehta if (strset == ETH_SS_TEST) 235e2cb1decSSalil Mehta return -EOPNOTSUPP; 236e2cb1decSSalil Mehta else if (strset == ETH_SS_STATS) 237e2cb1decSSalil Mehta return hclgevf_tqps_get_sset_count(handle, strset); 238e2cb1decSSalil Mehta 239e2cb1decSSalil Mehta return 0; 240e2cb1decSSalil Mehta } 241e2cb1decSSalil Mehta 242e2cb1decSSalil Mehta static void hclgevf_get_strings(struct hnae3_handle *handle, u32 strset, 243e2cb1decSSalil Mehta u8 *data) 244e2cb1decSSalil Mehta { 245e2cb1decSSalil Mehta u8 *p = (char *)data; 246e2cb1decSSalil Mehta 247e2cb1decSSalil Mehta if (strset == ETH_SS_STATS) 248e2cb1decSSalil Mehta p = hclgevf_tqps_get_strings(handle, p); 249e2cb1decSSalil Mehta } 250e2cb1decSSalil Mehta 251e2cb1decSSalil Mehta static void hclgevf_get_stats(struct hnae3_handle *handle, u64 *data) 252e2cb1decSSalil Mehta { 253e2cb1decSSalil Mehta hclgevf_tqps_get_stats(handle, data); 254e2cb1decSSalil Mehta } 255e2cb1decSSalil Mehta 256d3410018SYufeng Mo static void hclgevf_build_send_msg(struct hclge_vf_to_pf_msg *msg, u8 code, 257d3410018SYufeng Mo u8 subcode) 258d3410018SYufeng Mo { 259d3410018SYufeng Mo if (msg) { 260d3410018SYufeng Mo memset(msg, 0, sizeof(struct hclge_vf_to_pf_msg)); 261d3410018SYufeng Mo msg->code = code; 262d3410018SYufeng Mo msg->subcode = subcode; 263d3410018SYufeng Mo } 264d3410018SYufeng Mo } 265d3410018SYufeng Mo 26632e6d104SJian Shen static int hclgevf_get_basic_info(struct hclgevf_dev *hdev) 267e2cb1decSSalil Mehta { 26832e6d104SJian Shen struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 26932e6d104SJian Shen u8 resp_msg[HCLGE_MBX_MAX_RESP_DATA_SIZE]; 27032e6d104SJian Shen struct hclge_basic_info *basic_info; 271d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 27232e6d104SJian Shen unsigned long caps; 273e2cb1decSSalil Mehta int status; 274e2cb1decSSalil Mehta 27532e6d104SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_BASIC_INFO, 0); 27632e6d104SJian Shen status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 277d3410018SYufeng Mo sizeof(resp_msg)); 278e2cb1decSSalil Mehta if (status) { 279e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 28032e6d104SJian Shen "failed to get basic info from pf, ret = %d", status); 281e2cb1decSSalil Mehta return status; 282e2cb1decSSalil Mehta } 283e2cb1decSSalil Mehta 28432e6d104SJian Shen basic_info = (struct hclge_basic_info *)resp_msg; 28532e6d104SJian Shen 28632e6d104SJian Shen hdev->hw_tc_map = basic_info->hw_tc_map; 28732e6d104SJian Shen hdev->mbx_api_version = basic_info->mbx_api_version; 28832e6d104SJian Shen caps = basic_info->pf_caps; 28932e6d104SJian Shen if (test_bit(HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B, &caps)) 29032e6d104SJian Shen set_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps); 291e2cb1decSSalil Mehta 292e2cb1decSSalil Mehta return 0; 293e2cb1decSSalil Mehta } 294e2cb1decSSalil Mehta 29592f11ea1SJian Shen static int hclgevf_get_port_base_vlan_filter_state(struct hclgevf_dev *hdev) 29692f11ea1SJian Shen { 29792f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 298d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 29992f11ea1SJian Shen u8 resp_msg; 30092f11ea1SJian Shen int ret; 30192f11ea1SJian Shen 302d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 303d3410018SYufeng Mo HCLGE_MBX_GET_PORT_BASE_VLAN_STATE); 304d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, 305d3410018SYufeng Mo sizeof(u8)); 30692f11ea1SJian Shen if (ret) { 30792f11ea1SJian Shen dev_err(&hdev->pdev->dev, 30892f11ea1SJian Shen "VF request to get port based vlan state failed %d", 30992f11ea1SJian Shen ret); 31092f11ea1SJian Shen return ret; 31192f11ea1SJian Shen } 31292f11ea1SJian Shen 31392f11ea1SJian Shen nic->port_base_vlan_state = resp_msg; 31492f11ea1SJian Shen 31592f11ea1SJian Shen return 0; 31692f11ea1SJian Shen } 31792f11ea1SJian Shen 3186cee6fc3SJian Shen static int hclgevf_get_queue_info(struct hclgevf_dev *hdev) 319e2cb1decSSalil Mehta { 320c0425944SPeng Li #define HCLGEVF_TQPS_RSS_INFO_LEN 6 321d3410018SYufeng Mo #define HCLGEVF_TQPS_ALLOC_OFFSET 0 322d3410018SYufeng Mo #define HCLGEVF_TQPS_RSS_SIZE_OFFSET 2 323d3410018SYufeng Mo #define HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET 4 324d3410018SYufeng Mo 325e2cb1decSSalil Mehta u8 resp_msg[HCLGEVF_TQPS_RSS_INFO_LEN]; 326d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 327e2cb1decSSalil Mehta int status; 328e2cb1decSSalil Mehta 329d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QINFO, 0); 330d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 331e2cb1decSSalil Mehta HCLGEVF_TQPS_RSS_INFO_LEN); 332e2cb1decSSalil Mehta if (status) { 333e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 334e2cb1decSSalil Mehta "VF request to get tqp info from PF failed %d", 335e2cb1decSSalil Mehta status); 336e2cb1decSSalil Mehta return status; 337e2cb1decSSalil Mehta } 338e2cb1decSSalil Mehta 339d3410018SYufeng Mo memcpy(&hdev->num_tqps, &resp_msg[HCLGEVF_TQPS_ALLOC_OFFSET], 340d3410018SYufeng Mo sizeof(u16)); 341d3410018SYufeng Mo memcpy(&hdev->rss_size_max, &resp_msg[HCLGEVF_TQPS_RSS_SIZE_OFFSET], 342d3410018SYufeng Mo sizeof(u16)); 343d3410018SYufeng Mo memcpy(&hdev->rx_buf_len, &resp_msg[HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET], 344d3410018SYufeng Mo sizeof(u16)); 345c0425944SPeng Li 346c0425944SPeng Li return 0; 347c0425944SPeng Li } 348c0425944SPeng Li 349c0425944SPeng Li static int hclgevf_get_queue_depth(struct hclgevf_dev *hdev) 350c0425944SPeng Li { 351c0425944SPeng Li #define HCLGEVF_TQPS_DEPTH_INFO_LEN 4 352d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_TX_DESC_OFFSET 0 353d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_RX_DESC_OFFSET 2 354d3410018SYufeng Mo 355c0425944SPeng Li u8 resp_msg[HCLGEVF_TQPS_DEPTH_INFO_LEN]; 356d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 357c0425944SPeng Li int ret; 358c0425944SPeng Li 359d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QDEPTH, 0); 360d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 361c0425944SPeng Li HCLGEVF_TQPS_DEPTH_INFO_LEN); 362c0425944SPeng Li if (ret) { 363c0425944SPeng Li dev_err(&hdev->pdev->dev, 364c0425944SPeng Li "VF request to get tqp depth info from PF failed %d", 365c0425944SPeng Li ret); 366c0425944SPeng Li return ret; 367c0425944SPeng Li } 368c0425944SPeng Li 369d3410018SYufeng Mo memcpy(&hdev->num_tx_desc, &resp_msg[HCLGEVF_TQPS_NUM_TX_DESC_OFFSET], 370d3410018SYufeng Mo sizeof(u16)); 371d3410018SYufeng Mo memcpy(&hdev->num_rx_desc, &resp_msg[HCLGEVF_TQPS_NUM_RX_DESC_OFFSET], 372d3410018SYufeng Mo sizeof(u16)); 373e2cb1decSSalil Mehta 374e2cb1decSSalil Mehta return 0; 375e2cb1decSSalil Mehta } 376e2cb1decSSalil Mehta 3770c29d191Sliuzhongzhu static u16 hclgevf_get_qid_global(struct hnae3_handle *handle, u16 queue_id) 3780c29d191Sliuzhongzhu { 3790c29d191Sliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 380d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3810c29d191Sliuzhongzhu u16 qid_in_pf = 0; 382d3410018SYufeng Mo u8 resp_data[2]; 3830c29d191Sliuzhongzhu int ret; 3840c29d191Sliuzhongzhu 385d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QID_IN_PF, 0); 386d3410018SYufeng Mo memcpy(send_msg.data, &queue_id, sizeof(queue_id)); 387d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_data, 38863cbf7a9SYufeng Mo sizeof(resp_data)); 3890c29d191Sliuzhongzhu if (!ret) 3900c29d191Sliuzhongzhu qid_in_pf = *(u16 *)resp_data; 3910c29d191Sliuzhongzhu 3920c29d191Sliuzhongzhu return qid_in_pf; 3930c29d191Sliuzhongzhu } 3940c29d191Sliuzhongzhu 3959c3e7130Sliuzhongzhu static int hclgevf_get_pf_media_type(struct hclgevf_dev *hdev) 3969c3e7130Sliuzhongzhu { 397d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 39888d10bd6SJian Shen u8 resp_msg[2]; 3999c3e7130Sliuzhongzhu int ret; 4009c3e7130Sliuzhongzhu 401d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MEDIA_TYPE, 0); 402d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 403d3410018SYufeng Mo sizeof(resp_msg)); 4049c3e7130Sliuzhongzhu if (ret) { 4059c3e7130Sliuzhongzhu dev_err(&hdev->pdev->dev, 4069c3e7130Sliuzhongzhu "VF request to get the pf port media type failed %d", 4079c3e7130Sliuzhongzhu ret); 4089c3e7130Sliuzhongzhu return ret; 4099c3e7130Sliuzhongzhu } 4109c3e7130Sliuzhongzhu 41188d10bd6SJian Shen hdev->hw.mac.media_type = resp_msg[0]; 41288d10bd6SJian Shen hdev->hw.mac.module_type = resp_msg[1]; 4139c3e7130Sliuzhongzhu 4149c3e7130Sliuzhongzhu return 0; 4159c3e7130Sliuzhongzhu } 4169c3e7130Sliuzhongzhu 417e2cb1decSSalil Mehta static int hclgevf_alloc_tqps(struct hclgevf_dev *hdev) 418e2cb1decSSalil Mehta { 419e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 420e2cb1decSSalil Mehta int i; 421e2cb1decSSalil Mehta 422e2cb1decSSalil Mehta hdev->htqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps, 423e2cb1decSSalil Mehta sizeof(struct hclgevf_tqp), GFP_KERNEL); 424e2cb1decSSalil Mehta if (!hdev->htqp) 425e2cb1decSSalil Mehta return -ENOMEM; 426e2cb1decSSalil Mehta 427e2cb1decSSalil Mehta tqp = hdev->htqp; 428e2cb1decSSalil Mehta 429e2cb1decSSalil Mehta for (i = 0; i < hdev->num_tqps; i++) { 430e2cb1decSSalil Mehta tqp->dev = &hdev->pdev->dev; 431e2cb1decSSalil Mehta tqp->index = i; 432e2cb1decSSalil Mehta 433e2cb1decSSalil Mehta tqp->q.ae_algo = &ae_algovf; 434e2cb1decSSalil Mehta tqp->q.buf_size = hdev->rx_buf_len; 435c0425944SPeng Li tqp->q.tx_desc_num = hdev->num_tx_desc; 436c0425944SPeng Li tqp->q.rx_desc_num = hdev->num_rx_desc; 4379a5ef4aaSYonglong Liu 4389a5ef4aaSYonglong Liu /* need an extended offset to configure queues >= 4399a5ef4aaSYonglong Liu * HCLGEVF_TQP_MAX_SIZE_DEV_V2. 4409a5ef4aaSYonglong Liu */ 4419a5ef4aaSYonglong Liu if (i < HCLGEVF_TQP_MAX_SIZE_DEV_V2) 442076bb537SJie Wang tqp->q.io_base = hdev->hw.hw.io_base + 4439a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 444e2cb1decSSalil Mehta i * HCLGEVF_TQP_REG_SIZE; 4459a5ef4aaSYonglong Liu else 446076bb537SJie Wang tqp->q.io_base = hdev->hw.hw.io_base + 4479a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 4489a5ef4aaSYonglong Liu HCLGEVF_TQP_EXT_REG_OFFSET + 4499a5ef4aaSYonglong Liu (i - HCLGEVF_TQP_MAX_SIZE_DEV_V2) * 4509a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_SIZE; 451e2cb1decSSalil Mehta 452e2cb1decSSalil Mehta tqp++; 453e2cb1decSSalil Mehta } 454e2cb1decSSalil Mehta 455e2cb1decSSalil Mehta return 0; 456e2cb1decSSalil Mehta } 457e2cb1decSSalil Mehta 458e2cb1decSSalil Mehta static int hclgevf_knic_setup(struct hclgevf_dev *hdev) 459e2cb1decSSalil Mehta { 460e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 461e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo; 462e2cb1decSSalil Mehta u16 new_tqps = hdev->num_tqps; 463ebaf1908SWeihang Li unsigned int i; 46435244430SJian Shen u8 num_tc = 0; 465e2cb1decSSalil Mehta 466e2cb1decSSalil Mehta kinfo = &nic->kinfo; 467c0425944SPeng Li kinfo->num_tx_desc = hdev->num_tx_desc; 468c0425944SPeng Li kinfo->num_rx_desc = hdev->num_rx_desc; 469e2cb1decSSalil Mehta kinfo->rx_buf_len = hdev->rx_buf_len; 470*93969dc1SJie Wang for (i = 0; i < HCLGE_COMM_MAX_TC_NUM; i++) 471e2cb1decSSalil Mehta if (hdev->hw_tc_map & BIT(i)) 47235244430SJian Shen num_tc++; 473e2cb1decSSalil Mehta 47435244430SJian Shen num_tc = num_tc ? num_tc : 1; 47535244430SJian Shen kinfo->tc_info.num_tc = num_tc; 47635244430SJian Shen kinfo->rss_size = min_t(u16, hdev->rss_size_max, new_tqps / num_tc); 47735244430SJian Shen new_tqps = kinfo->rss_size * num_tc; 478e2cb1decSSalil Mehta kinfo->num_tqps = min(new_tqps, hdev->num_tqps); 479e2cb1decSSalil Mehta 480e2cb1decSSalil Mehta kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, 481e2cb1decSSalil Mehta sizeof(struct hnae3_queue *), GFP_KERNEL); 482e2cb1decSSalil Mehta if (!kinfo->tqp) 483e2cb1decSSalil Mehta return -ENOMEM; 484e2cb1decSSalil Mehta 485e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 486e2cb1decSSalil Mehta hdev->htqp[i].q.handle = &hdev->nic; 487e2cb1decSSalil Mehta hdev->htqp[i].q.tqp_index = i; 488e2cb1decSSalil Mehta kinfo->tqp[i] = &hdev->htqp[i].q; 489e2cb1decSSalil Mehta } 490e2cb1decSSalil Mehta 491580a05f9SYonglong Liu /* after init the max rss_size and tqps, adjust the default tqp numbers 492580a05f9SYonglong Liu * and rss size with the actual vector numbers 493580a05f9SYonglong Liu */ 494580a05f9SYonglong Liu kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); 49535244430SJian Shen kinfo->rss_size = min_t(u16, kinfo->num_tqps / num_tc, 496580a05f9SYonglong Liu kinfo->rss_size); 497580a05f9SYonglong Liu 498e2cb1decSSalil Mehta return 0; 499e2cb1decSSalil Mehta } 500e2cb1decSSalil Mehta 501e2cb1decSSalil Mehta static void hclgevf_request_link_info(struct hclgevf_dev *hdev) 502e2cb1decSSalil Mehta { 503d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 504e2cb1decSSalil Mehta int status; 505e2cb1decSSalil Mehta 506d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_STATUS, 0); 507d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 508e2cb1decSSalil Mehta if (status) 509e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 510e2cb1decSSalil Mehta "VF failed to fetch link status(%d) from PF", status); 511e2cb1decSSalil Mehta } 512e2cb1decSSalil Mehta 513e2cb1decSSalil Mehta void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state) 514e2cb1decSSalil Mehta { 51545e92b7eSPeng Li struct hnae3_handle *rhandle = &hdev->roce; 516e2cb1decSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 51745e92b7eSPeng Li struct hnae3_client *rclient; 518e2cb1decSSalil Mehta struct hnae3_client *client; 519e2cb1decSSalil Mehta 520ff200099SYunsheng Lin if (test_and_set_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state)) 521ff200099SYunsheng Lin return; 522ff200099SYunsheng Lin 523e2cb1decSSalil Mehta client = handle->client; 52445e92b7eSPeng Li rclient = hdev->roce_client; 525e2cb1decSSalil Mehta 526582d37bbSPeng Li link_state = 527582d37bbSPeng Li test_bit(HCLGEVF_STATE_DOWN, &hdev->state) ? 0 : link_state; 528e2cb1decSSalil Mehta if (link_state != hdev->hw.mac.link) { 529b15c072aSYonglong Liu hdev->hw.mac.link = link_state; 530e2cb1decSSalil Mehta client->ops->link_status_change(handle, !!link_state); 53145e92b7eSPeng Li if (rclient && rclient->ops->link_status_change) 53245e92b7eSPeng Li rclient->ops->link_status_change(rhandle, !!link_state); 533e2cb1decSSalil Mehta } 534ff200099SYunsheng Lin 535ff200099SYunsheng Lin clear_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state); 536e2cb1decSSalil Mehta } 537e2cb1decSSalil Mehta 538538abaf3SYueHaibing static void hclgevf_update_link_mode(struct hclgevf_dev *hdev) 5399194d18bSliuzhongzhu { 5409194d18bSliuzhongzhu #define HCLGEVF_ADVERTISING 0 5419194d18bSliuzhongzhu #define HCLGEVF_SUPPORTED 1 5429194d18bSliuzhongzhu 543d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 544d3410018SYufeng Mo 545d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_MODE, 0); 546d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_ADVERTISING; 547d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 548d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_SUPPORTED; 549d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 5509194d18bSliuzhongzhu } 5519194d18bSliuzhongzhu 552e2cb1decSSalil Mehta static int hclgevf_set_handle_info(struct hclgevf_dev *hdev) 553e2cb1decSSalil Mehta { 554e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 555e2cb1decSSalil Mehta int ret; 556e2cb1decSSalil Mehta 557e2cb1decSSalil Mehta nic->ae_algo = &ae_algovf; 558e2cb1decSSalil Mehta nic->pdev = hdev->pdev; 559e2cb1decSSalil Mehta nic->numa_node_mask = hdev->numa_node_mask; 560424eb834SSalil Mehta nic->flags |= HNAE3_SUPPORT_VF; 561076bb537SJie Wang nic->kinfo.io_base = hdev->hw.hw.io_base; 562e2cb1decSSalil Mehta 563e2cb1decSSalil Mehta ret = hclgevf_knic_setup(hdev); 564e2cb1decSSalil Mehta if (ret) 565e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF knic setup failed %d\n", 566e2cb1decSSalil Mehta ret); 567e2cb1decSSalil Mehta return ret; 568e2cb1decSSalil Mehta } 569e2cb1decSSalil Mehta 570e2cb1decSSalil Mehta static void hclgevf_free_vector(struct hclgevf_dev *hdev, int vector_id) 571e2cb1decSSalil Mehta { 57236cbbdf6SPeng Li if (hdev->vector_status[vector_id] == HCLGEVF_INVALID_VPORT) { 57336cbbdf6SPeng Li dev_warn(&hdev->pdev->dev, 57436cbbdf6SPeng Li "vector(vector_id %d) has been freed.\n", vector_id); 57536cbbdf6SPeng Li return; 57636cbbdf6SPeng Li } 57736cbbdf6SPeng Li 578e2cb1decSSalil Mehta hdev->vector_status[vector_id] = HCLGEVF_INVALID_VPORT; 579e2cb1decSSalil Mehta hdev->num_msi_left += 1; 580e2cb1decSSalil Mehta hdev->num_msi_used -= 1; 581e2cb1decSSalil Mehta } 582e2cb1decSSalil Mehta 583e2cb1decSSalil Mehta static int hclgevf_get_vector(struct hnae3_handle *handle, u16 vector_num, 584e2cb1decSSalil Mehta struct hnae3_vector_info *vector_info) 585e2cb1decSSalil Mehta { 586e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 587e2cb1decSSalil Mehta struct hnae3_vector_info *vector = vector_info; 588e2cb1decSSalil Mehta int alloc = 0; 589e2cb1decSSalil Mehta int i, j; 590e2cb1decSSalil Mehta 591580a05f9SYonglong Liu vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num); 592e2cb1decSSalil Mehta vector_num = min(hdev->num_msi_left, vector_num); 593e2cb1decSSalil Mehta 594e2cb1decSSalil Mehta for (j = 0; j < vector_num; j++) { 595e2cb1decSSalil Mehta for (i = HCLGEVF_MISC_VECTOR_NUM + 1; i < hdev->num_msi; i++) { 596e2cb1decSSalil Mehta if (hdev->vector_status[i] == HCLGEVF_INVALID_VPORT) { 597e2cb1decSSalil Mehta vector->vector = pci_irq_vector(hdev->pdev, i); 598076bb537SJie Wang vector->io_addr = hdev->hw.hw.io_base + 599e2cb1decSSalil Mehta HCLGEVF_VECTOR_REG_BASE + 600e2cb1decSSalil Mehta (i - 1) * HCLGEVF_VECTOR_REG_OFFSET; 601e2cb1decSSalil Mehta hdev->vector_status[i] = 0; 602e2cb1decSSalil Mehta hdev->vector_irq[i] = vector->vector; 603e2cb1decSSalil Mehta 604e2cb1decSSalil Mehta vector++; 605e2cb1decSSalil Mehta alloc++; 606e2cb1decSSalil Mehta 607e2cb1decSSalil Mehta break; 608e2cb1decSSalil Mehta } 609e2cb1decSSalil Mehta } 610e2cb1decSSalil Mehta } 611e2cb1decSSalil Mehta hdev->num_msi_left -= alloc; 612e2cb1decSSalil Mehta hdev->num_msi_used += alloc; 613e2cb1decSSalil Mehta 614e2cb1decSSalil Mehta return alloc; 615e2cb1decSSalil Mehta } 616e2cb1decSSalil Mehta 617e2cb1decSSalil Mehta static int hclgevf_get_vector_index(struct hclgevf_dev *hdev, int vector) 618e2cb1decSSalil Mehta { 619e2cb1decSSalil Mehta int i; 620e2cb1decSSalil Mehta 621e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 622e2cb1decSSalil Mehta if (vector == hdev->vector_irq[i]) 623e2cb1decSSalil Mehta return i; 624e2cb1decSSalil Mehta 625e2cb1decSSalil Mehta return -EINVAL; 626e2cb1decSSalil Mehta } 627e2cb1decSSalil Mehta 628a638b1d8SJian Shen /* for revision 0x20, vf shared the same rss config with pf */ 629a638b1d8SJian Shen static int hclgevf_get_rss_hash_key(struct hclgevf_dev *hdev) 630a638b1d8SJian Shen { 631a638b1d8SJian Shen #define HCLGEVF_RSS_MBX_RESP_LEN 8 632027733b1SJie Wang struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; 633a638b1d8SJian Shen u8 resp_msg[HCLGEVF_RSS_MBX_RESP_LEN]; 634d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 635a638b1d8SJian Shen u16 msg_num, hash_key_index; 636a638b1d8SJian Shen u8 index; 637a638b1d8SJian Shen int ret; 638a638b1d8SJian Shen 639d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_RSS_KEY, 0); 6407428d6c9SJie Wang msg_num = (HCLGE_COMM_RSS_KEY_SIZE + HCLGEVF_RSS_MBX_RESP_LEN - 1) / 641a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN; 642a638b1d8SJian Shen for (index = 0; index < msg_num; index++) { 643d3410018SYufeng Mo send_msg.data[0] = index; 644d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 645a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN); 646a638b1d8SJian Shen if (ret) { 647a638b1d8SJian Shen dev_err(&hdev->pdev->dev, 648a638b1d8SJian Shen "VF get rss hash key from PF failed, ret=%d", 649a638b1d8SJian Shen ret); 650a638b1d8SJian Shen return ret; 651a638b1d8SJian Shen } 652a638b1d8SJian Shen 653a638b1d8SJian Shen hash_key_index = HCLGEVF_RSS_MBX_RESP_LEN * index; 654a638b1d8SJian Shen if (index == msg_num - 1) 655a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 656a638b1d8SJian Shen &resp_msg[0], 6577428d6c9SJie Wang HCLGE_COMM_RSS_KEY_SIZE - hash_key_index); 658a638b1d8SJian Shen else 659a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 660a638b1d8SJian Shen &resp_msg[0], HCLGEVF_RSS_MBX_RESP_LEN); 661a638b1d8SJian Shen } 662a638b1d8SJian Shen 663a638b1d8SJian Shen return 0; 664a638b1d8SJian Shen } 665a638b1d8SJian Shen 666e2cb1decSSalil Mehta static int hclgevf_get_rss(struct hnae3_handle *handle, u32 *indir, u8 *key, 667e2cb1decSSalil Mehta u8 *hfunc) 668e2cb1decSSalil Mehta { 669e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 670027733b1SJie Wang struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; 6717428d6c9SJie Wang int ret; 672e2cb1decSSalil Mehta 673295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 6747428d6c9SJie Wang hclge_comm_get_rss_hash_info(rss_cfg, key, hfunc); 675a638b1d8SJian Shen } else { 676a638b1d8SJian Shen if (hfunc) 677a638b1d8SJian Shen *hfunc = ETH_RSS_HASH_TOP; 678a638b1d8SJian Shen if (key) { 679a638b1d8SJian Shen ret = hclgevf_get_rss_hash_key(hdev); 680a638b1d8SJian Shen if (ret) 681a638b1d8SJian Shen return ret; 682a638b1d8SJian Shen memcpy(key, rss_cfg->rss_hash_key, 6837428d6c9SJie Wang HCLGE_COMM_RSS_KEY_SIZE); 684a638b1d8SJian Shen } 685374ad291SJian Shen } 686374ad291SJian Shen 6877428d6c9SJie Wang hclge_comm_get_rss_indir_tbl(rss_cfg, indir, 6887428d6c9SJie Wang hdev->ae_dev->dev_specs.rss_ind_tbl_size); 689e2cb1decSSalil Mehta 690374ad291SJian Shen return 0; 691e2cb1decSSalil Mehta } 692e2cb1decSSalil Mehta 693e2cb1decSSalil Mehta static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir, 694e2cb1decSSalil Mehta const u8 *key, const u8 hfunc) 695e2cb1decSSalil Mehta { 696e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 697027733b1SJie Wang struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; 698374ad291SJian Shen int ret, i; 699374ad291SJian Shen 700295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 701*93969dc1SJie Wang ret = hclge_comm_set_rss_hash_key(rss_cfg, &hdev->hw.hw, key, 702*93969dc1SJie Wang hfunc); 703374ad291SJian Shen if (ret) 704374ad291SJian Shen return ret; 705374ad291SJian Shen } 706e2cb1decSSalil Mehta 707e2cb1decSSalil Mehta /* update the shadow RSS table with user specified qids */ 70887ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 709e2cb1decSSalil Mehta rss_cfg->rss_indirection_tbl[i] = indir[i]; 710e2cb1decSSalil Mehta 711e2cb1decSSalil Mehta /* update the hardware */ 7127428d6c9SJie Wang return hclge_comm_set_rss_indir_table(hdev->ae_dev, &hdev->hw.hw, 7137428d6c9SJie Wang rss_cfg->rss_indirection_tbl); 7145fd0e7b4SHuazhong Tan } 7155fd0e7b4SHuazhong Tan 7165fd0e7b4SHuazhong Tan static int hclgevf_set_rss_tuple(struct hnae3_handle *handle, 7175fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc) 7185fd0e7b4SHuazhong Tan { 7195fd0e7b4SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 7205fd0e7b4SHuazhong Tan int ret; 7215fd0e7b4SHuazhong Tan 7225fd0e7b4SHuazhong Tan if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 7235fd0e7b4SHuazhong Tan return -EOPNOTSUPP; 7245fd0e7b4SHuazhong Tan 725*93969dc1SJie Wang ret = hclge_comm_set_rss_tuple(hdev->ae_dev, &hdev->hw.hw, 726*93969dc1SJie Wang &hdev->rss_cfg, nfc); 727*93969dc1SJie Wang if (ret) 7285fd0e7b4SHuazhong Tan dev_err(&hdev->pdev->dev, 729*93969dc1SJie Wang "failed to set rss tuple, ret = %d.\n", ret); 7305fd0e7b4SHuazhong Tan 731d97b3072SJian Shen return ret; 732d97b3072SJian Shen } 733d97b3072SJian Shen 734d97b3072SJian Shen static int hclgevf_get_rss_tuple(struct hnae3_handle *handle, 735d97b3072SJian Shen struct ethtool_rxnfc *nfc) 736d97b3072SJian Shen { 737d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 738d97b3072SJian Shen u8 tuple_sets; 73973f7767eSJian Shen int ret; 740d97b3072SJian Shen 741295ba232SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 742d97b3072SJian Shen return -EOPNOTSUPP; 743d97b3072SJian Shen 744d97b3072SJian Shen nfc->data = 0; 745d97b3072SJian Shen 746027733b1SJie Wang ret = hclge_comm_get_rss_tuple(&hdev->rss_cfg, nfc->flow_type, 74773f7767eSJian Shen &tuple_sets); 74873f7767eSJian Shen if (ret || !tuple_sets) 74973f7767eSJian Shen return ret; 750d97b3072SJian Shen 7517428d6c9SJie Wang nfc->data = hclge_comm_convert_rss_tuple(tuple_sets); 752d97b3072SJian Shen 753d97b3072SJian Shen return 0; 754d97b3072SJian Shen } 755d97b3072SJian Shen 756e2cb1decSSalil Mehta static int hclgevf_get_tc_size(struct hnae3_handle *handle) 757e2cb1decSSalil Mehta { 758e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 759027733b1SJie Wang struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; 760e2cb1decSSalil Mehta 761e2cb1decSSalil Mehta return rss_cfg->rss_size; 762e2cb1decSSalil Mehta } 763e2cb1decSSalil Mehta 764e2cb1decSSalil Mehta static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en, 765b204bc74SPeng Li int vector_id, 766e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 767e2cb1decSSalil Mehta { 768e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 769d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 770e2cb1decSSalil Mehta struct hnae3_ring_chain_node *node; 771e2cb1decSSalil Mehta int status; 772d3410018SYufeng Mo int i = 0; 773e2cb1decSSalil Mehta 774d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 775d3410018SYufeng Mo send_msg.code = en ? HCLGE_MBX_MAP_RING_TO_VECTOR : 776c09ba484SPeng Li HCLGE_MBX_UNMAP_RING_TO_VECTOR; 777d3410018SYufeng Mo send_msg.vector_id = vector_id; 778e2cb1decSSalil Mehta 779e2cb1decSSalil Mehta for (node = ring_chain; node; node = node->next) { 780d3410018SYufeng Mo send_msg.param[i].ring_type = 781e4e87715SPeng Li hnae3_get_bit(node->flag, HNAE3_RING_TYPE_B); 782d3410018SYufeng Mo 783d3410018SYufeng Mo send_msg.param[i].tqp_index = node->tqp_index; 784d3410018SYufeng Mo send_msg.param[i].int_gl_index = 785d3410018SYufeng Mo hnae3_get_field(node->int_gl_idx, 78679eee410SFuyun Liang HNAE3_RING_GL_IDX_M, 78779eee410SFuyun Liang HNAE3_RING_GL_IDX_S); 78879eee410SFuyun Liang 7895d02a58dSYunsheng Lin i++; 790d3410018SYufeng Mo if (i == HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM || !node->next) { 791d3410018SYufeng Mo send_msg.ring_num = i; 792e2cb1decSSalil Mehta 793d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, 794d3410018SYufeng Mo NULL, 0); 795e2cb1decSSalil Mehta if (status) { 796e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 797e2cb1decSSalil Mehta "Map TQP fail, status is %d.\n", 798e2cb1decSSalil Mehta status); 799e2cb1decSSalil Mehta return status; 800e2cb1decSSalil Mehta } 801e2cb1decSSalil Mehta i = 0; 802e2cb1decSSalil Mehta } 803e2cb1decSSalil Mehta } 804e2cb1decSSalil Mehta 805e2cb1decSSalil Mehta return 0; 806e2cb1decSSalil Mehta } 807e2cb1decSSalil Mehta 808e2cb1decSSalil Mehta static int hclgevf_map_ring_to_vector(struct hnae3_handle *handle, int vector, 809e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 810e2cb1decSSalil Mehta { 811b204bc74SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 812b204bc74SPeng Li int vector_id; 813b204bc74SPeng Li 814b204bc74SPeng Li vector_id = hclgevf_get_vector_index(hdev, vector); 815b204bc74SPeng Li if (vector_id < 0) { 816b204bc74SPeng Li dev_err(&handle->pdev->dev, 817b204bc74SPeng Li "Get vector index fail. ret =%d\n", vector_id); 818b204bc74SPeng Li return vector_id; 819b204bc74SPeng Li } 820b204bc74SPeng Li 821b204bc74SPeng Li return hclgevf_bind_ring_to_vector(handle, true, vector_id, ring_chain); 822e2cb1decSSalil Mehta } 823e2cb1decSSalil Mehta 824e2cb1decSSalil Mehta static int hclgevf_unmap_ring_from_vector( 825e2cb1decSSalil Mehta struct hnae3_handle *handle, 826e2cb1decSSalil Mehta int vector, 827e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 828e2cb1decSSalil Mehta { 829e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 830e2cb1decSSalil Mehta int ret, vector_id; 831e2cb1decSSalil Mehta 832dea846e8SHuazhong Tan if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) 833dea846e8SHuazhong Tan return 0; 834dea846e8SHuazhong Tan 835e2cb1decSSalil Mehta vector_id = hclgevf_get_vector_index(hdev, vector); 836e2cb1decSSalil Mehta if (vector_id < 0) { 837e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 838e2cb1decSSalil Mehta "Get vector index fail. ret =%d\n", vector_id); 839e2cb1decSSalil Mehta return vector_id; 840e2cb1decSSalil Mehta } 841e2cb1decSSalil Mehta 842b204bc74SPeng Li ret = hclgevf_bind_ring_to_vector(handle, false, vector_id, ring_chain); 8430d3e6631SYunsheng Lin if (ret) 844e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 845e2cb1decSSalil Mehta "Unmap ring from vector fail. vector=%d, ret =%d\n", 846e2cb1decSSalil Mehta vector_id, 847e2cb1decSSalil Mehta ret); 8480d3e6631SYunsheng Lin 849e2cb1decSSalil Mehta return ret; 850e2cb1decSSalil Mehta } 851e2cb1decSSalil Mehta 8520d3e6631SYunsheng Lin static int hclgevf_put_vector(struct hnae3_handle *handle, int vector) 8530d3e6631SYunsheng Lin { 8540d3e6631SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 85503718db9SYunsheng Lin int vector_id; 8560d3e6631SYunsheng Lin 85703718db9SYunsheng Lin vector_id = hclgevf_get_vector_index(hdev, vector); 85803718db9SYunsheng Lin if (vector_id < 0) { 85903718db9SYunsheng Lin dev_err(&handle->pdev->dev, 86003718db9SYunsheng Lin "hclgevf_put_vector get vector index fail. ret =%d\n", 86103718db9SYunsheng Lin vector_id); 86203718db9SYunsheng Lin return vector_id; 86303718db9SYunsheng Lin } 86403718db9SYunsheng Lin 86503718db9SYunsheng Lin hclgevf_free_vector(hdev, vector_id); 866e2cb1decSSalil Mehta 867e2cb1decSSalil Mehta return 0; 868e2cb1decSSalil Mehta } 869e2cb1decSSalil Mehta 8703b75c3dfSPeng Li static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev *hdev, 871e196ec75SJian Shen bool en_uc_pmc, bool en_mc_pmc, 872f01f5559SJian Shen bool en_bc_pmc) 873e2cb1decSSalil Mehta { 8745e7414cdSJian Shen struct hnae3_handle *handle = &hdev->nic; 875d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 876f01f5559SJian Shen int ret; 877e2cb1decSSalil Mehta 878d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 879d3410018SYufeng Mo send_msg.code = HCLGE_MBX_SET_PROMISC_MODE; 880d3410018SYufeng Mo send_msg.en_bc = en_bc_pmc ? 1 : 0; 881d3410018SYufeng Mo send_msg.en_uc = en_uc_pmc ? 1 : 0; 882d3410018SYufeng Mo send_msg.en_mc = en_mc_pmc ? 1 : 0; 8835e7414cdSJian Shen send_msg.en_limit_promisc = test_bit(HNAE3_PFLAG_LIMIT_PROMISC, 8845e7414cdSJian Shen &handle->priv_flags) ? 1 : 0; 885e2cb1decSSalil Mehta 886d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 887f01f5559SJian Shen if (ret) 888e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 889f01f5559SJian Shen "Set promisc mode fail, status is %d.\n", ret); 890e2cb1decSSalil Mehta 891f01f5559SJian Shen return ret; 892e2cb1decSSalil Mehta } 893e2cb1decSSalil Mehta 894e196ec75SJian Shen static int hclgevf_set_promisc_mode(struct hnae3_handle *handle, bool en_uc_pmc, 895e196ec75SJian Shen bool en_mc_pmc) 896e2cb1decSSalil Mehta { 897e196ec75SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 898e196ec75SJian Shen bool en_bc_pmc; 899e196ec75SJian Shen 900295ba232SGuangbin Huang en_bc_pmc = hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2; 901e196ec75SJian Shen 902e196ec75SJian Shen return hclgevf_cmd_set_promisc_mode(hdev, en_uc_pmc, en_mc_pmc, 903e196ec75SJian Shen en_bc_pmc); 904e2cb1decSSalil Mehta } 905e2cb1decSSalil Mehta 906c631c696SJian Shen static void hclgevf_request_update_promisc_mode(struct hnae3_handle *handle) 907c631c696SJian Shen { 908c631c696SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 909c631c696SJian Shen 910c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 9115e7414cdSJian Shen hclgevf_task_schedule(hdev, 0); 912c631c696SJian Shen } 913c631c696SJian Shen 914c631c696SJian Shen static void hclgevf_sync_promisc_mode(struct hclgevf_dev *hdev) 915c631c696SJian Shen { 916c631c696SJian Shen struct hnae3_handle *handle = &hdev->nic; 917c631c696SJian Shen bool en_uc_pmc = handle->netdev_flags & HNAE3_UPE; 918c631c696SJian Shen bool en_mc_pmc = handle->netdev_flags & HNAE3_MPE; 919c631c696SJian Shen int ret; 920c631c696SJian Shen 921c631c696SJian Shen if (test_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state)) { 922c631c696SJian Shen ret = hclgevf_set_promisc_mode(handle, en_uc_pmc, en_mc_pmc); 923c631c696SJian Shen if (!ret) 924c631c696SJian Shen clear_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 925c631c696SJian Shen } 926c631c696SJian Shen } 927c631c696SJian Shen 9288fa86551SYufeng Mo static int hclgevf_tqp_enable_cmd_send(struct hclgevf_dev *hdev, u16 tqp_id, 9298fa86551SYufeng Mo u16 stream_id, bool enable) 930e2cb1decSSalil Mehta { 931e2cb1decSSalil Mehta struct hclgevf_cfg_com_tqp_queue_cmd *req; 9326befad60SJie Wang struct hclge_desc desc; 933e2cb1decSSalil Mehta 934e2cb1decSSalil Mehta req = (struct hclgevf_cfg_com_tqp_queue_cmd *)desc.data; 935e2cb1decSSalil Mehta 936e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_CFG_COM_TQP_QUEUE, 937e2cb1decSSalil Mehta false); 938e2cb1decSSalil Mehta req->tqp_id = cpu_to_le16(tqp_id & HCLGEVF_RING_ID_MASK); 939e2cb1decSSalil Mehta req->stream_id = cpu_to_le16(stream_id); 940ebaf1908SWeihang Li if (enable) 941ebaf1908SWeihang Li req->enable |= 1U << HCLGEVF_TQP_ENABLE_B; 942e2cb1decSSalil Mehta 9438fa86551SYufeng Mo return hclgevf_cmd_send(&hdev->hw, &desc, 1); 9448fa86551SYufeng Mo } 945e2cb1decSSalil Mehta 9468fa86551SYufeng Mo static int hclgevf_tqp_enable(struct hnae3_handle *handle, bool enable) 9478fa86551SYufeng Mo { 9488fa86551SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 9498fa86551SYufeng Mo int ret; 9508fa86551SYufeng Mo u16 i; 9518fa86551SYufeng Mo 9528fa86551SYufeng Mo for (i = 0; i < handle->kinfo.num_tqps; i++) { 9538fa86551SYufeng Mo ret = hclgevf_tqp_enable_cmd_send(hdev, i, 0, enable); 9548fa86551SYufeng Mo if (ret) 9558fa86551SYufeng Mo return ret; 9568fa86551SYufeng Mo } 9578fa86551SYufeng Mo 9588fa86551SYufeng Mo return 0; 959e2cb1decSSalil Mehta } 960e2cb1decSSalil Mehta 961e2cb1decSSalil Mehta static void hclgevf_reset_tqp_stats(struct hnae3_handle *handle) 962e2cb1decSSalil Mehta { 963b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 964e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 965e2cb1decSSalil Mehta int i; 966e2cb1decSSalil Mehta 967b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 968b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 969e2cb1decSSalil Mehta memset(&tqp->tqp_stats, 0, sizeof(tqp->tqp_stats)); 970e2cb1decSSalil Mehta } 971e2cb1decSSalil Mehta } 972e2cb1decSSalil Mehta 9738e6de441SHuazhong Tan static int hclgevf_get_host_mac_addr(struct hclgevf_dev *hdev, u8 *p) 9748e6de441SHuazhong Tan { 975d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 9768e6de441SHuazhong Tan u8 host_mac[ETH_ALEN]; 9778e6de441SHuazhong Tan int status; 9788e6de441SHuazhong Tan 979d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MAC_ADDR, 0); 980d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, host_mac, 981d3410018SYufeng Mo ETH_ALEN); 9828e6de441SHuazhong Tan if (status) { 9838e6de441SHuazhong Tan dev_err(&hdev->pdev->dev, 9848e6de441SHuazhong Tan "fail to get VF MAC from host %d", status); 9858e6de441SHuazhong Tan return status; 9868e6de441SHuazhong Tan } 9878e6de441SHuazhong Tan 9888e6de441SHuazhong Tan ether_addr_copy(p, host_mac); 9898e6de441SHuazhong Tan 9908e6de441SHuazhong Tan return 0; 9918e6de441SHuazhong Tan } 9928e6de441SHuazhong Tan 993e2cb1decSSalil Mehta static void hclgevf_get_mac_addr(struct hnae3_handle *handle, u8 *p) 994e2cb1decSSalil Mehta { 995e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 9968e6de441SHuazhong Tan u8 host_mac_addr[ETH_ALEN]; 997e2cb1decSSalil Mehta 9988e6de441SHuazhong Tan if (hclgevf_get_host_mac_addr(hdev, host_mac_addr)) 9998e6de441SHuazhong Tan return; 10008e6de441SHuazhong Tan 10018e6de441SHuazhong Tan hdev->has_pf_mac = !is_zero_ether_addr(host_mac_addr); 10028e6de441SHuazhong Tan if (hdev->has_pf_mac) 10038e6de441SHuazhong Tan ether_addr_copy(p, host_mac_addr); 10048e6de441SHuazhong Tan else 1005e2cb1decSSalil Mehta ether_addr_copy(p, hdev->hw.mac.mac_addr); 1006e2cb1decSSalil Mehta } 1007e2cb1decSSalil Mehta 100876660757SJakub Kicinski static int hclgevf_set_mac_addr(struct hnae3_handle *handle, const void *p, 100959098055SFuyun Liang bool is_first) 1010e2cb1decSSalil Mehta { 1011e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1012e2cb1decSSalil Mehta u8 *old_mac_addr = (u8 *)hdev->hw.mac.mac_addr; 1013d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1014e2cb1decSSalil Mehta u8 *new_mac_addr = (u8 *)p; 1015e2cb1decSSalil Mehta int status; 1016e2cb1decSSalil Mehta 1017d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_UNICAST, 0); 1018ee4bcd3bSJian Shen send_msg.subcode = HCLGE_MBX_MAC_VLAN_UC_MODIFY; 1019d3410018SYufeng Mo ether_addr_copy(send_msg.data, new_mac_addr); 1020ee4bcd3bSJian Shen if (is_first && !hdev->has_pf_mac) 1021ee4bcd3bSJian Shen eth_zero_addr(&send_msg.data[ETH_ALEN]); 1022ee4bcd3bSJian Shen else 1023d3410018SYufeng Mo ether_addr_copy(&send_msg.data[ETH_ALEN], old_mac_addr); 1024d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1025e2cb1decSSalil Mehta if (!status) 1026e2cb1decSSalil Mehta ether_addr_copy(hdev->hw.mac.mac_addr, new_mac_addr); 1027e2cb1decSSalil Mehta 1028e2cb1decSSalil Mehta return status; 1029e2cb1decSSalil Mehta } 1030e2cb1decSSalil Mehta 1031ee4bcd3bSJian Shen static struct hclgevf_mac_addr_node * 1032ee4bcd3bSJian Shen hclgevf_find_mac_node(struct list_head *list, const u8 *mac_addr) 1033ee4bcd3bSJian Shen { 1034ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1035ee4bcd3bSJian Shen 1036ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) 1037ee4bcd3bSJian Shen if (ether_addr_equal(mac_addr, mac_node->mac_addr)) 1038ee4bcd3bSJian Shen return mac_node; 1039ee4bcd3bSJian Shen 1040ee4bcd3bSJian Shen return NULL; 1041ee4bcd3bSJian Shen } 1042ee4bcd3bSJian Shen 1043ee4bcd3bSJian Shen static void hclgevf_update_mac_node(struct hclgevf_mac_addr_node *mac_node, 1044ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state) 1045ee4bcd3bSJian Shen { 1046ee4bcd3bSJian Shen switch (state) { 1047ee4bcd3bSJian Shen /* from set_rx_mode or tmp_add_list */ 1048ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1049ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_DEL) 1050ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1051ee4bcd3bSJian Shen break; 1052ee4bcd3bSJian Shen /* only from set_rx_mode */ 1053ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 1054ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1055ee4bcd3bSJian Shen list_del(&mac_node->node); 1056ee4bcd3bSJian Shen kfree(mac_node); 1057ee4bcd3bSJian Shen } else { 1058ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 1059ee4bcd3bSJian Shen } 1060ee4bcd3bSJian Shen break; 1061ee4bcd3bSJian Shen /* only from tmp_add_list, the mac_node->state won't be 1062ee4bcd3bSJian Shen * HCLGEVF_MAC_ACTIVE 1063ee4bcd3bSJian Shen */ 1064ee4bcd3bSJian Shen case HCLGEVF_MAC_ACTIVE: 1065ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1066ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1067ee4bcd3bSJian Shen break; 1068ee4bcd3bSJian Shen } 1069ee4bcd3bSJian Shen } 1070ee4bcd3bSJian Shen 1071ee4bcd3bSJian Shen static int hclgevf_update_mac_list(struct hnae3_handle *handle, 1072ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state, 1073ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type, 1074e2cb1decSSalil Mehta const unsigned char *addr) 1075e2cb1decSSalil Mehta { 1076e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1077ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node; 1078ee4bcd3bSJian Shen struct list_head *list; 1079e2cb1decSSalil Mehta 1080ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1081ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1082ee4bcd3bSJian Shen 1083ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1084ee4bcd3bSJian Shen 1085ee4bcd3bSJian Shen /* if the mac addr is already in the mac list, no need to add a new 1086ee4bcd3bSJian Shen * one into it, just check the mac addr state, convert it to a new 1087ee4bcd3bSJian Shen * new state, or just remove it, or do nothing. 1088ee4bcd3bSJian Shen */ 1089ee4bcd3bSJian Shen mac_node = hclgevf_find_mac_node(list, addr); 1090ee4bcd3bSJian Shen if (mac_node) { 1091ee4bcd3bSJian Shen hclgevf_update_mac_node(mac_node, state); 1092ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1093ee4bcd3bSJian Shen return 0; 1094ee4bcd3bSJian Shen } 1095ee4bcd3bSJian Shen /* if this address is never added, unnecessary to delete */ 1096ee4bcd3bSJian Shen if (state == HCLGEVF_MAC_TO_DEL) { 1097ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1098ee4bcd3bSJian Shen return -ENOENT; 1099ee4bcd3bSJian Shen } 1100ee4bcd3bSJian Shen 1101ee4bcd3bSJian Shen mac_node = kzalloc(sizeof(*mac_node), GFP_ATOMIC); 1102ee4bcd3bSJian Shen if (!mac_node) { 1103ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1104ee4bcd3bSJian Shen return -ENOMEM; 1105ee4bcd3bSJian Shen } 1106ee4bcd3bSJian Shen 1107ee4bcd3bSJian Shen mac_node->state = state; 1108ee4bcd3bSJian Shen ether_addr_copy(mac_node->mac_addr, addr); 1109ee4bcd3bSJian Shen list_add_tail(&mac_node->node, list); 1110ee4bcd3bSJian Shen 1111ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1112ee4bcd3bSJian Shen return 0; 1113ee4bcd3bSJian Shen } 1114ee4bcd3bSJian Shen 1115ee4bcd3bSJian Shen static int hclgevf_add_uc_addr(struct hnae3_handle *handle, 1116ee4bcd3bSJian Shen const unsigned char *addr) 1117ee4bcd3bSJian Shen { 1118ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1119ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1120e2cb1decSSalil Mehta } 1121e2cb1decSSalil Mehta 1122e2cb1decSSalil Mehta static int hclgevf_rm_uc_addr(struct hnae3_handle *handle, 1123e2cb1decSSalil Mehta const unsigned char *addr) 1124e2cb1decSSalil Mehta { 1125ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1126ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1127e2cb1decSSalil Mehta } 1128e2cb1decSSalil Mehta 1129e2cb1decSSalil Mehta static int hclgevf_add_mc_addr(struct hnae3_handle *handle, 1130e2cb1decSSalil Mehta const unsigned char *addr) 1131e2cb1decSSalil Mehta { 1132ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1133ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1134e2cb1decSSalil Mehta } 1135e2cb1decSSalil Mehta 1136e2cb1decSSalil Mehta static int hclgevf_rm_mc_addr(struct hnae3_handle *handle, 1137e2cb1decSSalil Mehta const unsigned char *addr) 1138e2cb1decSSalil Mehta { 1139ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1140ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1141ee4bcd3bSJian Shen } 1142e2cb1decSSalil Mehta 1143ee4bcd3bSJian Shen static int hclgevf_add_del_mac_addr(struct hclgevf_dev *hdev, 1144ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, 1145ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1146ee4bcd3bSJian Shen { 1147ee4bcd3bSJian Shen struct hclge_vf_to_pf_msg send_msg; 1148ee4bcd3bSJian Shen u8 code, subcode; 1149ee4bcd3bSJian Shen 1150ee4bcd3bSJian Shen if (mac_type == HCLGEVF_MAC_ADDR_UC) { 1151ee4bcd3bSJian Shen code = HCLGE_MBX_SET_UNICAST; 1152ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1153ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_ADD; 1154ee4bcd3bSJian Shen else 1155ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_REMOVE; 1156ee4bcd3bSJian Shen } else { 1157ee4bcd3bSJian Shen code = HCLGE_MBX_SET_MULTICAST; 1158ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1159ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_ADD; 1160ee4bcd3bSJian Shen else 1161ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_REMOVE; 1162ee4bcd3bSJian Shen } 1163ee4bcd3bSJian Shen 1164ee4bcd3bSJian Shen hclgevf_build_send_msg(&send_msg, code, subcode); 1165ee4bcd3bSJian Shen ether_addr_copy(send_msg.data, mac_node->mac_addr); 1166d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1167e2cb1decSSalil Mehta } 1168e2cb1decSSalil Mehta 1169ee4bcd3bSJian Shen static void hclgevf_config_mac_list(struct hclgevf_dev *hdev, 1170ee4bcd3bSJian Shen struct list_head *list, 1171ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1172ee4bcd3bSJian Shen { 11734f331fdaSYufeng Mo char format_mac_addr[HNAE3_FORMAT_MAC_ADDR_LEN]; 1174ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1175ee4bcd3bSJian Shen int ret; 1176ee4bcd3bSJian Shen 1177ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1178ee4bcd3bSJian Shen ret = hclgevf_add_del_mac_addr(hdev, mac_node, mac_type); 1179ee4bcd3bSJian Shen if (ret) { 11804f331fdaSYufeng Mo hnae3_format_mac_addr(format_mac_addr, 11814f331fdaSYufeng Mo mac_node->mac_addr); 1182ee4bcd3bSJian Shen dev_err(&hdev->pdev->dev, 11834f331fdaSYufeng Mo "failed to configure mac %s, state = %d, ret = %d\n", 11844f331fdaSYufeng Mo format_mac_addr, mac_node->state, ret); 1185ee4bcd3bSJian Shen return; 1186ee4bcd3bSJian Shen } 1187ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1188ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1189ee4bcd3bSJian Shen } else { 1190ee4bcd3bSJian Shen list_del(&mac_node->node); 1191ee4bcd3bSJian Shen kfree(mac_node); 1192ee4bcd3bSJian Shen } 1193ee4bcd3bSJian Shen } 1194ee4bcd3bSJian Shen } 1195ee4bcd3bSJian Shen 1196ee4bcd3bSJian Shen static void hclgevf_sync_from_add_list(struct list_head *add_list, 1197ee4bcd3bSJian Shen struct list_head *mac_list) 1198ee4bcd3bSJian Shen { 1199ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1200ee4bcd3bSJian Shen 1201ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, add_list, node) { 1202ee4bcd3bSJian Shen /* if the mac address from tmp_add_list is not in the 1203ee4bcd3bSJian Shen * uc/mc_mac_list, it means have received a TO_DEL request 1204ee4bcd3bSJian Shen * during the time window of sending mac config request to PF 1205ee4bcd3bSJian Shen * If mac_node state is ACTIVE, then change its state to TO_DEL, 1206ee4bcd3bSJian Shen * then it will be removed at next time. If is TO_ADD, it means 1207ee4bcd3bSJian Shen * send TO_ADD request failed, so just remove the mac node. 1208ee4bcd3bSJian Shen */ 1209ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1210ee4bcd3bSJian Shen if (new_node) { 1211ee4bcd3bSJian Shen hclgevf_update_mac_node(new_node, mac_node->state); 1212ee4bcd3bSJian Shen list_del(&mac_node->node); 1213ee4bcd3bSJian Shen kfree(mac_node); 1214ee4bcd3bSJian Shen } else if (mac_node->state == HCLGEVF_MAC_ACTIVE) { 1215ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 121649768ce9SBaokun Li list_move_tail(&mac_node->node, mac_list); 1217ee4bcd3bSJian Shen } else { 1218ee4bcd3bSJian Shen list_del(&mac_node->node); 1219ee4bcd3bSJian Shen kfree(mac_node); 1220ee4bcd3bSJian Shen } 1221ee4bcd3bSJian Shen } 1222ee4bcd3bSJian Shen } 1223ee4bcd3bSJian Shen 1224ee4bcd3bSJian Shen static void hclgevf_sync_from_del_list(struct list_head *del_list, 1225ee4bcd3bSJian Shen struct list_head *mac_list) 1226ee4bcd3bSJian Shen { 1227ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1228ee4bcd3bSJian Shen 1229ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, del_list, node) { 1230ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1231ee4bcd3bSJian Shen if (new_node) { 1232ee4bcd3bSJian Shen /* If the mac addr is exist in the mac list, it means 1233ee4bcd3bSJian Shen * received a new request TO_ADD during the time window 1234ee4bcd3bSJian Shen * of sending mac addr configurrequest to PF, so just 1235ee4bcd3bSJian Shen * change the mac state to ACTIVE. 1236ee4bcd3bSJian Shen */ 1237ee4bcd3bSJian Shen new_node->state = HCLGEVF_MAC_ACTIVE; 1238ee4bcd3bSJian Shen list_del(&mac_node->node); 1239ee4bcd3bSJian Shen kfree(mac_node); 1240ee4bcd3bSJian Shen } else { 124149768ce9SBaokun Li list_move_tail(&mac_node->node, mac_list); 1242ee4bcd3bSJian Shen } 1243ee4bcd3bSJian Shen } 1244ee4bcd3bSJian Shen } 1245ee4bcd3bSJian Shen 1246ee4bcd3bSJian Shen static void hclgevf_clear_list(struct list_head *list) 1247ee4bcd3bSJian Shen { 1248ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1249ee4bcd3bSJian Shen 1250ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1251ee4bcd3bSJian Shen list_del(&mac_node->node); 1252ee4bcd3bSJian Shen kfree(mac_node); 1253ee4bcd3bSJian Shen } 1254ee4bcd3bSJian Shen } 1255ee4bcd3bSJian Shen 1256ee4bcd3bSJian Shen static void hclgevf_sync_mac_list(struct hclgevf_dev *hdev, 1257ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1258ee4bcd3bSJian Shen { 1259ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1260ee4bcd3bSJian Shen struct list_head tmp_add_list, tmp_del_list; 1261ee4bcd3bSJian Shen struct list_head *list; 1262ee4bcd3bSJian Shen 1263ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_add_list); 1264ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_del_list); 1265ee4bcd3bSJian Shen 1266ee4bcd3bSJian Shen /* move the mac addr to the tmp_add_list and tmp_del_list, then 1267ee4bcd3bSJian Shen * we can add/delete these mac addr outside the spin lock 1268ee4bcd3bSJian Shen */ 1269ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1270ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1271ee4bcd3bSJian Shen 1272ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1273ee4bcd3bSJian Shen 1274ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1275ee4bcd3bSJian Shen switch (mac_node->state) { 1276ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 127749768ce9SBaokun Li list_move_tail(&mac_node->node, &tmp_del_list); 1278ee4bcd3bSJian Shen break; 1279ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1280ee4bcd3bSJian Shen new_node = kzalloc(sizeof(*new_node), GFP_ATOMIC); 1281ee4bcd3bSJian Shen if (!new_node) 1282ee4bcd3bSJian Shen goto stop_traverse; 1283ee4bcd3bSJian Shen 1284ee4bcd3bSJian Shen ether_addr_copy(new_node->mac_addr, mac_node->mac_addr); 1285ee4bcd3bSJian Shen new_node->state = mac_node->state; 1286ee4bcd3bSJian Shen list_add_tail(&new_node->node, &tmp_add_list); 1287ee4bcd3bSJian Shen break; 1288ee4bcd3bSJian Shen default: 1289ee4bcd3bSJian Shen break; 1290ee4bcd3bSJian Shen } 1291ee4bcd3bSJian Shen } 1292ee4bcd3bSJian Shen 1293ee4bcd3bSJian Shen stop_traverse: 1294ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1295ee4bcd3bSJian Shen 1296ee4bcd3bSJian Shen /* delete first, in order to get max mac table space for adding */ 1297ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_del_list, mac_type); 1298ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_add_list, mac_type); 1299ee4bcd3bSJian Shen 1300ee4bcd3bSJian Shen /* if some mac addresses were added/deleted fail, move back to the 1301ee4bcd3bSJian Shen * mac_list, and retry at next time. 1302ee4bcd3bSJian Shen */ 1303ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1304ee4bcd3bSJian Shen 1305ee4bcd3bSJian Shen hclgevf_sync_from_del_list(&tmp_del_list, list); 1306ee4bcd3bSJian Shen hclgevf_sync_from_add_list(&tmp_add_list, list); 1307ee4bcd3bSJian Shen 1308ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1309ee4bcd3bSJian Shen } 1310ee4bcd3bSJian Shen 1311ee4bcd3bSJian Shen static void hclgevf_sync_mac_table(struct hclgevf_dev *hdev) 1312ee4bcd3bSJian Shen { 1313ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_UC); 1314ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_MC); 1315ee4bcd3bSJian Shen } 1316ee4bcd3bSJian Shen 1317ee4bcd3bSJian Shen static void hclgevf_uninit_mac_list(struct hclgevf_dev *hdev) 1318ee4bcd3bSJian Shen { 1319ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1320ee4bcd3bSJian Shen 1321ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.uc_mac_list); 1322ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.mc_mac_list); 1323ee4bcd3bSJian Shen 1324ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1325ee4bcd3bSJian Shen } 1326ee4bcd3bSJian Shen 1327fa6a262aSJian Shen static int hclgevf_enable_vlan_filter(struct hnae3_handle *handle, bool enable) 1328fa6a262aSJian Shen { 1329fa6a262aSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1330fa6a262aSJian Shen struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 1331fa6a262aSJian Shen struct hclge_vf_to_pf_msg send_msg; 1332fa6a262aSJian Shen 1333fa6a262aSJian Shen if (!test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) 1334fa6a262aSJian Shen return -EOPNOTSUPP; 1335fa6a262aSJian Shen 1336fa6a262aSJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1337fa6a262aSJian Shen HCLGE_MBX_ENABLE_VLAN_FILTER); 1338fa6a262aSJian Shen send_msg.data[0] = enable ? 1 : 0; 1339fa6a262aSJian Shen 1340fa6a262aSJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1341fa6a262aSJian Shen } 1342fa6a262aSJian Shen 1343e2cb1decSSalil Mehta static int hclgevf_set_vlan_filter(struct hnae3_handle *handle, 1344e2cb1decSSalil Mehta __be16 proto, u16 vlan_id, 1345e2cb1decSSalil Mehta bool is_kill) 1346e2cb1decSSalil Mehta { 1347d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_IS_KILL_OFFSET 0 1348d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET 1 1349d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_PROTO_OFFSET 3 1350d3410018SYufeng Mo 1351e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1352d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1353fe4144d4SJian Shen int ret; 1354e2cb1decSSalil Mehta 1355b37ce587SYufeng Mo if (vlan_id > HCLGEVF_MAX_VLAN_ID) 1356e2cb1decSSalil Mehta return -EINVAL; 1357e2cb1decSSalil Mehta 1358e2cb1decSSalil Mehta if (proto != htons(ETH_P_8021Q)) 1359e2cb1decSSalil Mehta return -EPROTONOSUPPORT; 1360e2cb1decSSalil Mehta 1361b7b5d25bSGuojia Liao /* When device is resetting or reset failed, firmware is unable to 1362b7b5d25bSGuojia Liao * handle mailbox. Just record the vlan id, and remove it after 1363fe4144d4SJian Shen * reset finished. 1364fe4144d4SJian Shen */ 1365b7b5d25bSGuojia Liao if ((test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 1366b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) { 1367fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1368fe4144d4SJian Shen return -EBUSY; 1369fe4144d4SJian Shen } 1370fe4144d4SJian Shen 1371d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1372d3410018SYufeng Mo HCLGE_MBX_VLAN_FILTER); 1373d3410018SYufeng Mo send_msg.data[HCLGEVF_VLAN_MBX_IS_KILL_OFFSET] = is_kill; 1374d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET], &vlan_id, 1375d3410018SYufeng Mo sizeof(vlan_id)); 1376d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_PROTO_OFFSET], &proto, 1377d3410018SYufeng Mo sizeof(proto)); 137846ee7350SGuojia Liao /* when remove hw vlan filter failed, record the vlan id, 1379fe4144d4SJian Shen * and try to remove it from hw later, to be consistence 1380fe4144d4SJian Shen * with stack. 1381fe4144d4SJian Shen */ 1382d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1383fe4144d4SJian Shen if (is_kill && ret) 1384fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1385fe4144d4SJian Shen 1386fe4144d4SJian Shen return ret; 1387fe4144d4SJian Shen } 1388fe4144d4SJian Shen 1389fe4144d4SJian Shen static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev) 1390fe4144d4SJian Shen { 1391fe4144d4SJian Shen #define HCLGEVF_MAX_SYNC_COUNT 60 1392fe4144d4SJian Shen struct hnae3_handle *handle = &hdev->nic; 1393fe4144d4SJian Shen int ret, sync_cnt = 0; 1394fe4144d4SJian Shen u16 vlan_id; 1395fe4144d4SJian Shen 1396fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1397fe4144d4SJian Shen while (vlan_id != VLAN_N_VID) { 1398fe4144d4SJian Shen ret = hclgevf_set_vlan_filter(handle, htons(ETH_P_8021Q), 1399fe4144d4SJian Shen vlan_id, true); 1400fe4144d4SJian Shen if (ret) 1401fe4144d4SJian Shen return; 1402fe4144d4SJian Shen 1403fe4144d4SJian Shen clear_bit(vlan_id, hdev->vlan_del_fail_bmap); 1404fe4144d4SJian Shen sync_cnt++; 1405fe4144d4SJian Shen if (sync_cnt >= HCLGEVF_MAX_SYNC_COUNT) 1406fe4144d4SJian Shen return; 1407fe4144d4SJian Shen 1408fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1409fe4144d4SJian Shen } 1410e2cb1decSSalil Mehta } 1411e2cb1decSSalil Mehta 1412b2641e2aSYunsheng Lin static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) 1413b2641e2aSYunsheng Lin { 1414b2641e2aSYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1415d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1416b2641e2aSYunsheng Lin 1417d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1418d3410018SYufeng Mo HCLGE_MBX_VLAN_RX_OFF_CFG); 1419d3410018SYufeng Mo send_msg.data[0] = enable ? 1 : 0; 1420d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1421b2641e2aSYunsheng Lin } 1422b2641e2aSYunsheng Lin 14238fa86551SYufeng Mo static int hclgevf_reset_tqp(struct hnae3_handle *handle) 1424e2cb1decSSalil Mehta { 14258fa86551SYufeng Mo #define HCLGEVF_RESET_ALL_QUEUE_DONE 1U 1426e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1427d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 14288fa86551SYufeng Mo u8 return_status = 0; 14291a426f8bSPeng Li int ret; 14308fa86551SYufeng Mo u16 i; 1431e2cb1decSSalil Mehta 14321a426f8bSPeng Li /* disable vf queue before send queue reset msg to PF */ 14338fa86551SYufeng Mo ret = hclgevf_tqp_enable(handle, false); 14348fa86551SYufeng Mo if (ret) { 14358fa86551SYufeng Mo dev_err(&hdev->pdev->dev, "failed to disable tqp, ret = %d\n", 14368fa86551SYufeng Mo ret); 14377fa6be4fSHuazhong Tan return ret; 14388fa86551SYufeng Mo } 14391a426f8bSPeng Li 1440d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 14418fa86551SYufeng Mo 14428fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &return_status, 14438fa86551SYufeng Mo sizeof(return_status)); 14448fa86551SYufeng Mo if (ret || return_status == HCLGEVF_RESET_ALL_QUEUE_DONE) 14458fa86551SYufeng Mo return ret; 14468fa86551SYufeng Mo 14478fa86551SYufeng Mo for (i = 1; i < handle->kinfo.num_tqps; i++) { 14488fa86551SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 14498fa86551SYufeng Mo memcpy(send_msg.data, &i, sizeof(i)); 14508fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 14518fa86551SYufeng Mo if (ret) 14528fa86551SYufeng Mo return ret; 14538fa86551SYufeng Mo } 14548fa86551SYufeng Mo 14558fa86551SYufeng Mo return 0; 1456e2cb1decSSalil Mehta } 1457e2cb1decSSalil Mehta 1458818f1675SYunsheng Lin static int hclgevf_set_mtu(struct hnae3_handle *handle, int new_mtu) 1459818f1675SYunsheng Lin { 1460818f1675SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1461d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1462818f1675SYunsheng Lin 1463d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_MTU, 0); 1464d3410018SYufeng Mo memcpy(send_msg.data, &new_mtu, sizeof(new_mtu)); 1465d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1466818f1675SYunsheng Lin } 1467818f1675SYunsheng Lin 14686988eb2aSSalil Mehta static int hclgevf_notify_client(struct hclgevf_dev *hdev, 14696988eb2aSSalil Mehta enum hnae3_reset_notify_type type) 14706988eb2aSSalil Mehta { 14716988eb2aSSalil Mehta struct hnae3_client *client = hdev->nic_client; 14726988eb2aSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 14736a5f6fa3SHuazhong Tan int ret; 14746988eb2aSSalil Mehta 147525d1817cSHuazhong Tan if (!test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state) || 147625d1817cSHuazhong Tan !client) 147725d1817cSHuazhong Tan return 0; 147825d1817cSHuazhong Tan 14796988eb2aSSalil Mehta if (!client->ops->reset_notify) 14806988eb2aSSalil Mehta return -EOPNOTSUPP; 14816988eb2aSSalil Mehta 14826a5f6fa3SHuazhong Tan ret = client->ops->reset_notify(handle, type); 14836a5f6fa3SHuazhong Tan if (ret) 14846a5f6fa3SHuazhong Tan dev_err(&hdev->pdev->dev, "notify nic client failed %d(%d)\n", 14856a5f6fa3SHuazhong Tan type, ret); 14866a5f6fa3SHuazhong Tan 14876a5f6fa3SHuazhong Tan return ret; 14886988eb2aSSalil Mehta } 14896988eb2aSSalil Mehta 1490fe735c84SHuazhong Tan static int hclgevf_notify_roce_client(struct hclgevf_dev *hdev, 1491fe735c84SHuazhong Tan enum hnae3_reset_notify_type type) 1492fe735c84SHuazhong Tan { 1493fe735c84SHuazhong Tan struct hnae3_client *client = hdev->roce_client; 1494fe735c84SHuazhong Tan struct hnae3_handle *handle = &hdev->roce; 1495fe735c84SHuazhong Tan int ret; 1496fe735c84SHuazhong Tan 1497fe735c84SHuazhong Tan if (!test_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state) || !client) 1498fe735c84SHuazhong Tan return 0; 1499fe735c84SHuazhong Tan 1500fe735c84SHuazhong Tan if (!client->ops->reset_notify) 1501fe735c84SHuazhong Tan return -EOPNOTSUPP; 1502fe735c84SHuazhong Tan 1503fe735c84SHuazhong Tan ret = client->ops->reset_notify(handle, type); 1504fe735c84SHuazhong Tan if (ret) 1505fe735c84SHuazhong Tan dev_err(&hdev->pdev->dev, "notify roce client failed %d(%d)", 1506fe735c84SHuazhong Tan type, ret); 1507fe735c84SHuazhong Tan return ret; 1508fe735c84SHuazhong Tan } 1509fe735c84SHuazhong Tan 15106988eb2aSSalil Mehta static int hclgevf_reset_wait(struct hclgevf_dev *hdev) 15116988eb2aSSalil Mehta { 1512aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_US 20000 1513aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_CNT 2000 1514aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_TIMEOUT_US \ 1515aa5c4f17SHuazhong Tan (HCLGEVF_RESET_WAIT_US * HCLGEVF_RESET_WAIT_CNT) 1516aa5c4f17SHuazhong Tan 1517aa5c4f17SHuazhong Tan u32 val; 1518aa5c4f17SHuazhong Tan int ret; 15196988eb2aSSalil Mehta 1520f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_RESET) 1521076bb537SJie Wang ret = readl_poll_timeout(hdev->hw.hw.io_base + 152272e2fb07SHuazhong Tan HCLGEVF_VF_RST_ING, val, 152372e2fb07SHuazhong Tan !(val & HCLGEVF_VF_RST_ING_BIT), 152472e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_US, 152572e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 152672e2fb07SHuazhong Tan else 1527076bb537SJie Wang ret = readl_poll_timeout(hdev->hw.hw.io_base + 152872e2fb07SHuazhong Tan HCLGEVF_RST_ING, val, 1529aa5c4f17SHuazhong Tan !(val & HCLGEVF_RST_ING_BITS), 1530aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_US, 1531aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 15326988eb2aSSalil Mehta 15336988eb2aSSalil Mehta /* hardware completion status should be available by this time */ 1534aa5c4f17SHuazhong Tan if (ret) { 1535aa5c4f17SHuazhong Tan dev_err(&hdev->pdev->dev, 15368912fd6aSColin Ian King "couldn't get reset done status from h/w, timeout!\n"); 1537aa5c4f17SHuazhong Tan return ret; 15386988eb2aSSalil Mehta } 15396988eb2aSSalil Mehta 15406988eb2aSSalil Mehta /* we will wait a bit more to let reset of the stack to complete. This 15416988eb2aSSalil Mehta * might happen in case reset assertion was made by PF. Yes, this also 15426988eb2aSSalil Mehta * means we might end up waiting bit more even for VF reset. 15436988eb2aSSalil Mehta */ 15446988eb2aSSalil Mehta msleep(5000); 15456988eb2aSSalil Mehta 15466988eb2aSSalil Mehta return 0; 15476988eb2aSSalil Mehta } 15486988eb2aSSalil Mehta 15496b428b4fSHuazhong Tan static void hclgevf_reset_handshake(struct hclgevf_dev *hdev, bool enable) 15506b428b4fSHuazhong Tan { 15516b428b4fSHuazhong Tan u32 reg_val; 15526b428b4fSHuazhong Tan 1553cb413bfaSJie Wang reg_val = hclgevf_read_dev(&hdev->hw, HCLGE_COMM_NIC_CSQ_DEPTH_REG); 15546b428b4fSHuazhong Tan if (enable) 15556b428b4fSHuazhong Tan reg_val |= HCLGEVF_NIC_SW_RST_RDY; 15566b428b4fSHuazhong Tan else 15576b428b4fSHuazhong Tan reg_val &= ~HCLGEVF_NIC_SW_RST_RDY; 15586b428b4fSHuazhong Tan 1559cb413bfaSJie Wang hclgevf_write_dev(&hdev->hw, HCLGE_COMM_NIC_CSQ_DEPTH_REG, 15606b428b4fSHuazhong Tan reg_val); 15616b428b4fSHuazhong Tan } 15626b428b4fSHuazhong Tan 15636988eb2aSSalil Mehta static int hclgevf_reset_stack(struct hclgevf_dev *hdev) 15646988eb2aSSalil Mehta { 15657a01c897SSalil Mehta int ret; 15667a01c897SSalil Mehta 15676988eb2aSSalil Mehta /* uninitialize the nic client */ 15686a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT); 15696a5f6fa3SHuazhong Tan if (ret) 15706a5f6fa3SHuazhong Tan return ret; 15716988eb2aSSalil Mehta 15727a01c897SSalil Mehta /* re-initialize the hclge device */ 15739c6f7085SHuazhong Tan ret = hclgevf_reset_hdev(hdev); 15747a01c897SSalil Mehta if (ret) { 15757a01c897SSalil Mehta dev_err(&hdev->pdev->dev, 15767a01c897SSalil Mehta "hclge device re-init failed, VF is disabled!\n"); 15777a01c897SSalil Mehta return ret; 15787a01c897SSalil Mehta } 15796988eb2aSSalil Mehta 15806988eb2aSSalil Mehta /* bring up the nic client again */ 15816a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_INIT_CLIENT); 15826a5f6fa3SHuazhong Tan if (ret) 15836a5f6fa3SHuazhong Tan return ret; 15846988eb2aSSalil Mehta 15856b428b4fSHuazhong Tan /* clear handshake status with IMP */ 15866b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, false); 15876b428b4fSHuazhong Tan 15881cc9bc6eSHuazhong Tan /* bring up the nic to enable TX/RX again */ 15891cc9bc6eSHuazhong Tan return hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 15906988eb2aSSalil Mehta } 15916988eb2aSSalil Mehta 1592dea846e8SHuazhong Tan static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev) 1593dea846e8SHuazhong Tan { 1594ada13ee3SHuazhong Tan #define HCLGEVF_RESET_SYNC_TIME 100 1595ada13ee3SHuazhong Tan 1596f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { 1597d41884eeSHuazhong Tan struct hclge_vf_to_pf_msg send_msg; 1598d41884eeSHuazhong Tan int ret; 1599d41884eeSHuazhong Tan 1600d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0); 1601d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1602cddd5648SHuazhong Tan if (ret) { 1603cddd5648SHuazhong Tan dev_err(&hdev->pdev->dev, 1604cddd5648SHuazhong Tan "failed to assert VF reset, ret = %d\n", ret); 1605cddd5648SHuazhong Tan return ret; 1606cddd5648SHuazhong Tan } 1607c88a6e7dSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt++; 1608dea846e8SHuazhong Tan } 1609dea846e8SHuazhong Tan 1610076bb537SJie Wang set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state); 1611ada13ee3SHuazhong Tan /* inform hardware that preparatory work is done */ 1612ada13ee3SHuazhong Tan msleep(HCLGEVF_RESET_SYNC_TIME); 16136b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1614d41884eeSHuazhong Tan dev_info(&hdev->pdev->dev, "prepare reset(%d) wait done\n", 1615d41884eeSHuazhong Tan hdev->reset_type); 1616dea846e8SHuazhong Tan 1617d41884eeSHuazhong Tan return 0; 1618dea846e8SHuazhong Tan } 1619dea846e8SHuazhong Tan 16203d77d0cbSHuazhong Tan static void hclgevf_dump_rst_info(struct hclgevf_dev *hdev) 16213d77d0cbSHuazhong Tan { 16223d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF function reset count: %u\n", 16233d77d0cbSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt); 16243d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", 16253d77d0cbSHuazhong Tan hdev->rst_stats.flr_rst_cnt); 16263d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF reset count: %u\n", 16273d77d0cbSHuazhong Tan hdev->rst_stats.vf_rst_cnt); 16283d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset done count: %u\n", 16293d77d0cbSHuazhong Tan hdev->rst_stats.rst_done_cnt); 16303d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", 16313d77d0cbSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt); 16323d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset count: %u\n", 16333d77d0cbSHuazhong Tan hdev->rst_stats.rst_cnt); 16343d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset fail count: %u\n", 16353d77d0cbSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 16363d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", 16373d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_MISC_VECTOR_REG_BASE)); 16383d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt status: 0x%x\n", 1639cb413bfaSJie Wang hclgevf_read_dev(&hdev->hw, HCLGE_COMM_VECTOR0_CMDQ_STATE_REG)); 16403d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", 1641cb413bfaSJie Wang hclgevf_read_dev(&hdev->hw, HCLGE_COMM_NIC_CSQ_DEPTH_REG)); 16423d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", 16433d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING)); 16443d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); 16453d77d0cbSHuazhong Tan } 16463d77d0cbSHuazhong Tan 1647bbe6540eSHuazhong Tan static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev) 1648bbe6540eSHuazhong Tan { 16496b428b4fSHuazhong Tan /* recover handshake status with IMP when reset fail */ 16506b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1651bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt++; 1652adcf738bSGuojia Liao dev_err(&hdev->pdev->dev, "failed to reset VF(%u)\n", 1653bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 1654bbe6540eSHuazhong Tan 1655bbe6540eSHuazhong Tan if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT) 1656bbe6540eSHuazhong Tan set_bit(hdev->reset_type, &hdev->reset_pending); 1657bbe6540eSHuazhong Tan 1658bbe6540eSHuazhong Tan if (hclgevf_is_reset_pending(hdev)) { 1659bbe6540eSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 1660bbe6540eSHuazhong Tan hclgevf_reset_task_schedule(hdev); 16613d77d0cbSHuazhong Tan } else { 1662d5432455SGuojia Liao set_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 16633d77d0cbSHuazhong Tan hclgevf_dump_rst_info(hdev); 1664bbe6540eSHuazhong Tan } 1665bbe6540eSHuazhong Tan } 1666bbe6540eSHuazhong Tan 16671cc9bc6eSHuazhong Tan static int hclgevf_reset_prepare(struct hclgevf_dev *hdev) 16686988eb2aSSalil Mehta { 16696988eb2aSSalil Mehta int ret; 16706988eb2aSSalil Mehta 1671c88a6e7dSHuazhong Tan hdev->rst_stats.rst_cnt++; 16726988eb2aSSalil Mehta 1673fe735c84SHuazhong Tan /* perform reset of the stack & ae device for a client */ 1674fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_DOWN_CLIENT); 1675fe735c84SHuazhong Tan if (ret) 1676fe735c84SHuazhong Tan return ret; 1677fe735c84SHuazhong Tan 16781cc9bc6eSHuazhong Tan rtnl_lock(); 16796988eb2aSSalil Mehta /* bring down the nic to stop any ongoing TX/RX */ 16806a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 168129118ab9SHuazhong Tan rtnl_unlock(); 16826a5f6fa3SHuazhong Tan if (ret) 16831cc9bc6eSHuazhong Tan return ret; 1684dea846e8SHuazhong Tan 16851cc9bc6eSHuazhong Tan return hclgevf_reset_prepare_wait(hdev); 16866988eb2aSSalil Mehta } 16876988eb2aSSalil Mehta 16881cc9bc6eSHuazhong Tan static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 16891cc9bc6eSHuazhong Tan { 16901cc9bc6eSHuazhong Tan int ret; 16911cc9bc6eSHuazhong Tan 1692c88a6e7dSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt++; 1693fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UNINIT_CLIENT); 1694fe735c84SHuazhong Tan if (ret) 1695fe735c84SHuazhong Tan return ret; 1696c88a6e7dSHuazhong Tan 169729118ab9SHuazhong Tan rtnl_lock(); 16986988eb2aSSalil Mehta /* now, re-initialize the nic client and ae device */ 16996988eb2aSSalil Mehta ret = hclgevf_reset_stack(hdev); 17001cc9bc6eSHuazhong Tan rtnl_unlock(); 17016a5f6fa3SHuazhong Tan if (ret) { 17026988eb2aSSalil Mehta dev_err(&hdev->pdev->dev, "failed to reset VF stack\n"); 17031cc9bc6eSHuazhong Tan return ret; 17046a5f6fa3SHuazhong Tan } 17056988eb2aSSalil Mehta 1706fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_INIT_CLIENT); 1707fe735c84SHuazhong Tan /* ignore RoCE notify error if it fails HCLGEVF_RESET_MAX_FAIL_CNT - 1 1708fe735c84SHuazhong Tan * times 1709fe735c84SHuazhong Tan */ 1710fe735c84SHuazhong Tan if (ret && 1711fe735c84SHuazhong Tan hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT - 1) 1712fe735c84SHuazhong Tan return ret; 1713fe735c84SHuazhong Tan 1714fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UP_CLIENT); 1715fe735c84SHuazhong Tan if (ret) 1716fe735c84SHuazhong Tan return ret; 1717fe735c84SHuazhong Tan 1718b644a8d4SHuazhong Tan hdev->last_reset_time = jiffies; 1719c88a6e7dSHuazhong Tan hdev->rst_stats.rst_done_cnt++; 1720bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt = 0; 1721d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 1722b644a8d4SHuazhong Tan 17231cc9bc6eSHuazhong Tan return 0; 17241cc9bc6eSHuazhong Tan } 17251cc9bc6eSHuazhong Tan 17261cc9bc6eSHuazhong Tan static void hclgevf_reset(struct hclgevf_dev *hdev) 17271cc9bc6eSHuazhong Tan { 17281cc9bc6eSHuazhong Tan if (hclgevf_reset_prepare(hdev)) 17291cc9bc6eSHuazhong Tan goto err_reset; 17301cc9bc6eSHuazhong Tan 17311cc9bc6eSHuazhong Tan /* check if VF could successfully fetch the hardware reset completion 17321cc9bc6eSHuazhong Tan * status from the hardware 17331cc9bc6eSHuazhong Tan */ 17341cc9bc6eSHuazhong Tan if (hclgevf_reset_wait(hdev)) { 17351cc9bc6eSHuazhong Tan /* can't do much in this situation, will disable VF */ 17361cc9bc6eSHuazhong Tan dev_err(&hdev->pdev->dev, 17371cc9bc6eSHuazhong Tan "failed to fetch H/W reset completion status\n"); 17381cc9bc6eSHuazhong Tan goto err_reset; 17391cc9bc6eSHuazhong Tan } 17401cc9bc6eSHuazhong Tan 17411cc9bc6eSHuazhong Tan if (hclgevf_reset_rebuild(hdev)) 17421cc9bc6eSHuazhong Tan goto err_reset; 17431cc9bc6eSHuazhong Tan 17441cc9bc6eSHuazhong Tan return; 17451cc9bc6eSHuazhong Tan 17466a5f6fa3SHuazhong Tan err_reset: 1747bbe6540eSHuazhong Tan hclgevf_reset_err_handle(hdev); 17486988eb2aSSalil Mehta } 17496988eb2aSSalil Mehta 1750720bd583SHuazhong Tan static enum hnae3_reset_type hclgevf_get_reset_level(struct hclgevf_dev *hdev, 1751720bd583SHuazhong Tan unsigned long *addr) 1752720bd583SHuazhong Tan { 1753720bd583SHuazhong Tan enum hnae3_reset_type rst_level = HNAE3_NONE_RESET; 1754720bd583SHuazhong Tan 1755dea846e8SHuazhong Tan /* return the highest priority reset level amongst all */ 1756b90fcc5bSHuazhong Tan if (test_bit(HNAE3_VF_RESET, addr)) { 1757b90fcc5bSHuazhong Tan rst_level = HNAE3_VF_RESET; 1758b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_RESET, addr); 1759b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 1760b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 1761b90fcc5bSHuazhong Tan } else if (test_bit(HNAE3_VF_FULL_RESET, addr)) { 1762dea846e8SHuazhong Tan rst_level = HNAE3_VF_FULL_RESET; 1763dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FULL_RESET, addr); 1764dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 1765aa5c4f17SHuazhong Tan } else if (test_bit(HNAE3_VF_PF_FUNC_RESET, addr)) { 1766aa5c4f17SHuazhong Tan rst_level = HNAE3_VF_PF_FUNC_RESET; 1767aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 1768aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 1769dea846e8SHuazhong Tan } else if (test_bit(HNAE3_VF_FUNC_RESET, addr)) { 1770dea846e8SHuazhong Tan rst_level = HNAE3_VF_FUNC_RESET; 1771dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 17726ff3cf07SHuazhong Tan } else if (test_bit(HNAE3_FLR_RESET, addr)) { 17736ff3cf07SHuazhong Tan rst_level = HNAE3_FLR_RESET; 17746ff3cf07SHuazhong Tan clear_bit(HNAE3_FLR_RESET, addr); 1775720bd583SHuazhong Tan } 1776720bd583SHuazhong Tan 1777720bd583SHuazhong Tan return rst_level; 1778720bd583SHuazhong Tan } 1779720bd583SHuazhong Tan 17806ae4e733SShiju Jose static void hclgevf_reset_event(struct pci_dev *pdev, 17816ae4e733SShiju Jose struct hnae3_handle *handle) 17826d4c3981SSalil Mehta { 17836ff3cf07SHuazhong Tan struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); 17846ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 17856d4c3981SSalil Mehta 17866d4c3981SSalil Mehta dev_info(&hdev->pdev->dev, "received reset request from VF enet\n"); 17876d4c3981SSalil Mehta 17886ff3cf07SHuazhong Tan if (hdev->default_reset_request) 17890742ed7cSHuazhong Tan hdev->reset_level = 1790720bd583SHuazhong Tan hclgevf_get_reset_level(hdev, 1791720bd583SHuazhong Tan &hdev->default_reset_request); 1792720bd583SHuazhong Tan else 1793dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 17946d4c3981SSalil Mehta 1795436667d2SSalil Mehta /* reset of this VF requested */ 1796436667d2SSalil Mehta set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state); 1797436667d2SSalil Mehta hclgevf_reset_task_schedule(hdev); 17986d4c3981SSalil Mehta 17990742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 18006d4c3981SSalil Mehta } 18016d4c3981SSalil Mehta 1802720bd583SHuazhong Tan static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev, 1803720bd583SHuazhong Tan enum hnae3_reset_type rst_type) 1804720bd583SHuazhong Tan { 1805720bd583SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 1806720bd583SHuazhong Tan 1807720bd583SHuazhong Tan set_bit(rst_type, &hdev->default_reset_request); 1808720bd583SHuazhong Tan } 1809720bd583SHuazhong Tan 1810f28368bbSHuazhong Tan static void hclgevf_enable_vector(struct hclgevf_misc_vector *vector, bool en) 1811f28368bbSHuazhong Tan { 1812f28368bbSHuazhong Tan writel(en ? 1 : 0, vector->addr); 1813f28368bbSHuazhong Tan } 1814f28368bbSHuazhong Tan 1815bb1890d5SJiaran Zhang static void hclgevf_reset_prepare_general(struct hnae3_ae_dev *ae_dev, 1816bb1890d5SJiaran Zhang enum hnae3_reset_type rst_type) 18176ff3cf07SHuazhong Tan { 1818bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_WAIT_MS 500 1819bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_CNT 5 1820f28368bbSHuazhong Tan 18216ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 1822f28368bbSHuazhong Tan int retry_cnt = 0; 1823f28368bbSHuazhong Tan int ret; 18246ff3cf07SHuazhong Tan 1825ed0e658cSJiaran Zhang while (retry_cnt++ < HCLGEVF_RESET_RETRY_CNT) { 1826f28368bbSHuazhong Tan down(&hdev->reset_sem); 1827f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 1828bb1890d5SJiaran Zhang hdev->reset_type = rst_type; 1829f28368bbSHuazhong Tan ret = hclgevf_reset_prepare(hdev); 1830ed0e658cSJiaran Zhang if (!ret && !hdev->reset_pending) 1831ed0e658cSJiaran Zhang break; 1832ed0e658cSJiaran Zhang 18336ff3cf07SHuazhong Tan dev_err(&hdev->pdev->dev, 1834ed0e658cSJiaran Zhang "failed to prepare to reset, ret=%d, reset_pending:0x%lx, retry_cnt:%d\n", 1835ed0e658cSJiaran Zhang ret, hdev->reset_pending, retry_cnt); 1836f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 1837f28368bbSHuazhong Tan up(&hdev->reset_sem); 1838bb1890d5SJiaran Zhang msleep(HCLGEVF_RESET_RETRY_WAIT_MS); 1839f28368bbSHuazhong Tan } 1840f28368bbSHuazhong Tan 1841bb1890d5SJiaran Zhang /* disable misc vector before reset done */ 1842f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, false); 1843bb1890d5SJiaran Zhang 1844bb1890d5SJiaran Zhang if (hdev->reset_type == HNAE3_FLR_RESET) 1845f28368bbSHuazhong Tan hdev->rst_stats.flr_rst_cnt++; 1846f28368bbSHuazhong Tan } 1847f28368bbSHuazhong Tan 1848bb1890d5SJiaran Zhang static void hclgevf_reset_done(struct hnae3_ae_dev *ae_dev) 1849f28368bbSHuazhong Tan { 1850f28368bbSHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 1851f28368bbSHuazhong Tan int ret; 1852f28368bbSHuazhong Tan 1853f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, true); 1854f28368bbSHuazhong Tan 1855f28368bbSHuazhong Tan ret = hclgevf_reset_rebuild(hdev); 1856f28368bbSHuazhong Tan if (ret) 1857f28368bbSHuazhong Tan dev_warn(&hdev->pdev->dev, "fail to rebuild, ret=%d\n", 1858f28368bbSHuazhong Tan ret); 1859f28368bbSHuazhong Tan 1860f28368bbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 1861f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 1862f28368bbSHuazhong Tan up(&hdev->reset_sem); 18636ff3cf07SHuazhong Tan } 18646ff3cf07SHuazhong Tan 1865e2cb1decSSalil Mehta static u32 hclgevf_get_fw_version(struct hnae3_handle *handle) 1866e2cb1decSSalil Mehta { 1867e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1868e2cb1decSSalil Mehta 1869e2cb1decSSalil Mehta return hdev->fw_version; 1870e2cb1decSSalil Mehta } 1871e2cb1decSSalil Mehta 1872e2cb1decSSalil Mehta static void hclgevf_get_misc_vector(struct hclgevf_dev *hdev) 1873e2cb1decSSalil Mehta { 1874e2cb1decSSalil Mehta struct hclgevf_misc_vector *vector = &hdev->misc_vector; 1875e2cb1decSSalil Mehta 1876e2cb1decSSalil Mehta vector->vector_irq = pci_irq_vector(hdev->pdev, 1877e2cb1decSSalil Mehta HCLGEVF_MISC_VECTOR_NUM); 1878076bb537SJie Wang vector->addr = hdev->hw.hw.io_base + HCLGEVF_MISC_VECTOR_REG_BASE; 1879e2cb1decSSalil Mehta /* vector status always valid for Vector 0 */ 1880e2cb1decSSalil Mehta hdev->vector_status[HCLGEVF_MISC_VECTOR_NUM] = 0; 1881e2cb1decSSalil Mehta hdev->vector_irq[HCLGEVF_MISC_VECTOR_NUM] = vector->vector_irq; 1882e2cb1decSSalil Mehta 1883e2cb1decSSalil Mehta hdev->num_msi_left -= 1; 1884e2cb1decSSalil Mehta hdev->num_msi_used += 1; 1885e2cb1decSSalil Mehta } 1886e2cb1decSSalil Mehta 188735a1e503SSalil Mehta void hclgevf_reset_task_schedule(struct hclgevf_dev *hdev) 188835a1e503SSalil Mehta { 1889ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 18900251d196SGuangbin Huang test_bit(HCLGEVF_STATE_SERVICE_INITED, &hdev->state) && 1891ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, 1892ff200099SYunsheng Lin &hdev->state)) 18930ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 189435a1e503SSalil Mehta } 189535a1e503SSalil Mehta 189607a0556aSSalil Mehta void hclgevf_mbx_task_schedule(struct hclgevf_dev *hdev) 1897e2cb1decSSalil Mehta { 1898ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 1899ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, 1900ff200099SYunsheng Lin &hdev->state)) 19010ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 190207a0556aSSalil Mehta } 1903e2cb1decSSalil Mehta 1904ff200099SYunsheng Lin static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 1905ff200099SYunsheng Lin unsigned long delay) 1906e2cb1decSSalil Mehta { 1907d5432455SGuojia Liao if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 1908d5432455SGuojia Liao !test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 19090ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, delay); 1910e2cb1decSSalil Mehta } 1911e2cb1decSSalil Mehta 1912ff200099SYunsheng Lin static void hclgevf_reset_service_task(struct hclgevf_dev *hdev) 191335a1e503SSalil Mehta { 1914d6ad7c53SGuojia Liao #define HCLGEVF_MAX_RESET_ATTEMPTS_CNT 3 1915d6ad7c53SGuojia Liao 1916ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state)) 1917ff200099SYunsheng Lin return; 1918ff200099SYunsheng Lin 1919f28368bbSHuazhong Tan down(&hdev->reset_sem); 1920f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 192135a1e503SSalil Mehta 1922436667d2SSalil Mehta if (test_and_clear_bit(HCLGEVF_RESET_PENDING, 1923436667d2SSalil Mehta &hdev->reset_state)) { 1924cd7e963dSSalil Mehta /* PF has intimated that it is about to reset the hardware. 19259b2f3477SWeihang Li * We now have to poll & check if hardware has actually 19269b2f3477SWeihang Li * completed the reset sequence. On hardware reset completion, 19279b2f3477SWeihang Li * VF needs to reset the client and ae device. 192835a1e503SSalil Mehta */ 1929436667d2SSalil Mehta hdev->reset_attempts = 0; 1930436667d2SSalil Mehta 1931dea846e8SHuazhong Tan hdev->last_reset_time = jiffies; 19321385cc81SYufeng Mo hdev->reset_type = 19331385cc81SYufeng Mo hclgevf_get_reset_level(hdev, &hdev->reset_pending); 19341385cc81SYufeng Mo if (hdev->reset_type != HNAE3_NONE_RESET) 19351cc9bc6eSHuazhong Tan hclgevf_reset(hdev); 1936436667d2SSalil Mehta } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED, 1937436667d2SSalil Mehta &hdev->reset_state)) { 1938436667d2SSalil Mehta /* we could be here when either of below happens: 19399b2f3477SWeihang Li * 1. reset was initiated due to watchdog timeout caused by 1940436667d2SSalil Mehta * a. IMP was earlier reset and our TX got choked down and 1941436667d2SSalil Mehta * which resulted in watchdog reacting and inducing VF 1942436667d2SSalil Mehta * reset. This also means our cmdq would be unreliable. 1943436667d2SSalil Mehta * b. problem in TX due to other lower layer(example link 1944436667d2SSalil Mehta * layer not functioning properly etc.) 1945436667d2SSalil Mehta * 2. VF reset might have been initiated due to some config 1946436667d2SSalil Mehta * change. 1947436667d2SSalil Mehta * 1948436667d2SSalil Mehta * NOTE: Theres no clear way to detect above cases than to react 1949436667d2SSalil Mehta * to the response of PF for this reset request. PF will ack the 1950436667d2SSalil Mehta * 1b and 2. cases but we will not get any intimation about 1a 1951436667d2SSalil Mehta * from PF as cmdq would be in unreliable state i.e. mailbox 1952436667d2SSalil Mehta * communication between PF and VF would be broken. 195346ee7350SGuojia Liao * 195446ee7350SGuojia Liao * if we are never geting into pending state it means either: 1955436667d2SSalil Mehta * 1. PF is not receiving our request which could be due to IMP 1956436667d2SSalil Mehta * reset 1957436667d2SSalil Mehta * 2. PF is screwed 1958436667d2SSalil Mehta * We cannot do much for 2. but to check first we can try reset 1959436667d2SSalil Mehta * our PCIe + stack and see if it alleviates the problem. 1960436667d2SSalil Mehta */ 1961d6ad7c53SGuojia Liao if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) { 1962436667d2SSalil Mehta /* prepare for full reset of stack + pcie interface */ 1963dea846e8SHuazhong Tan set_bit(HNAE3_VF_FULL_RESET, &hdev->reset_pending); 1964436667d2SSalil Mehta 1965436667d2SSalil Mehta /* "defer" schedule the reset task again */ 1966436667d2SSalil Mehta set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 1967436667d2SSalil Mehta } else { 1968436667d2SSalil Mehta hdev->reset_attempts++; 1969436667d2SSalil Mehta 1970dea846e8SHuazhong Tan set_bit(hdev->reset_level, &hdev->reset_pending); 1971dea846e8SHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 1972436667d2SSalil Mehta } 1973dea846e8SHuazhong Tan hclgevf_reset_task_schedule(hdev); 1974436667d2SSalil Mehta } 197535a1e503SSalil Mehta 1976afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 197735a1e503SSalil Mehta clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 1978f28368bbSHuazhong Tan up(&hdev->reset_sem); 197935a1e503SSalil Mehta } 198035a1e503SSalil Mehta 1981ff200099SYunsheng Lin static void hclgevf_mailbox_service_task(struct hclgevf_dev *hdev) 1982e2cb1decSSalil Mehta { 1983ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state)) 1984ff200099SYunsheng Lin return; 1985e2cb1decSSalil Mehta 1986e2cb1decSSalil Mehta if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state)) 1987e2cb1decSSalil Mehta return; 1988e2cb1decSSalil Mehta 198907a0556aSSalil Mehta hclgevf_mbx_async_handler(hdev); 1990e2cb1decSSalil Mehta 1991e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 1992e2cb1decSSalil Mehta } 1993e2cb1decSSalil Mehta 1994ff200099SYunsheng Lin static void hclgevf_keep_alive(struct hclgevf_dev *hdev) 1995a6d818e3SYunsheng Lin { 1996d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1997a6d818e3SYunsheng Lin int ret; 1998a6d818e3SYunsheng Lin 1999076bb537SJie Wang if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state)) 2000c59a85c0SJian Shen return; 2001c59a85c0SJian Shen 2002d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_KEEP_ALIVE, 0); 2003d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2004a6d818e3SYunsheng Lin if (ret) 2005a6d818e3SYunsheng Lin dev_err(&hdev->pdev->dev, 2006a6d818e3SYunsheng Lin "VF sends keep alive cmd failed(=%d)\n", ret); 2007a6d818e3SYunsheng Lin } 2008a6d818e3SYunsheng Lin 2009ff200099SYunsheng Lin static void hclgevf_periodic_service_task(struct hclgevf_dev *hdev) 2010e2cb1decSSalil Mehta { 2011ff200099SYunsheng Lin unsigned long delta = round_jiffies_relative(HZ); 2012ff200099SYunsheng Lin struct hnae3_handle *handle = &hdev->nic; 2013e2cb1decSSalil Mehta 2014e6394363SGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 2015e6394363SGuangbin Huang return; 2016e6394363SGuangbin Huang 2017ff200099SYunsheng Lin if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) { 2018ff200099SYunsheng Lin delta = jiffies - hdev->last_serv_processed; 2019db01afebSliuzhongzhu 2020ff200099SYunsheng Lin if (delta < round_jiffies_relative(HZ)) { 2021ff200099SYunsheng Lin delta = round_jiffies_relative(HZ) - delta; 2022ff200099SYunsheng Lin goto out; 2023db01afebSliuzhongzhu } 2024ff200099SYunsheng Lin } 2025ff200099SYunsheng Lin 2026ff200099SYunsheng Lin hdev->serv_processed_cnt++; 2027ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_KEEP_ALIVE_TASK_INTERVAL)) 2028ff200099SYunsheng Lin hclgevf_keep_alive(hdev); 2029ff200099SYunsheng Lin 2030ff200099SYunsheng Lin if (test_bit(HCLGEVF_STATE_DOWN, &hdev->state)) { 2031ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2032ff200099SYunsheng Lin goto out; 2033ff200099SYunsheng Lin } 2034ff200099SYunsheng Lin 2035ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_STATS_TIMER_INTERVAL)) 2036ff200099SYunsheng Lin hclgevf_tqps_update_stats(handle); 2037e2cb1decSSalil Mehta 203801305e16SGuangbin Huang /* VF does not need to request link status when this bit is set, because 203901305e16SGuangbin Huang * PF will push its link status to VFs when link status changed. 2040e2cb1decSSalil Mehta */ 204101305e16SGuangbin Huang if (!test_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state)) 2042e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2043e2cb1decSSalil Mehta 20449194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 20459194d18bSliuzhongzhu 2046fe4144d4SJian Shen hclgevf_sync_vlan_filter(hdev); 2047fe4144d4SJian Shen 2048ee4bcd3bSJian Shen hclgevf_sync_mac_table(hdev); 2049ee4bcd3bSJian Shen 2050c631c696SJian Shen hclgevf_sync_promisc_mode(hdev); 2051c631c696SJian Shen 2052ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2053436667d2SSalil Mehta 2054ff200099SYunsheng Lin out: 2055ff200099SYunsheng Lin hclgevf_task_schedule(hdev, delta); 2056ff200099SYunsheng Lin } 2057b3c3fe8eSYunsheng Lin 2058ff200099SYunsheng Lin static void hclgevf_service_task(struct work_struct *work) 2059ff200099SYunsheng Lin { 2060ff200099SYunsheng Lin struct hclgevf_dev *hdev = container_of(work, struct hclgevf_dev, 2061ff200099SYunsheng Lin service_task.work); 2062ff200099SYunsheng Lin 2063ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2064ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2065ff200099SYunsheng Lin hclgevf_periodic_service_task(hdev); 2066ff200099SYunsheng Lin 2067ff200099SYunsheng Lin /* Handle reset and mbx again in case periodical task delays the 2068ff200099SYunsheng Lin * handling by calling hclgevf_task_schedule() in 2069ff200099SYunsheng Lin * hclgevf_periodic_service_task() 2070ff200099SYunsheng Lin */ 2071ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2072ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2073e2cb1decSSalil Mehta } 2074e2cb1decSSalil Mehta 2075e2cb1decSSalil Mehta static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr) 2076e2cb1decSSalil Mehta { 2077cb413bfaSJie Wang hclgevf_write_dev(&hdev->hw, HCLGE_COMM_VECTOR0_CMDQ_SRC_REG, regclr); 2078e2cb1decSSalil Mehta } 2079e2cb1decSSalil Mehta 2080b90fcc5bSHuazhong Tan static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, 2081b90fcc5bSHuazhong Tan u32 *clearval) 2082e2cb1decSSalil Mehta { 208313050921SHuazhong Tan u32 val, cmdq_stat_reg, rst_ing_reg; 2084e2cb1decSSalil Mehta 2085e2cb1decSSalil Mehta /* fetch the events from their corresponding regs */ 208613050921SHuazhong Tan cmdq_stat_reg = hclgevf_read_dev(&hdev->hw, 2087cb413bfaSJie Wang HCLGE_COMM_VECTOR0_CMDQ_STATE_REG); 208813050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RST_INT_B) & cmdq_stat_reg) { 2089b90fcc5bSHuazhong Tan rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 2090b90fcc5bSHuazhong Tan dev_info(&hdev->pdev->dev, 2091b90fcc5bSHuazhong Tan "receive reset interrupt 0x%x!\n", rst_ing_reg); 2092b90fcc5bSHuazhong Tan set_bit(HNAE3_VF_RESET, &hdev->reset_pending); 2093b90fcc5bSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2094076bb537SJie Wang set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state); 209513050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RST_INT_B); 2096c88a6e7dSHuazhong Tan hdev->rst_stats.vf_rst_cnt++; 209772e2fb07SHuazhong Tan /* set up VF hardware reset status, its PF will clear 209872e2fb07SHuazhong Tan * this status when PF has initialized done. 209972e2fb07SHuazhong Tan */ 210072e2fb07SHuazhong Tan val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); 210172e2fb07SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, 210272e2fb07SHuazhong Tan val | HCLGEVF_VF_RST_ING_BIT); 2103b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_RST; 2104b90fcc5bSHuazhong Tan } 2105b90fcc5bSHuazhong Tan 2106e2cb1decSSalil Mehta /* check for vector0 mailbox(=CMDQ RX) event source */ 210713050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) { 210813050921SHuazhong Tan /* for revision 0x21, clearing interrupt is writing bit 0 210913050921SHuazhong Tan * to the clear register, writing bit 1 means to keep the 211013050921SHuazhong Tan * old value. 211113050921SHuazhong Tan * for revision 0x20, the clear register is a read & write 211213050921SHuazhong Tan * register, so we should just write 0 to the bit we are 211313050921SHuazhong Tan * handling, and keep other bits as cmdq_stat_reg. 211413050921SHuazhong Tan */ 2115295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) 211613050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 211713050921SHuazhong Tan else 211813050921SHuazhong Tan *clearval = cmdq_stat_reg & 211913050921SHuazhong Tan ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 212013050921SHuazhong Tan 2121b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_MBX; 2122e2cb1decSSalil Mehta } 2123e2cb1decSSalil Mehta 2124e45afb39SHuazhong Tan /* print other vector0 event source */ 2125e45afb39SHuazhong Tan dev_info(&hdev->pdev->dev, 2126e45afb39SHuazhong Tan "vector 0 interrupt from unknown source, cmdq_src = %#x\n", 2127e45afb39SHuazhong Tan cmdq_stat_reg); 2128e2cb1decSSalil Mehta 2129b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_OTHER; 2130e2cb1decSSalil Mehta } 2131e2cb1decSSalil Mehta 2132e2cb1decSSalil Mehta static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) 2133e2cb1decSSalil Mehta { 2134b90fcc5bSHuazhong Tan enum hclgevf_evt_cause event_cause; 2135e2cb1decSSalil Mehta struct hclgevf_dev *hdev = data; 2136e2cb1decSSalil Mehta u32 clearval; 2137e2cb1decSSalil Mehta 2138e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 2139b90fcc5bSHuazhong Tan event_cause = hclgevf_check_evt_cause(hdev, &clearval); 2140427900d2SJiaran Zhang if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) 2141427900d2SJiaran Zhang hclgevf_clear_event_cause(hdev, clearval); 2142e2cb1decSSalil Mehta 2143b90fcc5bSHuazhong Tan switch (event_cause) { 2144b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_RST: 2145b90fcc5bSHuazhong Tan hclgevf_reset_task_schedule(hdev); 2146b90fcc5bSHuazhong Tan break; 2147b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_MBX: 214807a0556aSSalil Mehta hclgevf_mbx_handler(hdev); 2149b90fcc5bSHuazhong Tan break; 2150b90fcc5bSHuazhong Tan default: 2151b90fcc5bSHuazhong Tan break; 2152b90fcc5bSHuazhong Tan } 2153e2cb1decSSalil Mehta 2154427900d2SJiaran Zhang if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) 2155e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2156e2cb1decSSalil Mehta 2157e2cb1decSSalil Mehta return IRQ_HANDLED; 2158e2cb1decSSalil Mehta } 2159e2cb1decSSalil Mehta 2160e2cb1decSSalil Mehta static int hclgevf_configure(struct hclgevf_dev *hdev) 2161e2cb1decSSalil Mehta { 2162e2cb1decSSalil Mehta int ret; 2163e2cb1decSSalil Mehta 21643462207dSYufeng Mo hdev->gro_en = true; 21653462207dSYufeng Mo 216632e6d104SJian Shen ret = hclgevf_get_basic_info(hdev); 216732e6d104SJian Shen if (ret) 216832e6d104SJian Shen return ret; 216932e6d104SJian Shen 217092f11ea1SJian Shen /* get current port based vlan state from PF */ 217192f11ea1SJian Shen ret = hclgevf_get_port_base_vlan_filter_state(hdev); 217292f11ea1SJian Shen if (ret) 217392f11ea1SJian Shen return ret; 217492f11ea1SJian Shen 2175e2cb1decSSalil Mehta /* get queue configuration from PF */ 21766cee6fc3SJian Shen ret = hclgevf_get_queue_info(hdev); 2177e2cb1decSSalil Mehta if (ret) 2178e2cb1decSSalil Mehta return ret; 2179c0425944SPeng Li 2180c0425944SPeng Li /* get queue depth info from PF */ 2181c0425944SPeng Li ret = hclgevf_get_queue_depth(hdev); 2182c0425944SPeng Li if (ret) 2183c0425944SPeng Li return ret; 2184c0425944SPeng Li 218532e6d104SJian Shen return hclgevf_get_pf_media_type(hdev); 2186e2cb1decSSalil Mehta } 2187e2cb1decSSalil Mehta 21887a01c897SSalil Mehta static int hclgevf_alloc_hdev(struct hnae3_ae_dev *ae_dev) 21897a01c897SSalil Mehta { 21907a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 21911154bb26SPeng Li struct hclgevf_dev *hdev; 21927a01c897SSalil Mehta 21937a01c897SSalil Mehta hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL); 21947a01c897SSalil Mehta if (!hdev) 21957a01c897SSalil Mehta return -ENOMEM; 21967a01c897SSalil Mehta 21977a01c897SSalil Mehta hdev->pdev = pdev; 21987a01c897SSalil Mehta hdev->ae_dev = ae_dev; 21997a01c897SSalil Mehta ae_dev->priv = hdev; 22007a01c897SSalil Mehta 22017a01c897SSalil Mehta return 0; 22027a01c897SSalil Mehta } 22037a01c897SSalil Mehta 2204e2cb1decSSalil Mehta static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev) 2205e2cb1decSSalil Mehta { 2206e2cb1decSSalil Mehta struct hnae3_handle *roce = &hdev->roce; 2207e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 2208e2cb1decSSalil Mehta 220907acf909SJian Shen roce->rinfo.num_vectors = hdev->num_roce_msix; 2210e2cb1decSSalil Mehta 2211e2cb1decSSalil Mehta if (hdev->num_msi_left < roce->rinfo.num_vectors || 2212e2cb1decSSalil Mehta hdev->num_msi_left == 0) 2213e2cb1decSSalil Mehta return -EINVAL; 2214e2cb1decSSalil Mehta 2215beb27ca4SJie Wang roce->rinfo.base_vector = hdev->roce_base_msix_offset; 2216e2cb1decSSalil Mehta 2217e2cb1decSSalil Mehta roce->rinfo.netdev = nic->kinfo.netdev; 2218076bb537SJie Wang roce->rinfo.roce_io_base = hdev->hw.hw.io_base; 2219076bb537SJie Wang roce->rinfo.roce_mem_base = hdev->hw.hw.mem_base; 2220e2cb1decSSalil Mehta 2221e2cb1decSSalil Mehta roce->pdev = nic->pdev; 2222e2cb1decSSalil Mehta roce->ae_algo = nic->ae_algo; 2223e2cb1decSSalil Mehta roce->numa_node_mask = nic->numa_node_mask; 2224e2cb1decSSalil Mehta 2225e2cb1decSSalil Mehta return 0; 2226e2cb1decSSalil Mehta } 2227e2cb1decSSalil Mehta 22283462207dSYufeng Mo static int hclgevf_config_gro(struct hclgevf_dev *hdev) 2229b26a6feaSPeng Li { 2230b26a6feaSPeng Li struct hclgevf_cfg_gro_status_cmd *req; 22316befad60SJie Wang struct hclge_desc desc; 2232b26a6feaSPeng Li int ret; 2233b26a6feaSPeng Li 2234b26a6feaSPeng Li if (!hnae3_dev_gro_supported(hdev)) 2235b26a6feaSPeng Li return 0; 2236b26a6feaSPeng Li 2237b26a6feaSPeng Li hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_GRO_GENERIC_CONFIG, 2238b26a6feaSPeng Li false); 2239b26a6feaSPeng Li req = (struct hclgevf_cfg_gro_status_cmd *)desc.data; 2240b26a6feaSPeng Li 22413462207dSYufeng Mo req->gro_en = hdev->gro_en ? 1 : 0; 2242b26a6feaSPeng Li 2243b26a6feaSPeng Li ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 2244b26a6feaSPeng Li if (ret) 2245b26a6feaSPeng Li dev_err(&hdev->pdev->dev, 2246b26a6feaSPeng Li "VF GRO hardware config cmd failed, ret = %d.\n", ret); 2247b26a6feaSPeng Li 2248b26a6feaSPeng Li return ret; 2249b26a6feaSPeng Li } 2250b26a6feaSPeng Li 2251944de484SGuojia Liao static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) 2252944de484SGuojia Liao { 2253027733b1SJie Wang struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; 2254*93969dc1SJie Wang u16 tc_offset[HCLGE_COMM_MAX_TC_NUM]; 2255*93969dc1SJie Wang u16 tc_valid[HCLGE_COMM_MAX_TC_NUM]; 2256*93969dc1SJie Wang u16 tc_size[HCLGE_COMM_MAX_TC_NUM]; 2257944de484SGuojia Liao int ret; 2258944de484SGuojia Liao 2259295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 22607428d6c9SJie Wang ret = hclge_comm_set_rss_algo_key(&hdev->hw.hw, 22617428d6c9SJie Wang rss_cfg->rss_algo, 2262944de484SGuojia Liao rss_cfg->rss_hash_key); 2263944de484SGuojia Liao if (ret) 2264944de484SGuojia Liao return ret; 2265944de484SGuojia Liao 22667428d6c9SJie Wang ret = hclge_comm_set_rss_input_tuple(&hdev->nic, &hdev->hw.hw, 22677428d6c9SJie Wang false, rss_cfg); 2268944de484SGuojia Liao if (ret) 2269944de484SGuojia Liao return ret; 2270944de484SGuojia Liao } 2271e2cb1decSSalil Mehta 22727428d6c9SJie Wang ret = hclge_comm_set_rss_indir_table(hdev->ae_dev, &hdev->hw.hw, 22737428d6c9SJie Wang rss_cfg->rss_indirection_tbl); 2274e2cb1decSSalil Mehta if (ret) 2275e2cb1decSSalil Mehta return ret; 2276e2cb1decSSalil Mehta 2277*93969dc1SJie Wang hclge_comm_get_rss_tc_info(rss_cfg->rss_size, hdev->hw_tc_map, 2278*93969dc1SJie Wang tc_offset, tc_valid, tc_size); 2279*93969dc1SJie Wang 2280*93969dc1SJie Wang return hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, 2281*93969dc1SJie Wang tc_valid, tc_size); 2282e2cb1decSSalil Mehta } 2283e2cb1decSSalil Mehta 2284e2cb1decSSalil Mehta static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev) 2285e2cb1decSSalil Mehta { 2286bbfd4506SJian Shen struct hnae3_handle *nic = &hdev->nic; 2287bbfd4506SJian Shen int ret; 2288bbfd4506SJian Shen 2289bbfd4506SJian Shen ret = hclgevf_en_hw_strip_rxvtag(nic, true); 2290bbfd4506SJian Shen if (ret) { 2291bbfd4506SJian Shen dev_err(&hdev->pdev->dev, 2292bbfd4506SJian Shen "failed to enable rx vlan offload, ret = %d\n", ret); 2293bbfd4506SJian Shen return ret; 2294bbfd4506SJian Shen } 2295bbfd4506SJian Shen 2296e2cb1decSSalil Mehta return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0, 2297e2cb1decSSalil Mehta false); 2298e2cb1decSSalil Mehta } 2299e2cb1decSSalil Mehta 2300ff200099SYunsheng Lin static void hclgevf_flush_link_update(struct hclgevf_dev *hdev) 2301ff200099SYunsheng Lin { 2302ff200099SYunsheng Lin #define HCLGEVF_FLUSH_LINK_TIMEOUT 100000 2303ff200099SYunsheng Lin 2304ff200099SYunsheng Lin unsigned long last = hdev->serv_processed_cnt; 2305ff200099SYunsheng Lin int i = 0; 2306ff200099SYunsheng Lin 2307ff200099SYunsheng Lin while (test_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state) && 2308ff200099SYunsheng Lin i++ < HCLGEVF_FLUSH_LINK_TIMEOUT && 2309ff200099SYunsheng Lin last == hdev->serv_processed_cnt) 2310ff200099SYunsheng Lin usleep_range(1, 1); 2311ff200099SYunsheng Lin } 2312ff200099SYunsheng Lin 23138cdb992fSJian Shen static void hclgevf_set_timer_task(struct hnae3_handle *handle, bool enable) 23148cdb992fSJian Shen { 23158cdb992fSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 23168cdb992fSJian Shen 23178cdb992fSJian Shen if (enable) { 2318ff200099SYunsheng Lin hclgevf_task_schedule(hdev, 0); 23198cdb992fSJian Shen } else { 2320b3c3fe8eSYunsheng Lin set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2321ff200099SYunsheng Lin 2322ff200099SYunsheng Lin /* flush memory to make sure DOWN is seen by service task */ 2323ff200099SYunsheng Lin smp_mb__before_atomic(); 2324ff200099SYunsheng Lin hclgevf_flush_link_update(hdev); 23258cdb992fSJian Shen } 23268cdb992fSJian Shen } 23278cdb992fSJian Shen 2328e2cb1decSSalil Mehta static int hclgevf_ae_start(struct hnae3_handle *handle) 2329e2cb1decSSalil Mehta { 2330e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2331e2cb1decSSalil Mehta 2332ed7bedd2SGuangbin Huang clear_bit(HCLGEVF_STATE_DOWN, &hdev->state); 233301305e16SGuangbin Huang clear_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state); 2334ed7bedd2SGuangbin Huang 2335e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 2336e2cb1decSSalil Mehta 2337e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2338e2cb1decSSalil Mehta 23399194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 23409194d18bSliuzhongzhu 2341e2cb1decSSalil Mehta return 0; 2342e2cb1decSSalil Mehta } 2343e2cb1decSSalil Mehta 2344e2cb1decSSalil Mehta static void hclgevf_ae_stop(struct hnae3_handle *handle) 2345e2cb1decSSalil Mehta { 2346e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2347e2cb1decSSalil Mehta 23482f7e4896SFuyun Liang set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 23492f7e4896SFuyun Liang 2350146e92c1SHuazhong Tan if (hdev->reset_type != HNAE3_VF_RESET) 23518fa86551SYufeng Mo hclgevf_reset_tqp(handle); 235239cfbc9cSHuazhong Tan 2353e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 23548cc6c1f7SFuyun Liang hclgevf_update_link_status(hdev, 0); 2355e2cb1decSSalil Mehta } 2356e2cb1decSSalil Mehta 2357a6d818e3SYunsheng Lin static int hclgevf_set_alive(struct hnae3_handle *handle, bool alive) 2358a6d818e3SYunsheng Lin { 2359d3410018SYufeng Mo #define HCLGEVF_STATE_ALIVE 1 2360d3410018SYufeng Mo #define HCLGEVF_STATE_NOT_ALIVE 0 2361a6d818e3SYunsheng Lin 2362d3410018SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2363d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2364d3410018SYufeng Mo 2365d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_ALIVE, 0); 2366d3410018SYufeng Mo send_msg.data[0] = alive ? HCLGEVF_STATE_ALIVE : 2367d3410018SYufeng Mo HCLGEVF_STATE_NOT_ALIVE; 2368d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2369a6d818e3SYunsheng Lin } 2370a6d818e3SYunsheng Lin 2371a6d818e3SYunsheng Lin static int hclgevf_client_start(struct hnae3_handle *handle) 2372a6d818e3SYunsheng Lin { 2373f621df96SQinglang Miao return hclgevf_set_alive(handle, true); 2374a6d818e3SYunsheng Lin } 2375a6d818e3SYunsheng Lin 2376a6d818e3SYunsheng Lin static void hclgevf_client_stop(struct hnae3_handle *handle) 2377a6d818e3SYunsheng Lin { 2378a6d818e3SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2379a6d818e3SYunsheng Lin int ret; 2380a6d818e3SYunsheng Lin 2381a6d818e3SYunsheng Lin ret = hclgevf_set_alive(handle, false); 2382a6d818e3SYunsheng Lin if (ret) 2383a6d818e3SYunsheng Lin dev_warn(&hdev->pdev->dev, 2384a6d818e3SYunsheng Lin "%s failed %d\n", __func__, ret); 2385a6d818e3SYunsheng Lin } 2386a6d818e3SYunsheng Lin 2387e2cb1decSSalil Mehta static void hclgevf_state_init(struct hclgevf_dev *hdev) 2388e2cb1decSSalil Mehta { 2389e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state); 2390e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2391d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2392e2cb1decSSalil Mehta 2393b3c3fe8eSYunsheng Lin INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task); 239435a1e503SSalil Mehta 2395e2cb1decSSalil Mehta mutex_init(&hdev->mbx_resp.mbx_mutex); 2396f28368bbSHuazhong Tan sema_init(&hdev->reset_sem, 1); 2397e2cb1decSSalil Mehta 2398ee4bcd3bSJian Shen spin_lock_init(&hdev->mac_table.mac_list_lock); 2399ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.uc_mac_list); 2400ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.mc_mac_list); 2401ee4bcd3bSJian Shen 2402e2cb1decSSalil Mehta /* bring the device down */ 2403e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2404e2cb1decSSalil Mehta } 2405e2cb1decSSalil Mehta 2406e2cb1decSSalil Mehta static void hclgevf_state_uninit(struct hclgevf_dev *hdev) 2407e2cb1decSSalil Mehta { 2408e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2409acfc3d55SHuazhong Tan set_bit(HCLGEVF_STATE_REMOVING, &hdev->state); 2410e2cb1decSSalil Mehta 2411b3c3fe8eSYunsheng Lin if (hdev->service_task.work.func) 2412b3c3fe8eSYunsheng Lin cancel_delayed_work_sync(&hdev->service_task); 2413e2cb1decSSalil Mehta 2414e2cb1decSSalil Mehta mutex_destroy(&hdev->mbx_resp.mbx_mutex); 2415e2cb1decSSalil Mehta } 2416e2cb1decSSalil Mehta 2417e2cb1decSSalil Mehta static int hclgevf_init_msi(struct hclgevf_dev *hdev) 2418e2cb1decSSalil Mehta { 2419e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2420e2cb1decSSalil Mehta int vectors; 2421e2cb1decSSalil Mehta int i; 2422e2cb1decSSalil Mehta 2423580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) 242407acf909SJian Shen vectors = pci_alloc_irq_vectors(pdev, 242507acf909SJian Shen hdev->roce_base_msix_offset + 1, 242607acf909SJian Shen hdev->num_msi, 242707acf909SJian Shen PCI_IRQ_MSIX); 242807acf909SJian Shen else 2429580a05f9SYonglong Liu vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM, 2430580a05f9SYonglong Liu hdev->num_msi, 2431e2cb1decSSalil Mehta PCI_IRQ_MSI | PCI_IRQ_MSIX); 243207acf909SJian Shen 2433e2cb1decSSalil Mehta if (vectors < 0) { 2434e2cb1decSSalil Mehta dev_err(&pdev->dev, 2435e2cb1decSSalil Mehta "failed(%d) to allocate MSI/MSI-X vectors\n", 2436e2cb1decSSalil Mehta vectors); 2437e2cb1decSSalil Mehta return vectors; 2438e2cb1decSSalil Mehta } 2439e2cb1decSSalil Mehta if (vectors < hdev->num_msi) 2440e2cb1decSSalil Mehta dev_warn(&hdev->pdev->dev, 2441adcf738bSGuojia Liao "requested %u MSI/MSI-X, but allocated %d MSI/MSI-X\n", 2442e2cb1decSSalil Mehta hdev->num_msi, vectors); 2443e2cb1decSSalil Mehta 2444e2cb1decSSalil Mehta hdev->num_msi = vectors; 2445e2cb1decSSalil Mehta hdev->num_msi_left = vectors; 2446580a05f9SYonglong Liu 2447e2cb1decSSalil Mehta hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi, 2448e2cb1decSSalil Mehta sizeof(u16), GFP_KERNEL); 2449e2cb1decSSalil Mehta if (!hdev->vector_status) { 2450e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2451e2cb1decSSalil Mehta return -ENOMEM; 2452e2cb1decSSalil Mehta } 2453e2cb1decSSalil Mehta 2454e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 2455e2cb1decSSalil Mehta hdev->vector_status[i] = HCLGEVF_INVALID_VPORT; 2456e2cb1decSSalil Mehta 2457e2cb1decSSalil Mehta hdev->vector_irq = devm_kcalloc(&pdev->dev, hdev->num_msi, 2458e2cb1decSSalil Mehta sizeof(int), GFP_KERNEL); 2459e2cb1decSSalil Mehta if (!hdev->vector_irq) { 2460862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2461e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2462e2cb1decSSalil Mehta return -ENOMEM; 2463e2cb1decSSalil Mehta } 2464e2cb1decSSalil Mehta 2465e2cb1decSSalil Mehta return 0; 2466e2cb1decSSalil Mehta } 2467e2cb1decSSalil Mehta 2468e2cb1decSSalil Mehta static void hclgevf_uninit_msi(struct hclgevf_dev *hdev) 2469e2cb1decSSalil Mehta { 2470e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2471e2cb1decSSalil Mehta 2472862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2473862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_irq); 2474e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2475e2cb1decSSalil Mehta } 2476e2cb1decSSalil Mehta 2477e2cb1decSSalil Mehta static int hclgevf_misc_irq_init(struct hclgevf_dev *hdev) 2478e2cb1decSSalil Mehta { 2479cdd332acSGuojia Liao int ret; 2480e2cb1decSSalil Mehta 2481e2cb1decSSalil Mehta hclgevf_get_misc_vector(hdev); 2482e2cb1decSSalil Mehta 2483f97c4d82SYonglong Liu snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s", 2484f97c4d82SYonglong Liu HCLGEVF_NAME, pci_name(hdev->pdev)); 2485e2cb1decSSalil Mehta ret = request_irq(hdev->misc_vector.vector_irq, hclgevf_misc_irq_handle, 2486f97c4d82SYonglong Liu 0, hdev->misc_vector.name, hdev); 2487e2cb1decSSalil Mehta if (ret) { 2488e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF failed to request misc irq(%d)\n", 2489e2cb1decSSalil Mehta hdev->misc_vector.vector_irq); 2490e2cb1decSSalil Mehta return ret; 2491e2cb1decSSalil Mehta } 2492e2cb1decSSalil Mehta 24931819e409SXi Wang hclgevf_clear_event_cause(hdev, 0); 24941819e409SXi Wang 2495e2cb1decSSalil Mehta /* enable misc. vector(vector 0) */ 2496e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2497e2cb1decSSalil Mehta 2498e2cb1decSSalil Mehta return ret; 2499e2cb1decSSalil Mehta } 2500e2cb1decSSalil Mehta 2501e2cb1decSSalil Mehta static void hclgevf_misc_irq_uninit(struct hclgevf_dev *hdev) 2502e2cb1decSSalil Mehta { 2503e2cb1decSSalil Mehta /* disable misc vector(vector 0) */ 2504e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 25051819e409SXi Wang synchronize_irq(hdev->misc_vector.vector_irq); 2506e2cb1decSSalil Mehta free_irq(hdev->misc_vector.vector_irq, hdev); 2507e2cb1decSSalil Mehta hclgevf_free_vector(hdev, 0); 2508e2cb1decSSalil Mehta } 2509e2cb1decSSalil Mehta 2510bb87be87SYonglong Liu static void hclgevf_info_show(struct hclgevf_dev *hdev) 2511bb87be87SYonglong Liu { 2512bb87be87SYonglong Liu struct device *dev = &hdev->pdev->dev; 2513bb87be87SYonglong Liu 2514bb87be87SYonglong Liu dev_info(dev, "VF info begin:\n"); 2515bb87be87SYonglong Liu 2516adcf738bSGuojia Liao dev_info(dev, "Task queue pairs numbers: %u\n", hdev->num_tqps); 2517adcf738bSGuojia Liao dev_info(dev, "Desc num per TX queue: %u\n", hdev->num_tx_desc); 2518adcf738bSGuojia Liao dev_info(dev, "Desc num per RX queue: %u\n", hdev->num_rx_desc); 2519adcf738bSGuojia Liao dev_info(dev, "Numbers of vports: %u\n", hdev->num_alloc_vport); 2520adcf738bSGuojia Liao dev_info(dev, "HW tc map: 0x%x\n", hdev->hw_tc_map); 2521adcf738bSGuojia Liao dev_info(dev, "PF media type of this VF: %u\n", 2522bb87be87SYonglong Liu hdev->hw.mac.media_type); 2523bb87be87SYonglong Liu 2524bb87be87SYonglong Liu dev_info(dev, "VF info end.\n"); 2525bb87be87SYonglong Liu } 2526bb87be87SYonglong Liu 25271db58f86SHuazhong Tan static int hclgevf_init_nic_client_instance(struct hnae3_ae_dev *ae_dev, 25281db58f86SHuazhong Tan struct hnae3_client *client) 25291db58f86SHuazhong Tan { 25301db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 25314cd5beaaSGuangbin Huang int rst_cnt = hdev->rst_stats.rst_cnt; 25321db58f86SHuazhong Tan int ret; 25331db58f86SHuazhong Tan 25341db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->nic); 25351db58f86SHuazhong Tan if (ret) 25361db58f86SHuazhong Tan return ret; 25371db58f86SHuazhong Tan 25381db58f86SHuazhong Tan set_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 25394cd5beaaSGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 25404cd5beaaSGuangbin Huang rst_cnt != hdev->rst_stats.rst_cnt) { 25414cd5beaaSGuangbin Huang clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 25424cd5beaaSGuangbin Huang 25434cd5beaaSGuangbin Huang client->ops->uninit_instance(&hdev->nic, 0); 25444cd5beaaSGuangbin Huang return -EBUSY; 25454cd5beaaSGuangbin Huang } 25464cd5beaaSGuangbin Huang 25471db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 25481db58f86SHuazhong Tan 25491db58f86SHuazhong Tan if (netif_msg_drv(&hdev->nic)) 25501db58f86SHuazhong Tan hclgevf_info_show(hdev); 25511db58f86SHuazhong Tan 25521db58f86SHuazhong Tan return 0; 25531db58f86SHuazhong Tan } 25541db58f86SHuazhong Tan 25551db58f86SHuazhong Tan static int hclgevf_init_roce_client_instance(struct hnae3_ae_dev *ae_dev, 25561db58f86SHuazhong Tan struct hnae3_client *client) 25571db58f86SHuazhong Tan { 25581db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 25591db58f86SHuazhong Tan int ret; 25601db58f86SHuazhong Tan 25611db58f86SHuazhong Tan if (!hnae3_dev_roce_supported(hdev) || !hdev->roce_client || 25621db58f86SHuazhong Tan !hdev->nic_client) 25631db58f86SHuazhong Tan return 0; 25641db58f86SHuazhong Tan 25651db58f86SHuazhong Tan ret = hclgevf_init_roce_base_info(hdev); 25661db58f86SHuazhong Tan if (ret) 25671db58f86SHuazhong Tan return ret; 25681db58f86SHuazhong Tan 25691db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->roce); 25701db58f86SHuazhong Tan if (ret) 25711db58f86SHuazhong Tan return ret; 25721db58f86SHuazhong Tan 2573fe735c84SHuazhong Tan set_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 25741db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 25751db58f86SHuazhong Tan 25761db58f86SHuazhong Tan return 0; 25771db58f86SHuazhong Tan } 25781db58f86SHuazhong Tan 2579e718a93fSPeng Li static int hclgevf_init_client_instance(struct hnae3_client *client, 2580e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2581e2cb1decSSalil Mehta { 2582e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2583e2cb1decSSalil Mehta int ret; 2584e2cb1decSSalil Mehta 2585e2cb1decSSalil Mehta switch (client->type) { 2586e2cb1decSSalil Mehta case HNAE3_CLIENT_KNIC: 2587e2cb1decSSalil Mehta hdev->nic_client = client; 2588e2cb1decSSalil Mehta hdev->nic.client = client; 2589e2cb1decSSalil Mehta 25901db58f86SHuazhong Tan ret = hclgevf_init_nic_client_instance(ae_dev, client); 2591e2cb1decSSalil Mehta if (ret) 259249dd8054SJian Shen goto clear_nic; 2593e2cb1decSSalil Mehta 25941db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, 25951db58f86SHuazhong Tan hdev->roce_client); 2596e2cb1decSSalil Mehta if (ret) 259749dd8054SJian Shen goto clear_roce; 2598d9f28fc2SJian Shen 2599e2cb1decSSalil Mehta break; 2600e2cb1decSSalil Mehta case HNAE3_CLIENT_ROCE: 2601544a7bcdSLijun Ou if (hnae3_dev_roce_supported(hdev)) { 2602e2cb1decSSalil Mehta hdev->roce_client = client; 2603e2cb1decSSalil Mehta hdev->roce.client = client; 2604544a7bcdSLijun Ou } 2605e2cb1decSSalil Mehta 26061db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, client); 2607e2cb1decSSalil Mehta if (ret) 260849dd8054SJian Shen goto clear_roce; 2609e2cb1decSSalil Mehta 2610fa7a4bd5SJian Shen break; 2611fa7a4bd5SJian Shen default: 2612fa7a4bd5SJian Shen return -EINVAL; 2613e2cb1decSSalil Mehta } 2614e2cb1decSSalil Mehta 2615e2cb1decSSalil Mehta return 0; 261649dd8054SJian Shen 261749dd8054SJian Shen clear_nic: 261849dd8054SJian Shen hdev->nic_client = NULL; 261949dd8054SJian Shen hdev->nic.client = NULL; 262049dd8054SJian Shen return ret; 262149dd8054SJian Shen clear_roce: 262249dd8054SJian Shen hdev->roce_client = NULL; 262349dd8054SJian Shen hdev->roce.client = NULL; 262449dd8054SJian Shen return ret; 2625e2cb1decSSalil Mehta } 2626e2cb1decSSalil Mehta 2627e718a93fSPeng Li static void hclgevf_uninit_client_instance(struct hnae3_client *client, 2628e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2629e2cb1decSSalil Mehta { 2630e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2631e718a93fSPeng Li 2632e2cb1decSSalil Mehta /* un-init roce, if it exists */ 263349dd8054SJian Shen if (hdev->roce_client) { 2634e140c798SYufeng Mo while (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) 2635e140c798SYufeng Mo msleep(HCLGEVF_WAIT_RESET_DONE); 2636fe735c84SHuazhong Tan clear_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 2637e140c798SYufeng Mo 2638e2cb1decSSalil Mehta hdev->roce_client->ops->uninit_instance(&hdev->roce, 0); 263949dd8054SJian Shen hdev->roce_client = NULL; 264049dd8054SJian Shen hdev->roce.client = NULL; 264149dd8054SJian Shen } 2642e2cb1decSSalil Mehta 2643e2cb1decSSalil Mehta /* un-init nic/unic, if this was not called by roce client */ 264449dd8054SJian Shen if (client->ops->uninit_instance && hdev->nic_client && 264549dd8054SJian Shen client->type != HNAE3_CLIENT_ROCE) { 2646e140c798SYufeng Mo while (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) 2647e140c798SYufeng Mo msleep(HCLGEVF_WAIT_RESET_DONE); 264825d1817cSHuazhong Tan clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 264925d1817cSHuazhong Tan 2650e2cb1decSSalil Mehta client->ops->uninit_instance(&hdev->nic, 0); 265149dd8054SJian Shen hdev->nic_client = NULL; 265249dd8054SJian Shen hdev->nic.client = NULL; 265349dd8054SJian Shen } 2654e2cb1decSSalil Mehta } 2655e2cb1decSSalil Mehta 265630ae7f8aSHuazhong Tan static int hclgevf_dev_mem_map(struct hclgevf_dev *hdev) 265730ae7f8aSHuazhong Tan { 265830ae7f8aSHuazhong Tan #define HCLGEVF_MEM_BAR 4 265930ae7f8aSHuazhong Tan 266030ae7f8aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 266130ae7f8aSHuazhong Tan struct hclgevf_hw *hw = &hdev->hw; 266230ae7f8aSHuazhong Tan 266330ae7f8aSHuazhong Tan /* for device does not have device memory, return directly */ 266430ae7f8aSHuazhong Tan if (!(pci_select_bars(pdev, IORESOURCE_MEM) & BIT(HCLGEVF_MEM_BAR))) 266530ae7f8aSHuazhong Tan return 0; 266630ae7f8aSHuazhong Tan 2667076bb537SJie Wang hw->hw.mem_base = 2668076bb537SJie Wang devm_ioremap_wc(&pdev->dev, 2669076bb537SJie Wang pci_resource_start(pdev, HCLGEVF_MEM_BAR), 267030ae7f8aSHuazhong Tan pci_resource_len(pdev, HCLGEVF_MEM_BAR)); 2671076bb537SJie Wang if (!hw->hw.mem_base) { 2672be419fcaSColin Ian King dev_err(&pdev->dev, "failed to map device memory\n"); 267330ae7f8aSHuazhong Tan return -EFAULT; 267430ae7f8aSHuazhong Tan } 267530ae7f8aSHuazhong Tan 267630ae7f8aSHuazhong Tan return 0; 267730ae7f8aSHuazhong Tan } 267830ae7f8aSHuazhong Tan 2679e2cb1decSSalil Mehta static int hclgevf_pci_init(struct hclgevf_dev *hdev) 2680e2cb1decSSalil Mehta { 2681e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2682e2cb1decSSalil Mehta struct hclgevf_hw *hw; 2683e2cb1decSSalil Mehta int ret; 2684e2cb1decSSalil Mehta 2685e2cb1decSSalil Mehta ret = pci_enable_device(pdev); 2686e2cb1decSSalil Mehta if (ret) { 2687e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed to enable PCI device\n"); 26883e249d3bSFuyun Liang return ret; 2689e2cb1decSSalil Mehta } 2690e2cb1decSSalil Mehta 2691e2cb1decSSalil Mehta ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 2692e2cb1decSSalil Mehta if (ret) { 2693e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't set consistent PCI DMA, exiting"); 2694e2cb1decSSalil Mehta goto err_disable_device; 2695e2cb1decSSalil Mehta } 2696e2cb1decSSalil Mehta 2697e2cb1decSSalil Mehta ret = pci_request_regions(pdev, HCLGEVF_DRIVER_NAME); 2698e2cb1decSSalil Mehta if (ret) { 2699e2cb1decSSalil Mehta dev_err(&pdev->dev, "PCI request regions failed %d\n", ret); 2700e2cb1decSSalil Mehta goto err_disable_device; 2701e2cb1decSSalil Mehta } 2702e2cb1decSSalil Mehta 2703e2cb1decSSalil Mehta pci_set_master(pdev); 2704e2cb1decSSalil Mehta hw = &hdev->hw; 2705076bb537SJie Wang hw->hw.io_base = pci_iomap(pdev, 2, 0); 2706076bb537SJie Wang if (!hw->hw.io_base) { 2707e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't map configuration register space\n"); 2708e2cb1decSSalil Mehta ret = -ENOMEM; 2709e2cb1decSSalil Mehta goto err_clr_master; 2710e2cb1decSSalil Mehta } 2711e2cb1decSSalil Mehta 271230ae7f8aSHuazhong Tan ret = hclgevf_dev_mem_map(hdev); 271330ae7f8aSHuazhong Tan if (ret) 271430ae7f8aSHuazhong Tan goto err_unmap_io_base; 271530ae7f8aSHuazhong Tan 2716e2cb1decSSalil Mehta return 0; 2717e2cb1decSSalil Mehta 271830ae7f8aSHuazhong Tan err_unmap_io_base: 2719076bb537SJie Wang pci_iounmap(pdev, hdev->hw.hw.io_base); 2720e2cb1decSSalil Mehta err_clr_master: 2721e2cb1decSSalil Mehta pci_clear_master(pdev); 2722e2cb1decSSalil Mehta pci_release_regions(pdev); 2723e2cb1decSSalil Mehta err_disable_device: 2724e2cb1decSSalil Mehta pci_disable_device(pdev); 27253e249d3bSFuyun Liang 2726e2cb1decSSalil Mehta return ret; 2727e2cb1decSSalil Mehta } 2728e2cb1decSSalil Mehta 2729e2cb1decSSalil Mehta static void hclgevf_pci_uninit(struct hclgevf_dev *hdev) 2730e2cb1decSSalil Mehta { 2731e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2732e2cb1decSSalil Mehta 2733076bb537SJie Wang if (hdev->hw.hw.mem_base) 2734076bb537SJie Wang devm_iounmap(&pdev->dev, hdev->hw.hw.mem_base); 273530ae7f8aSHuazhong Tan 2736076bb537SJie Wang pci_iounmap(pdev, hdev->hw.hw.io_base); 2737e2cb1decSSalil Mehta pci_clear_master(pdev); 2738e2cb1decSSalil Mehta pci_release_regions(pdev); 2739e2cb1decSSalil Mehta pci_disable_device(pdev); 2740e2cb1decSSalil Mehta } 2741e2cb1decSSalil Mehta 274207acf909SJian Shen static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 274307acf909SJian Shen { 274407acf909SJian Shen struct hclgevf_query_res_cmd *req; 27456befad60SJie Wang struct hclge_desc desc; 274607acf909SJian Shen int ret; 274707acf909SJian Shen 274807acf909SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_VF_RSRC, true); 274907acf909SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 275007acf909SJian Shen if (ret) { 275107acf909SJian Shen dev_err(&hdev->pdev->dev, 275207acf909SJian Shen "query vf resource failed, ret = %d.\n", ret); 275307acf909SJian Shen return ret; 275407acf909SJian Shen } 275507acf909SJian Shen 275607acf909SJian Shen req = (struct hclgevf_query_res_cmd *)desc.data; 275707acf909SJian Shen 2758580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) { 275907acf909SJian Shen hdev->roce_base_msix_offset = 276060df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee), 276107acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_M, 276207acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_S); 276307acf909SJian Shen hdev->num_roce_msix = 276460df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 276507acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 276607acf909SJian Shen 2767580a05f9SYonglong Liu /* nic's msix numbers is always equals to the roce's. */ 2768580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_roce_msix; 2769580a05f9SYonglong Liu 277007acf909SJian Shen /* VF should have NIC vectors and Roce vectors, NIC vectors 277107acf909SJian Shen * are queued before Roce vectors. The offset is fixed to 64. 277207acf909SJian Shen */ 277307acf909SJian Shen hdev->num_msi = hdev->num_roce_msix + 277407acf909SJian Shen hdev->roce_base_msix_offset; 277507acf909SJian Shen } else { 277607acf909SJian Shen hdev->num_msi = 277760df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 277807acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 2779580a05f9SYonglong Liu 2780580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_msi; 2781580a05f9SYonglong Liu } 2782580a05f9SYonglong Liu 2783580a05f9SYonglong Liu if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) { 2784580a05f9SYonglong Liu dev_err(&hdev->pdev->dev, 2785580a05f9SYonglong Liu "Just %u msi resources, not enough for vf(min:2).\n", 2786580a05f9SYonglong Liu hdev->num_nic_msix); 2787580a05f9SYonglong Liu return -EINVAL; 278807acf909SJian Shen } 278907acf909SJian Shen 279007acf909SJian Shen return 0; 279107acf909SJian Shen } 279207acf909SJian Shen 2793af2aedc5SGuangbin Huang static void hclgevf_set_default_dev_specs(struct hclgevf_dev *hdev) 2794af2aedc5SGuangbin Huang { 2795af2aedc5SGuangbin Huang #define HCLGEVF_MAX_NON_TSO_BD_NUM 8U 2796af2aedc5SGuangbin Huang 2797af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 2798af2aedc5SGuangbin Huang 2799af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = 2800af2aedc5SGuangbin Huang HCLGEVF_MAX_NON_TSO_BD_NUM; 2801af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 28027428d6c9SJie Wang ae_dev->dev_specs.rss_key_size = HCLGE_COMM_RSS_KEY_SIZE; 2803ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 2804e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; 2805af2aedc5SGuangbin Huang } 2806af2aedc5SGuangbin Huang 2807af2aedc5SGuangbin Huang static void hclgevf_parse_dev_specs(struct hclgevf_dev *hdev, 28086befad60SJie Wang struct hclge_desc *desc) 2809af2aedc5SGuangbin Huang { 2810af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 2811af2aedc5SGuangbin Huang struct hclgevf_dev_specs_0_cmd *req0; 2812ab16b49cSHuazhong Tan struct hclgevf_dev_specs_1_cmd *req1; 2813af2aedc5SGuangbin Huang 2814af2aedc5SGuangbin Huang req0 = (struct hclgevf_dev_specs_0_cmd *)desc[0].data; 2815ab16b49cSHuazhong Tan req1 = (struct hclgevf_dev_specs_1_cmd *)desc[1].data; 2816af2aedc5SGuangbin Huang 2817af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; 2818af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = 2819af2aedc5SGuangbin Huang le16_to_cpu(req0->rss_ind_tbl_size); 282091bfae25SHuazhong Tan ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); 2821af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size); 2822ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl); 2823e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size); 2824af2aedc5SGuangbin Huang } 2825af2aedc5SGuangbin Huang 282613297028SGuangbin Huang static void hclgevf_check_dev_specs(struct hclgevf_dev *hdev) 282713297028SGuangbin Huang { 282813297028SGuangbin Huang struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; 282913297028SGuangbin Huang 283013297028SGuangbin Huang if (!dev_specs->max_non_tso_bd_num) 283113297028SGuangbin Huang dev_specs->max_non_tso_bd_num = HCLGEVF_MAX_NON_TSO_BD_NUM; 283213297028SGuangbin Huang if (!dev_specs->rss_ind_tbl_size) 283313297028SGuangbin Huang dev_specs->rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 283413297028SGuangbin Huang if (!dev_specs->rss_key_size) 28357428d6c9SJie Wang dev_specs->rss_key_size = HCLGE_COMM_RSS_KEY_SIZE; 2836ab16b49cSHuazhong Tan if (!dev_specs->max_int_gl) 2837ab16b49cSHuazhong Tan dev_specs->max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 2838e070c8b9SYufeng Mo if (!dev_specs->max_frm_size) 2839e070c8b9SYufeng Mo dev_specs->max_frm_size = HCLGEVF_MAC_MAX_FRAME; 284013297028SGuangbin Huang } 284113297028SGuangbin Huang 2842af2aedc5SGuangbin Huang static int hclgevf_query_dev_specs(struct hclgevf_dev *hdev) 2843af2aedc5SGuangbin Huang { 28446befad60SJie Wang struct hclge_desc desc[HCLGEVF_QUERY_DEV_SPECS_BD_NUM]; 2845af2aedc5SGuangbin Huang int ret; 2846af2aedc5SGuangbin Huang int i; 2847af2aedc5SGuangbin Huang 2848af2aedc5SGuangbin Huang /* set default specifications as devices lower than version V3 do not 2849af2aedc5SGuangbin Huang * support querying specifications from firmware. 2850af2aedc5SGuangbin Huang */ 2851af2aedc5SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) { 2852af2aedc5SGuangbin Huang hclgevf_set_default_dev_specs(hdev); 2853af2aedc5SGuangbin Huang return 0; 2854af2aedc5SGuangbin Huang } 2855af2aedc5SGuangbin Huang 2856af2aedc5SGuangbin Huang for (i = 0; i < HCLGEVF_QUERY_DEV_SPECS_BD_NUM - 1; i++) { 2857af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], 2858af2aedc5SGuangbin Huang HCLGEVF_OPC_QUERY_DEV_SPECS, true); 2859cb413bfaSJie Wang desc[i].flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT); 2860af2aedc5SGuangbin Huang } 2861af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], HCLGEVF_OPC_QUERY_DEV_SPECS, 2862af2aedc5SGuangbin Huang true); 2863af2aedc5SGuangbin Huang 2864af2aedc5SGuangbin Huang ret = hclgevf_cmd_send(&hdev->hw, desc, HCLGEVF_QUERY_DEV_SPECS_BD_NUM); 2865af2aedc5SGuangbin Huang if (ret) 2866af2aedc5SGuangbin Huang return ret; 2867af2aedc5SGuangbin Huang 2868af2aedc5SGuangbin Huang hclgevf_parse_dev_specs(hdev, desc); 286913297028SGuangbin Huang hclgevf_check_dev_specs(hdev); 2870af2aedc5SGuangbin Huang 2871af2aedc5SGuangbin Huang return 0; 2872af2aedc5SGuangbin Huang } 2873af2aedc5SGuangbin Huang 2874862d969aSHuazhong Tan static int hclgevf_pci_reset(struct hclgevf_dev *hdev) 2875862d969aSHuazhong Tan { 2876862d969aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 2877862d969aSHuazhong Tan int ret = 0; 2878862d969aSHuazhong Tan 2879862d969aSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FULL_RESET && 2880862d969aSHuazhong Tan test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 2881862d969aSHuazhong Tan hclgevf_misc_irq_uninit(hdev); 2882862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 2883862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 2884862d969aSHuazhong Tan } 2885862d969aSHuazhong Tan 2886862d969aSHuazhong Tan if (!test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 2887862d969aSHuazhong Tan pci_set_master(pdev); 2888862d969aSHuazhong Tan ret = hclgevf_init_msi(hdev); 2889862d969aSHuazhong Tan if (ret) { 2890862d969aSHuazhong Tan dev_err(&pdev->dev, 2891862d969aSHuazhong Tan "failed(%d) to init MSI/MSI-X\n", ret); 2892862d969aSHuazhong Tan return ret; 2893862d969aSHuazhong Tan } 2894862d969aSHuazhong Tan 2895862d969aSHuazhong Tan ret = hclgevf_misc_irq_init(hdev); 2896862d969aSHuazhong Tan if (ret) { 2897862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 2898862d969aSHuazhong Tan dev_err(&pdev->dev, "failed(%d) to init Misc IRQ(vector0)\n", 2899862d969aSHuazhong Tan ret); 2900862d969aSHuazhong Tan return ret; 2901862d969aSHuazhong Tan } 2902862d969aSHuazhong Tan 2903862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 2904862d969aSHuazhong Tan } 2905862d969aSHuazhong Tan 2906862d969aSHuazhong Tan return ret; 2907862d969aSHuazhong Tan } 2908862d969aSHuazhong Tan 2909039ba863SJian Shen static int hclgevf_clear_vport_list(struct hclgevf_dev *hdev) 2910039ba863SJian Shen { 2911039ba863SJian Shen struct hclge_vf_to_pf_msg send_msg; 2912039ba863SJian Shen 2913039ba863SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_HANDLE_VF_TBL, 2914039ba863SJian Shen HCLGE_MBX_VPORT_LIST_CLEAR); 2915039ba863SJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2916039ba863SJian Shen } 2917039ba863SJian Shen 291879664077SHuazhong Tan static void hclgevf_init_rxd_adv_layout(struct hclgevf_dev *hdev) 291979664077SHuazhong Tan { 292079664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 292179664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 1); 292279664077SHuazhong Tan } 292379664077SHuazhong Tan 292479664077SHuazhong Tan static void hclgevf_uninit_rxd_adv_layout(struct hclgevf_dev *hdev) 292579664077SHuazhong Tan { 292679664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 292779664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 0); 292879664077SHuazhong Tan } 292979664077SHuazhong Tan 29309c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) 2931e2cb1decSSalil Mehta { 29327a01c897SSalil Mehta struct pci_dev *pdev = hdev->pdev; 2933e2cb1decSSalil Mehta int ret; 2934e2cb1decSSalil Mehta 2935862d969aSHuazhong Tan ret = hclgevf_pci_reset(hdev); 2936862d969aSHuazhong Tan if (ret) { 2937862d969aSHuazhong Tan dev_err(&pdev->dev, "pci reset failed %d\n", ret); 2938862d969aSHuazhong Tan return ret; 2939862d969aSHuazhong Tan } 2940862d969aSHuazhong Tan 2941cb413bfaSJie Wang hclgevf_arq_init(hdev); 2942cb413bfaSJie Wang ret = hclge_comm_cmd_init(hdev->ae_dev, &hdev->hw.hw, 2943cb413bfaSJie Wang &hdev->fw_version, false, 2944cb413bfaSJie Wang hdev->reset_pending); 29459c6f7085SHuazhong Tan if (ret) { 29469c6f7085SHuazhong Tan dev_err(&pdev->dev, "cmd failed %d\n", ret); 29479c6f7085SHuazhong Tan return ret; 29487a01c897SSalil Mehta } 2949e2cb1decSSalil Mehta 29509c6f7085SHuazhong Tan ret = hclgevf_rss_init_hw(hdev); 29519c6f7085SHuazhong Tan if (ret) { 29529c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 29539c6f7085SHuazhong Tan "failed(%d) to initialize RSS\n", ret); 29549c6f7085SHuazhong Tan return ret; 29559c6f7085SHuazhong Tan } 29569c6f7085SHuazhong Tan 29573462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 2958b26a6feaSPeng Li if (ret) 2959b26a6feaSPeng Li return ret; 2960b26a6feaSPeng Li 29619c6f7085SHuazhong Tan ret = hclgevf_init_vlan_config(hdev); 29629c6f7085SHuazhong Tan if (ret) { 29639c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 29649c6f7085SHuazhong Tan "failed(%d) to initialize VLAN config\n", ret); 29659c6f7085SHuazhong Tan return ret; 29669c6f7085SHuazhong Tan } 29679c6f7085SHuazhong Tan 2968c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 2969c631c696SJian Shen 297079664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 297179664077SHuazhong Tan 29729c6f7085SHuazhong Tan dev_info(&hdev->pdev->dev, "Reset done\n"); 29739c6f7085SHuazhong Tan 29749c6f7085SHuazhong Tan return 0; 29759c6f7085SHuazhong Tan } 29769c6f7085SHuazhong Tan 29779c6f7085SHuazhong Tan static int hclgevf_init_hdev(struct hclgevf_dev *hdev) 29789c6f7085SHuazhong Tan { 29799c6f7085SHuazhong Tan struct pci_dev *pdev = hdev->pdev; 29809c6f7085SHuazhong Tan int ret; 29819c6f7085SHuazhong Tan 2982e2cb1decSSalil Mehta ret = hclgevf_pci_init(hdev); 298360df7e91SHuazhong Tan if (ret) 2984e2cb1decSSalil Mehta return ret; 2985e2cb1decSSalil Mehta 2986cd624299SYufeng Mo ret = hclgevf_devlink_init(hdev); 2987cd624299SYufeng Mo if (ret) 2988cd624299SYufeng Mo goto err_devlink_init; 2989cd624299SYufeng Mo 2990cb413bfaSJie Wang ret = hclge_comm_cmd_queue_init(hdev->pdev, &hdev->hw.hw); 299160df7e91SHuazhong Tan if (ret) 29928b0195a3SHuazhong Tan goto err_cmd_queue_init; 29938b0195a3SHuazhong Tan 2994cb413bfaSJie Wang hclgevf_arq_init(hdev); 2995cb413bfaSJie Wang ret = hclge_comm_cmd_init(hdev->ae_dev, &hdev->hw.hw, 2996cb413bfaSJie Wang &hdev->fw_version, false, 2997cb413bfaSJie Wang hdev->reset_pending); 2998eddf0462SYunsheng Lin if (ret) 2999eddf0462SYunsheng Lin goto err_cmd_init; 3000eddf0462SYunsheng Lin 300107acf909SJian Shen /* Get vf resource */ 300207acf909SJian Shen ret = hclgevf_query_vf_resource(hdev); 300360df7e91SHuazhong Tan if (ret) 30048b0195a3SHuazhong Tan goto err_cmd_init; 300507acf909SJian Shen 3006af2aedc5SGuangbin Huang ret = hclgevf_query_dev_specs(hdev); 3007af2aedc5SGuangbin Huang if (ret) { 3008af2aedc5SGuangbin Huang dev_err(&pdev->dev, 3009af2aedc5SGuangbin Huang "failed to query dev specifications, ret = %d\n", ret); 3010af2aedc5SGuangbin Huang goto err_cmd_init; 3011af2aedc5SGuangbin Huang } 3012af2aedc5SGuangbin Huang 301307acf909SJian Shen ret = hclgevf_init_msi(hdev); 301407acf909SJian Shen if (ret) { 301507acf909SJian Shen dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret); 30168b0195a3SHuazhong Tan goto err_cmd_init; 301707acf909SJian Shen } 301807acf909SJian Shen 301907acf909SJian Shen hclgevf_state_init(hdev); 3020dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 3021afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 302207acf909SJian Shen 3023e2cb1decSSalil Mehta ret = hclgevf_misc_irq_init(hdev); 302460df7e91SHuazhong Tan if (ret) 3025e2cb1decSSalil Mehta goto err_misc_irq_init; 3026e2cb1decSSalil Mehta 3027862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3028862d969aSHuazhong Tan 3029e2cb1decSSalil Mehta ret = hclgevf_configure(hdev); 3030e2cb1decSSalil Mehta if (ret) { 3031e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to fetch configuration\n", ret); 3032e2cb1decSSalil Mehta goto err_config; 3033e2cb1decSSalil Mehta } 3034e2cb1decSSalil Mehta 3035e2cb1decSSalil Mehta ret = hclgevf_alloc_tqps(hdev); 3036e2cb1decSSalil Mehta if (ret) { 3037e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret); 3038e2cb1decSSalil Mehta goto err_config; 3039e2cb1decSSalil Mehta } 3040e2cb1decSSalil Mehta 3041e2cb1decSSalil Mehta ret = hclgevf_set_handle_info(hdev); 304260df7e91SHuazhong Tan if (ret) 3043e2cb1decSSalil Mehta goto err_config; 3044e2cb1decSSalil Mehta 30453462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 3046b26a6feaSPeng Li if (ret) 3047b26a6feaSPeng Li goto err_config; 3048b26a6feaSPeng Li 3049e2cb1decSSalil Mehta /* Initialize RSS for this VF */ 3050*93969dc1SJie Wang ret = hclge_comm_rss_init_cfg(&hdev->nic, hdev->ae_dev, 3051*93969dc1SJie Wang &hdev->rss_cfg); 305287ce161eSGuangbin Huang if (ret) { 305387ce161eSGuangbin Huang dev_err(&pdev->dev, "failed to init rss cfg, ret = %d\n", ret); 305487ce161eSGuangbin Huang goto err_config; 305587ce161eSGuangbin Huang } 305687ce161eSGuangbin Huang 3057e2cb1decSSalil Mehta ret = hclgevf_rss_init_hw(hdev); 3058e2cb1decSSalil Mehta if (ret) { 3059e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3060e2cb1decSSalil Mehta "failed(%d) to initialize RSS\n", ret); 3061e2cb1decSSalil Mehta goto err_config; 3062e2cb1decSSalil Mehta } 3063e2cb1decSSalil Mehta 3064039ba863SJian Shen /* ensure vf tbl list as empty before init*/ 3065039ba863SJian Shen ret = hclgevf_clear_vport_list(hdev); 3066039ba863SJian Shen if (ret) { 3067039ba863SJian Shen dev_err(&pdev->dev, 3068039ba863SJian Shen "failed to clear tbl list configuration, ret = %d.\n", 3069039ba863SJian Shen ret); 3070039ba863SJian Shen goto err_config; 3071039ba863SJian Shen } 3072039ba863SJian Shen 3073e2cb1decSSalil Mehta ret = hclgevf_init_vlan_config(hdev); 3074e2cb1decSSalil Mehta if (ret) { 3075e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3076e2cb1decSSalil Mehta "failed(%d) to initialize VLAN config\n", ret); 3077e2cb1decSSalil Mehta goto err_config; 3078e2cb1decSSalil Mehta } 3079e2cb1decSSalil Mehta 308079664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 308179664077SHuazhong Tan 30820251d196SGuangbin Huang set_bit(HCLGEVF_STATE_SERVICE_INITED, &hdev->state); 30830251d196SGuangbin Huang 30840742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 308508d80a4cSHuazhong Tan dev_info(&hdev->pdev->dev, "finished initializing %s driver\n", 308608d80a4cSHuazhong Tan HCLGEVF_DRIVER_NAME); 3087e2cb1decSSalil Mehta 3088ff200099SYunsheng Lin hclgevf_task_schedule(hdev, round_jiffies_relative(HZ)); 3089ff200099SYunsheng Lin 3090e2cb1decSSalil Mehta return 0; 3091e2cb1decSSalil Mehta 3092e2cb1decSSalil Mehta err_config: 3093e2cb1decSSalil Mehta hclgevf_misc_irq_uninit(hdev); 3094e2cb1decSSalil Mehta err_misc_irq_init: 3095e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 3096e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 309707acf909SJian Shen err_cmd_init: 30989970308fSJie Wang hclge_comm_cmd_uninit(hdev->ae_dev, &hdev->hw.hw); 30998b0195a3SHuazhong Tan err_cmd_queue_init: 3100cd624299SYufeng Mo hclgevf_devlink_uninit(hdev); 3101cd624299SYufeng Mo err_devlink_init: 3102e2cb1decSSalil Mehta hclgevf_pci_uninit(hdev); 3103862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3104e2cb1decSSalil Mehta return ret; 3105e2cb1decSSalil Mehta } 3106e2cb1decSSalil Mehta 31077a01c897SSalil Mehta static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev) 3108e2cb1decSSalil Mehta { 3109d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3110d3410018SYufeng Mo 3111e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 311279664077SHuazhong Tan hclgevf_uninit_rxd_adv_layout(hdev); 3113862d969aSHuazhong Tan 3114d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_VF_UNINIT, 0); 3115d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 311623b4201dSJian Shen 3117862d969aSHuazhong Tan if (test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3118eddf0462SYunsheng Lin hclgevf_misc_irq_uninit(hdev); 3119e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 31207a01c897SSalil Mehta } 31217a01c897SSalil Mehta 31229970308fSJie Wang hclge_comm_cmd_uninit(hdev->ae_dev, &hdev->hw.hw); 3123cd624299SYufeng Mo hclgevf_devlink_uninit(hdev); 3124e3364c5fSZenghui Yu hclgevf_pci_uninit(hdev); 3125ee4bcd3bSJian Shen hclgevf_uninit_mac_list(hdev); 3126862d969aSHuazhong Tan } 3127862d969aSHuazhong Tan 31287a01c897SSalil Mehta static int hclgevf_init_ae_dev(struct hnae3_ae_dev *ae_dev) 31297a01c897SSalil Mehta { 31307a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 31317a01c897SSalil Mehta int ret; 31327a01c897SSalil Mehta 31337a01c897SSalil Mehta ret = hclgevf_alloc_hdev(ae_dev); 31347a01c897SSalil Mehta if (ret) { 31357a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device allocation failed\n"); 31367a01c897SSalil Mehta return ret; 31377a01c897SSalil Mehta } 31387a01c897SSalil Mehta 31397a01c897SSalil Mehta ret = hclgevf_init_hdev(ae_dev->priv); 3140a6d818e3SYunsheng Lin if (ret) { 31417a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device initialization failed\n"); 31427a01c897SSalil Mehta return ret; 31437a01c897SSalil Mehta } 31447a01c897SSalil Mehta 3145a6d818e3SYunsheng Lin return 0; 3146a6d818e3SYunsheng Lin } 3147a6d818e3SYunsheng Lin 31487a01c897SSalil Mehta static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) 31497a01c897SSalil Mehta { 31507a01c897SSalil Mehta struct hclgevf_dev *hdev = ae_dev->priv; 31517a01c897SSalil Mehta 31527a01c897SSalil Mehta hclgevf_uninit_hdev(hdev); 3153e2cb1decSSalil Mehta ae_dev->priv = NULL; 3154e2cb1decSSalil Mehta } 3155e2cb1decSSalil Mehta 3156849e4607SPeng Li static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev) 3157849e4607SPeng Li { 3158849e4607SPeng Li struct hnae3_handle *nic = &hdev->nic; 3159849e4607SPeng Li struct hnae3_knic_private_info *kinfo = &nic->kinfo; 3160849e4607SPeng Li 31618be73621SHuazhong Tan return min_t(u32, hdev->rss_size_max, 316235244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 3163849e4607SPeng Li } 3164849e4607SPeng Li 3165849e4607SPeng Li /** 3166849e4607SPeng Li * hclgevf_get_channels - Get the current channels enabled and max supported. 3167849e4607SPeng Li * @handle: hardware information for network interface 3168849e4607SPeng Li * @ch: ethtool channels structure 3169849e4607SPeng Li * 3170849e4607SPeng Li * We don't support separate tx and rx queues as channels. The other count 3171849e4607SPeng Li * represents how many queues are being used for control. max_combined counts 3172849e4607SPeng Li * how many queue pairs we can support. They may not be mapped 1 to 1 with 3173849e4607SPeng Li * q_vectors since we support a lot more queue pairs than q_vectors. 3174849e4607SPeng Li **/ 3175849e4607SPeng Li static void hclgevf_get_channels(struct hnae3_handle *handle, 3176849e4607SPeng Li struct ethtool_channels *ch) 3177849e4607SPeng Li { 3178849e4607SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3179849e4607SPeng Li 3180849e4607SPeng Li ch->max_combined = hclgevf_get_max_channels(hdev); 3181849e4607SPeng Li ch->other_count = 0; 3182849e4607SPeng Li ch->max_other = 0; 31838be73621SHuazhong Tan ch->combined_count = handle->kinfo.rss_size; 3184849e4607SPeng Li } 3185849e4607SPeng Li 3186cc719218SPeng Li static void hclgevf_get_tqps_and_rss_info(struct hnae3_handle *handle, 31870d43bf45SHuazhong Tan u16 *alloc_tqps, u16 *max_rss_size) 3188cc719218SPeng Li { 3189cc719218SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3190cc719218SPeng Li 31910d43bf45SHuazhong Tan *alloc_tqps = hdev->num_tqps; 3192cc719218SPeng Li *max_rss_size = hdev->rss_size_max; 3193cc719218SPeng Li } 3194cc719218SPeng Li 31954093d1a2SGuangbin Huang static void hclgevf_update_rss_size(struct hnae3_handle *handle, 31964093d1a2SGuangbin Huang u32 new_tqps_num) 31974093d1a2SGuangbin Huang { 31984093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 31994093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 32004093d1a2SGuangbin Huang u16 max_rss_size; 32014093d1a2SGuangbin Huang 32024093d1a2SGuangbin Huang kinfo->req_rss_size = new_tqps_num; 32034093d1a2SGuangbin Huang 32044093d1a2SGuangbin Huang max_rss_size = min_t(u16, hdev->rss_size_max, 320535244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 32064093d1a2SGuangbin Huang 32074093d1a2SGuangbin Huang /* Use the user's configuration when it is not larger than 32084093d1a2SGuangbin Huang * max_rss_size, otherwise, use the maximum specification value. 32094093d1a2SGuangbin Huang */ 32104093d1a2SGuangbin Huang if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && 32114093d1a2SGuangbin Huang kinfo->req_rss_size <= max_rss_size) 32124093d1a2SGuangbin Huang kinfo->rss_size = kinfo->req_rss_size; 32134093d1a2SGuangbin Huang else if (kinfo->rss_size > max_rss_size || 32144093d1a2SGuangbin Huang (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) 32154093d1a2SGuangbin Huang kinfo->rss_size = max_rss_size; 32164093d1a2SGuangbin Huang 321735244430SJian Shen kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; 32184093d1a2SGuangbin Huang } 32194093d1a2SGuangbin Huang 32204093d1a2SGuangbin Huang static int hclgevf_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, 32214093d1a2SGuangbin Huang bool rxfh_configured) 32224093d1a2SGuangbin Huang { 32234093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 32244093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 3225*93969dc1SJie Wang u16 tc_offset[HCLGE_COMM_MAX_TC_NUM]; 3226*93969dc1SJie Wang u16 tc_valid[HCLGE_COMM_MAX_TC_NUM]; 3227*93969dc1SJie Wang u16 tc_size[HCLGE_COMM_MAX_TC_NUM]; 32284093d1a2SGuangbin Huang u16 cur_rss_size = kinfo->rss_size; 32294093d1a2SGuangbin Huang u16 cur_tqps = kinfo->num_tqps; 32304093d1a2SGuangbin Huang u32 *rss_indir; 32314093d1a2SGuangbin Huang unsigned int i; 32324093d1a2SGuangbin Huang int ret; 32334093d1a2SGuangbin Huang 32344093d1a2SGuangbin Huang hclgevf_update_rss_size(handle, new_tqps_num); 32354093d1a2SGuangbin Huang 3236*93969dc1SJie Wang hclge_comm_get_rss_tc_info(cur_rss_size, hdev->hw_tc_map, 3237*93969dc1SJie Wang tc_offset, tc_valid, tc_size); 3238*93969dc1SJie Wang ret = hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, 3239*93969dc1SJie Wang tc_valid, tc_size); 32404093d1a2SGuangbin Huang if (ret) 32414093d1a2SGuangbin Huang return ret; 32424093d1a2SGuangbin Huang 3243cd7e963dSSalil Mehta /* RSS indirection table has been configured by user */ 32444093d1a2SGuangbin Huang if (rxfh_configured) 32454093d1a2SGuangbin Huang goto out; 32464093d1a2SGuangbin Huang 32474093d1a2SGuangbin Huang /* Reinitializes the rss indirect table according to the new RSS size */ 324887ce161eSGuangbin Huang rss_indir = kcalloc(hdev->ae_dev->dev_specs.rss_ind_tbl_size, 324987ce161eSGuangbin Huang sizeof(u32), GFP_KERNEL); 32504093d1a2SGuangbin Huang if (!rss_indir) 32514093d1a2SGuangbin Huang return -ENOMEM; 32524093d1a2SGuangbin Huang 325387ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 32544093d1a2SGuangbin Huang rss_indir[i] = i % kinfo->rss_size; 32554093d1a2SGuangbin Huang 3256944de484SGuojia Liao hdev->rss_cfg.rss_size = kinfo->rss_size; 3257944de484SGuojia Liao 32584093d1a2SGuangbin Huang ret = hclgevf_set_rss(handle, rss_indir, NULL, 0); 32594093d1a2SGuangbin Huang if (ret) 32604093d1a2SGuangbin Huang dev_err(&hdev->pdev->dev, "set rss indir table fail, ret=%d\n", 32614093d1a2SGuangbin Huang ret); 32624093d1a2SGuangbin Huang 32634093d1a2SGuangbin Huang kfree(rss_indir); 32644093d1a2SGuangbin Huang 32654093d1a2SGuangbin Huang out: 32664093d1a2SGuangbin Huang if (!ret) 32674093d1a2SGuangbin Huang dev_info(&hdev->pdev->dev, 32684093d1a2SGuangbin Huang "Channels changed, rss_size from %u to %u, tqps from %u to %u", 32694093d1a2SGuangbin Huang cur_rss_size, kinfo->rss_size, 327035244430SJian Shen cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc); 32714093d1a2SGuangbin Huang 32724093d1a2SGuangbin Huang return ret; 32734093d1a2SGuangbin Huang } 32744093d1a2SGuangbin Huang 3275175ec96bSFuyun Liang static int hclgevf_get_status(struct hnae3_handle *handle) 3276175ec96bSFuyun Liang { 3277175ec96bSFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3278175ec96bSFuyun Liang 3279175ec96bSFuyun Liang return hdev->hw.mac.link; 3280175ec96bSFuyun Liang } 3281175ec96bSFuyun Liang 32824a152de9SFuyun Liang static void hclgevf_get_ksettings_an_result(struct hnae3_handle *handle, 32834a152de9SFuyun Liang u8 *auto_neg, u32 *speed, 32844a152de9SFuyun Liang u8 *duplex) 32854a152de9SFuyun Liang { 32864a152de9SFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 32874a152de9SFuyun Liang 32884a152de9SFuyun Liang if (speed) 32894a152de9SFuyun Liang *speed = hdev->hw.mac.speed; 32904a152de9SFuyun Liang if (duplex) 32914a152de9SFuyun Liang *duplex = hdev->hw.mac.duplex; 32924a152de9SFuyun Liang if (auto_neg) 32934a152de9SFuyun Liang *auto_neg = AUTONEG_DISABLE; 32944a152de9SFuyun Liang } 32954a152de9SFuyun Liang 32964a152de9SFuyun Liang void hclgevf_update_speed_duplex(struct hclgevf_dev *hdev, u32 speed, 32974a152de9SFuyun Liang u8 duplex) 32984a152de9SFuyun Liang { 32994a152de9SFuyun Liang hdev->hw.mac.speed = speed; 33004a152de9SFuyun Liang hdev->hw.mac.duplex = duplex; 33014a152de9SFuyun Liang } 33024a152de9SFuyun Liang 33031731be4cSYonglong Liu static int hclgevf_gro_en(struct hnae3_handle *handle, bool enable) 33045c9f6b39SPeng Li { 33055c9f6b39SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 33063462207dSYufeng Mo bool gro_en_old = hdev->gro_en; 33073462207dSYufeng Mo int ret; 33085c9f6b39SPeng Li 33093462207dSYufeng Mo hdev->gro_en = enable; 33103462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 33113462207dSYufeng Mo if (ret) 33123462207dSYufeng Mo hdev->gro_en = gro_en_old; 33133462207dSYufeng Mo 33143462207dSYufeng Mo return ret; 33155c9f6b39SPeng Li } 33165c9f6b39SPeng Li 331788d10bd6SJian Shen static void hclgevf_get_media_type(struct hnae3_handle *handle, u8 *media_type, 331888d10bd6SJian Shen u8 *module_type) 3319c136b884SPeng Li { 3320c136b884SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 332188d10bd6SJian Shen 3322c136b884SPeng Li if (media_type) 3323c136b884SPeng Li *media_type = hdev->hw.mac.media_type; 332488d10bd6SJian Shen 332588d10bd6SJian Shen if (module_type) 332688d10bd6SJian Shen *module_type = hdev->hw.mac.module_type; 3327c136b884SPeng Li } 3328c136b884SPeng Li 33294d60291bSHuazhong Tan static bool hclgevf_get_hw_reset_stat(struct hnae3_handle *handle) 33304d60291bSHuazhong Tan { 33314d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 33324d60291bSHuazhong Tan 3333aa5c4f17SHuazhong Tan return !!hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 33344d60291bSHuazhong Tan } 33354d60291bSHuazhong Tan 3336fe735c84SHuazhong Tan static bool hclgevf_get_cmdq_stat(struct hnae3_handle *handle) 3337fe735c84SHuazhong Tan { 3338fe735c84SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3339fe735c84SHuazhong Tan 3340076bb537SJie Wang return test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state); 3341fe735c84SHuazhong Tan } 3342fe735c84SHuazhong Tan 33434d60291bSHuazhong Tan static bool hclgevf_ae_dev_resetting(struct hnae3_handle *handle) 33444d60291bSHuazhong Tan { 33454d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 33464d60291bSHuazhong Tan 33474d60291bSHuazhong Tan return test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 33484d60291bSHuazhong Tan } 33494d60291bSHuazhong Tan 33504d60291bSHuazhong Tan static unsigned long hclgevf_ae_dev_reset_cnt(struct hnae3_handle *handle) 33514d60291bSHuazhong Tan { 33524d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 33534d60291bSHuazhong Tan 3354c88a6e7dSHuazhong Tan return hdev->rst_stats.hw_rst_done_cnt; 33554d60291bSHuazhong Tan } 33564d60291bSHuazhong Tan 33579194d18bSliuzhongzhu static void hclgevf_get_link_mode(struct hnae3_handle *handle, 33589194d18bSliuzhongzhu unsigned long *supported, 33599194d18bSliuzhongzhu unsigned long *advertising) 33609194d18bSliuzhongzhu { 33619194d18bSliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 33629194d18bSliuzhongzhu 33639194d18bSliuzhongzhu *supported = hdev->hw.mac.supported; 33649194d18bSliuzhongzhu *advertising = hdev->hw.mac.advertising; 33659194d18bSliuzhongzhu } 33669194d18bSliuzhongzhu 33671600c3e5SJian Shen #define MAX_SEPARATE_NUM 4 3368e407efddSHuazhong Tan #define SEPARATOR_VALUE 0xFDFCFBFA 33691600c3e5SJian Shen #define REG_NUM_PER_LINE 4 33701600c3e5SJian Shen #define REG_LEN_PER_LINE (REG_NUM_PER_LINE * sizeof(u32)) 33711600c3e5SJian Shen 33721600c3e5SJian Shen static int hclgevf_get_regs_len(struct hnae3_handle *handle) 33731600c3e5SJian Shen { 33741600c3e5SJian Shen int cmdq_lines, common_lines, ring_lines, tqp_intr_lines; 33751600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 33761600c3e5SJian Shen 33771600c3e5SJian Shen cmdq_lines = sizeof(cmdq_reg_addr_list) / REG_LEN_PER_LINE + 1; 33781600c3e5SJian Shen common_lines = sizeof(common_reg_addr_list) / REG_LEN_PER_LINE + 1; 33791600c3e5SJian Shen ring_lines = sizeof(ring_reg_addr_list) / REG_LEN_PER_LINE + 1; 33801600c3e5SJian Shen tqp_intr_lines = sizeof(tqp_intr_reg_addr_list) / REG_LEN_PER_LINE + 1; 33811600c3e5SJian Shen 33821600c3e5SJian Shen return (cmdq_lines + common_lines + ring_lines * hdev->num_tqps + 33831600c3e5SJian Shen tqp_intr_lines * (hdev->num_msi_used - 1)) * REG_LEN_PER_LINE; 33841600c3e5SJian Shen } 33851600c3e5SJian Shen 33861600c3e5SJian Shen static void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version, 33871600c3e5SJian Shen void *data) 33881600c3e5SJian Shen { 33891600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 33901600c3e5SJian Shen int i, j, reg_um, separator_num; 33911600c3e5SJian Shen u32 *reg = data; 33921600c3e5SJian Shen 33931600c3e5SJian Shen *version = hdev->fw_version; 33941600c3e5SJian Shen 33951600c3e5SJian Shen /* fetching per-VF registers values from VF PCIe register space */ 33961600c3e5SJian Shen reg_um = sizeof(cmdq_reg_addr_list) / sizeof(u32); 33971600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 33981600c3e5SJian Shen for (i = 0; i < reg_um; i++) 33991600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]); 34001600c3e5SJian Shen for (i = 0; i < separator_num; i++) 34011600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 34021600c3e5SJian Shen 34031600c3e5SJian Shen reg_um = sizeof(common_reg_addr_list) / sizeof(u32); 34041600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 34051600c3e5SJian Shen for (i = 0; i < reg_um; i++) 34061600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]); 34071600c3e5SJian Shen for (i = 0; i < separator_num; i++) 34081600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 34091600c3e5SJian Shen 34101600c3e5SJian Shen reg_um = sizeof(ring_reg_addr_list) / sizeof(u32); 34111600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 34121600c3e5SJian Shen for (j = 0; j < hdev->num_tqps; j++) { 34131600c3e5SJian Shen for (i = 0; i < reg_um; i++) 34141600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 34151600c3e5SJian Shen ring_reg_addr_list[i] + 34161600c3e5SJian Shen 0x200 * j); 34171600c3e5SJian Shen for (i = 0; i < separator_num; i++) 34181600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 34191600c3e5SJian Shen } 34201600c3e5SJian Shen 34211600c3e5SJian Shen reg_um = sizeof(tqp_intr_reg_addr_list) / sizeof(u32); 34221600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 34231600c3e5SJian Shen for (j = 0; j < hdev->num_msi_used - 1; j++) { 34241600c3e5SJian Shen for (i = 0; i < reg_um; i++) 34251600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 34261600c3e5SJian Shen tqp_intr_reg_addr_list[i] + 34271600c3e5SJian Shen 4 * j); 34281600c3e5SJian Shen for (i = 0; i < separator_num; i++) 34291600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 34301600c3e5SJian Shen } 34311600c3e5SJian Shen } 34321600c3e5SJian Shen 343392f11ea1SJian Shen void hclgevf_update_port_base_vlan_info(struct hclgevf_dev *hdev, u16 state, 343492f11ea1SJian Shen u8 *port_base_vlan_info, u8 data_size) 343592f11ea1SJian Shen { 343692f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 3437d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3438a6f7bfdcSJian Shen int ret; 343992f11ea1SJian Shen 344092f11ea1SJian Shen rtnl_lock(); 3441a6f7bfdcSJian Shen 3442b7b5d25bSGuojia Liao if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 3443b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) { 3444a6f7bfdcSJian Shen dev_warn(&hdev->pdev->dev, 3445a6f7bfdcSJian Shen "is resetting when updating port based vlan info\n"); 344692f11ea1SJian Shen rtnl_unlock(); 3447a6f7bfdcSJian Shen return; 3448a6f7bfdcSJian Shen } 3449a6f7bfdcSJian Shen 3450a6f7bfdcSJian Shen ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 3451a6f7bfdcSJian Shen if (ret) { 3452a6f7bfdcSJian Shen rtnl_unlock(); 3453a6f7bfdcSJian Shen return; 3454a6f7bfdcSJian Shen } 345592f11ea1SJian Shen 345692f11ea1SJian Shen /* send msg to PF and wait update port based vlan info */ 3457d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 3458d3410018SYufeng Mo HCLGE_MBX_PORT_BASE_VLAN_CFG); 3459d3410018SYufeng Mo memcpy(send_msg.data, port_base_vlan_info, data_size); 3460a6f7bfdcSJian Shen ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3461a6f7bfdcSJian Shen if (!ret) { 346292f11ea1SJian Shen if (state == HNAE3_PORT_BASE_VLAN_DISABLE) 3463a6f7bfdcSJian Shen nic->port_base_vlan_state = state; 346492f11ea1SJian Shen else 346592f11ea1SJian Shen nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE; 3466a6f7bfdcSJian Shen } 346792f11ea1SJian Shen 346892f11ea1SJian Shen hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 346992f11ea1SJian Shen rtnl_unlock(); 347092f11ea1SJian Shen } 347192f11ea1SJian Shen 3472e2cb1decSSalil Mehta static const struct hnae3_ae_ops hclgevf_ops = { 3473e2cb1decSSalil Mehta .init_ae_dev = hclgevf_init_ae_dev, 3474e2cb1decSSalil Mehta .uninit_ae_dev = hclgevf_uninit_ae_dev, 3475bb1890d5SJiaran Zhang .reset_prepare = hclgevf_reset_prepare_general, 3476bb1890d5SJiaran Zhang .reset_done = hclgevf_reset_done, 3477e718a93fSPeng Li .init_client_instance = hclgevf_init_client_instance, 3478e718a93fSPeng Li .uninit_client_instance = hclgevf_uninit_client_instance, 3479e2cb1decSSalil Mehta .start = hclgevf_ae_start, 3480e2cb1decSSalil Mehta .stop = hclgevf_ae_stop, 3481a6d818e3SYunsheng Lin .client_start = hclgevf_client_start, 3482a6d818e3SYunsheng Lin .client_stop = hclgevf_client_stop, 3483e2cb1decSSalil Mehta .map_ring_to_vector = hclgevf_map_ring_to_vector, 3484e2cb1decSSalil Mehta .unmap_ring_from_vector = hclgevf_unmap_ring_from_vector, 3485e2cb1decSSalil Mehta .get_vector = hclgevf_get_vector, 34860d3e6631SYunsheng Lin .put_vector = hclgevf_put_vector, 3487e2cb1decSSalil Mehta .reset_queue = hclgevf_reset_tqp, 3488e2cb1decSSalil Mehta .get_mac_addr = hclgevf_get_mac_addr, 3489e2cb1decSSalil Mehta .set_mac_addr = hclgevf_set_mac_addr, 3490e2cb1decSSalil Mehta .add_uc_addr = hclgevf_add_uc_addr, 3491e2cb1decSSalil Mehta .rm_uc_addr = hclgevf_rm_uc_addr, 3492e2cb1decSSalil Mehta .add_mc_addr = hclgevf_add_mc_addr, 3493e2cb1decSSalil Mehta .rm_mc_addr = hclgevf_rm_mc_addr, 3494e2cb1decSSalil Mehta .get_stats = hclgevf_get_stats, 3495e2cb1decSSalil Mehta .update_stats = hclgevf_update_stats, 3496e2cb1decSSalil Mehta .get_strings = hclgevf_get_strings, 3497e2cb1decSSalil Mehta .get_sset_count = hclgevf_get_sset_count, 3498027733b1SJie Wang .get_rss_key_size = hclge_comm_get_rss_key_size, 3499e2cb1decSSalil Mehta .get_rss = hclgevf_get_rss, 3500e2cb1decSSalil Mehta .set_rss = hclgevf_set_rss, 3501d97b3072SJian Shen .get_rss_tuple = hclgevf_get_rss_tuple, 3502d97b3072SJian Shen .set_rss_tuple = hclgevf_set_rss_tuple, 3503e2cb1decSSalil Mehta .get_tc_size = hclgevf_get_tc_size, 3504e2cb1decSSalil Mehta .get_fw_version = hclgevf_get_fw_version, 3505e2cb1decSSalil Mehta .set_vlan_filter = hclgevf_set_vlan_filter, 3506fa6a262aSJian Shen .enable_vlan_filter = hclgevf_enable_vlan_filter, 3507b2641e2aSYunsheng Lin .enable_hw_strip_rxvtag = hclgevf_en_hw_strip_rxvtag, 35086d4c3981SSalil Mehta .reset_event = hclgevf_reset_event, 3509720bd583SHuazhong Tan .set_default_reset_request = hclgevf_set_def_reset_request, 35104093d1a2SGuangbin Huang .set_channels = hclgevf_set_channels, 3511849e4607SPeng Li .get_channels = hclgevf_get_channels, 3512cc719218SPeng Li .get_tqps_and_rss_info = hclgevf_get_tqps_and_rss_info, 35131600c3e5SJian Shen .get_regs_len = hclgevf_get_regs_len, 35141600c3e5SJian Shen .get_regs = hclgevf_get_regs, 3515175ec96bSFuyun Liang .get_status = hclgevf_get_status, 35164a152de9SFuyun Liang .get_ksettings_an_result = hclgevf_get_ksettings_an_result, 3517c136b884SPeng Li .get_media_type = hclgevf_get_media_type, 35184d60291bSHuazhong Tan .get_hw_reset_stat = hclgevf_get_hw_reset_stat, 35194d60291bSHuazhong Tan .ae_dev_resetting = hclgevf_ae_dev_resetting, 35204d60291bSHuazhong Tan .ae_dev_reset_cnt = hclgevf_ae_dev_reset_cnt, 35215c9f6b39SPeng Li .set_gro_en = hclgevf_gro_en, 3522818f1675SYunsheng Lin .set_mtu = hclgevf_set_mtu, 35230c29d191Sliuzhongzhu .get_global_queue_id = hclgevf_get_qid_global, 35248cdb992fSJian Shen .set_timer_task = hclgevf_set_timer_task, 35259194d18bSliuzhongzhu .get_link_mode = hclgevf_get_link_mode, 3526e196ec75SJian Shen .set_promisc_mode = hclgevf_set_promisc_mode, 3527c631c696SJian Shen .request_update_promisc_mode = hclgevf_request_update_promisc_mode, 3528fe735c84SHuazhong Tan .get_cmdq_stat = hclgevf_get_cmdq_stat, 3529e2cb1decSSalil Mehta }; 3530e2cb1decSSalil Mehta 3531e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf = { 3532e2cb1decSSalil Mehta .ops = &hclgevf_ops, 3533e2cb1decSSalil Mehta .pdev_id_table = ae_algovf_pci_tbl, 3534e2cb1decSSalil Mehta }; 3535e2cb1decSSalil Mehta 3536e2cb1decSSalil Mehta static int hclgevf_init(void) 3537e2cb1decSSalil Mehta { 3538e2cb1decSSalil Mehta pr_info("%s is initializing\n", HCLGEVF_NAME); 3539e2cb1decSSalil Mehta 3540f29da408SYufeng Mo hclgevf_wq = alloc_workqueue("%s", WQ_UNBOUND, 0, HCLGEVF_NAME); 35410ea68902SYunsheng Lin if (!hclgevf_wq) { 35420ea68902SYunsheng Lin pr_err("%s: failed to create workqueue\n", HCLGEVF_NAME); 35430ea68902SYunsheng Lin return -ENOMEM; 35440ea68902SYunsheng Lin } 35450ea68902SYunsheng Lin 3546854cf33aSFuyun Liang hnae3_register_ae_algo(&ae_algovf); 3547854cf33aSFuyun Liang 3548854cf33aSFuyun Liang return 0; 3549e2cb1decSSalil Mehta } 3550e2cb1decSSalil Mehta 3551e2cb1decSSalil Mehta static void hclgevf_exit(void) 3552e2cb1decSSalil Mehta { 3553e2cb1decSSalil Mehta hnae3_unregister_ae_algo(&ae_algovf); 35540ea68902SYunsheng Lin destroy_workqueue(hclgevf_wq); 3555e2cb1decSSalil Mehta } 3556e2cb1decSSalil Mehta module_init(hclgevf_init); 3557e2cb1decSSalil Mehta module_exit(hclgevf_exit); 3558e2cb1decSSalil Mehta 3559e2cb1decSSalil Mehta MODULE_LICENSE("GPL"); 3560e2cb1decSSalil Mehta MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 3561e2cb1decSSalil Mehta MODULE_DESCRIPTION("HCLGEVF Driver"); 3562e2cb1decSSalil Mehta MODULE_VERSION(HCLGEVF_MOD_VERSION); 3563