1e2cb1decSSalil Mehta // SPDX-License-Identifier: GPL-2.0+ 2e2cb1decSSalil Mehta // Copyright (c) 2016-2017 Hisilicon Limited. 3e2cb1decSSalil Mehta 4e2cb1decSSalil Mehta #include <linux/etherdevice.h> 5aa5c4f17SHuazhong Tan #include <linux/iopoll.h> 66988eb2aSSalil Mehta #include <net/rtnetlink.h> 7e2cb1decSSalil Mehta #include "hclgevf_cmd.h" 8e2cb1decSSalil Mehta #include "hclgevf_main.h" 9e2cb1decSSalil Mehta #include "hclge_mbx.h" 10e2cb1decSSalil Mehta #include "hnae3.h" 11e2cb1decSSalil Mehta 12e2cb1decSSalil Mehta #define HCLGEVF_NAME "hclgevf" 13e2cb1decSSalil Mehta 14bbe6540eSHuazhong Tan #define HCLGEVF_RESET_MAX_FAIL_CNT 5 15bbe6540eSHuazhong Tan 169c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev); 175e7414cdSJian Shen static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 185e7414cdSJian Shen unsigned long delay); 195e7414cdSJian Shen 20e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf; 21e2cb1decSSalil Mehta 220ea68902SYunsheng Lin static struct workqueue_struct *hclgevf_wq; 230ea68902SYunsheng Lin 24e2cb1decSSalil Mehta static const struct pci_device_id ae_algovf_pci_tbl[] = { 25c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_VF), 0}, 26c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF), 27c155e22bSGuangbin Huang HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 28e2cb1decSSalil Mehta /* required last entry */ 29e2cb1decSSalil Mehta {0, } 30e2cb1decSSalil Mehta }; 31e2cb1decSSalil Mehta 32472d7eceSJian Shen static const u8 hclgevf_hash_key[] = { 33472d7eceSJian Shen 0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2, 34472d7eceSJian Shen 0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0, 35472d7eceSJian Shen 0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4, 36472d7eceSJian Shen 0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C, 37472d7eceSJian Shen 0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA 38472d7eceSJian Shen }; 39472d7eceSJian Shen 402f550a46SYunsheng Lin MODULE_DEVICE_TABLE(pci, ae_algovf_pci_tbl); 412f550a46SYunsheng Lin 421600c3e5SJian Shen static const u32 cmdq_reg_addr_list[] = {HCLGEVF_CMDQ_TX_ADDR_L_REG, 431600c3e5SJian Shen HCLGEVF_CMDQ_TX_ADDR_H_REG, 441600c3e5SJian Shen HCLGEVF_CMDQ_TX_DEPTH_REG, 451600c3e5SJian Shen HCLGEVF_CMDQ_TX_TAIL_REG, 461600c3e5SJian Shen HCLGEVF_CMDQ_TX_HEAD_REG, 471600c3e5SJian Shen HCLGEVF_CMDQ_RX_ADDR_L_REG, 481600c3e5SJian Shen HCLGEVF_CMDQ_RX_ADDR_H_REG, 491600c3e5SJian Shen HCLGEVF_CMDQ_RX_DEPTH_REG, 501600c3e5SJian Shen HCLGEVF_CMDQ_RX_TAIL_REG, 511600c3e5SJian Shen HCLGEVF_CMDQ_RX_HEAD_REG, 521600c3e5SJian Shen HCLGEVF_VECTOR0_CMDQ_SRC_REG, 539cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG, 541600c3e5SJian Shen HCLGEVF_CMDQ_INTR_EN_REG, 551600c3e5SJian Shen HCLGEVF_CMDQ_INTR_GEN_REG}; 561600c3e5SJian Shen 571600c3e5SJian Shen static const u32 common_reg_addr_list[] = {HCLGEVF_MISC_VECTOR_REG_BASE, 581600c3e5SJian Shen HCLGEVF_RST_ING, 591600c3e5SJian Shen HCLGEVF_GRO_EN_REG}; 601600c3e5SJian Shen 611600c3e5SJian Shen static const u32 ring_reg_addr_list[] = {HCLGEVF_RING_RX_ADDR_L_REG, 621600c3e5SJian Shen HCLGEVF_RING_RX_ADDR_H_REG, 631600c3e5SJian Shen HCLGEVF_RING_RX_BD_NUM_REG, 641600c3e5SJian Shen HCLGEVF_RING_RX_BD_LENGTH_REG, 651600c3e5SJian Shen HCLGEVF_RING_RX_MERGE_EN_REG, 661600c3e5SJian Shen HCLGEVF_RING_RX_TAIL_REG, 671600c3e5SJian Shen HCLGEVF_RING_RX_HEAD_REG, 681600c3e5SJian Shen HCLGEVF_RING_RX_FBD_NUM_REG, 691600c3e5SJian Shen HCLGEVF_RING_RX_OFFSET_REG, 701600c3e5SJian Shen HCLGEVF_RING_RX_FBD_OFFSET_REG, 711600c3e5SJian Shen HCLGEVF_RING_RX_STASH_REG, 721600c3e5SJian Shen HCLGEVF_RING_RX_BD_ERR_REG, 731600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_L_REG, 741600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_H_REG, 751600c3e5SJian Shen HCLGEVF_RING_TX_BD_NUM_REG, 761600c3e5SJian Shen HCLGEVF_RING_TX_PRIORITY_REG, 771600c3e5SJian Shen HCLGEVF_RING_TX_TC_REG, 781600c3e5SJian Shen HCLGEVF_RING_TX_MERGE_EN_REG, 791600c3e5SJian Shen HCLGEVF_RING_TX_TAIL_REG, 801600c3e5SJian Shen HCLGEVF_RING_TX_HEAD_REG, 811600c3e5SJian Shen HCLGEVF_RING_TX_FBD_NUM_REG, 821600c3e5SJian Shen HCLGEVF_RING_TX_OFFSET_REG, 831600c3e5SJian Shen HCLGEVF_RING_TX_EBD_NUM_REG, 841600c3e5SJian Shen HCLGEVF_RING_TX_EBD_OFFSET_REG, 851600c3e5SJian Shen HCLGEVF_RING_TX_BD_ERR_REG, 861600c3e5SJian Shen HCLGEVF_RING_EN_REG}; 871600c3e5SJian Shen 881600c3e5SJian Shen static const u32 tqp_intr_reg_addr_list[] = {HCLGEVF_TQP_INTR_CTRL_REG, 891600c3e5SJian Shen HCLGEVF_TQP_INTR_GL0_REG, 901600c3e5SJian Shen HCLGEVF_TQP_INTR_GL1_REG, 911600c3e5SJian Shen HCLGEVF_TQP_INTR_GL2_REG, 921600c3e5SJian Shen HCLGEVF_TQP_INTR_RL_REG}; 931600c3e5SJian Shen 949b2f3477SWeihang Li static struct hclgevf_dev *hclgevf_ae_get_hdev(struct hnae3_handle *handle) 95e2cb1decSSalil Mehta { 96eed9535fSPeng Li if (!handle->client) 97eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, nic); 98eed9535fSPeng Li else if (handle->client->type == HNAE3_CLIENT_ROCE) 99eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, roce); 100eed9535fSPeng Li else 101e2cb1decSSalil Mehta return container_of(handle, struct hclgevf_dev, nic); 102e2cb1decSSalil Mehta } 103e2cb1decSSalil Mehta 104e2cb1decSSalil Mehta static int hclgevf_tqps_update_stats(struct hnae3_handle *handle) 105e2cb1decSSalil Mehta { 106b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 107e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 108e2cb1decSSalil Mehta struct hclgevf_desc desc; 109e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 110e2cb1decSSalil Mehta int status; 111e2cb1decSSalil Mehta int i; 112e2cb1decSSalil Mehta 113b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 114b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 115e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, 116e2cb1decSSalil Mehta HCLGEVF_OPC_QUERY_RX_STATUS, 117e2cb1decSSalil Mehta true); 118e2cb1decSSalil Mehta 119e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 120e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 121e2cb1decSSalil Mehta if (status) { 122e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 123e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 124e2cb1decSSalil Mehta status, i); 125e2cb1decSSalil Mehta return status; 126e2cb1decSSalil Mehta } 127e2cb1decSSalil Mehta tqp->tqp_stats.rcb_rx_ring_pktnum_rcd += 128cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 129e2cb1decSSalil Mehta 130e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_TX_STATUS, 131e2cb1decSSalil Mehta true); 132e2cb1decSSalil Mehta 133e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 134e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 135e2cb1decSSalil Mehta if (status) { 136e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 137e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 138e2cb1decSSalil Mehta status, i); 139e2cb1decSSalil Mehta return status; 140e2cb1decSSalil Mehta } 141e2cb1decSSalil Mehta tqp->tqp_stats.rcb_tx_ring_pktnum_rcd += 142cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 143e2cb1decSSalil Mehta } 144e2cb1decSSalil Mehta 145e2cb1decSSalil Mehta return 0; 146e2cb1decSSalil Mehta } 147e2cb1decSSalil Mehta 148e2cb1decSSalil Mehta static u64 *hclgevf_tqps_get_stats(struct hnae3_handle *handle, u64 *data) 149e2cb1decSSalil Mehta { 150e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo = &handle->kinfo; 151e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 152e2cb1decSSalil Mehta u64 *buff = data; 153e2cb1decSSalil Mehta int i; 154e2cb1decSSalil Mehta 155b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 156b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 157e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_tx_ring_pktnum_rcd; 158e2cb1decSSalil Mehta } 159e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 160b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 161e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_rx_ring_pktnum_rcd; 162e2cb1decSSalil Mehta } 163e2cb1decSSalil Mehta 164e2cb1decSSalil Mehta return buff; 165e2cb1decSSalil Mehta } 166e2cb1decSSalil Mehta 167e2cb1decSSalil Mehta static int hclgevf_tqps_get_sset_count(struct hnae3_handle *handle, int strset) 168e2cb1decSSalil Mehta { 169b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 170e2cb1decSSalil Mehta 171b4f1d303SJian Shen return kinfo->num_tqps * 2; 172e2cb1decSSalil Mehta } 173e2cb1decSSalil Mehta 174e2cb1decSSalil Mehta static u8 *hclgevf_tqps_get_strings(struct hnae3_handle *handle, u8 *data) 175e2cb1decSSalil Mehta { 176b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 177e2cb1decSSalil Mehta u8 *buff = data; 1789d8d5a36SYufeng Mo int i; 179e2cb1decSSalil Mehta 180b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 181b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 182e2cb1decSSalil Mehta struct hclgevf_tqp, q); 183c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "txq%u_pktnum_rcd", 184e2cb1decSSalil Mehta tqp->index); 185e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 186e2cb1decSSalil Mehta } 187e2cb1decSSalil Mehta 188b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 189b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 190e2cb1decSSalil Mehta struct hclgevf_tqp, q); 191c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "rxq%u_pktnum_rcd", 192e2cb1decSSalil Mehta tqp->index); 193e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 194e2cb1decSSalil Mehta } 195e2cb1decSSalil Mehta 196e2cb1decSSalil Mehta return buff; 197e2cb1decSSalil Mehta } 198e2cb1decSSalil Mehta 199e2cb1decSSalil Mehta static void hclgevf_update_stats(struct hnae3_handle *handle, 200e2cb1decSSalil Mehta struct net_device_stats *net_stats) 201e2cb1decSSalil Mehta { 202e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 203e2cb1decSSalil Mehta int status; 204e2cb1decSSalil Mehta 205e2cb1decSSalil Mehta status = hclgevf_tqps_update_stats(handle); 206e2cb1decSSalil Mehta if (status) 207e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 208e2cb1decSSalil Mehta "VF update of TQPS stats fail, status = %d.\n", 209e2cb1decSSalil Mehta status); 210e2cb1decSSalil Mehta } 211e2cb1decSSalil Mehta 212e2cb1decSSalil Mehta static int hclgevf_get_sset_count(struct hnae3_handle *handle, int strset) 213e2cb1decSSalil Mehta { 214e2cb1decSSalil Mehta if (strset == ETH_SS_TEST) 215e2cb1decSSalil Mehta return -EOPNOTSUPP; 216e2cb1decSSalil Mehta else if (strset == ETH_SS_STATS) 217e2cb1decSSalil Mehta return hclgevf_tqps_get_sset_count(handle, strset); 218e2cb1decSSalil Mehta 219e2cb1decSSalil Mehta return 0; 220e2cb1decSSalil Mehta } 221e2cb1decSSalil Mehta 222e2cb1decSSalil Mehta static void hclgevf_get_strings(struct hnae3_handle *handle, u32 strset, 223e2cb1decSSalil Mehta u8 *data) 224e2cb1decSSalil Mehta { 225e2cb1decSSalil Mehta u8 *p = (char *)data; 226e2cb1decSSalil Mehta 227e2cb1decSSalil Mehta if (strset == ETH_SS_STATS) 228e2cb1decSSalil Mehta p = hclgevf_tqps_get_strings(handle, p); 229e2cb1decSSalil Mehta } 230e2cb1decSSalil Mehta 231e2cb1decSSalil Mehta static void hclgevf_get_stats(struct hnae3_handle *handle, u64 *data) 232e2cb1decSSalil Mehta { 233e2cb1decSSalil Mehta hclgevf_tqps_get_stats(handle, data); 234e2cb1decSSalil Mehta } 235e2cb1decSSalil Mehta 236d3410018SYufeng Mo static void hclgevf_build_send_msg(struct hclge_vf_to_pf_msg *msg, u8 code, 237d3410018SYufeng Mo u8 subcode) 238d3410018SYufeng Mo { 239d3410018SYufeng Mo if (msg) { 240d3410018SYufeng Mo memset(msg, 0, sizeof(struct hclge_vf_to_pf_msg)); 241d3410018SYufeng Mo msg->code = code; 242d3410018SYufeng Mo msg->subcode = subcode; 243d3410018SYufeng Mo } 244d3410018SYufeng Mo } 245d3410018SYufeng Mo 246e2cb1decSSalil Mehta static int hclgevf_get_tc_info(struct hclgevf_dev *hdev) 247e2cb1decSSalil Mehta { 248d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 249e2cb1decSSalil Mehta u8 resp_msg; 250e2cb1decSSalil Mehta int status; 251e2cb1decSSalil Mehta 252d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_TCINFO, 0); 253d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, 254d3410018SYufeng Mo sizeof(resp_msg)); 255e2cb1decSSalil Mehta if (status) { 256e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 257e2cb1decSSalil Mehta "VF request to get TC info from PF failed %d", 258e2cb1decSSalil Mehta status); 259e2cb1decSSalil Mehta return status; 260e2cb1decSSalil Mehta } 261e2cb1decSSalil Mehta 262e2cb1decSSalil Mehta hdev->hw_tc_map = resp_msg; 263e2cb1decSSalil Mehta 264e2cb1decSSalil Mehta return 0; 265e2cb1decSSalil Mehta } 266e2cb1decSSalil Mehta 26792f11ea1SJian Shen static int hclgevf_get_port_base_vlan_filter_state(struct hclgevf_dev *hdev) 26892f11ea1SJian Shen { 26992f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 270d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 27192f11ea1SJian Shen u8 resp_msg; 27292f11ea1SJian Shen int ret; 27392f11ea1SJian Shen 274d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 275d3410018SYufeng Mo HCLGE_MBX_GET_PORT_BASE_VLAN_STATE); 276d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, 277d3410018SYufeng Mo sizeof(u8)); 27892f11ea1SJian Shen if (ret) { 27992f11ea1SJian Shen dev_err(&hdev->pdev->dev, 28092f11ea1SJian Shen "VF request to get port based vlan state failed %d", 28192f11ea1SJian Shen ret); 28292f11ea1SJian Shen return ret; 28392f11ea1SJian Shen } 28492f11ea1SJian Shen 28592f11ea1SJian Shen nic->port_base_vlan_state = resp_msg; 28692f11ea1SJian Shen 28792f11ea1SJian Shen return 0; 28892f11ea1SJian Shen } 28992f11ea1SJian Shen 2906cee6fc3SJian Shen static int hclgevf_get_queue_info(struct hclgevf_dev *hdev) 291e2cb1decSSalil Mehta { 292c0425944SPeng Li #define HCLGEVF_TQPS_RSS_INFO_LEN 6 293d3410018SYufeng Mo #define HCLGEVF_TQPS_ALLOC_OFFSET 0 294d3410018SYufeng Mo #define HCLGEVF_TQPS_RSS_SIZE_OFFSET 2 295d3410018SYufeng Mo #define HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET 4 296d3410018SYufeng Mo 297e2cb1decSSalil Mehta u8 resp_msg[HCLGEVF_TQPS_RSS_INFO_LEN]; 298d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 299e2cb1decSSalil Mehta int status; 300e2cb1decSSalil Mehta 301d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QINFO, 0); 302d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 303e2cb1decSSalil Mehta HCLGEVF_TQPS_RSS_INFO_LEN); 304e2cb1decSSalil Mehta if (status) { 305e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 306e2cb1decSSalil Mehta "VF request to get tqp info from PF failed %d", 307e2cb1decSSalil Mehta status); 308e2cb1decSSalil Mehta return status; 309e2cb1decSSalil Mehta } 310e2cb1decSSalil Mehta 311d3410018SYufeng Mo memcpy(&hdev->num_tqps, &resp_msg[HCLGEVF_TQPS_ALLOC_OFFSET], 312d3410018SYufeng Mo sizeof(u16)); 313d3410018SYufeng Mo memcpy(&hdev->rss_size_max, &resp_msg[HCLGEVF_TQPS_RSS_SIZE_OFFSET], 314d3410018SYufeng Mo sizeof(u16)); 315d3410018SYufeng Mo memcpy(&hdev->rx_buf_len, &resp_msg[HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET], 316d3410018SYufeng Mo sizeof(u16)); 317c0425944SPeng Li 318c0425944SPeng Li return 0; 319c0425944SPeng Li } 320c0425944SPeng Li 321c0425944SPeng Li static int hclgevf_get_queue_depth(struct hclgevf_dev *hdev) 322c0425944SPeng Li { 323c0425944SPeng Li #define HCLGEVF_TQPS_DEPTH_INFO_LEN 4 324d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_TX_DESC_OFFSET 0 325d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_RX_DESC_OFFSET 2 326d3410018SYufeng Mo 327c0425944SPeng Li u8 resp_msg[HCLGEVF_TQPS_DEPTH_INFO_LEN]; 328d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 329c0425944SPeng Li int ret; 330c0425944SPeng Li 331d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QDEPTH, 0); 332d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 333c0425944SPeng Li HCLGEVF_TQPS_DEPTH_INFO_LEN); 334c0425944SPeng Li if (ret) { 335c0425944SPeng Li dev_err(&hdev->pdev->dev, 336c0425944SPeng Li "VF request to get tqp depth info from PF failed %d", 337c0425944SPeng Li ret); 338c0425944SPeng Li return ret; 339c0425944SPeng Li } 340c0425944SPeng Li 341d3410018SYufeng Mo memcpy(&hdev->num_tx_desc, &resp_msg[HCLGEVF_TQPS_NUM_TX_DESC_OFFSET], 342d3410018SYufeng Mo sizeof(u16)); 343d3410018SYufeng Mo memcpy(&hdev->num_rx_desc, &resp_msg[HCLGEVF_TQPS_NUM_RX_DESC_OFFSET], 344d3410018SYufeng Mo sizeof(u16)); 345e2cb1decSSalil Mehta 346e2cb1decSSalil Mehta return 0; 347e2cb1decSSalil Mehta } 348e2cb1decSSalil Mehta 3490c29d191Sliuzhongzhu static u16 hclgevf_get_qid_global(struct hnae3_handle *handle, u16 queue_id) 3500c29d191Sliuzhongzhu { 3510c29d191Sliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 352d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3530c29d191Sliuzhongzhu u16 qid_in_pf = 0; 354d3410018SYufeng Mo u8 resp_data[2]; 3550c29d191Sliuzhongzhu int ret; 3560c29d191Sliuzhongzhu 357d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QID_IN_PF, 0); 358d3410018SYufeng Mo memcpy(send_msg.data, &queue_id, sizeof(queue_id)); 359d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_data, 36063cbf7a9SYufeng Mo sizeof(resp_data)); 3610c29d191Sliuzhongzhu if (!ret) 3620c29d191Sliuzhongzhu qid_in_pf = *(u16 *)resp_data; 3630c29d191Sliuzhongzhu 3640c29d191Sliuzhongzhu return qid_in_pf; 3650c29d191Sliuzhongzhu } 3660c29d191Sliuzhongzhu 3679c3e7130Sliuzhongzhu static int hclgevf_get_pf_media_type(struct hclgevf_dev *hdev) 3689c3e7130Sliuzhongzhu { 369d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 37088d10bd6SJian Shen u8 resp_msg[2]; 3719c3e7130Sliuzhongzhu int ret; 3729c3e7130Sliuzhongzhu 373d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MEDIA_TYPE, 0); 374d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 375d3410018SYufeng Mo sizeof(resp_msg)); 3769c3e7130Sliuzhongzhu if (ret) { 3779c3e7130Sliuzhongzhu dev_err(&hdev->pdev->dev, 3789c3e7130Sliuzhongzhu "VF request to get the pf port media type failed %d", 3799c3e7130Sliuzhongzhu ret); 3809c3e7130Sliuzhongzhu return ret; 3819c3e7130Sliuzhongzhu } 3829c3e7130Sliuzhongzhu 38388d10bd6SJian Shen hdev->hw.mac.media_type = resp_msg[0]; 38488d10bd6SJian Shen hdev->hw.mac.module_type = resp_msg[1]; 3859c3e7130Sliuzhongzhu 3869c3e7130Sliuzhongzhu return 0; 3879c3e7130Sliuzhongzhu } 3889c3e7130Sliuzhongzhu 389e2cb1decSSalil Mehta static int hclgevf_alloc_tqps(struct hclgevf_dev *hdev) 390e2cb1decSSalil Mehta { 391e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 392e2cb1decSSalil Mehta int i; 393e2cb1decSSalil Mehta 394e2cb1decSSalil Mehta hdev->htqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps, 395e2cb1decSSalil Mehta sizeof(struct hclgevf_tqp), GFP_KERNEL); 396e2cb1decSSalil Mehta if (!hdev->htqp) 397e2cb1decSSalil Mehta return -ENOMEM; 398e2cb1decSSalil Mehta 399e2cb1decSSalil Mehta tqp = hdev->htqp; 400e2cb1decSSalil Mehta 401e2cb1decSSalil Mehta for (i = 0; i < hdev->num_tqps; i++) { 402e2cb1decSSalil Mehta tqp->dev = &hdev->pdev->dev; 403e2cb1decSSalil Mehta tqp->index = i; 404e2cb1decSSalil Mehta 405e2cb1decSSalil Mehta tqp->q.ae_algo = &ae_algovf; 406e2cb1decSSalil Mehta tqp->q.buf_size = hdev->rx_buf_len; 407c0425944SPeng Li tqp->q.tx_desc_num = hdev->num_tx_desc; 408c0425944SPeng Li tqp->q.rx_desc_num = hdev->num_rx_desc; 4099a5ef4aaSYonglong Liu 4109a5ef4aaSYonglong Liu /* need an extended offset to configure queues >= 4119a5ef4aaSYonglong Liu * HCLGEVF_TQP_MAX_SIZE_DEV_V2. 4129a5ef4aaSYonglong Liu */ 4139a5ef4aaSYonglong Liu if (i < HCLGEVF_TQP_MAX_SIZE_DEV_V2) 4149a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4159a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 416e2cb1decSSalil Mehta i * HCLGEVF_TQP_REG_SIZE; 4179a5ef4aaSYonglong Liu else 4189a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4199a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 4209a5ef4aaSYonglong Liu HCLGEVF_TQP_EXT_REG_OFFSET + 4219a5ef4aaSYonglong Liu (i - HCLGEVF_TQP_MAX_SIZE_DEV_V2) * 4229a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_SIZE; 423e2cb1decSSalil Mehta 424e2cb1decSSalil Mehta tqp++; 425e2cb1decSSalil Mehta } 426e2cb1decSSalil Mehta 427e2cb1decSSalil Mehta return 0; 428e2cb1decSSalil Mehta } 429e2cb1decSSalil Mehta 430e2cb1decSSalil Mehta static int hclgevf_knic_setup(struct hclgevf_dev *hdev) 431e2cb1decSSalil Mehta { 432e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 433e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo; 434e2cb1decSSalil Mehta u16 new_tqps = hdev->num_tqps; 435ebaf1908SWeihang Li unsigned int i; 43635244430SJian Shen u8 num_tc = 0; 437e2cb1decSSalil Mehta 438e2cb1decSSalil Mehta kinfo = &nic->kinfo; 439c0425944SPeng Li kinfo->num_tx_desc = hdev->num_tx_desc; 440c0425944SPeng Li kinfo->num_rx_desc = hdev->num_rx_desc; 441e2cb1decSSalil Mehta kinfo->rx_buf_len = hdev->rx_buf_len; 442e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) 443e2cb1decSSalil Mehta if (hdev->hw_tc_map & BIT(i)) 44435244430SJian Shen num_tc++; 445e2cb1decSSalil Mehta 44635244430SJian Shen num_tc = num_tc ? num_tc : 1; 44735244430SJian Shen kinfo->tc_info.num_tc = num_tc; 44835244430SJian Shen kinfo->rss_size = min_t(u16, hdev->rss_size_max, new_tqps / num_tc); 44935244430SJian Shen new_tqps = kinfo->rss_size * num_tc; 450e2cb1decSSalil Mehta kinfo->num_tqps = min(new_tqps, hdev->num_tqps); 451e2cb1decSSalil Mehta 452e2cb1decSSalil Mehta kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, 453e2cb1decSSalil Mehta sizeof(struct hnae3_queue *), GFP_KERNEL); 454e2cb1decSSalil Mehta if (!kinfo->tqp) 455e2cb1decSSalil Mehta return -ENOMEM; 456e2cb1decSSalil Mehta 457e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 458e2cb1decSSalil Mehta hdev->htqp[i].q.handle = &hdev->nic; 459e2cb1decSSalil Mehta hdev->htqp[i].q.tqp_index = i; 460e2cb1decSSalil Mehta kinfo->tqp[i] = &hdev->htqp[i].q; 461e2cb1decSSalil Mehta } 462e2cb1decSSalil Mehta 463580a05f9SYonglong Liu /* after init the max rss_size and tqps, adjust the default tqp numbers 464580a05f9SYonglong Liu * and rss size with the actual vector numbers 465580a05f9SYonglong Liu */ 466580a05f9SYonglong Liu kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); 46735244430SJian Shen kinfo->rss_size = min_t(u16, kinfo->num_tqps / num_tc, 468580a05f9SYonglong Liu kinfo->rss_size); 469580a05f9SYonglong Liu 470e2cb1decSSalil Mehta return 0; 471e2cb1decSSalil Mehta } 472e2cb1decSSalil Mehta 473e2cb1decSSalil Mehta static void hclgevf_request_link_info(struct hclgevf_dev *hdev) 474e2cb1decSSalil Mehta { 475d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 476e2cb1decSSalil Mehta int status; 477e2cb1decSSalil Mehta 478d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_STATUS, 0); 479d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 480e2cb1decSSalil Mehta if (status) 481e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 482e2cb1decSSalil Mehta "VF failed to fetch link status(%d) from PF", status); 483e2cb1decSSalil Mehta } 484e2cb1decSSalil Mehta 485e2cb1decSSalil Mehta void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state) 486e2cb1decSSalil Mehta { 48745e92b7eSPeng Li struct hnae3_handle *rhandle = &hdev->roce; 488e2cb1decSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 48945e92b7eSPeng Li struct hnae3_client *rclient; 490e2cb1decSSalil Mehta struct hnae3_client *client; 491e2cb1decSSalil Mehta 492ff200099SYunsheng Lin if (test_and_set_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state)) 493ff200099SYunsheng Lin return; 494ff200099SYunsheng Lin 495e2cb1decSSalil Mehta client = handle->client; 49645e92b7eSPeng Li rclient = hdev->roce_client; 497e2cb1decSSalil Mehta 498582d37bbSPeng Li link_state = 499582d37bbSPeng Li test_bit(HCLGEVF_STATE_DOWN, &hdev->state) ? 0 : link_state; 500e2cb1decSSalil Mehta if (link_state != hdev->hw.mac.link) { 501e2cb1decSSalil Mehta client->ops->link_status_change(handle, !!link_state); 50245e92b7eSPeng Li if (rclient && rclient->ops->link_status_change) 50345e92b7eSPeng Li rclient->ops->link_status_change(rhandle, !!link_state); 504e2cb1decSSalil Mehta hdev->hw.mac.link = link_state; 505e2cb1decSSalil Mehta } 506ff200099SYunsheng Lin 507ff200099SYunsheng Lin clear_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state); 508e2cb1decSSalil Mehta } 509e2cb1decSSalil Mehta 510538abaf3SYueHaibing static void hclgevf_update_link_mode(struct hclgevf_dev *hdev) 5119194d18bSliuzhongzhu { 5129194d18bSliuzhongzhu #define HCLGEVF_ADVERTISING 0 5139194d18bSliuzhongzhu #define HCLGEVF_SUPPORTED 1 5149194d18bSliuzhongzhu 515d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 516d3410018SYufeng Mo 517d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_MODE, 0); 518d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_ADVERTISING; 519d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 520d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_SUPPORTED; 521d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 5229194d18bSliuzhongzhu } 5239194d18bSliuzhongzhu 524e2cb1decSSalil Mehta static int hclgevf_set_handle_info(struct hclgevf_dev *hdev) 525e2cb1decSSalil Mehta { 526e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 527e2cb1decSSalil Mehta int ret; 528e2cb1decSSalil Mehta 529e2cb1decSSalil Mehta nic->ae_algo = &ae_algovf; 530e2cb1decSSalil Mehta nic->pdev = hdev->pdev; 531e2cb1decSSalil Mehta nic->numa_node_mask = hdev->numa_node_mask; 532424eb834SSalil Mehta nic->flags |= HNAE3_SUPPORT_VF; 533e2cb1decSSalil Mehta 534e2cb1decSSalil Mehta ret = hclgevf_knic_setup(hdev); 535e2cb1decSSalil Mehta if (ret) 536e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF knic setup failed %d\n", 537e2cb1decSSalil Mehta ret); 538e2cb1decSSalil Mehta return ret; 539e2cb1decSSalil Mehta } 540e2cb1decSSalil Mehta 541e2cb1decSSalil Mehta static void hclgevf_free_vector(struct hclgevf_dev *hdev, int vector_id) 542e2cb1decSSalil Mehta { 54336cbbdf6SPeng Li if (hdev->vector_status[vector_id] == HCLGEVF_INVALID_VPORT) { 54436cbbdf6SPeng Li dev_warn(&hdev->pdev->dev, 54536cbbdf6SPeng Li "vector(vector_id %d) has been freed.\n", vector_id); 54636cbbdf6SPeng Li return; 54736cbbdf6SPeng Li } 54836cbbdf6SPeng Li 549e2cb1decSSalil Mehta hdev->vector_status[vector_id] = HCLGEVF_INVALID_VPORT; 550e2cb1decSSalil Mehta hdev->num_msi_left += 1; 551e2cb1decSSalil Mehta hdev->num_msi_used -= 1; 552e2cb1decSSalil Mehta } 553e2cb1decSSalil Mehta 554e2cb1decSSalil Mehta static int hclgevf_get_vector(struct hnae3_handle *handle, u16 vector_num, 555e2cb1decSSalil Mehta struct hnae3_vector_info *vector_info) 556e2cb1decSSalil Mehta { 557e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 558e2cb1decSSalil Mehta struct hnae3_vector_info *vector = vector_info; 559e2cb1decSSalil Mehta int alloc = 0; 560e2cb1decSSalil Mehta int i, j; 561e2cb1decSSalil Mehta 562580a05f9SYonglong Liu vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num); 563e2cb1decSSalil Mehta vector_num = min(hdev->num_msi_left, vector_num); 564e2cb1decSSalil Mehta 565e2cb1decSSalil Mehta for (j = 0; j < vector_num; j++) { 566e2cb1decSSalil Mehta for (i = HCLGEVF_MISC_VECTOR_NUM + 1; i < hdev->num_msi; i++) { 567e2cb1decSSalil Mehta if (hdev->vector_status[i] == HCLGEVF_INVALID_VPORT) { 568e2cb1decSSalil Mehta vector->vector = pci_irq_vector(hdev->pdev, i); 569e2cb1decSSalil Mehta vector->io_addr = hdev->hw.io_base + 570e2cb1decSSalil Mehta HCLGEVF_VECTOR_REG_BASE + 571e2cb1decSSalil Mehta (i - 1) * HCLGEVF_VECTOR_REG_OFFSET; 572e2cb1decSSalil Mehta hdev->vector_status[i] = 0; 573e2cb1decSSalil Mehta hdev->vector_irq[i] = vector->vector; 574e2cb1decSSalil Mehta 575e2cb1decSSalil Mehta vector++; 576e2cb1decSSalil Mehta alloc++; 577e2cb1decSSalil Mehta 578e2cb1decSSalil Mehta break; 579e2cb1decSSalil Mehta } 580e2cb1decSSalil Mehta } 581e2cb1decSSalil Mehta } 582e2cb1decSSalil Mehta hdev->num_msi_left -= alloc; 583e2cb1decSSalil Mehta hdev->num_msi_used += alloc; 584e2cb1decSSalil Mehta 585e2cb1decSSalil Mehta return alloc; 586e2cb1decSSalil Mehta } 587e2cb1decSSalil Mehta 588e2cb1decSSalil Mehta static int hclgevf_get_vector_index(struct hclgevf_dev *hdev, int vector) 589e2cb1decSSalil Mehta { 590e2cb1decSSalil Mehta int i; 591e2cb1decSSalil Mehta 592e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 593e2cb1decSSalil Mehta if (vector == hdev->vector_irq[i]) 594e2cb1decSSalil Mehta return i; 595e2cb1decSSalil Mehta 596e2cb1decSSalil Mehta return -EINVAL; 597e2cb1decSSalil Mehta } 598e2cb1decSSalil Mehta 599374ad291SJian Shen static int hclgevf_set_rss_algo_key(struct hclgevf_dev *hdev, 600374ad291SJian Shen const u8 hfunc, const u8 *key) 601374ad291SJian Shen { 602374ad291SJian Shen struct hclgevf_rss_config_cmd *req; 603ebaf1908SWeihang Li unsigned int key_offset = 0; 604374ad291SJian Shen struct hclgevf_desc desc; 6053caf772bSYufeng Mo int key_counts; 606374ad291SJian Shen int key_size; 607374ad291SJian Shen int ret; 608374ad291SJian Shen 6093caf772bSYufeng Mo key_counts = HCLGEVF_RSS_KEY_SIZE; 610374ad291SJian Shen req = (struct hclgevf_rss_config_cmd *)desc.data; 611374ad291SJian Shen 6123caf772bSYufeng Mo while (key_counts) { 613374ad291SJian Shen hclgevf_cmd_setup_basic_desc(&desc, 614374ad291SJian Shen HCLGEVF_OPC_RSS_GENERIC_CONFIG, 615374ad291SJian Shen false); 616374ad291SJian Shen 617374ad291SJian Shen req->hash_config |= (hfunc & HCLGEVF_RSS_HASH_ALGO_MASK); 618374ad291SJian Shen req->hash_config |= 619374ad291SJian Shen (key_offset << HCLGEVF_RSS_HASH_KEY_OFFSET_B); 620374ad291SJian Shen 6213caf772bSYufeng Mo key_size = min(HCLGEVF_RSS_HASH_KEY_NUM, key_counts); 622374ad291SJian Shen memcpy(req->hash_key, 623374ad291SJian Shen key + key_offset * HCLGEVF_RSS_HASH_KEY_NUM, key_size); 624374ad291SJian Shen 6253caf772bSYufeng Mo key_counts -= key_size; 6263caf772bSYufeng Mo key_offset++; 627374ad291SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 628374ad291SJian Shen if (ret) { 629374ad291SJian Shen dev_err(&hdev->pdev->dev, 630374ad291SJian Shen "Configure RSS config fail, status = %d\n", 631374ad291SJian Shen ret); 632374ad291SJian Shen return ret; 633374ad291SJian Shen } 634374ad291SJian Shen } 635374ad291SJian Shen 636374ad291SJian Shen return 0; 637374ad291SJian Shen } 638374ad291SJian Shen 639e2cb1decSSalil Mehta static u32 hclgevf_get_rss_key_size(struct hnae3_handle *handle) 640e2cb1decSSalil Mehta { 641e2cb1decSSalil Mehta return HCLGEVF_RSS_KEY_SIZE; 642e2cb1decSSalil Mehta } 643e2cb1decSSalil Mehta 644e2cb1decSSalil Mehta static int hclgevf_set_rss_indir_table(struct hclgevf_dev *hdev) 645e2cb1decSSalil Mehta { 646e2cb1decSSalil Mehta const u8 *indir = hdev->rss_cfg.rss_indirection_tbl; 647e2cb1decSSalil Mehta struct hclgevf_rss_indirection_table_cmd *req; 648e2cb1decSSalil Mehta struct hclgevf_desc desc; 64987ce161eSGuangbin Huang int rss_cfg_tbl_num; 650e2cb1decSSalil Mehta int status; 651e2cb1decSSalil Mehta int i, j; 652e2cb1decSSalil Mehta 653e2cb1decSSalil Mehta req = (struct hclgevf_rss_indirection_table_cmd *)desc.data; 65487ce161eSGuangbin Huang rss_cfg_tbl_num = hdev->ae_dev->dev_specs.rss_ind_tbl_size / 65587ce161eSGuangbin Huang HCLGEVF_RSS_CFG_TBL_SIZE; 656e2cb1decSSalil Mehta 65787ce161eSGuangbin Huang for (i = 0; i < rss_cfg_tbl_num; i++) { 658e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INDIR_TABLE, 659e2cb1decSSalil Mehta false); 66055ff3ed5SJian Shen req->start_table_index = 66155ff3ed5SJian Shen cpu_to_le16(i * HCLGEVF_RSS_CFG_TBL_SIZE); 66255ff3ed5SJian Shen req->rss_set_bitmap = cpu_to_le16(HCLGEVF_RSS_SET_BITMAP_MSK); 663e2cb1decSSalil Mehta for (j = 0; j < HCLGEVF_RSS_CFG_TBL_SIZE; j++) 664e2cb1decSSalil Mehta req->rss_result[j] = 665e2cb1decSSalil Mehta indir[i * HCLGEVF_RSS_CFG_TBL_SIZE + j]; 666e2cb1decSSalil Mehta 667e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 668e2cb1decSSalil Mehta if (status) { 669e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 670e2cb1decSSalil Mehta "VF failed(=%d) to set RSS indirection table\n", 671e2cb1decSSalil Mehta status); 672e2cb1decSSalil Mehta return status; 673e2cb1decSSalil Mehta } 674e2cb1decSSalil Mehta } 675e2cb1decSSalil Mehta 676e2cb1decSSalil Mehta return 0; 677e2cb1decSSalil Mehta } 678e2cb1decSSalil Mehta 679e2cb1decSSalil Mehta static int hclgevf_set_rss_tc_mode(struct hclgevf_dev *hdev, u16 rss_size) 680e2cb1decSSalil Mehta { 681e2cb1decSSalil Mehta struct hclgevf_rss_tc_mode_cmd *req; 682e2cb1decSSalil Mehta u16 tc_offset[HCLGEVF_MAX_TC_NUM]; 683e2cb1decSSalil Mehta u16 tc_valid[HCLGEVF_MAX_TC_NUM]; 684e2cb1decSSalil Mehta u16 tc_size[HCLGEVF_MAX_TC_NUM]; 685e2cb1decSSalil Mehta struct hclgevf_desc desc; 686e2cb1decSSalil Mehta u16 roundup_size; 687ebaf1908SWeihang Li unsigned int i; 6882adb8187SHuazhong Tan int status; 689e2cb1decSSalil Mehta 690e2cb1decSSalil Mehta req = (struct hclgevf_rss_tc_mode_cmd *)desc.data; 691e2cb1decSSalil Mehta 692e2cb1decSSalil Mehta roundup_size = roundup_pow_of_two(rss_size); 693e2cb1decSSalil Mehta roundup_size = ilog2(roundup_size); 694e2cb1decSSalil Mehta 695e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 696e2cb1decSSalil Mehta tc_valid[i] = !!(hdev->hw_tc_map & BIT(i)); 697e2cb1decSSalil Mehta tc_size[i] = roundup_size; 698e2cb1decSSalil Mehta tc_offset[i] = rss_size * i; 699e2cb1decSSalil Mehta } 700e2cb1decSSalil Mehta 701e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_TC_MODE, false); 702e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 70355ff3ed5SJian Shen u16 mode = 0; 70455ff3ed5SJian Shen 70555ff3ed5SJian Shen hnae3_set_bit(mode, HCLGEVF_RSS_TC_VALID_B, 706e2cb1decSSalil Mehta (tc_valid[i] & 0x1)); 70755ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_SIZE_M, 708e2cb1decSSalil Mehta HCLGEVF_RSS_TC_SIZE_S, tc_size[i]); 70955ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_OFFSET_M, 710e2cb1decSSalil Mehta HCLGEVF_RSS_TC_OFFSET_S, tc_offset[i]); 71155ff3ed5SJian Shen 71255ff3ed5SJian Shen req->rss_tc_mode[i] = cpu_to_le16(mode); 713e2cb1decSSalil Mehta } 714e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 715e2cb1decSSalil Mehta if (status) 716e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 717e2cb1decSSalil Mehta "VF failed(=%d) to set rss tc mode\n", status); 718e2cb1decSSalil Mehta 719e2cb1decSSalil Mehta return status; 720e2cb1decSSalil Mehta } 721e2cb1decSSalil Mehta 722a638b1d8SJian Shen /* for revision 0x20, vf shared the same rss config with pf */ 723a638b1d8SJian Shen static int hclgevf_get_rss_hash_key(struct hclgevf_dev *hdev) 724a638b1d8SJian Shen { 725a638b1d8SJian Shen #define HCLGEVF_RSS_MBX_RESP_LEN 8 726a638b1d8SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 727a638b1d8SJian Shen u8 resp_msg[HCLGEVF_RSS_MBX_RESP_LEN]; 728d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 729a638b1d8SJian Shen u16 msg_num, hash_key_index; 730a638b1d8SJian Shen u8 index; 731a638b1d8SJian Shen int ret; 732a638b1d8SJian Shen 733d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_RSS_KEY, 0); 734a638b1d8SJian Shen msg_num = (HCLGEVF_RSS_KEY_SIZE + HCLGEVF_RSS_MBX_RESP_LEN - 1) / 735a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN; 736a638b1d8SJian Shen for (index = 0; index < msg_num; index++) { 737d3410018SYufeng Mo send_msg.data[0] = index; 738d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 739a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN); 740a638b1d8SJian Shen if (ret) { 741a638b1d8SJian Shen dev_err(&hdev->pdev->dev, 742a638b1d8SJian Shen "VF get rss hash key from PF failed, ret=%d", 743a638b1d8SJian Shen ret); 744a638b1d8SJian Shen return ret; 745a638b1d8SJian Shen } 746a638b1d8SJian Shen 747a638b1d8SJian Shen hash_key_index = HCLGEVF_RSS_MBX_RESP_LEN * index; 748a638b1d8SJian Shen if (index == msg_num - 1) 749a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 750a638b1d8SJian Shen &resp_msg[0], 751a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE - hash_key_index); 752a638b1d8SJian Shen else 753a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 754a638b1d8SJian Shen &resp_msg[0], HCLGEVF_RSS_MBX_RESP_LEN); 755a638b1d8SJian Shen } 756a638b1d8SJian Shen 757a638b1d8SJian Shen return 0; 758a638b1d8SJian Shen } 759a638b1d8SJian Shen 760e2cb1decSSalil Mehta static int hclgevf_get_rss(struct hnae3_handle *handle, u32 *indir, u8 *key, 761e2cb1decSSalil Mehta u8 *hfunc) 762e2cb1decSSalil Mehta { 763e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 764e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 765a638b1d8SJian Shen int i, ret; 766e2cb1decSSalil Mehta 767295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 768374ad291SJian Shen /* Get hash algorithm */ 769374ad291SJian Shen if (hfunc) { 770374ad291SJian Shen switch (rss_cfg->hash_algo) { 771374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_TOEPLITZ: 772374ad291SJian Shen *hfunc = ETH_RSS_HASH_TOP; 773374ad291SJian Shen break; 774374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_SIMPLE: 775374ad291SJian Shen *hfunc = ETH_RSS_HASH_XOR; 776374ad291SJian Shen break; 777374ad291SJian Shen default: 778374ad291SJian Shen *hfunc = ETH_RSS_HASH_UNKNOWN; 779374ad291SJian Shen break; 780374ad291SJian Shen } 781374ad291SJian Shen } 782374ad291SJian Shen 783374ad291SJian Shen /* Get the RSS Key required by the user */ 784374ad291SJian Shen if (key) 785374ad291SJian Shen memcpy(key, rss_cfg->rss_hash_key, 786374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 787a638b1d8SJian Shen } else { 788a638b1d8SJian Shen if (hfunc) 789a638b1d8SJian Shen *hfunc = ETH_RSS_HASH_TOP; 790a638b1d8SJian Shen if (key) { 791a638b1d8SJian Shen ret = hclgevf_get_rss_hash_key(hdev); 792a638b1d8SJian Shen if (ret) 793a638b1d8SJian Shen return ret; 794a638b1d8SJian Shen memcpy(key, rss_cfg->rss_hash_key, 795a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE); 796a638b1d8SJian Shen } 797374ad291SJian Shen } 798374ad291SJian Shen 799e2cb1decSSalil Mehta if (indir) 80087ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 801e2cb1decSSalil Mehta indir[i] = rss_cfg->rss_indirection_tbl[i]; 802e2cb1decSSalil Mehta 803374ad291SJian Shen return 0; 804e2cb1decSSalil Mehta } 805e2cb1decSSalil Mehta 806e2cb1decSSalil Mehta static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir, 807e2cb1decSSalil Mehta const u8 *key, const u8 hfunc) 808e2cb1decSSalil Mehta { 809e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 810e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 811374ad291SJian Shen int ret, i; 812374ad291SJian Shen 813295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 814374ad291SJian Shen /* Set the RSS Hash Key if specififed by the user */ 815374ad291SJian Shen if (key) { 816374ad291SJian Shen switch (hfunc) { 817374ad291SJian Shen case ETH_RSS_HASH_TOP: 818374ad291SJian Shen rss_cfg->hash_algo = 819374ad291SJian Shen HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 820374ad291SJian Shen break; 821374ad291SJian Shen case ETH_RSS_HASH_XOR: 822374ad291SJian Shen rss_cfg->hash_algo = 823374ad291SJian Shen HCLGEVF_RSS_HASH_ALGO_SIMPLE; 824374ad291SJian Shen break; 825374ad291SJian Shen case ETH_RSS_HASH_NO_CHANGE: 826374ad291SJian Shen break; 827374ad291SJian Shen default: 828374ad291SJian Shen return -EINVAL; 829374ad291SJian Shen } 830374ad291SJian Shen 831374ad291SJian Shen ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo, 832374ad291SJian Shen key); 833374ad291SJian Shen if (ret) 834374ad291SJian Shen return ret; 835374ad291SJian Shen 836374ad291SJian Shen /* Update the shadow RSS key with user specified qids */ 837374ad291SJian Shen memcpy(rss_cfg->rss_hash_key, key, 838374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 839374ad291SJian Shen } 840374ad291SJian Shen } 841e2cb1decSSalil Mehta 842e2cb1decSSalil Mehta /* update the shadow RSS table with user specified qids */ 84387ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 844e2cb1decSSalil Mehta rss_cfg->rss_indirection_tbl[i] = indir[i]; 845e2cb1decSSalil Mehta 846e2cb1decSSalil Mehta /* update the hardware */ 847e2cb1decSSalil Mehta return hclgevf_set_rss_indir_table(hdev); 848e2cb1decSSalil Mehta } 849e2cb1decSSalil Mehta 850d97b3072SJian Shen static u8 hclgevf_get_rss_hash_bits(struct ethtool_rxnfc *nfc) 851d97b3072SJian Shen { 852d97b3072SJian Shen u8 hash_sets = nfc->data & RXH_L4_B_0_1 ? HCLGEVF_S_PORT_BIT : 0; 853d97b3072SJian Shen 854d97b3072SJian Shen if (nfc->data & RXH_L4_B_2_3) 855d97b3072SJian Shen hash_sets |= HCLGEVF_D_PORT_BIT; 856d97b3072SJian Shen else 857d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_PORT_BIT; 858d97b3072SJian Shen 859d97b3072SJian Shen if (nfc->data & RXH_IP_SRC) 860d97b3072SJian Shen hash_sets |= HCLGEVF_S_IP_BIT; 861d97b3072SJian Shen else 862d97b3072SJian Shen hash_sets &= ~HCLGEVF_S_IP_BIT; 863d97b3072SJian Shen 864d97b3072SJian Shen if (nfc->data & RXH_IP_DST) 865d97b3072SJian Shen hash_sets |= HCLGEVF_D_IP_BIT; 866d97b3072SJian Shen else 867d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_IP_BIT; 868d97b3072SJian Shen 869d97b3072SJian Shen if (nfc->flow_type == SCTP_V4_FLOW || nfc->flow_type == SCTP_V6_FLOW) 870d97b3072SJian Shen hash_sets |= HCLGEVF_V_TAG_BIT; 871d97b3072SJian Shen 872d97b3072SJian Shen return hash_sets; 873d97b3072SJian Shen } 874d97b3072SJian Shen 8755fd0e7b4SHuazhong Tan static int hclgevf_init_rss_tuple_cmd(struct hnae3_handle *handle, 8765fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc, 8775fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req) 878d97b3072SJian Shen { 879d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 880d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 881d97b3072SJian Shen u8 tuple_sets; 882d97b3072SJian Shen 883d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 884d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 885d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 886d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 887d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 888d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 889d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 890d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 891d97b3072SJian Shen 892d97b3072SJian Shen tuple_sets = hclgevf_get_rss_hash_bits(nfc); 893d97b3072SJian Shen switch (nfc->flow_type) { 894d97b3072SJian Shen case TCP_V4_FLOW: 895d97b3072SJian Shen req->ipv4_tcp_en = tuple_sets; 896d97b3072SJian Shen break; 897d97b3072SJian Shen case TCP_V6_FLOW: 898d97b3072SJian Shen req->ipv6_tcp_en = tuple_sets; 899d97b3072SJian Shen break; 900d97b3072SJian Shen case UDP_V4_FLOW: 901d97b3072SJian Shen req->ipv4_udp_en = tuple_sets; 902d97b3072SJian Shen break; 903d97b3072SJian Shen case UDP_V6_FLOW: 904d97b3072SJian Shen req->ipv6_udp_en = tuple_sets; 905d97b3072SJian Shen break; 906d97b3072SJian Shen case SCTP_V4_FLOW: 907d97b3072SJian Shen req->ipv4_sctp_en = tuple_sets; 908d97b3072SJian Shen break; 909d97b3072SJian Shen case SCTP_V6_FLOW: 910ab6e32d2SJian Shen if (hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 && 911ab6e32d2SJian Shen (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3))) 912d97b3072SJian Shen return -EINVAL; 913d97b3072SJian Shen 914d97b3072SJian Shen req->ipv6_sctp_en = tuple_sets; 915d97b3072SJian Shen break; 916d97b3072SJian Shen case IPV4_FLOW: 917d97b3072SJian Shen req->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 918d97b3072SJian Shen break; 919d97b3072SJian Shen case IPV6_FLOW: 920d97b3072SJian Shen req->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 921d97b3072SJian Shen break; 922d97b3072SJian Shen default: 923d97b3072SJian Shen return -EINVAL; 924d97b3072SJian Shen } 925d97b3072SJian Shen 9265fd0e7b4SHuazhong Tan return 0; 9275fd0e7b4SHuazhong Tan } 9285fd0e7b4SHuazhong Tan 9295fd0e7b4SHuazhong Tan static int hclgevf_set_rss_tuple(struct hnae3_handle *handle, 9305fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc) 9315fd0e7b4SHuazhong Tan { 9325fd0e7b4SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 9335fd0e7b4SHuazhong Tan struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 9345fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req; 9355fd0e7b4SHuazhong Tan struct hclgevf_desc desc; 9365fd0e7b4SHuazhong Tan int ret; 9375fd0e7b4SHuazhong Tan 9385fd0e7b4SHuazhong Tan if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 9395fd0e7b4SHuazhong Tan return -EOPNOTSUPP; 9405fd0e7b4SHuazhong Tan 9415fd0e7b4SHuazhong Tan if (nfc->data & 9425fd0e7b4SHuazhong Tan ~(RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)) 9435fd0e7b4SHuazhong Tan return -EINVAL; 9445fd0e7b4SHuazhong Tan 9455fd0e7b4SHuazhong Tan req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 9465fd0e7b4SHuazhong Tan hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 9475fd0e7b4SHuazhong Tan 9485fd0e7b4SHuazhong Tan ret = hclgevf_init_rss_tuple_cmd(handle, nfc, req); 9495fd0e7b4SHuazhong Tan if (ret) { 9505fd0e7b4SHuazhong Tan dev_err(&hdev->pdev->dev, 9515fd0e7b4SHuazhong Tan "failed to init rss tuple cmd, ret = %d\n", ret); 9525fd0e7b4SHuazhong Tan return ret; 9535fd0e7b4SHuazhong Tan } 9545fd0e7b4SHuazhong Tan 955d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 956d97b3072SJian Shen if (ret) { 957d97b3072SJian Shen dev_err(&hdev->pdev->dev, 958d97b3072SJian Shen "Set rss tuple fail, status = %d\n", ret); 959d97b3072SJian Shen return ret; 960d97b3072SJian Shen } 961d97b3072SJian Shen 962d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_tcp_en = req->ipv4_tcp_en; 963d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_udp_en = req->ipv4_udp_en; 964d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_sctp_en = req->ipv4_sctp_en; 965d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_fragment_en = req->ipv4_fragment_en; 966d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_tcp_en = req->ipv6_tcp_en; 967d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_udp_en = req->ipv6_udp_en; 968d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_sctp_en = req->ipv6_sctp_en; 969d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_fragment_en = req->ipv6_fragment_en; 970d97b3072SJian Shen return 0; 971d97b3072SJian Shen } 972d97b3072SJian Shen 97373f7767eSJian Shen static int hclgevf_get_rss_tuple_by_flow_type(struct hclgevf_dev *hdev, 97473f7767eSJian Shen int flow_type, u8 *tuple_sets) 97573f7767eSJian Shen { 97673f7767eSJian Shen switch (flow_type) { 97773f7767eSJian Shen case TCP_V4_FLOW: 97873f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_tcp_en; 97973f7767eSJian Shen break; 98073f7767eSJian Shen case UDP_V4_FLOW: 98173f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_udp_en; 98273f7767eSJian Shen break; 98373f7767eSJian Shen case TCP_V6_FLOW: 98473f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_tcp_en; 98573f7767eSJian Shen break; 98673f7767eSJian Shen case UDP_V6_FLOW: 98773f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_udp_en; 98873f7767eSJian Shen break; 98973f7767eSJian Shen case SCTP_V4_FLOW: 99073f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_sctp_en; 99173f7767eSJian Shen break; 99273f7767eSJian Shen case SCTP_V6_FLOW: 99373f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_sctp_en; 99473f7767eSJian Shen break; 99573f7767eSJian Shen case IPV4_FLOW: 99673f7767eSJian Shen case IPV6_FLOW: 99773f7767eSJian Shen *tuple_sets = HCLGEVF_S_IP_BIT | HCLGEVF_D_IP_BIT; 99873f7767eSJian Shen break; 99973f7767eSJian Shen default: 100073f7767eSJian Shen return -EINVAL; 100173f7767eSJian Shen } 100273f7767eSJian Shen 100373f7767eSJian Shen return 0; 100473f7767eSJian Shen } 100573f7767eSJian Shen 100673f7767eSJian Shen static u64 hclgevf_convert_rss_tuple(u8 tuple_sets) 100773f7767eSJian Shen { 100873f7767eSJian Shen u64 tuple_data = 0; 100973f7767eSJian Shen 101073f7767eSJian Shen if (tuple_sets & HCLGEVF_D_PORT_BIT) 101173f7767eSJian Shen tuple_data |= RXH_L4_B_2_3; 101273f7767eSJian Shen if (tuple_sets & HCLGEVF_S_PORT_BIT) 101373f7767eSJian Shen tuple_data |= RXH_L4_B_0_1; 101473f7767eSJian Shen if (tuple_sets & HCLGEVF_D_IP_BIT) 101573f7767eSJian Shen tuple_data |= RXH_IP_DST; 101673f7767eSJian Shen if (tuple_sets & HCLGEVF_S_IP_BIT) 101773f7767eSJian Shen tuple_data |= RXH_IP_SRC; 101873f7767eSJian Shen 101973f7767eSJian Shen return tuple_data; 102073f7767eSJian Shen } 102173f7767eSJian Shen 1022d97b3072SJian Shen static int hclgevf_get_rss_tuple(struct hnae3_handle *handle, 1023d97b3072SJian Shen struct ethtool_rxnfc *nfc) 1024d97b3072SJian Shen { 1025d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1026d97b3072SJian Shen u8 tuple_sets; 102773f7767eSJian Shen int ret; 1028d97b3072SJian Shen 1029295ba232SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 1030d97b3072SJian Shen return -EOPNOTSUPP; 1031d97b3072SJian Shen 1032d97b3072SJian Shen nfc->data = 0; 1033d97b3072SJian Shen 103473f7767eSJian Shen ret = hclgevf_get_rss_tuple_by_flow_type(hdev, nfc->flow_type, 103573f7767eSJian Shen &tuple_sets); 103673f7767eSJian Shen if (ret || !tuple_sets) 103773f7767eSJian Shen return ret; 1038d97b3072SJian Shen 103973f7767eSJian Shen nfc->data = hclgevf_convert_rss_tuple(tuple_sets); 1040d97b3072SJian Shen 1041d97b3072SJian Shen return 0; 1042d97b3072SJian Shen } 1043d97b3072SJian Shen 1044d97b3072SJian Shen static int hclgevf_set_rss_input_tuple(struct hclgevf_dev *hdev, 1045d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg) 1046d97b3072SJian Shen { 1047d97b3072SJian Shen struct hclgevf_rss_input_tuple_cmd *req; 1048d97b3072SJian Shen struct hclgevf_desc desc; 1049d97b3072SJian Shen int ret; 1050d97b3072SJian Shen 1051d97b3072SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 1052d97b3072SJian Shen 1053d97b3072SJian Shen req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 1054d97b3072SJian Shen 1055d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 1056d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 1057d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 1058d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 1059d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 1060d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 1061d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 1062d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 1063d97b3072SJian Shen 1064d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 1065d97b3072SJian Shen if (ret) 1066d97b3072SJian Shen dev_err(&hdev->pdev->dev, 1067d97b3072SJian Shen "Configure rss input fail, status = %d\n", ret); 1068d97b3072SJian Shen return ret; 1069d97b3072SJian Shen } 1070d97b3072SJian Shen 1071e2cb1decSSalil Mehta static int hclgevf_get_tc_size(struct hnae3_handle *handle) 1072e2cb1decSSalil Mehta { 1073e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1074e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 1075e2cb1decSSalil Mehta 1076e2cb1decSSalil Mehta return rss_cfg->rss_size; 1077e2cb1decSSalil Mehta } 1078e2cb1decSSalil Mehta 1079e2cb1decSSalil Mehta static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en, 1080b204bc74SPeng Li int vector_id, 1081e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1082e2cb1decSSalil Mehta { 1083e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1084d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1085e2cb1decSSalil Mehta struct hnae3_ring_chain_node *node; 1086e2cb1decSSalil Mehta int status; 1087d3410018SYufeng Mo int i = 0; 1088e2cb1decSSalil Mehta 1089d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1090d3410018SYufeng Mo send_msg.code = en ? HCLGE_MBX_MAP_RING_TO_VECTOR : 1091c09ba484SPeng Li HCLGE_MBX_UNMAP_RING_TO_VECTOR; 1092d3410018SYufeng Mo send_msg.vector_id = vector_id; 1093e2cb1decSSalil Mehta 1094e2cb1decSSalil Mehta for (node = ring_chain; node; node = node->next) { 1095d3410018SYufeng Mo send_msg.param[i].ring_type = 1096e4e87715SPeng Li hnae3_get_bit(node->flag, HNAE3_RING_TYPE_B); 1097d3410018SYufeng Mo 1098d3410018SYufeng Mo send_msg.param[i].tqp_index = node->tqp_index; 1099d3410018SYufeng Mo send_msg.param[i].int_gl_index = 1100d3410018SYufeng Mo hnae3_get_field(node->int_gl_idx, 110179eee410SFuyun Liang HNAE3_RING_GL_IDX_M, 110279eee410SFuyun Liang HNAE3_RING_GL_IDX_S); 110379eee410SFuyun Liang 11045d02a58dSYunsheng Lin i++; 1105d3410018SYufeng Mo if (i == HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM || !node->next) { 1106d3410018SYufeng Mo send_msg.ring_num = i; 1107e2cb1decSSalil Mehta 1108d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, 1109d3410018SYufeng Mo NULL, 0); 1110e2cb1decSSalil Mehta if (status) { 1111e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1112e2cb1decSSalil Mehta "Map TQP fail, status is %d.\n", 1113e2cb1decSSalil Mehta status); 1114e2cb1decSSalil Mehta return status; 1115e2cb1decSSalil Mehta } 1116e2cb1decSSalil Mehta i = 0; 1117e2cb1decSSalil Mehta } 1118e2cb1decSSalil Mehta } 1119e2cb1decSSalil Mehta 1120e2cb1decSSalil Mehta return 0; 1121e2cb1decSSalil Mehta } 1122e2cb1decSSalil Mehta 1123e2cb1decSSalil Mehta static int hclgevf_map_ring_to_vector(struct hnae3_handle *handle, int vector, 1124e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1125e2cb1decSSalil Mehta { 1126b204bc74SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1127b204bc74SPeng Li int vector_id; 1128b204bc74SPeng Li 1129b204bc74SPeng Li vector_id = hclgevf_get_vector_index(hdev, vector); 1130b204bc74SPeng Li if (vector_id < 0) { 1131b204bc74SPeng Li dev_err(&handle->pdev->dev, 1132b204bc74SPeng Li "Get vector index fail. ret =%d\n", vector_id); 1133b204bc74SPeng Li return vector_id; 1134b204bc74SPeng Li } 1135b204bc74SPeng Li 1136b204bc74SPeng Li return hclgevf_bind_ring_to_vector(handle, true, vector_id, ring_chain); 1137e2cb1decSSalil Mehta } 1138e2cb1decSSalil Mehta 1139e2cb1decSSalil Mehta static int hclgevf_unmap_ring_from_vector( 1140e2cb1decSSalil Mehta struct hnae3_handle *handle, 1141e2cb1decSSalil Mehta int vector, 1142e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1143e2cb1decSSalil Mehta { 1144e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1145e2cb1decSSalil Mehta int ret, vector_id; 1146e2cb1decSSalil Mehta 1147dea846e8SHuazhong Tan if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) 1148dea846e8SHuazhong Tan return 0; 1149dea846e8SHuazhong Tan 1150e2cb1decSSalil Mehta vector_id = hclgevf_get_vector_index(hdev, vector); 1151e2cb1decSSalil Mehta if (vector_id < 0) { 1152e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1153e2cb1decSSalil Mehta "Get vector index fail. ret =%d\n", vector_id); 1154e2cb1decSSalil Mehta return vector_id; 1155e2cb1decSSalil Mehta } 1156e2cb1decSSalil Mehta 1157b204bc74SPeng Li ret = hclgevf_bind_ring_to_vector(handle, false, vector_id, ring_chain); 11580d3e6631SYunsheng Lin if (ret) 1159e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1160e2cb1decSSalil Mehta "Unmap ring from vector fail. vector=%d, ret =%d\n", 1161e2cb1decSSalil Mehta vector_id, 1162e2cb1decSSalil Mehta ret); 11630d3e6631SYunsheng Lin 1164e2cb1decSSalil Mehta return ret; 1165e2cb1decSSalil Mehta } 1166e2cb1decSSalil Mehta 11670d3e6631SYunsheng Lin static int hclgevf_put_vector(struct hnae3_handle *handle, int vector) 11680d3e6631SYunsheng Lin { 11690d3e6631SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 117003718db9SYunsheng Lin int vector_id; 11710d3e6631SYunsheng Lin 117203718db9SYunsheng Lin vector_id = hclgevf_get_vector_index(hdev, vector); 117303718db9SYunsheng Lin if (vector_id < 0) { 117403718db9SYunsheng Lin dev_err(&handle->pdev->dev, 117503718db9SYunsheng Lin "hclgevf_put_vector get vector index fail. ret =%d\n", 117603718db9SYunsheng Lin vector_id); 117703718db9SYunsheng Lin return vector_id; 117803718db9SYunsheng Lin } 117903718db9SYunsheng Lin 118003718db9SYunsheng Lin hclgevf_free_vector(hdev, vector_id); 1181e2cb1decSSalil Mehta 1182e2cb1decSSalil Mehta return 0; 1183e2cb1decSSalil Mehta } 1184e2cb1decSSalil Mehta 11853b75c3dfSPeng Li static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev *hdev, 1186e196ec75SJian Shen bool en_uc_pmc, bool en_mc_pmc, 1187f01f5559SJian Shen bool en_bc_pmc) 1188e2cb1decSSalil Mehta { 11895e7414cdSJian Shen struct hnae3_handle *handle = &hdev->nic; 1190d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1191f01f5559SJian Shen int ret; 1192e2cb1decSSalil Mehta 1193d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1194d3410018SYufeng Mo send_msg.code = HCLGE_MBX_SET_PROMISC_MODE; 1195d3410018SYufeng Mo send_msg.en_bc = en_bc_pmc ? 1 : 0; 1196d3410018SYufeng Mo send_msg.en_uc = en_uc_pmc ? 1 : 0; 1197d3410018SYufeng Mo send_msg.en_mc = en_mc_pmc ? 1 : 0; 11985e7414cdSJian Shen send_msg.en_limit_promisc = test_bit(HNAE3_PFLAG_LIMIT_PROMISC, 11995e7414cdSJian Shen &handle->priv_flags) ? 1 : 0; 1200e2cb1decSSalil Mehta 1201d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1202f01f5559SJian Shen if (ret) 1203e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1204f01f5559SJian Shen "Set promisc mode fail, status is %d.\n", ret); 1205e2cb1decSSalil Mehta 1206f01f5559SJian Shen return ret; 1207e2cb1decSSalil Mehta } 1208e2cb1decSSalil Mehta 1209e196ec75SJian Shen static int hclgevf_set_promisc_mode(struct hnae3_handle *handle, bool en_uc_pmc, 1210e196ec75SJian Shen bool en_mc_pmc) 1211e2cb1decSSalil Mehta { 1212e196ec75SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1213e196ec75SJian Shen bool en_bc_pmc; 1214e196ec75SJian Shen 1215295ba232SGuangbin Huang en_bc_pmc = hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2; 1216e196ec75SJian Shen 1217e196ec75SJian Shen return hclgevf_cmd_set_promisc_mode(hdev, en_uc_pmc, en_mc_pmc, 1218e196ec75SJian Shen en_bc_pmc); 1219e2cb1decSSalil Mehta } 1220e2cb1decSSalil Mehta 1221c631c696SJian Shen static void hclgevf_request_update_promisc_mode(struct hnae3_handle *handle) 1222c631c696SJian Shen { 1223c631c696SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1224c631c696SJian Shen 1225c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 12265e7414cdSJian Shen hclgevf_task_schedule(hdev, 0); 1227c631c696SJian Shen } 1228c631c696SJian Shen 1229c631c696SJian Shen static void hclgevf_sync_promisc_mode(struct hclgevf_dev *hdev) 1230c631c696SJian Shen { 1231c631c696SJian Shen struct hnae3_handle *handle = &hdev->nic; 1232c631c696SJian Shen bool en_uc_pmc = handle->netdev_flags & HNAE3_UPE; 1233c631c696SJian Shen bool en_mc_pmc = handle->netdev_flags & HNAE3_MPE; 1234c631c696SJian Shen int ret; 1235c631c696SJian Shen 1236c631c696SJian Shen if (test_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state)) { 1237c631c696SJian Shen ret = hclgevf_set_promisc_mode(handle, en_uc_pmc, en_mc_pmc); 1238c631c696SJian Shen if (!ret) 1239c631c696SJian Shen clear_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 1240c631c696SJian Shen } 1241c631c696SJian Shen } 1242c631c696SJian Shen 1243*8fa86551SYufeng Mo static int hclgevf_tqp_enable_cmd_send(struct hclgevf_dev *hdev, u16 tqp_id, 1244*8fa86551SYufeng Mo u16 stream_id, bool enable) 1245e2cb1decSSalil Mehta { 1246e2cb1decSSalil Mehta struct hclgevf_cfg_com_tqp_queue_cmd *req; 1247e2cb1decSSalil Mehta struct hclgevf_desc desc; 1248e2cb1decSSalil Mehta 1249e2cb1decSSalil Mehta req = (struct hclgevf_cfg_com_tqp_queue_cmd *)desc.data; 1250e2cb1decSSalil Mehta 1251e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_CFG_COM_TQP_QUEUE, 1252e2cb1decSSalil Mehta false); 1253e2cb1decSSalil Mehta req->tqp_id = cpu_to_le16(tqp_id & HCLGEVF_RING_ID_MASK); 1254e2cb1decSSalil Mehta req->stream_id = cpu_to_le16(stream_id); 1255ebaf1908SWeihang Li if (enable) 1256ebaf1908SWeihang Li req->enable |= 1U << HCLGEVF_TQP_ENABLE_B; 1257e2cb1decSSalil Mehta 1258*8fa86551SYufeng Mo return hclgevf_cmd_send(&hdev->hw, &desc, 1); 1259*8fa86551SYufeng Mo } 1260e2cb1decSSalil Mehta 1261*8fa86551SYufeng Mo static int hclgevf_tqp_enable(struct hnae3_handle *handle, bool enable) 1262*8fa86551SYufeng Mo { 1263*8fa86551SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1264*8fa86551SYufeng Mo int ret; 1265*8fa86551SYufeng Mo u16 i; 1266*8fa86551SYufeng Mo 1267*8fa86551SYufeng Mo for (i = 0; i < handle->kinfo.num_tqps; i++) { 1268*8fa86551SYufeng Mo ret = hclgevf_tqp_enable_cmd_send(hdev, i, 0, enable); 1269*8fa86551SYufeng Mo if (ret) 1270*8fa86551SYufeng Mo return ret; 1271*8fa86551SYufeng Mo } 1272*8fa86551SYufeng Mo 1273*8fa86551SYufeng Mo return 0; 1274e2cb1decSSalil Mehta } 1275e2cb1decSSalil Mehta 1276e2cb1decSSalil Mehta static void hclgevf_reset_tqp_stats(struct hnae3_handle *handle) 1277e2cb1decSSalil Mehta { 1278b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 1279e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 1280e2cb1decSSalil Mehta int i; 1281e2cb1decSSalil Mehta 1282b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 1283b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 1284e2cb1decSSalil Mehta memset(&tqp->tqp_stats, 0, sizeof(tqp->tqp_stats)); 1285e2cb1decSSalil Mehta } 1286e2cb1decSSalil Mehta } 1287e2cb1decSSalil Mehta 12888e6de441SHuazhong Tan static int hclgevf_get_host_mac_addr(struct hclgevf_dev *hdev, u8 *p) 12898e6de441SHuazhong Tan { 1290d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 12918e6de441SHuazhong Tan u8 host_mac[ETH_ALEN]; 12928e6de441SHuazhong Tan int status; 12938e6de441SHuazhong Tan 1294d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MAC_ADDR, 0); 1295d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, host_mac, 1296d3410018SYufeng Mo ETH_ALEN); 12978e6de441SHuazhong Tan if (status) { 12988e6de441SHuazhong Tan dev_err(&hdev->pdev->dev, 12998e6de441SHuazhong Tan "fail to get VF MAC from host %d", status); 13008e6de441SHuazhong Tan return status; 13018e6de441SHuazhong Tan } 13028e6de441SHuazhong Tan 13038e6de441SHuazhong Tan ether_addr_copy(p, host_mac); 13048e6de441SHuazhong Tan 13058e6de441SHuazhong Tan return 0; 13068e6de441SHuazhong Tan } 13078e6de441SHuazhong Tan 1308e2cb1decSSalil Mehta static void hclgevf_get_mac_addr(struct hnae3_handle *handle, u8 *p) 1309e2cb1decSSalil Mehta { 1310e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 13118e6de441SHuazhong Tan u8 host_mac_addr[ETH_ALEN]; 1312e2cb1decSSalil Mehta 13138e6de441SHuazhong Tan if (hclgevf_get_host_mac_addr(hdev, host_mac_addr)) 13148e6de441SHuazhong Tan return; 13158e6de441SHuazhong Tan 13168e6de441SHuazhong Tan hdev->has_pf_mac = !is_zero_ether_addr(host_mac_addr); 13178e6de441SHuazhong Tan if (hdev->has_pf_mac) 13188e6de441SHuazhong Tan ether_addr_copy(p, host_mac_addr); 13198e6de441SHuazhong Tan else 1320e2cb1decSSalil Mehta ether_addr_copy(p, hdev->hw.mac.mac_addr); 1321e2cb1decSSalil Mehta } 1322e2cb1decSSalil Mehta 132359098055SFuyun Liang static int hclgevf_set_mac_addr(struct hnae3_handle *handle, void *p, 132459098055SFuyun Liang bool is_first) 1325e2cb1decSSalil Mehta { 1326e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1327e2cb1decSSalil Mehta u8 *old_mac_addr = (u8 *)hdev->hw.mac.mac_addr; 1328d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1329e2cb1decSSalil Mehta u8 *new_mac_addr = (u8 *)p; 1330e2cb1decSSalil Mehta int status; 1331e2cb1decSSalil Mehta 1332d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_UNICAST, 0); 1333ee4bcd3bSJian Shen send_msg.subcode = HCLGE_MBX_MAC_VLAN_UC_MODIFY; 1334d3410018SYufeng Mo ether_addr_copy(send_msg.data, new_mac_addr); 1335ee4bcd3bSJian Shen if (is_first && !hdev->has_pf_mac) 1336ee4bcd3bSJian Shen eth_zero_addr(&send_msg.data[ETH_ALEN]); 1337ee4bcd3bSJian Shen else 1338d3410018SYufeng Mo ether_addr_copy(&send_msg.data[ETH_ALEN], old_mac_addr); 1339d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1340e2cb1decSSalil Mehta if (!status) 1341e2cb1decSSalil Mehta ether_addr_copy(hdev->hw.mac.mac_addr, new_mac_addr); 1342e2cb1decSSalil Mehta 1343e2cb1decSSalil Mehta return status; 1344e2cb1decSSalil Mehta } 1345e2cb1decSSalil Mehta 1346ee4bcd3bSJian Shen static struct hclgevf_mac_addr_node * 1347ee4bcd3bSJian Shen hclgevf_find_mac_node(struct list_head *list, const u8 *mac_addr) 1348ee4bcd3bSJian Shen { 1349ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1350ee4bcd3bSJian Shen 1351ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) 1352ee4bcd3bSJian Shen if (ether_addr_equal(mac_addr, mac_node->mac_addr)) 1353ee4bcd3bSJian Shen return mac_node; 1354ee4bcd3bSJian Shen 1355ee4bcd3bSJian Shen return NULL; 1356ee4bcd3bSJian Shen } 1357ee4bcd3bSJian Shen 1358ee4bcd3bSJian Shen static void hclgevf_update_mac_node(struct hclgevf_mac_addr_node *mac_node, 1359ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state) 1360ee4bcd3bSJian Shen { 1361ee4bcd3bSJian Shen switch (state) { 1362ee4bcd3bSJian Shen /* from set_rx_mode or tmp_add_list */ 1363ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1364ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_DEL) 1365ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1366ee4bcd3bSJian Shen break; 1367ee4bcd3bSJian Shen /* only from set_rx_mode */ 1368ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 1369ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1370ee4bcd3bSJian Shen list_del(&mac_node->node); 1371ee4bcd3bSJian Shen kfree(mac_node); 1372ee4bcd3bSJian Shen } else { 1373ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 1374ee4bcd3bSJian Shen } 1375ee4bcd3bSJian Shen break; 1376ee4bcd3bSJian Shen /* only from tmp_add_list, the mac_node->state won't be 1377ee4bcd3bSJian Shen * HCLGEVF_MAC_ACTIVE 1378ee4bcd3bSJian Shen */ 1379ee4bcd3bSJian Shen case HCLGEVF_MAC_ACTIVE: 1380ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1381ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1382ee4bcd3bSJian Shen break; 1383ee4bcd3bSJian Shen } 1384ee4bcd3bSJian Shen } 1385ee4bcd3bSJian Shen 1386ee4bcd3bSJian Shen static int hclgevf_update_mac_list(struct hnae3_handle *handle, 1387ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state, 1388ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type, 1389e2cb1decSSalil Mehta const unsigned char *addr) 1390e2cb1decSSalil Mehta { 1391e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1392ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node; 1393ee4bcd3bSJian Shen struct list_head *list; 1394e2cb1decSSalil Mehta 1395ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1396ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1397ee4bcd3bSJian Shen 1398ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1399ee4bcd3bSJian Shen 1400ee4bcd3bSJian Shen /* if the mac addr is already in the mac list, no need to add a new 1401ee4bcd3bSJian Shen * one into it, just check the mac addr state, convert it to a new 1402ee4bcd3bSJian Shen * new state, or just remove it, or do nothing. 1403ee4bcd3bSJian Shen */ 1404ee4bcd3bSJian Shen mac_node = hclgevf_find_mac_node(list, addr); 1405ee4bcd3bSJian Shen if (mac_node) { 1406ee4bcd3bSJian Shen hclgevf_update_mac_node(mac_node, state); 1407ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1408ee4bcd3bSJian Shen return 0; 1409ee4bcd3bSJian Shen } 1410ee4bcd3bSJian Shen /* if this address is never added, unnecessary to delete */ 1411ee4bcd3bSJian Shen if (state == HCLGEVF_MAC_TO_DEL) { 1412ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1413ee4bcd3bSJian Shen return -ENOENT; 1414ee4bcd3bSJian Shen } 1415ee4bcd3bSJian Shen 1416ee4bcd3bSJian Shen mac_node = kzalloc(sizeof(*mac_node), GFP_ATOMIC); 1417ee4bcd3bSJian Shen if (!mac_node) { 1418ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1419ee4bcd3bSJian Shen return -ENOMEM; 1420ee4bcd3bSJian Shen } 1421ee4bcd3bSJian Shen 1422ee4bcd3bSJian Shen mac_node->state = state; 1423ee4bcd3bSJian Shen ether_addr_copy(mac_node->mac_addr, addr); 1424ee4bcd3bSJian Shen list_add_tail(&mac_node->node, list); 1425ee4bcd3bSJian Shen 1426ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1427ee4bcd3bSJian Shen return 0; 1428ee4bcd3bSJian Shen } 1429ee4bcd3bSJian Shen 1430ee4bcd3bSJian Shen static int hclgevf_add_uc_addr(struct hnae3_handle *handle, 1431ee4bcd3bSJian Shen const unsigned char *addr) 1432ee4bcd3bSJian Shen { 1433ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1434ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1435e2cb1decSSalil Mehta } 1436e2cb1decSSalil Mehta 1437e2cb1decSSalil Mehta static int hclgevf_rm_uc_addr(struct hnae3_handle *handle, 1438e2cb1decSSalil Mehta const unsigned char *addr) 1439e2cb1decSSalil Mehta { 1440ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1441ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1442e2cb1decSSalil Mehta } 1443e2cb1decSSalil Mehta 1444e2cb1decSSalil Mehta static int hclgevf_add_mc_addr(struct hnae3_handle *handle, 1445e2cb1decSSalil Mehta const unsigned char *addr) 1446e2cb1decSSalil Mehta { 1447ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1448ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1449e2cb1decSSalil Mehta } 1450e2cb1decSSalil Mehta 1451e2cb1decSSalil Mehta static int hclgevf_rm_mc_addr(struct hnae3_handle *handle, 1452e2cb1decSSalil Mehta const unsigned char *addr) 1453e2cb1decSSalil Mehta { 1454ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1455ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1456ee4bcd3bSJian Shen } 1457e2cb1decSSalil Mehta 1458ee4bcd3bSJian Shen static int hclgevf_add_del_mac_addr(struct hclgevf_dev *hdev, 1459ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, 1460ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1461ee4bcd3bSJian Shen { 1462ee4bcd3bSJian Shen struct hclge_vf_to_pf_msg send_msg; 1463ee4bcd3bSJian Shen u8 code, subcode; 1464ee4bcd3bSJian Shen 1465ee4bcd3bSJian Shen if (mac_type == HCLGEVF_MAC_ADDR_UC) { 1466ee4bcd3bSJian Shen code = HCLGE_MBX_SET_UNICAST; 1467ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1468ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_ADD; 1469ee4bcd3bSJian Shen else 1470ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_REMOVE; 1471ee4bcd3bSJian Shen } else { 1472ee4bcd3bSJian Shen code = HCLGE_MBX_SET_MULTICAST; 1473ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1474ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_ADD; 1475ee4bcd3bSJian Shen else 1476ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_REMOVE; 1477ee4bcd3bSJian Shen } 1478ee4bcd3bSJian Shen 1479ee4bcd3bSJian Shen hclgevf_build_send_msg(&send_msg, code, subcode); 1480ee4bcd3bSJian Shen ether_addr_copy(send_msg.data, mac_node->mac_addr); 1481d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1482e2cb1decSSalil Mehta } 1483e2cb1decSSalil Mehta 1484ee4bcd3bSJian Shen static void hclgevf_config_mac_list(struct hclgevf_dev *hdev, 1485ee4bcd3bSJian Shen struct list_head *list, 1486ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1487ee4bcd3bSJian Shen { 1488ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1489ee4bcd3bSJian Shen int ret; 1490ee4bcd3bSJian Shen 1491ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1492ee4bcd3bSJian Shen ret = hclgevf_add_del_mac_addr(hdev, mac_node, mac_type); 1493ee4bcd3bSJian Shen if (ret) { 1494ee4bcd3bSJian Shen dev_err(&hdev->pdev->dev, 1495ee4bcd3bSJian Shen "failed to configure mac %pM, state = %d, ret = %d\n", 1496ee4bcd3bSJian Shen mac_node->mac_addr, mac_node->state, ret); 1497ee4bcd3bSJian Shen return; 1498ee4bcd3bSJian Shen } 1499ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1500ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1501ee4bcd3bSJian Shen } else { 1502ee4bcd3bSJian Shen list_del(&mac_node->node); 1503ee4bcd3bSJian Shen kfree(mac_node); 1504ee4bcd3bSJian Shen } 1505ee4bcd3bSJian Shen } 1506ee4bcd3bSJian Shen } 1507ee4bcd3bSJian Shen 1508ee4bcd3bSJian Shen static void hclgevf_sync_from_add_list(struct list_head *add_list, 1509ee4bcd3bSJian Shen struct list_head *mac_list) 1510ee4bcd3bSJian Shen { 1511ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1512ee4bcd3bSJian Shen 1513ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, add_list, node) { 1514ee4bcd3bSJian Shen /* if the mac address from tmp_add_list is not in the 1515ee4bcd3bSJian Shen * uc/mc_mac_list, it means have received a TO_DEL request 1516ee4bcd3bSJian Shen * during the time window of sending mac config request to PF 1517ee4bcd3bSJian Shen * If mac_node state is ACTIVE, then change its state to TO_DEL, 1518ee4bcd3bSJian Shen * then it will be removed at next time. If is TO_ADD, it means 1519ee4bcd3bSJian Shen * send TO_ADD request failed, so just remove the mac node. 1520ee4bcd3bSJian Shen */ 1521ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1522ee4bcd3bSJian Shen if (new_node) { 1523ee4bcd3bSJian Shen hclgevf_update_mac_node(new_node, mac_node->state); 1524ee4bcd3bSJian Shen list_del(&mac_node->node); 1525ee4bcd3bSJian Shen kfree(mac_node); 1526ee4bcd3bSJian Shen } else if (mac_node->state == HCLGEVF_MAC_ACTIVE) { 1527ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 1528ee4bcd3bSJian Shen list_del(&mac_node->node); 1529ee4bcd3bSJian Shen list_add_tail(&mac_node->node, mac_list); 1530ee4bcd3bSJian Shen } else { 1531ee4bcd3bSJian Shen list_del(&mac_node->node); 1532ee4bcd3bSJian Shen kfree(mac_node); 1533ee4bcd3bSJian Shen } 1534ee4bcd3bSJian Shen } 1535ee4bcd3bSJian Shen } 1536ee4bcd3bSJian Shen 1537ee4bcd3bSJian Shen static void hclgevf_sync_from_del_list(struct list_head *del_list, 1538ee4bcd3bSJian Shen struct list_head *mac_list) 1539ee4bcd3bSJian Shen { 1540ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1541ee4bcd3bSJian Shen 1542ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, del_list, node) { 1543ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1544ee4bcd3bSJian Shen if (new_node) { 1545ee4bcd3bSJian Shen /* If the mac addr is exist in the mac list, it means 1546ee4bcd3bSJian Shen * received a new request TO_ADD during the time window 1547ee4bcd3bSJian Shen * of sending mac addr configurrequest to PF, so just 1548ee4bcd3bSJian Shen * change the mac state to ACTIVE. 1549ee4bcd3bSJian Shen */ 1550ee4bcd3bSJian Shen new_node->state = HCLGEVF_MAC_ACTIVE; 1551ee4bcd3bSJian Shen list_del(&mac_node->node); 1552ee4bcd3bSJian Shen kfree(mac_node); 1553ee4bcd3bSJian Shen } else { 1554ee4bcd3bSJian Shen list_del(&mac_node->node); 1555ee4bcd3bSJian Shen list_add_tail(&mac_node->node, mac_list); 1556ee4bcd3bSJian Shen } 1557ee4bcd3bSJian Shen } 1558ee4bcd3bSJian Shen } 1559ee4bcd3bSJian Shen 1560ee4bcd3bSJian Shen static void hclgevf_clear_list(struct list_head *list) 1561ee4bcd3bSJian Shen { 1562ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1563ee4bcd3bSJian Shen 1564ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1565ee4bcd3bSJian Shen list_del(&mac_node->node); 1566ee4bcd3bSJian Shen kfree(mac_node); 1567ee4bcd3bSJian Shen } 1568ee4bcd3bSJian Shen } 1569ee4bcd3bSJian Shen 1570ee4bcd3bSJian Shen static void hclgevf_sync_mac_list(struct hclgevf_dev *hdev, 1571ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1572ee4bcd3bSJian Shen { 1573ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1574ee4bcd3bSJian Shen struct list_head tmp_add_list, tmp_del_list; 1575ee4bcd3bSJian Shen struct list_head *list; 1576ee4bcd3bSJian Shen 1577ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_add_list); 1578ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_del_list); 1579ee4bcd3bSJian Shen 1580ee4bcd3bSJian Shen /* move the mac addr to the tmp_add_list and tmp_del_list, then 1581ee4bcd3bSJian Shen * we can add/delete these mac addr outside the spin lock 1582ee4bcd3bSJian Shen */ 1583ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1584ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1585ee4bcd3bSJian Shen 1586ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1587ee4bcd3bSJian Shen 1588ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1589ee4bcd3bSJian Shen switch (mac_node->state) { 1590ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 1591ee4bcd3bSJian Shen list_del(&mac_node->node); 1592ee4bcd3bSJian Shen list_add_tail(&mac_node->node, &tmp_del_list); 1593ee4bcd3bSJian Shen break; 1594ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1595ee4bcd3bSJian Shen new_node = kzalloc(sizeof(*new_node), GFP_ATOMIC); 1596ee4bcd3bSJian Shen if (!new_node) 1597ee4bcd3bSJian Shen goto stop_traverse; 1598ee4bcd3bSJian Shen 1599ee4bcd3bSJian Shen ether_addr_copy(new_node->mac_addr, mac_node->mac_addr); 1600ee4bcd3bSJian Shen new_node->state = mac_node->state; 1601ee4bcd3bSJian Shen list_add_tail(&new_node->node, &tmp_add_list); 1602ee4bcd3bSJian Shen break; 1603ee4bcd3bSJian Shen default: 1604ee4bcd3bSJian Shen break; 1605ee4bcd3bSJian Shen } 1606ee4bcd3bSJian Shen } 1607ee4bcd3bSJian Shen 1608ee4bcd3bSJian Shen stop_traverse: 1609ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1610ee4bcd3bSJian Shen 1611ee4bcd3bSJian Shen /* delete first, in order to get max mac table space for adding */ 1612ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_del_list, mac_type); 1613ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_add_list, mac_type); 1614ee4bcd3bSJian Shen 1615ee4bcd3bSJian Shen /* if some mac addresses were added/deleted fail, move back to the 1616ee4bcd3bSJian Shen * mac_list, and retry at next time. 1617ee4bcd3bSJian Shen */ 1618ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1619ee4bcd3bSJian Shen 1620ee4bcd3bSJian Shen hclgevf_sync_from_del_list(&tmp_del_list, list); 1621ee4bcd3bSJian Shen hclgevf_sync_from_add_list(&tmp_add_list, list); 1622ee4bcd3bSJian Shen 1623ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1624ee4bcd3bSJian Shen } 1625ee4bcd3bSJian Shen 1626ee4bcd3bSJian Shen static void hclgevf_sync_mac_table(struct hclgevf_dev *hdev) 1627ee4bcd3bSJian Shen { 1628ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_UC); 1629ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_MC); 1630ee4bcd3bSJian Shen } 1631ee4bcd3bSJian Shen 1632ee4bcd3bSJian Shen static void hclgevf_uninit_mac_list(struct hclgevf_dev *hdev) 1633ee4bcd3bSJian Shen { 1634ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1635ee4bcd3bSJian Shen 1636ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.uc_mac_list); 1637ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.mc_mac_list); 1638ee4bcd3bSJian Shen 1639ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1640ee4bcd3bSJian Shen } 1641ee4bcd3bSJian Shen 1642e2cb1decSSalil Mehta static int hclgevf_set_vlan_filter(struct hnae3_handle *handle, 1643e2cb1decSSalil Mehta __be16 proto, u16 vlan_id, 1644e2cb1decSSalil Mehta bool is_kill) 1645e2cb1decSSalil Mehta { 1646d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_IS_KILL_OFFSET 0 1647d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET 1 1648d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_PROTO_OFFSET 3 1649d3410018SYufeng Mo 1650e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1651d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1652fe4144d4SJian Shen int ret; 1653e2cb1decSSalil Mehta 1654b37ce587SYufeng Mo if (vlan_id > HCLGEVF_MAX_VLAN_ID) 1655e2cb1decSSalil Mehta return -EINVAL; 1656e2cb1decSSalil Mehta 1657e2cb1decSSalil Mehta if (proto != htons(ETH_P_8021Q)) 1658e2cb1decSSalil Mehta return -EPROTONOSUPPORT; 1659e2cb1decSSalil Mehta 1660b7b5d25bSGuojia Liao /* When device is resetting or reset failed, firmware is unable to 1661b7b5d25bSGuojia Liao * handle mailbox. Just record the vlan id, and remove it after 1662fe4144d4SJian Shen * reset finished. 1663fe4144d4SJian Shen */ 1664b7b5d25bSGuojia Liao if ((test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 1665b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) { 1666fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1667fe4144d4SJian Shen return -EBUSY; 1668fe4144d4SJian Shen } 1669fe4144d4SJian Shen 1670d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1671d3410018SYufeng Mo HCLGE_MBX_VLAN_FILTER); 1672d3410018SYufeng Mo send_msg.data[HCLGEVF_VLAN_MBX_IS_KILL_OFFSET] = is_kill; 1673d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET], &vlan_id, 1674d3410018SYufeng Mo sizeof(vlan_id)); 1675d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_PROTO_OFFSET], &proto, 1676d3410018SYufeng Mo sizeof(proto)); 167746ee7350SGuojia Liao /* when remove hw vlan filter failed, record the vlan id, 1678fe4144d4SJian Shen * and try to remove it from hw later, to be consistence 1679fe4144d4SJian Shen * with stack. 1680fe4144d4SJian Shen */ 1681d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1682fe4144d4SJian Shen if (is_kill && ret) 1683fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1684fe4144d4SJian Shen 1685fe4144d4SJian Shen return ret; 1686fe4144d4SJian Shen } 1687fe4144d4SJian Shen 1688fe4144d4SJian Shen static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev) 1689fe4144d4SJian Shen { 1690fe4144d4SJian Shen #define HCLGEVF_MAX_SYNC_COUNT 60 1691fe4144d4SJian Shen struct hnae3_handle *handle = &hdev->nic; 1692fe4144d4SJian Shen int ret, sync_cnt = 0; 1693fe4144d4SJian Shen u16 vlan_id; 1694fe4144d4SJian Shen 1695fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1696fe4144d4SJian Shen while (vlan_id != VLAN_N_VID) { 1697fe4144d4SJian Shen ret = hclgevf_set_vlan_filter(handle, htons(ETH_P_8021Q), 1698fe4144d4SJian Shen vlan_id, true); 1699fe4144d4SJian Shen if (ret) 1700fe4144d4SJian Shen return; 1701fe4144d4SJian Shen 1702fe4144d4SJian Shen clear_bit(vlan_id, hdev->vlan_del_fail_bmap); 1703fe4144d4SJian Shen sync_cnt++; 1704fe4144d4SJian Shen if (sync_cnt >= HCLGEVF_MAX_SYNC_COUNT) 1705fe4144d4SJian Shen return; 1706fe4144d4SJian Shen 1707fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1708fe4144d4SJian Shen } 1709e2cb1decSSalil Mehta } 1710e2cb1decSSalil Mehta 1711b2641e2aSYunsheng Lin static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) 1712b2641e2aSYunsheng Lin { 1713b2641e2aSYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1714d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1715b2641e2aSYunsheng Lin 1716d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1717d3410018SYufeng Mo HCLGE_MBX_VLAN_RX_OFF_CFG); 1718d3410018SYufeng Mo send_msg.data[0] = enable ? 1 : 0; 1719d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1720b2641e2aSYunsheng Lin } 1721b2641e2aSYunsheng Lin 1722*8fa86551SYufeng Mo static int hclgevf_reset_tqp(struct hnae3_handle *handle) 1723e2cb1decSSalil Mehta { 1724*8fa86551SYufeng Mo #define HCLGEVF_RESET_ALL_QUEUE_DONE 1U 1725e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1726d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1727*8fa86551SYufeng Mo u8 return_status = 0; 17281a426f8bSPeng Li int ret; 1729*8fa86551SYufeng Mo u16 i; 1730e2cb1decSSalil Mehta 17311a426f8bSPeng Li /* disable vf queue before send queue reset msg to PF */ 1732*8fa86551SYufeng Mo ret = hclgevf_tqp_enable(handle, false); 1733*8fa86551SYufeng Mo if (ret) { 1734*8fa86551SYufeng Mo dev_err(&hdev->pdev->dev, "failed to disable tqp, ret = %d\n", 1735*8fa86551SYufeng Mo ret); 17367fa6be4fSHuazhong Tan return ret; 1737*8fa86551SYufeng Mo } 17381a426f8bSPeng Li 1739d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 1740*8fa86551SYufeng Mo 1741*8fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &return_status, 1742*8fa86551SYufeng Mo sizeof(return_status)); 1743*8fa86551SYufeng Mo if (ret || return_status == HCLGEVF_RESET_ALL_QUEUE_DONE) 1744*8fa86551SYufeng Mo return ret; 1745*8fa86551SYufeng Mo 1746*8fa86551SYufeng Mo for (i = 1; i < handle->kinfo.num_tqps; i++) { 1747*8fa86551SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 1748*8fa86551SYufeng Mo memcpy(send_msg.data, &i, sizeof(i)); 1749*8fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1750*8fa86551SYufeng Mo if (ret) 1751*8fa86551SYufeng Mo return ret; 1752*8fa86551SYufeng Mo } 1753*8fa86551SYufeng Mo 1754*8fa86551SYufeng Mo return 0; 1755e2cb1decSSalil Mehta } 1756e2cb1decSSalil Mehta 1757818f1675SYunsheng Lin static int hclgevf_set_mtu(struct hnae3_handle *handle, int new_mtu) 1758818f1675SYunsheng Lin { 1759818f1675SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1760d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1761818f1675SYunsheng Lin 1762d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_MTU, 0); 1763d3410018SYufeng Mo memcpy(send_msg.data, &new_mtu, sizeof(new_mtu)); 1764d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1765818f1675SYunsheng Lin } 1766818f1675SYunsheng Lin 17676988eb2aSSalil Mehta static int hclgevf_notify_client(struct hclgevf_dev *hdev, 17686988eb2aSSalil Mehta enum hnae3_reset_notify_type type) 17696988eb2aSSalil Mehta { 17706988eb2aSSalil Mehta struct hnae3_client *client = hdev->nic_client; 17716988eb2aSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 17726a5f6fa3SHuazhong Tan int ret; 17736988eb2aSSalil Mehta 177425d1817cSHuazhong Tan if (!test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state) || 177525d1817cSHuazhong Tan !client) 177625d1817cSHuazhong Tan return 0; 177725d1817cSHuazhong Tan 17786988eb2aSSalil Mehta if (!client->ops->reset_notify) 17796988eb2aSSalil Mehta return -EOPNOTSUPP; 17806988eb2aSSalil Mehta 17816a5f6fa3SHuazhong Tan ret = client->ops->reset_notify(handle, type); 17826a5f6fa3SHuazhong Tan if (ret) 17836a5f6fa3SHuazhong Tan dev_err(&hdev->pdev->dev, "notify nic client failed %d(%d)\n", 17846a5f6fa3SHuazhong Tan type, ret); 17856a5f6fa3SHuazhong Tan 17866a5f6fa3SHuazhong Tan return ret; 17876988eb2aSSalil Mehta } 17886988eb2aSSalil Mehta 1789fe735c84SHuazhong Tan static int hclgevf_notify_roce_client(struct hclgevf_dev *hdev, 1790fe735c84SHuazhong Tan enum hnae3_reset_notify_type type) 1791fe735c84SHuazhong Tan { 1792fe735c84SHuazhong Tan struct hnae3_client *client = hdev->roce_client; 1793fe735c84SHuazhong Tan struct hnae3_handle *handle = &hdev->roce; 1794fe735c84SHuazhong Tan int ret; 1795fe735c84SHuazhong Tan 1796fe735c84SHuazhong Tan if (!test_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state) || !client) 1797fe735c84SHuazhong Tan return 0; 1798fe735c84SHuazhong Tan 1799fe735c84SHuazhong Tan if (!client->ops->reset_notify) 1800fe735c84SHuazhong Tan return -EOPNOTSUPP; 1801fe735c84SHuazhong Tan 1802fe735c84SHuazhong Tan ret = client->ops->reset_notify(handle, type); 1803fe735c84SHuazhong Tan if (ret) 1804fe735c84SHuazhong Tan dev_err(&hdev->pdev->dev, "notify roce client failed %d(%d)", 1805fe735c84SHuazhong Tan type, ret); 1806fe735c84SHuazhong Tan return ret; 1807fe735c84SHuazhong Tan } 1808fe735c84SHuazhong Tan 18096988eb2aSSalil Mehta static int hclgevf_reset_wait(struct hclgevf_dev *hdev) 18106988eb2aSSalil Mehta { 1811aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_US 20000 1812aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_CNT 2000 1813aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_TIMEOUT_US \ 1814aa5c4f17SHuazhong Tan (HCLGEVF_RESET_WAIT_US * HCLGEVF_RESET_WAIT_CNT) 1815aa5c4f17SHuazhong Tan 1816aa5c4f17SHuazhong Tan u32 val; 1817aa5c4f17SHuazhong Tan int ret; 18186988eb2aSSalil Mehta 1819f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_RESET) 182072e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 182172e2fb07SHuazhong Tan HCLGEVF_VF_RST_ING, val, 182272e2fb07SHuazhong Tan !(val & HCLGEVF_VF_RST_ING_BIT), 182372e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_US, 182472e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 182572e2fb07SHuazhong Tan else 182672e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 182772e2fb07SHuazhong Tan HCLGEVF_RST_ING, val, 1828aa5c4f17SHuazhong Tan !(val & HCLGEVF_RST_ING_BITS), 1829aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_US, 1830aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 18316988eb2aSSalil Mehta 18326988eb2aSSalil Mehta /* hardware completion status should be available by this time */ 1833aa5c4f17SHuazhong Tan if (ret) { 1834aa5c4f17SHuazhong Tan dev_err(&hdev->pdev->dev, 18358912fd6aSColin Ian King "couldn't get reset done status from h/w, timeout!\n"); 1836aa5c4f17SHuazhong Tan return ret; 18376988eb2aSSalil Mehta } 18386988eb2aSSalil Mehta 18396988eb2aSSalil Mehta /* we will wait a bit more to let reset of the stack to complete. This 18406988eb2aSSalil Mehta * might happen in case reset assertion was made by PF. Yes, this also 18416988eb2aSSalil Mehta * means we might end up waiting bit more even for VF reset. 18426988eb2aSSalil Mehta */ 18436988eb2aSSalil Mehta msleep(5000); 18446988eb2aSSalil Mehta 18456988eb2aSSalil Mehta return 0; 18466988eb2aSSalil Mehta } 18476988eb2aSSalil Mehta 18486b428b4fSHuazhong Tan static void hclgevf_reset_handshake(struct hclgevf_dev *hdev, bool enable) 18496b428b4fSHuazhong Tan { 18506b428b4fSHuazhong Tan u32 reg_val; 18516b428b4fSHuazhong Tan 18526b428b4fSHuazhong Tan reg_val = hclgevf_read_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG); 18536b428b4fSHuazhong Tan if (enable) 18546b428b4fSHuazhong Tan reg_val |= HCLGEVF_NIC_SW_RST_RDY; 18556b428b4fSHuazhong Tan else 18566b428b4fSHuazhong Tan reg_val &= ~HCLGEVF_NIC_SW_RST_RDY; 18576b428b4fSHuazhong Tan 18586b428b4fSHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG, 18596b428b4fSHuazhong Tan reg_val); 18606b428b4fSHuazhong Tan } 18616b428b4fSHuazhong Tan 18626988eb2aSSalil Mehta static int hclgevf_reset_stack(struct hclgevf_dev *hdev) 18636988eb2aSSalil Mehta { 18647a01c897SSalil Mehta int ret; 18657a01c897SSalil Mehta 18666988eb2aSSalil Mehta /* uninitialize the nic client */ 18676a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT); 18686a5f6fa3SHuazhong Tan if (ret) 18696a5f6fa3SHuazhong Tan return ret; 18706988eb2aSSalil Mehta 18717a01c897SSalil Mehta /* re-initialize the hclge device */ 18729c6f7085SHuazhong Tan ret = hclgevf_reset_hdev(hdev); 18737a01c897SSalil Mehta if (ret) { 18747a01c897SSalil Mehta dev_err(&hdev->pdev->dev, 18757a01c897SSalil Mehta "hclge device re-init failed, VF is disabled!\n"); 18767a01c897SSalil Mehta return ret; 18777a01c897SSalil Mehta } 18786988eb2aSSalil Mehta 18796988eb2aSSalil Mehta /* bring up the nic client again */ 18806a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_INIT_CLIENT); 18816a5f6fa3SHuazhong Tan if (ret) 18826a5f6fa3SHuazhong Tan return ret; 18836988eb2aSSalil Mehta 18846b428b4fSHuazhong Tan /* clear handshake status with IMP */ 18856b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, false); 18866b428b4fSHuazhong Tan 18871cc9bc6eSHuazhong Tan /* bring up the nic to enable TX/RX again */ 18881cc9bc6eSHuazhong Tan return hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 18896988eb2aSSalil Mehta } 18906988eb2aSSalil Mehta 1891dea846e8SHuazhong Tan static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev) 1892dea846e8SHuazhong Tan { 1893ada13ee3SHuazhong Tan #define HCLGEVF_RESET_SYNC_TIME 100 1894ada13ee3SHuazhong Tan 1895f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { 1896d41884eeSHuazhong Tan struct hclge_vf_to_pf_msg send_msg; 1897d41884eeSHuazhong Tan int ret; 1898d41884eeSHuazhong Tan 1899d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0); 1900d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1901cddd5648SHuazhong Tan if (ret) { 1902cddd5648SHuazhong Tan dev_err(&hdev->pdev->dev, 1903cddd5648SHuazhong Tan "failed to assert VF reset, ret = %d\n", ret); 1904cddd5648SHuazhong Tan return ret; 1905cddd5648SHuazhong Tan } 1906c88a6e7dSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt++; 1907dea846e8SHuazhong Tan } 1908dea846e8SHuazhong Tan 1909ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 1910ada13ee3SHuazhong Tan /* inform hardware that preparatory work is done */ 1911ada13ee3SHuazhong Tan msleep(HCLGEVF_RESET_SYNC_TIME); 19126b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1913d41884eeSHuazhong Tan dev_info(&hdev->pdev->dev, "prepare reset(%d) wait done\n", 1914d41884eeSHuazhong Tan hdev->reset_type); 1915dea846e8SHuazhong Tan 1916d41884eeSHuazhong Tan return 0; 1917dea846e8SHuazhong Tan } 1918dea846e8SHuazhong Tan 19193d77d0cbSHuazhong Tan static void hclgevf_dump_rst_info(struct hclgevf_dev *hdev) 19203d77d0cbSHuazhong Tan { 19213d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF function reset count: %u\n", 19223d77d0cbSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt); 19233d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", 19243d77d0cbSHuazhong Tan hdev->rst_stats.flr_rst_cnt); 19253d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF reset count: %u\n", 19263d77d0cbSHuazhong Tan hdev->rst_stats.vf_rst_cnt); 19273d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset done count: %u\n", 19283d77d0cbSHuazhong Tan hdev->rst_stats.rst_done_cnt); 19293d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", 19303d77d0cbSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt); 19313d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset count: %u\n", 19323d77d0cbSHuazhong Tan hdev->rst_stats.rst_cnt); 19333d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset fail count: %u\n", 19343d77d0cbSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 19353d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", 19363d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_MISC_VECTOR_REG_BASE)); 19373d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt status: 0x%x\n", 19389cee2e8dSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_STATE_REG)); 19393d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", 19403d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_CMDQ_TX_DEPTH_REG)); 19413d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", 19423d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING)); 19433d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); 19443d77d0cbSHuazhong Tan } 19453d77d0cbSHuazhong Tan 1946bbe6540eSHuazhong Tan static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev) 1947bbe6540eSHuazhong Tan { 19486b428b4fSHuazhong Tan /* recover handshake status with IMP when reset fail */ 19496b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1950bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt++; 1951adcf738bSGuojia Liao dev_err(&hdev->pdev->dev, "failed to reset VF(%u)\n", 1952bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 1953bbe6540eSHuazhong Tan 1954bbe6540eSHuazhong Tan if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT) 1955bbe6540eSHuazhong Tan set_bit(hdev->reset_type, &hdev->reset_pending); 1956bbe6540eSHuazhong Tan 1957bbe6540eSHuazhong Tan if (hclgevf_is_reset_pending(hdev)) { 1958bbe6540eSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 1959bbe6540eSHuazhong Tan hclgevf_reset_task_schedule(hdev); 19603d77d0cbSHuazhong Tan } else { 1961d5432455SGuojia Liao set_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 19623d77d0cbSHuazhong Tan hclgevf_dump_rst_info(hdev); 1963bbe6540eSHuazhong Tan } 1964bbe6540eSHuazhong Tan } 1965bbe6540eSHuazhong Tan 19661cc9bc6eSHuazhong Tan static int hclgevf_reset_prepare(struct hclgevf_dev *hdev) 19676988eb2aSSalil Mehta { 19686988eb2aSSalil Mehta int ret; 19696988eb2aSSalil Mehta 1970c88a6e7dSHuazhong Tan hdev->rst_stats.rst_cnt++; 19716988eb2aSSalil Mehta 1972fe735c84SHuazhong Tan /* perform reset of the stack & ae device for a client */ 1973fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_DOWN_CLIENT); 1974fe735c84SHuazhong Tan if (ret) 1975fe735c84SHuazhong Tan return ret; 1976fe735c84SHuazhong Tan 19771cc9bc6eSHuazhong Tan rtnl_lock(); 19786988eb2aSSalil Mehta /* bring down the nic to stop any ongoing TX/RX */ 19796a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 198029118ab9SHuazhong Tan rtnl_unlock(); 19816a5f6fa3SHuazhong Tan if (ret) 19821cc9bc6eSHuazhong Tan return ret; 1983dea846e8SHuazhong Tan 19841cc9bc6eSHuazhong Tan return hclgevf_reset_prepare_wait(hdev); 19856988eb2aSSalil Mehta } 19866988eb2aSSalil Mehta 19871cc9bc6eSHuazhong Tan static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 19881cc9bc6eSHuazhong Tan { 19891cc9bc6eSHuazhong Tan int ret; 19901cc9bc6eSHuazhong Tan 1991c88a6e7dSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt++; 1992fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UNINIT_CLIENT); 1993fe735c84SHuazhong Tan if (ret) 1994fe735c84SHuazhong Tan return ret; 1995c88a6e7dSHuazhong Tan 199629118ab9SHuazhong Tan rtnl_lock(); 19976988eb2aSSalil Mehta /* now, re-initialize the nic client and ae device */ 19986988eb2aSSalil Mehta ret = hclgevf_reset_stack(hdev); 19991cc9bc6eSHuazhong Tan rtnl_unlock(); 20006a5f6fa3SHuazhong Tan if (ret) { 20016988eb2aSSalil Mehta dev_err(&hdev->pdev->dev, "failed to reset VF stack\n"); 20021cc9bc6eSHuazhong Tan return ret; 20036a5f6fa3SHuazhong Tan } 20046988eb2aSSalil Mehta 2005fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_INIT_CLIENT); 2006fe735c84SHuazhong Tan /* ignore RoCE notify error if it fails HCLGEVF_RESET_MAX_FAIL_CNT - 1 2007fe735c84SHuazhong Tan * times 2008fe735c84SHuazhong Tan */ 2009fe735c84SHuazhong Tan if (ret && 2010fe735c84SHuazhong Tan hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT - 1) 2011fe735c84SHuazhong Tan return ret; 2012fe735c84SHuazhong Tan 2013fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UP_CLIENT); 2014fe735c84SHuazhong Tan if (ret) 2015fe735c84SHuazhong Tan return ret; 2016fe735c84SHuazhong Tan 2017b644a8d4SHuazhong Tan hdev->last_reset_time = jiffies; 2018c88a6e7dSHuazhong Tan hdev->rst_stats.rst_done_cnt++; 2019bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt = 0; 2020d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2021b644a8d4SHuazhong Tan 20221cc9bc6eSHuazhong Tan return 0; 20231cc9bc6eSHuazhong Tan } 20241cc9bc6eSHuazhong Tan 20251cc9bc6eSHuazhong Tan static void hclgevf_reset(struct hclgevf_dev *hdev) 20261cc9bc6eSHuazhong Tan { 20271cc9bc6eSHuazhong Tan if (hclgevf_reset_prepare(hdev)) 20281cc9bc6eSHuazhong Tan goto err_reset; 20291cc9bc6eSHuazhong Tan 20301cc9bc6eSHuazhong Tan /* check if VF could successfully fetch the hardware reset completion 20311cc9bc6eSHuazhong Tan * status from the hardware 20321cc9bc6eSHuazhong Tan */ 20331cc9bc6eSHuazhong Tan if (hclgevf_reset_wait(hdev)) { 20341cc9bc6eSHuazhong Tan /* can't do much in this situation, will disable VF */ 20351cc9bc6eSHuazhong Tan dev_err(&hdev->pdev->dev, 20361cc9bc6eSHuazhong Tan "failed to fetch H/W reset completion status\n"); 20371cc9bc6eSHuazhong Tan goto err_reset; 20381cc9bc6eSHuazhong Tan } 20391cc9bc6eSHuazhong Tan 20401cc9bc6eSHuazhong Tan if (hclgevf_reset_rebuild(hdev)) 20411cc9bc6eSHuazhong Tan goto err_reset; 20421cc9bc6eSHuazhong Tan 20431cc9bc6eSHuazhong Tan return; 20441cc9bc6eSHuazhong Tan 20456a5f6fa3SHuazhong Tan err_reset: 2046bbe6540eSHuazhong Tan hclgevf_reset_err_handle(hdev); 20476988eb2aSSalil Mehta } 20486988eb2aSSalil Mehta 2049720bd583SHuazhong Tan static enum hnae3_reset_type hclgevf_get_reset_level(struct hclgevf_dev *hdev, 2050720bd583SHuazhong Tan unsigned long *addr) 2051720bd583SHuazhong Tan { 2052720bd583SHuazhong Tan enum hnae3_reset_type rst_level = HNAE3_NONE_RESET; 2053720bd583SHuazhong Tan 2054dea846e8SHuazhong Tan /* return the highest priority reset level amongst all */ 2055b90fcc5bSHuazhong Tan if (test_bit(HNAE3_VF_RESET, addr)) { 2056b90fcc5bSHuazhong Tan rst_level = HNAE3_VF_RESET; 2057b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_RESET, addr); 2058b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2059b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2060b90fcc5bSHuazhong Tan } else if (test_bit(HNAE3_VF_FULL_RESET, addr)) { 2061dea846e8SHuazhong Tan rst_level = HNAE3_VF_FULL_RESET; 2062dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FULL_RESET, addr); 2063dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2064aa5c4f17SHuazhong Tan } else if (test_bit(HNAE3_VF_PF_FUNC_RESET, addr)) { 2065aa5c4f17SHuazhong Tan rst_level = HNAE3_VF_PF_FUNC_RESET; 2066aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2067aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2068dea846e8SHuazhong Tan } else if (test_bit(HNAE3_VF_FUNC_RESET, addr)) { 2069dea846e8SHuazhong Tan rst_level = HNAE3_VF_FUNC_RESET; 2070dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 20716ff3cf07SHuazhong Tan } else if (test_bit(HNAE3_FLR_RESET, addr)) { 20726ff3cf07SHuazhong Tan rst_level = HNAE3_FLR_RESET; 20736ff3cf07SHuazhong Tan clear_bit(HNAE3_FLR_RESET, addr); 2074720bd583SHuazhong Tan } 2075720bd583SHuazhong Tan 2076720bd583SHuazhong Tan return rst_level; 2077720bd583SHuazhong Tan } 2078720bd583SHuazhong Tan 20796ae4e733SShiju Jose static void hclgevf_reset_event(struct pci_dev *pdev, 20806ae4e733SShiju Jose struct hnae3_handle *handle) 20816d4c3981SSalil Mehta { 20826ff3cf07SHuazhong Tan struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); 20836ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 20846d4c3981SSalil Mehta 20856d4c3981SSalil Mehta dev_info(&hdev->pdev->dev, "received reset request from VF enet\n"); 20866d4c3981SSalil Mehta 20876ff3cf07SHuazhong Tan if (hdev->default_reset_request) 20880742ed7cSHuazhong Tan hdev->reset_level = 2089720bd583SHuazhong Tan hclgevf_get_reset_level(hdev, 2090720bd583SHuazhong Tan &hdev->default_reset_request); 2091720bd583SHuazhong Tan else 2092dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 20936d4c3981SSalil Mehta 2094436667d2SSalil Mehta /* reset of this VF requested */ 2095436667d2SSalil Mehta set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state); 2096436667d2SSalil Mehta hclgevf_reset_task_schedule(hdev); 20976d4c3981SSalil Mehta 20980742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 20996d4c3981SSalil Mehta } 21006d4c3981SSalil Mehta 2101720bd583SHuazhong Tan static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev, 2102720bd583SHuazhong Tan enum hnae3_reset_type rst_type) 2103720bd583SHuazhong Tan { 2104720bd583SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2105720bd583SHuazhong Tan 2106720bd583SHuazhong Tan set_bit(rst_type, &hdev->default_reset_request); 2107720bd583SHuazhong Tan } 2108720bd583SHuazhong Tan 2109f28368bbSHuazhong Tan static void hclgevf_enable_vector(struct hclgevf_misc_vector *vector, bool en) 2110f28368bbSHuazhong Tan { 2111f28368bbSHuazhong Tan writel(en ? 1 : 0, vector->addr); 2112f28368bbSHuazhong Tan } 2113f28368bbSHuazhong Tan 21146ff3cf07SHuazhong Tan static void hclgevf_flr_prepare(struct hnae3_ae_dev *ae_dev) 21156ff3cf07SHuazhong Tan { 2116f28368bbSHuazhong Tan #define HCLGEVF_FLR_RETRY_WAIT_MS 500 2117f28368bbSHuazhong Tan #define HCLGEVF_FLR_RETRY_CNT 5 2118f28368bbSHuazhong Tan 21196ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2120f28368bbSHuazhong Tan int retry_cnt = 0; 2121f28368bbSHuazhong Tan int ret; 21226ff3cf07SHuazhong Tan 2123f28368bbSHuazhong Tan retry: 2124f28368bbSHuazhong Tan down(&hdev->reset_sem); 2125f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2126f28368bbSHuazhong Tan hdev->reset_type = HNAE3_FLR_RESET; 2127f28368bbSHuazhong Tan ret = hclgevf_reset_prepare(hdev); 2128f28368bbSHuazhong Tan if (ret) { 2129f28368bbSHuazhong Tan dev_err(&hdev->pdev->dev, "fail to prepare FLR, ret=%d\n", 2130f28368bbSHuazhong Tan ret); 2131f28368bbSHuazhong Tan if (hdev->reset_pending || 2132f28368bbSHuazhong Tan retry_cnt++ < HCLGEVF_FLR_RETRY_CNT) { 21336ff3cf07SHuazhong Tan dev_err(&hdev->pdev->dev, 2134f28368bbSHuazhong Tan "reset_pending:0x%lx, retry_cnt:%d\n", 2135f28368bbSHuazhong Tan hdev->reset_pending, retry_cnt); 2136f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2137f28368bbSHuazhong Tan up(&hdev->reset_sem); 2138f28368bbSHuazhong Tan msleep(HCLGEVF_FLR_RETRY_WAIT_MS); 2139f28368bbSHuazhong Tan goto retry; 2140f28368bbSHuazhong Tan } 2141f28368bbSHuazhong Tan } 2142f28368bbSHuazhong Tan 2143f28368bbSHuazhong Tan /* disable misc vector before FLR done */ 2144f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, false); 2145f28368bbSHuazhong Tan hdev->rst_stats.flr_rst_cnt++; 2146f28368bbSHuazhong Tan } 2147f28368bbSHuazhong Tan 2148f28368bbSHuazhong Tan static void hclgevf_flr_done(struct hnae3_ae_dev *ae_dev) 2149f28368bbSHuazhong Tan { 2150f28368bbSHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2151f28368bbSHuazhong Tan int ret; 2152f28368bbSHuazhong Tan 2153f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, true); 2154f28368bbSHuazhong Tan 2155f28368bbSHuazhong Tan ret = hclgevf_reset_rebuild(hdev); 2156f28368bbSHuazhong Tan if (ret) 2157f28368bbSHuazhong Tan dev_warn(&hdev->pdev->dev, "fail to rebuild, ret=%d\n", 2158f28368bbSHuazhong Tan ret); 2159f28368bbSHuazhong Tan 2160f28368bbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 2161f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2162f28368bbSHuazhong Tan up(&hdev->reset_sem); 21636ff3cf07SHuazhong Tan } 21646ff3cf07SHuazhong Tan 2165e2cb1decSSalil Mehta static u32 hclgevf_get_fw_version(struct hnae3_handle *handle) 2166e2cb1decSSalil Mehta { 2167e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2168e2cb1decSSalil Mehta 2169e2cb1decSSalil Mehta return hdev->fw_version; 2170e2cb1decSSalil Mehta } 2171e2cb1decSSalil Mehta 2172e2cb1decSSalil Mehta static void hclgevf_get_misc_vector(struct hclgevf_dev *hdev) 2173e2cb1decSSalil Mehta { 2174e2cb1decSSalil Mehta struct hclgevf_misc_vector *vector = &hdev->misc_vector; 2175e2cb1decSSalil Mehta 2176e2cb1decSSalil Mehta vector->vector_irq = pci_irq_vector(hdev->pdev, 2177e2cb1decSSalil Mehta HCLGEVF_MISC_VECTOR_NUM); 2178e2cb1decSSalil Mehta vector->addr = hdev->hw.io_base + HCLGEVF_MISC_VECTOR_REG_BASE; 2179e2cb1decSSalil Mehta /* vector status always valid for Vector 0 */ 2180e2cb1decSSalil Mehta hdev->vector_status[HCLGEVF_MISC_VECTOR_NUM] = 0; 2181e2cb1decSSalil Mehta hdev->vector_irq[HCLGEVF_MISC_VECTOR_NUM] = vector->vector_irq; 2182e2cb1decSSalil Mehta 2183e2cb1decSSalil Mehta hdev->num_msi_left -= 1; 2184e2cb1decSSalil Mehta hdev->num_msi_used += 1; 2185e2cb1decSSalil Mehta } 2186e2cb1decSSalil Mehta 218735a1e503SSalil Mehta void hclgevf_reset_task_schedule(struct hclgevf_dev *hdev) 218835a1e503SSalil Mehta { 2189ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2190ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, 2191ff200099SYunsheng Lin &hdev->state)) 21920ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 219335a1e503SSalil Mehta } 219435a1e503SSalil Mehta 219507a0556aSSalil Mehta void hclgevf_mbx_task_schedule(struct hclgevf_dev *hdev) 2196e2cb1decSSalil Mehta { 2197ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2198ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, 2199ff200099SYunsheng Lin &hdev->state)) 22000ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 220107a0556aSSalil Mehta } 2202e2cb1decSSalil Mehta 2203ff200099SYunsheng Lin static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 2204ff200099SYunsheng Lin unsigned long delay) 2205e2cb1decSSalil Mehta { 2206d5432455SGuojia Liao if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2207d5432455SGuojia Liao !test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 22080ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, delay); 2209e2cb1decSSalil Mehta } 2210e2cb1decSSalil Mehta 2211ff200099SYunsheng Lin static void hclgevf_reset_service_task(struct hclgevf_dev *hdev) 221235a1e503SSalil Mehta { 2213d6ad7c53SGuojia Liao #define HCLGEVF_MAX_RESET_ATTEMPTS_CNT 3 2214d6ad7c53SGuojia Liao 2215ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state)) 2216ff200099SYunsheng Lin return; 2217ff200099SYunsheng Lin 2218f28368bbSHuazhong Tan down(&hdev->reset_sem); 2219f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 222035a1e503SSalil Mehta 2221436667d2SSalil Mehta if (test_and_clear_bit(HCLGEVF_RESET_PENDING, 2222436667d2SSalil Mehta &hdev->reset_state)) { 2223436667d2SSalil Mehta /* PF has initmated that it is about to reset the hardware. 22249b2f3477SWeihang Li * We now have to poll & check if hardware has actually 22259b2f3477SWeihang Li * completed the reset sequence. On hardware reset completion, 22269b2f3477SWeihang Li * VF needs to reset the client and ae device. 222735a1e503SSalil Mehta */ 2228436667d2SSalil Mehta hdev->reset_attempts = 0; 2229436667d2SSalil Mehta 2230dea846e8SHuazhong Tan hdev->last_reset_time = jiffies; 2231dea846e8SHuazhong Tan while ((hdev->reset_type = 2232dea846e8SHuazhong Tan hclgevf_get_reset_level(hdev, &hdev->reset_pending)) 22331cc9bc6eSHuazhong Tan != HNAE3_NONE_RESET) 22341cc9bc6eSHuazhong Tan hclgevf_reset(hdev); 2235436667d2SSalil Mehta } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED, 2236436667d2SSalil Mehta &hdev->reset_state)) { 2237436667d2SSalil Mehta /* we could be here when either of below happens: 22389b2f3477SWeihang Li * 1. reset was initiated due to watchdog timeout caused by 2239436667d2SSalil Mehta * a. IMP was earlier reset and our TX got choked down and 2240436667d2SSalil Mehta * which resulted in watchdog reacting and inducing VF 2241436667d2SSalil Mehta * reset. This also means our cmdq would be unreliable. 2242436667d2SSalil Mehta * b. problem in TX due to other lower layer(example link 2243436667d2SSalil Mehta * layer not functioning properly etc.) 2244436667d2SSalil Mehta * 2. VF reset might have been initiated due to some config 2245436667d2SSalil Mehta * change. 2246436667d2SSalil Mehta * 2247436667d2SSalil Mehta * NOTE: Theres no clear way to detect above cases than to react 2248436667d2SSalil Mehta * to the response of PF for this reset request. PF will ack the 2249436667d2SSalil Mehta * 1b and 2. cases but we will not get any intimation about 1a 2250436667d2SSalil Mehta * from PF as cmdq would be in unreliable state i.e. mailbox 2251436667d2SSalil Mehta * communication between PF and VF would be broken. 225246ee7350SGuojia Liao * 225346ee7350SGuojia Liao * if we are never geting into pending state it means either: 2254436667d2SSalil Mehta * 1. PF is not receiving our request which could be due to IMP 2255436667d2SSalil Mehta * reset 2256436667d2SSalil Mehta * 2. PF is screwed 2257436667d2SSalil Mehta * We cannot do much for 2. but to check first we can try reset 2258436667d2SSalil Mehta * our PCIe + stack and see if it alleviates the problem. 2259436667d2SSalil Mehta */ 2260d6ad7c53SGuojia Liao if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) { 2261436667d2SSalil Mehta /* prepare for full reset of stack + pcie interface */ 2262dea846e8SHuazhong Tan set_bit(HNAE3_VF_FULL_RESET, &hdev->reset_pending); 2263436667d2SSalil Mehta 2264436667d2SSalil Mehta /* "defer" schedule the reset task again */ 2265436667d2SSalil Mehta set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2266436667d2SSalil Mehta } else { 2267436667d2SSalil Mehta hdev->reset_attempts++; 2268436667d2SSalil Mehta 2269dea846e8SHuazhong Tan set_bit(hdev->reset_level, &hdev->reset_pending); 2270dea846e8SHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2271436667d2SSalil Mehta } 2272dea846e8SHuazhong Tan hclgevf_reset_task_schedule(hdev); 2273436667d2SSalil Mehta } 227435a1e503SSalil Mehta 2275afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 227635a1e503SSalil Mehta clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2277f28368bbSHuazhong Tan up(&hdev->reset_sem); 227835a1e503SSalil Mehta } 227935a1e503SSalil Mehta 2280ff200099SYunsheng Lin static void hclgevf_mailbox_service_task(struct hclgevf_dev *hdev) 2281e2cb1decSSalil Mehta { 2282ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state)) 2283ff200099SYunsheng Lin return; 2284e2cb1decSSalil Mehta 2285e2cb1decSSalil Mehta if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state)) 2286e2cb1decSSalil Mehta return; 2287e2cb1decSSalil Mehta 228807a0556aSSalil Mehta hclgevf_mbx_async_handler(hdev); 2289e2cb1decSSalil Mehta 2290e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2291e2cb1decSSalil Mehta } 2292e2cb1decSSalil Mehta 2293ff200099SYunsheng Lin static void hclgevf_keep_alive(struct hclgevf_dev *hdev) 2294a6d818e3SYunsheng Lin { 2295d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2296a6d818e3SYunsheng Lin int ret; 2297a6d818e3SYunsheng Lin 22981416d333SHuazhong Tan if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) 2299c59a85c0SJian Shen return; 2300c59a85c0SJian Shen 2301d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_KEEP_ALIVE, 0); 2302d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2303a6d818e3SYunsheng Lin if (ret) 2304a6d818e3SYunsheng Lin dev_err(&hdev->pdev->dev, 2305a6d818e3SYunsheng Lin "VF sends keep alive cmd failed(=%d)\n", ret); 2306a6d818e3SYunsheng Lin } 2307a6d818e3SYunsheng Lin 2308ff200099SYunsheng Lin static void hclgevf_periodic_service_task(struct hclgevf_dev *hdev) 2309e2cb1decSSalil Mehta { 2310ff200099SYunsheng Lin unsigned long delta = round_jiffies_relative(HZ); 2311ff200099SYunsheng Lin struct hnae3_handle *handle = &hdev->nic; 2312e2cb1decSSalil Mehta 2313e6394363SGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 2314e6394363SGuangbin Huang return; 2315e6394363SGuangbin Huang 2316ff200099SYunsheng Lin if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) { 2317ff200099SYunsheng Lin delta = jiffies - hdev->last_serv_processed; 2318db01afebSliuzhongzhu 2319ff200099SYunsheng Lin if (delta < round_jiffies_relative(HZ)) { 2320ff200099SYunsheng Lin delta = round_jiffies_relative(HZ) - delta; 2321ff200099SYunsheng Lin goto out; 2322db01afebSliuzhongzhu } 2323ff200099SYunsheng Lin } 2324ff200099SYunsheng Lin 2325ff200099SYunsheng Lin hdev->serv_processed_cnt++; 2326ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_KEEP_ALIVE_TASK_INTERVAL)) 2327ff200099SYunsheng Lin hclgevf_keep_alive(hdev); 2328ff200099SYunsheng Lin 2329ff200099SYunsheng Lin if (test_bit(HCLGEVF_STATE_DOWN, &hdev->state)) { 2330ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2331ff200099SYunsheng Lin goto out; 2332ff200099SYunsheng Lin } 2333ff200099SYunsheng Lin 2334ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_STATS_TIMER_INTERVAL)) 2335ff200099SYunsheng Lin hclgevf_tqps_update_stats(handle); 2336e2cb1decSSalil Mehta 2337e2cb1decSSalil Mehta /* request the link status from the PF. PF would be able to tell VF 2338e2cb1decSSalil Mehta * about such updates in future so we might remove this later 2339e2cb1decSSalil Mehta */ 2340e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2341e2cb1decSSalil Mehta 23429194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 23439194d18bSliuzhongzhu 2344fe4144d4SJian Shen hclgevf_sync_vlan_filter(hdev); 2345fe4144d4SJian Shen 2346ee4bcd3bSJian Shen hclgevf_sync_mac_table(hdev); 2347ee4bcd3bSJian Shen 2348c631c696SJian Shen hclgevf_sync_promisc_mode(hdev); 2349c631c696SJian Shen 2350ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2351436667d2SSalil Mehta 2352ff200099SYunsheng Lin out: 2353ff200099SYunsheng Lin hclgevf_task_schedule(hdev, delta); 2354ff200099SYunsheng Lin } 2355b3c3fe8eSYunsheng Lin 2356ff200099SYunsheng Lin static void hclgevf_service_task(struct work_struct *work) 2357ff200099SYunsheng Lin { 2358ff200099SYunsheng Lin struct hclgevf_dev *hdev = container_of(work, struct hclgevf_dev, 2359ff200099SYunsheng Lin service_task.work); 2360ff200099SYunsheng Lin 2361ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2362ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2363ff200099SYunsheng Lin hclgevf_periodic_service_task(hdev); 2364ff200099SYunsheng Lin 2365ff200099SYunsheng Lin /* Handle reset and mbx again in case periodical task delays the 2366ff200099SYunsheng Lin * handling by calling hclgevf_task_schedule() in 2367ff200099SYunsheng Lin * hclgevf_periodic_service_task() 2368ff200099SYunsheng Lin */ 2369ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2370ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2371e2cb1decSSalil Mehta } 2372e2cb1decSSalil Mehta 2373e2cb1decSSalil Mehta static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr) 2374e2cb1decSSalil Mehta { 2375e2cb1decSSalil Mehta hclgevf_write_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_SRC_REG, regclr); 2376e2cb1decSSalil Mehta } 2377e2cb1decSSalil Mehta 2378b90fcc5bSHuazhong Tan static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, 2379b90fcc5bSHuazhong Tan u32 *clearval) 2380e2cb1decSSalil Mehta { 238113050921SHuazhong Tan u32 val, cmdq_stat_reg, rst_ing_reg; 2382e2cb1decSSalil Mehta 2383e2cb1decSSalil Mehta /* fetch the events from their corresponding regs */ 238413050921SHuazhong Tan cmdq_stat_reg = hclgevf_read_dev(&hdev->hw, 23859cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG); 238613050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RST_INT_B) & cmdq_stat_reg) { 2387b90fcc5bSHuazhong Tan rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 2388b90fcc5bSHuazhong Tan dev_info(&hdev->pdev->dev, 2389b90fcc5bSHuazhong Tan "receive reset interrupt 0x%x!\n", rst_ing_reg); 2390b90fcc5bSHuazhong Tan set_bit(HNAE3_VF_RESET, &hdev->reset_pending); 2391b90fcc5bSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2392ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 239313050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RST_INT_B); 2394c88a6e7dSHuazhong Tan hdev->rst_stats.vf_rst_cnt++; 239572e2fb07SHuazhong Tan /* set up VF hardware reset status, its PF will clear 239672e2fb07SHuazhong Tan * this status when PF has initialized done. 239772e2fb07SHuazhong Tan */ 239872e2fb07SHuazhong Tan val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); 239972e2fb07SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, 240072e2fb07SHuazhong Tan val | HCLGEVF_VF_RST_ING_BIT); 2401b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_RST; 2402b90fcc5bSHuazhong Tan } 2403b90fcc5bSHuazhong Tan 2404e2cb1decSSalil Mehta /* check for vector0 mailbox(=CMDQ RX) event source */ 240513050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) { 240613050921SHuazhong Tan /* for revision 0x21, clearing interrupt is writing bit 0 240713050921SHuazhong Tan * to the clear register, writing bit 1 means to keep the 240813050921SHuazhong Tan * old value. 240913050921SHuazhong Tan * for revision 0x20, the clear register is a read & write 241013050921SHuazhong Tan * register, so we should just write 0 to the bit we are 241113050921SHuazhong Tan * handling, and keep other bits as cmdq_stat_reg. 241213050921SHuazhong Tan */ 2413295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) 241413050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 241513050921SHuazhong Tan else 241613050921SHuazhong Tan *clearval = cmdq_stat_reg & 241713050921SHuazhong Tan ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 241813050921SHuazhong Tan 2419b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_MBX; 2420e2cb1decSSalil Mehta } 2421e2cb1decSSalil Mehta 2422e45afb39SHuazhong Tan /* print other vector0 event source */ 2423e45afb39SHuazhong Tan dev_info(&hdev->pdev->dev, 2424e45afb39SHuazhong Tan "vector 0 interrupt from unknown source, cmdq_src = %#x\n", 2425e45afb39SHuazhong Tan cmdq_stat_reg); 2426e2cb1decSSalil Mehta 2427b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_OTHER; 2428e2cb1decSSalil Mehta } 2429e2cb1decSSalil Mehta 2430e2cb1decSSalil Mehta static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) 2431e2cb1decSSalil Mehta { 2432b90fcc5bSHuazhong Tan enum hclgevf_evt_cause event_cause; 2433e2cb1decSSalil Mehta struct hclgevf_dev *hdev = data; 2434e2cb1decSSalil Mehta u32 clearval; 2435e2cb1decSSalil Mehta 2436e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 2437b90fcc5bSHuazhong Tan event_cause = hclgevf_check_evt_cause(hdev, &clearval); 2438e2cb1decSSalil Mehta 2439b90fcc5bSHuazhong Tan switch (event_cause) { 2440b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_RST: 2441b90fcc5bSHuazhong Tan hclgevf_reset_task_schedule(hdev); 2442b90fcc5bSHuazhong Tan break; 2443b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_MBX: 244407a0556aSSalil Mehta hclgevf_mbx_handler(hdev); 2445b90fcc5bSHuazhong Tan break; 2446b90fcc5bSHuazhong Tan default: 2447b90fcc5bSHuazhong Tan break; 2448b90fcc5bSHuazhong Tan } 2449e2cb1decSSalil Mehta 2450b90fcc5bSHuazhong Tan if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) { 2451e2cb1decSSalil Mehta hclgevf_clear_event_cause(hdev, clearval); 2452e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2453b90fcc5bSHuazhong Tan } 2454e2cb1decSSalil Mehta 2455e2cb1decSSalil Mehta return IRQ_HANDLED; 2456e2cb1decSSalil Mehta } 2457e2cb1decSSalil Mehta 2458e2cb1decSSalil Mehta static int hclgevf_configure(struct hclgevf_dev *hdev) 2459e2cb1decSSalil Mehta { 2460e2cb1decSSalil Mehta int ret; 2461e2cb1decSSalil Mehta 246292f11ea1SJian Shen /* get current port based vlan state from PF */ 246392f11ea1SJian Shen ret = hclgevf_get_port_base_vlan_filter_state(hdev); 246492f11ea1SJian Shen if (ret) 246592f11ea1SJian Shen return ret; 246692f11ea1SJian Shen 2467e2cb1decSSalil Mehta /* get queue configuration from PF */ 24686cee6fc3SJian Shen ret = hclgevf_get_queue_info(hdev); 2469e2cb1decSSalil Mehta if (ret) 2470e2cb1decSSalil Mehta return ret; 2471c0425944SPeng Li 2472c0425944SPeng Li /* get queue depth info from PF */ 2473c0425944SPeng Li ret = hclgevf_get_queue_depth(hdev); 2474c0425944SPeng Li if (ret) 2475c0425944SPeng Li return ret; 2476c0425944SPeng Li 24779c3e7130Sliuzhongzhu ret = hclgevf_get_pf_media_type(hdev); 24789c3e7130Sliuzhongzhu if (ret) 24799c3e7130Sliuzhongzhu return ret; 24809c3e7130Sliuzhongzhu 2481e2cb1decSSalil Mehta /* get tc configuration from PF */ 2482e2cb1decSSalil Mehta return hclgevf_get_tc_info(hdev); 2483e2cb1decSSalil Mehta } 2484e2cb1decSSalil Mehta 24857a01c897SSalil Mehta static int hclgevf_alloc_hdev(struct hnae3_ae_dev *ae_dev) 24867a01c897SSalil Mehta { 24877a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 24881154bb26SPeng Li struct hclgevf_dev *hdev; 24897a01c897SSalil Mehta 24907a01c897SSalil Mehta hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL); 24917a01c897SSalil Mehta if (!hdev) 24927a01c897SSalil Mehta return -ENOMEM; 24937a01c897SSalil Mehta 24947a01c897SSalil Mehta hdev->pdev = pdev; 24957a01c897SSalil Mehta hdev->ae_dev = ae_dev; 24967a01c897SSalil Mehta ae_dev->priv = hdev; 24977a01c897SSalil Mehta 24987a01c897SSalil Mehta return 0; 24997a01c897SSalil Mehta } 25007a01c897SSalil Mehta 2501e2cb1decSSalil Mehta static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev) 2502e2cb1decSSalil Mehta { 2503e2cb1decSSalil Mehta struct hnae3_handle *roce = &hdev->roce; 2504e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 2505e2cb1decSSalil Mehta 250607acf909SJian Shen roce->rinfo.num_vectors = hdev->num_roce_msix; 2507e2cb1decSSalil Mehta 2508e2cb1decSSalil Mehta if (hdev->num_msi_left < roce->rinfo.num_vectors || 2509e2cb1decSSalil Mehta hdev->num_msi_left == 0) 2510e2cb1decSSalil Mehta return -EINVAL; 2511e2cb1decSSalil Mehta 251207acf909SJian Shen roce->rinfo.base_vector = hdev->roce_base_vector; 2513e2cb1decSSalil Mehta 2514e2cb1decSSalil Mehta roce->rinfo.netdev = nic->kinfo.netdev; 2515e2cb1decSSalil Mehta roce->rinfo.roce_io_base = hdev->hw.io_base; 251630ae7f8aSHuazhong Tan roce->rinfo.roce_mem_base = hdev->hw.mem_base; 2517e2cb1decSSalil Mehta 2518e2cb1decSSalil Mehta roce->pdev = nic->pdev; 2519e2cb1decSSalil Mehta roce->ae_algo = nic->ae_algo; 2520e2cb1decSSalil Mehta roce->numa_node_mask = nic->numa_node_mask; 2521e2cb1decSSalil Mehta 2522e2cb1decSSalil Mehta return 0; 2523e2cb1decSSalil Mehta } 2524e2cb1decSSalil Mehta 2525b26a6feaSPeng Li static int hclgevf_config_gro(struct hclgevf_dev *hdev, bool en) 2526b26a6feaSPeng Li { 2527b26a6feaSPeng Li struct hclgevf_cfg_gro_status_cmd *req; 2528b26a6feaSPeng Li struct hclgevf_desc desc; 2529b26a6feaSPeng Li int ret; 2530b26a6feaSPeng Li 2531b26a6feaSPeng Li if (!hnae3_dev_gro_supported(hdev)) 2532b26a6feaSPeng Li return 0; 2533b26a6feaSPeng Li 2534b26a6feaSPeng Li hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_GRO_GENERIC_CONFIG, 2535b26a6feaSPeng Li false); 2536b26a6feaSPeng Li req = (struct hclgevf_cfg_gro_status_cmd *)desc.data; 2537b26a6feaSPeng Li 2538fb9e44d6SHuazhong Tan req->gro_en = en ? 1 : 0; 2539b26a6feaSPeng Li 2540b26a6feaSPeng Li ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 2541b26a6feaSPeng Li if (ret) 2542b26a6feaSPeng Li dev_err(&hdev->pdev->dev, 2543b26a6feaSPeng Li "VF GRO hardware config cmd failed, ret = %d.\n", ret); 2544b26a6feaSPeng Li 2545b26a6feaSPeng Li return ret; 2546b26a6feaSPeng Li } 2547b26a6feaSPeng Li 254887ce161eSGuangbin Huang static int hclgevf_rss_init_cfg(struct hclgevf_dev *hdev) 2549e2cb1decSSalil Mehta { 255087ce161eSGuangbin Huang u16 rss_ind_tbl_size = hdev->ae_dev->dev_specs.rss_ind_tbl_size; 2551e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2552944de484SGuojia Liao struct hclgevf_rss_tuple_cfg *tuple_sets; 25534093d1a2SGuangbin Huang u32 i; 2554e2cb1decSSalil Mehta 2555944de484SGuojia Liao rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 25564093d1a2SGuangbin Huang rss_cfg->rss_size = hdev->nic.kinfo.rss_size; 2557944de484SGuojia Liao tuple_sets = &rss_cfg->rss_tuple_sets; 2558295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 255987ce161eSGuangbin Huang u8 *rss_ind_tbl; 256087ce161eSGuangbin Huang 2561472d7eceSJian Shen rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_SIMPLE; 256287ce161eSGuangbin Huang 256387ce161eSGuangbin Huang rss_ind_tbl = devm_kcalloc(&hdev->pdev->dev, rss_ind_tbl_size, 256487ce161eSGuangbin Huang sizeof(*rss_ind_tbl), GFP_KERNEL); 256587ce161eSGuangbin Huang if (!rss_ind_tbl) 256687ce161eSGuangbin Huang return -ENOMEM; 256787ce161eSGuangbin Huang 256887ce161eSGuangbin Huang rss_cfg->rss_indirection_tbl = rss_ind_tbl; 2569472d7eceSJian Shen memcpy(rss_cfg->rss_hash_key, hclgevf_hash_key, 2570374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 2571374ad291SJian Shen 2572944de484SGuojia Liao tuple_sets->ipv4_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2573944de484SGuojia Liao tuple_sets->ipv4_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2574944de484SGuojia Liao tuple_sets->ipv4_sctp_en = HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2575944de484SGuojia Liao tuple_sets->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2576944de484SGuojia Liao tuple_sets->ipv6_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2577944de484SGuojia Liao tuple_sets->ipv6_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2578ab6e32d2SJian Shen tuple_sets->ipv6_sctp_en = 2579ab6e32d2SJian Shen hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 ? 2580ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP_NO_PORT : 2581ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2582944de484SGuojia Liao tuple_sets->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2583374ad291SJian Shen } 2584374ad291SJian Shen 25859b2f3477SWeihang Li /* Initialize RSS indirect table */ 258687ce161eSGuangbin Huang for (i = 0; i < rss_ind_tbl_size; i++) 25874093d1a2SGuangbin Huang rss_cfg->rss_indirection_tbl[i] = i % rss_cfg->rss_size; 258887ce161eSGuangbin Huang 258987ce161eSGuangbin Huang return 0; 2590944de484SGuojia Liao } 2591944de484SGuojia Liao 2592944de484SGuojia Liao static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) 2593944de484SGuojia Liao { 2594944de484SGuojia Liao struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2595944de484SGuojia Liao int ret; 2596944de484SGuojia Liao 2597295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 2598944de484SGuojia Liao ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo, 2599944de484SGuojia Liao rss_cfg->rss_hash_key); 2600944de484SGuojia Liao if (ret) 2601944de484SGuojia Liao return ret; 2602944de484SGuojia Liao 2603944de484SGuojia Liao ret = hclgevf_set_rss_input_tuple(hdev, rss_cfg); 2604944de484SGuojia Liao if (ret) 2605944de484SGuojia Liao return ret; 2606944de484SGuojia Liao } 2607e2cb1decSSalil Mehta 2608e2cb1decSSalil Mehta ret = hclgevf_set_rss_indir_table(hdev); 2609e2cb1decSSalil Mehta if (ret) 2610e2cb1decSSalil Mehta return ret; 2611e2cb1decSSalil Mehta 26124093d1a2SGuangbin Huang return hclgevf_set_rss_tc_mode(hdev, rss_cfg->rss_size); 2613e2cb1decSSalil Mehta } 2614e2cb1decSSalil Mehta 2615e2cb1decSSalil Mehta static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev) 2616e2cb1decSSalil Mehta { 2617e2cb1decSSalil Mehta return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0, 2618e2cb1decSSalil Mehta false); 2619e2cb1decSSalil Mehta } 2620e2cb1decSSalil Mehta 2621ff200099SYunsheng Lin static void hclgevf_flush_link_update(struct hclgevf_dev *hdev) 2622ff200099SYunsheng Lin { 2623ff200099SYunsheng Lin #define HCLGEVF_FLUSH_LINK_TIMEOUT 100000 2624ff200099SYunsheng Lin 2625ff200099SYunsheng Lin unsigned long last = hdev->serv_processed_cnt; 2626ff200099SYunsheng Lin int i = 0; 2627ff200099SYunsheng Lin 2628ff200099SYunsheng Lin while (test_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state) && 2629ff200099SYunsheng Lin i++ < HCLGEVF_FLUSH_LINK_TIMEOUT && 2630ff200099SYunsheng Lin last == hdev->serv_processed_cnt) 2631ff200099SYunsheng Lin usleep_range(1, 1); 2632ff200099SYunsheng Lin } 2633ff200099SYunsheng Lin 26348cdb992fSJian Shen static void hclgevf_set_timer_task(struct hnae3_handle *handle, bool enable) 26358cdb992fSJian Shen { 26368cdb992fSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 26378cdb992fSJian Shen 26388cdb992fSJian Shen if (enable) { 2639ff200099SYunsheng Lin hclgevf_task_schedule(hdev, 0); 26408cdb992fSJian Shen } else { 2641b3c3fe8eSYunsheng Lin set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2642ff200099SYunsheng Lin 2643ff200099SYunsheng Lin /* flush memory to make sure DOWN is seen by service task */ 2644ff200099SYunsheng Lin smp_mb__before_atomic(); 2645ff200099SYunsheng Lin hclgevf_flush_link_update(hdev); 26468cdb992fSJian Shen } 26478cdb992fSJian Shen } 26488cdb992fSJian Shen 2649e2cb1decSSalil Mehta static int hclgevf_ae_start(struct hnae3_handle *handle) 2650e2cb1decSSalil Mehta { 2651e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2652e2cb1decSSalil Mehta 2653e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 2654e2cb1decSSalil Mehta 2655e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2656e2cb1decSSalil Mehta 26579194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 26589194d18bSliuzhongzhu 2659e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2660e2cb1decSSalil Mehta 2661e2cb1decSSalil Mehta return 0; 2662e2cb1decSSalil Mehta } 2663e2cb1decSSalil Mehta 2664e2cb1decSSalil Mehta static void hclgevf_ae_stop(struct hnae3_handle *handle) 2665e2cb1decSSalil Mehta { 2666e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2667e2cb1decSSalil Mehta 26682f7e4896SFuyun Liang set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 26692f7e4896SFuyun Liang 2670146e92c1SHuazhong Tan if (hdev->reset_type != HNAE3_VF_RESET) 2671*8fa86551SYufeng Mo hclgevf_reset_tqp(handle); 267239cfbc9cSHuazhong Tan 2673e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 26748cc6c1f7SFuyun Liang hclgevf_update_link_status(hdev, 0); 2675e2cb1decSSalil Mehta } 2676e2cb1decSSalil Mehta 2677a6d818e3SYunsheng Lin static int hclgevf_set_alive(struct hnae3_handle *handle, bool alive) 2678a6d818e3SYunsheng Lin { 2679d3410018SYufeng Mo #define HCLGEVF_STATE_ALIVE 1 2680d3410018SYufeng Mo #define HCLGEVF_STATE_NOT_ALIVE 0 2681a6d818e3SYunsheng Lin 2682d3410018SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2683d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2684d3410018SYufeng Mo 2685d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_ALIVE, 0); 2686d3410018SYufeng Mo send_msg.data[0] = alive ? HCLGEVF_STATE_ALIVE : 2687d3410018SYufeng Mo HCLGEVF_STATE_NOT_ALIVE; 2688d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2689a6d818e3SYunsheng Lin } 2690a6d818e3SYunsheng Lin 2691a6d818e3SYunsheng Lin static int hclgevf_client_start(struct hnae3_handle *handle) 2692a6d818e3SYunsheng Lin { 2693f621df96SQinglang Miao return hclgevf_set_alive(handle, true); 2694a6d818e3SYunsheng Lin } 2695a6d818e3SYunsheng Lin 2696a6d818e3SYunsheng Lin static void hclgevf_client_stop(struct hnae3_handle *handle) 2697a6d818e3SYunsheng Lin { 2698a6d818e3SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2699a6d818e3SYunsheng Lin int ret; 2700a6d818e3SYunsheng Lin 2701a6d818e3SYunsheng Lin ret = hclgevf_set_alive(handle, false); 2702a6d818e3SYunsheng Lin if (ret) 2703a6d818e3SYunsheng Lin dev_warn(&hdev->pdev->dev, 2704a6d818e3SYunsheng Lin "%s failed %d\n", __func__, ret); 2705a6d818e3SYunsheng Lin } 2706a6d818e3SYunsheng Lin 2707e2cb1decSSalil Mehta static void hclgevf_state_init(struct hclgevf_dev *hdev) 2708e2cb1decSSalil Mehta { 2709e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state); 2710e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2711d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2712e2cb1decSSalil Mehta 2713b3c3fe8eSYunsheng Lin INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task); 271435a1e503SSalil Mehta 2715e2cb1decSSalil Mehta mutex_init(&hdev->mbx_resp.mbx_mutex); 2716f28368bbSHuazhong Tan sema_init(&hdev->reset_sem, 1); 2717e2cb1decSSalil Mehta 2718ee4bcd3bSJian Shen spin_lock_init(&hdev->mac_table.mac_list_lock); 2719ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.uc_mac_list); 2720ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.mc_mac_list); 2721ee4bcd3bSJian Shen 2722e2cb1decSSalil Mehta /* bring the device down */ 2723e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2724e2cb1decSSalil Mehta } 2725e2cb1decSSalil Mehta 2726e2cb1decSSalil Mehta static void hclgevf_state_uninit(struct hclgevf_dev *hdev) 2727e2cb1decSSalil Mehta { 2728e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2729acfc3d55SHuazhong Tan set_bit(HCLGEVF_STATE_REMOVING, &hdev->state); 2730e2cb1decSSalil Mehta 2731b3c3fe8eSYunsheng Lin if (hdev->service_task.work.func) 2732b3c3fe8eSYunsheng Lin cancel_delayed_work_sync(&hdev->service_task); 2733e2cb1decSSalil Mehta 2734e2cb1decSSalil Mehta mutex_destroy(&hdev->mbx_resp.mbx_mutex); 2735e2cb1decSSalil Mehta } 2736e2cb1decSSalil Mehta 2737e2cb1decSSalil Mehta static int hclgevf_init_msi(struct hclgevf_dev *hdev) 2738e2cb1decSSalil Mehta { 2739e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2740e2cb1decSSalil Mehta int vectors; 2741e2cb1decSSalil Mehta int i; 2742e2cb1decSSalil Mehta 2743580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) 274407acf909SJian Shen vectors = pci_alloc_irq_vectors(pdev, 274507acf909SJian Shen hdev->roce_base_msix_offset + 1, 274607acf909SJian Shen hdev->num_msi, 274707acf909SJian Shen PCI_IRQ_MSIX); 274807acf909SJian Shen else 2749580a05f9SYonglong Liu vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM, 2750580a05f9SYonglong Liu hdev->num_msi, 2751e2cb1decSSalil Mehta PCI_IRQ_MSI | PCI_IRQ_MSIX); 275207acf909SJian Shen 2753e2cb1decSSalil Mehta if (vectors < 0) { 2754e2cb1decSSalil Mehta dev_err(&pdev->dev, 2755e2cb1decSSalil Mehta "failed(%d) to allocate MSI/MSI-X vectors\n", 2756e2cb1decSSalil Mehta vectors); 2757e2cb1decSSalil Mehta return vectors; 2758e2cb1decSSalil Mehta } 2759e2cb1decSSalil Mehta if (vectors < hdev->num_msi) 2760e2cb1decSSalil Mehta dev_warn(&hdev->pdev->dev, 2761adcf738bSGuojia Liao "requested %u MSI/MSI-X, but allocated %d MSI/MSI-X\n", 2762e2cb1decSSalil Mehta hdev->num_msi, vectors); 2763e2cb1decSSalil Mehta 2764e2cb1decSSalil Mehta hdev->num_msi = vectors; 2765e2cb1decSSalil Mehta hdev->num_msi_left = vectors; 2766580a05f9SYonglong Liu 2767e2cb1decSSalil Mehta hdev->base_msi_vector = pdev->irq; 276807acf909SJian Shen hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset; 2769e2cb1decSSalil Mehta 2770e2cb1decSSalil Mehta hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi, 2771e2cb1decSSalil Mehta sizeof(u16), GFP_KERNEL); 2772e2cb1decSSalil Mehta if (!hdev->vector_status) { 2773e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2774e2cb1decSSalil Mehta return -ENOMEM; 2775e2cb1decSSalil Mehta } 2776e2cb1decSSalil Mehta 2777e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 2778e2cb1decSSalil Mehta hdev->vector_status[i] = HCLGEVF_INVALID_VPORT; 2779e2cb1decSSalil Mehta 2780e2cb1decSSalil Mehta hdev->vector_irq = devm_kcalloc(&pdev->dev, hdev->num_msi, 2781e2cb1decSSalil Mehta sizeof(int), GFP_KERNEL); 2782e2cb1decSSalil Mehta if (!hdev->vector_irq) { 2783862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2784e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2785e2cb1decSSalil Mehta return -ENOMEM; 2786e2cb1decSSalil Mehta } 2787e2cb1decSSalil Mehta 2788e2cb1decSSalil Mehta return 0; 2789e2cb1decSSalil Mehta } 2790e2cb1decSSalil Mehta 2791e2cb1decSSalil Mehta static void hclgevf_uninit_msi(struct hclgevf_dev *hdev) 2792e2cb1decSSalil Mehta { 2793e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2794e2cb1decSSalil Mehta 2795862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2796862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_irq); 2797e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2798e2cb1decSSalil Mehta } 2799e2cb1decSSalil Mehta 2800e2cb1decSSalil Mehta static int hclgevf_misc_irq_init(struct hclgevf_dev *hdev) 2801e2cb1decSSalil Mehta { 2802cdd332acSGuojia Liao int ret; 2803e2cb1decSSalil Mehta 2804e2cb1decSSalil Mehta hclgevf_get_misc_vector(hdev); 2805e2cb1decSSalil Mehta 2806f97c4d82SYonglong Liu snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s", 2807f97c4d82SYonglong Liu HCLGEVF_NAME, pci_name(hdev->pdev)); 2808e2cb1decSSalil Mehta ret = request_irq(hdev->misc_vector.vector_irq, hclgevf_misc_irq_handle, 2809f97c4d82SYonglong Liu 0, hdev->misc_vector.name, hdev); 2810e2cb1decSSalil Mehta if (ret) { 2811e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF failed to request misc irq(%d)\n", 2812e2cb1decSSalil Mehta hdev->misc_vector.vector_irq); 2813e2cb1decSSalil Mehta return ret; 2814e2cb1decSSalil Mehta } 2815e2cb1decSSalil Mehta 28161819e409SXi Wang hclgevf_clear_event_cause(hdev, 0); 28171819e409SXi Wang 2818e2cb1decSSalil Mehta /* enable misc. vector(vector 0) */ 2819e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2820e2cb1decSSalil Mehta 2821e2cb1decSSalil Mehta return ret; 2822e2cb1decSSalil Mehta } 2823e2cb1decSSalil Mehta 2824e2cb1decSSalil Mehta static void hclgevf_misc_irq_uninit(struct hclgevf_dev *hdev) 2825e2cb1decSSalil Mehta { 2826e2cb1decSSalil Mehta /* disable misc vector(vector 0) */ 2827e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 28281819e409SXi Wang synchronize_irq(hdev->misc_vector.vector_irq); 2829e2cb1decSSalil Mehta free_irq(hdev->misc_vector.vector_irq, hdev); 2830e2cb1decSSalil Mehta hclgevf_free_vector(hdev, 0); 2831e2cb1decSSalil Mehta } 2832e2cb1decSSalil Mehta 2833bb87be87SYonglong Liu static void hclgevf_info_show(struct hclgevf_dev *hdev) 2834bb87be87SYonglong Liu { 2835bb87be87SYonglong Liu struct device *dev = &hdev->pdev->dev; 2836bb87be87SYonglong Liu 2837bb87be87SYonglong Liu dev_info(dev, "VF info begin:\n"); 2838bb87be87SYonglong Liu 2839adcf738bSGuojia Liao dev_info(dev, "Task queue pairs numbers: %u\n", hdev->num_tqps); 2840adcf738bSGuojia Liao dev_info(dev, "Desc num per TX queue: %u\n", hdev->num_tx_desc); 2841adcf738bSGuojia Liao dev_info(dev, "Desc num per RX queue: %u\n", hdev->num_rx_desc); 2842adcf738bSGuojia Liao dev_info(dev, "Numbers of vports: %u\n", hdev->num_alloc_vport); 2843adcf738bSGuojia Liao dev_info(dev, "HW tc map: 0x%x\n", hdev->hw_tc_map); 2844adcf738bSGuojia Liao dev_info(dev, "PF media type of this VF: %u\n", 2845bb87be87SYonglong Liu hdev->hw.mac.media_type); 2846bb87be87SYonglong Liu 2847bb87be87SYonglong Liu dev_info(dev, "VF info end.\n"); 2848bb87be87SYonglong Liu } 2849bb87be87SYonglong Liu 28501db58f86SHuazhong Tan static int hclgevf_init_nic_client_instance(struct hnae3_ae_dev *ae_dev, 28511db58f86SHuazhong Tan struct hnae3_client *client) 28521db58f86SHuazhong Tan { 28531db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 28544cd5beaaSGuangbin Huang int rst_cnt = hdev->rst_stats.rst_cnt; 28551db58f86SHuazhong Tan int ret; 28561db58f86SHuazhong Tan 28571db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->nic); 28581db58f86SHuazhong Tan if (ret) 28591db58f86SHuazhong Tan return ret; 28601db58f86SHuazhong Tan 28611db58f86SHuazhong Tan set_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 28624cd5beaaSGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 28634cd5beaaSGuangbin Huang rst_cnt != hdev->rst_stats.rst_cnt) { 28644cd5beaaSGuangbin Huang clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 28654cd5beaaSGuangbin Huang 28664cd5beaaSGuangbin Huang client->ops->uninit_instance(&hdev->nic, 0); 28674cd5beaaSGuangbin Huang return -EBUSY; 28684cd5beaaSGuangbin Huang } 28694cd5beaaSGuangbin Huang 28701db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 28711db58f86SHuazhong Tan 28721db58f86SHuazhong Tan if (netif_msg_drv(&hdev->nic)) 28731db58f86SHuazhong Tan hclgevf_info_show(hdev); 28741db58f86SHuazhong Tan 28751db58f86SHuazhong Tan return 0; 28761db58f86SHuazhong Tan } 28771db58f86SHuazhong Tan 28781db58f86SHuazhong Tan static int hclgevf_init_roce_client_instance(struct hnae3_ae_dev *ae_dev, 28791db58f86SHuazhong Tan struct hnae3_client *client) 28801db58f86SHuazhong Tan { 28811db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 28821db58f86SHuazhong Tan int ret; 28831db58f86SHuazhong Tan 28841db58f86SHuazhong Tan if (!hnae3_dev_roce_supported(hdev) || !hdev->roce_client || 28851db58f86SHuazhong Tan !hdev->nic_client) 28861db58f86SHuazhong Tan return 0; 28871db58f86SHuazhong Tan 28881db58f86SHuazhong Tan ret = hclgevf_init_roce_base_info(hdev); 28891db58f86SHuazhong Tan if (ret) 28901db58f86SHuazhong Tan return ret; 28911db58f86SHuazhong Tan 28921db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->roce); 28931db58f86SHuazhong Tan if (ret) 28941db58f86SHuazhong Tan return ret; 28951db58f86SHuazhong Tan 2896fe735c84SHuazhong Tan set_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 28971db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 28981db58f86SHuazhong Tan 28991db58f86SHuazhong Tan return 0; 29001db58f86SHuazhong Tan } 29011db58f86SHuazhong Tan 2902e718a93fSPeng Li static int hclgevf_init_client_instance(struct hnae3_client *client, 2903e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2904e2cb1decSSalil Mehta { 2905e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2906e2cb1decSSalil Mehta int ret; 2907e2cb1decSSalil Mehta 2908e2cb1decSSalil Mehta switch (client->type) { 2909e2cb1decSSalil Mehta case HNAE3_CLIENT_KNIC: 2910e2cb1decSSalil Mehta hdev->nic_client = client; 2911e2cb1decSSalil Mehta hdev->nic.client = client; 2912e2cb1decSSalil Mehta 29131db58f86SHuazhong Tan ret = hclgevf_init_nic_client_instance(ae_dev, client); 2914e2cb1decSSalil Mehta if (ret) 291549dd8054SJian Shen goto clear_nic; 2916e2cb1decSSalil Mehta 29171db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, 29181db58f86SHuazhong Tan hdev->roce_client); 2919e2cb1decSSalil Mehta if (ret) 292049dd8054SJian Shen goto clear_roce; 2921d9f28fc2SJian Shen 2922e2cb1decSSalil Mehta break; 2923e2cb1decSSalil Mehta case HNAE3_CLIENT_ROCE: 2924544a7bcdSLijun Ou if (hnae3_dev_roce_supported(hdev)) { 2925e2cb1decSSalil Mehta hdev->roce_client = client; 2926e2cb1decSSalil Mehta hdev->roce.client = client; 2927544a7bcdSLijun Ou } 2928e2cb1decSSalil Mehta 29291db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, client); 2930e2cb1decSSalil Mehta if (ret) 293149dd8054SJian Shen goto clear_roce; 2932e2cb1decSSalil Mehta 2933fa7a4bd5SJian Shen break; 2934fa7a4bd5SJian Shen default: 2935fa7a4bd5SJian Shen return -EINVAL; 2936e2cb1decSSalil Mehta } 2937e2cb1decSSalil Mehta 2938e2cb1decSSalil Mehta return 0; 293949dd8054SJian Shen 294049dd8054SJian Shen clear_nic: 294149dd8054SJian Shen hdev->nic_client = NULL; 294249dd8054SJian Shen hdev->nic.client = NULL; 294349dd8054SJian Shen return ret; 294449dd8054SJian Shen clear_roce: 294549dd8054SJian Shen hdev->roce_client = NULL; 294649dd8054SJian Shen hdev->roce.client = NULL; 294749dd8054SJian Shen return ret; 2948e2cb1decSSalil Mehta } 2949e2cb1decSSalil Mehta 2950e718a93fSPeng Li static void hclgevf_uninit_client_instance(struct hnae3_client *client, 2951e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2952e2cb1decSSalil Mehta { 2953e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2954e718a93fSPeng Li 2955e2cb1decSSalil Mehta /* un-init roce, if it exists */ 295649dd8054SJian Shen if (hdev->roce_client) { 2957fe735c84SHuazhong Tan clear_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 2958e2cb1decSSalil Mehta hdev->roce_client->ops->uninit_instance(&hdev->roce, 0); 295949dd8054SJian Shen hdev->roce_client = NULL; 296049dd8054SJian Shen hdev->roce.client = NULL; 296149dd8054SJian Shen } 2962e2cb1decSSalil Mehta 2963e2cb1decSSalil Mehta /* un-init nic/unic, if this was not called by roce client */ 296449dd8054SJian Shen if (client->ops->uninit_instance && hdev->nic_client && 296549dd8054SJian Shen client->type != HNAE3_CLIENT_ROCE) { 296625d1817cSHuazhong Tan clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 296725d1817cSHuazhong Tan 2968e2cb1decSSalil Mehta client->ops->uninit_instance(&hdev->nic, 0); 296949dd8054SJian Shen hdev->nic_client = NULL; 297049dd8054SJian Shen hdev->nic.client = NULL; 297149dd8054SJian Shen } 2972e2cb1decSSalil Mehta } 2973e2cb1decSSalil Mehta 297430ae7f8aSHuazhong Tan static int hclgevf_dev_mem_map(struct hclgevf_dev *hdev) 297530ae7f8aSHuazhong Tan { 297630ae7f8aSHuazhong Tan #define HCLGEVF_MEM_BAR 4 297730ae7f8aSHuazhong Tan 297830ae7f8aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 297930ae7f8aSHuazhong Tan struct hclgevf_hw *hw = &hdev->hw; 298030ae7f8aSHuazhong Tan 298130ae7f8aSHuazhong Tan /* for device does not have device memory, return directly */ 298230ae7f8aSHuazhong Tan if (!(pci_select_bars(pdev, IORESOURCE_MEM) & BIT(HCLGEVF_MEM_BAR))) 298330ae7f8aSHuazhong Tan return 0; 298430ae7f8aSHuazhong Tan 298530ae7f8aSHuazhong Tan hw->mem_base = devm_ioremap_wc(&pdev->dev, 298630ae7f8aSHuazhong Tan pci_resource_start(pdev, 298730ae7f8aSHuazhong Tan HCLGEVF_MEM_BAR), 298830ae7f8aSHuazhong Tan pci_resource_len(pdev, HCLGEVF_MEM_BAR)); 298930ae7f8aSHuazhong Tan if (!hw->mem_base) { 2990be419fcaSColin Ian King dev_err(&pdev->dev, "failed to map device memory\n"); 299130ae7f8aSHuazhong Tan return -EFAULT; 299230ae7f8aSHuazhong Tan } 299330ae7f8aSHuazhong Tan 299430ae7f8aSHuazhong Tan return 0; 299530ae7f8aSHuazhong Tan } 299630ae7f8aSHuazhong Tan 2997e2cb1decSSalil Mehta static int hclgevf_pci_init(struct hclgevf_dev *hdev) 2998e2cb1decSSalil Mehta { 2999e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3000e2cb1decSSalil Mehta struct hclgevf_hw *hw; 3001e2cb1decSSalil Mehta int ret; 3002e2cb1decSSalil Mehta 3003e2cb1decSSalil Mehta ret = pci_enable_device(pdev); 3004e2cb1decSSalil Mehta if (ret) { 3005e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed to enable PCI device\n"); 30063e249d3bSFuyun Liang return ret; 3007e2cb1decSSalil Mehta } 3008e2cb1decSSalil Mehta 3009e2cb1decSSalil Mehta ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 3010e2cb1decSSalil Mehta if (ret) { 3011e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't set consistent PCI DMA, exiting"); 3012e2cb1decSSalil Mehta goto err_disable_device; 3013e2cb1decSSalil Mehta } 3014e2cb1decSSalil Mehta 3015e2cb1decSSalil Mehta ret = pci_request_regions(pdev, HCLGEVF_DRIVER_NAME); 3016e2cb1decSSalil Mehta if (ret) { 3017e2cb1decSSalil Mehta dev_err(&pdev->dev, "PCI request regions failed %d\n", ret); 3018e2cb1decSSalil Mehta goto err_disable_device; 3019e2cb1decSSalil Mehta } 3020e2cb1decSSalil Mehta 3021e2cb1decSSalil Mehta pci_set_master(pdev); 3022e2cb1decSSalil Mehta hw = &hdev->hw; 3023e2cb1decSSalil Mehta hw->hdev = hdev; 30242e1ea493SPeng Li hw->io_base = pci_iomap(pdev, 2, 0); 3025e2cb1decSSalil Mehta if (!hw->io_base) { 3026e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't map configuration register space\n"); 3027e2cb1decSSalil Mehta ret = -ENOMEM; 3028e2cb1decSSalil Mehta goto err_clr_master; 3029e2cb1decSSalil Mehta } 3030e2cb1decSSalil Mehta 303130ae7f8aSHuazhong Tan ret = hclgevf_dev_mem_map(hdev); 303230ae7f8aSHuazhong Tan if (ret) 303330ae7f8aSHuazhong Tan goto err_unmap_io_base; 303430ae7f8aSHuazhong Tan 3035e2cb1decSSalil Mehta return 0; 3036e2cb1decSSalil Mehta 303730ae7f8aSHuazhong Tan err_unmap_io_base: 303830ae7f8aSHuazhong Tan pci_iounmap(pdev, hdev->hw.io_base); 3039e2cb1decSSalil Mehta err_clr_master: 3040e2cb1decSSalil Mehta pci_clear_master(pdev); 3041e2cb1decSSalil Mehta pci_release_regions(pdev); 3042e2cb1decSSalil Mehta err_disable_device: 3043e2cb1decSSalil Mehta pci_disable_device(pdev); 30443e249d3bSFuyun Liang 3045e2cb1decSSalil Mehta return ret; 3046e2cb1decSSalil Mehta } 3047e2cb1decSSalil Mehta 3048e2cb1decSSalil Mehta static void hclgevf_pci_uninit(struct hclgevf_dev *hdev) 3049e2cb1decSSalil Mehta { 3050e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3051e2cb1decSSalil Mehta 305230ae7f8aSHuazhong Tan if (hdev->hw.mem_base) 305330ae7f8aSHuazhong Tan devm_iounmap(&pdev->dev, hdev->hw.mem_base); 305430ae7f8aSHuazhong Tan 3055e2cb1decSSalil Mehta pci_iounmap(pdev, hdev->hw.io_base); 3056e2cb1decSSalil Mehta pci_clear_master(pdev); 3057e2cb1decSSalil Mehta pci_release_regions(pdev); 3058e2cb1decSSalil Mehta pci_disable_device(pdev); 3059e2cb1decSSalil Mehta } 3060e2cb1decSSalil Mehta 306107acf909SJian Shen static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 306207acf909SJian Shen { 306307acf909SJian Shen struct hclgevf_query_res_cmd *req; 306407acf909SJian Shen struct hclgevf_desc desc; 306507acf909SJian Shen int ret; 306607acf909SJian Shen 306707acf909SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_VF_RSRC, true); 306807acf909SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 306907acf909SJian Shen if (ret) { 307007acf909SJian Shen dev_err(&hdev->pdev->dev, 307107acf909SJian Shen "query vf resource failed, ret = %d.\n", ret); 307207acf909SJian Shen return ret; 307307acf909SJian Shen } 307407acf909SJian Shen 307507acf909SJian Shen req = (struct hclgevf_query_res_cmd *)desc.data; 307607acf909SJian Shen 3077580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) { 307807acf909SJian Shen hdev->roce_base_msix_offset = 307960df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee), 308007acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_M, 308107acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_S); 308207acf909SJian Shen hdev->num_roce_msix = 308360df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 308407acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 308507acf909SJian Shen 3086580a05f9SYonglong Liu /* nic's msix numbers is always equals to the roce's. */ 3087580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_roce_msix; 3088580a05f9SYonglong Liu 308907acf909SJian Shen /* VF should have NIC vectors and Roce vectors, NIC vectors 309007acf909SJian Shen * are queued before Roce vectors. The offset is fixed to 64. 309107acf909SJian Shen */ 309207acf909SJian Shen hdev->num_msi = hdev->num_roce_msix + 309307acf909SJian Shen hdev->roce_base_msix_offset; 309407acf909SJian Shen } else { 309507acf909SJian Shen hdev->num_msi = 309660df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 309707acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 3098580a05f9SYonglong Liu 3099580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_msi; 3100580a05f9SYonglong Liu } 3101580a05f9SYonglong Liu 3102580a05f9SYonglong Liu if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) { 3103580a05f9SYonglong Liu dev_err(&hdev->pdev->dev, 3104580a05f9SYonglong Liu "Just %u msi resources, not enough for vf(min:2).\n", 3105580a05f9SYonglong Liu hdev->num_nic_msix); 3106580a05f9SYonglong Liu return -EINVAL; 310707acf909SJian Shen } 310807acf909SJian Shen 310907acf909SJian Shen return 0; 311007acf909SJian Shen } 311107acf909SJian Shen 3112af2aedc5SGuangbin Huang static void hclgevf_set_default_dev_specs(struct hclgevf_dev *hdev) 3113af2aedc5SGuangbin Huang { 3114af2aedc5SGuangbin Huang #define HCLGEVF_MAX_NON_TSO_BD_NUM 8U 3115af2aedc5SGuangbin Huang 3116af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3117af2aedc5SGuangbin Huang 3118af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = 3119af2aedc5SGuangbin Huang HCLGEVF_MAX_NON_TSO_BD_NUM; 3120af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 3121af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3122ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3123e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; 3124af2aedc5SGuangbin Huang } 3125af2aedc5SGuangbin Huang 3126af2aedc5SGuangbin Huang static void hclgevf_parse_dev_specs(struct hclgevf_dev *hdev, 3127af2aedc5SGuangbin Huang struct hclgevf_desc *desc) 3128af2aedc5SGuangbin Huang { 3129af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3130af2aedc5SGuangbin Huang struct hclgevf_dev_specs_0_cmd *req0; 3131ab16b49cSHuazhong Tan struct hclgevf_dev_specs_1_cmd *req1; 3132af2aedc5SGuangbin Huang 3133af2aedc5SGuangbin Huang req0 = (struct hclgevf_dev_specs_0_cmd *)desc[0].data; 3134ab16b49cSHuazhong Tan req1 = (struct hclgevf_dev_specs_1_cmd *)desc[1].data; 3135af2aedc5SGuangbin Huang 3136af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; 3137af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = 3138af2aedc5SGuangbin Huang le16_to_cpu(req0->rss_ind_tbl_size); 313991bfae25SHuazhong Tan ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); 3140af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size); 3141ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl); 3142e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size); 3143af2aedc5SGuangbin Huang } 3144af2aedc5SGuangbin Huang 314513297028SGuangbin Huang static void hclgevf_check_dev_specs(struct hclgevf_dev *hdev) 314613297028SGuangbin Huang { 314713297028SGuangbin Huang struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; 314813297028SGuangbin Huang 314913297028SGuangbin Huang if (!dev_specs->max_non_tso_bd_num) 315013297028SGuangbin Huang dev_specs->max_non_tso_bd_num = HCLGEVF_MAX_NON_TSO_BD_NUM; 315113297028SGuangbin Huang if (!dev_specs->rss_ind_tbl_size) 315213297028SGuangbin Huang dev_specs->rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 315313297028SGuangbin Huang if (!dev_specs->rss_key_size) 315413297028SGuangbin Huang dev_specs->rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3155ab16b49cSHuazhong Tan if (!dev_specs->max_int_gl) 3156ab16b49cSHuazhong Tan dev_specs->max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3157e070c8b9SYufeng Mo if (!dev_specs->max_frm_size) 3158e070c8b9SYufeng Mo dev_specs->max_frm_size = HCLGEVF_MAC_MAX_FRAME; 315913297028SGuangbin Huang } 316013297028SGuangbin Huang 3161af2aedc5SGuangbin Huang static int hclgevf_query_dev_specs(struct hclgevf_dev *hdev) 3162af2aedc5SGuangbin Huang { 3163af2aedc5SGuangbin Huang struct hclgevf_desc desc[HCLGEVF_QUERY_DEV_SPECS_BD_NUM]; 3164af2aedc5SGuangbin Huang int ret; 3165af2aedc5SGuangbin Huang int i; 3166af2aedc5SGuangbin Huang 3167af2aedc5SGuangbin Huang /* set default specifications as devices lower than version V3 do not 3168af2aedc5SGuangbin Huang * support querying specifications from firmware. 3169af2aedc5SGuangbin Huang */ 3170af2aedc5SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) { 3171af2aedc5SGuangbin Huang hclgevf_set_default_dev_specs(hdev); 3172af2aedc5SGuangbin Huang return 0; 3173af2aedc5SGuangbin Huang } 3174af2aedc5SGuangbin Huang 3175af2aedc5SGuangbin Huang for (i = 0; i < HCLGEVF_QUERY_DEV_SPECS_BD_NUM - 1; i++) { 3176af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], 3177af2aedc5SGuangbin Huang HCLGEVF_OPC_QUERY_DEV_SPECS, true); 3178af2aedc5SGuangbin Huang desc[i].flag |= cpu_to_le16(HCLGEVF_CMD_FLAG_NEXT); 3179af2aedc5SGuangbin Huang } 3180af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], HCLGEVF_OPC_QUERY_DEV_SPECS, 3181af2aedc5SGuangbin Huang true); 3182af2aedc5SGuangbin Huang 3183af2aedc5SGuangbin Huang ret = hclgevf_cmd_send(&hdev->hw, desc, HCLGEVF_QUERY_DEV_SPECS_BD_NUM); 3184af2aedc5SGuangbin Huang if (ret) 3185af2aedc5SGuangbin Huang return ret; 3186af2aedc5SGuangbin Huang 3187af2aedc5SGuangbin Huang hclgevf_parse_dev_specs(hdev, desc); 318813297028SGuangbin Huang hclgevf_check_dev_specs(hdev); 3189af2aedc5SGuangbin Huang 3190af2aedc5SGuangbin Huang return 0; 3191af2aedc5SGuangbin Huang } 3192af2aedc5SGuangbin Huang 3193862d969aSHuazhong Tan static int hclgevf_pci_reset(struct hclgevf_dev *hdev) 3194862d969aSHuazhong Tan { 3195862d969aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 3196862d969aSHuazhong Tan int ret = 0; 3197862d969aSHuazhong Tan 3198862d969aSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FULL_RESET && 3199862d969aSHuazhong Tan test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3200862d969aSHuazhong Tan hclgevf_misc_irq_uninit(hdev); 3201862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3202862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3203862d969aSHuazhong Tan } 3204862d969aSHuazhong Tan 3205862d969aSHuazhong Tan if (!test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3206862d969aSHuazhong Tan pci_set_master(pdev); 3207862d969aSHuazhong Tan ret = hclgevf_init_msi(hdev); 3208862d969aSHuazhong Tan if (ret) { 3209862d969aSHuazhong Tan dev_err(&pdev->dev, 3210862d969aSHuazhong Tan "failed(%d) to init MSI/MSI-X\n", ret); 3211862d969aSHuazhong Tan return ret; 3212862d969aSHuazhong Tan } 3213862d969aSHuazhong Tan 3214862d969aSHuazhong Tan ret = hclgevf_misc_irq_init(hdev); 3215862d969aSHuazhong Tan if (ret) { 3216862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3217862d969aSHuazhong Tan dev_err(&pdev->dev, "failed(%d) to init Misc IRQ(vector0)\n", 3218862d969aSHuazhong Tan ret); 3219862d969aSHuazhong Tan return ret; 3220862d969aSHuazhong Tan } 3221862d969aSHuazhong Tan 3222862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3223862d969aSHuazhong Tan } 3224862d969aSHuazhong Tan 3225862d969aSHuazhong Tan return ret; 3226862d969aSHuazhong Tan } 3227862d969aSHuazhong Tan 3228039ba863SJian Shen static int hclgevf_clear_vport_list(struct hclgevf_dev *hdev) 3229039ba863SJian Shen { 3230039ba863SJian Shen struct hclge_vf_to_pf_msg send_msg; 3231039ba863SJian Shen 3232039ba863SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_HANDLE_VF_TBL, 3233039ba863SJian Shen HCLGE_MBX_VPORT_LIST_CLEAR); 3234039ba863SJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3235039ba863SJian Shen } 3236039ba863SJian Shen 32379c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) 3238e2cb1decSSalil Mehta { 32397a01c897SSalil Mehta struct pci_dev *pdev = hdev->pdev; 3240e2cb1decSSalil Mehta int ret; 3241e2cb1decSSalil Mehta 3242862d969aSHuazhong Tan ret = hclgevf_pci_reset(hdev); 3243862d969aSHuazhong Tan if (ret) { 3244862d969aSHuazhong Tan dev_err(&pdev->dev, "pci reset failed %d\n", ret); 3245862d969aSHuazhong Tan return ret; 3246862d969aSHuazhong Tan } 3247862d969aSHuazhong Tan 32489c6f7085SHuazhong Tan ret = hclgevf_cmd_init(hdev); 32499c6f7085SHuazhong Tan if (ret) { 32509c6f7085SHuazhong Tan dev_err(&pdev->dev, "cmd failed %d\n", ret); 32519c6f7085SHuazhong Tan return ret; 32527a01c897SSalil Mehta } 3253e2cb1decSSalil Mehta 32549c6f7085SHuazhong Tan ret = hclgevf_rss_init_hw(hdev); 32559c6f7085SHuazhong Tan if (ret) { 32569c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 32579c6f7085SHuazhong Tan "failed(%d) to initialize RSS\n", ret); 32589c6f7085SHuazhong Tan return ret; 32599c6f7085SHuazhong Tan } 32609c6f7085SHuazhong Tan 3261b26a6feaSPeng Li ret = hclgevf_config_gro(hdev, true); 3262b26a6feaSPeng Li if (ret) 3263b26a6feaSPeng Li return ret; 3264b26a6feaSPeng Li 32659c6f7085SHuazhong Tan ret = hclgevf_init_vlan_config(hdev); 32669c6f7085SHuazhong Tan if (ret) { 32679c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 32689c6f7085SHuazhong Tan "failed(%d) to initialize VLAN config\n", ret); 32699c6f7085SHuazhong Tan return ret; 32709c6f7085SHuazhong Tan } 32719c6f7085SHuazhong Tan 3272c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 3273c631c696SJian Shen 32749c6f7085SHuazhong Tan dev_info(&hdev->pdev->dev, "Reset done\n"); 32759c6f7085SHuazhong Tan 32769c6f7085SHuazhong Tan return 0; 32779c6f7085SHuazhong Tan } 32789c6f7085SHuazhong Tan 32799c6f7085SHuazhong Tan static int hclgevf_init_hdev(struct hclgevf_dev *hdev) 32809c6f7085SHuazhong Tan { 32819c6f7085SHuazhong Tan struct pci_dev *pdev = hdev->pdev; 32829c6f7085SHuazhong Tan int ret; 32839c6f7085SHuazhong Tan 3284e2cb1decSSalil Mehta ret = hclgevf_pci_init(hdev); 328560df7e91SHuazhong Tan if (ret) 3286e2cb1decSSalil Mehta return ret; 3287e2cb1decSSalil Mehta 32888b0195a3SHuazhong Tan ret = hclgevf_cmd_queue_init(hdev); 328960df7e91SHuazhong Tan if (ret) 32908b0195a3SHuazhong Tan goto err_cmd_queue_init; 32918b0195a3SHuazhong Tan 3292eddf0462SYunsheng Lin ret = hclgevf_cmd_init(hdev); 3293eddf0462SYunsheng Lin if (ret) 3294eddf0462SYunsheng Lin goto err_cmd_init; 3295eddf0462SYunsheng Lin 329607acf909SJian Shen /* Get vf resource */ 329707acf909SJian Shen ret = hclgevf_query_vf_resource(hdev); 329860df7e91SHuazhong Tan if (ret) 32998b0195a3SHuazhong Tan goto err_cmd_init; 330007acf909SJian Shen 3301af2aedc5SGuangbin Huang ret = hclgevf_query_dev_specs(hdev); 3302af2aedc5SGuangbin Huang if (ret) { 3303af2aedc5SGuangbin Huang dev_err(&pdev->dev, 3304af2aedc5SGuangbin Huang "failed to query dev specifications, ret = %d\n", ret); 3305af2aedc5SGuangbin Huang goto err_cmd_init; 3306af2aedc5SGuangbin Huang } 3307af2aedc5SGuangbin Huang 330807acf909SJian Shen ret = hclgevf_init_msi(hdev); 330907acf909SJian Shen if (ret) { 331007acf909SJian Shen dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret); 33118b0195a3SHuazhong Tan goto err_cmd_init; 331207acf909SJian Shen } 331307acf909SJian Shen 331407acf909SJian Shen hclgevf_state_init(hdev); 3315dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 3316afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 331707acf909SJian Shen 3318e2cb1decSSalil Mehta ret = hclgevf_misc_irq_init(hdev); 331960df7e91SHuazhong Tan if (ret) 3320e2cb1decSSalil Mehta goto err_misc_irq_init; 3321e2cb1decSSalil Mehta 3322862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3323862d969aSHuazhong Tan 3324e2cb1decSSalil Mehta ret = hclgevf_configure(hdev); 3325e2cb1decSSalil Mehta if (ret) { 3326e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to fetch configuration\n", ret); 3327e2cb1decSSalil Mehta goto err_config; 3328e2cb1decSSalil Mehta } 3329e2cb1decSSalil Mehta 3330e2cb1decSSalil Mehta ret = hclgevf_alloc_tqps(hdev); 3331e2cb1decSSalil Mehta if (ret) { 3332e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret); 3333e2cb1decSSalil Mehta goto err_config; 3334e2cb1decSSalil Mehta } 3335e2cb1decSSalil Mehta 3336e2cb1decSSalil Mehta ret = hclgevf_set_handle_info(hdev); 333760df7e91SHuazhong Tan if (ret) 3338e2cb1decSSalil Mehta goto err_config; 3339e2cb1decSSalil Mehta 3340b26a6feaSPeng Li ret = hclgevf_config_gro(hdev, true); 3341b26a6feaSPeng Li if (ret) 3342b26a6feaSPeng Li goto err_config; 3343b26a6feaSPeng Li 3344e2cb1decSSalil Mehta /* Initialize RSS for this VF */ 334587ce161eSGuangbin Huang ret = hclgevf_rss_init_cfg(hdev); 334687ce161eSGuangbin Huang if (ret) { 334787ce161eSGuangbin Huang dev_err(&pdev->dev, "failed to init rss cfg, ret = %d\n", ret); 334887ce161eSGuangbin Huang goto err_config; 334987ce161eSGuangbin Huang } 335087ce161eSGuangbin Huang 3351e2cb1decSSalil Mehta ret = hclgevf_rss_init_hw(hdev); 3352e2cb1decSSalil Mehta if (ret) { 3353e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3354e2cb1decSSalil Mehta "failed(%d) to initialize RSS\n", ret); 3355e2cb1decSSalil Mehta goto err_config; 3356e2cb1decSSalil Mehta } 3357e2cb1decSSalil Mehta 3358039ba863SJian Shen /* ensure vf tbl list as empty before init*/ 3359039ba863SJian Shen ret = hclgevf_clear_vport_list(hdev); 3360039ba863SJian Shen if (ret) { 3361039ba863SJian Shen dev_err(&pdev->dev, 3362039ba863SJian Shen "failed to clear tbl list configuration, ret = %d.\n", 3363039ba863SJian Shen ret); 3364039ba863SJian Shen goto err_config; 3365039ba863SJian Shen } 3366039ba863SJian Shen 3367e2cb1decSSalil Mehta ret = hclgevf_init_vlan_config(hdev); 3368e2cb1decSSalil Mehta if (ret) { 3369e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3370e2cb1decSSalil Mehta "failed(%d) to initialize VLAN config\n", ret); 3371e2cb1decSSalil Mehta goto err_config; 3372e2cb1decSSalil Mehta } 3373e2cb1decSSalil Mehta 33740742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 337508d80a4cSHuazhong Tan dev_info(&hdev->pdev->dev, "finished initializing %s driver\n", 337608d80a4cSHuazhong Tan HCLGEVF_DRIVER_NAME); 3377e2cb1decSSalil Mehta 3378ff200099SYunsheng Lin hclgevf_task_schedule(hdev, round_jiffies_relative(HZ)); 3379ff200099SYunsheng Lin 3380e2cb1decSSalil Mehta return 0; 3381e2cb1decSSalil Mehta 3382e2cb1decSSalil Mehta err_config: 3383e2cb1decSSalil Mehta hclgevf_misc_irq_uninit(hdev); 3384e2cb1decSSalil Mehta err_misc_irq_init: 3385e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 3386e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 338707acf909SJian Shen err_cmd_init: 33888b0195a3SHuazhong Tan hclgevf_cmd_uninit(hdev); 33898b0195a3SHuazhong Tan err_cmd_queue_init: 3390e2cb1decSSalil Mehta hclgevf_pci_uninit(hdev); 3391862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3392e2cb1decSSalil Mehta return ret; 3393e2cb1decSSalil Mehta } 3394e2cb1decSSalil Mehta 33957a01c897SSalil Mehta static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev) 3396e2cb1decSSalil Mehta { 3397d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3398d3410018SYufeng Mo 3399e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 3400862d969aSHuazhong Tan 3401d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_VF_UNINIT, 0); 3402d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 340323b4201dSJian Shen 3404862d969aSHuazhong Tan if (test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3405eddf0462SYunsheng Lin hclgevf_misc_irq_uninit(hdev); 3406e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 34077a01c897SSalil Mehta } 34087a01c897SSalil Mehta 3409862d969aSHuazhong Tan hclgevf_cmd_uninit(hdev); 3410e3364c5fSZenghui Yu hclgevf_pci_uninit(hdev); 3411ee4bcd3bSJian Shen hclgevf_uninit_mac_list(hdev); 3412862d969aSHuazhong Tan } 3413862d969aSHuazhong Tan 34147a01c897SSalil Mehta static int hclgevf_init_ae_dev(struct hnae3_ae_dev *ae_dev) 34157a01c897SSalil Mehta { 34167a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 34177a01c897SSalil Mehta int ret; 34187a01c897SSalil Mehta 34197a01c897SSalil Mehta ret = hclgevf_alloc_hdev(ae_dev); 34207a01c897SSalil Mehta if (ret) { 34217a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device allocation failed\n"); 34227a01c897SSalil Mehta return ret; 34237a01c897SSalil Mehta } 34247a01c897SSalil Mehta 34257a01c897SSalil Mehta ret = hclgevf_init_hdev(ae_dev->priv); 3426a6d818e3SYunsheng Lin if (ret) { 34277a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device initialization failed\n"); 34287a01c897SSalil Mehta return ret; 34297a01c897SSalil Mehta } 34307a01c897SSalil Mehta 3431a6d818e3SYunsheng Lin return 0; 3432a6d818e3SYunsheng Lin } 3433a6d818e3SYunsheng Lin 34347a01c897SSalil Mehta static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) 34357a01c897SSalil Mehta { 34367a01c897SSalil Mehta struct hclgevf_dev *hdev = ae_dev->priv; 34377a01c897SSalil Mehta 34387a01c897SSalil Mehta hclgevf_uninit_hdev(hdev); 3439e2cb1decSSalil Mehta ae_dev->priv = NULL; 3440e2cb1decSSalil Mehta } 3441e2cb1decSSalil Mehta 3442849e4607SPeng Li static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev) 3443849e4607SPeng Li { 3444849e4607SPeng Li struct hnae3_handle *nic = &hdev->nic; 3445849e4607SPeng Li struct hnae3_knic_private_info *kinfo = &nic->kinfo; 3446849e4607SPeng Li 34478be73621SHuazhong Tan return min_t(u32, hdev->rss_size_max, 344835244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 3449849e4607SPeng Li } 3450849e4607SPeng Li 3451849e4607SPeng Li /** 3452849e4607SPeng Li * hclgevf_get_channels - Get the current channels enabled and max supported. 3453849e4607SPeng Li * @handle: hardware information for network interface 3454849e4607SPeng Li * @ch: ethtool channels structure 3455849e4607SPeng Li * 3456849e4607SPeng Li * We don't support separate tx and rx queues as channels. The other count 3457849e4607SPeng Li * represents how many queues are being used for control. max_combined counts 3458849e4607SPeng Li * how many queue pairs we can support. They may not be mapped 1 to 1 with 3459849e4607SPeng Li * q_vectors since we support a lot more queue pairs than q_vectors. 3460849e4607SPeng Li **/ 3461849e4607SPeng Li static void hclgevf_get_channels(struct hnae3_handle *handle, 3462849e4607SPeng Li struct ethtool_channels *ch) 3463849e4607SPeng Li { 3464849e4607SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3465849e4607SPeng Li 3466849e4607SPeng Li ch->max_combined = hclgevf_get_max_channels(hdev); 3467849e4607SPeng Li ch->other_count = 0; 3468849e4607SPeng Li ch->max_other = 0; 34698be73621SHuazhong Tan ch->combined_count = handle->kinfo.rss_size; 3470849e4607SPeng Li } 3471849e4607SPeng Li 3472cc719218SPeng Li static void hclgevf_get_tqps_and_rss_info(struct hnae3_handle *handle, 34730d43bf45SHuazhong Tan u16 *alloc_tqps, u16 *max_rss_size) 3474cc719218SPeng Li { 3475cc719218SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3476cc719218SPeng Li 34770d43bf45SHuazhong Tan *alloc_tqps = hdev->num_tqps; 3478cc719218SPeng Li *max_rss_size = hdev->rss_size_max; 3479cc719218SPeng Li } 3480cc719218SPeng Li 34814093d1a2SGuangbin Huang static void hclgevf_update_rss_size(struct hnae3_handle *handle, 34824093d1a2SGuangbin Huang u32 new_tqps_num) 34834093d1a2SGuangbin Huang { 34844093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 34854093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 34864093d1a2SGuangbin Huang u16 max_rss_size; 34874093d1a2SGuangbin Huang 34884093d1a2SGuangbin Huang kinfo->req_rss_size = new_tqps_num; 34894093d1a2SGuangbin Huang 34904093d1a2SGuangbin Huang max_rss_size = min_t(u16, hdev->rss_size_max, 349135244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 34924093d1a2SGuangbin Huang 34934093d1a2SGuangbin Huang /* Use the user's configuration when it is not larger than 34944093d1a2SGuangbin Huang * max_rss_size, otherwise, use the maximum specification value. 34954093d1a2SGuangbin Huang */ 34964093d1a2SGuangbin Huang if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && 34974093d1a2SGuangbin Huang kinfo->req_rss_size <= max_rss_size) 34984093d1a2SGuangbin Huang kinfo->rss_size = kinfo->req_rss_size; 34994093d1a2SGuangbin Huang else if (kinfo->rss_size > max_rss_size || 35004093d1a2SGuangbin Huang (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) 35014093d1a2SGuangbin Huang kinfo->rss_size = max_rss_size; 35024093d1a2SGuangbin Huang 350335244430SJian Shen kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; 35044093d1a2SGuangbin Huang } 35054093d1a2SGuangbin Huang 35064093d1a2SGuangbin Huang static int hclgevf_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, 35074093d1a2SGuangbin Huang bool rxfh_configured) 35084093d1a2SGuangbin Huang { 35094093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35104093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 35114093d1a2SGuangbin Huang u16 cur_rss_size = kinfo->rss_size; 35124093d1a2SGuangbin Huang u16 cur_tqps = kinfo->num_tqps; 35134093d1a2SGuangbin Huang u32 *rss_indir; 35144093d1a2SGuangbin Huang unsigned int i; 35154093d1a2SGuangbin Huang int ret; 35164093d1a2SGuangbin Huang 35174093d1a2SGuangbin Huang hclgevf_update_rss_size(handle, new_tqps_num); 35184093d1a2SGuangbin Huang 35194093d1a2SGuangbin Huang ret = hclgevf_set_rss_tc_mode(hdev, kinfo->rss_size); 35204093d1a2SGuangbin Huang if (ret) 35214093d1a2SGuangbin Huang return ret; 35224093d1a2SGuangbin Huang 35234093d1a2SGuangbin Huang /* RSS indirection table has been configuared by user */ 35244093d1a2SGuangbin Huang if (rxfh_configured) 35254093d1a2SGuangbin Huang goto out; 35264093d1a2SGuangbin Huang 35274093d1a2SGuangbin Huang /* Reinitializes the rss indirect table according to the new RSS size */ 352887ce161eSGuangbin Huang rss_indir = kcalloc(hdev->ae_dev->dev_specs.rss_ind_tbl_size, 352987ce161eSGuangbin Huang sizeof(u32), GFP_KERNEL); 35304093d1a2SGuangbin Huang if (!rss_indir) 35314093d1a2SGuangbin Huang return -ENOMEM; 35324093d1a2SGuangbin Huang 353387ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 35344093d1a2SGuangbin Huang rss_indir[i] = i % kinfo->rss_size; 35354093d1a2SGuangbin Huang 3536944de484SGuojia Liao hdev->rss_cfg.rss_size = kinfo->rss_size; 3537944de484SGuojia Liao 35384093d1a2SGuangbin Huang ret = hclgevf_set_rss(handle, rss_indir, NULL, 0); 35394093d1a2SGuangbin Huang if (ret) 35404093d1a2SGuangbin Huang dev_err(&hdev->pdev->dev, "set rss indir table fail, ret=%d\n", 35414093d1a2SGuangbin Huang ret); 35424093d1a2SGuangbin Huang 35434093d1a2SGuangbin Huang kfree(rss_indir); 35444093d1a2SGuangbin Huang 35454093d1a2SGuangbin Huang out: 35464093d1a2SGuangbin Huang if (!ret) 35474093d1a2SGuangbin Huang dev_info(&hdev->pdev->dev, 35484093d1a2SGuangbin Huang "Channels changed, rss_size from %u to %u, tqps from %u to %u", 35494093d1a2SGuangbin Huang cur_rss_size, kinfo->rss_size, 355035244430SJian Shen cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc); 35514093d1a2SGuangbin Huang 35524093d1a2SGuangbin Huang return ret; 35534093d1a2SGuangbin Huang } 35544093d1a2SGuangbin Huang 3555175ec96bSFuyun Liang static int hclgevf_get_status(struct hnae3_handle *handle) 3556175ec96bSFuyun Liang { 3557175ec96bSFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3558175ec96bSFuyun Liang 3559175ec96bSFuyun Liang return hdev->hw.mac.link; 3560175ec96bSFuyun Liang } 3561175ec96bSFuyun Liang 35624a152de9SFuyun Liang static void hclgevf_get_ksettings_an_result(struct hnae3_handle *handle, 35634a152de9SFuyun Liang u8 *auto_neg, u32 *speed, 35644a152de9SFuyun Liang u8 *duplex) 35654a152de9SFuyun Liang { 35664a152de9SFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35674a152de9SFuyun Liang 35684a152de9SFuyun Liang if (speed) 35694a152de9SFuyun Liang *speed = hdev->hw.mac.speed; 35704a152de9SFuyun Liang if (duplex) 35714a152de9SFuyun Liang *duplex = hdev->hw.mac.duplex; 35724a152de9SFuyun Liang if (auto_neg) 35734a152de9SFuyun Liang *auto_neg = AUTONEG_DISABLE; 35744a152de9SFuyun Liang } 35754a152de9SFuyun Liang 35764a152de9SFuyun Liang void hclgevf_update_speed_duplex(struct hclgevf_dev *hdev, u32 speed, 35774a152de9SFuyun Liang u8 duplex) 35784a152de9SFuyun Liang { 35794a152de9SFuyun Liang hdev->hw.mac.speed = speed; 35804a152de9SFuyun Liang hdev->hw.mac.duplex = duplex; 35814a152de9SFuyun Liang } 35824a152de9SFuyun Liang 35831731be4cSYonglong Liu static int hclgevf_gro_en(struct hnae3_handle *handle, bool enable) 35845c9f6b39SPeng Li { 35855c9f6b39SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35865c9f6b39SPeng Li 35875c9f6b39SPeng Li return hclgevf_config_gro(hdev, enable); 35885c9f6b39SPeng Li } 35895c9f6b39SPeng Li 359088d10bd6SJian Shen static void hclgevf_get_media_type(struct hnae3_handle *handle, u8 *media_type, 359188d10bd6SJian Shen u8 *module_type) 3592c136b884SPeng Li { 3593c136b884SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 359488d10bd6SJian Shen 3595c136b884SPeng Li if (media_type) 3596c136b884SPeng Li *media_type = hdev->hw.mac.media_type; 359788d10bd6SJian Shen 359888d10bd6SJian Shen if (module_type) 359988d10bd6SJian Shen *module_type = hdev->hw.mac.module_type; 3600c136b884SPeng Li } 3601c136b884SPeng Li 36024d60291bSHuazhong Tan static bool hclgevf_get_hw_reset_stat(struct hnae3_handle *handle) 36034d60291bSHuazhong Tan { 36044d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36054d60291bSHuazhong Tan 3606aa5c4f17SHuazhong Tan return !!hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 36074d60291bSHuazhong Tan } 36084d60291bSHuazhong Tan 3609fe735c84SHuazhong Tan static bool hclgevf_get_cmdq_stat(struct hnae3_handle *handle) 3610fe735c84SHuazhong Tan { 3611fe735c84SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3612fe735c84SHuazhong Tan 3613fe735c84SHuazhong Tan return test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 3614fe735c84SHuazhong Tan } 3615fe735c84SHuazhong Tan 36164d60291bSHuazhong Tan static bool hclgevf_ae_dev_resetting(struct hnae3_handle *handle) 36174d60291bSHuazhong Tan { 36184d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36194d60291bSHuazhong Tan 36204d60291bSHuazhong Tan return test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 36214d60291bSHuazhong Tan } 36224d60291bSHuazhong Tan 36234d60291bSHuazhong Tan static unsigned long hclgevf_ae_dev_reset_cnt(struct hnae3_handle *handle) 36244d60291bSHuazhong Tan { 36254d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36264d60291bSHuazhong Tan 3627c88a6e7dSHuazhong Tan return hdev->rst_stats.hw_rst_done_cnt; 36284d60291bSHuazhong Tan } 36294d60291bSHuazhong Tan 36309194d18bSliuzhongzhu static void hclgevf_get_link_mode(struct hnae3_handle *handle, 36319194d18bSliuzhongzhu unsigned long *supported, 36329194d18bSliuzhongzhu unsigned long *advertising) 36339194d18bSliuzhongzhu { 36349194d18bSliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36359194d18bSliuzhongzhu 36369194d18bSliuzhongzhu *supported = hdev->hw.mac.supported; 36379194d18bSliuzhongzhu *advertising = hdev->hw.mac.advertising; 36389194d18bSliuzhongzhu } 36399194d18bSliuzhongzhu 36401600c3e5SJian Shen #define MAX_SEPARATE_NUM 4 36411600c3e5SJian Shen #define SEPARATOR_VALUE 0xFFFFFFFF 36421600c3e5SJian Shen #define REG_NUM_PER_LINE 4 36431600c3e5SJian Shen #define REG_LEN_PER_LINE (REG_NUM_PER_LINE * sizeof(u32)) 36441600c3e5SJian Shen 36451600c3e5SJian Shen static int hclgevf_get_regs_len(struct hnae3_handle *handle) 36461600c3e5SJian Shen { 36471600c3e5SJian Shen int cmdq_lines, common_lines, ring_lines, tqp_intr_lines; 36481600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36491600c3e5SJian Shen 36501600c3e5SJian Shen cmdq_lines = sizeof(cmdq_reg_addr_list) / REG_LEN_PER_LINE + 1; 36511600c3e5SJian Shen common_lines = sizeof(common_reg_addr_list) / REG_LEN_PER_LINE + 1; 36521600c3e5SJian Shen ring_lines = sizeof(ring_reg_addr_list) / REG_LEN_PER_LINE + 1; 36531600c3e5SJian Shen tqp_intr_lines = sizeof(tqp_intr_reg_addr_list) / REG_LEN_PER_LINE + 1; 36541600c3e5SJian Shen 36551600c3e5SJian Shen return (cmdq_lines + common_lines + ring_lines * hdev->num_tqps + 36561600c3e5SJian Shen tqp_intr_lines * (hdev->num_msi_used - 1)) * REG_LEN_PER_LINE; 36571600c3e5SJian Shen } 36581600c3e5SJian Shen 36591600c3e5SJian Shen static void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version, 36601600c3e5SJian Shen void *data) 36611600c3e5SJian Shen { 36621600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36631600c3e5SJian Shen int i, j, reg_um, separator_num; 36641600c3e5SJian Shen u32 *reg = data; 36651600c3e5SJian Shen 36661600c3e5SJian Shen *version = hdev->fw_version; 36671600c3e5SJian Shen 36681600c3e5SJian Shen /* fetching per-VF registers values from VF PCIe register space */ 36691600c3e5SJian Shen reg_um = sizeof(cmdq_reg_addr_list) / sizeof(u32); 36701600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 36711600c3e5SJian Shen for (i = 0; i < reg_um; i++) 36721600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]); 36731600c3e5SJian Shen for (i = 0; i < separator_num; i++) 36741600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 36751600c3e5SJian Shen 36761600c3e5SJian Shen reg_um = sizeof(common_reg_addr_list) / sizeof(u32); 36771600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 36781600c3e5SJian Shen for (i = 0; i < reg_um; i++) 36791600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]); 36801600c3e5SJian Shen for (i = 0; i < separator_num; i++) 36811600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 36821600c3e5SJian Shen 36831600c3e5SJian Shen reg_um = sizeof(ring_reg_addr_list) / sizeof(u32); 36841600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 36851600c3e5SJian Shen for (j = 0; j < hdev->num_tqps; j++) { 36861600c3e5SJian Shen for (i = 0; i < reg_um; i++) 36871600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 36881600c3e5SJian Shen ring_reg_addr_list[i] + 36891600c3e5SJian Shen 0x200 * j); 36901600c3e5SJian Shen for (i = 0; i < separator_num; i++) 36911600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 36921600c3e5SJian Shen } 36931600c3e5SJian Shen 36941600c3e5SJian Shen reg_um = sizeof(tqp_intr_reg_addr_list) / sizeof(u32); 36951600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 36961600c3e5SJian Shen for (j = 0; j < hdev->num_msi_used - 1; j++) { 36971600c3e5SJian Shen for (i = 0; i < reg_um; i++) 36981600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 36991600c3e5SJian Shen tqp_intr_reg_addr_list[i] + 37001600c3e5SJian Shen 4 * j); 37011600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37021600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37031600c3e5SJian Shen } 37041600c3e5SJian Shen } 37051600c3e5SJian Shen 370692f11ea1SJian Shen void hclgevf_update_port_base_vlan_info(struct hclgevf_dev *hdev, u16 state, 370792f11ea1SJian Shen u8 *port_base_vlan_info, u8 data_size) 370892f11ea1SJian Shen { 370992f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 3710d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3711a6f7bfdcSJian Shen int ret; 371292f11ea1SJian Shen 371392f11ea1SJian Shen rtnl_lock(); 3714a6f7bfdcSJian Shen 3715b7b5d25bSGuojia Liao if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 3716b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) { 3717a6f7bfdcSJian Shen dev_warn(&hdev->pdev->dev, 3718a6f7bfdcSJian Shen "is resetting when updating port based vlan info\n"); 371992f11ea1SJian Shen rtnl_unlock(); 3720a6f7bfdcSJian Shen return; 3721a6f7bfdcSJian Shen } 3722a6f7bfdcSJian Shen 3723a6f7bfdcSJian Shen ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 3724a6f7bfdcSJian Shen if (ret) { 3725a6f7bfdcSJian Shen rtnl_unlock(); 3726a6f7bfdcSJian Shen return; 3727a6f7bfdcSJian Shen } 372892f11ea1SJian Shen 372992f11ea1SJian Shen /* send msg to PF and wait update port based vlan info */ 3730d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 3731d3410018SYufeng Mo HCLGE_MBX_PORT_BASE_VLAN_CFG); 3732d3410018SYufeng Mo memcpy(send_msg.data, port_base_vlan_info, data_size); 3733a6f7bfdcSJian Shen ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3734a6f7bfdcSJian Shen if (!ret) { 373592f11ea1SJian Shen if (state == HNAE3_PORT_BASE_VLAN_DISABLE) 3736a6f7bfdcSJian Shen nic->port_base_vlan_state = state; 373792f11ea1SJian Shen else 373892f11ea1SJian Shen nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE; 3739a6f7bfdcSJian Shen } 374092f11ea1SJian Shen 374192f11ea1SJian Shen hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 374292f11ea1SJian Shen rtnl_unlock(); 374392f11ea1SJian Shen } 374492f11ea1SJian Shen 3745e2cb1decSSalil Mehta static const struct hnae3_ae_ops hclgevf_ops = { 3746e2cb1decSSalil Mehta .init_ae_dev = hclgevf_init_ae_dev, 3747e2cb1decSSalil Mehta .uninit_ae_dev = hclgevf_uninit_ae_dev, 37486ff3cf07SHuazhong Tan .flr_prepare = hclgevf_flr_prepare, 37496ff3cf07SHuazhong Tan .flr_done = hclgevf_flr_done, 3750e718a93fSPeng Li .init_client_instance = hclgevf_init_client_instance, 3751e718a93fSPeng Li .uninit_client_instance = hclgevf_uninit_client_instance, 3752e2cb1decSSalil Mehta .start = hclgevf_ae_start, 3753e2cb1decSSalil Mehta .stop = hclgevf_ae_stop, 3754a6d818e3SYunsheng Lin .client_start = hclgevf_client_start, 3755a6d818e3SYunsheng Lin .client_stop = hclgevf_client_stop, 3756e2cb1decSSalil Mehta .map_ring_to_vector = hclgevf_map_ring_to_vector, 3757e2cb1decSSalil Mehta .unmap_ring_from_vector = hclgevf_unmap_ring_from_vector, 3758e2cb1decSSalil Mehta .get_vector = hclgevf_get_vector, 37590d3e6631SYunsheng Lin .put_vector = hclgevf_put_vector, 3760e2cb1decSSalil Mehta .reset_queue = hclgevf_reset_tqp, 3761e2cb1decSSalil Mehta .get_mac_addr = hclgevf_get_mac_addr, 3762e2cb1decSSalil Mehta .set_mac_addr = hclgevf_set_mac_addr, 3763e2cb1decSSalil Mehta .add_uc_addr = hclgevf_add_uc_addr, 3764e2cb1decSSalil Mehta .rm_uc_addr = hclgevf_rm_uc_addr, 3765e2cb1decSSalil Mehta .add_mc_addr = hclgevf_add_mc_addr, 3766e2cb1decSSalil Mehta .rm_mc_addr = hclgevf_rm_mc_addr, 3767e2cb1decSSalil Mehta .get_stats = hclgevf_get_stats, 3768e2cb1decSSalil Mehta .update_stats = hclgevf_update_stats, 3769e2cb1decSSalil Mehta .get_strings = hclgevf_get_strings, 3770e2cb1decSSalil Mehta .get_sset_count = hclgevf_get_sset_count, 3771e2cb1decSSalil Mehta .get_rss_key_size = hclgevf_get_rss_key_size, 3772e2cb1decSSalil Mehta .get_rss = hclgevf_get_rss, 3773e2cb1decSSalil Mehta .set_rss = hclgevf_set_rss, 3774d97b3072SJian Shen .get_rss_tuple = hclgevf_get_rss_tuple, 3775d97b3072SJian Shen .set_rss_tuple = hclgevf_set_rss_tuple, 3776e2cb1decSSalil Mehta .get_tc_size = hclgevf_get_tc_size, 3777e2cb1decSSalil Mehta .get_fw_version = hclgevf_get_fw_version, 3778e2cb1decSSalil Mehta .set_vlan_filter = hclgevf_set_vlan_filter, 3779b2641e2aSYunsheng Lin .enable_hw_strip_rxvtag = hclgevf_en_hw_strip_rxvtag, 37806d4c3981SSalil Mehta .reset_event = hclgevf_reset_event, 3781720bd583SHuazhong Tan .set_default_reset_request = hclgevf_set_def_reset_request, 37824093d1a2SGuangbin Huang .set_channels = hclgevf_set_channels, 3783849e4607SPeng Li .get_channels = hclgevf_get_channels, 3784cc719218SPeng Li .get_tqps_and_rss_info = hclgevf_get_tqps_and_rss_info, 37851600c3e5SJian Shen .get_regs_len = hclgevf_get_regs_len, 37861600c3e5SJian Shen .get_regs = hclgevf_get_regs, 3787175ec96bSFuyun Liang .get_status = hclgevf_get_status, 37884a152de9SFuyun Liang .get_ksettings_an_result = hclgevf_get_ksettings_an_result, 3789c136b884SPeng Li .get_media_type = hclgevf_get_media_type, 37904d60291bSHuazhong Tan .get_hw_reset_stat = hclgevf_get_hw_reset_stat, 37914d60291bSHuazhong Tan .ae_dev_resetting = hclgevf_ae_dev_resetting, 37924d60291bSHuazhong Tan .ae_dev_reset_cnt = hclgevf_ae_dev_reset_cnt, 37935c9f6b39SPeng Li .set_gro_en = hclgevf_gro_en, 3794818f1675SYunsheng Lin .set_mtu = hclgevf_set_mtu, 37950c29d191Sliuzhongzhu .get_global_queue_id = hclgevf_get_qid_global, 37968cdb992fSJian Shen .set_timer_task = hclgevf_set_timer_task, 37979194d18bSliuzhongzhu .get_link_mode = hclgevf_get_link_mode, 3798e196ec75SJian Shen .set_promisc_mode = hclgevf_set_promisc_mode, 3799c631c696SJian Shen .request_update_promisc_mode = hclgevf_request_update_promisc_mode, 3800fe735c84SHuazhong Tan .get_cmdq_stat = hclgevf_get_cmdq_stat, 3801e2cb1decSSalil Mehta }; 3802e2cb1decSSalil Mehta 3803e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf = { 3804e2cb1decSSalil Mehta .ops = &hclgevf_ops, 3805e2cb1decSSalil Mehta .pdev_id_table = ae_algovf_pci_tbl, 3806e2cb1decSSalil Mehta }; 3807e2cb1decSSalil Mehta 3808e2cb1decSSalil Mehta static int hclgevf_init(void) 3809e2cb1decSSalil Mehta { 3810e2cb1decSSalil Mehta pr_info("%s is initializing\n", HCLGEVF_NAME); 3811e2cb1decSSalil Mehta 381216deaef2SYunsheng Lin hclgevf_wq = alloc_workqueue("%s", 0, 0, HCLGEVF_NAME); 38130ea68902SYunsheng Lin if (!hclgevf_wq) { 38140ea68902SYunsheng Lin pr_err("%s: failed to create workqueue\n", HCLGEVF_NAME); 38150ea68902SYunsheng Lin return -ENOMEM; 38160ea68902SYunsheng Lin } 38170ea68902SYunsheng Lin 3818854cf33aSFuyun Liang hnae3_register_ae_algo(&ae_algovf); 3819854cf33aSFuyun Liang 3820854cf33aSFuyun Liang return 0; 3821e2cb1decSSalil Mehta } 3822e2cb1decSSalil Mehta 3823e2cb1decSSalil Mehta static void hclgevf_exit(void) 3824e2cb1decSSalil Mehta { 3825e2cb1decSSalil Mehta hnae3_unregister_ae_algo(&ae_algovf); 38260ea68902SYunsheng Lin destroy_workqueue(hclgevf_wq); 3827e2cb1decSSalil Mehta } 3828e2cb1decSSalil Mehta module_init(hclgevf_init); 3829e2cb1decSSalil Mehta module_exit(hclgevf_exit); 3830e2cb1decSSalil Mehta 3831e2cb1decSSalil Mehta MODULE_LICENSE("GPL"); 3832e2cb1decSSalil Mehta MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 3833e2cb1decSSalil Mehta MODULE_DESCRIPTION("HCLGEVF Driver"); 3834e2cb1decSSalil Mehta MODULE_VERSION(HCLGEVF_MOD_VERSION); 3835