1e2cb1decSSalil Mehta // SPDX-License-Identifier: GPL-2.0+ 2e2cb1decSSalil Mehta // Copyright (c) 2016-2017 Hisilicon Limited. 3e2cb1decSSalil Mehta 4e2cb1decSSalil Mehta #include <linux/etherdevice.h> 5aa5c4f17SHuazhong Tan #include <linux/iopoll.h> 66988eb2aSSalil Mehta #include <net/rtnetlink.h> 7e2cb1decSSalil Mehta #include "hclgevf_cmd.h" 8e2cb1decSSalil Mehta #include "hclgevf_main.h" 9e2cb1decSSalil Mehta #include "hclge_mbx.h" 10e2cb1decSSalil Mehta #include "hnae3.h" 11e2cb1decSSalil Mehta 12e2cb1decSSalil Mehta #define HCLGEVF_NAME "hclgevf" 13e2cb1decSSalil Mehta 14bbe6540eSHuazhong Tan #define HCLGEVF_RESET_MAX_FAIL_CNT 5 15bbe6540eSHuazhong Tan 169c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev); 175e7414cdSJian Shen static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 185e7414cdSJian Shen unsigned long delay); 195e7414cdSJian Shen 20e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf; 21e2cb1decSSalil Mehta 220ea68902SYunsheng Lin static struct workqueue_struct *hclgevf_wq; 230ea68902SYunsheng Lin 24e2cb1decSSalil Mehta static const struct pci_device_id ae_algovf_pci_tbl[] = { 25c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_VF), 0}, 26c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF), 27c155e22bSGuangbin Huang HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 28e2cb1decSSalil Mehta /* required last entry */ 29e2cb1decSSalil Mehta {0, } 30e2cb1decSSalil Mehta }; 31e2cb1decSSalil Mehta 32472d7eceSJian Shen static const u8 hclgevf_hash_key[] = { 33472d7eceSJian Shen 0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2, 34472d7eceSJian Shen 0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0, 35472d7eceSJian Shen 0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4, 36472d7eceSJian Shen 0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C, 37472d7eceSJian Shen 0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA 38472d7eceSJian Shen }; 39472d7eceSJian Shen 402f550a46SYunsheng Lin MODULE_DEVICE_TABLE(pci, ae_algovf_pci_tbl); 412f550a46SYunsheng Lin 421600c3e5SJian Shen static const u32 cmdq_reg_addr_list[] = {HCLGEVF_CMDQ_TX_ADDR_L_REG, 431600c3e5SJian Shen HCLGEVF_CMDQ_TX_ADDR_H_REG, 441600c3e5SJian Shen HCLGEVF_CMDQ_TX_DEPTH_REG, 451600c3e5SJian Shen HCLGEVF_CMDQ_TX_TAIL_REG, 461600c3e5SJian Shen HCLGEVF_CMDQ_TX_HEAD_REG, 471600c3e5SJian Shen HCLGEVF_CMDQ_RX_ADDR_L_REG, 481600c3e5SJian Shen HCLGEVF_CMDQ_RX_ADDR_H_REG, 491600c3e5SJian Shen HCLGEVF_CMDQ_RX_DEPTH_REG, 501600c3e5SJian Shen HCLGEVF_CMDQ_RX_TAIL_REG, 511600c3e5SJian Shen HCLGEVF_CMDQ_RX_HEAD_REG, 521600c3e5SJian Shen HCLGEVF_VECTOR0_CMDQ_SRC_REG, 539cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG, 541600c3e5SJian Shen HCLGEVF_CMDQ_INTR_EN_REG, 551600c3e5SJian Shen HCLGEVF_CMDQ_INTR_GEN_REG}; 561600c3e5SJian Shen 571600c3e5SJian Shen static const u32 common_reg_addr_list[] = {HCLGEVF_MISC_VECTOR_REG_BASE, 581600c3e5SJian Shen HCLGEVF_RST_ING, 591600c3e5SJian Shen HCLGEVF_GRO_EN_REG}; 601600c3e5SJian Shen 611600c3e5SJian Shen static const u32 ring_reg_addr_list[] = {HCLGEVF_RING_RX_ADDR_L_REG, 621600c3e5SJian Shen HCLGEVF_RING_RX_ADDR_H_REG, 631600c3e5SJian Shen HCLGEVF_RING_RX_BD_NUM_REG, 641600c3e5SJian Shen HCLGEVF_RING_RX_BD_LENGTH_REG, 651600c3e5SJian Shen HCLGEVF_RING_RX_MERGE_EN_REG, 661600c3e5SJian Shen HCLGEVF_RING_RX_TAIL_REG, 671600c3e5SJian Shen HCLGEVF_RING_RX_HEAD_REG, 681600c3e5SJian Shen HCLGEVF_RING_RX_FBD_NUM_REG, 691600c3e5SJian Shen HCLGEVF_RING_RX_OFFSET_REG, 701600c3e5SJian Shen HCLGEVF_RING_RX_FBD_OFFSET_REG, 711600c3e5SJian Shen HCLGEVF_RING_RX_STASH_REG, 721600c3e5SJian Shen HCLGEVF_RING_RX_BD_ERR_REG, 731600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_L_REG, 741600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_H_REG, 751600c3e5SJian Shen HCLGEVF_RING_TX_BD_NUM_REG, 761600c3e5SJian Shen HCLGEVF_RING_TX_PRIORITY_REG, 771600c3e5SJian Shen HCLGEVF_RING_TX_TC_REG, 781600c3e5SJian Shen HCLGEVF_RING_TX_MERGE_EN_REG, 791600c3e5SJian Shen HCLGEVF_RING_TX_TAIL_REG, 801600c3e5SJian Shen HCLGEVF_RING_TX_HEAD_REG, 811600c3e5SJian Shen HCLGEVF_RING_TX_FBD_NUM_REG, 821600c3e5SJian Shen HCLGEVF_RING_TX_OFFSET_REG, 831600c3e5SJian Shen HCLGEVF_RING_TX_EBD_NUM_REG, 841600c3e5SJian Shen HCLGEVF_RING_TX_EBD_OFFSET_REG, 851600c3e5SJian Shen HCLGEVF_RING_TX_BD_ERR_REG, 861600c3e5SJian Shen HCLGEVF_RING_EN_REG}; 871600c3e5SJian Shen 881600c3e5SJian Shen static const u32 tqp_intr_reg_addr_list[] = {HCLGEVF_TQP_INTR_CTRL_REG, 891600c3e5SJian Shen HCLGEVF_TQP_INTR_GL0_REG, 901600c3e5SJian Shen HCLGEVF_TQP_INTR_GL1_REG, 911600c3e5SJian Shen HCLGEVF_TQP_INTR_GL2_REG, 921600c3e5SJian Shen HCLGEVF_TQP_INTR_RL_REG}; 931600c3e5SJian Shen 949b2f3477SWeihang Li static struct hclgevf_dev *hclgevf_ae_get_hdev(struct hnae3_handle *handle) 95e2cb1decSSalil Mehta { 96eed9535fSPeng Li if (!handle->client) 97eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, nic); 98eed9535fSPeng Li else if (handle->client->type == HNAE3_CLIENT_ROCE) 99eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, roce); 100eed9535fSPeng Li else 101e2cb1decSSalil Mehta return container_of(handle, struct hclgevf_dev, nic); 102e2cb1decSSalil Mehta } 103e2cb1decSSalil Mehta 104e2cb1decSSalil Mehta static int hclgevf_tqps_update_stats(struct hnae3_handle *handle) 105e2cb1decSSalil Mehta { 106b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 107e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 108e2cb1decSSalil Mehta struct hclgevf_desc desc; 109e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 110e2cb1decSSalil Mehta int status; 111e2cb1decSSalil Mehta int i; 112e2cb1decSSalil Mehta 113b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 114b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 115e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, 116e2cb1decSSalil Mehta HCLGEVF_OPC_QUERY_RX_STATUS, 117e2cb1decSSalil Mehta true); 118e2cb1decSSalil Mehta 119e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 120e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 121e2cb1decSSalil Mehta if (status) { 122e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 123e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 124e2cb1decSSalil Mehta status, i); 125e2cb1decSSalil Mehta return status; 126e2cb1decSSalil Mehta } 127e2cb1decSSalil Mehta tqp->tqp_stats.rcb_rx_ring_pktnum_rcd += 128cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 129e2cb1decSSalil Mehta 130e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_TX_STATUS, 131e2cb1decSSalil Mehta true); 132e2cb1decSSalil Mehta 133e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 134e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 135e2cb1decSSalil Mehta if (status) { 136e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 137e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 138e2cb1decSSalil Mehta status, i); 139e2cb1decSSalil Mehta return status; 140e2cb1decSSalil Mehta } 141e2cb1decSSalil Mehta tqp->tqp_stats.rcb_tx_ring_pktnum_rcd += 142cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 143e2cb1decSSalil Mehta } 144e2cb1decSSalil Mehta 145e2cb1decSSalil Mehta return 0; 146e2cb1decSSalil Mehta } 147e2cb1decSSalil Mehta 148e2cb1decSSalil Mehta static u64 *hclgevf_tqps_get_stats(struct hnae3_handle *handle, u64 *data) 149e2cb1decSSalil Mehta { 150e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo = &handle->kinfo; 151e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 152e2cb1decSSalil Mehta u64 *buff = data; 153e2cb1decSSalil Mehta int i; 154e2cb1decSSalil Mehta 155b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 156b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 157e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_tx_ring_pktnum_rcd; 158e2cb1decSSalil Mehta } 159e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 160b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 161e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_rx_ring_pktnum_rcd; 162e2cb1decSSalil Mehta } 163e2cb1decSSalil Mehta 164e2cb1decSSalil Mehta return buff; 165e2cb1decSSalil Mehta } 166e2cb1decSSalil Mehta 167e2cb1decSSalil Mehta static int hclgevf_tqps_get_sset_count(struct hnae3_handle *handle, int strset) 168e2cb1decSSalil Mehta { 169b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 170e2cb1decSSalil Mehta 171b4f1d303SJian Shen return kinfo->num_tqps * 2; 172e2cb1decSSalil Mehta } 173e2cb1decSSalil Mehta 174e2cb1decSSalil Mehta static u8 *hclgevf_tqps_get_strings(struct hnae3_handle *handle, u8 *data) 175e2cb1decSSalil Mehta { 176b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 177e2cb1decSSalil Mehta u8 *buff = data; 1789d8d5a36SYufeng Mo int i; 179e2cb1decSSalil Mehta 180b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 181b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 182e2cb1decSSalil Mehta struct hclgevf_tqp, q); 183c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "txq%u_pktnum_rcd", 184e2cb1decSSalil Mehta tqp->index); 185e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 186e2cb1decSSalil Mehta } 187e2cb1decSSalil Mehta 188b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 189b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 190e2cb1decSSalil Mehta struct hclgevf_tqp, q); 191c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "rxq%u_pktnum_rcd", 192e2cb1decSSalil Mehta tqp->index); 193e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 194e2cb1decSSalil Mehta } 195e2cb1decSSalil Mehta 196e2cb1decSSalil Mehta return buff; 197e2cb1decSSalil Mehta } 198e2cb1decSSalil Mehta 199e2cb1decSSalil Mehta static void hclgevf_update_stats(struct hnae3_handle *handle, 200e2cb1decSSalil Mehta struct net_device_stats *net_stats) 201e2cb1decSSalil Mehta { 202e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 203e2cb1decSSalil Mehta int status; 204e2cb1decSSalil Mehta 205e2cb1decSSalil Mehta status = hclgevf_tqps_update_stats(handle); 206e2cb1decSSalil Mehta if (status) 207e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 208e2cb1decSSalil Mehta "VF update of TQPS stats fail, status = %d.\n", 209e2cb1decSSalil Mehta status); 210e2cb1decSSalil Mehta } 211e2cb1decSSalil Mehta 212e2cb1decSSalil Mehta static int hclgevf_get_sset_count(struct hnae3_handle *handle, int strset) 213e2cb1decSSalil Mehta { 214e2cb1decSSalil Mehta if (strset == ETH_SS_TEST) 215e2cb1decSSalil Mehta return -EOPNOTSUPP; 216e2cb1decSSalil Mehta else if (strset == ETH_SS_STATS) 217e2cb1decSSalil Mehta return hclgevf_tqps_get_sset_count(handle, strset); 218e2cb1decSSalil Mehta 219e2cb1decSSalil Mehta return 0; 220e2cb1decSSalil Mehta } 221e2cb1decSSalil Mehta 222e2cb1decSSalil Mehta static void hclgevf_get_strings(struct hnae3_handle *handle, u32 strset, 223e2cb1decSSalil Mehta u8 *data) 224e2cb1decSSalil Mehta { 225e2cb1decSSalil Mehta u8 *p = (char *)data; 226e2cb1decSSalil Mehta 227e2cb1decSSalil Mehta if (strset == ETH_SS_STATS) 228e2cb1decSSalil Mehta p = hclgevf_tqps_get_strings(handle, p); 229e2cb1decSSalil Mehta } 230e2cb1decSSalil Mehta 231e2cb1decSSalil Mehta static void hclgevf_get_stats(struct hnae3_handle *handle, u64 *data) 232e2cb1decSSalil Mehta { 233e2cb1decSSalil Mehta hclgevf_tqps_get_stats(handle, data); 234e2cb1decSSalil Mehta } 235e2cb1decSSalil Mehta 236d3410018SYufeng Mo static void hclgevf_build_send_msg(struct hclge_vf_to_pf_msg *msg, u8 code, 237d3410018SYufeng Mo u8 subcode) 238d3410018SYufeng Mo { 239d3410018SYufeng Mo if (msg) { 240d3410018SYufeng Mo memset(msg, 0, sizeof(struct hclge_vf_to_pf_msg)); 241d3410018SYufeng Mo msg->code = code; 242d3410018SYufeng Mo msg->subcode = subcode; 243d3410018SYufeng Mo } 244d3410018SYufeng Mo } 245d3410018SYufeng Mo 246e2cb1decSSalil Mehta static int hclgevf_get_tc_info(struct hclgevf_dev *hdev) 247e2cb1decSSalil Mehta { 248d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 249e2cb1decSSalil Mehta u8 resp_msg; 250e2cb1decSSalil Mehta int status; 251e2cb1decSSalil Mehta 252d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_TCINFO, 0); 253d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, 254d3410018SYufeng Mo sizeof(resp_msg)); 255e2cb1decSSalil Mehta if (status) { 256e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 257e2cb1decSSalil Mehta "VF request to get TC info from PF failed %d", 258e2cb1decSSalil Mehta status); 259e2cb1decSSalil Mehta return status; 260e2cb1decSSalil Mehta } 261e2cb1decSSalil Mehta 262e2cb1decSSalil Mehta hdev->hw_tc_map = resp_msg; 263e2cb1decSSalil Mehta 264e2cb1decSSalil Mehta return 0; 265e2cb1decSSalil Mehta } 266e2cb1decSSalil Mehta 26792f11ea1SJian Shen static int hclgevf_get_port_base_vlan_filter_state(struct hclgevf_dev *hdev) 26892f11ea1SJian Shen { 26992f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 270d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 27192f11ea1SJian Shen u8 resp_msg; 27292f11ea1SJian Shen int ret; 27392f11ea1SJian Shen 274d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 275d3410018SYufeng Mo HCLGE_MBX_GET_PORT_BASE_VLAN_STATE); 276d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, 277d3410018SYufeng Mo sizeof(u8)); 27892f11ea1SJian Shen if (ret) { 27992f11ea1SJian Shen dev_err(&hdev->pdev->dev, 28092f11ea1SJian Shen "VF request to get port based vlan state failed %d", 28192f11ea1SJian Shen ret); 28292f11ea1SJian Shen return ret; 28392f11ea1SJian Shen } 28492f11ea1SJian Shen 28592f11ea1SJian Shen nic->port_base_vlan_state = resp_msg; 28692f11ea1SJian Shen 28792f11ea1SJian Shen return 0; 28892f11ea1SJian Shen } 28992f11ea1SJian Shen 2906cee6fc3SJian Shen static int hclgevf_get_queue_info(struct hclgevf_dev *hdev) 291e2cb1decSSalil Mehta { 292c0425944SPeng Li #define HCLGEVF_TQPS_RSS_INFO_LEN 6 293d3410018SYufeng Mo #define HCLGEVF_TQPS_ALLOC_OFFSET 0 294d3410018SYufeng Mo #define HCLGEVF_TQPS_RSS_SIZE_OFFSET 2 295d3410018SYufeng Mo #define HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET 4 296d3410018SYufeng Mo 297e2cb1decSSalil Mehta u8 resp_msg[HCLGEVF_TQPS_RSS_INFO_LEN]; 298d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 299e2cb1decSSalil Mehta int status; 300e2cb1decSSalil Mehta 301d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QINFO, 0); 302d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 303e2cb1decSSalil Mehta HCLGEVF_TQPS_RSS_INFO_LEN); 304e2cb1decSSalil Mehta if (status) { 305e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 306e2cb1decSSalil Mehta "VF request to get tqp info from PF failed %d", 307e2cb1decSSalil Mehta status); 308e2cb1decSSalil Mehta return status; 309e2cb1decSSalil Mehta } 310e2cb1decSSalil Mehta 311d3410018SYufeng Mo memcpy(&hdev->num_tqps, &resp_msg[HCLGEVF_TQPS_ALLOC_OFFSET], 312d3410018SYufeng Mo sizeof(u16)); 313d3410018SYufeng Mo memcpy(&hdev->rss_size_max, &resp_msg[HCLGEVF_TQPS_RSS_SIZE_OFFSET], 314d3410018SYufeng Mo sizeof(u16)); 315d3410018SYufeng Mo memcpy(&hdev->rx_buf_len, &resp_msg[HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET], 316d3410018SYufeng Mo sizeof(u16)); 317c0425944SPeng Li 318c0425944SPeng Li return 0; 319c0425944SPeng Li } 320c0425944SPeng Li 321c0425944SPeng Li static int hclgevf_get_queue_depth(struct hclgevf_dev *hdev) 322c0425944SPeng Li { 323c0425944SPeng Li #define HCLGEVF_TQPS_DEPTH_INFO_LEN 4 324d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_TX_DESC_OFFSET 0 325d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_RX_DESC_OFFSET 2 326d3410018SYufeng Mo 327c0425944SPeng Li u8 resp_msg[HCLGEVF_TQPS_DEPTH_INFO_LEN]; 328d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 329c0425944SPeng Li int ret; 330c0425944SPeng Li 331d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QDEPTH, 0); 332d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 333c0425944SPeng Li HCLGEVF_TQPS_DEPTH_INFO_LEN); 334c0425944SPeng Li if (ret) { 335c0425944SPeng Li dev_err(&hdev->pdev->dev, 336c0425944SPeng Li "VF request to get tqp depth info from PF failed %d", 337c0425944SPeng Li ret); 338c0425944SPeng Li return ret; 339c0425944SPeng Li } 340c0425944SPeng Li 341d3410018SYufeng Mo memcpy(&hdev->num_tx_desc, &resp_msg[HCLGEVF_TQPS_NUM_TX_DESC_OFFSET], 342d3410018SYufeng Mo sizeof(u16)); 343d3410018SYufeng Mo memcpy(&hdev->num_rx_desc, &resp_msg[HCLGEVF_TQPS_NUM_RX_DESC_OFFSET], 344d3410018SYufeng Mo sizeof(u16)); 345e2cb1decSSalil Mehta 346e2cb1decSSalil Mehta return 0; 347e2cb1decSSalil Mehta } 348e2cb1decSSalil Mehta 3490c29d191Sliuzhongzhu static u16 hclgevf_get_qid_global(struct hnae3_handle *handle, u16 queue_id) 3500c29d191Sliuzhongzhu { 3510c29d191Sliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 352d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3530c29d191Sliuzhongzhu u16 qid_in_pf = 0; 354d3410018SYufeng Mo u8 resp_data[2]; 3550c29d191Sliuzhongzhu int ret; 3560c29d191Sliuzhongzhu 357d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QID_IN_PF, 0); 358d3410018SYufeng Mo memcpy(send_msg.data, &queue_id, sizeof(queue_id)); 359d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_data, 36063cbf7a9SYufeng Mo sizeof(resp_data)); 3610c29d191Sliuzhongzhu if (!ret) 3620c29d191Sliuzhongzhu qid_in_pf = *(u16 *)resp_data; 3630c29d191Sliuzhongzhu 3640c29d191Sliuzhongzhu return qid_in_pf; 3650c29d191Sliuzhongzhu } 3660c29d191Sliuzhongzhu 3679c3e7130Sliuzhongzhu static int hclgevf_get_pf_media_type(struct hclgevf_dev *hdev) 3689c3e7130Sliuzhongzhu { 369d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 37088d10bd6SJian Shen u8 resp_msg[2]; 3719c3e7130Sliuzhongzhu int ret; 3729c3e7130Sliuzhongzhu 373d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MEDIA_TYPE, 0); 374d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 375d3410018SYufeng Mo sizeof(resp_msg)); 3769c3e7130Sliuzhongzhu if (ret) { 3779c3e7130Sliuzhongzhu dev_err(&hdev->pdev->dev, 3789c3e7130Sliuzhongzhu "VF request to get the pf port media type failed %d", 3799c3e7130Sliuzhongzhu ret); 3809c3e7130Sliuzhongzhu return ret; 3819c3e7130Sliuzhongzhu } 3829c3e7130Sliuzhongzhu 38388d10bd6SJian Shen hdev->hw.mac.media_type = resp_msg[0]; 38488d10bd6SJian Shen hdev->hw.mac.module_type = resp_msg[1]; 3859c3e7130Sliuzhongzhu 3869c3e7130Sliuzhongzhu return 0; 3879c3e7130Sliuzhongzhu } 3889c3e7130Sliuzhongzhu 389e2cb1decSSalil Mehta static int hclgevf_alloc_tqps(struct hclgevf_dev *hdev) 390e2cb1decSSalil Mehta { 391e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 392e2cb1decSSalil Mehta int i; 393e2cb1decSSalil Mehta 394e2cb1decSSalil Mehta hdev->htqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps, 395e2cb1decSSalil Mehta sizeof(struct hclgevf_tqp), GFP_KERNEL); 396e2cb1decSSalil Mehta if (!hdev->htqp) 397e2cb1decSSalil Mehta return -ENOMEM; 398e2cb1decSSalil Mehta 399e2cb1decSSalil Mehta tqp = hdev->htqp; 400e2cb1decSSalil Mehta 401e2cb1decSSalil Mehta for (i = 0; i < hdev->num_tqps; i++) { 402e2cb1decSSalil Mehta tqp->dev = &hdev->pdev->dev; 403e2cb1decSSalil Mehta tqp->index = i; 404e2cb1decSSalil Mehta 405e2cb1decSSalil Mehta tqp->q.ae_algo = &ae_algovf; 406e2cb1decSSalil Mehta tqp->q.buf_size = hdev->rx_buf_len; 407c0425944SPeng Li tqp->q.tx_desc_num = hdev->num_tx_desc; 408c0425944SPeng Li tqp->q.rx_desc_num = hdev->num_rx_desc; 4099a5ef4aaSYonglong Liu 4109a5ef4aaSYonglong Liu /* need an extended offset to configure queues >= 4119a5ef4aaSYonglong Liu * HCLGEVF_TQP_MAX_SIZE_DEV_V2. 4129a5ef4aaSYonglong Liu */ 4139a5ef4aaSYonglong Liu if (i < HCLGEVF_TQP_MAX_SIZE_DEV_V2) 4149a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4159a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 416e2cb1decSSalil Mehta i * HCLGEVF_TQP_REG_SIZE; 4179a5ef4aaSYonglong Liu else 4189a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4199a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 4209a5ef4aaSYonglong Liu HCLGEVF_TQP_EXT_REG_OFFSET + 4219a5ef4aaSYonglong Liu (i - HCLGEVF_TQP_MAX_SIZE_DEV_V2) * 4229a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_SIZE; 423e2cb1decSSalil Mehta 424e2cb1decSSalil Mehta tqp++; 425e2cb1decSSalil Mehta } 426e2cb1decSSalil Mehta 427e2cb1decSSalil Mehta return 0; 428e2cb1decSSalil Mehta } 429e2cb1decSSalil Mehta 430e2cb1decSSalil Mehta static int hclgevf_knic_setup(struct hclgevf_dev *hdev) 431e2cb1decSSalil Mehta { 432e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 433e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo; 434e2cb1decSSalil Mehta u16 new_tqps = hdev->num_tqps; 435ebaf1908SWeihang Li unsigned int i; 43635244430SJian Shen u8 num_tc = 0; 437e2cb1decSSalil Mehta 438e2cb1decSSalil Mehta kinfo = &nic->kinfo; 439c0425944SPeng Li kinfo->num_tx_desc = hdev->num_tx_desc; 440c0425944SPeng Li kinfo->num_rx_desc = hdev->num_rx_desc; 441e2cb1decSSalil Mehta kinfo->rx_buf_len = hdev->rx_buf_len; 442e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) 443e2cb1decSSalil Mehta if (hdev->hw_tc_map & BIT(i)) 44435244430SJian Shen num_tc++; 445e2cb1decSSalil Mehta 44635244430SJian Shen num_tc = num_tc ? num_tc : 1; 44735244430SJian Shen kinfo->tc_info.num_tc = num_tc; 44835244430SJian Shen kinfo->rss_size = min_t(u16, hdev->rss_size_max, new_tqps / num_tc); 44935244430SJian Shen new_tqps = kinfo->rss_size * num_tc; 450e2cb1decSSalil Mehta kinfo->num_tqps = min(new_tqps, hdev->num_tqps); 451e2cb1decSSalil Mehta 452e2cb1decSSalil Mehta kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, 453e2cb1decSSalil Mehta sizeof(struct hnae3_queue *), GFP_KERNEL); 454e2cb1decSSalil Mehta if (!kinfo->tqp) 455e2cb1decSSalil Mehta return -ENOMEM; 456e2cb1decSSalil Mehta 457e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 458e2cb1decSSalil Mehta hdev->htqp[i].q.handle = &hdev->nic; 459e2cb1decSSalil Mehta hdev->htqp[i].q.tqp_index = i; 460e2cb1decSSalil Mehta kinfo->tqp[i] = &hdev->htqp[i].q; 461e2cb1decSSalil Mehta } 462e2cb1decSSalil Mehta 463580a05f9SYonglong Liu /* after init the max rss_size and tqps, adjust the default tqp numbers 464580a05f9SYonglong Liu * and rss size with the actual vector numbers 465580a05f9SYonglong Liu */ 466580a05f9SYonglong Liu kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); 46735244430SJian Shen kinfo->rss_size = min_t(u16, kinfo->num_tqps / num_tc, 468580a05f9SYonglong Liu kinfo->rss_size); 469580a05f9SYonglong Liu 470e2cb1decSSalil Mehta return 0; 471e2cb1decSSalil Mehta } 472e2cb1decSSalil Mehta 473e2cb1decSSalil Mehta static void hclgevf_request_link_info(struct hclgevf_dev *hdev) 474e2cb1decSSalil Mehta { 475d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 476e2cb1decSSalil Mehta int status; 477e2cb1decSSalil Mehta 478d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_STATUS, 0); 479d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 480e2cb1decSSalil Mehta if (status) 481e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 482e2cb1decSSalil Mehta "VF failed to fetch link status(%d) from PF", status); 483e2cb1decSSalil Mehta } 484e2cb1decSSalil Mehta 485e2cb1decSSalil Mehta void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state) 486e2cb1decSSalil Mehta { 48745e92b7eSPeng Li struct hnae3_handle *rhandle = &hdev->roce; 488e2cb1decSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 48945e92b7eSPeng Li struct hnae3_client *rclient; 490e2cb1decSSalil Mehta struct hnae3_client *client; 491e2cb1decSSalil Mehta 492ff200099SYunsheng Lin if (test_and_set_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state)) 493ff200099SYunsheng Lin return; 494ff200099SYunsheng Lin 495e2cb1decSSalil Mehta client = handle->client; 49645e92b7eSPeng Li rclient = hdev->roce_client; 497e2cb1decSSalil Mehta 498582d37bbSPeng Li link_state = 499582d37bbSPeng Li test_bit(HCLGEVF_STATE_DOWN, &hdev->state) ? 0 : link_state; 500e2cb1decSSalil Mehta if (link_state != hdev->hw.mac.link) { 501e2cb1decSSalil Mehta client->ops->link_status_change(handle, !!link_state); 50245e92b7eSPeng Li if (rclient && rclient->ops->link_status_change) 50345e92b7eSPeng Li rclient->ops->link_status_change(rhandle, !!link_state); 504e2cb1decSSalil Mehta hdev->hw.mac.link = link_state; 505e2cb1decSSalil Mehta } 506ff200099SYunsheng Lin 507ff200099SYunsheng Lin clear_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state); 508e2cb1decSSalil Mehta } 509e2cb1decSSalil Mehta 510538abaf3SYueHaibing static void hclgevf_update_link_mode(struct hclgevf_dev *hdev) 5119194d18bSliuzhongzhu { 5129194d18bSliuzhongzhu #define HCLGEVF_ADVERTISING 0 5139194d18bSliuzhongzhu #define HCLGEVF_SUPPORTED 1 5149194d18bSliuzhongzhu 515d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 516d3410018SYufeng Mo 517d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_MODE, 0); 518d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_ADVERTISING; 519d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 520d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_SUPPORTED; 521d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 5229194d18bSliuzhongzhu } 5239194d18bSliuzhongzhu 524e2cb1decSSalil Mehta static int hclgevf_set_handle_info(struct hclgevf_dev *hdev) 525e2cb1decSSalil Mehta { 526e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 527e2cb1decSSalil Mehta int ret; 528e2cb1decSSalil Mehta 529e2cb1decSSalil Mehta nic->ae_algo = &ae_algovf; 530e2cb1decSSalil Mehta nic->pdev = hdev->pdev; 531e2cb1decSSalil Mehta nic->numa_node_mask = hdev->numa_node_mask; 532424eb834SSalil Mehta nic->flags |= HNAE3_SUPPORT_VF; 533e2cb1decSSalil Mehta 534e2cb1decSSalil Mehta ret = hclgevf_knic_setup(hdev); 535e2cb1decSSalil Mehta if (ret) 536e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF knic setup failed %d\n", 537e2cb1decSSalil Mehta ret); 538e2cb1decSSalil Mehta return ret; 539e2cb1decSSalil Mehta } 540e2cb1decSSalil Mehta 541e2cb1decSSalil Mehta static void hclgevf_free_vector(struct hclgevf_dev *hdev, int vector_id) 542e2cb1decSSalil Mehta { 54336cbbdf6SPeng Li if (hdev->vector_status[vector_id] == HCLGEVF_INVALID_VPORT) { 54436cbbdf6SPeng Li dev_warn(&hdev->pdev->dev, 54536cbbdf6SPeng Li "vector(vector_id %d) has been freed.\n", vector_id); 54636cbbdf6SPeng Li return; 54736cbbdf6SPeng Li } 54836cbbdf6SPeng Li 549e2cb1decSSalil Mehta hdev->vector_status[vector_id] = HCLGEVF_INVALID_VPORT; 550e2cb1decSSalil Mehta hdev->num_msi_left += 1; 551e2cb1decSSalil Mehta hdev->num_msi_used -= 1; 552e2cb1decSSalil Mehta } 553e2cb1decSSalil Mehta 554e2cb1decSSalil Mehta static int hclgevf_get_vector(struct hnae3_handle *handle, u16 vector_num, 555e2cb1decSSalil Mehta struct hnae3_vector_info *vector_info) 556e2cb1decSSalil Mehta { 557e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 558e2cb1decSSalil Mehta struct hnae3_vector_info *vector = vector_info; 559e2cb1decSSalil Mehta int alloc = 0; 560e2cb1decSSalil Mehta int i, j; 561e2cb1decSSalil Mehta 562580a05f9SYonglong Liu vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num); 563e2cb1decSSalil Mehta vector_num = min(hdev->num_msi_left, vector_num); 564e2cb1decSSalil Mehta 565e2cb1decSSalil Mehta for (j = 0; j < vector_num; j++) { 566e2cb1decSSalil Mehta for (i = HCLGEVF_MISC_VECTOR_NUM + 1; i < hdev->num_msi; i++) { 567e2cb1decSSalil Mehta if (hdev->vector_status[i] == HCLGEVF_INVALID_VPORT) { 568e2cb1decSSalil Mehta vector->vector = pci_irq_vector(hdev->pdev, i); 569e2cb1decSSalil Mehta vector->io_addr = hdev->hw.io_base + 570e2cb1decSSalil Mehta HCLGEVF_VECTOR_REG_BASE + 571e2cb1decSSalil Mehta (i - 1) * HCLGEVF_VECTOR_REG_OFFSET; 572e2cb1decSSalil Mehta hdev->vector_status[i] = 0; 573e2cb1decSSalil Mehta hdev->vector_irq[i] = vector->vector; 574e2cb1decSSalil Mehta 575e2cb1decSSalil Mehta vector++; 576e2cb1decSSalil Mehta alloc++; 577e2cb1decSSalil Mehta 578e2cb1decSSalil Mehta break; 579e2cb1decSSalil Mehta } 580e2cb1decSSalil Mehta } 581e2cb1decSSalil Mehta } 582e2cb1decSSalil Mehta hdev->num_msi_left -= alloc; 583e2cb1decSSalil Mehta hdev->num_msi_used += alloc; 584e2cb1decSSalil Mehta 585e2cb1decSSalil Mehta return alloc; 586e2cb1decSSalil Mehta } 587e2cb1decSSalil Mehta 588e2cb1decSSalil Mehta static int hclgevf_get_vector_index(struct hclgevf_dev *hdev, int vector) 589e2cb1decSSalil Mehta { 590e2cb1decSSalil Mehta int i; 591e2cb1decSSalil Mehta 592e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 593e2cb1decSSalil Mehta if (vector == hdev->vector_irq[i]) 594e2cb1decSSalil Mehta return i; 595e2cb1decSSalil Mehta 596e2cb1decSSalil Mehta return -EINVAL; 597e2cb1decSSalil Mehta } 598e2cb1decSSalil Mehta 599374ad291SJian Shen static int hclgevf_set_rss_algo_key(struct hclgevf_dev *hdev, 600374ad291SJian Shen const u8 hfunc, const u8 *key) 601374ad291SJian Shen { 602374ad291SJian Shen struct hclgevf_rss_config_cmd *req; 603ebaf1908SWeihang Li unsigned int key_offset = 0; 604374ad291SJian Shen struct hclgevf_desc desc; 6053caf772bSYufeng Mo int key_counts; 606374ad291SJian Shen int key_size; 607374ad291SJian Shen int ret; 608374ad291SJian Shen 6093caf772bSYufeng Mo key_counts = HCLGEVF_RSS_KEY_SIZE; 610374ad291SJian Shen req = (struct hclgevf_rss_config_cmd *)desc.data; 611374ad291SJian Shen 6123caf772bSYufeng Mo while (key_counts) { 613374ad291SJian Shen hclgevf_cmd_setup_basic_desc(&desc, 614374ad291SJian Shen HCLGEVF_OPC_RSS_GENERIC_CONFIG, 615374ad291SJian Shen false); 616374ad291SJian Shen 617374ad291SJian Shen req->hash_config |= (hfunc & HCLGEVF_RSS_HASH_ALGO_MASK); 618374ad291SJian Shen req->hash_config |= 619374ad291SJian Shen (key_offset << HCLGEVF_RSS_HASH_KEY_OFFSET_B); 620374ad291SJian Shen 6213caf772bSYufeng Mo key_size = min(HCLGEVF_RSS_HASH_KEY_NUM, key_counts); 622374ad291SJian Shen memcpy(req->hash_key, 623374ad291SJian Shen key + key_offset * HCLGEVF_RSS_HASH_KEY_NUM, key_size); 624374ad291SJian Shen 6253caf772bSYufeng Mo key_counts -= key_size; 6263caf772bSYufeng Mo key_offset++; 627374ad291SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 628374ad291SJian Shen if (ret) { 629374ad291SJian Shen dev_err(&hdev->pdev->dev, 630374ad291SJian Shen "Configure RSS config fail, status = %d\n", 631374ad291SJian Shen ret); 632374ad291SJian Shen return ret; 633374ad291SJian Shen } 634374ad291SJian Shen } 635374ad291SJian Shen 636374ad291SJian Shen return 0; 637374ad291SJian Shen } 638374ad291SJian Shen 639e2cb1decSSalil Mehta static u32 hclgevf_get_rss_key_size(struct hnae3_handle *handle) 640e2cb1decSSalil Mehta { 641e2cb1decSSalil Mehta return HCLGEVF_RSS_KEY_SIZE; 642e2cb1decSSalil Mehta } 643e2cb1decSSalil Mehta 644e2cb1decSSalil Mehta static int hclgevf_set_rss_indir_table(struct hclgevf_dev *hdev) 645e2cb1decSSalil Mehta { 646e2cb1decSSalil Mehta const u8 *indir = hdev->rss_cfg.rss_indirection_tbl; 647e2cb1decSSalil Mehta struct hclgevf_rss_indirection_table_cmd *req; 648e2cb1decSSalil Mehta struct hclgevf_desc desc; 64987ce161eSGuangbin Huang int rss_cfg_tbl_num; 650e2cb1decSSalil Mehta int status; 651e2cb1decSSalil Mehta int i, j; 652e2cb1decSSalil Mehta 653e2cb1decSSalil Mehta req = (struct hclgevf_rss_indirection_table_cmd *)desc.data; 65487ce161eSGuangbin Huang rss_cfg_tbl_num = hdev->ae_dev->dev_specs.rss_ind_tbl_size / 65587ce161eSGuangbin Huang HCLGEVF_RSS_CFG_TBL_SIZE; 656e2cb1decSSalil Mehta 65787ce161eSGuangbin Huang for (i = 0; i < rss_cfg_tbl_num; i++) { 658e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INDIR_TABLE, 659e2cb1decSSalil Mehta false); 66055ff3ed5SJian Shen req->start_table_index = 66155ff3ed5SJian Shen cpu_to_le16(i * HCLGEVF_RSS_CFG_TBL_SIZE); 66255ff3ed5SJian Shen req->rss_set_bitmap = cpu_to_le16(HCLGEVF_RSS_SET_BITMAP_MSK); 663e2cb1decSSalil Mehta for (j = 0; j < HCLGEVF_RSS_CFG_TBL_SIZE; j++) 664e2cb1decSSalil Mehta req->rss_result[j] = 665e2cb1decSSalil Mehta indir[i * HCLGEVF_RSS_CFG_TBL_SIZE + j]; 666e2cb1decSSalil Mehta 667e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 668e2cb1decSSalil Mehta if (status) { 669e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 670e2cb1decSSalil Mehta "VF failed(=%d) to set RSS indirection table\n", 671e2cb1decSSalil Mehta status); 672e2cb1decSSalil Mehta return status; 673e2cb1decSSalil Mehta } 674e2cb1decSSalil Mehta } 675e2cb1decSSalil Mehta 676e2cb1decSSalil Mehta return 0; 677e2cb1decSSalil Mehta } 678e2cb1decSSalil Mehta 679e2cb1decSSalil Mehta static int hclgevf_set_rss_tc_mode(struct hclgevf_dev *hdev, u16 rss_size) 680e2cb1decSSalil Mehta { 681e2cb1decSSalil Mehta struct hclgevf_rss_tc_mode_cmd *req; 682e2cb1decSSalil Mehta u16 tc_offset[HCLGEVF_MAX_TC_NUM]; 683e2cb1decSSalil Mehta u16 tc_valid[HCLGEVF_MAX_TC_NUM]; 684e2cb1decSSalil Mehta u16 tc_size[HCLGEVF_MAX_TC_NUM]; 685e2cb1decSSalil Mehta struct hclgevf_desc desc; 686e2cb1decSSalil Mehta u16 roundup_size; 687ebaf1908SWeihang Li unsigned int i; 6882adb8187SHuazhong Tan int status; 689e2cb1decSSalil Mehta 690e2cb1decSSalil Mehta req = (struct hclgevf_rss_tc_mode_cmd *)desc.data; 691e2cb1decSSalil Mehta 692e2cb1decSSalil Mehta roundup_size = roundup_pow_of_two(rss_size); 693e2cb1decSSalil Mehta roundup_size = ilog2(roundup_size); 694e2cb1decSSalil Mehta 695e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 696e2cb1decSSalil Mehta tc_valid[i] = !!(hdev->hw_tc_map & BIT(i)); 697e2cb1decSSalil Mehta tc_size[i] = roundup_size; 698e2cb1decSSalil Mehta tc_offset[i] = rss_size * i; 699e2cb1decSSalil Mehta } 700e2cb1decSSalil Mehta 701e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_TC_MODE, false); 702e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 70355ff3ed5SJian Shen u16 mode = 0; 70455ff3ed5SJian Shen 70555ff3ed5SJian Shen hnae3_set_bit(mode, HCLGEVF_RSS_TC_VALID_B, 706e2cb1decSSalil Mehta (tc_valid[i] & 0x1)); 70755ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_SIZE_M, 708e2cb1decSSalil Mehta HCLGEVF_RSS_TC_SIZE_S, tc_size[i]); 70933a8f764SGuojia Liao hnae3_set_bit(mode, HCLGEVF_RSS_TC_SIZE_MSB_B, 71033a8f764SGuojia Liao tc_size[i] >> HCLGEVF_RSS_TC_SIZE_MSB_OFFSET & 71133a8f764SGuojia Liao 0x1); 71255ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_OFFSET_M, 713e2cb1decSSalil Mehta HCLGEVF_RSS_TC_OFFSET_S, tc_offset[i]); 71455ff3ed5SJian Shen 71555ff3ed5SJian Shen req->rss_tc_mode[i] = cpu_to_le16(mode); 716e2cb1decSSalil Mehta } 717e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 718e2cb1decSSalil Mehta if (status) 719e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 720e2cb1decSSalil Mehta "VF failed(=%d) to set rss tc mode\n", status); 721e2cb1decSSalil Mehta 722e2cb1decSSalil Mehta return status; 723e2cb1decSSalil Mehta } 724e2cb1decSSalil Mehta 725a638b1d8SJian Shen /* for revision 0x20, vf shared the same rss config with pf */ 726a638b1d8SJian Shen static int hclgevf_get_rss_hash_key(struct hclgevf_dev *hdev) 727a638b1d8SJian Shen { 728a638b1d8SJian Shen #define HCLGEVF_RSS_MBX_RESP_LEN 8 729a638b1d8SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 730a638b1d8SJian Shen u8 resp_msg[HCLGEVF_RSS_MBX_RESP_LEN]; 731d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 732a638b1d8SJian Shen u16 msg_num, hash_key_index; 733a638b1d8SJian Shen u8 index; 734a638b1d8SJian Shen int ret; 735a638b1d8SJian Shen 736d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_RSS_KEY, 0); 737a638b1d8SJian Shen msg_num = (HCLGEVF_RSS_KEY_SIZE + HCLGEVF_RSS_MBX_RESP_LEN - 1) / 738a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN; 739a638b1d8SJian Shen for (index = 0; index < msg_num; index++) { 740d3410018SYufeng Mo send_msg.data[0] = index; 741d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 742a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN); 743a638b1d8SJian Shen if (ret) { 744a638b1d8SJian Shen dev_err(&hdev->pdev->dev, 745a638b1d8SJian Shen "VF get rss hash key from PF failed, ret=%d", 746a638b1d8SJian Shen ret); 747a638b1d8SJian Shen return ret; 748a638b1d8SJian Shen } 749a638b1d8SJian Shen 750a638b1d8SJian Shen hash_key_index = HCLGEVF_RSS_MBX_RESP_LEN * index; 751a638b1d8SJian Shen if (index == msg_num - 1) 752a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 753a638b1d8SJian Shen &resp_msg[0], 754a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE - hash_key_index); 755a638b1d8SJian Shen else 756a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 757a638b1d8SJian Shen &resp_msg[0], HCLGEVF_RSS_MBX_RESP_LEN); 758a638b1d8SJian Shen } 759a638b1d8SJian Shen 760a638b1d8SJian Shen return 0; 761a638b1d8SJian Shen } 762a638b1d8SJian Shen 763e2cb1decSSalil Mehta static int hclgevf_get_rss(struct hnae3_handle *handle, u32 *indir, u8 *key, 764e2cb1decSSalil Mehta u8 *hfunc) 765e2cb1decSSalil Mehta { 766e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 767e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 768a638b1d8SJian Shen int i, ret; 769e2cb1decSSalil Mehta 770295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 771374ad291SJian Shen /* Get hash algorithm */ 772374ad291SJian Shen if (hfunc) { 773374ad291SJian Shen switch (rss_cfg->hash_algo) { 774374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_TOEPLITZ: 775374ad291SJian Shen *hfunc = ETH_RSS_HASH_TOP; 776374ad291SJian Shen break; 777374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_SIMPLE: 778374ad291SJian Shen *hfunc = ETH_RSS_HASH_XOR; 779374ad291SJian Shen break; 780374ad291SJian Shen default: 781374ad291SJian Shen *hfunc = ETH_RSS_HASH_UNKNOWN; 782374ad291SJian Shen break; 783374ad291SJian Shen } 784374ad291SJian Shen } 785374ad291SJian Shen 786374ad291SJian Shen /* Get the RSS Key required by the user */ 787374ad291SJian Shen if (key) 788374ad291SJian Shen memcpy(key, rss_cfg->rss_hash_key, 789374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 790a638b1d8SJian Shen } else { 791a638b1d8SJian Shen if (hfunc) 792a638b1d8SJian Shen *hfunc = ETH_RSS_HASH_TOP; 793a638b1d8SJian Shen if (key) { 794a638b1d8SJian Shen ret = hclgevf_get_rss_hash_key(hdev); 795a638b1d8SJian Shen if (ret) 796a638b1d8SJian Shen return ret; 797a638b1d8SJian Shen memcpy(key, rss_cfg->rss_hash_key, 798a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE); 799a638b1d8SJian Shen } 800374ad291SJian Shen } 801374ad291SJian Shen 802e2cb1decSSalil Mehta if (indir) 80387ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 804e2cb1decSSalil Mehta indir[i] = rss_cfg->rss_indirection_tbl[i]; 805e2cb1decSSalil Mehta 806374ad291SJian Shen return 0; 807e2cb1decSSalil Mehta } 808e2cb1decSSalil Mehta 809e2cb1decSSalil Mehta static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir, 810e2cb1decSSalil Mehta const u8 *key, const u8 hfunc) 811e2cb1decSSalil Mehta { 812e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 813e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 814374ad291SJian Shen int ret, i; 815374ad291SJian Shen 816295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 817374ad291SJian Shen /* Set the RSS Hash Key if specififed by the user */ 818374ad291SJian Shen if (key) { 819374ad291SJian Shen switch (hfunc) { 820374ad291SJian Shen case ETH_RSS_HASH_TOP: 821374ad291SJian Shen rss_cfg->hash_algo = 822374ad291SJian Shen HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 823374ad291SJian Shen break; 824374ad291SJian Shen case ETH_RSS_HASH_XOR: 825374ad291SJian Shen rss_cfg->hash_algo = 826374ad291SJian Shen HCLGEVF_RSS_HASH_ALGO_SIMPLE; 827374ad291SJian Shen break; 828374ad291SJian Shen case ETH_RSS_HASH_NO_CHANGE: 829374ad291SJian Shen break; 830374ad291SJian Shen default: 831374ad291SJian Shen return -EINVAL; 832374ad291SJian Shen } 833374ad291SJian Shen 834374ad291SJian Shen ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo, 835374ad291SJian Shen key); 836374ad291SJian Shen if (ret) 837374ad291SJian Shen return ret; 838374ad291SJian Shen 839374ad291SJian Shen /* Update the shadow RSS key with user specified qids */ 840374ad291SJian Shen memcpy(rss_cfg->rss_hash_key, key, 841374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 842374ad291SJian Shen } 843374ad291SJian Shen } 844e2cb1decSSalil Mehta 845e2cb1decSSalil Mehta /* update the shadow RSS table with user specified qids */ 84687ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 847e2cb1decSSalil Mehta rss_cfg->rss_indirection_tbl[i] = indir[i]; 848e2cb1decSSalil Mehta 849e2cb1decSSalil Mehta /* update the hardware */ 850e2cb1decSSalil Mehta return hclgevf_set_rss_indir_table(hdev); 851e2cb1decSSalil Mehta } 852e2cb1decSSalil Mehta 853d97b3072SJian Shen static u8 hclgevf_get_rss_hash_bits(struct ethtool_rxnfc *nfc) 854d97b3072SJian Shen { 855d97b3072SJian Shen u8 hash_sets = nfc->data & RXH_L4_B_0_1 ? HCLGEVF_S_PORT_BIT : 0; 856d97b3072SJian Shen 857d97b3072SJian Shen if (nfc->data & RXH_L4_B_2_3) 858d97b3072SJian Shen hash_sets |= HCLGEVF_D_PORT_BIT; 859d97b3072SJian Shen else 860d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_PORT_BIT; 861d97b3072SJian Shen 862d97b3072SJian Shen if (nfc->data & RXH_IP_SRC) 863d97b3072SJian Shen hash_sets |= HCLGEVF_S_IP_BIT; 864d97b3072SJian Shen else 865d97b3072SJian Shen hash_sets &= ~HCLGEVF_S_IP_BIT; 866d97b3072SJian Shen 867d97b3072SJian Shen if (nfc->data & RXH_IP_DST) 868d97b3072SJian Shen hash_sets |= HCLGEVF_D_IP_BIT; 869d97b3072SJian Shen else 870d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_IP_BIT; 871d97b3072SJian Shen 872d97b3072SJian Shen if (nfc->flow_type == SCTP_V4_FLOW || nfc->flow_type == SCTP_V6_FLOW) 873d97b3072SJian Shen hash_sets |= HCLGEVF_V_TAG_BIT; 874d97b3072SJian Shen 875d97b3072SJian Shen return hash_sets; 876d97b3072SJian Shen } 877d97b3072SJian Shen 8785fd0e7b4SHuazhong Tan static int hclgevf_init_rss_tuple_cmd(struct hnae3_handle *handle, 8795fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc, 8805fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req) 881d97b3072SJian Shen { 882d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 883d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 884d97b3072SJian Shen u8 tuple_sets; 885d97b3072SJian Shen 886d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 887d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 888d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 889d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 890d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 891d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 892d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 893d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 894d97b3072SJian Shen 895d97b3072SJian Shen tuple_sets = hclgevf_get_rss_hash_bits(nfc); 896d97b3072SJian Shen switch (nfc->flow_type) { 897d97b3072SJian Shen case TCP_V4_FLOW: 898d97b3072SJian Shen req->ipv4_tcp_en = tuple_sets; 899d97b3072SJian Shen break; 900d97b3072SJian Shen case TCP_V6_FLOW: 901d97b3072SJian Shen req->ipv6_tcp_en = tuple_sets; 902d97b3072SJian Shen break; 903d97b3072SJian Shen case UDP_V4_FLOW: 904d97b3072SJian Shen req->ipv4_udp_en = tuple_sets; 905d97b3072SJian Shen break; 906d97b3072SJian Shen case UDP_V6_FLOW: 907d97b3072SJian Shen req->ipv6_udp_en = tuple_sets; 908d97b3072SJian Shen break; 909d97b3072SJian Shen case SCTP_V4_FLOW: 910d97b3072SJian Shen req->ipv4_sctp_en = tuple_sets; 911d97b3072SJian Shen break; 912d97b3072SJian Shen case SCTP_V6_FLOW: 913ab6e32d2SJian Shen if (hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 && 914ab6e32d2SJian Shen (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3))) 915d97b3072SJian Shen return -EINVAL; 916d97b3072SJian Shen 917d97b3072SJian Shen req->ipv6_sctp_en = tuple_sets; 918d97b3072SJian Shen break; 919d97b3072SJian Shen case IPV4_FLOW: 920d97b3072SJian Shen req->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 921d97b3072SJian Shen break; 922d97b3072SJian Shen case IPV6_FLOW: 923d97b3072SJian Shen req->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 924d97b3072SJian Shen break; 925d97b3072SJian Shen default: 926d97b3072SJian Shen return -EINVAL; 927d97b3072SJian Shen } 928d97b3072SJian Shen 9295fd0e7b4SHuazhong Tan return 0; 9305fd0e7b4SHuazhong Tan } 9315fd0e7b4SHuazhong Tan 9325fd0e7b4SHuazhong Tan static int hclgevf_set_rss_tuple(struct hnae3_handle *handle, 9335fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc) 9345fd0e7b4SHuazhong Tan { 9355fd0e7b4SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 9365fd0e7b4SHuazhong Tan struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 9375fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req; 9385fd0e7b4SHuazhong Tan struct hclgevf_desc desc; 9395fd0e7b4SHuazhong Tan int ret; 9405fd0e7b4SHuazhong Tan 9415fd0e7b4SHuazhong Tan if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 9425fd0e7b4SHuazhong Tan return -EOPNOTSUPP; 9435fd0e7b4SHuazhong Tan 9445fd0e7b4SHuazhong Tan if (nfc->data & 9455fd0e7b4SHuazhong Tan ~(RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)) 9465fd0e7b4SHuazhong Tan return -EINVAL; 9475fd0e7b4SHuazhong Tan 9485fd0e7b4SHuazhong Tan req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 9495fd0e7b4SHuazhong Tan hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 9505fd0e7b4SHuazhong Tan 9515fd0e7b4SHuazhong Tan ret = hclgevf_init_rss_tuple_cmd(handle, nfc, req); 9525fd0e7b4SHuazhong Tan if (ret) { 9535fd0e7b4SHuazhong Tan dev_err(&hdev->pdev->dev, 9545fd0e7b4SHuazhong Tan "failed to init rss tuple cmd, ret = %d\n", ret); 9555fd0e7b4SHuazhong Tan return ret; 9565fd0e7b4SHuazhong Tan } 9575fd0e7b4SHuazhong Tan 958d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 959d97b3072SJian Shen if (ret) { 960d97b3072SJian Shen dev_err(&hdev->pdev->dev, 961d97b3072SJian Shen "Set rss tuple fail, status = %d\n", ret); 962d97b3072SJian Shen return ret; 963d97b3072SJian Shen } 964d97b3072SJian Shen 965d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_tcp_en = req->ipv4_tcp_en; 966d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_udp_en = req->ipv4_udp_en; 967d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_sctp_en = req->ipv4_sctp_en; 968d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_fragment_en = req->ipv4_fragment_en; 969d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_tcp_en = req->ipv6_tcp_en; 970d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_udp_en = req->ipv6_udp_en; 971d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_sctp_en = req->ipv6_sctp_en; 972d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_fragment_en = req->ipv6_fragment_en; 973d97b3072SJian Shen return 0; 974d97b3072SJian Shen } 975d97b3072SJian Shen 97673f7767eSJian Shen static int hclgevf_get_rss_tuple_by_flow_type(struct hclgevf_dev *hdev, 97773f7767eSJian Shen int flow_type, u8 *tuple_sets) 97873f7767eSJian Shen { 97973f7767eSJian Shen switch (flow_type) { 98073f7767eSJian Shen case TCP_V4_FLOW: 98173f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_tcp_en; 98273f7767eSJian Shen break; 98373f7767eSJian Shen case UDP_V4_FLOW: 98473f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_udp_en; 98573f7767eSJian Shen break; 98673f7767eSJian Shen case TCP_V6_FLOW: 98773f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_tcp_en; 98873f7767eSJian Shen break; 98973f7767eSJian Shen case UDP_V6_FLOW: 99073f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_udp_en; 99173f7767eSJian Shen break; 99273f7767eSJian Shen case SCTP_V4_FLOW: 99373f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_sctp_en; 99473f7767eSJian Shen break; 99573f7767eSJian Shen case SCTP_V6_FLOW: 99673f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_sctp_en; 99773f7767eSJian Shen break; 99873f7767eSJian Shen case IPV4_FLOW: 99973f7767eSJian Shen case IPV6_FLOW: 100073f7767eSJian Shen *tuple_sets = HCLGEVF_S_IP_BIT | HCLGEVF_D_IP_BIT; 100173f7767eSJian Shen break; 100273f7767eSJian Shen default: 100373f7767eSJian Shen return -EINVAL; 100473f7767eSJian Shen } 100573f7767eSJian Shen 100673f7767eSJian Shen return 0; 100773f7767eSJian Shen } 100873f7767eSJian Shen 100973f7767eSJian Shen static u64 hclgevf_convert_rss_tuple(u8 tuple_sets) 101073f7767eSJian Shen { 101173f7767eSJian Shen u64 tuple_data = 0; 101273f7767eSJian Shen 101373f7767eSJian Shen if (tuple_sets & HCLGEVF_D_PORT_BIT) 101473f7767eSJian Shen tuple_data |= RXH_L4_B_2_3; 101573f7767eSJian Shen if (tuple_sets & HCLGEVF_S_PORT_BIT) 101673f7767eSJian Shen tuple_data |= RXH_L4_B_0_1; 101773f7767eSJian Shen if (tuple_sets & HCLGEVF_D_IP_BIT) 101873f7767eSJian Shen tuple_data |= RXH_IP_DST; 101973f7767eSJian Shen if (tuple_sets & HCLGEVF_S_IP_BIT) 102073f7767eSJian Shen tuple_data |= RXH_IP_SRC; 102173f7767eSJian Shen 102273f7767eSJian Shen return tuple_data; 102373f7767eSJian Shen } 102473f7767eSJian Shen 1025d97b3072SJian Shen static int hclgevf_get_rss_tuple(struct hnae3_handle *handle, 1026d97b3072SJian Shen struct ethtool_rxnfc *nfc) 1027d97b3072SJian Shen { 1028d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1029d97b3072SJian Shen u8 tuple_sets; 103073f7767eSJian Shen int ret; 1031d97b3072SJian Shen 1032295ba232SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 1033d97b3072SJian Shen return -EOPNOTSUPP; 1034d97b3072SJian Shen 1035d97b3072SJian Shen nfc->data = 0; 1036d97b3072SJian Shen 103773f7767eSJian Shen ret = hclgevf_get_rss_tuple_by_flow_type(hdev, nfc->flow_type, 103873f7767eSJian Shen &tuple_sets); 103973f7767eSJian Shen if (ret || !tuple_sets) 104073f7767eSJian Shen return ret; 1041d97b3072SJian Shen 104273f7767eSJian Shen nfc->data = hclgevf_convert_rss_tuple(tuple_sets); 1043d97b3072SJian Shen 1044d97b3072SJian Shen return 0; 1045d97b3072SJian Shen } 1046d97b3072SJian Shen 1047d97b3072SJian Shen static int hclgevf_set_rss_input_tuple(struct hclgevf_dev *hdev, 1048d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg) 1049d97b3072SJian Shen { 1050d97b3072SJian Shen struct hclgevf_rss_input_tuple_cmd *req; 1051d97b3072SJian Shen struct hclgevf_desc desc; 1052d97b3072SJian Shen int ret; 1053d97b3072SJian Shen 1054d97b3072SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 1055d97b3072SJian Shen 1056d97b3072SJian Shen req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 1057d97b3072SJian Shen 1058d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 1059d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 1060d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 1061d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 1062d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 1063d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 1064d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 1065d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 1066d97b3072SJian Shen 1067d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 1068d97b3072SJian Shen if (ret) 1069d97b3072SJian Shen dev_err(&hdev->pdev->dev, 1070d97b3072SJian Shen "Configure rss input fail, status = %d\n", ret); 1071d97b3072SJian Shen return ret; 1072d97b3072SJian Shen } 1073d97b3072SJian Shen 1074e2cb1decSSalil Mehta static int hclgevf_get_tc_size(struct hnae3_handle *handle) 1075e2cb1decSSalil Mehta { 1076e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1077e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 1078e2cb1decSSalil Mehta 1079e2cb1decSSalil Mehta return rss_cfg->rss_size; 1080e2cb1decSSalil Mehta } 1081e2cb1decSSalil Mehta 1082e2cb1decSSalil Mehta static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en, 1083b204bc74SPeng Li int vector_id, 1084e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1085e2cb1decSSalil Mehta { 1086e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1087d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1088e2cb1decSSalil Mehta struct hnae3_ring_chain_node *node; 1089e2cb1decSSalil Mehta int status; 1090d3410018SYufeng Mo int i = 0; 1091e2cb1decSSalil Mehta 1092d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1093d3410018SYufeng Mo send_msg.code = en ? HCLGE_MBX_MAP_RING_TO_VECTOR : 1094c09ba484SPeng Li HCLGE_MBX_UNMAP_RING_TO_VECTOR; 1095d3410018SYufeng Mo send_msg.vector_id = vector_id; 1096e2cb1decSSalil Mehta 1097e2cb1decSSalil Mehta for (node = ring_chain; node; node = node->next) { 1098d3410018SYufeng Mo send_msg.param[i].ring_type = 1099e4e87715SPeng Li hnae3_get_bit(node->flag, HNAE3_RING_TYPE_B); 1100d3410018SYufeng Mo 1101d3410018SYufeng Mo send_msg.param[i].tqp_index = node->tqp_index; 1102d3410018SYufeng Mo send_msg.param[i].int_gl_index = 1103d3410018SYufeng Mo hnae3_get_field(node->int_gl_idx, 110479eee410SFuyun Liang HNAE3_RING_GL_IDX_M, 110579eee410SFuyun Liang HNAE3_RING_GL_IDX_S); 110679eee410SFuyun Liang 11075d02a58dSYunsheng Lin i++; 1108d3410018SYufeng Mo if (i == HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM || !node->next) { 1109d3410018SYufeng Mo send_msg.ring_num = i; 1110e2cb1decSSalil Mehta 1111d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, 1112d3410018SYufeng Mo NULL, 0); 1113e2cb1decSSalil Mehta if (status) { 1114e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1115e2cb1decSSalil Mehta "Map TQP fail, status is %d.\n", 1116e2cb1decSSalil Mehta status); 1117e2cb1decSSalil Mehta return status; 1118e2cb1decSSalil Mehta } 1119e2cb1decSSalil Mehta i = 0; 1120e2cb1decSSalil Mehta } 1121e2cb1decSSalil Mehta } 1122e2cb1decSSalil Mehta 1123e2cb1decSSalil Mehta return 0; 1124e2cb1decSSalil Mehta } 1125e2cb1decSSalil Mehta 1126e2cb1decSSalil Mehta static int hclgevf_map_ring_to_vector(struct hnae3_handle *handle, int vector, 1127e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1128e2cb1decSSalil Mehta { 1129b204bc74SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1130b204bc74SPeng Li int vector_id; 1131b204bc74SPeng Li 1132b204bc74SPeng Li vector_id = hclgevf_get_vector_index(hdev, vector); 1133b204bc74SPeng Li if (vector_id < 0) { 1134b204bc74SPeng Li dev_err(&handle->pdev->dev, 1135b204bc74SPeng Li "Get vector index fail. ret =%d\n", vector_id); 1136b204bc74SPeng Li return vector_id; 1137b204bc74SPeng Li } 1138b204bc74SPeng Li 1139b204bc74SPeng Li return hclgevf_bind_ring_to_vector(handle, true, vector_id, ring_chain); 1140e2cb1decSSalil Mehta } 1141e2cb1decSSalil Mehta 1142e2cb1decSSalil Mehta static int hclgevf_unmap_ring_from_vector( 1143e2cb1decSSalil Mehta struct hnae3_handle *handle, 1144e2cb1decSSalil Mehta int vector, 1145e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1146e2cb1decSSalil Mehta { 1147e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1148e2cb1decSSalil Mehta int ret, vector_id; 1149e2cb1decSSalil Mehta 1150dea846e8SHuazhong Tan if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) 1151dea846e8SHuazhong Tan return 0; 1152dea846e8SHuazhong Tan 1153e2cb1decSSalil Mehta vector_id = hclgevf_get_vector_index(hdev, vector); 1154e2cb1decSSalil Mehta if (vector_id < 0) { 1155e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1156e2cb1decSSalil Mehta "Get vector index fail. ret =%d\n", vector_id); 1157e2cb1decSSalil Mehta return vector_id; 1158e2cb1decSSalil Mehta } 1159e2cb1decSSalil Mehta 1160b204bc74SPeng Li ret = hclgevf_bind_ring_to_vector(handle, false, vector_id, ring_chain); 11610d3e6631SYunsheng Lin if (ret) 1162e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1163e2cb1decSSalil Mehta "Unmap ring from vector fail. vector=%d, ret =%d\n", 1164e2cb1decSSalil Mehta vector_id, 1165e2cb1decSSalil Mehta ret); 11660d3e6631SYunsheng Lin 1167e2cb1decSSalil Mehta return ret; 1168e2cb1decSSalil Mehta } 1169e2cb1decSSalil Mehta 11700d3e6631SYunsheng Lin static int hclgevf_put_vector(struct hnae3_handle *handle, int vector) 11710d3e6631SYunsheng Lin { 11720d3e6631SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 117303718db9SYunsheng Lin int vector_id; 11740d3e6631SYunsheng Lin 117503718db9SYunsheng Lin vector_id = hclgevf_get_vector_index(hdev, vector); 117603718db9SYunsheng Lin if (vector_id < 0) { 117703718db9SYunsheng Lin dev_err(&handle->pdev->dev, 117803718db9SYunsheng Lin "hclgevf_put_vector get vector index fail. ret =%d\n", 117903718db9SYunsheng Lin vector_id); 118003718db9SYunsheng Lin return vector_id; 118103718db9SYunsheng Lin } 118203718db9SYunsheng Lin 118303718db9SYunsheng Lin hclgevf_free_vector(hdev, vector_id); 1184e2cb1decSSalil Mehta 1185e2cb1decSSalil Mehta return 0; 1186e2cb1decSSalil Mehta } 1187e2cb1decSSalil Mehta 11883b75c3dfSPeng Li static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev *hdev, 1189e196ec75SJian Shen bool en_uc_pmc, bool en_mc_pmc, 1190f01f5559SJian Shen bool en_bc_pmc) 1191e2cb1decSSalil Mehta { 11925e7414cdSJian Shen struct hnae3_handle *handle = &hdev->nic; 1193d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1194f01f5559SJian Shen int ret; 1195e2cb1decSSalil Mehta 1196d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1197d3410018SYufeng Mo send_msg.code = HCLGE_MBX_SET_PROMISC_MODE; 1198d3410018SYufeng Mo send_msg.en_bc = en_bc_pmc ? 1 : 0; 1199d3410018SYufeng Mo send_msg.en_uc = en_uc_pmc ? 1 : 0; 1200d3410018SYufeng Mo send_msg.en_mc = en_mc_pmc ? 1 : 0; 12015e7414cdSJian Shen send_msg.en_limit_promisc = test_bit(HNAE3_PFLAG_LIMIT_PROMISC, 12025e7414cdSJian Shen &handle->priv_flags) ? 1 : 0; 1203e2cb1decSSalil Mehta 1204d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1205f01f5559SJian Shen if (ret) 1206e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1207f01f5559SJian Shen "Set promisc mode fail, status is %d.\n", ret); 1208e2cb1decSSalil Mehta 1209f01f5559SJian Shen return ret; 1210e2cb1decSSalil Mehta } 1211e2cb1decSSalil Mehta 1212e196ec75SJian Shen static int hclgevf_set_promisc_mode(struct hnae3_handle *handle, bool en_uc_pmc, 1213e196ec75SJian Shen bool en_mc_pmc) 1214e2cb1decSSalil Mehta { 1215e196ec75SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1216e196ec75SJian Shen bool en_bc_pmc; 1217e196ec75SJian Shen 1218295ba232SGuangbin Huang en_bc_pmc = hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2; 1219e196ec75SJian Shen 1220e196ec75SJian Shen return hclgevf_cmd_set_promisc_mode(hdev, en_uc_pmc, en_mc_pmc, 1221e196ec75SJian Shen en_bc_pmc); 1222e2cb1decSSalil Mehta } 1223e2cb1decSSalil Mehta 1224c631c696SJian Shen static void hclgevf_request_update_promisc_mode(struct hnae3_handle *handle) 1225c631c696SJian Shen { 1226c631c696SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1227c631c696SJian Shen 1228c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 12295e7414cdSJian Shen hclgevf_task_schedule(hdev, 0); 1230c631c696SJian Shen } 1231c631c696SJian Shen 1232c631c696SJian Shen static void hclgevf_sync_promisc_mode(struct hclgevf_dev *hdev) 1233c631c696SJian Shen { 1234c631c696SJian Shen struct hnae3_handle *handle = &hdev->nic; 1235c631c696SJian Shen bool en_uc_pmc = handle->netdev_flags & HNAE3_UPE; 1236c631c696SJian Shen bool en_mc_pmc = handle->netdev_flags & HNAE3_MPE; 1237c631c696SJian Shen int ret; 1238c631c696SJian Shen 1239c631c696SJian Shen if (test_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state)) { 1240c631c696SJian Shen ret = hclgevf_set_promisc_mode(handle, en_uc_pmc, en_mc_pmc); 1241c631c696SJian Shen if (!ret) 1242c631c696SJian Shen clear_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 1243c631c696SJian Shen } 1244c631c696SJian Shen } 1245c631c696SJian Shen 12468fa86551SYufeng Mo static int hclgevf_tqp_enable_cmd_send(struct hclgevf_dev *hdev, u16 tqp_id, 12478fa86551SYufeng Mo u16 stream_id, bool enable) 1248e2cb1decSSalil Mehta { 1249e2cb1decSSalil Mehta struct hclgevf_cfg_com_tqp_queue_cmd *req; 1250e2cb1decSSalil Mehta struct hclgevf_desc desc; 1251e2cb1decSSalil Mehta 1252e2cb1decSSalil Mehta req = (struct hclgevf_cfg_com_tqp_queue_cmd *)desc.data; 1253e2cb1decSSalil Mehta 1254e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_CFG_COM_TQP_QUEUE, 1255e2cb1decSSalil Mehta false); 1256e2cb1decSSalil Mehta req->tqp_id = cpu_to_le16(tqp_id & HCLGEVF_RING_ID_MASK); 1257e2cb1decSSalil Mehta req->stream_id = cpu_to_le16(stream_id); 1258ebaf1908SWeihang Li if (enable) 1259ebaf1908SWeihang Li req->enable |= 1U << HCLGEVF_TQP_ENABLE_B; 1260e2cb1decSSalil Mehta 12618fa86551SYufeng Mo return hclgevf_cmd_send(&hdev->hw, &desc, 1); 12628fa86551SYufeng Mo } 1263e2cb1decSSalil Mehta 12648fa86551SYufeng Mo static int hclgevf_tqp_enable(struct hnae3_handle *handle, bool enable) 12658fa86551SYufeng Mo { 12668fa86551SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 12678fa86551SYufeng Mo int ret; 12688fa86551SYufeng Mo u16 i; 12698fa86551SYufeng Mo 12708fa86551SYufeng Mo for (i = 0; i < handle->kinfo.num_tqps; i++) { 12718fa86551SYufeng Mo ret = hclgevf_tqp_enable_cmd_send(hdev, i, 0, enable); 12728fa86551SYufeng Mo if (ret) 12738fa86551SYufeng Mo return ret; 12748fa86551SYufeng Mo } 12758fa86551SYufeng Mo 12768fa86551SYufeng Mo return 0; 1277e2cb1decSSalil Mehta } 1278e2cb1decSSalil Mehta 1279e2cb1decSSalil Mehta static void hclgevf_reset_tqp_stats(struct hnae3_handle *handle) 1280e2cb1decSSalil Mehta { 1281b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 1282e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 1283e2cb1decSSalil Mehta int i; 1284e2cb1decSSalil Mehta 1285b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 1286b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 1287e2cb1decSSalil Mehta memset(&tqp->tqp_stats, 0, sizeof(tqp->tqp_stats)); 1288e2cb1decSSalil Mehta } 1289e2cb1decSSalil Mehta } 1290e2cb1decSSalil Mehta 12918e6de441SHuazhong Tan static int hclgevf_get_host_mac_addr(struct hclgevf_dev *hdev, u8 *p) 12928e6de441SHuazhong Tan { 1293d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 12948e6de441SHuazhong Tan u8 host_mac[ETH_ALEN]; 12958e6de441SHuazhong Tan int status; 12968e6de441SHuazhong Tan 1297d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MAC_ADDR, 0); 1298d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, host_mac, 1299d3410018SYufeng Mo ETH_ALEN); 13008e6de441SHuazhong Tan if (status) { 13018e6de441SHuazhong Tan dev_err(&hdev->pdev->dev, 13028e6de441SHuazhong Tan "fail to get VF MAC from host %d", status); 13038e6de441SHuazhong Tan return status; 13048e6de441SHuazhong Tan } 13058e6de441SHuazhong Tan 13068e6de441SHuazhong Tan ether_addr_copy(p, host_mac); 13078e6de441SHuazhong Tan 13088e6de441SHuazhong Tan return 0; 13098e6de441SHuazhong Tan } 13108e6de441SHuazhong Tan 1311e2cb1decSSalil Mehta static void hclgevf_get_mac_addr(struct hnae3_handle *handle, u8 *p) 1312e2cb1decSSalil Mehta { 1313e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 13148e6de441SHuazhong Tan u8 host_mac_addr[ETH_ALEN]; 1315e2cb1decSSalil Mehta 13168e6de441SHuazhong Tan if (hclgevf_get_host_mac_addr(hdev, host_mac_addr)) 13178e6de441SHuazhong Tan return; 13188e6de441SHuazhong Tan 13198e6de441SHuazhong Tan hdev->has_pf_mac = !is_zero_ether_addr(host_mac_addr); 13208e6de441SHuazhong Tan if (hdev->has_pf_mac) 13218e6de441SHuazhong Tan ether_addr_copy(p, host_mac_addr); 13228e6de441SHuazhong Tan else 1323e2cb1decSSalil Mehta ether_addr_copy(p, hdev->hw.mac.mac_addr); 1324e2cb1decSSalil Mehta } 1325e2cb1decSSalil Mehta 132659098055SFuyun Liang static int hclgevf_set_mac_addr(struct hnae3_handle *handle, void *p, 132759098055SFuyun Liang bool is_first) 1328e2cb1decSSalil Mehta { 1329e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1330e2cb1decSSalil Mehta u8 *old_mac_addr = (u8 *)hdev->hw.mac.mac_addr; 1331d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1332e2cb1decSSalil Mehta u8 *new_mac_addr = (u8 *)p; 1333e2cb1decSSalil Mehta int status; 1334e2cb1decSSalil Mehta 1335d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_UNICAST, 0); 1336ee4bcd3bSJian Shen send_msg.subcode = HCLGE_MBX_MAC_VLAN_UC_MODIFY; 1337d3410018SYufeng Mo ether_addr_copy(send_msg.data, new_mac_addr); 1338ee4bcd3bSJian Shen if (is_first && !hdev->has_pf_mac) 1339ee4bcd3bSJian Shen eth_zero_addr(&send_msg.data[ETH_ALEN]); 1340ee4bcd3bSJian Shen else 1341d3410018SYufeng Mo ether_addr_copy(&send_msg.data[ETH_ALEN], old_mac_addr); 1342d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1343e2cb1decSSalil Mehta if (!status) 1344e2cb1decSSalil Mehta ether_addr_copy(hdev->hw.mac.mac_addr, new_mac_addr); 1345e2cb1decSSalil Mehta 1346e2cb1decSSalil Mehta return status; 1347e2cb1decSSalil Mehta } 1348e2cb1decSSalil Mehta 1349ee4bcd3bSJian Shen static struct hclgevf_mac_addr_node * 1350ee4bcd3bSJian Shen hclgevf_find_mac_node(struct list_head *list, const u8 *mac_addr) 1351ee4bcd3bSJian Shen { 1352ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1353ee4bcd3bSJian Shen 1354ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) 1355ee4bcd3bSJian Shen if (ether_addr_equal(mac_addr, mac_node->mac_addr)) 1356ee4bcd3bSJian Shen return mac_node; 1357ee4bcd3bSJian Shen 1358ee4bcd3bSJian Shen return NULL; 1359ee4bcd3bSJian Shen } 1360ee4bcd3bSJian Shen 1361ee4bcd3bSJian Shen static void hclgevf_update_mac_node(struct hclgevf_mac_addr_node *mac_node, 1362ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state) 1363ee4bcd3bSJian Shen { 1364ee4bcd3bSJian Shen switch (state) { 1365ee4bcd3bSJian Shen /* from set_rx_mode or tmp_add_list */ 1366ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1367ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_DEL) 1368ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1369ee4bcd3bSJian Shen break; 1370ee4bcd3bSJian Shen /* only from set_rx_mode */ 1371ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 1372ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1373ee4bcd3bSJian Shen list_del(&mac_node->node); 1374ee4bcd3bSJian Shen kfree(mac_node); 1375ee4bcd3bSJian Shen } else { 1376ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 1377ee4bcd3bSJian Shen } 1378ee4bcd3bSJian Shen break; 1379ee4bcd3bSJian Shen /* only from tmp_add_list, the mac_node->state won't be 1380ee4bcd3bSJian Shen * HCLGEVF_MAC_ACTIVE 1381ee4bcd3bSJian Shen */ 1382ee4bcd3bSJian Shen case HCLGEVF_MAC_ACTIVE: 1383ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1384ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1385ee4bcd3bSJian Shen break; 1386ee4bcd3bSJian Shen } 1387ee4bcd3bSJian Shen } 1388ee4bcd3bSJian Shen 1389ee4bcd3bSJian Shen static int hclgevf_update_mac_list(struct hnae3_handle *handle, 1390ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state, 1391ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type, 1392e2cb1decSSalil Mehta const unsigned char *addr) 1393e2cb1decSSalil Mehta { 1394e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1395ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node; 1396ee4bcd3bSJian Shen struct list_head *list; 1397e2cb1decSSalil Mehta 1398ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1399ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1400ee4bcd3bSJian Shen 1401ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1402ee4bcd3bSJian Shen 1403ee4bcd3bSJian Shen /* if the mac addr is already in the mac list, no need to add a new 1404ee4bcd3bSJian Shen * one into it, just check the mac addr state, convert it to a new 1405ee4bcd3bSJian Shen * new state, or just remove it, or do nothing. 1406ee4bcd3bSJian Shen */ 1407ee4bcd3bSJian Shen mac_node = hclgevf_find_mac_node(list, addr); 1408ee4bcd3bSJian Shen if (mac_node) { 1409ee4bcd3bSJian Shen hclgevf_update_mac_node(mac_node, state); 1410ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1411ee4bcd3bSJian Shen return 0; 1412ee4bcd3bSJian Shen } 1413ee4bcd3bSJian Shen /* if this address is never added, unnecessary to delete */ 1414ee4bcd3bSJian Shen if (state == HCLGEVF_MAC_TO_DEL) { 1415ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1416ee4bcd3bSJian Shen return -ENOENT; 1417ee4bcd3bSJian Shen } 1418ee4bcd3bSJian Shen 1419ee4bcd3bSJian Shen mac_node = kzalloc(sizeof(*mac_node), GFP_ATOMIC); 1420ee4bcd3bSJian Shen if (!mac_node) { 1421ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1422ee4bcd3bSJian Shen return -ENOMEM; 1423ee4bcd3bSJian Shen } 1424ee4bcd3bSJian Shen 1425ee4bcd3bSJian Shen mac_node->state = state; 1426ee4bcd3bSJian Shen ether_addr_copy(mac_node->mac_addr, addr); 1427ee4bcd3bSJian Shen list_add_tail(&mac_node->node, list); 1428ee4bcd3bSJian Shen 1429ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1430ee4bcd3bSJian Shen return 0; 1431ee4bcd3bSJian Shen } 1432ee4bcd3bSJian Shen 1433ee4bcd3bSJian Shen static int hclgevf_add_uc_addr(struct hnae3_handle *handle, 1434ee4bcd3bSJian Shen const unsigned char *addr) 1435ee4bcd3bSJian Shen { 1436ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1437ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1438e2cb1decSSalil Mehta } 1439e2cb1decSSalil Mehta 1440e2cb1decSSalil Mehta static int hclgevf_rm_uc_addr(struct hnae3_handle *handle, 1441e2cb1decSSalil Mehta const unsigned char *addr) 1442e2cb1decSSalil Mehta { 1443ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1444ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1445e2cb1decSSalil Mehta } 1446e2cb1decSSalil Mehta 1447e2cb1decSSalil Mehta static int hclgevf_add_mc_addr(struct hnae3_handle *handle, 1448e2cb1decSSalil Mehta const unsigned char *addr) 1449e2cb1decSSalil Mehta { 1450ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1451ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1452e2cb1decSSalil Mehta } 1453e2cb1decSSalil Mehta 1454e2cb1decSSalil Mehta static int hclgevf_rm_mc_addr(struct hnae3_handle *handle, 1455e2cb1decSSalil Mehta const unsigned char *addr) 1456e2cb1decSSalil Mehta { 1457ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1458ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1459ee4bcd3bSJian Shen } 1460e2cb1decSSalil Mehta 1461ee4bcd3bSJian Shen static int hclgevf_add_del_mac_addr(struct hclgevf_dev *hdev, 1462ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, 1463ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1464ee4bcd3bSJian Shen { 1465ee4bcd3bSJian Shen struct hclge_vf_to_pf_msg send_msg; 1466ee4bcd3bSJian Shen u8 code, subcode; 1467ee4bcd3bSJian Shen 1468ee4bcd3bSJian Shen if (mac_type == HCLGEVF_MAC_ADDR_UC) { 1469ee4bcd3bSJian Shen code = HCLGE_MBX_SET_UNICAST; 1470ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1471ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_ADD; 1472ee4bcd3bSJian Shen else 1473ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_REMOVE; 1474ee4bcd3bSJian Shen } else { 1475ee4bcd3bSJian Shen code = HCLGE_MBX_SET_MULTICAST; 1476ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1477ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_ADD; 1478ee4bcd3bSJian Shen else 1479ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_REMOVE; 1480ee4bcd3bSJian Shen } 1481ee4bcd3bSJian Shen 1482ee4bcd3bSJian Shen hclgevf_build_send_msg(&send_msg, code, subcode); 1483ee4bcd3bSJian Shen ether_addr_copy(send_msg.data, mac_node->mac_addr); 1484d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1485e2cb1decSSalil Mehta } 1486e2cb1decSSalil Mehta 1487ee4bcd3bSJian Shen static void hclgevf_config_mac_list(struct hclgevf_dev *hdev, 1488ee4bcd3bSJian Shen struct list_head *list, 1489ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1490ee4bcd3bSJian Shen { 1491ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1492ee4bcd3bSJian Shen int ret; 1493ee4bcd3bSJian Shen 1494ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1495ee4bcd3bSJian Shen ret = hclgevf_add_del_mac_addr(hdev, mac_node, mac_type); 1496ee4bcd3bSJian Shen if (ret) { 1497ee4bcd3bSJian Shen dev_err(&hdev->pdev->dev, 1498ee4bcd3bSJian Shen "failed to configure mac %pM, state = %d, ret = %d\n", 1499ee4bcd3bSJian Shen mac_node->mac_addr, mac_node->state, ret); 1500ee4bcd3bSJian Shen return; 1501ee4bcd3bSJian Shen } 1502ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1503ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1504ee4bcd3bSJian Shen } else { 1505ee4bcd3bSJian Shen list_del(&mac_node->node); 1506ee4bcd3bSJian Shen kfree(mac_node); 1507ee4bcd3bSJian Shen } 1508ee4bcd3bSJian Shen } 1509ee4bcd3bSJian Shen } 1510ee4bcd3bSJian Shen 1511ee4bcd3bSJian Shen static void hclgevf_sync_from_add_list(struct list_head *add_list, 1512ee4bcd3bSJian Shen struct list_head *mac_list) 1513ee4bcd3bSJian Shen { 1514ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1515ee4bcd3bSJian Shen 1516ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, add_list, node) { 1517ee4bcd3bSJian Shen /* if the mac address from tmp_add_list is not in the 1518ee4bcd3bSJian Shen * uc/mc_mac_list, it means have received a TO_DEL request 1519ee4bcd3bSJian Shen * during the time window of sending mac config request to PF 1520ee4bcd3bSJian Shen * If mac_node state is ACTIVE, then change its state to TO_DEL, 1521ee4bcd3bSJian Shen * then it will be removed at next time. If is TO_ADD, it means 1522ee4bcd3bSJian Shen * send TO_ADD request failed, so just remove the mac node. 1523ee4bcd3bSJian Shen */ 1524ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1525ee4bcd3bSJian Shen if (new_node) { 1526ee4bcd3bSJian Shen hclgevf_update_mac_node(new_node, mac_node->state); 1527ee4bcd3bSJian Shen list_del(&mac_node->node); 1528ee4bcd3bSJian Shen kfree(mac_node); 1529ee4bcd3bSJian Shen } else if (mac_node->state == HCLGEVF_MAC_ACTIVE) { 1530ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 1531ee4bcd3bSJian Shen list_del(&mac_node->node); 1532ee4bcd3bSJian Shen list_add_tail(&mac_node->node, mac_list); 1533ee4bcd3bSJian Shen } else { 1534ee4bcd3bSJian Shen list_del(&mac_node->node); 1535ee4bcd3bSJian Shen kfree(mac_node); 1536ee4bcd3bSJian Shen } 1537ee4bcd3bSJian Shen } 1538ee4bcd3bSJian Shen } 1539ee4bcd3bSJian Shen 1540ee4bcd3bSJian Shen static void hclgevf_sync_from_del_list(struct list_head *del_list, 1541ee4bcd3bSJian Shen struct list_head *mac_list) 1542ee4bcd3bSJian Shen { 1543ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1544ee4bcd3bSJian Shen 1545ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, del_list, node) { 1546ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1547ee4bcd3bSJian Shen if (new_node) { 1548ee4bcd3bSJian Shen /* If the mac addr is exist in the mac list, it means 1549ee4bcd3bSJian Shen * received a new request TO_ADD during the time window 1550ee4bcd3bSJian Shen * of sending mac addr configurrequest to PF, so just 1551ee4bcd3bSJian Shen * change the mac state to ACTIVE. 1552ee4bcd3bSJian Shen */ 1553ee4bcd3bSJian Shen new_node->state = HCLGEVF_MAC_ACTIVE; 1554ee4bcd3bSJian Shen list_del(&mac_node->node); 1555ee4bcd3bSJian Shen kfree(mac_node); 1556ee4bcd3bSJian Shen } else { 1557ee4bcd3bSJian Shen list_del(&mac_node->node); 1558ee4bcd3bSJian Shen list_add_tail(&mac_node->node, mac_list); 1559ee4bcd3bSJian Shen } 1560ee4bcd3bSJian Shen } 1561ee4bcd3bSJian Shen } 1562ee4bcd3bSJian Shen 1563ee4bcd3bSJian Shen static void hclgevf_clear_list(struct list_head *list) 1564ee4bcd3bSJian Shen { 1565ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1566ee4bcd3bSJian Shen 1567ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1568ee4bcd3bSJian Shen list_del(&mac_node->node); 1569ee4bcd3bSJian Shen kfree(mac_node); 1570ee4bcd3bSJian Shen } 1571ee4bcd3bSJian Shen } 1572ee4bcd3bSJian Shen 1573ee4bcd3bSJian Shen static void hclgevf_sync_mac_list(struct hclgevf_dev *hdev, 1574ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1575ee4bcd3bSJian Shen { 1576ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1577ee4bcd3bSJian Shen struct list_head tmp_add_list, tmp_del_list; 1578ee4bcd3bSJian Shen struct list_head *list; 1579ee4bcd3bSJian Shen 1580ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_add_list); 1581ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_del_list); 1582ee4bcd3bSJian Shen 1583ee4bcd3bSJian Shen /* move the mac addr to the tmp_add_list and tmp_del_list, then 1584ee4bcd3bSJian Shen * we can add/delete these mac addr outside the spin lock 1585ee4bcd3bSJian Shen */ 1586ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1587ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1588ee4bcd3bSJian Shen 1589ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1590ee4bcd3bSJian Shen 1591ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1592ee4bcd3bSJian Shen switch (mac_node->state) { 1593ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 1594ee4bcd3bSJian Shen list_del(&mac_node->node); 1595ee4bcd3bSJian Shen list_add_tail(&mac_node->node, &tmp_del_list); 1596ee4bcd3bSJian Shen break; 1597ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1598ee4bcd3bSJian Shen new_node = kzalloc(sizeof(*new_node), GFP_ATOMIC); 1599ee4bcd3bSJian Shen if (!new_node) 1600ee4bcd3bSJian Shen goto stop_traverse; 1601ee4bcd3bSJian Shen 1602ee4bcd3bSJian Shen ether_addr_copy(new_node->mac_addr, mac_node->mac_addr); 1603ee4bcd3bSJian Shen new_node->state = mac_node->state; 1604ee4bcd3bSJian Shen list_add_tail(&new_node->node, &tmp_add_list); 1605ee4bcd3bSJian Shen break; 1606ee4bcd3bSJian Shen default: 1607ee4bcd3bSJian Shen break; 1608ee4bcd3bSJian Shen } 1609ee4bcd3bSJian Shen } 1610ee4bcd3bSJian Shen 1611ee4bcd3bSJian Shen stop_traverse: 1612ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1613ee4bcd3bSJian Shen 1614ee4bcd3bSJian Shen /* delete first, in order to get max mac table space for adding */ 1615ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_del_list, mac_type); 1616ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_add_list, mac_type); 1617ee4bcd3bSJian Shen 1618ee4bcd3bSJian Shen /* if some mac addresses were added/deleted fail, move back to the 1619ee4bcd3bSJian Shen * mac_list, and retry at next time. 1620ee4bcd3bSJian Shen */ 1621ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1622ee4bcd3bSJian Shen 1623ee4bcd3bSJian Shen hclgevf_sync_from_del_list(&tmp_del_list, list); 1624ee4bcd3bSJian Shen hclgevf_sync_from_add_list(&tmp_add_list, list); 1625ee4bcd3bSJian Shen 1626ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1627ee4bcd3bSJian Shen } 1628ee4bcd3bSJian Shen 1629ee4bcd3bSJian Shen static void hclgevf_sync_mac_table(struct hclgevf_dev *hdev) 1630ee4bcd3bSJian Shen { 1631ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_UC); 1632ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_MC); 1633ee4bcd3bSJian Shen } 1634ee4bcd3bSJian Shen 1635ee4bcd3bSJian Shen static void hclgevf_uninit_mac_list(struct hclgevf_dev *hdev) 1636ee4bcd3bSJian Shen { 1637ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1638ee4bcd3bSJian Shen 1639ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.uc_mac_list); 1640ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.mc_mac_list); 1641ee4bcd3bSJian Shen 1642ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1643ee4bcd3bSJian Shen } 1644ee4bcd3bSJian Shen 1645e2cb1decSSalil Mehta static int hclgevf_set_vlan_filter(struct hnae3_handle *handle, 1646e2cb1decSSalil Mehta __be16 proto, u16 vlan_id, 1647e2cb1decSSalil Mehta bool is_kill) 1648e2cb1decSSalil Mehta { 1649d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_IS_KILL_OFFSET 0 1650d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET 1 1651d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_PROTO_OFFSET 3 1652d3410018SYufeng Mo 1653e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1654d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1655fe4144d4SJian Shen int ret; 1656e2cb1decSSalil Mehta 1657b37ce587SYufeng Mo if (vlan_id > HCLGEVF_MAX_VLAN_ID) 1658e2cb1decSSalil Mehta return -EINVAL; 1659e2cb1decSSalil Mehta 1660e2cb1decSSalil Mehta if (proto != htons(ETH_P_8021Q)) 1661e2cb1decSSalil Mehta return -EPROTONOSUPPORT; 1662e2cb1decSSalil Mehta 1663b7b5d25bSGuojia Liao /* When device is resetting or reset failed, firmware is unable to 1664b7b5d25bSGuojia Liao * handle mailbox. Just record the vlan id, and remove it after 1665fe4144d4SJian Shen * reset finished. 1666fe4144d4SJian Shen */ 1667b7b5d25bSGuojia Liao if ((test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 1668b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) { 1669fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1670fe4144d4SJian Shen return -EBUSY; 1671fe4144d4SJian Shen } 1672fe4144d4SJian Shen 1673d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1674d3410018SYufeng Mo HCLGE_MBX_VLAN_FILTER); 1675d3410018SYufeng Mo send_msg.data[HCLGEVF_VLAN_MBX_IS_KILL_OFFSET] = is_kill; 1676d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET], &vlan_id, 1677d3410018SYufeng Mo sizeof(vlan_id)); 1678d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_PROTO_OFFSET], &proto, 1679d3410018SYufeng Mo sizeof(proto)); 168046ee7350SGuojia Liao /* when remove hw vlan filter failed, record the vlan id, 1681fe4144d4SJian Shen * and try to remove it from hw later, to be consistence 1682fe4144d4SJian Shen * with stack. 1683fe4144d4SJian Shen */ 1684d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1685fe4144d4SJian Shen if (is_kill && ret) 1686fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1687fe4144d4SJian Shen 1688fe4144d4SJian Shen return ret; 1689fe4144d4SJian Shen } 1690fe4144d4SJian Shen 1691fe4144d4SJian Shen static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev) 1692fe4144d4SJian Shen { 1693fe4144d4SJian Shen #define HCLGEVF_MAX_SYNC_COUNT 60 1694fe4144d4SJian Shen struct hnae3_handle *handle = &hdev->nic; 1695fe4144d4SJian Shen int ret, sync_cnt = 0; 1696fe4144d4SJian Shen u16 vlan_id; 1697fe4144d4SJian Shen 1698fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1699fe4144d4SJian Shen while (vlan_id != VLAN_N_VID) { 1700fe4144d4SJian Shen ret = hclgevf_set_vlan_filter(handle, htons(ETH_P_8021Q), 1701fe4144d4SJian Shen vlan_id, true); 1702fe4144d4SJian Shen if (ret) 1703fe4144d4SJian Shen return; 1704fe4144d4SJian Shen 1705fe4144d4SJian Shen clear_bit(vlan_id, hdev->vlan_del_fail_bmap); 1706fe4144d4SJian Shen sync_cnt++; 1707fe4144d4SJian Shen if (sync_cnt >= HCLGEVF_MAX_SYNC_COUNT) 1708fe4144d4SJian Shen return; 1709fe4144d4SJian Shen 1710fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1711fe4144d4SJian Shen } 1712e2cb1decSSalil Mehta } 1713e2cb1decSSalil Mehta 1714b2641e2aSYunsheng Lin static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) 1715b2641e2aSYunsheng Lin { 1716b2641e2aSYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1717d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1718b2641e2aSYunsheng Lin 1719d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1720d3410018SYufeng Mo HCLGE_MBX_VLAN_RX_OFF_CFG); 1721d3410018SYufeng Mo send_msg.data[0] = enable ? 1 : 0; 1722d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1723b2641e2aSYunsheng Lin } 1724b2641e2aSYunsheng Lin 17258fa86551SYufeng Mo static int hclgevf_reset_tqp(struct hnae3_handle *handle) 1726e2cb1decSSalil Mehta { 17278fa86551SYufeng Mo #define HCLGEVF_RESET_ALL_QUEUE_DONE 1U 1728e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1729d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 17308fa86551SYufeng Mo u8 return_status = 0; 17311a426f8bSPeng Li int ret; 17328fa86551SYufeng Mo u16 i; 1733e2cb1decSSalil Mehta 17341a426f8bSPeng Li /* disable vf queue before send queue reset msg to PF */ 17358fa86551SYufeng Mo ret = hclgevf_tqp_enable(handle, false); 17368fa86551SYufeng Mo if (ret) { 17378fa86551SYufeng Mo dev_err(&hdev->pdev->dev, "failed to disable tqp, ret = %d\n", 17388fa86551SYufeng Mo ret); 17397fa6be4fSHuazhong Tan return ret; 17408fa86551SYufeng Mo } 17411a426f8bSPeng Li 1742d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 17438fa86551SYufeng Mo 17448fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &return_status, 17458fa86551SYufeng Mo sizeof(return_status)); 17468fa86551SYufeng Mo if (ret || return_status == HCLGEVF_RESET_ALL_QUEUE_DONE) 17478fa86551SYufeng Mo return ret; 17488fa86551SYufeng Mo 17498fa86551SYufeng Mo for (i = 1; i < handle->kinfo.num_tqps; i++) { 17508fa86551SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 17518fa86551SYufeng Mo memcpy(send_msg.data, &i, sizeof(i)); 17528fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 17538fa86551SYufeng Mo if (ret) 17548fa86551SYufeng Mo return ret; 17558fa86551SYufeng Mo } 17568fa86551SYufeng Mo 17578fa86551SYufeng Mo return 0; 1758e2cb1decSSalil Mehta } 1759e2cb1decSSalil Mehta 1760818f1675SYunsheng Lin static int hclgevf_set_mtu(struct hnae3_handle *handle, int new_mtu) 1761818f1675SYunsheng Lin { 1762818f1675SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1763d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1764818f1675SYunsheng Lin 1765d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_MTU, 0); 1766d3410018SYufeng Mo memcpy(send_msg.data, &new_mtu, sizeof(new_mtu)); 1767d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1768818f1675SYunsheng Lin } 1769818f1675SYunsheng Lin 17706988eb2aSSalil Mehta static int hclgevf_notify_client(struct hclgevf_dev *hdev, 17716988eb2aSSalil Mehta enum hnae3_reset_notify_type type) 17726988eb2aSSalil Mehta { 17736988eb2aSSalil Mehta struct hnae3_client *client = hdev->nic_client; 17746988eb2aSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 17756a5f6fa3SHuazhong Tan int ret; 17766988eb2aSSalil Mehta 177725d1817cSHuazhong Tan if (!test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state) || 177825d1817cSHuazhong Tan !client) 177925d1817cSHuazhong Tan return 0; 178025d1817cSHuazhong Tan 17816988eb2aSSalil Mehta if (!client->ops->reset_notify) 17826988eb2aSSalil Mehta return -EOPNOTSUPP; 17836988eb2aSSalil Mehta 17846a5f6fa3SHuazhong Tan ret = client->ops->reset_notify(handle, type); 17856a5f6fa3SHuazhong Tan if (ret) 17866a5f6fa3SHuazhong Tan dev_err(&hdev->pdev->dev, "notify nic client failed %d(%d)\n", 17876a5f6fa3SHuazhong Tan type, ret); 17886a5f6fa3SHuazhong Tan 17896a5f6fa3SHuazhong Tan return ret; 17906988eb2aSSalil Mehta } 17916988eb2aSSalil Mehta 1792fe735c84SHuazhong Tan static int hclgevf_notify_roce_client(struct hclgevf_dev *hdev, 1793fe735c84SHuazhong Tan enum hnae3_reset_notify_type type) 1794fe735c84SHuazhong Tan { 1795fe735c84SHuazhong Tan struct hnae3_client *client = hdev->roce_client; 1796fe735c84SHuazhong Tan struct hnae3_handle *handle = &hdev->roce; 1797fe735c84SHuazhong Tan int ret; 1798fe735c84SHuazhong Tan 1799fe735c84SHuazhong Tan if (!test_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state) || !client) 1800fe735c84SHuazhong Tan return 0; 1801fe735c84SHuazhong Tan 1802fe735c84SHuazhong Tan if (!client->ops->reset_notify) 1803fe735c84SHuazhong Tan return -EOPNOTSUPP; 1804fe735c84SHuazhong Tan 1805fe735c84SHuazhong Tan ret = client->ops->reset_notify(handle, type); 1806fe735c84SHuazhong Tan if (ret) 1807fe735c84SHuazhong Tan dev_err(&hdev->pdev->dev, "notify roce client failed %d(%d)", 1808fe735c84SHuazhong Tan type, ret); 1809fe735c84SHuazhong Tan return ret; 1810fe735c84SHuazhong Tan } 1811fe735c84SHuazhong Tan 18126988eb2aSSalil Mehta static int hclgevf_reset_wait(struct hclgevf_dev *hdev) 18136988eb2aSSalil Mehta { 1814aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_US 20000 1815aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_CNT 2000 1816aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_TIMEOUT_US \ 1817aa5c4f17SHuazhong Tan (HCLGEVF_RESET_WAIT_US * HCLGEVF_RESET_WAIT_CNT) 1818aa5c4f17SHuazhong Tan 1819aa5c4f17SHuazhong Tan u32 val; 1820aa5c4f17SHuazhong Tan int ret; 18216988eb2aSSalil Mehta 1822f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_RESET) 182372e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 182472e2fb07SHuazhong Tan HCLGEVF_VF_RST_ING, val, 182572e2fb07SHuazhong Tan !(val & HCLGEVF_VF_RST_ING_BIT), 182672e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_US, 182772e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 182872e2fb07SHuazhong Tan else 182972e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 183072e2fb07SHuazhong Tan HCLGEVF_RST_ING, val, 1831aa5c4f17SHuazhong Tan !(val & HCLGEVF_RST_ING_BITS), 1832aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_US, 1833aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 18346988eb2aSSalil Mehta 18356988eb2aSSalil Mehta /* hardware completion status should be available by this time */ 1836aa5c4f17SHuazhong Tan if (ret) { 1837aa5c4f17SHuazhong Tan dev_err(&hdev->pdev->dev, 18388912fd6aSColin Ian King "couldn't get reset done status from h/w, timeout!\n"); 1839aa5c4f17SHuazhong Tan return ret; 18406988eb2aSSalil Mehta } 18416988eb2aSSalil Mehta 18426988eb2aSSalil Mehta /* we will wait a bit more to let reset of the stack to complete. This 18436988eb2aSSalil Mehta * might happen in case reset assertion was made by PF. Yes, this also 18446988eb2aSSalil Mehta * means we might end up waiting bit more even for VF reset. 18456988eb2aSSalil Mehta */ 18466988eb2aSSalil Mehta msleep(5000); 18476988eb2aSSalil Mehta 18486988eb2aSSalil Mehta return 0; 18496988eb2aSSalil Mehta } 18506988eb2aSSalil Mehta 18516b428b4fSHuazhong Tan static void hclgevf_reset_handshake(struct hclgevf_dev *hdev, bool enable) 18526b428b4fSHuazhong Tan { 18536b428b4fSHuazhong Tan u32 reg_val; 18546b428b4fSHuazhong Tan 18556b428b4fSHuazhong Tan reg_val = hclgevf_read_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG); 18566b428b4fSHuazhong Tan if (enable) 18576b428b4fSHuazhong Tan reg_val |= HCLGEVF_NIC_SW_RST_RDY; 18586b428b4fSHuazhong Tan else 18596b428b4fSHuazhong Tan reg_val &= ~HCLGEVF_NIC_SW_RST_RDY; 18606b428b4fSHuazhong Tan 18616b428b4fSHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG, 18626b428b4fSHuazhong Tan reg_val); 18636b428b4fSHuazhong Tan } 18646b428b4fSHuazhong Tan 18656988eb2aSSalil Mehta static int hclgevf_reset_stack(struct hclgevf_dev *hdev) 18666988eb2aSSalil Mehta { 18677a01c897SSalil Mehta int ret; 18687a01c897SSalil Mehta 18696988eb2aSSalil Mehta /* uninitialize the nic client */ 18706a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT); 18716a5f6fa3SHuazhong Tan if (ret) 18726a5f6fa3SHuazhong Tan return ret; 18736988eb2aSSalil Mehta 18747a01c897SSalil Mehta /* re-initialize the hclge device */ 18759c6f7085SHuazhong Tan ret = hclgevf_reset_hdev(hdev); 18767a01c897SSalil Mehta if (ret) { 18777a01c897SSalil Mehta dev_err(&hdev->pdev->dev, 18787a01c897SSalil Mehta "hclge device re-init failed, VF is disabled!\n"); 18797a01c897SSalil Mehta return ret; 18807a01c897SSalil Mehta } 18816988eb2aSSalil Mehta 18826988eb2aSSalil Mehta /* bring up the nic client again */ 18836a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_INIT_CLIENT); 18846a5f6fa3SHuazhong Tan if (ret) 18856a5f6fa3SHuazhong Tan return ret; 18866988eb2aSSalil Mehta 18876b428b4fSHuazhong Tan /* clear handshake status with IMP */ 18886b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, false); 18896b428b4fSHuazhong Tan 18901cc9bc6eSHuazhong Tan /* bring up the nic to enable TX/RX again */ 18911cc9bc6eSHuazhong Tan return hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 18926988eb2aSSalil Mehta } 18936988eb2aSSalil Mehta 1894dea846e8SHuazhong Tan static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev) 1895dea846e8SHuazhong Tan { 1896ada13ee3SHuazhong Tan #define HCLGEVF_RESET_SYNC_TIME 100 1897ada13ee3SHuazhong Tan 1898f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { 1899d41884eeSHuazhong Tan struct hclge_vf_to_pf_msg send_msg; 1900d41884eeSHuazhong Tan int ret; 1901d41884eeSHuazhong Tan 1902d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0); 1903d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1904cddd5648SHuazhong Tan if (ret) { 1905cddd5648SHuazhong Tan dev_err(&hdev->pdev->dev, 1906cddd5648SHuazhong Tan "failed to assert VF reset, ret = %d\n", ret); 1907cddd5648SHuazhong Tan return ret; 1908cddd5648SHuazhong Tan } 1909c88a6e7dSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt++; 1910dea846e8SHuazhong Tan } 1911dea846e8SHuazhong Tan 1912ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 1913ada13ee3SHuazhong Tan /* inform hardware that preparatory work is done */ 1914ada13ee3SHuazhong Tan msleep(HCLGEVF_RESET_SYNC_TIME); 19156b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1916d41884eeSHuazhong Tan dev_info(&hdev->pdev->dev, "prepare reset(%d) wait done\n", 1917d41884eeSHuazhong Tan hdev->reset_type); 1918dea846e8SHuazhong Tan 1919d41884eeSHuazhong Tan return 0; 1920dea846e8SHuazhong Tan } 1921dea846e8SHuazhong Tan 19223d77d0cbSHuazhong Tan static void hclgevf_dump_rst_info(struct hclgevf_dev *hdev) 19233d77d0cbSHuazhong Tan { 19243d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF function reset count: %u\n", 19253d77d0cbSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt); 19263d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", 19273d77d0cbSHuazhong Tan hdev->rst_stats.flr_rst_cnt); 19283d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF reset count: %u\n", 19293d77d0cbSHuazhong Tan hdev->rst_stats.vf_rst_cnt); 19303d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset done count: %u\n", 19313d77d0cbSHuazhong Tan hdev->rst_stats.rst_done_cnt); 19323d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", 19333d77d0cbSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt); 19343d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset count: %u\n", 19353d77d0cbSHuazhong Tan hdev->rst_stats.rst_cnt); 19363d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset fail count: %u\n", 19373d77d0cbSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 19383d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", 19393d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_MISC_VECTOR_REG_BASE)); 19403d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt status: 0x%x\n", 19419cee2e8dSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_STATE_REG)); 19423d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", 19433d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_CMDQ_TX_DEPTH_REG)); 19443d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", 19453d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING)); 19463d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); 19473d77d0cbSHuazhong Tan } 19483d77d0cbSHuazhong Tan 1949bbe6540eSHuazhong Tan static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev) 1950bbe6540eSHuazhong Tan { 19516b428b4fSHuazhong Tan /* recover handshake status with IMP when reset fail */ 19526b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1953bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt++; 1954adcf738bSGuojia Liao dev_err(&hdev->pdev->dev, "failed to reset VF(%u)\n", 1955bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 1956bbe6540eSHuazhong Tan 1957bbe6540eSHuazhong Tan if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT) 1958bbe6540eSHuazhong Tan set_bit(hdev->reset_type, &hdev->reset_pending); 1959bbe6540eSHuazhong Tan 1960bbe6540eSHuazhong Tan if (hclgevf_is_reset_pending(hdev)) { 1961bbe6540eSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 1962bbe6540eSHuazhong Tan hclgevf_reset_task_schedule(hdev); 19633d77d0cbSHuazhong Tan } else { 1964d5432455SGuojia Liao set_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 19653d77d0cbSHuazhong Tan hclgevf_dump_rst_info(hdev); 1966bbe6540eSHuazhong Tan } 1967bbe6540eSHuazhong Tan } 1968bbe6540eSHuazhong Tan 19691cc9bc6eSHuazhong Tan static int hclgevf_reset_prepare(struct hclgevf_dev *hdev) 19706988eb2aSSalil Mehta { 19716988eb2aSSalil Mehta int ret; 19726988eb2aSSalil Mehta 1973c88a6e7dSHuazhong Tan hdev->rst_stats.rst_cnt++; 19746988eb2aSSalil Mehta 1975fe735c84SHuazhong Tan /* perform reset of the stack & ae device for a client */ 1976fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_DOWN_CLIENT); 1977fe735c84SHuazhong Tan if (ret) 1978fe735c84SHuazhong Tan return ret; 1979fe735c84SHuazhong Tan 19801cc9bc6eSHuazhong Tan rtnl_lock(); 19816988eb2aSSalil Mehta /* bring down the nic to stop any ongoing TX/RX */ 19826a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 198329118ab9SHuazhong Tan rtnl_unlock(); 19846a5f6fa3SHuazhong Tan if (ret) 19851cc9bc6eSHuazhong Tan return ret; 1986dea846e8SHuazhong Tan 19871cc9bc6eSHuazhong Tan return hclgevf_reset_prepare_wait(hdev); 19886988eb2aSSalil Mehta } 19896988eb2aSSalil Mehta 19901cc9bc6eSHuazhong Tan static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 19911cc9bc6eSHuazhong Tan { 19921cc9bc6eSHuazhong Tan int ret; 19931cc9bc6eSHuazhong Tan 1994c88a6e7dSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt++; 1995fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UNINIT_CLIENT); 1996fe735c84SHuazhong Tan if (ret) 1997fe735c84SHuazhong Tan return ret; 1998c88a6e7dSHuazhong Tan 199929118ab9SHuazhong Tan rtnl_lock(); 20006988eb2aSSalil Mehta /* now, re-initialize the nic client and ae device */ 20016988eb2aSSalil Mehta ret = hclgevf_reset_stack(hdev); 20021cc9bc6eSHuazhong Tan rtnl_unlock(); 20036a5f6fa3SHuazhong Tan if (ret) { 20046988eb2aSSalil Mehta dev_err(&hdev->pdev->dev, "failed to reset VF stack\n"); 20051cc9bc6eSHuazhong Tan return ret; 20066a5f6fa3SHuazhong Tan } 20076988eb2aSSalil Mehta 2008fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_INIT_CLIENT); 2009fe735c84SHuazhong Tan /* ignore RoCE notify error if it fails HCLGEVF_RESET_MAX_FAIL_CNT - 1 2010fe735c84SHuazhong Tan * times 2011fe735c84SHuazhong Tan */ 2012fe735c84SHuazhong Tan if (ret && 2013fe735c84SHuazhong Tan hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT - 1) 2014fe735c84SHuazhong Tan return ret; 2015fe735c84SHuazhong Tan 2016fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UP_CLIENT); 2017fe735c84SHuazhong Tan if (ret) 2018fe735c84SHuazhong Tan return ret; 2019fe735c84SHuazhong Tan 2020b644a8d4SHuazhong Tan hdev->last_reset_time = jiffies; 2021c88a6e7dSHuazhong Tan hdev->rst_stats.rst_done_cnt++; 2022bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt = 0; 2023d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2024b644a8d4SHuazhong Tan 20251cc9bc6eSHuazhong Tan return 0; 20261cc9bc6eSHuazhong Tan } 20271cc9bc6eSHuazhong Tan 20281cc9bc6eSHuazhong Tan static void hclgevf_reset(struct hclgevf_dev *hdev) 20291cc9bc6eSHuazhong Tan { 20301cc9bc6eSHuazhong Tan if (hclgevf_reset_prepare(hdev)) 20311cc9bc6eSHuazhong Tan goto err_reset; 20321cc9bc6eSHuazhong Tan 20331cc9bc6eSHuazhong Tan /* check if VF could successfully fetch the hardware reset completion 20341cc9bc6eSHuazhong Tan * status from the hardware 20351cc9bc6eSHuazhong Tan */ 20361cc9bc6eSHuazhong Tan if (hclgevf_reset_wait(hdev)) { 20371cc9bc6eSHuazhong Tan /* can't do much in this situation, will disable VF */ 20381cc9bc6eSHuazhong Tan dev_err(&hdev->pdev->dev, 20391cc9bc6eSHuazhong Tan "failed to fetch H/W reset completion status\n"); 20401cc9bc6eSHuazhong Tan goto err_reset; 20411cc9bc6eSHuazhong Tan } 20421cc9bc6eSHuazhong Tan 20431cc9bc6eSHuazhong Tan if (hclgevf_reset_rebuild(hdev)) 20441cc9bc6eSHuazhong Tan goto err_reset; 20451cc9bc6eSHuazhong Tan 20461cc9bc6eSHuazhong Tan return; 20471cc9bc6eSHuazhong Tan 20486a5f6fa3SHuazhong Tan err_reset: 2049bbe6540eSHuazhong Tan hclgevf_reset_err_handle(hdev); 20506988eb2aSSalil Mehta } 20516988eb2aSSalil Mehta 2052720bd583SHuazhong Tan static enum hnae3_reset_type hclgevf_get_reset_level(struct hclgevf_dev *hdev, 2053720bd583SHuazhong Tan unsigned long *addr) 2054720bd583SHuazhong Tan { 2055720bd583SHuazhong Tan enum hnae3_reset_type rst_level = HNAE3_NONE_RESET; 2056720bd583SHuazhong Tan 2057dea846e8SHuazhong Tan /* return the highest priority reset level amongst all */ 2058b90fcc5bSHuazhong Tan if (test_bit(HNAE3_VF_RESET, addr)) { 2059b90fcc5bSHuazhong Tan rst_level = HNAE3_VF_RESET; 2060b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_RESET, addr); 2061b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2062b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2063b90fcc5bSHuazhong Tan } else if (test_bit(HNAE3_VF_FULL_RESET, addr)) { 2064dea846e8SHuazhong Tan rst_level = HNAE3_VF_FULL_RESET; 2065dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FULL_RESET, addr); 2066dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2067aa5c4f17SHuazhong Tan } else if (test_bit(HNAE3_VF_PF_FUNC_RESET, addr)) { 2068aa5c4f17SHuazhong Tan rst_level = HNAE3_VF_PF_FUNC_RESET; 2069aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2070aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2071dea846e8SHuazhong Tan } else if (test_bit(HNAE3_VF_FUNC_RESET, addr)) { 2072dea846e8SHuazhong Tan rst_level = HNAE3_VF_FUNC_RESET; 2073dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 20746ff3cf07SHuazhong Tan } else if (test_bit(HNAE3_FLR_RESET, addr)) { 20756ff3cf07SHuazhong Tan rst_level = HNAE3_FLR_RESET; 20766ff3cf07SHuazhong Tan clear_bit(HNAE3_FLR_RESET, addr); 2077720bd583SHuazhong Tan } 2078720bd583SHuazhong Tan 2079720bd583SHuazhong Tan return rst_level; 2080720bd583SHuazhong Tan } 2081720bd583SHuazhong Tan 20826ae4e733SShiju Jose static void hclgevf_reset_event(struct pci_dev *pdev, 20836ae4e733SShiju Jose struct hnae3_handle *handle) 20846d4c3981SSalil Mehta { 20856ff3cf07SHuazhong Tan struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); 20866ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 20876d4c3981SSalil Mehta 20886d4c3981SSalil Mehta dev_info(&hdev->pdev->dev, "received reset request from VF enet\n"); 20896d4c3981SSalil Mehta 20906ff3cf07SHuazhong Tan if (hdev->default_reset_request) 20910742ed7cSHuazhong Tan hdev->reset_level = 2092720bd583SHuazhong Tan hclgevf_get_reset_level(hdev, 2093720bd583SHuazhong Tan &hdev->default_reset_request); 2094720bd583SHuazhong Tan else 2095dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 20966d4c3981SSalil Mehta 2097436667d2SSalil Mehta /* reset of this VF requested */ 2098436667d2SSalil Mehta set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state); 2099436667d2SSalil Mehta hclgevf_reset_task_schedule(hdev); 21006d4c3981SSalil Mehta 21010742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 21026d4c3981SSalil Mehta } 21036d4c3981SSalil Mehta 2104720bd583SHuazhong Tan static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev, 2105720bd583SHuazhong Tan enum hnae3_reset_type rst_type) 2106720bd583SHuazhong Tan { 2107720bd583SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2108720bd583SHuazhong Tan 2109720bd583SHuazhong Tan set_bit(rst_type, &hdev->default_reset_request); 2110720bd583SHuazhong Tan } 2111720bd583SHuazhong Tan 2112f28368bbSHuazhong Tan static void hclgevf_enable_vector(struct hclgevf_misc_vector *vector, bool en) 2113f28368bbSHuazhong Tan { 2114f28368bbSHuazhong Tan writel(en ? 1 : 0, vector->addr); 2115f28368bbSHuazhong Tan } 2116f28368bbSHuazhong Tan 2117bb1890d5SJiaran Zhang static void hclgevf_reset_prepare_general(struct hnae3_ae_dev *ae_dev, 2118bb1890d5SJiaran Zhang enum hnae3_reset_type rst_type) 21196ff3cf07SHuazhong Tan { 2120bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_WAIT_MS 500 2121bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_CNT 5 2122f28368bbSHuazhong Tan 21236ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2124f28368bbSHuazhong Tan int retry_cnt = 0; 2125f28368bbSHuazhong Tan int ret; 21266ff3cf07SHuazhong Tan 2127f28368bbSHuazhong Tan retry: 2128f28368bbSHuazhong Tan down(&hdev->reset_sem); 2129f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2130bb1890d5SJiaran Zhang hdev->reset_type = rst_type; 2131f28368bbSHuazhong Tan ret = hclgevf_reset_prepare(hdev); 2132f28368bbSHuazhong Tan if (ret) { 2133bb1890d5SJiaran Zhang dev_err(&hdev->pdev->dev, "fail to prepare to reset, ret=%d\n", 2134f28368bbSHuazhong Tan ret); 2135f28368bbSHuazhong Tan if (hdev->reset_pending || 2136bb1890d5SJiaran Zhang retry_cnt++ < HCLGEVF_RESET_RETRY_CNT) { 21376ff3cf07SHuazhong Tan dev_err(&hdev->pdev->dev, 2138f28368bbSHuazhong Tan "reset_pending:0x%lx, retry_cnt:%d\n", 2139f28368bbSHuazhong Tan hdev->reset_pending, retry_cnt); 2140f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2141f28368bbSHuazhong Tan up(&hdev->reset_sem); 2142bb1890d5SJiaran Zhang msleep(HCLGEVF_RESET_RETRY_WAIT_MS); 2143f28368bbSHuazhong Tan goto retry; 2144f28368bbSHuazhong Tan } 2145f28368bbSHuazhong Tan } 2146f28368bbSHuazhong Tan 2147bb1890d5SJiaran Zhang /* disable misc vector before reset done */ 2148f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, false); 2149bb1890d5SJiaran Zhang 2150bb1890d5SJiaran Zhang if (hdev->reset_type == HNAE3_FLR_RESET) 2151f28368bbSHuazhong Tan hdev->rst_stats.flr_rst_cnt++; 2152f28368bbSHuazhong Tan } 2153f28368bbSHuazhong Tan 2154bb1890d5SJiaran Zhang static void hclgevf_reset_done(struct hnae3_ae_dev *ae_dev) 2155f28368bbSHuazhong Tan { 2156f28368bbSHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2157f28368bbSHuazhong Tan int ret; 2158f28368bbSHuazhong Tan 2159f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, true); 2160f28368bbSHuazhong Tan 2161f28368bbSHuazhong Tan ret = hclgevf_reset_rebuild(hdev); 2162f28368bbSHuazhong Tan if (ret) 2163f28368bbSHuazhong Tan dev_warn(&hdev->pdev->dev, "fail to rebuild, ret=%d\n", 2164f28368bbSHuazhong Tan ret); 2165f28368bbSHuazhong Tan 2166f28368bbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 2167f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2168f28368bbSHuazhong Tan up(&hdev->reset_sem); 21696ff3cf07SHuazhong Tan } 21706ff3cf07SHuazhong Tan 2171e2cb1decSSalil Mehta static u32 hclgevf_get_fw_version(struct hnae3_handle *handle) 2172e2cb1decSSalil Mehta { 2173e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2174e2cb1decSSalil Mehta 2175e2cb1decSSalil Mehta return hdev->fw_version; 2176e2cb1decSSalil Mehta } 2177e2cb1decSSalil Mehta 2178e2cb1decSSalil Mehta static void hclgevf_get_misc_vector(struct hclgevf_dev *hdev) 2179e2cb1decSSalil Mehta { 2180e2cb1decSSalil Mehta struct hclgevf_misc_vector *vector = &hdev->misc_vector; 2181e2cb1decSSalil Mehta 2182e2cb1decSSalil Mehta vector->vector_irq = pci_irq_vector(hdev->pdev, 2183e2cb1decSSalil Mehta HCLGEVF_MISC_VECTOR_NUM); 2184e2cb1decSSalil Mehta vector->addr = hdev->hw.io_base + HCLGEVF_MISC_VECTOR_REG_BASE; 2185e2cb1decSSalil Mehta /* vector status always valid for Vector 0 */ 2186e2cb1decSSalil Mehta hdev->vector_status[HCLGEVF_MISC_VECTOR_NUM] = 0; 2187e2cb1decSSalil Mehta hdev->vector_irq[HCLGEVF_MISC_VECTOR_NUM] = vector->vector_irq; 2188e2cb1decSSalil Mehta 2189e2cb1decSSalil Mehta hdev->num_msi_left -= 1; 2190e2cb1decSSalil Mehta hdev->num_msi_used += 1; 2191e2cb1decSSalil Mehta } 2192e2cb1decSSalil Mehta 219335a1e503SSalil Mehta void hclgevf_reset_task_schedule(struct hclgevf_dev *hdev) 219435a1e503SSalil Mehta { 2195ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2196ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, 2197ff200099SYunsheng Lin &hdev->state)) 21980ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 219935a1e503SSalil Mehta } 220035a1e503SSalil Mehta 220107a0556aSSalil Mehta void hclgevf_mbx_task_schedule(struct hclgevf_dev *hdev) 2202e2cb1decSSalil Mehta { 2203ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2204ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, 2205ff200099SYunsheng Lin &hdev->state)) 22060ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 220707a0556aSSalil Mehta } 2208e2cb1decSSalil Mehta 2209ff200099SYunsheng Lin static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 2210ff200099SYunsheng Lin unsigned long delay) 2211e2cb1decSSalil Mehta { 2212d5432455SGuojia Liao if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2213d5432455SGuojia Liao !test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 22140ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, delay); 2215e2cb1decSSalil Mehta } 2216e2cb1decSSalil Mehta 2217ff200099SYunsheng Lin static void hclgevf_reset_service_task(struct hclgevf_dev *hdev) 221835a1e503SSalil Mehta { 2219d6ad7c53SGuojia Liao #define HCLGEVF_MAX_RESET_ATTEMPTS_CNT 3 2220d6ad7c53SGuojia Liao 2221ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state)) 2222ff200099SYunsheng Lin return; 2223ff200099SYunsheng Lin 2224f28368bbSHuazhong Tan down(&hdev->reset_sem); 2225f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 222635a1e503SSalil Mehta 2227436667d2SSalil Mehta if (test_and_clear_bit(HCLGEVF_RESET_PENDING, 2228436667d2SSalil Mehta &hdev->reset_state)) { 2229cd7e963dSSalil Mehta /* PF has intimated that it is about to reset the hardware. 22309b2f3477SWeihang Li * We now have to poll & check if hardware has actually 22319b2f3477SWeihang Li * completed the reset sequence. On hardware reset completion, 22329b2f3477SWeihang Li * VF needs to reset the client and ae device. 223335a1e503SSalil Mehta */ 2234436667d2SSalil Mehta hdev->reset_attempts = 0; 2235436667d2SSalil Mehta 2236dea846e8SHuazhong Tan hdev->last_reset_time = jiffies; 2237dea846e8SHuazhong Tan while ((hdev->reset_type = 2238dea846e8SHuazhong Tan hclgevf_get_reset_level(hdev, &hdev->reset_pending)) 22391cc9bc6eSHuazhong Tan != HNAE3_NONE_RESET) 22401cc9bc6eSHuazhong Tan hclgevf_reset(hdev); 2241436667d2SSalil Mehta } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED, 2242436667d2SSalil Mehta &hdev->reset_state)) { 2243436667d2SSalil Mehta /* we could be here when either of below happens: 22449b2f3477SWeihang Li * 1. reset was initiated due to watchdog timeout caused by 2245436667d2SSalil Mehta * a. IMP was earlier reset and our TX got choked down and 2246436667d2SSalil Mehta * which resulted in watchdog reacting and inducing VF 2247436667d2SSalil Mehta * reset. This also means our cmdq would be unreliable. 2248436667d2SSalil Mehta * b. problem in TX due to other lower layer(example link 2249436667d2SSalil Mehta * layer not functioning properly etc.) 2250436667d2SSalil Mehta * 2. VF reset might have been initiated due to some config 2251436667d2SSalil Mehta * change. 2252436667d2SSalil Mehta * 2253436667d2SSalil Mehta * NOTE: Theres no clear way to detect above cases than to react 2254436667d2SSalil Mehta * to the response of PF for this reset request. PF will ack the 2255436667d2SSalil Mehta * 1b and 2. cases but we will not get any intimation about 1a 2256436667d2SSalil Mehta * from PF as cmdq would be in unreliable state i.e. mailbox 2257436667d2SSalil Mehta * communication between PF and VF would be broken. 225846ee7350SGuojia Liao * 225946ee7350SGuojia Liao * if we are never geting into pending state it means either: 2260436667d2SSalil Mehta * 1. PF is not receiving our request which could be due to IMP 2261436667d2SSalil Mehta * reset 2262436667d2SSalil Mehta * 2. PF is screwed 2263436667d2SSalil Mehta * We cannot do much for 2. but to check first we can try reset 2264436667d2SSalil Mehta * our PCIe + stack and see if it alleviates the problem. 2265436667d2SSalil Mehta */ 2266d6ad7c53SGuojia Liao if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) { 2267436667d2SSalil Mehta /* prepare for full reset of stack + pcie interface */ 2268dea846e8SHuazhong Tan set_bit(HNAE3_VF_FULL_RESET, &hdev->reset_pending); 2269436667d2SSalil Mehta 2270436667d2SSalil Mehta /* "defer" schedule the reset task again */ 2271436667d2SSalil Mehta set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2272436667d2SSalil Mehta } else { 2273436667d2SSalil Mehta hdev->reset_attempts++; 2274436667d2SSalil Mehta 2275dea846e8SHuazhong Tan set_bit(hdev->reset_level, &hdev->reset_pending); 2276dea846e8SHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2277436667d2SSalil Mehta } 2278dea846e8SHuazhong Tan hclgevf_reset_task_schedule(hdev); 2279436667d2SSalil Mehta } 228035a1e503SSalil Mehta 2281afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 228235a1e503SSalil Mehta clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2283f28368bbSHuazhong Tan up(&hdev->reset_sem); 228435a1e503SSalil Mehta } 228535a1e503SSalil Mehta 2286ff200099SYunsheng Lin static void hclgevf_mailbox_service_task(struct hclgevf_dev *hdev) 2287e2cb1decSSalil Mehta { 2288ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state)) 2289ff200099SYunsheng Lin return; 2290e2cb1decSSalil Mehta 2291e2cb1decSSalil Mehta if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state)) 2292e2cb1decSSalil Mehta return; 2293e2cb1decSSalil Mehta 229407a0556aSSalil Mehta hclgevf_mbx_async_handler(hdev); 2295e2cb1decSSalil Mehta 2296e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2297e2cb1decSSalil Mehta } 2298e2cb1decSSalil Mehta 2299ff200099SYunsheng Lin static void hclgevf_keep_alive(struct hclgevf_dev *hdev) 2300a6d818e3SYunsheng Lin { 2301d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2302a6d818e3SYunsheng Lin int ret; 2303a6d818e3SYunsheng Lin 23041416d333SHuazhong Tan if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) 2305c59a85c0SJian Shen return; 2306c59a85c0SJian Shen 2307d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_KEEP_ALIVE, 0); 2308d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2309a6d818e3SYunsheng Lin if (ret) 2310a6d818e3SYunsheng Lin dev_err(&hdev->pdev->dev, 2311a6d818e3SYunsheng Lin "VF sends keep alive cmd failed(=%d)\n", ret); 2312a6d818e3SYunsheng Lin } 2313a6d818e3SYunsheng Lin 2314ff200099SYunsheng Lin static void hclgevf_periodic_service_task(struct hclgevf_dev *hdev) 2315e2cb1decSSalil Mehta { 2316ff200099SYunsheng Lin unsigned long delta = round_jiffies_relative(HZ); 2317ff200099SYunsheng Lin struct hnae3_handle *handle = &hdev->nic; 2318e2cb1decSSalil Mehta 2319e6394363SGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 2320e6394363SGuangbin Huang return; 2321e6394363SGuangbin Huang 2322ff200099SYunsheng Lin if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) { 2323ff200099SYunsheng Lin delta = jiffies - hdev->last_serv_processed; 2324db01afebSliuzhongzhu 2325ff200099SYunsheng Lin if (delta < round_jiffies_relative(HZ)) { 2326ff200099SYunsheng Lin delta = round_jiffies_relative(HZ) - delta; 2327ff200099SYunsheng Lin goto out; 2328db01afebSliuzhongzhu } 2329ff200099SYunsheng Lin } 2330ff200099SYunsheng Lin 2331ff200099SYunsheng Lin hdev->serv_processed_cnt++; 2332ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_KEEP_ALIVE_TASK_INTERVAL)) 2333ff200099SYunsheng Lin hclgevf_keep_alive(hdev); 2334ff200099SYunsheng Lin 2335ff200099SYunsheng Lin if (test_bit(HCLGEVF_STATE_DOWN, &hdev->state)) { 2336ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2337ff200099SYunsheng Lin goto out; 2338ff200099SYunsheng Lin } 2339ff200099SYunsheng Lin 2340ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_STATS_TIMER_INTERVAL)) 2341ff200099SYunsheng Lin hclgevf_tqps_update_stats(handle); 2342e2cb1decSSalil Mehta 234301305e16SGuangbin Huang /* VF does not need to request link status when this bit is set, because 234401305e16SGuangbin Huang * PF will push its link status to VFs when link status changed. 2345e2cb1decSSalil Mehta */ 234601305e16SGuangbin Huang if (!test_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state)) 2347e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2348e2cb1decSSalil Mehta 23499194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 23509194d18bSliuzhongzhu 2351fe4144d4SJian Shen hclgevf_sync_vlan_filter(hdev); 2352fe4144d4SJian Shen 2353ee4bcd3bSJian Shen hclgevf_sync_mac_table(hdev); 2354ee4bcd3bSJian Shen 2355c631c696SJian Shen hclgevf_sync_promisc_mode(hdev); 2356c631c696SJian Shen 2357ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2358436667d2SSalil Mehta 2359ff200099SYunsheng Lin out: 2360ff200099SYunsheng Lin hclgevf_task_schedule(hdev, delta); 2361ff200099SYunsheng Lin } 2362b3c3fe8eSYunsheng Lin 2363ff200099SYunsheng Lin static void hclgevf_service_task(struct work_struct *work) 2364ff200099SYunsheng Lin { 2365ff200099SYunsheng Lin struct hclgevf_dev *hdev = container_of(work, struct hclgevf_dev, 2366ff200099SYunsheng Lin service_task.work); 2367ff200099SYunsheng Lin 2368ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2369ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2370ff200099SYunsheng Lin hclgevf_periodic_service_task(hdev); 2371ff200099SYunsheng Lin 2372ff200099SYunsheng Lin /* Handle reset and mbx again in case periodical task delays the 2373ff200099SYunsheng Lin * handling by calling hclgevf_task_schedule() in 2374ff200099SYunsheng Lin * hclgevf_periodic_service_task() 2375ff200099SYunsheng Lin */ 2376ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2377ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2378e2cb1decSSalil Mehta } 2379e2cb1decSSalil Mehta 2380e2cb1decSSalil Mehta static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr) 2381e2cb1decSSalil Mehta { 2382e2cb1decSSalil Mehta hclgevf_write_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_SRC_REG, regclr); 2383e2cb1decSSalil Mehta } 2384e2cb1decSSalil Mehta 2385b90fcc5bSHuazhong Tan static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, 2386b90fcc5bSHuazhong Tan u32 *clearval) 2387e2cb1decSSalil Mehta { 238813050921SHuazhong Tan u32 val, cmdq_stat_reg, rst_ing_reg; 2389e2cb1decSSalil Mehta 2390e2cb1decSSalil Mehta /* fetch the events from their corresponding regs */ 239113050921SHuazhong Tan cmdq_stat_reg = hclgevf_read_dev(&hdev->hw, 23929cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG); 239313050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RST_INT_B) & cmdq_stat_reg) { 2394b90fcc5bSHuazhong Tan rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 2395b90fcc5bSHuazhong Tan dev_info(&hdev->pdev->dev, 2396b90fcc5bSHuazhong Tan "receive reset interrupt 0x%x!\n", rst_ing_reg); 2397b90fcc5bSHuazhong Tan set_bit(HNAE3_VF_RESET, &hdev->reset_pending); 2398b90fcc5bSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2399ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 240013050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RST_INT_B); 2401c88a6e7dSHuazhong Tan hdev->rst_stats.vf_rst_cnt++; 240272e2fb07SHuazhong Tan /* set up VF hardware reset status, its PF will clear 240372e2fb07SHuazhong Tan * this status when PF has initialized done. 240472e2fb07SHuazhong Tan */ 240572e2fb07SHuazhong Tan val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); 240672e2fb07SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, 240772e2fb07SHuazhong Tan val | HCLGEVF_VF_RST_ING_BIT); 2408b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_RST; 2409b90fcc5bSHuazhong Tan } 2410b90fcc5bSHuazhong Tan 2411e2cb1decSSalil Mehta /* check for vector0 mailbox(=CMDQ RX) event source */ 241213050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) { 241313050921SHuazhong Tan /* for revision 0x21, clearing interrupt is writing bit 0 241413050921SHuazhong Tan * to the clear register, writing bit 1 means to keep the 241513050921SHuazhong Tan * old value. 241613050921SHuazhong Tan * for revision 0x20, the clear register is a read & write 241713050921SHuazhong Tan * register, so we should just write 0 to the bit we are 241813050921SHuazhong Tan * handling, and keep other bits as cmdq_stat_reg. 241913050921SHuazhong Tan */ 2420295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) 242113050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 242213050921SHuazhong Tan else 242313050921SHuazhong Tan *clearval = cmdq_stat_reg & 242413050921SHuazhong Tan ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 242513050921SHuazhong Tan 2426b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_MBX; 2427e2cb1decSSalil Mehta } 2428e2cb1decSSalil Mehta 2429e45afb39SHuazhong Tan /* print other vector0 event source */ 2430e45afb39SHuazhong Tan dev_info(&hdev->pdev->dev, 2431e45afb39SHuazhong Tan "vector 0 interrupt from unknown source, cmdq_src = %#x\n", 2432e45afb39SHuazhong Tan cmdq_stat_reg); 2433e2cb1decSSalil Mehta 2434b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_OTHER; 2435e2cb1decSSalil Mehta } 2436e2cb1decSSalil Mehta 2437e2cb1decSSalil Mehta static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) 2438e2cb1decSSalil Mehta { 2439b90fcc5bSHuazhong Tan enum hclgevf_evt_cause event_cause; 2440e2cb1decSSalil Mehta struct hclgevf_dev *hdev = data; 2441e2cb1decSSalil Mehta u32 clearval; 2442e2cb1decSSalil Mehta 2443e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 2444b90fcc5bSHuazhong Tan event_cause = hclgevf_check_evt_cause(hdev, &clearval); 2445e2cb1decSSalil Mehta 2446b90fcc5bSHuazhong Tan switch (event_cause) { 2447b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_RST: 2448b90fcc5bSHuazhong Tan hclgevf_reset_task_schedule(hdev); 2449b90fcc5bSHuazhong Tan break; 2450b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_MBX: 245107a0556aSSalil Mehta hclgevf_mbx_handler(hdev); 2452b90fcc5bSHuazhong Tan break; 2453b90fcc5bSHuazhong Tan default: 2454b90fcc5bSHuazhong Tan break; 2455b90fcc5bSHuazhong Tan } 2456e2cb1decSSalil Mehta 2457b90fcc5bSHuazhong Tan if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) { 2458e2cb1decSSalil Mehta hclgevf_clear_event_cause(hdev, clearval); 2459e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2460b90fcc5bSHuazhong Tan } 2461e2cb1decSSalil Mehta 2462e2cb1decSSalil Mehta return IRQ_HANDLED; 2463e2cb1decSSalil Mehta } 2464e2cb1decSSalil Mehta 2465e2cb1decSSalil Mehta static int hclgevf_configure(struct hclgevf_dev *hdev) 2466e2cb1decSSalil Mehta { 2467e2cb1decSSalil Mehta int ret; 2468e2cb1decSSalil Mehta 246992f11ea1SJian Shen /* get current port based vlan state from PF */ 247092f11ea1SJian Shen ret = hclgevf_get_port_base_vlan_filter_state(hdev); 247192f11ea1SJian Shen if (ret) 247292f11ea1SJian Shen return ret; 247392f11ea1SJian Shen 2474e2cb1decSSalil Mehta /* get queue configuration from PF */ 24756cee6fc3SJian Shen ret = hclgevf_get_queue_info(hdev); 2476e2cb1decSSalil Mehta if (ret) 2477e2cb1decSSalil Mehta return ret; 2478c0425944SPeng Li 2479c0425944SPeng Li /* get queue depth info from PF */ 2480c0425944SPeng Li ret = hclgevf_get_queue_depth(hdev); 2481c0425944SPeng Li if (ret) 2482c0425944SPeng Li return ret; 2483c0425944SPeng Li 24849c3e7130Sliuzhongzhu ret = hclgevf_get_pf_media_type(hdev); 24859c3e7130Sliuzhongzhu if (ret) 24869c3e7130Sliuzhongzhu return ret; 24879c3e7130Sliuzhongzhu 2488e2cb1decSSalil Mehta /* get tc configuration from PF */ 2489e2cb1decSSalil Mehta return hclgevf_get_tc_info(hdev); 2490e2cb1decSSalil Mehta } 2491e2cb1decSSalil Mehta 24927a01c897SSalil Mehta static int hclgevf_alloc_hdev(struct hnae3_ae_dev *ae_dev) 24937a01c897SSalil Mehta { 24947a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 24951154bb26SPeng Li struct hclgevf_dev *hdev; 24967a01c897SSalil Mehta 24977a01c897SSalil Mehta hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL); 24987a01c897SSalil Mehta if (!hdev) 24997a01c897SSalil Mehta return -ENOMEM; 25007a01c897SSalil Mehta 25017a01c897SSalil Mehta hdev->pdev = pdev; 25027a01c897SSalil Mehta hdev->ae_dev = ae_dev; 25037a01c897SSalil Mehta ae_dev->priv = hdev; 25047a01c897SSalil Mehta 25057a01c897SSalil Mehta return 0; 25067a01c897SSalil Mehta } 25077a01c897SSalil Mehta 2508e2cb1decSSalil Mehta static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev) 2509e2cb1decSSalil Mehta { 2510e2cb1decSSalil Mehta struct hnae3_handle *roce = &hdev->roce; 2511e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 2512e2cb1decSSalil Mehta 251307acf909SJian Shen roce->rinfo.num_vectors = hdev->num_roce_msix; 2514e2cb1decSSalil Mehta 2515e2cb1decSSalil Mehta if (hdev->num_msi_left < roce->rinfo.num_vectors || 2516e2cb1decSSalil Mehta hdev->num_msi_left == 0) 2517e2cb1decSSalil Mehta return -EINVAL; 2518e2cb1decSSalil Mehta 251907acf909SJian Shen roce->rinfo.base_vector = hdev->roce_base_vector; 2520e2cb1decSSalil Mehta 2521e2cb1decSSalil Mehta roce->rinfo.netdev = nic->kinfo.netdev; 2522e2cb1decSSalil Mehta roce->rinfo.roce_io_base = hdev->hw.io_base; 252330ae7f8aSHuazhong Tan roce->rinfo.roce_mem_base = hdev->hw.mem_base; 2524e2cb1decSSalil Mehta 2525e2cb1decSSalil Mehta roce->pdev = nic->pdev; 2526e2cb1decSSalil Mehta roce->ae_algo = nic->ae_algo; 2527e2cb1decSSalil Mehta roce->numa_node_mask = nic->numa_node_mask; 2528e2cb1decSSalil Mehta 2529e2cb1decSSalil Mehta return 0; 2530e2cb1decSSalil Mehta } 2531e2cb1decSSalil Mehta 2532b26a6feaSPeng Li static int hclgevf_config_gro(struct hclgevf_dev *hdev, bool en) 2533b26a6feaSPeng Li { 2534b26a6feaSPeng Li struct hclgevf_cfg_gro_status_cmd *req; 2535b26a6feaSPeng Li struct hclgevf_desc desc; 2536b26a6feaSPeng Li int ret; 2537b26a6feaSPeng Li 2538b26a6feaSPeng Li if (!hnae3_dev_gro_supported(hdev)) 2539b26a6feaSPeng Li return 0; 2540b26a6feaSPeng Li 2541b26a6feaSPeng Li hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_GRO_GENERIC_CONFIG, 2542b26a6feaSPeng Li false); 2543b26a6feaSPeng Li req = (struct hclgevf_cfg_gro_status_cmd *)desc.data; 2544b26a6feaSPeng Li 2545fb9e44d6SHuazhong Tan req->gro_en = en ? 1 : 0; 2546b26a6feaSPeng Li 2547b26a6feaSPeng Li ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 2548b26a6feaSPeng Li if (ret) 2549b26a6feaSPeng Li dev_err(&hdev->pdev->dev, 2550b26a6feaSPeng Li "VF GRO hardware config cmd failed, ret = %d.\n", ret); 2551b26a6feaSPeng Li 2552b26a6feaSPeng Li return ret; 2553b26a6feaSPeng Li } 2554b26a6feaSPeng Li 255587ce161eSGuangbin Huang static int hclgevf_rss_init_cfg(struct hclgevf_dev *hdev) 2556e2cb1decSSalil Mehta { 255787ce161eSGuangbin Huang u16 rss_ind_tbl_size = hdev->ae_dev->dev_specs.rss_ind_tbl_size; 2558e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2559944de484SGuojia Liao struct hclgevf_rss_tuple_cfg *tuple_sets; 25604093d1a2SGuangbin Huang u32 i; 2561e2cb1decSSalil Mehta 2562944de484SGuojia Liao rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 25634093d1a2SGuangbin Huang rss_cfg->rss_size = hdev->nic.kinfo.rss_size; 2564944de484SGuojia Liao tuple_sets = &rss_cfg->rss_tuple_sets; 2565295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 256687ce161eSGuangbin Huang u8 *rss_ind_tbl; 256787ce161eSGuangbin Huang 2568472d7eceSJian Shen rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_SIMPLE; 256987ce161eSGuangbin Huang 257087ce161eSGuangbin Huang rss_ind_tbl = devm_kcalloc(&hdev->pdev->dev, rss_ind_tbl_size, 257187ce161eSGuangbin Huang sizeof(*rss_ind_tbl), GFP_KERNEL); 257287ce161eSGuangbin Huang if (!rss_ind_tbl) 257387ce161eSGuangbin Huang return -ENOMEM; 257487ce161eSGuangbin Huang 257587ce161eSGuangbin Huang rss_cfg->rss_indirection_tbl = rss_ind_tbl; 2576472d7eceSJian Shen memcpy(rss_cfg->rss_hash_key, hclgevf_hash_key, 2577374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 2578374ad291SJian Shen 2579944de484SGuojia Liao tuple_sets->ipv4_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2580944de484SGuojia Liao tuple_sets->ipv4_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2581944de484SGuojia Liao tuple_sets->ipv4_sctp_en = HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2582944de484SGuojia Liao tuple_sets->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2583944de484SGuojia Liao tuple_sets->ipv6_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2584944de484SGuojia Liao tuple_sets->ipv6_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2585ab6e32d2SJian Shen tuple_sets->ipv6_sctp_en = 2586ab6e32d2SJian Shen hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 ? 2587ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP_NO_PORT : 2588ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2589944de484SGuojia Liao tuple_sets->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2590374ad291SJian Shen } 2591374ad291SJian Shen 25929b2f3477SWeihang Li /* Initialize RSS indirect table */ 259387ce161eSGuangbin Huang for (i = 0; i < rss_ind_tbl_size; i++) 25944093d1a2SGuangbin Huang rss_cfg->rss_indirection_tbl[i] = i % rss_cfg->rss_size; 259587ce161eSGuangbin Huang 259687ce161eSGuangbin Huang return 0; 2597944de484SGuojia Liao } 2598944de484SGuojia Liao 2599944de484SGuojia Liao static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) 2600944de484SGuojia Liao { 2601944de484SGuojia Liao struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2602944de484SGuojia Liao int ret; 2603944de484SGuojia Liao 2604295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 2605944de484SGuojia Liao ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo, 2606944de484SGuojia Liao rss_cfg->rss_hash_key); 2607944de484SGuojia Liao if (ret) 2608944de484SGuojia Liao return ret; 2609944de484SGuojia Liao 2610944de484SGuojia Liao ret = hclgevf_set_rss_input_tuple(hdev, rss_cfg); 2611944de484SGuojia Liao if (ret) 2612944de484SGuojia Liao return ret; 2613944de484SGuojia Liao } 2614e2cb1decSSalil Mehta 2615e2cb1decSSalil Mehta ret = hclgevf_set_rss_indir_table(hdev); 2616e2cb1decSSalil Mehta if (ret) 2617e2cb1decSSalil Mehta return ret; 2618e2cb1decSSalil Mehta 26194093d1a2SGuangbin Huang return hclgevf_set_rss_tc_mode(hdev, rss_cfg->rss_size); 2620e2cb1decSSalil Mehta } 2621e2cb1decSSalil Mehta 2622e2cb1decSSalil Mehta static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev) 2623e2cb1decSSalil Mehta { 2624e2cb1decSSalil Mehta return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0, 2625e2cb1decSSalil Mehta false); 2626e2cb1decSSalil Mehta } 2627e2cb1decSSalil Mehta 2628ff200099SYunsheng Lin static void hclgevf_flush_link_update(struct hclgevf_dev *hdev) 2629ff200099SYunsheng Lin { 2630ff200099SYunsheng Lin #define HCLGEVF_FLUSH_LINK_TIMEOUT 100000 2631ff200099SYunsheng Lin 2632ff200099SYunsheng Lin unsigned long last = hdev->serv_processed_cnt; 2633ff200099SYunsheng Lin int i = 0; 2634ff200099SYunsheng Lin 2635ff200099SYunsheng Lin while (test_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state) && 2636ff200099SYunsheng Lin i++ < HCLGEVF_FLUSH_LINK_TIMEOUT && 2637ff200099SYunsheng Lin last == hdev->serv_processed_cnt) 2638ff200099SYunsheng Lin usleep_range(1, 1); 2639ff200099SYunsheng Lin } 2640ff200099SYunsheng Lin 26418cdb992fSJian Shen static void hclgevf_set_timer_task(struct hnae3_handle *handle, bool enable) 26428cdb992fSJian Shen { 26438cdb992fSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 26448cdb992fSJian Shen 26458cdb992fSJian Shen if (enable) { 2646ff200099SYunsheng Lin hclgevf_task_schedule(hdev, 0); 26478cdb992fSJian Shen } else { 2648b3c3fe8eSYunsheng Lin set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2649ff200099SYunsheng Lin 2650ff200099SYunsheng Lin /* flush memory to make sure DOWN is seen by service task */ 2651ff200099SYunsheng Lin smp_mb__before_atomic(); 2652ff200099SYunsheng Lin hclgevf_flush_link_update(hdev); 26538cdb992fSJian Shen } 26548cdb992fSJian Shen } 26558cdb992fSJian Shen 2656e2cb1decSSalil Mehta static int hclgevf_ae_start(struct hnae3_handle *handle) 2657e2cb1decSSalil Mehta { 2658e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2659e2cb1decSSalil Mehta 2660ed7bedd2SGuangbin Huang clear_bit(HCLGEVF_STATE_DOWN, &hdev->state); 266101305e16SGuangbin Huang clear_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state); 2662ed7bedd2SGuangbin Huang 2663e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 2664e2cb1decSSalil Mehta 2665e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2666e2cb1decSSalil Mehta 26679194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 26689194d18bSliuzhongzhu 2669e2cb1decSSalil Mehta return 0; 2670e2cb1decSSalil Mehta } 2671e2cb1decSSalil Mehta 2672e2cb1decSSalil Mehta static void hclgevf_ae_stop(struct hnae3_handle *handle) 2673e2cb1decSSalil Mehta { 2674e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2675e2cb1decSSalil Mehta 26762f7e4896SFuyun Liang set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 26772f7e4896SFuyun Liang 2678146e92c1SHuazhong Tan if (hdev->reset_type != HNAE3_VF_RESET) 26798fa86551SYufeng Mo hclgevf_reset_tqp(handle); 268039cfbc9cSHuazhong Tan 2681e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 26828cc6c1f7SFuyun Liang hclgevf_update_link_status(hdev, 0); 2683e2cb1decSSalil Mehta } 2684e2cb1decSSalil Mehta 2685a6d818e3SYunsheng Lin static int hclgevf_set_alive(struct hnae3_handle *handle, bool alive) 2686a6d818e3SYunsheng Lin { 2687d3410018SYufeng Mo #define HCLGEVF_STATE_ALIVE 1 2688d3410018SYufeng Mo #define HCLGEVF_STATE_NOT_ALIVE 0 2689a6d818e3SYunsheng Lin 2690d3410018SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2691d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2692d3410018SYufeng Mo 2693d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_ALIVE, 0); 2694d3410018SYufeng Mo send_msg.data[0] = alive ? HCLGEVF_STATE_ALIVE : 2695d3410018SYufeng Mo HCLGEVF_STATE_NOT_ALIVE; 2696d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2697a6d818e3SYunsheng Lin } 2698a6d818e3SYunsheng Lin 2699a6d818e3SYunsheng Lin static int hclgevf_client_start(struct hnae3_handle *handle) 2700a6d818e3SYunsheng Lin { 2701f621df96SQinglang Miao return hclgevf_set_alive(handle, true); 2702a6d818e3SYunsheng Lin } 2703a6d818e3SYunsheng Lin 2704a6d818e3SYunsheng Lin static void hclgevf_client_stop(struct hnae3_handle *handle) 2705a6d818e3SYunsheng Lin { 2706a6d818e3SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2707a6d818e3SYunsheng Lin int ret; 2708a6d818e3SYunsheng Lin 2709a6d818e3SYunsheng Lin ret = hclgevf_set_alive(handle, false); 2710a6d818e3SYunsheng Lin if (ret) 2711a6d818e3SYunsheng Lin dev_warn(&hdev->pdev->dev, 2712a6d818e3SYunsheng Lin "%s failed %d\n", __func__, ret); 2713a6d818e3SYunsheng Lin } 2714a6d818e3SYunsheng Lin 2715e2cb1decSSalil Mehta static void hclgevf_state_init(struct hclgevf_dev *hdev) 2716e2cb1decSSalil Mehta { 2717e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state); 2718e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2719d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2720e2cb1decSSalil Mehta 2721b3c3fe8eSYunsheng Lin INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task); 272235a1e503SSalil Mehta 2723e2cb1decSSalil Mehta mutex_init(&hdev->mbx_resp.mbx_mutex); 2724f28368bbSHuazhong Tan sema_init(&hdev->reset_sem, 1); 2725e2cb1decSSalil Mehta 2726ee4bcd3bSJian Shen spin_lock_init(&hdev->mac_table.mac_list_lock); 2727ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.uc_mac_list); 2728ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.mc_mac_list); 2729ee4bcd3bSJian Shen 2730e2cb1decSSalil Mehta /* bring the device down */ 2731e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2732e2cb1decSSalil Mehta } 2733e2cb1decSSalil Mehta 2734e2cb1decSSalil Mehta static void hclgevf_state_uninit(struct hclgevf_dev *hdev) 2735e2cb1decSSalil Mehta { 2736e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2737acfc3d55SHuazhong Tan set_bit(HCLGEVF_STATE_REMOVING, &hdev->state); 2738e2cb1decSSalil Mehta 2739b3c3fe8eSYunsheng Lin if (hdev->service_task.work.func) 2740b3c3fe8eSYunsheng Lin cancel_delayed_work_sync(&hdev->service_task); 2741e2cb1decSSalil Mehta 2742e2cb1decSSalil Mehta mutex_destroy(&hdev->mbx_resp.mbx_mutex); 2743e2cb1decSSalil Mehta } 2744e2cb1decSSalil Mehta 2745e2cb1decSSalil Mehta static int hclgevf_init_msi(struct hclgevf_dev *hdev) 2746e2cb1decSSalil Mehta { 2747e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2748e2cb1decSSalil Mehta int vectors; 2749e2cb1decSSalil Mehta int i; 2750e2cb1decSSalil Mehta 2751580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) 275207acf909SJian Shen vectors = pci_alloc_irq_vectors(pdev, 275307acf909SJian Shen hdev->roce_base_msix_offset + 1, 275407acf909SJian Shen hdev->num_msi, 275507acf909SJian Shen PCI_IRQ_MSIX); 275607acf909SJian Shen else 2757580a05f9SYonglong Liu vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM, 2758580a05f9SYonglong Liu hdev->num_msi, 2759e2cb1decSSalil Mehta PCI_IRQ_MSI | PCI_IRQ_MSIX); 276007acf909SJian Shen 2761e2cb1decSSalil Mehta if (vectors < 0) { 2762e2cb1decSSalil Mehta dev_err(&pdev->dev, 2763e2cb1decSSalil Mehta "failed(%d) to allocate MSI/MSI-X vectors\n", 2764e2cb1decSSalil Mehta vectors); 2765e2cb1decSSalil Mehta return vectors; 2766e2cb1decSSalil Mehta } 2767e2cb1decSSalil Mehta if (vectors < hdev->num_msi) 2768e2cb1decSSalil Mehta dev_warn(&hdev->pdev->dev, 2769adcf738bSGuojia Liao "requested %u MSI/MSI-X, but allocated %d MSI/MSI-X\n", 2770e2cb1decSSalil Mehta hdev->num_msi, vectors); 2771e2cb1decSSalil Mehta 2772e2cb1decSSalil Mehta hdev->num_msi = vectors; 2773e2cb1decSSalil Mehta hdev->num_msi_left = vectors; 2774580a05f9SYonglong Liu 2775e2cb1decSSalil Mehta hdev->base_msi_vector = pdev->irq; 277607acf909SJian Shen hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset; 2777e2cb1decSSalil Mehta 2778e2cb1decSSalil Mehta hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi, 2779e2cb1decSSalil Mehta sizeof(u16), GFP_KERNEL); 2780e2cb1decSSalil Mehta if (!hdev->vector_status) { 2781e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2782e2cb1decSSalil Mehta return -ENOMEM; 2783e2cb1decSSalil Mehta } 2784e2cb1decSSalil Mehta 2785e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 2786e2cb1decSSalil Mehta hdev->vector_status[i] = HCLGEVF_INVALID_VPORT; 2787e2cb1decSSalil Mehta 2788e2cb1decSSalil Mehta hdev->vector_irq = devm_kcalloc(&pdev->dev, hdev->num_msi, 2789e2cb1decSSalil Mehta sizeof(int), GFP_KERNEL); 2790e2cb1decSSalil Mehta if (!hdev->vector_irq) { 2791862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2792e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2793e2cb1decSSalil Mehta return -ENOMEM; 2794e2cb1decSSalil Mehta } 2795e2cb1decSSalil Mehta 2796e2cb1decSSalil Mehta return 0; 2797e2cb1decSSalil Mehta } 2798e2cb1decSSalil Mehta 2799e2cb1decSSalil Mehta static void hclgevf_uninit_msi(struct hclgevf_dev *hdev) 2800e2cb1decSSalil Mehta { 2801e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2802e2cb1decSSalil Mehta 2803862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2804862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_irq); 2805e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2806e2cb1decSSalil Mehta } 2807e2cb1decSSalil Mehta 2808e2cb1decSSalil Mehta static int hclgevf_misc_irq_init(struct hclgevf_dev *hdev) 2809e2cb1decSSalil Mehta { 2810cdd332acSGuojia Liao int ret; 2811e2cb1decSSalil Mehta 2812e2cb1decSSalil Mehta hclgevf_get_misc_vector(hdev); 2813e2cb1decSSalil Mehta 2814f97c4d82SYonglong Liu snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s", 2815f97c4d82SYonglong Liu HCLGEVF_NAME, pci_name(hdev->pdev)); 2816e2cb1decSSalil Mehta ret = request_irq(hdev->misc_vector.vector_irq, hclgevf_misc_irq_handle, 2817f97c4d82SYonglong Liu 0, hdev->misc_vector.name, hdev); 2818e2cb1decSSalil Mehta if (ret) { 2819e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF failed to request misc irq(%d)\n", 2820e2cb1decSSalil Mehta hdev->misc_vector.vector_irq); 2821e2cb1decSSalil Mehta return ret; 2822e2cb1decSSalil Mehta } 2823e2cb1decSSalil Mehta 28241819e409SXi Wang hclgevf_clear_event_cause(hdev, 0); 28251819e409SXi Wang 2826e2cb1decSSalil Mehta /* enable misc. vector(vector 0) */ 2827e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2828e2cb1decSSalil Mehta 2829e2cb1decSSalil Mehta return ret; 2830e2cb1decSSalil Mehta } 2831e2cb1decSSalil Mehta 2832e2cb1decSSalil Mehta static void hclgevf_misc_irq_uninit(struct hclgevf_dev *hdev) 2833e2cb1decSSalil Mehta { 2834e2cb1decSSalil Mehta /* disable misc vector(vector 0) */ 2835e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 28361819e409SXi Wang synchronize_irq(hdev->misc_vector.vector_irq); 2837e2cb1decSSalil Mehta free_irq(hdev->misc_vector.vector_irq, hdev); 2838e2cb1decSSalil Mehta hclgevf_free_vector(hdev, 0); 2839e2cb1decSSalil Mehta } 2840e2cb1decSSalil Mehta 2841bb87be87SYonglong Liu static void hclgevf_info_show(struct hclgevf_dev *hdev) 2842bb87be87SYonglong Liu { 2843bb87be87SYonglong Liu struct device *dev = &hdev->pdev->dev; 2844bb87be87SYonglong Liu 2845bb87be87SYonglong Liu dev_info(dev, "VF info begin:\n"); 2846bb87be87SYonglong Liu 2847adcf738bSGuojia Liao dev_info(dev, "Task queue pairs numbers: %u\n", hdev->num_tqps); 2848adcf738bSGuojia Liao dev_info(dev, "Desc num per TX queue: %u\n", hdev->num_tx_desc); 2849adcf738bSGuojia Liao dev_info(dev, "Desc num per RX queue: %u\n", hdev->num_rx_desc); 2850adcf738bSGuojia Liao dev_info(dev, "Numbers of vports: %u\n", hdev->num_alloc_vport); 2851adcf738bSGuojia Liao dev_info(dev, "HW tc map: 0x%x\n", hdev->hw_tc_map); 2852adcf738bSGuojia Liao dev_info(dev, "PF media type of this VF: %u\n", 2853bb87be87SYonglong Liu hdev->hw.mac.media_type); 2854bb87be87SYonglong Liu 2855bb87be87SYonglong Liu dev_info(dev, "VF info end.\n"); 2856bb87be87SYonglong Liu } 2857bb87be87SYonglong Liu 28581db58f86SHuazhong Tan static int hclgevf_init_nic_client_instance(struct hnae3_ae_dev *ae_dev, 28591db58f86SHuazhong Tan struct hnae3_client *client) 28601db58f86SHuazhong Tan { 28611db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 28624cd5beaaSGuangbin Huang int rst_cnt = hdev->rst_stats.rst_cnt; 28631db58f86SHuazhong Tan int ret; 28641db58f86SHuazhong Tan 28651db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->nic); 28661db58f86SHuazhong Tan if (ret) 28671db58f86SHuazhong Tan return ret; 28681db58f86SHuazhong Tan 28691db58f86SHuazhong Tan set_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 28704cd5beaaSGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 28714cd5beaaSGuangbin Huang rst_cnt != hdev->rst_stats.rst_cnt) { 28724cd5beaaSGuangbin Huang clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 28734cd5beaaSGuangbin Huang 28744cd5beaaSGuangbin Huang client->ops->uninit_instance(&hdev->nic, 0); 28754cd5beaaSGuangbin Huang return -EBUSY; 28764cd5beaaSGuangbin Huang } 28774cd5beaaSGuangbin Huang 28781db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 28791db58f86SHuazhong Tan 28801db58f86SHuazhong Tan if (netif_msg_drv(&hdev->nic)) 28811db58f86SHuazhong Tan hclgevf_info_show(hdev); 28821db58f86SHuazhong Tan 28831db58f86SHuazhong Tan return 0; 28841db58f86SHuazhong Tan } 28851db58f86SHuazhong Tan 28861db58f86SHuazhong Tan static int hclgevf_init_roce_client_instance(struct hnae3_ae_dev *ae_dev, 28871db58f86SHuazhong Tan struct hnae3_client *client) 28881db58f86SHuazhong Tan { 28891db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 28901db58f86SHuazhong Tan int ret; 28911db58f86SHuazhong Tan 28921db58f86SHuazhong Tan if (!hnae3_dev_roce_supported(hdev) || !hdev->roce_client || 28931db58f86SHuazhong Tan !hdev->nic_client) 28941db58f86SHuazhong Tan return 0; 28951db58f86SHuazhong Tan 28961db58f86SHuazhong Tan ret = hclgevf_init_roce_base_info(hdev); 28971db58f86SHuazhong Tan if (ret) 28981db58f86SHuazhong Tan return ret; 28991db58f86SHuazhong Tan 29001db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->roce); 29011db58f86SHuazhong Tan if (ret) 29021db58f86SHuazhong Tan return ret; 29031db58f86SHuazhong Tan 2904fe735c84SHuazhong Tan set_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 29051db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 29061db58f86SHuazhong Tan 29071db58f86SHuazhong Tan return 0; 29081db58f86SHuazhong Tan } 29091db58f86SHuazhong Tan 2910e718a93fSPeng Li static int hclgevf_init_client_instance(struct hnae3_client *client, 2911e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2912e2cb1decSSalil Mehta { 2913e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2914e2cb1decSSalil Mehta int ret; 2915e2cb1decSSalil Mehta 2916e2cb1decSSalil Mehta switch (client->type) { 2917e2cb1decSSalil Mehta case HNAE3_CLIENT_KNIC: 2918e2cb1decSSalil Mehta hdev->nic_client = client; 2919e2cb1decSSalil Mehta hdev->nic.client = client; 2920e2cb1decSSalil Mehta 29211db58f86SHuazhong Tan ret = hclgevf_init_nic_client_instance(ae_dev, client); 2922e2cb1decSSalil Mehta if (ret) 292349dd8054SJian Shen goto clear_nic; 2924e2cb1decSSalil Mehta 29251db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, 29261db58f86SHuazhong Tan hdev->roce_client); 2927e2cb1decSSalil Mehta if (ret) 292849dd8054SJian Shen goto clear_roce; 2929d9f28fc2SJian Shen 2930e2cb1decSSalil Mehta break; 2931e2cb1decSSalil Mehta case HNAE3_CLIENT_ROCE: 2932544a7bcdSLijun Ou if (hnae3_dev_roce_supported(hdev)) { 2933e2cb1decSSalil Mehta hdev->roce_client = client; 2934e2cb1decSSalil Mehta hdev->roce.client = client; 2935544a7bcdSLijun Ou } 2936e2cb1decSSalil Mehta 29371db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, client); 2938e2cb1decSSalil Mehta if (ret) 293949dd8054SJian Shen goto clear_roce; 2940e2cb1decSSalil Mehta 2941fa7a4bd5SJian Shen break; 2942fa7a4bd5SJian Shen default: 2943fa7a4bd5SJian Shen return -EINVAL; 2944e2cb1decSSalil Mehta } 2945e2cb1decSSalil Mehta 2946e2cb1decSSalil Mehta return 0; 294749dd8054SJian Shen 294849dd8054SJian Shen clear_nic: 294949dd8054SJian Shen hdev->nic_client = NULL; 295049dd8054SJian Shen hdev->nic.client = NULL; 295149dd8054SJian Shen return ret; 295249dd8054SJian Shen clear_roce: 295349dd8054SJian Shen hdev->roce_client = NULL; 295449dd8054SJian Shen hdev->roce.client = NULL; 295549dd8054SJian Shen return ret; 2956e2cb1decSSalil Mehta } 2957e2cb1decSSalil Mehta 2958e718a93fSPeng Li static void hclgevf_uninit_client_instance(struct hnae3_client *client, 2959e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2960e2cb1decSSalil Mehta { 2961e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2962e718a93fSPeng Li 2963e2cb1decSSalil Mehta /* un-init roce, if it exists */ 296449dd8054SJian Shen if (hdev->roce_client) { 2965fe735c84SHuazhong Tan clear_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 2966e2cb1decSSalil Mehta hdev->roce_client->ops->uninit_instance(&hdev->roce, 0); 296749dd8054SJian Shen hdev->roce_client = NULL; 296849dd8054SJian Shen hdev->roce.client = NULL; 296949dd8054SJian Shen } 2970e2cb1decSSalil Mehta 2971e2cb1decSSalil Mehta /* un-init nic/unic, if this was not called by roce client */ 297249dd8054SJian Shen if (client->ops->uninit_instance && hdev->nic_client && 297349dd8054SJian Shen client->type != HNAE3_CLIENT_ROCE) { 297425d1817cSHuazhong Tan clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 297525d1817cSHuazhong Tan 2976e2cb1decSSalil Mehta client->ops->uninit_instance(&hdev->nic, 0); 297749dd8054SJian Shen hdev->nic_client = NULL; 297849dd8054SJian Shen hdev->nic.client = NULL; 297949dd8054SJian Shen } 2980e2cb1decSSalil Mehta } 2981e2cb1decSSalil Mehta 298230ae7f8aSHuazhong Tan static int hclgevf_dev_mem_map(struct hclgevf_dev *hdev) 298330ae7f8aSHuazhong Tan { 298430ae7f8aSHuazhong Tan #define HCLGEVF_MEM_BAR 4 298530ae7f8aSHuazhong Tan 298630ae7f8aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 298730ae7f8aSHuazhong Tan struct hclgevf_hw *hw = &hdev->hw; 298830ae7f8aSHuazhong Tan 298930ae7f8aSHuazhong Tan /* for device does not have device memory, return directly */ 299030ae7f8aSHuazhong Tan if (!(pci_select_bars(pdev, IORESOURCE_MEM) & BIT(HCLGEVF_MEM_BAR))) 299130ae7f8aSHuazhong Tan return 0; 299230ae7f8aSHuazhong Tan 299330ae7f8aSHuazhong Tan hw->mem_base = devm_ioremap_wc(&pdev->dev, 299430ae7f8aSHuazhong Tan pci_resource_start(pdev, 299530ae7f8aSHuazhong Tan HCLGEVF_MEM_BAR), 299630ae7f8aSHuazhong Tan pci_resource_len(pdev, HCLGEVF_MEM_BAR)); 299730ae7f8aSHuazhong Tan if (!hw->mem_base) { 2998be419fcaSColin Ian King dev_err(&pdev->dev, "failed to map device memory\n"); 299930ae7f8aSHuazhong Tan return -EFAULT; 300030ae7f8aSHuazhong Tan } 300130ae7f8aSHuazhong Tan 300230ae7f8aSHuazhong Tan return 0; 300330ae7f8aSHuazhong Tan } 300430ae7f8aSHuazhong Tan 3005e2cb1decSSalil Mehta static int hclgevf_pci_init(struct hclgevf_dev *hdev) 3006e2cb1decSSalil Mehta { 3007e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3008e2cb1decSSalil Mehta struct hclgevf_hw *hw; 3009e2cb1decSSalil Mehta int ret; 3010e2cb1decSSalil Mehta 3011e2cb1decSSalil Mehta ret = pci_enable_device(pdev); 3012e2cb1decSSalil Mehta if (ret) { 3013e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed to enable PCI device\n"); 30143e249d3bSFuyun Liang return ret; 3015e2cb1decSSalil Mehta } 3016e2cb1decSSalil Mehta 3017e2cb1decSSalil Mehta ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 3018e2cb1decSSalil Mehta if (ret) { 3019e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't set consistent PCI DMA, exiting"); 3020e2cb1decSSalil Mehta goto err_disable_device; 3021e2cb1decSSalil Mehta } 3022e2cb1decSSalil Mehta 3023e2cb1decSSalil Mehta ret = pci_request_regions(pdev, HCLGEVF_DRIVER_NAME); 3024e2cb1decSSalil Mehta if (ret) { 3025e2cb1decSSalil Mehta dev_err(&pdev->dev, "PCI request regions failed %d\n", ret); 3026e2cb1decSSalil Mehta goto err_disable_device; 3027e2cb1decSSalil Mehta } 3028e2cb1decSSalil Mehta 3029e2cb1decSSalil Mehta pci_set_master(pdev); 3030e2cb1decSSalil Mehta hw = &hdev->hw; 3031e2cb1decSSalil Mehta hw->hdev = hdev; 30322e1ea493SPeng Li hw->io_base = pci_iomap(pdev, 2, 0); 3033e2cb1decSSalil Mehta if (!hw->io_base) { 3034e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't map configuration register space\n"); 3035e2cb1decSSalil Mehta ret = -ENOMEM; 3036e2cb1decSSalil Mehta goto err_clr_master; 3037e2cb1decSSalil Mehta } 3038e2cb1decSSalil Mehta 303930ae7f8aSHuazhong Tan ret = hclgevf_dev_mem_map(hdev); 304030ae7f8aSHuazhong Tan if (ret) 304130ae7f8aSHuazhong Tan goto err_unmap_io_base; 304230ae7f8aSHuazhong Tan 3043e2cb1decSSalil Mehta return 0; 3044e2cb1decSSalil Mehta 304530ae7f8aSHuazhong Tan err_unmap_io_base: 304630ae7f8aSHuazhong Tan pci_iounmap(pdev, hdev->hw.io_base); 3047e2cb1decSSalil Mehta err_clr_master: 3048e2cb1decSSalil Mehta pci_clear_master(pdev); 3049e2cb1decSSalil Mehta pci_release_regions(pdev); 3050e2cb1decSSalil Mehta err_disable_device: 3051e2cb1decSSalil Mehta pci_disable_device(pdev); 30523e249d3bSFuyun Liang 3053e2cb1decSSalil Mehta return ret; 3054e2cb1decSSalil Mehta } 3055e2cb1decSSalil Mehta 3056e2cb1decSSalil Mehta static void hclgevf_pci_uninit(struct hclgevf_dev *hdev) 3057e2cb1decSSalil Mehta { 3058e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3059e2cb1decSSalil Mehta 306030ae7f8aSHuazhong Tan if (hdev->hw.mem_base) 306130ae7f8aSHuazhong Tan devm_iounmap(&pdev->dev, hdev->hw.mem_base); 306230ae7f8aSHuazhong Tan 3063e2cb1decSSalil Mehta pci_iounmap(pdev, hdev->hw.io_base); 3064e2cb1decSSalil Mehta pci_clear_master(pdev); 3065e2cb1decSSalil Mehta pci_release_regions(pdev); 3066e2cb1decSSalil Mehta pci_disable_device(pdev); 3067e2cb1decSSalil Mehta } 3068e2cb1decSSalil Mehta 306907acf909SJian Shen static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 307007acf909SJian Shen { 307107acf909SJian Shen struct hclgevf_query_res_cmd *req; 307207acf909SJian Shen struct hclgevf_desc desc; 307307acf909SJian Shen int ret; 307407acf909SJian Shen 307507acf909SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_VF_RSRC, true); 307607acf909SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 307707acf909SJian Shen if (ret) { 307807acf909SJian Shen dev_err(&hdev->pdev->dev, 307907acf909SJian Shen "query vf resource failed, ret = %d.\n", ret); 308007acf909SJian Shen return ret; 308107acf909SJian Shen } 308207acf909SJian Shen 308307acf909SJian Shen req = (struct hclgevf_query_res_cmd *)desc.data; 308407acf909SJian Shen 3085580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) { 308607acf909SJian Shen hdev->roce_base_msix_offset = 308760df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee), 308807acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_M, 308907acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_S); 309007acf909SJian Shen hdev->num_roce_msix = 309160df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 309207acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 309307acf909SJian Shen 3094580a05f9SYonglong Liu /* nic's msix numbers is always equals to the roce's. */ 3095580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_roce_msix; 3096580a05f9SYonglong Liu 309707acf909SJian Shen /* VF should have NIC vectors and Roce vectors, NIC vectors 309807acf909SJian Shen * are queued before Roce vectors. The offset is fixed to 64. 309907acf909SJian Shen */ 310007acf909SJian Shen hdev->num_msi = hdev->num_roce_msix + 310107acf909SJian Shen hdev->roce_base_msix_offset; 310207acf909SJian Shen } else { 310307acf909SJian Shen hdev->num_msi = 310460df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 310507acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 3106580a05f9SYonglong Liu 3107580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_msi; 3108580a05f9SYonglong Liu } 3109580a05f9SYonglong Liu 3110580a05f9SYonglong Liu if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) { 3111580a05f9SYonglong Liu dev_err(&hdev->pdev->dev, 3112580a05f9SYonglong Liu "Just %u msi resources, not enough for vf(min:2).\n", 3113580a05f9SYonglong Liu hdev->num_nic_msix); 3114580a05f9SYonglong Liu return -EINVAL; 311507acf909SJian Shen } 311607acf909SJian Shen 311707acf909SJian Shen return 0; 311807acf909SJian Shen } 311907acf909SJian Shen 3120af2aedc5SGuangbin Huang static void hclgevf_set_default_dev_specs(struct hclgevf_dev *hdev) 3121af2aedc5SGuangbin Huang { 3122af2aedc5SGuangbin Huang #define HCLGEVF_MAX_NON_TSO_BD_NUM 8U 3123af2aedc5SGuangbin Huang 3124af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3125af2aedc5SGuangbin Huang 3126af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = 3127af2aedc5SGuangbin Huang HCLGEVF_MAX_NON_TSO_BD_NUM; 3128af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 3129af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3130ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3131e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; 3132af2aedc5SGuangbin Huang } 3133af2aedc5SGuangbin Huang 3134af2aedc5SGuangbin Huang static void hclgevf_parse_dev_specs(struct hclgevf_dev *hdev, 3135af2aedc5SGuangbin Huang struct hclgevf_desc *desc) 3136af2aedc5SGuangbin Huang { 3137af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3138af2aedc5SGuangbin Huang struct hclgevf_dev_specs_0_cmd *req0; 3139ab16b49cSHuazhong Tan struct hclgevf_dev_specs_1_cmd *req1; 3140af2aedc5SGuangbin Huang 3141af2aedc5SGuangbin Huang req0 = (struct hclgevf_dev_specs_0_cmd *)desc[0].data; 3142ab16b49cSHuazhong Tan req1 = (struct hclgevf_dev_specs_1_cmd *)desc[1].data; 3143af2aedc5SGuangbin Huang 3144af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; 3145af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = 3146af2aedc5SGuangbin Huang le16_to_cpu(req0->rss_ind_tbl_size); 314791bfae25SHuazhong Tan ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); 3148af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size); 3149ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl); 3150e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size); 3151af2aedc5SGuangbin Huang } 3152af2aedc5SGuangbin Huang 315313297028SGuangbin Huang static void hclgevf_check_dev_specs(struct hclgevf_dev *hdev) 315413297028SGuangbin Huang { 315513297028SGuangbin Huang struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; 315613297028SGuangbin Huang 315713297028SGuangbin Huang if (!dev_specs->max_non_tso_bd_num) 315813297028SGuangbin Huang dev_specs->max_non_tso_bd_num = HCLGEVF_MAX_NON_TSO_BD_NUM; 315913297028SGuangbin Huang if (!dev_specs->rss_ind_tbl_size) 316013297028SGuangbin Huang dev_specs->rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 316113297028SGuangbin Huang if (!dev_specs->rss_key_size) 316213297028SGuangbin Huang dev_specs->rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3163ab16b49cSHuazhong Tan if (!dev_specs->max_int_gl) 3164ab16b49cSHuazhong Tan dev_specs->max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3165e070c8b9SYufeng Mo if (!dev_specs->max_frm_size) 3166e070c8b9SYufeng Mo dev_specs->max_frm_size = HCLGEVF_MAC_MAX_FRAME; 316713297028SGuangbin Huang } 316813297028SGuangbin Huang 3169af2aedc5SGuangbin Huang static int hclgevf_query_dev_specs(struct hclgevf_dev *hdev) 3170af2aedc5SGuangbin Huang { 3171af2aedc5SGuangbin Huang struct hclgevf_desc desc[HCLGEVF_QUERY_DEV_SPECS_BD_NUM]; 3172af2aedc5SGuangbin Huang int ret; 3173af2aedc5SGuangbin Huang int i; 3174af2aedc5SGuangbin Huang 3175af2aedc5SGuangbin Huang /* set default specifications as devices lower than version V3 do not 3176af2aedc5SGuangbin Huang * support querying specifications from firmware. 3177af2aedc5SGuangbin Huang */ 3178af2aedc5SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) { 3179af2aedc5SGuangbin Huang hclgevf_set_default_dev_specs(hdev); 3180af2aedc5SGuangbin Huang return 0; 3181af2aedc5SGuangbin Huang } 3182af2aedc5SGuangbin Huang 3183af2aedc5SGuangbin Huang for (i = 0; i < HCLGEVF_QUERY_DEV_SPECS_BD_NUM - 1; i++) { 3184af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], 3185af2aedc5SGuangbin Huang HCLGEVF_OPC_QUERY_DEV_SPECS, true); 3186af2aedc5SGuangbin Huang desc[i].flag |= cpu_to_le16(HCLGEVF_CMD_FLAG_NEXT); 3187af2aedc5SGuangbin Huang } 3188af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], HCLGEVF_OPC_QUERY_DEV_SPECS, 3189af2aedc5SGuangbin Huang true); 3190af2aedc5SGuangbin Huang 3191af2aedc5SGuangbin Huang ret = hclgevf_cmd_send(&hdev->hw, desc, HCLGEVF_QUERY_DEV_SPECS_BD_NUM); 3192af2aedc5SGuangbin Huang if (ret) 3193af2aedc5SGuangbin Huang return ret; 3194af2aedc5SGuangbin Huang 3195af2aedc5SGuangbin Huang hclgevf_parse_dev_specs(hdev, desc); 319613297028SGuangbin Huang hclgevf_check_dev_specs(hdev); 3197af2aedc5SGuangbin Huang 3198af2aedc5SGuangbin Huang return 0; 3199af2aedc5SGuangbin Huang } 3200af2aedc5SGuangbin Huang 3201862d969aSHuazhong Tan static int hclgevf_pci_reset(struct hclgevf_dev *hdev) 3202862d969aSHuazhong Tan { 3203862d969aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 3204862d969aSHuazhong Tan int ret = 0; 3205862d969aSHuazhong Tan 3206862d969aSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FULL_RESET && 3207862d969aSHuazhong Tan test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3208862d969aSHuazhong Tan hclgevf_misc_irq_uninit(hdev); 3209862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3210862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3211862d969aSHuazhong Tan } 3212862d969aSHuazhong Tan 3213862d969aSHuazhong Tan if (!test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3214862d969aSHuazhong Tan pci_set_master(pdev); 3215862d969aSHuazhong Tan ret = hclgevf_init_msi(hdev); 3216862d969aSHuazhong Tan if (ret) { 3217862d969aSHuazhong Tan dev_err(&pdev->dev, 3218862d969aSHuazhong Tan "failed(%d) to init MSI/MSI-X\n", ret); 3219862d969aSHuazhong Tan return ret; 3220862d969aSHuazhong Tan } 3221862d969aSHuazhong Tan 3222862d969aSHuazhong Tan ret = hclgevf_misc_irq_init(hdev); 3223862d969aSHuazhong Tan if (ret) { 3224862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3225862d969aSHuazhong Tan dev_err(&pdev->dev, "failed(%d) to init Misc IRQ(vector0)\n", 3226862d969aSHuazhong Tan ret); 3227862d969aSHuazhong Tan return ret; 3228862d969aSHuazhong Tan } 3229862d969aSHuazhong Tan 3230862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3231862d969aSHuazhong Tan } 3232862d969aSHuazhong Tan 3233862d969aSHuazhong Tan return ret; 3234862d969aSHuazhong Tan } 3235862d969aSHuazhong Tan 3236039ba863SJian Shen static int hclgevf_clear_vport_list(struct hclgevf_dev *hdev) 3237039ba863SJian Shen { 3238039ba863SJian Shen struct hclge_vf_to_pf_msg send_msg; 3239039ba863SJian Shen 3240039ba863SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_HANDLE_VF_TBL, 3241039ba863SJian Shen HCLGE_MBX_VPORT_LIST_CLEAR); 3242039ba863SJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3243039ba863SJian Shen } 3244039ba863SJian Shen 3245*79664077SHuazhong Tan static void hclgevf_init_rxd_adv_layout(struct hclgevf_dev *hdev) 3246*79664077SHuazhong Tan { 3247*79664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 3248*79664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 1); 3249*79664077SHuazhong Tan } 3250*79664077SHuazhong Tan 3251*79664077SHuazhong Tan static void hclgevf_uninit_rxd_adv_layout(struct hclgevf_dev *hdev) 3252*79664077SHuazhong Tan { 3253*79664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 3254*79664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 0); 3255*79664077SHuazhong Tan } 3256*79664077SHuazhong Tan 32579c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) 3258e2cb1decSSalil Mehta { 32597a01c897SSalil Mehta struct pci_dev *pdev = hdev->pdev; 3260e2cb1decSSalil Mehta int ret; 3261e2cb1decSSalil Mehta 3262862d969aSHuazhong Tan ret = hclgevf_pci_reset(hdev); 3263862d969aSHuazhong Tan if (ret) { 3264862d969aSHuazhong Tan dev_err(&pdev->dev, "pci reset failed %d\n", ret); 3265862d969aSHuazhong Tan return ret; 3266862d969aSHuazhong Tan } 3267862d969aSHuazhong Tan 32689c6f7085SHuazhong Tan ret = hclgevf_cmd_init(hdev); 32699c6f7085SHuazhong Tan if (ret) { 32709c6f7085SHuazhong Tan dev_err(&pdev->dev, "cmd failed %d\n", ret); 32719c6f7085SHuazhong Tan return ret; 32727a01c897SSalil Mehta } 3273e2cb1decSSalil Mehta 32749c6f7085SHuazhong Tan ret = hclgevf_rss_init_hw(hdev); 32759c6f7085SHuazhong Tan if (ret) { 32769c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 32779c6f7085SHuazhong Tan "failed(%d) to initialize RSS\n", ret); 32789c6f7085SHuazhong Tan return ret; 32799c6f7085SHuazhong Tan } 32809c6f7085SHuazhong Tan 3281b26a6feaSPeng Li ret = hclgevf_config_gro(hdev, true); 3282b26a6feaSPeng Li if (ret) 3283b26a6feaSPeng Li return ret; 3284b26a6feaSPeng Li 32859c6f7085SHuazhong Tan ret = hclgevf_init_vlan_config(hdev); 32869c6f7085SHuazhong Tan if (ret) { 32879c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 32889c6f7085SHuazhong Tan "failed(%d) to initialize VLAN config\n", ret); 32899c6f7085SHuazhong Tan return ret; 32909c6f7085SHuazhong Tan } 32919c6f7085SHuazhong Tan 3292c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 3293c631c696SJian Shen 3294*79664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 3295*79664077SHuazhong Tan 32969c6f7085SHuazhong Tan dev_info(&hdev->pdev->dev, "Reset done\n"); 32979c6f7085SHuazhong Tan 32989c6f7085SHuazhong Tan return 0; 32999c6f7085SHuazhong Tan } 33009c6f7085SHuazhong Tan 33019c6f7085SHuazhong Tan static int hclgevf_init_hdev(struct hclgevf_dev *hdev) 33029c6f7085SHuazhong Tan { 33039c6f7085SHuazhong Tan struct pci_dev *pdev = hdev->pdev; 33049c6f7085SHuazhong Tan int ret; 33059c6f7085SHuazhong Tan 3306e2cb1decSSalil Mehta ret = hclgevf_pci_init(hdev); 330760df7e91SHuazhong Tan if (ret) 3308e2cb1decSSalil Mehta return ret; 3309e2cb1decSSalil Mehta 33108b0195a3SHuazhong Tan ret = hclgevf_cmd_queue_init(hdev); 331160df7e91SHuazhong Tan if (ret) 33128b0195a3SHuazhong Tan goto err_cmd_queue_init; 33138b0195a3SHuazhong Tan 3314eddf0462SYunsheng Lin ret = hclgevf_cmd_init(hdev); 3315eddf0462SYunsheng Lin if (ret) 3316eddf0462SYunsheng Lin goto err_cmd_init; 3317eddf0462SYunsheng Lin 331807acf909SJian Shen /* Get vf resource */ 331907acf909SJian Shen ret = hclgevf_query_vf_resource(hdev); 332060df7e91SHuazhong Tan if (ret) 33218b0195a3SHuazhong Tan goto err_cmd_init; 332207acf909SJian Shen 3323af2aedc5SGuangbin Huang ret = hclgevf_query_dev_specs(hdev); 3324af2aedc5SGuangbin Huang if (ret) { 3325af2aedc5SGuangbin Huang dev_err(&pdev->dev, 3326af2aedc5SGuangbin Huang "failed to query dev specifications, ret = %d\n", ret); 3327af2aedc5SGuangbin Huang goto err_cmd_init; 3328af2aedc5SGuangbin Huang } 3329af2aedc5SGuangbin Huang 333007acf909SJian Shen ret = hclgevf_init_msi(hdev); 333107acf909SJian Shen if (ret) { 333207acf909SJian Shen dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret); 33338b0195a3SHuazhong Tan goto err_cmd_init; 333407acf909SJian Shen } 333507acf909SJian Shen 333607acf909SJian Shen hclgevf_state_init(hdev); 3337dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 3338afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 333907acf909SJian Shen 3340e2cb1decSSalil Mehta ret = hclgevf_misc_irq_init(hdev); 334160df7e91SHuazhong Tan if (ret) 3342e2cb1decSSalil Mehta goto err_misc_irq_init; 3343e2cb1decSSalil Mehta 3344862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3345862d969aSHuazhong Tan 3346e2cb1decSSalil Mehta ret = hclgevf_configure(hdev); 3347e2cb1decSSalil Mehta if (ret) { 3348e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to fetch configuration\n", ret); 3349e2cb1decSSalil Mehta goto err_config; 3350e2cb1decSSalil Mehta } 3351e2cb1decSSalil Mehta 3352e2cb1decSSalil Mehta ret = hclgevf_alloc_tqps(hdev); 3353e2cb1decSSalil Mehta if (ret) { 3354e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret); 3355e2cb1decSSalil Mehta goto err_config; 3356e2cb1decSSalil Mehta } 3357e2cb1decSSalil Mehta 3358e2cb1decSSalil Mehta ret = hclgevf_set_handle_info(hdev); 335960df7e91SHuazhong Tan if (ret) 3360e2cb1decSSalil Mehta goto err_config; 3361e2cb1decSSalil Mehta 3362b26a6feaSPeng Li ret = hclgevf_config_gro(hdev, true); 3363b26a6feaSPeng Li if (ret) 3364b26a6feaSPeng Li goto err_config; 3365b26a6feaSPeng Li 3366e2cb1decSSalil Mehta /* Initialize RSS for this VF */ 336787ce161eSGuangbin Huang ret = hclgevf_rss_init_cfg(hdev); 336887ce161eSGuangbin Huang if (ret) { 336987ce161eSGuangbin Huang dev_err(&pdev->dev, "failed to init rss cfg, ret = %d\n", ret); 337087ce161eSGuangbin Huang goto err_config; 337187ce161eSGuangbin Huang } 337287ce161eSGuangbin Huang 3373e2cb1decSSalil Mehta ret = hclgevf_rss_init_hw(hdev); 3374e2cb1decSSalil Mehta if (ret) { 3375e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3376e2cb1decSSalil Mehta "failed(%d) to initialize RSS\n", ret); 3377e2cb1decSSalil Mehta goto err_config; 3378e2cb1decSSalil Mehta } 3379e2cb1decSSalil Mehta 3380039ba863SJian Shen /* ensure vf tbl list as empty before init*/ 3381039ba863SJian Shen ret = hclgevf_clear_vport_list(hdev); 3382039ba863SJian Shen if (ret) { 3383039ba863SJian Shen dev_err(&pdev->dev, 3384039ba863SJian Shen "failed to clear tbl list configuration, ret = %d.\n", 3385039ba863SJian Shen ret); 3386039ba863SJian Shen goto err_config; 3387039ba863SJian Shen } 3388039ba863SJian Shen 3389e2cb1decSSalil Mehta ret = hclgevf_init_vlan_config(hdev); 3390e2cb1decSSalil Mehta if (ret) { 3391e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3392e2cb1decSSalil Mehta "failed(%d) to initialize VLAN config\n", ret); 3393e2cb1decSSalil Mehta goto err_config; 3394e2cb1decSSalil Mehta } 3395e2cb1decSSalil Mehta 3396*79664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 3397*79664077SHuazhong Tan 33980742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 339908d80a4cSHuazhong Tan dev_info(&hdev->pdev->dev, "finished initializing %s driver\n", 340008d80a4cSHuazhong Tan HCLGEVF_DRIVER_NAME); 3401e2cb1decSSalil Mehta 3402ff200099SYunsheng Lin hclgevf_task_schedule(hdev, round_jiffies_relative(HZ)); 3403ff200099SYunsheng Lin 3404e2cb1decSSalil Mehta return 0; 3405e2cb1decSSalil Mehta 3406e2cb1decSSalil Mehta err_config: 3407e2cb1decSSalil Mehta hclgevf_misc_irq_uninit(hdev); 3408e2cb1decSSalil Mehta err_misc_irq_init: 3409e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 3410e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 341107acf909SJian Shen err_cmd_init: 34128b0195a3SHuazhong Tan hclgevf_cmd_uninit(hdev); 34138b0195a3SHuazhong Tan err_cmd_queue_init: 3414e2cb1decSSalil Mehta hclgevf_pci_uninit(hdev); 3415862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3416e2cb1decSSalil Mehta return ret; 3417e2cb1decSSalil Mehta } 3418e2cb1decSSalil Mehta 34197a01c897SSalil Mehta static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev) 3420e2cb1decSSalil Mehta { 3421d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3422d3410018SYufeng Mo 3423e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 3424*79664077SHuazhong Tan hclgevf_uninit_rxd_adv_layout(hdev); 3425862d969aSHuazhong Tan 3426d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_VF_UNINIT, 0); 3427d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 342823b4201dSJian Shen 3429862d969aSHuazhong Tan if (test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3430eddf0462SYunsheng Lin hclgevf_misc_irq_uninit(hdev); 3431e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 34327a01c897SSalil Mehta } 34337a01c897SSalil Mehta 3434862d969aSHuazhong Tan hclgevf_cmd_uninit(hdev); 3435e3364c5fSZenghui Yu hclgevf_pci_uninit(hdev); 3436ee4bcd3bSJian Shen hclgevf_uninit_mac_list(hdev); 3437862d969aSHuazhong Tan } 3438862d969aSHuazhong Tan 34397a01c897SSalil Mehta static int hclgevf_init_ae_dev(struct hnae3_ae_dev *ae_dev) 34407a01c897SSalil Mehta { 34417a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 34427a01c897SSalil Mehta int ret; 34437a01c897SSalil Mehta 34447a01c897SSalil Mehta ret = hclgevf_alloc_hdev(ae_dev); 34457a01c897SSalil Mehta if (ret) { 34467a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device allocation failed\n"); 34477a01c897SSalil Mehta return ret; 34487a01c897SSalil Mehta } 34497a01c897SSalil Mehta 34507a01c897SSalil Mehta ret = hclgevf_init_hdev(ae_dev->priv); 3451a6d818e3SYunsheng Lin if (ret) { 34527a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device initialization failed\n"); 34537a01c897SSalil Mehta return ret; 34547a01c897SSalil Mehta } 34557a01c897SSalil Mehta 3456a6d818e3SYunsheng Lin return 0; 3457a6d818e3SYunsheng Lin } 3458a6d818e3SYunsheng Lin 34597a01c897SSalil Mehta static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) 34607a01c897SSalil Mehta { 34617a01c897SSalil Mehta struct hclgevf_dev *hdev = ae_dev->priv; 34627a01c897SSalil Mehta 34637a01c897SSalil Mehta hclgevf_uninit_hdev(hdev); 3464e2cb1decSSalil Mehta ae_dev->priv = NULL; 3465e2cb1decSSalil Mehta } 3466e2cb1decSSalil Mehta 3467849e4607SPeng Li static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev) 3468849e4607SPeng Li { 3469849e4607SPeng Li struct hnae3_handle *nic = &hdev->nic; 3470849e4607SPeng Li struct hnae3_knic_private_info *kinfo = &nic->kinfo; 3471849e4607SPeng Li 34728be73621SHuazhong Tan return min_t(u32, hdev->rss_size_max, 347335244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 3474849e4607SPeng Li } 3475849e4607SPeng Li 3476849e4607SPeng Li /** 3477849e4607SPeng Li * hclgevf_get_channels - Get the current channels enabled and max supported. 3478849e4607SPeng Li * @handle: hardware information for network interface 3479849e4607SPeng Li * @ch: ethtool channels structure 3480849e4607SPeng Li * 3481849e4607SPeng Li * We don't support separate tx and rx queues as channels. The other count 3482849e4607SPeng Li * represents how many queues are being used for control. max_combined counts 3483849e4607SPeng Li * how many queue pairs we can support. They may not be mapped 1 to 1 with 3484849e4607SPeng Li * q_vectors since we support a lot more queue pairs than q_vectors. 3485849e4607SPeng Li **/ 3486849e4607SPeng Li static void hclgevf_get_channels(struct hnae3_handle *handle, 3487849e4607SPeng Li struct ethtool_channels *ch) 3488849e4607SPeng Li { 3489849e4607SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3490849e4607SPeng Li 3491849e4607SPeng Li ch->max_combined = hclgevf_get_max_channels(hdev); 3492849e4607SPeng Li ch->other_count = 0; 3493849e4607SPeng Li ch->max_other = 0; 34948be73621SHuazhong Tan ch->combined_count = handle->kinfo.rss_size; 3495849e4607SPeng Li } 3496849e4607SPeng Li 3497cc719218SPeng Li static void hclgevf_get_tqps_and_rss_info(struct hnae3_handle *handle, 34980d43bf45SHuazhong Tan u16 *alloc_tqps, u16 *max_rss_size) 3499cc719218SPeng Li { 3500cc719218SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3501cc719218SPeng Li 35020d43bf45SHuazhong Tan *alloc_tqps = hdev->num_tqps; 3503cc719218SPeng Li *max_rss_size = hdev->rss_size_max; 3504cc719218SPeng Li } 3505cc719218SPeng Li 35064093d1a2SGuangbin Huang static void hclgevf_update_rss_size(struct hnae3_handle *handle, 35074093d1a2SGuangbin Huang u32 new_tqps_num) 35084093d1a2SGuangbin Huang { 35094093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 35104093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35114093d1a2SGuangbin Huang u16 max_rss_size; 35124093d1a2SGuangbin Huang 35134093d1a2SGuangbin Huang kinfo->req_rss_size = new_tqps_num; 35144093d1a2SGuangbin Huang 35154093d1a2SGuangbin Huang max_rss_size = min_t(u16, hdev->rss_size_max, 351635244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 35174093d1a2SGuangbin Huang 35184093d1a2SGuangbin Huang /* Use the user's configuration when it is not larger than 35194093d1a2SGuangbin Huang * max_rss_size, otherwise, use the maximum specification value. 35204093d1a2SGuangbin Huang */ 35214093d1a2SGuangbin Huang if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && 35224093d1a2SGuangbin Huang kinfo->req_rss_size <= max_rss_size) 35234093d1a2SGuangbin Huang kinfo->rss_size = kinfo->req_rss_size; 35244093d1a2SGuangbin Huang else if (kinfo->rss_size > max_rss_size || 35254093d1a2SGuangbin Huang (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) 35264093d1a2SGuangbin Huang kinfo->rss_size = max_rss_size; 35274093d1a2SGuangbin Huang 352835244430SJian Shen kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; 35294093d1a2SGuangbin Huang } 35304093d1a2SGuangbin Huang 35314093d1a2SGuangbin Huang static int hclgevf_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, 35324093d1a2SGuangbin Huang bool rxfh_configured) 35334093d1a2SGuangbin Huang { 35344093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35354093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 35364093d1a2SGuangbin Huang u16 cur_rss_size = kinfo->rss_size; 35374093d1a2SGuangbin Huang u16 cur_tqps = kinfo->num_tqps; 35384093d1a2SGuangbin Huang u32 *rss_indir; 35394093d1a2SGuangbin Huang unsigned int i; 35404093d1a2SGuangbin Huang int ret; 35414093d1a2SGuangbin Huang 35424093d1a2SGuangbin Huang hclgevf_update_rss_size(handle, new_tqps_num); 35434093d1a2SGuangbin Huang 35444093d1a2SGuangbin Huang ret = hclgevf_set_rss_tc_mode(hdev, kinfo->rss_size); 35454093d1a2SGuangbin Huang if (ret) 35464093d1a2SGuangbin Huang return ret; 35474093d1a2SGuangbin Huang 3548cd7e963dSSalil Mehta /* RSS indirection table has been configured by user */ 35494093d1a2SGuangbin Huang if (rxfh_configured) 35504093d1a2SGuangbin Huang goto out; 35514093d1a2SGuangbin Huang 35524093d1a2SGuangbin Huang /* Reinitializes the rss indirect table according to the new RSS size */ 355387ce161eSGuangbin Huang rss_indir = kcalloc(hdev->ae_dev->dev_specs.rss_ind_tbl_size, 355487ce161eSGuangbin Huang sizeof(u32), GFP_KERNEL); 35554093d1a2SGuangbin Huang if (!rss_indir) 35564093d1a2SGuangbin Huang return -ENOMEM; 35574093d1a2SGuangbin Huang 355887ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 35594093d1a2SGuangbin Huang rss_indir[i] = i % kinfo->rss_size; 35604093d1a2SGuangbin Huang 3561944de484SGuojia Liao hdev->rss_cfg.rss_size = kinfo->rss_size; 3562944de484SGuojia Liao 35634093d1a2SGuangbin Huang ret = hclgevf_set_rss(handle, rss_indir, NULL, 0); 35644093d1a2SGuangbin Huang if (ret) 35654093d1a2SGuangbin Huang dev_err(&hdev->pdev->dev, "set rss indir table fail, ret=%d\n", 35664093d1a2SGuangbin Huang ret); 35674093d1a2SGuangbin Huang 35684093d1a2SGuangbin Huang kfree(rss_indir); 35694093d1a2SGuangbin Huang 35704093d1a2SGuangbin Huang out: 35714093d1a2SGuangbin Huang if (!ret) 35724093d1a2SGuangbin Huang dev_info(&hdev->pdev->dev, 35734093d1a2SGuangbin Huang "Channels changed, rss_size from %u to %u, tqps from %u to %u", 35744093d1a2SGuangbin Huang cur_rss_size, kinfo->rss_size, 357535244430SJian Shen cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc); 35764093d1a2SGuangbin Huang 35774093d1a2SGuangbin Huang return ret; 35784093d1a2SGuangbin Huang } 35794093d1a2SGuangbin Huang 3580175ec96bSFuyun Liang static int hclgevf_get_status(struct hnae3_handle *handle) 3581175ec96bSFuyun Liang { 3582175ec96bSFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3583175ec96bSFuyun Liang 3584175ec96bSFuyun Liang return hdev->hw.mac.link; 3585175ec96bSFuyun Liang } 3586175ec96bSFuyun Liang 35874a152de9SFuyun Liang static void hclgevf_get_ksettings_an_result(struct hnae3_handle *handle, 35884a152de9SFuyun Liang u8 *auto_neg, u32 *speed, 35894a152de9SFuyun Liang u8 *duplex) 35904a152de9SFuyun Liang { 35914a152de9SFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35924a152de9SFuyun Liang 35934a152de9SFuyun Liang if (speed) 35944a152de9SFuyun Liang *speed = hdev->hw.mac.speed; 35954a152de9SFuyun Liang if (duplex) 35964a152de9SFuyun Liang *duplex = hdev->hw.mac.duplex; 35974a152de9SFuyun Liang if (auto_neg) 35984a152de9SFuyun Liang *auto_neg = AUTONEG_DISABLE; 35994a152de9SFuyun Liang } 36004a152de9SFuyun Liang 36014a152de9SFuyun Liang void hclgevf_update_speed_duplex(struct hclgevf_dev *hdev, u32 speed, 36024a152de9SFuyun Liang u8 duplex) 36034a152de9SFuyun Liang { 36044a152de9SFuyun Liang hdev->hw.mac.speed = speed; 36054a152de9SFuyun Liang hdev->hw.mac.duplex = duplex; 36064a152de9SFuyun Liang } 36074a152de9SFuyun Liang 36081731be4cSYonglong Liu static int hclgevf_gro_en(struct hnae3_handle *handle, bool enable) 36095c9f6b39SPeng Li { 36105c9f6b39SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36115c9f6b39SPeng Li 36125c9f6b39SPeng Li return hclgevf_config_gro(hdev, enable); 36135c9f6b39SPeng Li } 36145c9f6b39SPeng Li 361588d10bd6SJian Shen static void hclgevf_get_media_type(struct hnae3_handle *handle, u8 *media_type, 361688d10bd6SJian Shen u8 *module_type) 3617c136b884SPeng Li { 3618c136b884SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 361988d10bd6SJian Shen 3620c136b884SPeng Li if (media_type) 3621c136b884SPeng Li *media_type = hdev->hw.mac.media_type; 362288d10bd6SJian Shen 362388d10bd6SJian Shen if (module_type) 362488d10bd6SJian Shen *module_type = hdev->hw.mac.module_type; 3625c136b884SPeng Li } 3626c136b884SPeng Li 36274d60291bSHuazhong Tan static bool hclgevf_get_hw_reset_stat(struct hnae3_handle *handle) 36284d60291bSHuazhong Tan { 36294d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36304d60291bSHuazhong Tan 3631aa5c4f17SHuazhong Tan return !!hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 36324d60291bSHuazhong Tan } 36334d60291bSHuazhong Tan 3634fe735c84SHuazhong Tan static bool hclgevf_get_cmdq_stat(struct hnae3_handle *handle) 3635fe735c84SHuazhong Tan { 3636fe735c84SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3637fe735c84SHuazhong Tan 3638fe735c84SHuazhong Tan return test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 3639fe735c84SHuazhong Tan } 3640fe735c84SHuazhong Tan 36414d60291bSHuazhong Tan static bool hclgevf_ae_dev_resetting(struct hnae3_handle *handle) 36424d60291bSHuazhong Tan { 36434d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36444d60291bSHuazhong Tan 36454d60291bSHuazhong Tan return test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 36464d60291bSHuazhong Tan } 36474d60291bSHuazhong Tan 36484d60291bSHuazhong Tan static unsigned long hclgevf_ae_dev_reset_cnt(struct hnae3_handle *handle) 36494d60291bSHuazhong Tan { 36504d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36514d60291bSHuazhong Tan 3652c88a6e7dSHuazhong Tan return hdev->rst_stats.hw_rst_done_cnt; 36534d60291bSHuazhong Tan } 36544d60291bSHuazhong Tan 36559194d18bSliuzhongzhu static void hclgevf_get_link_mode(struct hnae3_handle *handle, 36569194d18bSliuzhongzhu unsigned long *supported, 36579194d18bSliuzhongzhu unsigned long *advertising) 36589194d18bSliuzhongzhu { 36599194d18bSliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36609194d18bSliuzhongzhu 36619194d18bSliuzhongzhu *supported = hdev->hw.mac.supported; 36629194d18bSliuzhongzhu *advertising = hdev->hw.mac.advertising; 36639194d18bSliuzhongzhu } 36649194d18bSliuzhongzhu 36651600c3e5SJian Shen #define MAX_SEPARATE_NUM 4 3666e407efddSHuazhong Tan #define SEPARATOR_VALUE 0xFDFCFBFA 36671600c3e5SJian Shen #define REG_NUM_PER_LINE 4 36681600c3e5SJian Shen #define REG_LEN_PER_LINE (REG_NUM_PER_LINE * sizeof(u32)) 36691600c3e5SJian Shen 36701600c3e5SJian Shen static int hclgevf_get_regs_len(struct hnae3_handle *handle) 36711600c3e5SJian Shen { 36721600c3e5SJian Shen int cmdq_lines, common_lines, ring_lines, tqp_intr_lines; 36731600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36741600c3e5SJian Shen 36751600c3e5SJian Shen cmdq_lines = sizeof(cmdq_reg_addr_list) / REG_LEN_PER_LINE + 1; 36761600c3e5SJian Shen common_lines = sizeof(common_reg_addr_list) / REG_LEN_PER_LINE + 1; 36771600c3e5SJian Shen ring_lines = sizeof(ring_reg_addr_list) / REG_LEN_PER_LINE + 1; 36781600c3e5SJian Shen tqp_intr_lines = sizeof(tqp_intr_reg_addr_list) / REG_LEN_PER_LINE + 1; 36791600c3e5SJian Shen 36801600c3e5SJian Shen return (cmdq_lines + common_lines + ring_lines * hdev->num_tqps + 36811600c3e5SJian Shen tqp_intr_lines * (hdev->num_msi_used - 1)) * REG_LEN_PER_LINE; 36821600c3e5SJian Shen } 36831600c3e5SJian Shen 36841600c3e5SJian Shen static void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version, 36851600c3e5SJian Shen void *data) 36861600c3e5SJian Shen { 36871600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36881600c3e5SJian Shen int i, j, reg_um, separator_num; 36891600c3e5SJian Shen u32 *reg = data; 36901600c3e5SJian Shen 36911600c3e5SJian Shen *version = hdev->fw_version; 36921600c3e5SJian Shen 36931600c3e5SJian Shen /* fetching per-VF registers values from VF PCIe register space */ 36941600c3e5SJian Shen reg_um = sizeof(cmdq_reg_addr_list) / sizeof(u32); 36951600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 36961600c3e5SJian Shen for (i = 0; i < reg_um; i++) 36971600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]); 36981600c3e5SJian Shen for (i = 0; i < separator_num; i++) 36991600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37001600c3e5SJian Shen 37011600c3e5SJian Shen reg_um = sizeof(common_reg_addr_list) / sizeof(u32); 37021600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37031600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37041600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]); 37051600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37061600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37071600c3e5SJian Shen 37081600c3e5SJian Shen reg_um = sizeof(ring_reg_addr_list) / sizeof(u32); 37091600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37101600c3e5SJian Shen for (j = 0; j < hdev->num_tqps; j++) { 37111600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37121600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 37131600c3e5SJian Shen ring_reg_addr_list[i] + 37141600c3e5SJian Shen 0x200 * j); 37151600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37161600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37171600c3e5SJian Shen } 37181600c3e5SJian Shen 37191600c3e5SJian Shen reg_um = sizeof(tqp_intr_reg_addr_list) / sizeof(u32); 37201600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37211600c3e5SJian Shen for (j = 0; j < hdev->num_msi_used - 1; j++) { 37221600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37231600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 37241600c3e5SJian Shen tqp_intr_reg_addr_list[i] + 37251600c3e5SJian Shen 4 * j); 37261600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37271600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37281600c3e5SJian Shen } 37291600c3e5SJian Shen } 37301600c3e5SJian Shen 373192f11ea1SJian Shen void hclgevf_update_port_base_vlan_info(struct hclgevf_dev *hdev, u16 state, 373292f11ea1SJian Shen u8 *port_base_vlan_info, u8 data_size) 373392f11ea1SJian Shen { 373492f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 3735d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3736a6f7bfdcSJian Shen int ret; 373792f11ea1SJian Shen 373892f11ea1SJian Shen rtnl_lock(); 3739a6f7bfdcSJian Shen 3740b7b5d25bSGuojia Liao if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 3741b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) { 3742a6f7bfdcSJian Shen dev_warn(&hdev->pdev->dev, 3743a6f7bfdcSJian Shen "is resetting when updating port based vlan info\n"); 374492f11ea1SJian Shen rtnl_unlock(); 3745a6f7bfdcSJian Shen return; 3746a6f7bfdcSJian Shen } 3747a6f7bfdcSJian Shen 3748a6f7bfdcSJian Shen ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 3749a6f7bfdcSJian Shen if (ret) { 3750a6f7bfdcSJian Shen rtnl_unlock(); 3751a6f7bfdcSJian Shen return; 3752a6f7bfdcSJian Shen } 375392f11ea1SJian Shen 375492f11ea1SJian Shen /* send msg to PF and wait update port based vlan info */ 3755d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 3756d3410018SYufeng Mo HCLGE_MBX_PORT_BASE_VLAN_CFG); 3757d3410018SYufeng Mo memcpy(send_msg.data, port_base_vlan_info, data_size); 3758a6f7bfdcSJian Shen ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3759a6f7bfdcSJian Shen if (!ret) { 376092f11ea1SJian Shen if (state == HNAE3_PORT_BASE_VLAN_DISABLE) 3761a6f7bfdcSJian Shen nic->port_base_vlan_state = state; 376292f11ea1SJian Shen else 376392f11ea1SJian Shen nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE; 3764a6f7bfdcSJian Shen } 376592f11ea1SJian Shen 376692f11ea1SJian Shen hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 376792f11ea1SJian Shen rtnl_unlock(); 376892f11ea1SJian Shen } 376992f11ea1SJian Shen 3770e2cb1decSSalil Mehta static const struct hnae3_ae_ops hclgevf_ops = { 3771e2cb1decSSalil Mehta .init_ae_dev = hclgevf_init_ae_dev, 3772e2cb1decSSalil Mehta .uninit_ae_dev = hclgevf_uninit_ae_dev, 3773bb1890d5SJiaran Zhang .reset_prepare = hclgevf_reset_prepare_general, 3774bb1890d5SJiaran Zhang .reset_done = hclgevf_reset_done, 3775e718a93fSPeng Li .init_client_instance = hclgevf_init_client_instance, 3776e718a93fSPeng Li .uninit_client_instance = hclgevf_uninit_client_instance, 3777e2cb1decSSalil Mehta .start = hclgevf_ae_start, 3778e2cb1decSSalil Mehta .stop = hclgevf_ae_stop, 3779a6d818e3SYunsheng Lin .client_start = hclgevf_client_start, 3780a6d818e3SYunsheng Lin .client_stop = hclgevf_client_stop, 3781e2cb1decSSalil Mehta .map_ring_to_vector = hclgevf_map_ring_to_vector, 3782e2cb1decSSalil Mehta .unmap_ring_from_vector = hclgevf_unmap_ring_from_vector, 3783e2cb1decSSalil Mehta .get_vector = hclgevf_get_vector, 37840d3e6631SYunsheng Lin .put_vector = hclgevf_put_vector, 3785e2cb1decSSalil Mehta .reset_queue = hclgevf_reset_tqp, 3786e2cb1decSSalil Mehta .get_mac_addr = hclgevf_get_mac_addr, 3787e2cb1decSSalil Mehta .set_mac_addr = hclgevf_set_mac_addr, 3788e2cb1decSSalil Mehta .add_uc_addr = hclgevf_add_uc_addr, 3789e2cb1decSSalil Mehta .rm_uc_addr = hclgevf_rm_uc_addr, 3790e2cb1decSSalil Mehta .add_mc_addr = hclgevf_add_mc_addr, 3791e2cb1decSSalil Mehta .rm_mc_addr = hclgevf_rm_mc_addr, 3792e2cb1decSSalil Mehta .get_stats = hclgevf_get_stats, 3793e2cb1decSSalil Mehta .update_stats = hclgevf_update_stats, 3794e2cb1decSSalil Mehta .get_strings = hclgevf_get_strings, 3795e2cb1decSSalil Mehta .get_sset_count = hclgevf_get_sset_count, 3796e2cb1decSSalil Mehta .get_rss_key_size = hclgevf_get_rss_key_size, 3797e2cb1decSSalil Mehta .get_rss = hclgevf_get_rss, 3798e2cb1decSSalil Mehta .set_rss = hclgevf_set_rss, 3799d97b3072SJian Shen .get_rss_tuple = hclgevf_get_rss_tuple, 3800d97b3072SJian Shen .set_rss_tuple = hclgevf_set_rss_tuple, 3801e2cb1decSSalil Mehta .get_tc_size = hclgevf_get_tc_size, 3802e2cb1decSSalil Mehta .get_fw_version = hclgevf_get_fw_version, 3803e2cb1decSSalil Mehta .set_vlan_filter = hclgevf_set_vlan_filter, 3804b2641e2aSYunsheng Lin .enable_hw_strip_rxvtag = hclgevf_en_hw_strip_rxvtag, 38056d4c3981SSalil Mehta .reset_event = hclgevf_reset_event, 3806720bd583SHuazhong Tan .set_default_reset_request = hclgevf_set_def_reset_request, 38074093d1a2SGuangbin Huang .set_channels = hclgevf_set_channels, 3808849e4607SPeng Li .get_channels = hclgevf_get_channels, 3809cc719218SPeng Li .get_tqps_and_rss_info = hclgevf_get_tqps_and_rss_info, 38101600c3e5SJian Shen .get_regs_len = hclgevf_get_regs_len, 38111600c3e5SJian Shen .get_regs = hclgevf_get_regs, 3812175ec96bSFuyun Liang .get_status = hclgevf_get_status, 38134a152de9SFuyun Liang .get_ksettings_an_result = hclgevf_get_ksettings_an_result, 3814c136b884SPeng Li .get_media_type = hclgevf_get_media_type, 38154d60291bSHuazhong Tan .get_hw_reset_stat = hclgevf_get_hw_reset_stat, 38164d60291bSHuazhong Tan .ae_dev_resetting = hclgevf_ae_dev_resetting, 38174d60291bSHuazhong Tan .ae_dev_reset_cnt = hclgevf_ae_dev_reset_cnt, 38185c9f6b39SPeng Li .set_gro_en = hclgevf_gro_en, 3819818f1675SYunsheng Lin .set_mtu = hclgevf_set_mtu, 38200c29d191Sliuzhongzhu .get_global_queue_id = hclgevf_get_qid_global, 38218cdb992fSJian Shen .set_timer_task = hclgevf_set_timer_task, 38229194d18bSliuzhongzhu .get_link_mode = hclgevf_get_link_mode, 3823e196ec75SJian Shen .set_promisc_mode = hclgevf_set_promisc_mode, 3824c631c696SJian Shen .request_update_promisc_mode = hclgevf_request_update_promisc_mode, 3825fe735c84SHuazhong Tan .get_cmdq_stat = hclgevf_get_cmdq_stat, 3826e2cb1decSSalil Mehta }; 3827e2cb1decSSalil Mehta 3828e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf = { 3829e2cb1decSSalil Mehta .ops = &hclgevf_ops, 3830e2cb1decSSalil Mehta .pdev_id_table = ae_algovf_pci_tbl, 3831e2cb1decSSalil Mehta }; 3832e2cb1decSSalil Mehta 3833e2cb1decSSalil Mehta static int hclgevf_init(void) 3834e2cb1decSSalil Mehta { 3835e2cb1decSSalil Mehta pr_info("%s is initializing\n", HCLGEVF_NAME); 3836e2cb1decSSalil Mehta 383716deaef2SYunsheng Lin hclgevf_wq = alloc_workqueue("%s", 0, 0, HCLGEVF_NAME); 38380ea68902SYunsheng Lin if (!hclgevf_wq) { 38390ea68902SYunsheng Lin pr_err("%s: failed to create workqueue\n", HCLGEVF_NAME); 38400ea68902SYunsheng Lin return -ENOMEM; 38410ea68902SYunsheng Lin } 38420ea68902SYunsheng Lin 3843854cf33aSFuyun Liang hnae3_register_ae_algo(&ae_algovf); 3844854cf33aSFuyun Liang 3845854cf33aSFuyun Liang return 0; 3846e2cb1decSSalil Mehta } 3847e2cb1decSSalil Mehta 3848e2cb1decSSalil Mehta static void hclgevf_exit(void) 3849e2cb1decSSalil Mehta { 3850e2cb1decSSalil Mehta hnae3_unregister_ae_algo(&ae_algovf); 38510ea68902SYunsheng Lin destroy_workqueue(hclgevf_wq); 3852e2cb1decSSalil Mehta } 3853e2cb1decSSalil Mehta module_init(hclgevf_init); 3854e2cb1decSSalil Mehta module_exit(hclgevf_exit); 3855e2cb1decSSalil Mehta 3856e2cb1decSSalil Mehta MODULE_LICENSE("GPL"); 3857e2cb1decSSalil Mehta MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 3858e2cb1decSSalil Mehta MODULE_DESCRIPTION("HCLGEVF Driver"); 3859e2cb1decSSalil Mehta MODULE_VERSION(HCLGEVF_MOD_VERSION); 3860