1e2cb1decSSalil Mehta // SPDX-License-Identifier: GPL-2.0+ 2e2cb1decSSalil Mehta // Copyright (c) 2016-2017 Hisilicon Limited. 3e2cb1decSSalil Mehta 4e2cb1decSSalil Mehta #include <linux/etherdevice.h> 5aa5c4f17SHuazhong Tan #include <linux/iopoll.h> 66988eb2aSSalil Mehta #include <net/rtnetlink.h> 7e2cb1decSSalil Mehta #include "hclgevf_cmd.h" 8e2cb1decSSalil Mehta #include "hclgevf_main.h" 9e2cb1decSSalil Mehta #include "hclge_mbx.h" 10e2cb1decSSalil Mehta #include "hnae3.h" 11cd624299SYufeng Mo #include "hclgevf_devlink.h" 12e2cb1decSSalil Mehta 13e2cb1decSSalil Mehta #define HCLGEVF_NAME "hclgevf" 14e2cb1decSSalil Mehta 15bbe6540eSHuazhong Tan #define HCLGEVF_RESET_MAX_FAIL_CNT 5 16bbe6540eSHuazhong Tan 179c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev); 185e7414cdSJian Shen static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 195e7414cdSJian Shen unsigned long delay); 205e7414cdSJian Shen 21e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf; 22e2cb1decSSalil Mehta 230ea68902SYunsheng Lin static struct workqueue_struct *hclgevf_wq; 240ea68902SYunsheng Lin 25e2cb1decSSalil Mehta static const struct pci_device_id ae_algovf_pci_tbl[] = { 26c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_VF), 0}, 27c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF), 28c155e22bSGuangbin Huang HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 29e2cb1decSSalil Mehta /* required last entry */ 30e2cb1decSSalil Mehta {0, } 31e2cb1decSSalil Mehta }; 32e2cb1decSSalil Mehta 33472d7eceSJian Shen static const u8 hclgevf_hash_key[] = { 34472d7eceSJian Shen 0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2, 35472d7eceSJian Shen 0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0, 36472d7eceSJian Shen 0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4, 37472d7eceSJian Shen 0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C, 38472d7eceSJian Shen 0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA 39472d7eceSJian Shen }; 40472d7eceSJian Shen 412f550a46SYunsheng Lin MODULE_DEVICE_TABLE(pci, ae_algovf_pci_tbl); 422f550a46SYunsheng Lin 435a24b1fdSPeng Li static const u32 cmdq_reg_addr_list[] = {HCLGEVF_NIC_CSQ_BASEADDR_L_REG, 445a24b1fdSPeng Li HCLGEVF_NIC_CSQ_BASEADDR_H_REG, 455a24b1fdSPeng Li HCLGEVF_NIC_CSQ_DEPTH_REG, 465a24b1fdSPeng Li HCLGEVF_NIC_CSQ_TAIL_REG, 475a24b1fdSPeng Li HCLGEVF_NIC_CSQ_HEAD_REG, 485a24b1fdSPeng Li HCLGEVF_NIC_CRQ_BASEADDR_L_REG, 495a24b1fdSPeng Li HCLGEVF_NIC_CRQ_BASEADDR_H_REG, 505a24b1fdSPeng Li HCLGEVF_NIC_CRQ_DEPTH_REG, 515a24b1fdSPeng Li HCLGEVF_NIC_CRQ_TAIL_REG, 525a24b1fdSPeng Li HCLGEVF_NIC_CRQ_HEAD_REG, 531600c3e5SJian Shen HCLGEVF_VECTOR0_CMDQ_SRC_REG, 549cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG, 551600c3e5SJian Shen HCLGEVF_CMDQ_INTR_EN_REG, 561600c3e5SJian Shen HCLGEVF_CMDQ_INTR_GEN_REG}; 571600c3e5SJian Shen 581600c3e5SJian Shen static const u32 common_reg_addr_list[] = {HCLGEVF_MISC_VECTOR_REG_BASE, 591600c3e5SJian Shen HCLGEVF_RST_ING, 601600c3e5SJian Shen HCLGEVF_GRO_EN_REG}; 611600c3e5SJian Shen 621600c3e5SJian Shen static const u32 ring_reg_addr_list[] = {HCLGEVF_RING_RX_ADDR_L_REG, 631600c3e5SJian Shen HCLGEVF_RING_RX_ADDR_H_REG, 641600c3e5SJian Shen HCLGEVF_RING_RX_BD_NUM_REG, 651600c3e5SJian Shen HCLGEVF_RING_RX_BD_LENGTH_REG, 661600c3e5SJian Shen HCLGEVF_RING_RX_MERGE_EN_REG, 671600c3e5SJian Shen HCLGEVF_RING_RX_TAIL_REG, 681600c3e5SJian Shen HCLGEVF_RING_RX_HEAD_REG, 691600c3e5SJian Shen HCLGEVF_RING_RX_FBD_NUM_REG, 701600c3e5SJian Shen HCLGEVF_RING_RX_OFFSET_REG, 711600c3e5SJian Shen HCLGEVF_RING_RX_FBD_OFFSET_REG, 721600c3e5SJian Shen HCLGEVF_RING_RX_STASH_REG, 731600c3e5SJian Shen HCLGEVF_RING_RX_BD_ERR_REG, 741600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_L_REG, 751600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_H_REG, 761600c3e5SJian Shen HCLGEVF_RING_TX_BD_NUM_REG, 771600c3e5SJian Shen HCLGEVF_RING_TX_PRIORITY_REG, 781600c3e5SJian Shen HCLGEVF_RING_TX_TC_REG, 791600c3e5SJian Shen HCLGEVF_RING_TX_MERGE_EN_REG, 801600c3e5SJian Shen HCLGEVF_RING_TX_TAIL_REG, 811600c3e5SJian Shen HCLGEVF_RING_TX_HEAD_REG, 821600c3e5SJian Shen HCLGEVF_RING_TX_FBD_NUM_REG, 831600c3e5SJian Shen HCLGEVF_RING_TX_OFFSET_REG, 841600c3e5SJian Shen HCLGEVF_RING_TX_EBD_NUM_REG, 851600c3e5SJian Shen HCLGEVF_RING_TX_EBD_OFFSET_REG, 861600c3e5SJian Shen HCLGEVF_RING_TX_BD_ERR_REG, 871600c3e5SJian Shen HCLGEVF_RING_EN_REG}; 881600c3e5SJian Shen 891600c3e5SJian Shen static const u32 tqp_intr_reg_addr_list[] = {HCLGEVF_TQP_INTR_CTRL_REG, 901600c3e5SJian Shen HCLGEVF_TQP_INTR_GL0_REG, 911600c3e5SJian Shen HCLGEVF_TQP_INTR_GL1_REG, 921600c3e5SJian Shen HCLGEVF_TQP_INTR_GL2_REG, 931600c3e5SJian Shen HCLGEVF_TQP_INTR_RL_REG}; 941600c3e5SJian Shen 959b2f3477SWeihang Li static struct hclgevf_dev *hclgevf_ae_get_hdev(struct hnae3_handle *handle) 96e2cb1decSSalil Mehta { 97eed9535fSPeng Li if (!handle->client) 98eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, nic); 99eed9535fSPeng Li else if (handle->client->type == HNAE3_CLIENT_ROCE) 100eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, roce); 101eed9535fSPeng Li else 102e2cb1decSSalil Mehta return container_of(handle, struct hclgevf_dev, nic); 103e2cb1decSSalil Mehta } 104e2cb1decSSalil Mehta 105e2cb1decSSalil Mehta static int hclgevf_tqps_update_stats(struct hnae3_handle *handle) 106e2cb1decSSalil Mehta { 107b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 108e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 109e2cb1decSSalil Mehta struct hclgevf_desc desc; 110e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 111e2cb1decSSalil Mehta int status; 112e2cb1decSSalil Mehta int i; 113e2cb1decSSalil Mehta 114b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 115b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 116e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, 117e2cb1decSSalil Mehta HCLGEVF_OPC_QUERY_RX_STATUS, 118e2cb1decSSalil Mehta true); 119e2cb1decSSalil Mehta 120e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 121e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 122e2cb1decSSalil Mehta if (status) { 123e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 124e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 125e2cb1decSSalil Mehta status, i); 126e2cb1decSSalil Mehta return status; 127e2cb1decSSalil Mehta } 128e2cb1decSSalil Mehta tqp->tqp_stats.rcb_rx_ring_pktnum_rcd += 129cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 130e2cb1decSSalil Mehta 131e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_TX_STATUS, 132e2cb1decSSalil Mehta true); 133e2cb1decSSalil Mehta 134e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 135e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 136e2cb1decSSalil Mehta if (status) { 137e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 138e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 139e2cb1decSSalil Mehta status, i); 140e2cb1decSSalil Mehta return status; 141e2cb1decSSalil Mehta } 142e2cb1decSSalil Mehta tqp->tqp_stats.rcb_tx_ring_pktnum_rcd += 143cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 144e2cb1decSSalil Mehta } 145e2cb1decSSalil Mehta 146e2cb1decSSalil Mehta return 0; 147e2cb1decSSalil Mehta } 148e2cb1decSSalil Mehta 149e2cb1decSSalil Mehta static u64 *hclgevf_tqps_get_stats(struct hnae3_handle *handle, u64 *data) 150e2cb1decSSalil Mehta { 151e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo = &handle->kinfo; 152e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 153e2cb1decSSalil Mehta u64 *buff = data; 154e2cb1decSSalil Mehta int i; 155e2cb1decSSalil Mehta 156b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 157b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 158e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_tx_ring_pktnum_rcd; 159e2cb1decSSalil Mehta } 160e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 161b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 162e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_rx_ring_pktnum_rcd; 163e2cb1decSSalil Mehta } 164e2cb1decSSalil Mehta 165e2cb1decSSalil Mehta return buff; 166e2cb1decSSalil Mehta } 167e2cb1decSSalil Mehta 168e2cb1decSSalil Mehta static int hclgevf_tqps_get_sset_count(struct hnae3_handle *handle, int strset) 169e2cb1decSSalil Mehta { 170b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 171e2cb1decSSalil Mehta 172b4f1d303SJian Shen return kinfo->num_tqps * 2; 173e2cb1decSSalil Mehta } 174e2cb1decSSalil Mehta 175e2cb1decSSalil Mehta static u8 *hclgevf_tqps_get_strings(struct hnae3_handle *handle, u8 *data) 176e2cb1decSSalil Mehta { 177b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 178e2cb1decSSalil Mehta u8 *buff = data; 1799d8d5a36SYufeng Mo int i; 180e2cb1decSSalil Mehta 181b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 182b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 183e2cb1decSSalil Mehta struct hclgevf_tqp, q); 184c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "txq%u_pktnum_rcd", 185e2cb1decSSalil Mehta tqp->index); 186e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 187e2cb1decSSalil Mehta } 188e2cb1decSSalil Mehta 189b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 190b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 191e2cb1decSSalil Mehta struct hclgevf_tqp, q); 192c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "rxq%u_pktnum_rcd", 193e2cb1decSSalil Mehta tqp->index); 194e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 195e2cb1decSSalil Mehta } 196e2cb1decSSalil Mehta 197e2cb1decSSalil Mehta return buff; 198e2cb1decSSalil Mehta } 199e2cb1decSSalil Mehta 200e2cb1decSSalil Mehta static void hclgevf_update_stats(struct hnae3_handle *handle, 201e2cb1decSSalil Mehta struct net_device_stats *net_stats) 202e2cb1decSSalil Mehta { 203e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 204e2cb1decSSalil Mehta int status; 205e2cb1decSSalil Mehta 206e2cb1decSSalil Mehta status = hclgevf_tqps_update_stats(handle); 207e2cb1decSSalil Mehta if (status) 208e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 209e2cb1decSSalil Mehta "VF update of TQPS stats fail, status = %d.\n", 210e2cb1decSSalil Mehta status); 211e2cb1decSSalil Mehta } 212e2cb1decSSalil Mehta 213e2cb1decSSalil Mehta static int hclgevf_get_sset_count(struct hnae3_handle *handle, int strset) 214e2cb1decSSalil Mehta { 215e2cb1decSSalil Mehta if (strset == ETH_SS_TEST) 216e2cb1decSSalil Mehta return -EOPNOTSUPP; 217e2cb1decSSalil Mehta else if (strset == ETH_SS_STATS) 218e2cb1decSSalil Mehta return hclgevf_tqps_get_sset_count(handle, strset); 219e2cb1decSSalil Mehta 220e2cb1decSSalil Mehta return 0; 221e2cb1decSSalil Mehta } 222e2cb1decSSalil Mehta 223e2cb1decSSalil Mehta static void hclgevf_get_strings(struct hnae3_handle *handle, u32 strset, 224e2cb1decSSalil Mehta u8 *data) 225e2cb1decSSalil Mehta { 226e2cb1decSSalil Mehta u8 *p = (char *)data; 227e2cb1decSSalil Mehta 228e2cb1decSSalil Mehta if (strset == ETH_SS_STATS) 229e2cb1decSSalil Mehta p = hclgevf_tqps_get_strings(handle, p); 230e2cb1decSSalil Mehta } 231e2cb1decSSalil Mehta 232e2cb1decSSalil Mehta static void hclgevf_get_stats(struct hnae3_handle *handle, u64 *data) 233e2cb1decSSalil Mehta { 234e2cb1decSSalil Mehta hclgevf_tqps_get_stats(handle, data); 235e2cb1decSSalil Mehta } 236e2cb1decSSalil Mehta 237d3410018SYufeng Mo static void hclgevf_build_send_msg(struct hclge_vf_to_pf_msg *msg, u8 code, 238d3410018SYufeng Mo u8 subcode) 239d3410018SYufeng Mo { 240d3410018SYufeng Mo if (msg) { 241d3410018SYufeng Mo memset(msg, 0, sizeof(struct hclge_vf_to_pf_msg)); 242d3410018SYufeng Mo msg->code = code; 243d3410018SYufeng Mo msg->subcode = subcode; 244d3410018SYufeng Mo } 245d3410018SYufeng Mo } 246d3410018SYufeng Mo 24732e6d104SJian Shen static int hclgevf_get_basic_info(struct hclgevf_dev *hdev) 248e2cb1decSSalil Mehta { 24932e6d104SJian Shen struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 25032e6d104SJian Shen u8 resp_msg[HCLGE_MBX_MAX_RESP_DATA_SIZE]; 25132e6d104SJian Shen struct hclge_basic_info *basic_info; 252d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 25332e6d104SJian Shen unsigned long caps; 254e2cb1decSSalil Mehta int status; 255e2cb1decSSalil Mehta 25632e6d104SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_BASIC_INFO, 0); 25732e6d104SJian Shen status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 258d3410018SYufeng Mo sizeof(resp_msg)); 259e2cb1decSSalil Mehta if (status) { 260e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 26132e6d104SJian Shen "failed to get basic info from pf, ret = %d", status); 262e2cb1decSSalil Mehta return status; 263e2cb1decSSalil Mehta } 264e2cb1decSSalil Mehta 26532e6d104SJian Shen basic_info = (struct hclge_basic_info *)resp_msg; 26632e6d104SJian Shen 26732e6d104SJian Shen hdev->hw_tc_map = basic_info->hw_tc_map; 26832e6d104SJian Shen hdev->mbx_api_version = basic_info->mbx_api_version; 26932e6d104SJian Shen caps = basic_info->pf_caps; 27032e6d104SJian Shen if (test_bit(HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B, &caps)) 27132e6d104SJian Shen set_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps); 272e2cb1decSSalil Mehta 273e2cb1decSSalil Mehta return 0; 274e2cb1decSSalil Mehta } 275e2cb1decSSalil Mehta 27692f11ea1SJian Shen static int hclgevf_get_port_base_vlan_filter_state(struct hclgevf_dev *hdev) 27792f11ea1SJian Shen { 27892f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 279d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 28092f11ea1SJian Shen u8 resp_msg; 28192f11ea1SJian Shen int ret; 28292f11ea1SJian Shen 283d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 284d3410018SYufeng Mo HCLGE_MBX_GET_PORT_BASE_VLAN_STATE); 285d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, 286d3410018SYufeng Mo sizeof(u8)); 28792f11ea1SJian Shen if (ret) { 28892f11ea1SJian Shen dev_err(&hdev->pdev->dev, 28992f11ea1SJian Shen "VF request to get port based vlan state failed %d", 29092f11ea1SJian Shen ret); 29192f11ea1SJian Shen return ret; 29292f11ea1SJian Shen } 29392f11ea1SJian Shen 29492f11ea1SJian Shen nic->port_base_vlan_state = resp_msg; 29592f11ea1SJian Shen 29692f11ea1SJian Shen return 0; 29792f11ea1SJian Shen } 29892f11ea1SJian Shen 2996cee6fc3SJian Shen static int hclgevf_get_queue_info(struct hclgevf_dev *hdev) 300e2cb1decSSalil Mehta { 301c0425944SPeng Li #define HCLGEVF_TQPS_RSS_INFO_LEN 6 302d3410018SYufeng Mo #define HCLGEVF_TQPS_ALLOC_OFFSET 0 303d3410018SYufeng Mo #define HCLGEVF_TQPS_RSS_SIZE_OFFSET 2 304d3410018SYufeng Mo #define HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET 4 305d3410018SYufeng Mo 306e2cb1decSSalil Mehta u8 resp_msg[HCLGEVF_TQPS_RSS_INFO_LEN]; 307d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 308e2cb1decSSalil Mehta int status; 309e2cb1decSSalil Mehta 310d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QINFO, 0); 311d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 312e2cb1decSSalil Mehta HCLGEVF_TQPS_RSS_INFO_LEN); 313e2cb1decSSalil Mehta if (status) { 314e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 315e2cb1decSSalil Mehta "VF request to get tqp info from PF failed %d", 316e2cb1decSSalil Mehta status); 317e2cb1decSSalil Mehta return status; 318e2cb1decSSalil Mehta } 319e2cb1decSSalil Mehta 320d3410018SYufeng Mo memcpy(&hdev->num_tqps, &resp_msg[HCLGEVF_TQPS_ALLOC_OFFSET], 321d3410018SYufeng Mo sizeof(u16)); 322d3410018SYufeng Mo memcpy(&hdev->rss_size_max, &resp_msg[HCLGEVF_TQPS_RSS_SIZE_OFFSET], 323d3410018SYufeng Mo sizeof(u16)); 324d3410018SYufeng Mo memcpy(&hdev->rx_buf_len, &resp_msg[HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET], 325d3410018SYufeng Mo sizeof(u16)); 326c0425944SPeng Li 327c0425944SPeng Li return 0; 328c0425944SPeng Li } 329c0425944SPeng Li 330c0425944SPeng Li static int hclgevf_get_queue_depth(struct hclgevf_dev *hdev) 331c0425944SPeng Li { 332c0425944SPeng Li #define HCLGEVF_TQPS_DEPTH_INFO_LEN 4 333d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_TX_DESC_OFFSET 0 334d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_RX_DESC_OFFSET 2 335d3410018SYufeng Mo 336c0425944SPeng Li u8 resp_msg[HCLGEVF_TQPS_DEPTH_INFO_LEN]; 337d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 338c0425944SPeng Li int ret; 339c0425944SPeng Li 340d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QDEPTH, 0); 341d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 342c0425944SPeng Li HCLGEVF_TQPS_DEPTH_INFO_LEN); 343c0425944SPeng Li if (ret) { 344c0425944SPeng Li dev_err(&hdev->pdev->dev, 345c0425944SPeng Li "VF request to get tqp depth info from PF failed %d", 346c0425944SPeng Li ret); 347c0425944SPeng Li return ret; 348c0425944SPeng Li } 349c0425944SPeng Li 350d3410018SYufeng Mo memcpy(&hdev->num_tx_desc, &resp_msg[HCLGEVF_TQPS_NUM_TX_DESC_OFFSET], 351d3410018SYufeng Mo sizeof(u16)); 352d3410018SYufeng Mo memcpy(&hdev->num_rx_desc, &resp_msg[HCLGEVF_TQPS_NUM_RX_DESC_OFFSET], 353d3410018SYufeng Mo sizeof(u16)); 354e2cb1decSSalil Mehta 355e2cb1decSSalil Mehta return 0; 356e2cb1decSSalil Mehta } 357e2cb1decSSalil Mehta 3580c29d191Sliuzhongzhu static u16 hclgevf_get_qid_global(struct hnae3_handle *handle, u16 queue_id) 3590c29d191Sliuzhongzhu { 3600c29d191Sliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 361d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3620c29d191Sliuzhongzhu u16 qid_in_pf = 0; 363d3410018SYufeng Mo u8 resp_data[2]; 3640c29d191Sliuzhongzhu int ret; 3650c29d191Sliuzhongzhu 366d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QID_IN_PF, 0); 367d3410018SYufeng Mo memcpy(send_msg.data, &queue_id, sizeof(queue_id)); 368d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_data, 36963cbf7a9SYufeng Mo sizeof(resp_data)); 3700c29d191Sliuzhongzhu if (!ret) 3710c29d191Sliuzhongzhu qid_in_pf = *(u16 *)resp_data; 3720c29d191Sliuzhongzhu 3730c29d191Sliuzhongzhu return qid_in_pf; 3740c29d191Sliuzhongzhu } 3750c29d191Sliuzhongzhu 3769c3e7130Sliuzhongzhu static int hclgevf_get_pf_media_type(struct hclgevf_dev *hdev) 3779c3e7130Sliuzhongzhu { 378d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 37988d10bd6SJian Shen u8 resp_msg[2]; 3809c3e7130Sliuzhongzhu int ret; 3819c3e7130Sliuzhongzhu 382d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MEDIA_TYPE, 0); 383d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 384d3410018SYufeng Mo sizeof(resp_msg)); 3859c3e7130Sliuzhongzhu if (ret) { 3869c3e7130Sliuzhongzhu dev_err(&hdev->pdev->dev, 3879c3e7130Sliuzhongzhu "VF request to get the pf port media type failed %d", 3889c3e7130Sliuzhongzhu ret); 3899c3e7130Sliuzhongzhu return ret; 3909c3e7130Sliuzhongzhu } 3919c3e7130Sliuzhongzhu 39288d10bd6SJian Shen hdev->hw.mac.media_type = resp_msg[0]; 39388d10bd6SJian Shen hdev->hw.mac.module_type = resp_msg[1]; 3949c3e7130Sliuzhongzhu 3959c3e7130Sliuzhongzhu return 0; 3969c3e7130Sliuzhongzhu } 3979c3e7130Sliuzhongzhu 398e2cb1decSSalil Mehta static int hclgevf_alloc_tqps(struct hclgevf_dev *hdev) 399e2cb1decSSalil Mehta { 400e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 401e2cb1decSSalil Mehta int i; 402e2cb1decSSalil Mehta 403e2cb1decSSalil Mehta hdev->htqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps, 404e2cb1decSSalil Mehta sizeof(struct hclgevf_tqp), GFP_KERNEL); 405e2cb1decSSalil Mehta if (!hdev->htqp) 406e2cb1decSSalil Mehta return -ENOMEM; 407e2cb1decSSalil Mehta 408e2cb1decSSalil Mehta tqp = hdev->htqp; 409e2cb1decSSalil Mehta 410e2cb1decSSalil Mehta for (i = 0; i < hdev->num_tqps; i++) { 411e2cb1decSSalil Mehta tqp->dev = &hdev->pdev->dev; 412e2cb1decSSalil Mehta tqp->index = i; 413e2cb1decSSalil Mehta 414e2cb1decSSalil Mehta tqp->q.ae_algo = &ae_algovf; 415e2cb1decSSalil Mehta tqp->q.buf_size = hdev->rx_buf_len; 416c0425944SPeng Li tqp->q.tx_desc_num = hdev->num_tx_desc; 417c0425944SPeng Li tqp->q.rx_desc_num = hdev->num_rx_desc; 4189a5ef4aaSYonglong Liu 4199a5ef4aaSYonglong Liu /* need an extended offset to configure queues >= 4209a5ef4aaSYonglong Liu * HCLGEVF_TQP_MAX_SIZE_DEV_V2. 4219a5ef4aaSYonglong Liu */ 4229a5ef4aaSYonglong Liu if (i < HCLGEVF_TQP_MAX_SIZE_DEV_V2) 4239a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4249a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 425e2cb1decSSalil Mehta i * HCLGEVF_TQP_REG_SIZE; 4269a5ef4aaSYonglong Liu else 4279a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4289a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 4299a5ef4aaSYonglong Liu HCLGEVF_TQP_EXT_REG_OFFSET + 4309a5ef4aaSYonglong Liu (i - HCLGEVF_TQP_MAX_SIZE_DEV_V2) * 4319a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_SIZE; 432e2cb1decSSalil Mehta 433e2cb1decSSalil Mehta tqp++; 434e2cb1decSSalil Mehta } 435e2cb1decSSalil Mehta 436e2cb1decSSalil Mehta return 0; 437e2cb1decSSalil Mehta } 438e2cb1decSSalil Mehta 439e2cb1decSSalil Mehta static int hclgevf_knic_setup(struct hclgevf_dev *hdev) 440e2cb1decSSalil Mehta { 441e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 442e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo; 443e2cb1decSSalil Mehta u16 new_tqps = hdev->num_tqps; 444ebaf1908SWeihang Li unsigned int i; 44535244430SJian Shen u8 num_tc = 0; 446e2cb1decSSalil Mehta 447e2cb1decSSalil Mehta kinfo = &nic->kinfo; 448c0425944SPeng Li kinfo->num_tx_desc = hdev->num_tx_desc; 449c0425944SPeng Li kinfo->num_rx_desc = hdev->num_rx_desc; 450e2cb1decSSalil Mehta kinfo->rx_buf_len = hdev->rx_buf_len; 451e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) 452e2cb1decSSalil Mehta if (hdev->hw_tc_map & BIT(i)) 45335244430SJian Shen num_tc++; 454e2cb1decSSalil Mehta 45535244430SJian Shen num_tc = num_tc ? num_tc : 1; 45635244430SJian Shen kinfo->tc_info.num_tc = num_tc; 45735244430SJian Shen kinfo->rss_size = min_t(u16, hdev->rss_size_max, new_tqps / num_tc); 45835244430SJian Shen new_tqps = kinfo->rss_size * num_tc; 459e2cb1decSSalil Mehta kinfo->num_tqps = min(new_tqps, hdev->num_tqps); 460e2cb1decSSalil Mehta 461e2cb1decSSalil Mehta kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, 462e2cb1decSSalil Mehta sizeof(struct hnae3_queue *), GFP_KERNEL); 463e2cb1decSSalil Mehta if (!kinfo->tqp) 464e2cb1decSSalil Mehta return -ENOMEM; 465e2cb1decSSalil Mehta 466e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 467e2cb1decSSalil Mehta hdev->htqp[i].q.handle = &hdev->nic; 468e2cb1decSSalil Mehta hdev->htqp[i].q.tqp_index = i; 469e2cb1decSSalil Mehta kinfo->tqp[i] = &hdev->htqp[i].q; 470e2cb1decSSalil Mehta } 471e2cb1decSSalil Mehta 472580a05f9SYonglong Liu /* after init the max rss_size and tqps, adjust the default tqp numbers 473580a05f9SYonglong Liu * and rss size with the actual vector numbers 474580a05f9SYonglong Liu */ 475580a05f9SYonglong Liu kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); 47635244430SJian Shen kinfo->rss_size = min_t(u16, kinfo->num_tqps / num_tc, 477580a05f9SYonglong Liu kinfo->rss_size); 478580a05f9SYonglong Liu 479e2cb1decSSalil Mehta return 0; 480e2cb1decSSalil Mehta } 481e2cb1decSSalil Mehta 482e2cb1decSSalil Mehta static void hclgevf_request_link_info(struct hclgevf_dev *hdev) 483e2cb1decSSalil Mehta { 484d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 485e2cb1decSSalil Mehta int status; 486e2cb1decSSalil Mehta 487d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_STATUS, 0); 488d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 489e2cb1decSSalil Mehta if (status) 490e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 491e2cb1decSSalil Mehta "VF failed to fetch link status(%d) from PF", status); 492e2cb1decSSalil Mehta } 493e2cb1decSSalil Mehta 494e2cb1decSSalil Mehta void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state) 495e2cb1decSSalil Mehta { 49645e92b7eSPeng Li struct hnae3_handle *rhandle = &hdev->roce; 497e2cb1decSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 49845e92b7eSPeng Li struct hnae3_client *rclient; 499e2cb1decSSalil Mehta struct hnae3_client *client; 500e2cb1decSSalil Mehta 501ff200099SYunsheng Lin if (test_and_set_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state)) 502ff200099SYunsheng Lin return; 503ff200099SYunsheng Lin 504e2cb1decSSalil Mehta client = handle->client; 50545e92b7eSPeng Li rclient = hdev->roce_client; 506e2cb1decSSalil Mehta 507582d37bbSPeng Li link_state = 508582d37bbSPeng Li test_bit(HCLGEVF_STATE_DOWN, &hdev->state) ? 0 : link_state; 509e2cb1decSSalil Mehta if (link_state != hdev->hw.mac.link) { 510b15c072aSYonglong Liu hdev->hw.mac.link = link_state; 511e2cb1decSSalil Mehta client->ops->link_status_change(handle, !!link_state); 51245e92b7eSPeng Li if (rclient && rclient->ops->link_status_change) 51345e92b7eSPeng Li rclient->ops->link_status_change(rhandle, !!link_state); 514e2cb1decSSalil Mehta } 515ff200099SYunsheng Lin 516ff200099SYunsheng Lin clear_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state); 517e2cb1decSSalil Mehta } 518e2cb1decSSalil Mehta 519538abaf3SYueHaibing static void hclgevf_update_link_mode(struct hclgevf_dev *hdev) 5209194d18bSliuzhongzhu { 5219194d18bSliuzhongzhu #define HCLGEVF_ADVERTISING 0 5229194d18bSliuzhongzhu #define HCLGEVF_SUPPORTED 1 5239194d18bSliuzhongzhu 524d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 525d3410018SYufeng Mo 526d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_MODE, 0); 527d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_ADVERTISING; 528d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 529d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_SUPPORTED; 530d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 5319194d18bSliuzhongzhu } 5329194d18bSliuzhongzhu 533e2cb1decSSalil Mehta static int hclgevf_set_handle_info(struct hclgevf_dev *hdev) 534e2cb1decSSalil Mehta { 535e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 536e2cb1decSSalil Mehta int ret; 537e2cb1decSSalil Mehta 538e2cb1decSSalil Mehta nic->ae_algo = &ae_algovf; 539e2cb1decSSalil Mehta nic->pdev = hdev->pdev; 540e2cb1decSSalil Mehta nic->numa_node_mask = hdev->numa_node_mask; 541424eb834SSalil Mehta nic->flags |= HNAE3_SUPPORT_VF; 5429f0c6f4bSYufeng Mo nic->kinfo.io_base = hdev->hw.io_base; 543e2cb1decSSalil Mehta 544e2cb1decSSalil Mehta ret = hclgevf_knic_setup(hdev); 545e2cb1decSSalil Mehta if (ret) 546e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF knic setup failed %d\n", 547e2cb1decSSalil Mehta ret); 548e2cb1decSSalil Mehta return ret; 549e2cb1decSSalil Mehta } 550e2cb1decSSalil Mehta 551e2cb1decSSalil Mehta static void hclgevf_free_vector(struct hclgevf_dev *hdev, int vector_id) 552e2cb1decSSalil Mehta { 55336cbbdf6SPeng Li if (hdev->vector_status[vector_id] == HCLGEVF_INVALID_VPORT) { 55436cbbdf6SPeng Li dev_warn(&hdev->pdev->dev, 55536cbbdf6SPeng Li "vector(vector_id %d) has been freed.\n", vector_id); 55636cbbdf6SPeng Li return; 55736cbbdf6SPeng Li } 55836cbbdf6SPeng Li 559e2cb1decSSalil Mehta hdev->vector_status[vector_id] = HCLGEVF_INVALID_VPORT; 560e2cb1decSSalil Mehta hdev->num_msi_left += 1; 561e2cb1decSSalil Mehta hdev->num_msi_used -= 1; 562e2cb1decSSalil Mehta } 563e2cb1decSSalil Mehta 564e2cb1decSSalil Mehta static int hclgevf_get_vector(struct hnae3_handle *handle, u16 vector_num, 565e2cb1decSSalil Mehta struct hnae3_vector_info *vector_info) 566e2cb1decSSalil Mehta { 567e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 568e2cb1decSSalil Mehta struct hnae3_vector_info *vector = vector_info; 569e2cb1decSSalil Mehta int alloc = 0; 570e2cb1decSSalil Mehta int i, j; 571e2cb1decSSalil Mehta 572580a05f9SYonglong Liu vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num); 573e2cb1decSSalil Mehta vector_num = min(hdev->num_msi_left, vector_num); 574e2cb1decSSalil Mehta 575e2cb1decSSalil Mehta for (j = 0; j < vector_num; j++) { 576e2cb1decSSalil Mehta for (i = HCLGEVF_MISC_VECTOR_NUM + 1; i < hdev->num_msi; i++) { 577e2cb1decSSalil Mehta if (hdev->vector_status[i] == HCLGEVF_INVALID_VPORT) { 578e2cb1decSSalil Mehta vector->vector = pci_irq_vector(hdev->pdev, i); 579e2cb1decSSalil Mehta vector->io_addr = hdev->hw.io_base + 580e2cb1decSSalil Mehta HCLGEVF_VECTOR_REG_BASE + 581e2cb1decSSalil Mehta (i - 1) * HCLGEVF_VECTOR_REG_OFFSET; 582e2cb1decSSalil Mehta hdev->vector_status[i] = 0; 583e2cb1decSSalil Mehta hdev->vector_irq[i] = vector->vector; 584e2cb1decSSalil Mehta 585e2cb1decSSalil Mehta vector++; 586e2cb1decSSalil Mehta alloc++; 587e2cb1decSSalil Mehta 588e2cb1decSSalil Mehta break; 589e2cb1decSSalil Mehta } 590e2cb1decSSalil Mehta } 591e2cb1decSSalil Mehta } 592e2cb1decSSalil Mehta hdev->num_msi_left -= alloc; 593e2cb1decSSalil Mehta hdev->num_msi_used += alloc; 594e2cb1decSSalil Mehta 595e2cb1decSSalil Mehta return alloc; 596e2cb1decSSalil Mehta } 597e2cb1decSSalil Mehta 598e2cb1decSSalil Mehta static int hclgevf_get_vector_index(struct hclgevf_dev *hdev, int vector) 599e2cb1decSSalil Mehta { 600e2cb1decSSalil Mehta int i; 601e2cb1decSSalil Mehta 602e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 603e2cb1decSSalil Mehta if (vector == hdev->vector_irq[i]) 604e2cb1decSSalil Mehta return i; 605e2cb1decSSalil Mehta 606e2cb1decSSalil Mehta return -EINVAL; 607e2cb1decSSalil Mehta } 608e2cb1decSSalil Mehta 609374ad291SJian Shen static int hclgevf_set_rss_algo_key(struct hclgevf_dev *hdev, 610374ad291SJian Shen const u8 hfunc, const u8 *key) 611374ad291SJian Shen { 612374ad291SJian Shen struct hclgevf_rss_config_cmd *req; 613ebaf1908SWeihang Li unsigned int key_offset = 0; 614374ad291SJian Shen struct hclgevf_desc desc; 6153caf772bSYufeng Mo int key_counts; 616374ad291SJian Shen int key_size; 617374ad291SJian Shen int ret; 618374ad291SJian Shen 6193caf772bSYufeng Mo key_counts = HCLGEVF_RSS_KEY_SIZE; 620374ad291SJian Shen req = (struct hclgevf_rss_config_cmd *)desc.data; 621374ad291SJian Shen 6223caf772bSYufeng Mo while (key_counts) { 623374ad291SJian Shen hclgevf_cmd_setup_basic_desc(&desc, 624374ad291SJian Shen HCLGEVF_OPC_RSS_GENERIC_CONFIG, 625374ad291SJian Shen false); 626374ad291SJian Shen 627374ad291SJian Shen req->hash_config |= (hfunc & HCLGEVF_RSS_HASH_ALGO_MASK); 628374ad291SJian Shen req->hash_config |= 629374ad291SJian Shen (key_offset << HCLGEVF_RSS_HASH_KEY_OFFSET_B); 630374ad291SJian Shen 6313caf772bSYufeng Mo key_size = min(HCLGEVF_RSS_HASH_KEY_NUM, key_counts); 632374ad291SJian Shen memcpy(req->hash_key, 633374ad291SJian Shen key + key_offset * HCLGEVF_RSS_HASH_KEY_NUM, key_size); 634374ad291SJian Shen 6353caf772bSYufeng Mo key_counts -= key_size; 6363caf772bSYufeng Mo key_offset++; 637374ad291SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 638374ad291SJian Shen if (ret) { 639374ad291SJian Shen dev_err(&hdev->pdev->dev, 640374ad291SJian Shen "Configure RSS config fail, status = %d\n", 641374ad291SJian Shen ret); 642374ad291SJian Shen return ret; 643374ad291SJian Shen } 644374ad291SJian Shen } 645374ad291SJian Shen 646374ad291SJian Shen return 0; 647374ad291SJian Shen } 648374ad291SJian Shen 649e2cb1decSSalil Mehta static u32 hclgevf_get_rss_key_size(struct hnae3_handle *handle) 650e2cb1decSSalil Mehta { 651e2cb1decSSalil Mehta return HCLGEVF_RSS_KEY_SIZE; 652e2cb1decSSalil Mehta } 653e2cb1decSSalil Mehta 654e2cb1decSSalil Mehta static int hclgevf_set_rss_indir_table(struct hclgevf_dev *hdev) 655e2cb1decSSalil Mehta { 656e2cb1decSSalil Mehta const u8 *indir = hdev->rss_cfg.rss_indirection_tbl; 657e2cb1decSSalil Mehta struct hclgevf_rss_indirection_table_cmd *req; 658e2cb1decSSalil Mehta struct hclgevf_desc desc; 65987ce161eSGuangbin Huang int rss_cfg_tbl_num; 660e2cb1decSSalil Mehta int status; 661e2cb1decSSalil Mehta int i, j; 662e2cb1decSSalil Mehta 663e2cb1decSSalil Mehta req = (struct hclgevf_rss_indirection_table_cmd *)desc.data; 66487ce161eSGuangbin Huang rss_cfg_tbl_num = hdev->ae_dev->dev_specs.rss_ind_tbl_size / 66587ce161eSGuangbin Huang HCLGEVF_RSS_CFG_TBL_SIZE; 666e2cb1decSSalil Mehta 66787ce161eSGuangbin Huang for (i = 0; i < rss_cfg_tbl_num; i++) { 668e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INDIR_TABLE, 669e2cb1decSSalil Mehta false); 67055ff3ed5SJian Shen req->start_table_index = 67155ff3ed5SJian Shen cpu_to_le16(i * HCLGEVF_RSS_CFG_TBL_SIZE); 67255ff3ed5SJian Shen req->rss_set_bitmap = cpu_to_le16(HCLGEVF_RSS_SET_BITMAP_MSK); 673e2cb1decSSalil Mehta for (j = 0; j < HCLGEVF_RSS_CFG_TBL_SIZE; j++) 674e2cb1decSSalil Mehta req->rss_result[j] = 675e2cb1decSSalil Mehta indir[i * HCLGEVF_RSS_CFG_TBL_SIZE + j]; 676e2cb1decSSalil Mehta 677e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 678e2cb1decSSalil Mehta if (status) { 679e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 680e2cb1decSSalil Mehta "VF failed(=%d) to set RSS indirection table\n", 681e2cb1decSSalil Mehta status); 682e2cb1decSSalil Mehta return status; 683e2cb1decSSalil Mehta } 684e2cb1decSSalil Mehta } 685e2cb1decSSalil Mehta 686e2cb1decSSalil Mehta return 0; 687e2cb1decSSalil Mehta } 688e2cb1decSSalil Mehta 689e2cb1decSSalil Mehta static int hclgevf_set_rss_tc_mode(struct hclgevf_dev *hdev, u16 rss_size) 690e2cb1decSSalil Mehta { 691e2cb1decSSalil Mehta struct hclgevf_rss_tc_mode_cmd *req; 692e2cb1decSSalil Mehta u16 tc_offset[HCLGEVF_MAX_TC_NUM]; 693e2cb1decSSalil Mehta u16 tc_valid[HCLGEVF_MAX_TC_NUM]; 694e2cb1decSSalil Mehta u16 tc_size[HCLGEVF_MAX_TC_NUM]; 695e2cb1decSSalil Mehta struct hclgevf_desc desc; 696e2cb1decSSalil Mehta u16 roundup_size; 697ebaf1908SWeihang Li unsigned int i; 6982adb8187SHuazhong Tan int status; 699e2cb1decSSalil Mehta 700e2cb1decSSalil Mehta req = (struct hclgevf_rss_tc_mode_cmd *)desc.data; 701e2cb1decSSalil Mehta 702e2cb1decSSalil Mehta roundup_size = roundup_pow_of_two(rss_size); 703e2cb1decSSalil Mehta roundup_size = ilog2(roundup_size); 704e2cb1decSSalil Mehta 705e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 706e2cb1decSSalil Mehta tc_valid[i] = !!(hdev->hw_tc_map & BIT(i)); 707e2cb1decSSalil Mehta tc_size[i] = roundup_size; 708e2cb1decSSalil Mehta tc_offset[i] = rss_size * i; 709e2cb1decSSalil Mehta } 710e2cb1decSSalil Mehta 711e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_TC_MODE, false); 712e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 71355ff3ed5SJian Shen u16 mode = 0; 71455ff3ed5SJian Shen 71555ff3ed5SJian Shen hnae3_set_bit(mode, HCLGEVF_RSS_TC_VALID_B, 716e2cb1decSSalil Mehta (tc_valid[i] & 0x1)); 71755ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_SIZE_M, 718e2cb1decSSalil Mehta HCLGEVF_RSS_TC_SIZE_S, tc_size[i]); 71933a8f764SGuojia Liao hnae3_set_bit(mode, HCLGEVF_RSS_TC_SIZE_MSB_B, 72033a8f764SGuojia Liao tc_size[i] >> HCLGEVF_RSS_TC_SIZE_MSB_OFFSET & 72133a8f764SGuojia Liao 0x1); 72255ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_OFFSET_M, 723e2cb1decSSalil Mehta HCLGEVF_RSS_TC_OFFSET_S, tc_offset[i]); 72455ff3ed5SJian Shen 72555ff3ed5SJian Shen req->rss_tc_mode[i] = cpu_to_le16(mode); 726e2cb1decSSalil Mehta } 727e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 728e2cb1decSSalil Mehta if (status) 729e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 730e2cb1decSSalil Mehta "VF failed(=%d) to set rss tc mode\n", status); 731e2cb1decSSalil Mehta 732e2cb1decSSalil Mehta return status; 733e2cb1decSSalil Mehta } 734e2cb1decSSalil Mehta 735a638b1d8SJian Shen /* for revision 0x20, vf shared the same rss config with pf */ 736a638b1d8SJian Shen static int hclgevf_get_rss_hash_key(struct hclgevf_dev *hdev) 737a638b1d8SJian Shen { 738a638b1d8SJian Shen #define HCLGEVF_RSS_MBX_RESP_LEN 8 739a638b1d8SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 740a638b1d8SJian Shen u8 resp_msg[HCLGEVF_RSS_MBX_RESP_LEN]; 741d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 742a638b1d8SJian Shen u16 msg_num, hash_key_index; 743a638b1d8SJian Shen u8 index; 744a638b1d8SJian Shen int ret; 745a638b1d8SJian Shen 746d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_RSS_KEY, 0); 747a638b1d8SJian Shen msg_num = (HCLGEVF_RSS_KEY_SIZE + HCLGEVF_RSS_MBX_RESP_LEN - 1) / 748a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN; 749a638b1d8SJian Shen for (index = 0; index < msg_num; index++) { 750d3410018SYufeng Mo send_msg.data[0] = index; 751d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 752a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN); 753a638b1d8SJian Shen if (ret) { 754a638b1d8SJian Shen dev_err(&hdev->pdev->dev, 755a638b1d8SJian Shen "VF get rss hash key from PF failed, ret=%d", 756a638b1d8SJian Shen ret); 757a638b1d8SJian Shen return ret; 758a638b1d8SJian Shen } 759a638b1d8SJian Shen 760a638b1d8SJian Shen hash_key_index = HCLGEVF_RSS_MBX_RESP_LEN * index; 761a638b1d8SJian Shen if (index == msg_num - 1) 762a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 763a638b1d8SJian Shen &resp_msg[0], 764a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE - hash_key_index); 765a638b1d8SJian Shen else 766a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 767a638b1d8SJian Shen &resp_msg[0], HCLGEVF_RSS_MBX_RESP_LEN); 768a638b1d8SJian Shen } 769a638b1d8SJian Shen 770a638b1d8SJian Shen return 0; 771a638b1d8SJian Shen } 772a638b1d8SJian Shen 773e2cb1decSSalil Mehta static int hclgevf_get_rss(struct hnae3_handle *handle, u32 *indir, u8 *key, 774e2cb1decSSalil Mehta u8 *hfunc) 775e2cb1decSSalil Mehta { 776e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 777e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 778a638b1d8SJian Shen int i, ret; 779e2cb1decSSalil Mehta 780295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 781374ad291SJian Shen /* Get hash algorithm */ 782374ad291SJian Shen if (hfunc) { 783374ad291SJian Shen switch (rss_cfg->hash_algo) { 784374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_TOEPLITZ: 785374ad291SJian Shen *hfunc = ETH_RSS_HASH_TOP; 786374ad291SJian Shen break; 787374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_SIMPLE: 788374ad291SJian Shen *hfunc = ETH_RSS_HASH_XOR; 789374ad291SJian Shen break; 790374ad291SJian Shen default: 791374ad291SJian Shen *hfunc = ETH_RSS_HASH_UNKNOWN; 792374ad291SJian Shen break; 793374ad291SJian Shen } 794374ad291SJian Shen } 795374ad291SJian Shen 796374ad291SJian Shen /* Get the RSS Key required by the user */ 797374ad291SJian Shen if (key) 798374ad291SJian Shen memcpy(key, rss_cfg->rss_hash_key, 799374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 800a638b1d8SJian Shen } else { 801a638b1d8SJian Shen if (hfunc) 802a638b1d8SJian Shen *hfunc = ETH_RSS_HASH_TOP; 803a638b1d8SJian Shen if (key) { 804a638b1d8SJian Shen ret = hclgevf_get_rss_hash_key(hdev); 805a638b1d8SJian Shen if (ret) 806a638b1d8SJian Shen return ret; 807a638b1d8SJian Shen memcpy(key, rss_cfg->rss_hash_key, 808a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE); 809a638b1d8SJian Shen } 810374ad291SJian Shen } 811374ad291SJian Shen 812e2cb1decSSalil Mehta if (indir) 81387ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 814e2cb1decSSalil Mehta indir[i] = rss_cfg->rss_indirection_tbl[i]; 815e2cb1decSSalil Mehta 816374ad291SJian Shen return 0; 817e2cb1decSSalil Mehta } 818e2cb1decSSalil Mehta 819e2cb1decSSalil Mehta static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir, 820e2cb1decSSalil Mehta const u8 *key, const u8 hfunc) 821e2cb1decSSalil Mehta { 822e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 823e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 824374ad291SJian Shen int ret, i; 825374ad291SJian Shen 826295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 827374ad291SJian Shen /* Set the RSS Hash Key if specififed by the user */ 828374ad291SJian Shen if (key) { 829374ad291SJian Shen switch (hfunc) { 830374ad291SJian Shen case ETH_RSS_HASH_TOP: 831374ad291SJian Shen rss_cfg->hash_algo = 832374ad291SJian Shen HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 833374ad291SJian Shen break; 834374ad291SJian Shen case ETH_RSS_HASH_XOR: 835374ad291SJian Shen rss_cfg->hash_algo = 836374ad291SJian Shen HCLGEVF_RSS_HASH_ALGO_SIMPLE; 837374ad291SJian Shen break; 838374ad291SJian Shen case ETH_RSS_HASH_NO_CHANGE: 839374ad291SJian Shen break; 840374ad291SJian Shen default: 841374ad291SJian Shen return -EINVAL; 842374ad291SJian Shen } 843374ad291SJian Shen 844374ad291SJian Shen ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo, 845374ad291SJian Shen key); 846374ad291SJian Shen if (ret) 847374ad291SJian Shen return ret; 848374ad291SJian Shen 849374ad291SJian Shen /* Update the shadow RSS key with user specified qids */ 850374ad291SJian Shen memcpy(rss_cfg->rss_hash_key, key, 851374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 852374ad291SJian Shen } 853374ad291SJian Shen } 854e2cb1decSSalil Mehta 855e2cb1decSSalil Mehta /* update the shadow RSS table with user specified qids */ 85687ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 857e2cb1decSSalil Mehta rss_cfg->rss_indirection_tbl[i] = indir[i]; 858e2cb1decSSalil Mehta 859e2cb1decSSalil Mehta /* update the hardware */ 860e2cb1decSSalil Mehta return hclgevf_set_rss_indir_table(hdev); 861e2cb1decSSalil Mehta } 862e2cb1decSSalil Mehta 863d97b3072SJian Shen static u8 hclgevf_get_rss_hash_bits(struct ethtool_rxnfc *nfc) 864d97b3072SJian Shen { 865d97b3072SJian Shen u8 hash_sets = nfc->data & RXH_L4_B_0_1 ? HCLGEVF_S_PORT_BIT : 0; 866d97b3072SJian Shen 867d97b3072SJian Shen if (nfc->data & RXH_L4_B_2_3) 868d97b3072SJian Shen hash_sets |= HCLGEVF_D_PORT_BIT; 869d97b3072SJian Shen else 870d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_PORT_BIT; 871d97b3072SJian Shen 872d97b3072SJian Shen if (nfc->data & RXH_IP_SRC) 873d97b3072SJian Shen hash_sets |= HCLGEVF_S_IP_BIT; 874d97b3072SJian Shen else 875d97b3072SJian Shen hash_sets &= ~HCLGEVF_S_IP_BIT; 876d97b3072SJian Shen 877d97b3072SJian Shen if (nfc->data & RXH_IP_DST) 878d97b3072SJian Shen hash_sets |= HCLGEVF_D_IP_BIT; 879d97b3072SJian Shen else 880d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_IP_BIT; 881d97b3072SJian Shen 882d97b3072SJian Shen if (nfc->flow_type == SCTP_V4_FLOW || nfc->flow_type == SCTP_V6_FLOW) 883d97b3072SJian Shen hash_sets |= HCLGEVF_V_TAG_BIT; 884d97b3072SJian Shen 885d97b3072SJian Shen return hash_sets; 886d97b3072SJian Shen } 887d97b3072SJian Shen 8885fd0e7b4SHuazhong Tan static int hclgevf_init_rss_tuple_cmd(struct hnae3_handle *handle, 8895fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc, 8905fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req) 891d97b3072SJian Shen { 892d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 893d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 894d97b3072SJian Shen u8 tuple_sets; 895d97b3072SJian Shen 896d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 897d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 898d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 899d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 900d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 901d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 902d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 903d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 904d97b3072SJian Shen 905d97b3072SJian Shen tuple_sets = hclgevf_get_rss_hash_bits(nfc); 906d97b3072SJian Shen switch (nfc->flow_type) { 907d97b3072SJian Shen case TCP_V4_FLOW: 908d97b3072SJian Shen req->ipv4_tcp_en = tuple_sets; 909d97b3072SJian Shen break; 910d97b3072SJian Shen case TCP_V6_FLOW: 911d97b3072SJian Shen req->ipv6_tcp_en = tuple_sets; 912d97b3072SJian Shen break; 913d97b3072SJian Shen case UDP_V4_FLOW: 914d97b3072SJian Shen req->ipv4_udp_en = tuple_sets; 915d97b3072SJian Shen break; 916d97b3072SJian Shen case UDP_V6_FLOW: 917d97b3072SJian Shen req->ipv6_udp_en = tuple_sets; 918d97b3072SJian Shen break; 919d97b3072SJian Shen case SCTP_V4_FLOW: 920d97b3072SJian Shen req->ipv4_sctp_en = tuple_sets; 921d97b3072SJian Shen break; 922d97b3072SJian Shen case SCTP_V6_FLOW: 923ab6e32d2SJian Shen if (hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 && 924ab6e32d2SJian Shen (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3))) 925d97b3072SJian Shen return -EINVAL; 926d97b3072SJian Shen 927d97b3072SJian Shen req->ipv6_sctp_en = tuple_sets; 928d97b3072SJian Shen break; 929d97b3072SJian Shen case IPV4_FLOW: 930d97b3072SJian Shen req->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 931d97b3072SJian Shen break; 932d97b3072SJian Shen case IPV6_FLOW: 933d97b3072SJian Shen req->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 934d97b3072SJian Shen break; 935d97b3072SJian Shen default: 936d97b3072SJian Shen return -EINVAL; 937d97b3072SJian Shen } 938d97b3072SJian Shen 9395fd0e7b4SHuazhong Tan return 0; 9405fd0e7b4SHuazhong Tan } 9415fd0e7b4SHuazhong Tan 9425fd0e7b4SHuazhong Tan static int hclgevf_set_rss_tuple(struct hnae3_handle *handle, 9435fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc) 9445fd0e7b4SHuazhong Tan { 9455fd0e7b4SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 9465fd0e7b4SHuazhong Tan struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 9475fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req; 9485fd0e7b4SHuazhong Tan struct hclgevf_desc desc; 9495fd0e7b4SHuazhong Tan int ret; 9505fd0e7b4SHuazhong Tan 9515fd0e7b4SHuazhong Tan if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 9525fd0e7b4SHuazhong Tan return -EOPNOTSUPP; 9535fd0e7b4SHuazhong Tan 9545fd0e7b4SHuazhong Tan if (nfc->data & 9555fd0e7b4SHuazhong Tan ~(RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)) 9565fd0e7b4SHuazhong Tan return -EINVAL; 9575fd0e7b4SHuazhong Tan 9585fd0e7b4SHuazhong Tan req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 9595fd0e7b4SHuazhong Tan hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 9605fd0e7b4SHuazhong Tan 9615fd0e7b4SHuazhong Tan ret = hclgevf_init_rss_tuple_cmd(handle, nfc, req); 9625fd0e7b4SHuazhong Tan if (ret) { 9635fd0e7b4SHuazhong Tan dev_err(&hdev->pdev->dev, 9645fd0e7b4SHuazhong Tan "failed to init rss tuple cmd, ret = %d\n", ret); 9655fd0e7b4SHuazhong Tan return ret; 9665fd0e7b4SHuazhong Tan } 9675fd0e7b4SHuazhong Tan 968d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 969d97b3072SJian Shen if (ret) { 970d97b3072SJian Shen dev_err(&hdev->pdev->dev, 971d97b3072SJian Shen "Set rss tuple fail, status = %d\n", ret); 972d97b3072SJian Shen return ret; 973d97b3072SJian Shen } 974d97b3072SJian Shen 975d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_tcp_en = req->ipv4_tcp_en; 976d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_udp_en = req->ipv4_udp_en; 977d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_sctp_en = req->ipv4_sctp_en; 978d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_fragment_en = req->ipv4_fragment_en; 979d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_tcp_en = req->ipv6_tcp_en; 980d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_udp_en = req->ipv6_udp_en; 981d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_sctp_en = req->ipv6_sctp_en; 982d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_fragment_en = req->ipv6_fragment_en; 983d97b3072SJian Shen return 0; 984d97b3072SJian Shen } 985d97b3072SJian Shen 98673f7767eSJian Shen static int hclgevf_get_rss_tuple_by_flow_type(struct hclgevf_dev *hdev, 98773f7767eSJian Shen int flow_type, u8 *tuple_sets) 98873f7767eSJian Shen { 98973f7767eSJian Shen switch (flow_type) { 99073f7767eSJian Shen case TCP_V4_FLOW: 99173f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_tcp_en; 99273f7767eSJian Shen break; 99373f7767eSJian Shen case UDP_V4_FLOW: 99473f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_udp_en; 99573f7767eSJian Shen break; 99673f7767eSJian Shen case TCP_V6_FLOW: 99773f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_tcp_en; 99873f7767eSJian Shen break; 99973f7767eSJian Shen case UDP_V6_FLOW: 100073f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_udp_en; 100173f7767eSJian Shen break; 100273f7767eSJian Shen case SCTP_V4_FLOW: 100373f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_sctp_en; 100473f7767eSJian Shen break; 100573f7767eSJian Shen case SCTP_V6_FLOW: 100673f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_sctp_en; 100773f7767eSJian Shen break; 100873f7767eSJian Shen case IPV4_FLOW: 100973f7767eSJian Shen case IPV6_FLOW: 101073f7767eSJian Shen *tuple_sets = HCLGEVF_S_IP_BIT | HCLGEVF_D_IP_BIT; 101173f7767eSJian Shen break; 101273f7767eSJian Shen default: 101373f7767eSJian Shen return -EINVAL; 101473f7767eSJian Shen } 101573f7767eSJian Shen 101673f7767eSJian Shen return 0; 101773f7767eSJian Shen } 101873f7767eSJian Shen 101973f7767eSJian Shen static u64 hclgevf_convert_rss_tuple(u8 tuple_sets) 102073f7767eSJian Shen { 102173f7767eSJian Shen u64 tuple_data = 0; 102273f7767eSJian Shen 102373f7767eSJian Shen if (tuple_sets & HCLGEVF_D_PORT_BIT) 102473f7767eSJian Shen tuple_data |= RXH_L4_B_2_3; 102573f7767eSJian Shen if (tuple_sets & HCLGEVF_S_PORT_BIT) 102673f7767eSJian Shen tuple_data |= RXH_L4_B_0_1; 102773f7767eSJian Shen if (tuple_sets & HCLGEVF_D_IP_BIT) 102873f7767eSJian Shen tuple_data |= RXH_IP_DST; 102973f7767eSJian Shen if (tuple_sets & HCLGEVF_S_IP_BIT) 103073f7767eSJian Shen tuple_data |= RXH_IP_SRC; 103173f7767eSJian Shen 103273f7767eSJian Shen return tuple_data; 103373f7767eSJian Shen } 103473f7767eSJian Shen 1035d97b3072SJian Shen static int hclgevf_get_rss_tuple(struct hnae3_handle *handle, 1036d97b3072SJian Shen struct ethtool_rxnfc *nfc) 1037d97b3072SJian Shen { 1038d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1039d97b3072SJian Shen u8 tuple_sets; 104073f7767eSJian Shen int ret; 1041d97b3072SJian Shen 1042295ba232SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 1043d97b3072SJian Shen return -EOPNOTSUPP; 1044d97b3072SJian Shen 1045d97b3072SJian Shen nfc->data = 0; 1046d97b3072SJian Shen 104773f7767eSJian Shen ret = hclgevf_get_rss_tuple_by_flow_type(hdev, nfc->flow_type, 104873f7767eSJian Shen &tuple_sets); 104973f7767eSJian Shen if (ret || !tuple_sets) 105073f7767eSJian Shen return ret; 1051d97b3072SJian Shen 105273f7767eSJian Shen nfc->data = hclgevf_convert_rss_tuple(tuple_sets); 1053d97b3072SJian Shen 1054d97b3072SJian Shen return 0; 1055d97b3072SJian Shen } 1056d97b3072SJian Shen 1057d97b3072SJian Shen static int hclgevf_set_rss_input_tuple(struct hclgevf_dev *hdev, 1058d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg) 1059d97b3072SJian Shen { 1060d97b3072SJian Shen struct hclgevf_rss_input_tuple_cmd *req; 1061d97b3072SJian Shen struct hclgevf_desc desc; 1062d97b3072SJian Shen int ret; 1063d97b3072SJian Shen 1064d97b3072SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 1065d97b3072SJian Shen 1066d97b3072SJian Shen req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 1067d97b3072SJian Shen 1068d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 1069d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 1070d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 1071d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 1072d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 1073d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 1074d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 1075d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 1076d97b3072SJian Shen 1077d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 1078d97b3072SJian Shen if (ret) 1079d97b3072SJian Shen dev_err(&hdev->pdev->dev, 1080d97b3072SJian Shen "Configure rss input fail, status = %d\n", ret); 1081d97b3072SJian Shen return ret; 1082d97b3072SJian Shen } 1083d97b3072SJian Shen 1084e2cb1decSSalil Mehta static int hclgevf_get_tc_size(struct hnae3_handle *handle) 1085e2cb1decSSalil Mehta { 1086e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1087e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 1088e2cb1decSSalil Mehta 1089e2cb1decSSalil Mehta return rss_cfg->rss_size; 1090e2cb1decSSalil Mehta } 1091e2cb1decSSalil Mehta 1092e2cb1decSSalil Mehta static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en, 1093b204bc74SPeng Li int vector_id, 1094e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1095e2cb1decSSalil Mehta { 1096e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1097d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1098e2cb1decSSalil Mehta struct hnae3_ring_chain_node *node; 1099e2cb1decSSalil Mehta int status; 1100d3410018SYufeng Mo int i = 0; 1101e2cb1decSSalil Mehta 1102d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1103d3410018SYufeng Mo send_msg.code = en ? HCLGE_MBX_MAP_RING_TO_VECTOR : 1104c09ba484SPeng Li HCLGE_MBX_UNMAP_RING_TO_VECTOR; 1105d3410018SYufeng Mo send_msg.vector_id = vector_id; 1106e2cb1decSSalil Mehta 1107e2cb1decSSalil Mehta for (node = ring_chain; node; node = node->next) { 1108d3410018SYufeng Mo send_msg.param[i].ring_type = 1109e4e87715SPeng Li hnae3_get_bit(node->flag, HNAE3_RING_TYPE_B); 1110d3410018SYufeng Mo 1111d3410018SYufeng Mo send_msg.param[i].tqp_index = node->tqp_index; 1112d3410018SYufeng Mo send_msg.param[i].int_gl_index = 1113d3410018SYufeng Mo hnae3_get_field(node->int_gl_idx, 111479eee410SFuyun Liang HNAE3_RING_GL_IDX_M, 111579eee410SFuyun Liang HNAE3_RING_GL_IDX_S); 111679eee410SFuyun Liang 11175d02a58dSYunsheng Lin i++; 1118d3410018SYufeng Mo if (i == HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM || !node->next) { 1119d3410018SYufeng Mo send_msg.ring_num = i; 1120e2cb1decSSalil Mehta 1121d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, 1122d3410018SYufeng Mo NULL, 0); 1123e2cb1decSSalil Mehta if (status) { 1124e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1125e2cb1decSSalil Mehta "Map TQP fail, status is %d.\n", 1126e2cb1decSSalil Mehta status); 1127e2cb1decSSalil Mehta return status; 1128e2cb1decSSalil Mehta } 1129e2cb1decSSalil Mehta i = 0; 1130e2cb1decSSalil Mehta } 1131e2cb1decSSalil Mehta } 1132e2cb1decSSalil Mehta 1133e2cb1decSSalil Mehta return 0; 1134e2cb1decSSalil Mehta } 1135e2cb1decSSalil Mehta 1136e2cb1decSSalil Mehta static int hclgevf_map_ring_to_vector(struct hnae3_handle *handle, int vector, 1137e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1138e2cb1decSSalil Mehta { 1139b204bc74SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1140b204bc74SPeng Li int vector_id; 1141b204bc74SPeng Li 1142b204bc74SPeng Li vector_id = hclgevf_get_vector_index(hdev, vector); 1143b204bc74SPeng Li if (vector_id < 0) { 1144b204bc74SPeng Li dev_err(&handle->pdev->dev, 1145b204bc74SPeng Li "Get vector index fail. ret =%d\n", vector_id); 1146b204bc74SPeng Li return vector_id; 1147b204bc74SPeng Li } 1148b204bc74SPeng Li 1149b204bc74SPeng Li return hclgevf_bind_ring_to_vector(handle, true, vector_id, ring_chain); 1150e2cb1decSSalil Mehta } 1151e2cb1decSSalil Mehta 1152e2cb1decSSalil Mehta static int hclgevf_unmap_ring_from_vector( 1153e2cb1decSSalil Mehta struct hnae3_handle *handle, 1154e2cb1decSSalil Mehta int vector, 1155e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1156e2cb1decSSalil Mehta { 1157e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1158e2cb1decSSalil Mehta int ret, vector_id; 1159e2cb1decSSalil Mehta 1160dea846e8SHuazhong Tan if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) 1161dea846e8SHuazhong Tan return 0; 1162dea846e8SHuazhong Tan 1163e2cb1decSSalil Mehta vector_id = hclgevf_get_vector_index(hdev, vector); 1164e2cb1decSSalil Mehta if (vector_id < 0) { 1165e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1166e2cb1decSSalil Mehta "Get vector index fail. ret =%d\n", vector_id); 1167e2cb1decSSalil Mehta return vector_id; 1168e2cb1decSSalil Mehta } 1169e2cb1decSSalil Mehta 1170b204bc74SPeng Li ret = hclgevf_bind_ring_to_vector(handle, false, vector_id, ring_chain); 11710d3e6631SYunsheng Lin if (ret) 1172e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1173e2cb1decSSalil Mehta "Unmap ring from vector fail. vector=%d, ret =%d\n", 1174e2cb1decSSalil Mehta vector_id, 1175e2cb1decSSalil Mehta ret); 11760d3e6631SYunsheng Lin 1177e2cb1decSSalil Mehta return ret; 1178e2cb1decSSalil Mehta } 1179e2cb1decSSalil Mehta 11800d3e6631SYunsheng Lin static int hclgevf_put_vector(struct hnae3_handle *handle, int vector) 11810d3e6631SYunsheng Lin { 11820d3e6631SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 118303718db9SYunsheng Lin int vector_id; 11840d3e6631SYunsheng Lin 118503718db9SYunsheng Lin vector_id = hclgevf_get_vector_index(hdev, vector); 118603718db9SYunsheng Lin if (vector_id < 0) { 118703718db9SYunsheng Lin dev_err(&handle->pdev->dev, 118803718db9SYunsheng Lin "hclgevf_put_vector get vector index fail. ret =%d\n", 118903718db9SYunsheng Lin vector_id); 119003718db9SYunsheng Lin return vector_id; 119103718db9SYunsheng Lin } 119203718db9SYunsheng Lin 119303718db9SYunsheng Lin hclgevf_free_vector(hdev, vector_id); 1194e2cb1decSSalil Mehta 1195e2cb1decSSalil Mehta return 0; 1196e2cb1decSSalil Mehta } 1197e2cb1decSSalil Mehta 11983b75c3dfSPeng Li static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev *hdev, 1199e196ec75SJian Shen bool en_uc_pmc, bool en_mc_pmc, 1200f01f5559SJian Shen bool en_bc_pmc) 1201e2cb1decSSalil Mehta { 12025e7414cdSJian Shen struct hnae3_handle *handle = &hdev->nic; 1203d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1204f01f5559SJian Shen int ret; 1205e2cb1decSSalil Mehta 1206d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1207d3410018SYufeng Mo send_msg.code = HCLGE_MBX_SET_PROMISC_MODE; 1208d3410018SYufeng Mo send_msg.en_bc = en_bc_pmc ? 1 : 0; 1209d3410018SYufeng Mo send_msg.en_uc = en_uc_pmc ? 1 : 0; 1210d3410018SYufeng Mo send_msg.en_mc = en_mc_pmc ? 1 : 0; 12115e7414cdSJian Shen send_msg.en_limit_promisc = test_bit(HNAE3_PFLAG_LIMIT_PROMISC, 12125e7414cdSJian Shen &handle->priv_flags) ? 1 : 0; 1213e2cb1decSSalil Mehta 1214d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1215f01f5559SJian Shen if (ret) 1216e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1217f01f5559SJian Shen "Set promisc mode fail, status is %d.\n", ret); 1218e2cb1decSSalil Mehta 1219f01f5559SJian Shen return ret; 1220e2cb1decSSalil Mehta } 1221e2cb1decSSalil Mehta 1222e196ec75SJian Shen static int hclgevf_set_promisc_mode(struct hnae3_handle *handle, bool en_uc_pmc, 1223e196ec75SJian Shen bool en_mc_pmc) 1224e2cb1decSSalil Mehta { 1225e196ec75SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1226e196ec75SJian Shen bool en_bc_pmc; 1227e196ec75SJian Shen 1228295ba232SGuangbin Huang en_bc_pmc = hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2; 1229e196ec75SJian Shen 1230e196ec75SJian Shen return hclgevf_cmd_set_promisc_mode(hdev, en_uc_pmc, en_mc_pmc, 1231e196ec75SJian Shen en_bc_pmc); 1232e2cb1decSSalil Mehta } 1233e2cb1decSSalil Mehta 1234c631c696SJian Shen static void hclgevf_request_update_promisc_mode(struct hnae3_handle *handle) 1235c631c696SJian Shen { 1236c631c696SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1237c631c696SJian Shen 1238c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 12395e7414cdSJian Shen hclgevf_task_schedule(hdev, 0); 1240c631c696SJian Shen } 1241c631c696SJian Shen 1242c631c696SJian Shen static void hclgevf_sync_promisc_mode(struct hclgevf_dev *hdev) 1243c631c696SJian Shen { 1244c631c696SJian Shen struct hnae3_handle *handle = &hdev->nic; 1245c631c696SJian Shen bool en_uc_pmc = handle->netdev_flags & HNAE3_UPE; 1246c631c696SJian Shen bool en_mc_pmc = handle->netdev_flags & HNAE3_MPE; 1247c631c696SJian Shen int ret; 1248c631c696SJian Shen 1249c631c696SJian Shen if (test_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state)) { 1250c631c696SJian Shen ret = hclgevf_set_promisc_mode(handle, en_uc_pmc, en_mc_pmc); 1251c631c696SJian Shen if (!ret) 1252c631c696SJian Shen clear_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 1253c631c696SJian Shen } 1254c631c696SJian Shen } 1255c631c696SJian Shen 12568fa86551SYufeng Mo static int hclgevf_tqp_enable_cmd_send(struct hclgevf_dev *hdev, u16 tqp_id, 12578fa86551SYufeng Mo u16 stream_id, bool enable) 1258e2cb1decSSalil Mehta { 1259e2cb1decSSalil Mehta struct hclgevf_cfg_com_tqp_queue_cmd *req; 1260e2cb1decSSalil Mehta struct hclgevf_desc desc; 1261e2cb1decSSalil Mehta 1262e2cb1decSSalil Mehta req = (struct hclgevf_cfg_com_tqp_queue_cmd *)desc.data; 1263e2cb1decSSalil Mehta 1264e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_CFG_COM_TQP_QUEUE, 1265e2cb1decSSalil Mehta false); 1266e2cb1decSSalil Mehta req->tqp_id = cpu_to_le16(tqp_id & HCLGEVF_RING_ID_MASK); 1267e2cb1decSSalil Mehta req->stream_id = cpu_to_le16(stream_id); 1268ebaf1908SWeihang Li if (enable) 1269ebaf1908SWeihang Li req->enable |= 1U << HCLGEVF_TQP_ENABLE_B; 1270e2cb1decSSalil Mehta 12718fa86551SYufeng Mo return hclgevf_cmd_send(&hdev->hw, &desc, 1); 12728fa86551SYufeng Mo } 1273e2cb1decSSalil Mehta 12748fa86551SYufeng Mo static int hclgevf_tqp_enable(struct hnae3_handle *handle, bool enable) 12758fa86551SYufeng Mo { 12768fa86551SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 12778fa86551SYufeng Mo int ret; 12788fa86551SYufeng Mo u16 i; 12798fa86551SYufeng Mo 12808fa86551SYufeng Mo for (i = 0; i < handle->kinfo.num_tqps; i++) { 12818fa86551SYufeng Mo ret = hclgevf_tqp_enable_cmd_send(hdev, i, 0, enable); 12828fa86551SYufeng Mo if (ret) 12838fa86551SYufeng Mo return ret; 12848fa86551SYufeng Mo } 12858fa86551SYufeng Mo 12868fa86551SYufeng Mo return 0; 1287e2cb1decSSalil Mehta } 1288e2cb1decSSalil Mehta 1289e2cb1decSSalil Mehta static void hclgevf_reset_tqp_stats(struct hnae3_handle *handle) 1290e2cb1decSSalil Mehta { 1291b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 1292e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 1293e2cb1decSSalil Mehta int i; 1294e2cb1decSSalil Mehta 1295b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 1296b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 1297e2cb1decSSalil Mehta memset(&tqp->tqp_stats, 0, sizeof(tqp->tqp_stats)); 1298e2cb1decSSalil Mehta } 1299e2cb1decSSalil Mehta } 1300e2cb1decSSalil Mehta 13018e6de441SHuazhong Tan static int hclgevf_get_host_mac_addr(struct hclgevf_dev *hdev, u8 *p) 13028e6de441SHuazhong Tan { 1303d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 13048e6de441SHuazhong Tan u8 host_mac[ETH_ALEN]; 13058e6de441SHuazhong Tan int status; 13068e6de441SHuazhong Tan 1307d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MAC_ADDR, 0); 1308d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, host_mac, 1309d3410018SYufeng Mo ETH_ALEN); 13108e6de441SHuazhong Tan if (status) { 13118e6de441SHuazhong Tan dev_err(&hdev->pdev->dev, 13128e6de441SHuazhong Tan "fail to get VF MAC from host %d", status); 13138e6de441SHuazhong Tan return status; 13148e6de441SHuazhong Tan } 13158e6de441SHuazhong Tan 13168e6de441SHuazhong Tan ether_addr_copy(p, host_mac); 13178e6de441SHuazhong Tan 13188e6de441SHuazhong Tan return 0; 13198e6de441SHuazhong Tan } 13208e6de441SHuazhong Tan 1321e2cb1decSSalil Mehta static void hclgevf_get_mac_addr(struct hnae3_handle *handle, u8 *p) 1322e2cb1decSSalil Mehta { 1323e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 13248e6de441SHuazhong Tan u8 host_mac_addr[ETH_ALEN]; 1325e2cb1decSSalil Mehta 13268e6de441SHuazhong Tan if (hclgevf_get_host_mac_addr(hdev, host_mac_addr)) 13278e6de441SHuazhong Tan return; 13288e6de441SHuazhong Tan 13298e6de441SHuazhong Tan hdev->has_pf_mac = !is_zero_ether_addr(host_mac_addr); 13308e6de441SHuazhong Tan if (hdev->has_pf_mac) 13318e6de441SHuazhong Tan ether_addr_copy(p, host_mac_addr); 13328e6de441SHuazhong Tan else 1333e2cb1decSSalil Mehta ether_addr_copy(p, hdev->hw.mac.mac_addr); 1334e2cb1decSSalil Mehta } 1335e2cb1decSSalil Mehta 133659098055SFuyun Liang static int hclgevf_set_mac_addr(struct hnae3_handle *handle, void *p, 133759098055SFuyun Liang bool is_first) 1338e2cb1decSSalil Mehta { 1339e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1340e2cb1decSSalil Mehta u8 *old_mac_addr = (u8 *)hdev->hw.mac.mac_addr; 1341d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1342e2cb1decSSalil Mehta u8 *new_mac_addr = (u8 *)p; 1343e2cb1decSSalil Mehta int status; 1344e2cb1decSSalil Mehta 1345d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_UNICAST, 0); 1346ee4bcd3bSJian Shen send_msg.subcode = HCLGE_MBX_MAC_VLAN_UC_MODIFY; 1347d3410018SYufeng Mo ether_addr_copy(send_msg.data, new_mac_addr); 1348ee4bcd3bSJian Shen if (is_first && !hdev->has_pf_mac) 1349ee4bcd3bSJian Shen eth_zero_addr(&send_msg.data[ETH_ALEN]); 1350ee4bcd3bSJian Shen else 1351d3410018SYufeng Mo ether_addr_copy(&send_msg.data[ETH_ALEN], old_mac_addr); 1352d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1353e2cb1decSSalil Mehta if (!status) 1354e2cb1decSSalil Mehta ether_addr_copy(hdev->hw.mac.mac_addr, new_mac_addr); 1355e2cb1decSSalil Mehta 1356e2cb1decSSalil Mehta return status; 1357e2cb1decSSalil Mehta } 1358e2cb1decSSalil Mehta 1359ee4bcd3bSJian Shen static struct hclgevf_mac_addr_node * 1360ee4bcd3bSJian Shen hclgevf_find_mac_node(struct list_head *list, const u8 *mac_addr) 1361ee4bcd3bSJian Shen { 1362ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1363ee4bcd3bSJian Shen 1364ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) 1365ee4bcd3bSJian Shen if (ether_addr_equal(mac_addr, mac_node->mac_addr)) 1366ee4bcd3bSJian Shen return mac_node; 1367ee4bcd3bSJian Shen 1368ee4bcd3bSJian Shen return NULL; 1369ee4bcd3bSJian Shen } 1370ee4bcd3bSJian Shen 1371ee4bcd3bSJian Shen static void hclgevf_update_mac_node(struct hclgevf_mac_addr_node *mac_node, 1372ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state) 1373ee4bcd3bSJian Shen { 1374ee4bcd3bSJian Shen switch (state) { 1375ee4bcd3bSJian Shen /* from set_rx_mode or tmp_add_list */ 1376ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1377ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_DEL) 1378ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1379ee4bcd3bSJian Shen break; 1380ee4bcd3bSJian Shen /* only from set_rx_mode */ 1381ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 1382ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1383ee4bcd3bSJian Shen list_del(&mac_node->node); 1384ee4bcd3bSJian Shen kfree(mac_node); 1385ee4bcd3bSJian Shen } else { 1386ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 1387ee4bcd3bSJian Shen } 1388ee4bcd3bSJian Shen break; 1389ee4bcd3bSJian Shen /* only from tmp_add_list, the mac_node->state won't be 1390ee4bcd3bSJian Shen * HCLGEVF_MAC_ACTIVE 1391ee4bcd3bSJian Shen */ 1392ee4bcd3bSJian Shen case HCLGEVF_MAC_ACTIVE: 1393ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1394ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1395ee4bcd3bSJian Shen break; 1396ee4bcd3bSJian Shen } 1397ee4bcd3bSJian Shen } 1398ee4bcd3bSJian Shen 1399ee4bcd3bSJian Shen static int hclgevf_update_mac_list(struct hnae3_handle *handle, 1400ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state, 1401ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type, 1402e2cb1decSSalil Mehta const unsigned char *addr) 1403e2cb1decSSalil Mehta { 1404e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1405ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node; 1406ee4bcd3bSJian Shen struct list_head *list; 1407e2cb1decSSalil Mehta 1408ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1409ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1410ee4bcd3bSJian Shen 1411ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1412ee4bcd3bSJian Shen 1413ee4bcd3bSJian Shen /* if the mac addr is already in the mac list, no need to add a new 1414ee4bcd3bSJian Shen * one into it, just check the mac addr state, convert it to a new 1415ee4bcd3bSJian Shen * new state, or just remove it, or do nothing. 1416ee4bcd3bSJian Shen */ 1417ee4bcd3bSJian Shen mac_node = hclgevf_find_mac_node(list, addr); 1418ee4bcd3bSJian Shen if (mac_node) { 1419ee4bcd3bSJian Shen hclgevf_update_mac_node(mac_node, state); 1420ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1421ee4bcd3bSJian Shen return 0; 1422ee4bcd3bSJian Shen } 1423ee4bcd3bSJian Shen /* if this address is never added, unnecessary to delete */ 1424ee4bcd3bSJian Shen if (state == HCLGEVF_MAC_TO_DEL) { 1425ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1426ee4bcd3bSJian Shen return -ENOENT; 1427ee4bcd3bSJian Shen } 1428ee4bcd3bSJian Shen 1429ee4bcd3bSJian Shen mac_node = kzalloc(sizeof(*mac_node), GFP_ATOMIC); 1430ee4bcd3bSJian Shen if (!mac_node) { 1431ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1432ee4bcd3bSJian Shen return -ENOMEM; 1433ee4bcd3bSJian Shen } 1434ee4bcd3bSJian Shen 1435ee4bcd3bSJian Shen mac_node->state = state; 1436ee4bcd3bSJian Shen ether_addr_copy(mac_node->mac_addr, addr); 1437ee4bcd3bSJian Shen list_add_tail(&mac_node->node, list); 1438ee4bcd3bSJian Shen 1439ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1440ee4bcd3bSJian Shen return 0; 1441ee4bcd3bSJian Shen } 1442ee4bcd3bSJian Shen 1443ee4bcd3bSJian Shen static int hclgevf_add_uc_addr(struct hnae3_handle *handle, 1444ee4bcd3bSJian Shen const unsigned char *addr) 1445ee4bcd3bSJian Shen { 1446ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1447ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1448e2cb1decSSalil Mehta } 1449e2cb1decSSalil Mehta 1450e2cb1decSSalil Mehta static int hclgevf_rm_uc_addr(struct hnae3_handle *handle, 1451e2cb1decSSalil Mehta const unsigned char *addr) 1452e2cb1decSSalil Mehta { 1453ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1454ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1455e2cb1decSSalil Mehta } 1456e2cb1decSSalil Mehta 1457e2cb1decSSalil Mehta static int hclgevf_add_mc_addr(struct hnae3_handle *handle, 1458e2cb1decSSalil Mehta const unsigned char *addr) 1459e2cb1decSSalil Mehta { 1460ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1461ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1462e2cb1decSSalil Mehta } 1463e2cb1decSSalil Mehta 1464e2cb1decSSalil Mehta static int hclgevf_rm_mc_addr(struct hnae3_handle *handle, 1465e2cb1decSSalil Mehta const unsigned char *addr) 1466e2cb1decSSalil Mehta { 1467ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1468ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1469ee4bcd3bSJian Shen } 1470e2cb1decSSalil Mehta 1471ee4bcd3bSJian Shen static int hclgevf_add_del_mac_addr(struct hclgevf_dev *hdev, 1472ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, 1473ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1474ee4bcd3bSJian Shen { 1475ee4bcd3bSJian Shen struct hclge_vf_to_pf_msg send_msg; 1476ee4bcd3bSJian Shen u8 code, subcode; 1477ee4bcd3bSJian Shen 1478ee4bcd3bSJian Shen if (mac_type == HCLGEVF_MAC_ADDR_UC) { 1479ee4bcd3bSJian Shen code = HCLGE_MBX_SET_UNICAST; 1480ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1481ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_ADD; 1482ee4bcd3bSJian Shen else 1483ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_REMOVE; 1484ee4bcd3bSJian Shen } else { 1485ee4bcd3bSJian Shen code = HCLGE_MBX_SET_MULTICAST; 1486ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1487ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_ADD; 1488ee4bcd3bSJian Shen else 1489ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_REMOVE; 1490ee4bcd3bSJian Shen } 1491ee4bcd3bSJian Shen 1492ee4bcd3bSJian Shen hclgevf_build_send_msg(&send_msg, code, subcode); 1493ee4bcd3bSJian Shen ether_addr_copy(send_msg.data, mac_node->mac_addr); 1494d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1495e2cb1decSSalil Mehta } 1496e2cb1decSSalil Mehta 1497ee4bcd3bSJian Shen static void hclgevf_config_mac_list(struct hclgevf_dev *hdev, 1498ee4bcd3bSJian Shen struct list_head *list, 1499ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1500ee4bcd3bSJian Shen { 1501ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1502ee4bcd3bSJian Shen int ret; 1503ee4bcd3bSJian Shen 1504ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1505ee4bcd3bSJian Shen ret = hclgevf_add_del_mac_addr(hdev, mac_node, mac_type); 1506ee4bcd3bSJian Shen if (ret) { 1507ee4bcd3bSJian Shen dev_err(&hdev->pdev->dev, 1508ee4bcd3bSJian Shen "failed to configure mac %pM, state = %d, ret = %d\n", 1509ee4bcd3bSJian Shen mac_node->mac_addr, mac_node->state, ret); 1510ee4bcd3bSJian Shen return; 1511ee4bcd3bSJian Shen } 1512ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1513ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1514ee4bcd3bSJian Shen } else { 1515ee4bcd3bSJian Shen list_del(&mac_node->node); 1516ee4bcd3bSJian Shen kfree(mac_node); 1517ee4bcd3bSJian Shen } 1518ee4bcd3bSJian Shen } 1519ee4bcd3bSJian Shen } 1520ee4bcd3bSJian Shen 1521ee4bcd3bSJian Shen static void hclgevf_sync_from_add_list(struct list_head *add_list, 1522ee4bcd3bSJian Shen struct list_head *mac_list) 1523ee4bcd3bSJian Shen { 1524ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1525ee4bcd3bSJian Shen 1526ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, add_list, node) { 1527ee4bcd3bSJian Shen /* if the mac address from tmp_add_list is not in the 1528ee4bcd3bSJian Shen * uc/mc_mac_list, it means have received a TO_DEL request 1529ee4bcd3bSJian Shen * during the time window of sending mac config request to PF 1530ee4bcd3bSJian Shen * If mac_node state is ACTIVE, then change its state to TO_DEL, 1531ee4bcd3bSJian Shen * then it will be removed at next time. If is TO_ADD, it means 1532ee4bcd3bSJian Shen * send TO_ADD request failed, so just remove the mac node. 1533ee4bcd3bSJian Shen */ 1534ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1535ee4bcd3bSJian Shen if (new_node) { 1536ee4bcd3bSJian Shen hclgevf_update_mac_node(new_node, mac_node->state); 1537ee4bcd3bSJian Shen list_del(&mac_node->node); 1538ee4bcd3bSJian Shen kfree(mac_node); 1539ee4bcd3bSJian Shen } else if (mac_node->state == HCLGEVF_MAC_ACTIVE) { 1540ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 154149768ce9SBaokun Li list_move_tail(&mac_node->node, mac_list); 1542ee4bcd3bSJian Shen } else { 1543ee4bcd3bSJian Shen list_del(&mac_node->node); 1544ee4bcd3bSJian Shen kfree(mac_node); 1545ee4bcd3bSJian Shen } 1546ee4bcd3bSJian Shen } 1547ee4bcd3bSJian Shen } 1548ee4bcd3bSJian Shen 1549ee4bcd3bSJian Shen static void hclgevf_sync_from_del_list(struct list_head *del_list, 1550ee4bcd3bSJian Shen struct list_head *mac_list) 1551ee4bcd3bSJian Shen { 1552ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1553ee4bcd3bSJian Shen 1554ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, del_list, node) { 1555ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1556ee4bcd3bSJian Shen if (new_node) { 1557ee4bcd3bSJian Shen /* If the mac addr is exist in the mac list, it means 1558ee4bcd3bSJian Shen * received a new request TO_ADD during the time window 1559ee4bcd3bSJian Shen * of sending mac addr configurrequest to PF, so just 1560ee4bcd3bSJian Shen * change the mac state to ACTIVE. 1561ee4bcd3bSJian Shen */ 1562ee4bcd3bSJian Shen new_node->state = HCLGEVF_MAC_ACTIVE; 1563ee4bcd3bSJian Shen list_del(&mac_node->node); 1564ee4bcd3bSJian Shen kfree(mac_node); 1565ee4bcd3bSJian Shen } else { 156649768ce9SBaokun Li list_move_tail(&mac_node->node, mac_list); 1567ee4bcd3bSJian Shen } 1568ee4bcd3bSJian Shen } 1569ee4bcd3bSJian Shen } 1570ee4bcd3bSJian Shen 1571ee4bcd3bSJian Shen static void hclgevf_clear_list(struct list_head *list) 1572ee4bcd3bSJian Shen { 1573ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1574ee4bcd3bSJian Shen 1575ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1576ee4bcd3bSJian Shen list_del(&mac_node->node); 1577ee4bcd3bSJian Shen kfree(mac_node); 1578ee4bcd3bSJian Shen } 1579ee4bcd3bSJian Shen } 1580ee4bcd3bSJian Shen 1581ee4bcd3bSJian Shen static void hclgevf_sync_mac_list(struct hclgevf_dev *hdev, 1582ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1583ee4bcd3bSJian Shen { 1584ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1585ee4bcd3bSJian Shen struct list_head tmp_add_list, tmp_del_list; 1586ee4bcd3bSJian Shen struct list_head *list; 1587ee4bcd3bSJian Shen 1588ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_add_list); 1589ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_del_list); 1590ee4bcd3bSJian Shen 1591ee4bcd3bSJian Shen /* move the mac addr to the tmp_add_list and tmp_del_list, then 1592ee4bcd3bSJian Shen * we can add/delete these mac addr outside the spin lock 1593ee4bcd3bSJian Shen */ 1594ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1595ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1596ee4bcd3bSJian Shen 1597ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1598ee4bcd3bSJian Shen 1599ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1600ee4bcd3bSJian Shen switch (mac_node->state) { 1601ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 160249768ce9SBaokun Li list_move_tail(&mac_node->node, &tmp_del_list); 1603ee4bcd3bSJian Shen break; 1604ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1605ee4bcd3bSJian Shen new_node = kzalloc(sizeof(*new_node), GFP_ATOMIC); 1606ee4bcd3bSJian Shen if (!new_node) 1607ee4bcd3bSJian Shen goto stop_traverse; 1608ee4bcd3bSJian Shen 1609ee4bcd3bSJian Shen ether_addr_copy(new_node->mac_addr, mac_node->mac_addr); 1610ee4bcd3bSJian Shen new_node->state = mac_node->state; 1611ee4bcd3bSJian Shen list_add_tail(&new_node->node, &tmp_add_list); 1612ee4bcd3bSJian Shen break; 1613ee4bcd3bSJian Shen default: 1614ee4bcd3bSJian Shen break; 1615ee4bcd3bSJian Shen } 1616ee4bcd3bSJian Shen } 1617ee4bcd3bSJian Shen 1618ee4bcd3bSJian Shen stop_traverse: 1619ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1620ee4bcd3bSJian Shen 1621ee4bcd3bSJian Shen /* delete first, in order to get max mac table space for adding */ 1622ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_del_list, mac_type); 1623ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_add_list, mac_type); 1624ee4bcd3bSJian Shen 1625ee4bcd3bSJian Shen /* if some mac addresses were added/deleted fail, move back to the 1626ee4bcd3bSJian Shen * mac_list, and retry at next time. 1627ee4bcd3bSJian Shen */ 1628ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1629ee4bcd3bSJian Shen 1630ee4bcd3bSJian Shen hclgevf_sync_from_del_list(&tmp_del_list, list); 1631ee4bcd3bSJian Shen hclgevf_sync_from_add_list(&tmp_add_list, list); 1632ee4bcd3bSJian Shen 1633ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1634ee4bcd3bSJian Shen } 1635ee4bcd3bSJian Shen 1636ee4bcd3bSJian Shen static void hclgevf_sync_mac_table(struct hclgevf_dev *hdev) 1637ee4bcd3bSJian Shen { 1638ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_UC); 1639ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_MC); 1640ee4bcd3bSJian Shen } 1641ee4bcd3bSJian Shen 1642ee4bcd3bSJian Shen static void hclgevf_uninit_mac_list(struct hclgevf_dev *hdev) 1643ee4bcd3bSJian Shen { 1644ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1645ee4bcd3bSJian Shen 1646ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.uc_mac_list); 1647ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.mc_mac_list); 1648ee4bcd3bSJian Shen 1649ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1650ee4bcd3bSJian Shen } 1651ee4bcd3bSJian Shen 1652fa6a262aSJian Shen static int hclgevf_enable_vlan_filter(struct hnae3_handle *handle, bool enable) 1653fa6a262aSJian Shen { 1654fa6a262aSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1655fa6a262aSJian Shen struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 1656fa6a262aSJian Shen struct hclge_vf_to_pf_msg send_msg; 1657fa6a262aSJian Shen 1658fa6a262aSJian Shen if (!test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) 1659fa6a262aSJian Shen return -EOPNOTSUPP; 1660fa6a262aSJian Shen 1661fa6a262aSJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1662fa6a262aSJian Shen HCLGE_MBX_ENABLE_VLAN_FILTER); 1663fa6a262aSJian Shen send_msg.data[0] = enable ? 1 : 0; 1664fa6a262aSJian Shen 1665fa6a262aSJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1666fa6a262aSJian Shen } 1667fa6a262aSJian Shen 1668e2cb1decSSalil Mehta static int hclgevf_set_vlan_filter(struct hnae3_handle *handle, 1669e2cb1decSSalil Mehta __be16 proto, u16 vlan_id, 1670e2cb1decSSalil Mehta bool is_kill) 1671e2cb1decSSalil Mehta { 1672d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_IS_KILL_OFFSET 0 1673d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET 1 1674d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_PROTO_OFFSET 3 1675d3410018SYufeng Mo 1676e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1677d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1678fe4144d4SJian Shen int ret; 1679e2cb1decSSalil Mehta 1680b37ce587SYufeng Mo if (vlan_id > HCLGEVF_MAX_VLAN_ID) 1681e2cb1decSSalil Mehta return -EINVAL; 1682e2cb1decSSalil Mehta 1683e2cb1decSSalil Mehta if (proto != htons(ETH_P_8021Q)) 1684e2cb1decSSalil Mehta return -EPROTONOSUPPORT; 1685e2cb1decSSalil Mehta 1686b7b5d25bSGuojia Liao /* When device is resetting or reset failed, firmware is unable to 1687b7b5d25bSGuojia Liao * handle mailbox. Just record the vlan id, and remove it after 1688fe4144d4SJian Shen * reset finished. 1689fe4144d4SJian Shen */ 1690b7b5d25bSGuojia Liao if ((test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 1691b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) { 1692fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1693fe4144d4SJian Shen return -EBUSY; 1694fe4144d4SJian Shen } 1695fe4144d4SJian Shen 1696d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1697d3410018SYufeng Mo HCLGE_MBX_VLAN_FILTER); 1698d3410018SYufeng Mo send_msg.data[HCLGEVF_VLAN_MBX_IS_KILL_OFFSET] = is_kill; 1699d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET], &vlan_id, 1700d3410018SYufeng Mo sizeof(vlan_id)); 1701d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_PROTO_OFFSET], &proto, 1702d3410018SYufeng Mo sizeof(proto)); 170346ee7350SGuojia Liao /* when remove hw vlan filter failed, record the vlan id, 1704fe4144d4SJian Shen * and try to remove it from hw later, to be consistence 1705fe4144d4SJian Shen * with stack. 1706fe4144d4SJian Shen */ 1707d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1708fe4144d4SJian Shen if (is_kill && ret) 1709fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1710fe4144d4SJian Shen 1711fe4144d4SJian Shen return ret; 1712fe4144d4SJian Shen } 1713fe4144d4SJian Shen 1714fe4144d4SJian Shen static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev) 1715fe4144d4SJian Shen { 1716fe4144d4SJian Shen #define HCLGEVF_MAX_SYNC_COUNT 60 1717fe4144d4SJian Shen struct hnae3_handle *handle = &hdev->nic; 1718fe4144d4SJian Shen int ret, sync_cnt = 0; 1719fe4144d4SJian Shen u16 vlan_id; 1720fe4144d4SJian Shen 1721fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1722fe4144d4SJian Shen while (vlan_id != VLAN_N_VID) { 1723fe4144d4SJian Shen ret = hclgevf_set_vlan_filter(handle, htons(ETH_P_8021Q), 1724fe4144d4SJian Shen vlan_id, true); 1725fe4144d4SJian Shen if (ret) 1726fe4144d4SJian Shen return; 1727fe4144d4SJian Shen 1728fe4144d4SJian Shen clear_bit(vlan_id, hdev->vlan_del_fail_bmap); 1729fe4144d4SJian Shen sync_cnt++; 1730fe4144d4SJian Shen if (sync_cnt >= HCLGEVF_MAX_SYNC_COUNT) 1731fe4144d4SJian Shen return; 1732fe4144d4SJian Shen 1733fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1734fe4144d4SJian Shen } 1735e2cb1decSSalil Mehta } 1736e2cb1decSSalil Mehta 1737b2641e2aSYunsheng Lin static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) 1738b2641e2aSYunsheng Lin { 1739b2641e2aSYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1740d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1741b2641e2aSYunsheng Lin 1742d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1743d3410018SYufeng Mo HCLGE_MBX_VLAN_RX_OFF_CFG); 1744d3410018SYufeng Mo send_msg.data[0] = enable ? 1 : 0; 1745d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1746b2641e2aSYunsheng Lin } 1747b2641e2aSYunsheng Lin 17488fa86551SYufeng Mo static int hclgevf_reset_tqp(struct hnae3_handle *handle) 1749e2cb1decSSalil Mehta { 17508fa86551SYufeng Mo #define HCLGEVF_RESET_ALL_QUEUE_DONE 1U 1751e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1752d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 17538fa86551SYufeng Mo u8 return_status = 0; 17541a426f8bSPeng Li int ret; 17558fa86551SYufeng Mo u16 i; 1756e2cb1decSSalil Mehta 17571a426f8bSPeng Li /* disable vf queue before send queue reset msg to PF */ 17588fa86551SYufeng Mo ret = hclgevf_tqp_enable(handle, false); 17598fa86551SYufeng Mo if (ret) { 17608fa86551SYufeng Mo dev_err(&hdev->pdev->dev, "failed to disable tqp, ret = %d\n", 17618fa86551SYufeng Mo ret); 17627fa6be4fSHuazhong Tan return ret; 17638fa86551SYufeng Mo } 17641a426f8bSPeng Li 1765d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 17668fa86551SYufeng Mo 17678fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &return_status, 17688fa86551SYufeng Mo sizeof(return_status)); 17698fa86551SYufeng Mo if (ret || return_status == HCLGEVF_RESET_ALL_QUEUE_DONE) 17708fa86551SYufeng Mo return ret; 17718fa86551SYufeng Mo 17728fa86551SYufeng Mo for (i = 1; i < handle->kinfo.num_tqps; i++) { 17738fa86551SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 17748fa86551SYufeng Mo memcpy(send_msg.data, &i, sizeof(i)); 17758fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 17768fa86551SYufeng Mo if (ret) 17778fa86551SYufeng Mo return ret; 17788fa86551SYufeng Mo } 17798fa86551SYufeng Mo 17808fa86551SYufeng Mo return 0; 1781e2cb1decSSalil Mehta } 1782e2cb1decSSalil Mehta 1783818f1675SYunsheng Lin static int hclgevf_set_mtu(struct hnae3_handle *handle, int new_mtu) 1784818f1675SYunsheng Lin { 1785818f1675SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1786d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1787818f1675SYunsheng Lin 1788d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_MTU, 0); 1789d3410018SYufeng Mo memcpy(send_msg.data, &new_mtu, sizeof(new_mtu)); 1790d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1791818f1675SYunsheng Lin } 1792818f1675SYunsheng Lin 17936988eb2aSSalil Mehta static int hclgevf_notify_client(struct hclgevf_dev *hdev, 17946988eb2aSSalil Mehta enum hnae3_reset_notify_type type) 17956988eb2aSSalil Mehta { 17966988eb2aSSalil Mehta struct hnae3_client *client = hdev->nic_client; 17976988eb2aSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 17986a5f6fa3SHuazhong Tan int ret; 17996988eb2aSSalil Mehta 180025d1817cSHuazhong Tan if (!test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state) || 180125d1817cSHuazhong Tan !client) 180225d1817cSHuazhong Tan return 0; 180325d1817cSHuazhong Tan 18046988eb2aSSalil Mehta if (!client->ops->reset_notify) 18056988eb2aSSalil Mehta return -EOPNOTSUPP; 18066988eb2aSSalil Mehta 18076a5f6fa3SHuazhong Tan ret = client->ops->reset_notify(handle, type); 18086a5f6fa3SHuazhong Tan if (ret) 18096a5f6fa3SHuazhong Tan dev_err(&hdev->pdev->dev, "notify nic client failed %d(%d)\n", 18106a5f6fa3SHuazhong Tan type, ret); 18116a5f6fa3SHuazhong Tan 18126a5f6fa3SHuazhong Tan return ret; 18136988eb2aSSalil Mehta } 18146988eb2aSSalil Mehta 1815fe735c84SHuazhong Tan static int hclgevf_notify_roce_client(struct hclgevf_dev *hdev, 1816fe735c84SHuazhong Tan enum hnae3_reset_notify_type type) 1817fe735c84SHuazhong Tan { 1818fe735c84SHuazhong Tan struct hnae3_client *client = hdev->roce_client; 1819fe735c84SHuazhong Tan struct hnae3_handle *handle = &hdev->roce; 1820fe735c84SHuazhong Tan int ret; 1821fe735c84SHuazhong Tan 1822fe735c84SHuazhong Tan if (!test_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state) || !client) 1823fe735c84SHuazhong Tan return 0; 1824fe735c84SHuazhong Tan 1825fe735c84SHuazhong Tan if (!client->ops->reset_notify) 1826fe735c84SHuazhong Tan return -EOPNOTSUPP; 1827fe735c84SHuazhong Tan 1828fe735c84SHuazhong Tan ret = client->ops->reset_notify(handle, type); 1829fe735c84SHuazhong Tan if (ret) 1830fe735c84SHuazhong Tan dev_err(&hdev->pdev->dev, "notify roce client failed %d(%d)", 1831fe735c84SHuazhong Tan type, ret); 1832fe735c84SHuazhong Tan return ret; 1833fe735c84SHuazhong Tan } 1834fe735c84SHuazhong Tan 18356988eb2aSSalil Mehta static int hclgevf_reset_wait(struct hclgevf_dev *hdev) 18366988eb2aSSalil Mehta { 1837aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_US 20000 1838aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_CNT 2000 1839aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_TIMEOUT_US \ 1840aa5c4f17SHuazhong Tan (HCLGEVF_RESET_WAIT_US * HCLGEVF_RESET_WAIT_CNT) 1841aa5c4f17SHuazhong Tan 1842aa5c4f17SHuazhong Tan u32 val; 1843aa5c4f17SHuazhong Tan int ret; 18446988eb2aSSalil Mehta 1845f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_RESET) 184672e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 184772e2fb07SHuazhong Tan HCLGEVF_VF_RST_ING, val, 184872e2fb07SHuazhong Tan !(val & HCLGEVF_VF_RST_ING_BIT), 184972e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_US, 185072e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 185172e2fb07SHuazhong Tan else 185272e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 185372e2fb07SHuazhong Tan HCLGEVF_RST_ING, val, 1854aa5c4f17SHuazhong Tan !(val & HCLGEVF_RST_ING_BITS), 1855aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_US, 1856aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 18576988eb2aSSalil Mehta 18586988eb2aSSalil Mehta /* hardware completion status should be available by this time */ 1859aa5c4f17SHuazhong Tan if (ret) { 1860aa5c4f17SHuazhong Tan dev_err(&hdev->pdev->dev, 18618912fd6aSColin Ian King "couldn't get reset done status from h/w, timeout!\n"); 1862aa5c4f17SHuazhong Tan return ret; 18636988eb2aSSalil Mehta } 18646988eb2aSSalil Mehta 18656988eb2aSSalil Mehta /* we will wait a bit more to let reset of the stack to complete. This 18666988eb2aSSalil Mehta * might happen in case reset assertion was made by PF. Yes, this also 18676988eb2aSSalil Mehta * means we might end up waiting bit more even for VF reset. 18686988eb2aSSalil Mehta */ 18696988eb2aSSalil Mehta msleep(5000); 18706988eb2aSSalil Mehta 18716988eb2aSSalil Mehta return 0; 18726988eb2aSSalil Mehta } 18736988eb2aSSalil Mehta 18746b428b4fSHuazhong Tan static void hclgevf_reset_handshake(struct hclgevf_dev *hdev, bool enable) 18756b428b4fSHuazhong Tan { 18766b428b4fSHuazhong Tan u32 reg_val; 18776b428b4fSHuazhong Tan 18786b428b4fSHuazhong Tan reg_val = hclgevf_read_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG); 18796b428b4fSHuazhong Tan if (enable) 18806b428b4fSHuazhong Tan reg_val |= HCLGEVF_NIC_SW_RST_RDY; 18816b428b4fSHuazhong Tan else 18826b428b4fSHuazhong Tan reg_val &= ~HCLGEVF_NIC_SW_RST_RDY; 18836b428b4fSHuazhong Tan 18846b428b4fSHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG, 18856b428b4fSHuazhong Tan reg_val); 18866b428b4fSHuazhong Tan } 18876b428b4fSHuazhong Tan 18886988eb2aSSalil Mehta static int hclgevf_reset_stack(struct hclgevf_dev *hdev) 18896988eb2aSSalil Mehta { 18907a01c897SSalil Mehta int ret; 18917a01c897SSalil Mehta 18926988eb2aSSalil Mehta /* uninitialize the nic client */ 18936a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT); 18946a5f6fa3SHuazhong Tan if (ret) 18956a5f6fa3SHuazhong Tan return ret; 18966988eb2aSSalil Mehta 18977a01c897SSalil Mehta /* re-initialize the hclge device */ 18989c6f7085SHuazhong Tan ret = hclgevf_reset_hdev(hdev); 18997a01c897SSalil Mehta if (ret) { 19007a01c897SSalil Mehta dev_err(&hdev->pdev->dev, 19017a01c897SSalil Mehta "hclge device re-init failed, VF is disabled!\n"); 19027a01c897SSalil Mehta return ret; 19037a01c897SSalil Mehta } 19046988eb2aSSalil Mehta 19056988eb2aSSalil Mehta /* bring up the nic client again */ 19066a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_INIT_CLIENT); 19076a5f6fa3SHuazhong Tan if (ret) 19086a5f6fa3SHuazhong Tan return ret; 19096988eb2aSSalil Mehta 19106b428b4fSHuazhong Tan /* clear handshake status with IMP */ 19116b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, false); 19126b428b4fSHuazhong Tan 19131cc9bc6eSHuazhong Tan /* bring up the nic to enable TX/RX again */ 19141cc9bc6eSHuazhong Tan return hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 19156988eb2aSSalil Mehta } 19166988eb2aSSalil Mehta 1917dea846e8SHuazhong Tan static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev) 1918dea846e8SHuazhong Tan { 1919ada13ee3SHuazhong Tan #define HCLGEVF_RESET_SYNC_TIME 100 1920ada13ee3SHuazhong Tan 1921f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { 1922d41884eeSHuazhong Tan struct hclge_vf_to_pf_msg send_msg; 1923d41884eeSHuazhong Tan int ret; 1924d41884eeSHuazhong Tan 1925d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0); 1926d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1927cddd5648SHuazhong Tan if (ret) { 1928cddd5648SHuazhong Tan dev_err(&hdev->pdev->dev, 1929cddd5648SHuazhong Tan "failed to assert VF reset, ret = %d\n", ret); 1930cddd5648SHuazhong Tan return ret; 1931cddd5648SHuazhong Tan } 1932c88a6e7dSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt++; 1933dea846e8SHuazhong Tan } 1934dea846e8SHuazhong Tan 1935ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 1936ada13ee3SHuazhong Tan /* inform hardware that preparatory work is done */ 1937ada13ee3SHuazhong Tan msleep(HCLGEVF_RESET_SYNC_TIME); 19386b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1939d41884eeSHuazhong Tan dev_info(&hdev->pdev->dev, "prepare reset(%d) wait done\n", 1940d41884eeSHuazhong Tan hdev->reset_type); 1941dea846e8SHuazhong Tan 1942d41884eeSHuazhong Tan return 0; 1943dea846e8SHuazhong Tan } 1944dea846e8SHuazhong Tan 19453d77d0cbSHuazhong Tan static void hclgevf_dump_rst_info(struct hclgevf_dev *hdev) 19463d77d0cbSHuazhong Tan { 19473d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF function reset count: %u\n", 19483d77d0cbSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt); 19493d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", 19503d77d0cbSHuazhong Tan hdev->rst_stats.flr_rst_cnt); 19513d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF reset count: %u\n", 19523d77d0cbSHuazhong Tan hdev->rst_stats.vf_rst_cnt); 19533d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset done count: %u\n", 19543d77d0cbSHuazhong Tan hdev->rst_stats.rst_done_cnt); 19553d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", 19563d77d0cbSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt); 19573d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset count: %u\n", 19583d77d0cbSHuazhong Tan hdev->rst_stats.rst_cnt); 19593d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset fail count: %u\n", 19603d77d0cbSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 19613d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", 19623d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_MISC_VECTOR_REG_BASE)); 19633d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt status: 0x%x\n", 19649cee2e8dSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_STATE_REG)); 19653d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", 19665a24b1fdSPeng Li hclgevf_read_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG)); 19673d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", 19683d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING)); 19693d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); 19703d77d0cbSHuazhong Tan } 19713d77d0cbSHuazhong Tan 1972bbe6540eSHuazhong Tan static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev) 1973bbe6540eSHuazhong Tan { 19746b428b4fSHuazhong Tan /* recover handshake status with IMP when reset fail */ 19756b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1976bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt++; 1977adcf738bSGuojia Liao dev_err(&hdev->pdev->dev, "failed to reset VF(%u)\n", 1978bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 1979bbe6540eSHuazhong Tan 1980bbe6540eSHuazhong Tan if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT) 1981bbe6540eSHuazhong Tan set_bit(hdev->reset_type, &hdev->reset_pending); 1982bbe6540eSHuazhong Tan 1983bbe6540eSHuazhong Tan if (hclgevf_is_reset_pending(hdev)) { 1984bbe6540eSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 1985bbe6540eSHuazhong Tan hclgevf_reset_task_schedule(hdev); 19863d77d0cbSHuazhong Tan } else { 1987d5432455SGuojia Liao set_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 19883d77d0cbSHuazhong Tan hclgevf_dump_rst_info(hdev); 1989bbe6540eSHuazhong Tan } 1990bbe6540eSHuazhong Tan } 1991bbe6540eSHuazhong Tan 19921cc9bc6eSHuazhong Tan static int hclgevf_reset_prepare(struct hclgevf_dev *hdev) 19936988eb2aSSalil Mehta { 19946988eb2aSSalil Mehta int ret; 19956988eb2aSSalil Mehta 1996c88a6e7dSHuazhong Tan hdev->rst_stats.rst_cnt++; 19976988eb2aSSalil Mehta 1998fe735c84SHuazhong Tan /* perform reset of the stack & ae device for a client */ 1999fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_DOWN_CLIENT); 2000fe735c84SHuazhong Tan if (ret) 2001fe735c84SHuazhong Tan return ret; 2002fe735c84SHuazhong Tan 20031cc9bc6eSHuazhong Tan rtnl_lock(); 20046988eb2aSSalil Mehta /* bring down the nic to stop any ongoing TX/RX */ 20056a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 200629118ab9SHuazhong Tan rtnl_unlock(); 20076a5f6fa3SHuazhong Tan if (ret) 20081cc9bc6eSHuazhong Tan return ret; 2009dea846e8SHuazhong Tan 20101cc9bc6eSHuazhong Tan return hclgevf_reset_prepare_wait(hdev); 20116988eb2aSSalil Mehta } 20126988eb2aSSalil Mehta 20131cc9bc6eSHuazhong Tan static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 20141cc9bc6eSHuazhong Tan { 20151cc9bc6eSHuazhong Tan int ret; 20161cc9bc6eSHuazhong Tan 2017c88a6e7dSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt++; 2018fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UNINIT_CLIENT); 2019fe735c84SHuazhong Tan if (ret) 2020fe735c84SHuazhong Tan return ret; 2021c88a6e7dSHuazhong Tan 202229118ab9SHuazhong Tan rtnl_lock(); 20236988eb2aSSalil Mehta /* now, re-initialize the nic client and ae device */ 20246988eb2aSSalil Mehta ret = hclgevf_reset_stack(hdev); 20251cc9bc6eSHuazhong Tan rtnl_unlock(); 20266a5f6fa3SHuazhong Tan if (ret) { 20276988eb2aSSalil Mehta dev_err(&hdev->pdev->dev, "failed to reset VF stack\n"); 20281cc9bc6eSHuazhong Tan return ret; 20296a5f6fa3SHuazhong Tan } 20306988eb2aSSalil Mehta 2031fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_INIT_CLIENT); 2032fe735c84SHuazhong Tan /* ignore RoCE notify error if it fails HCLGEVF_RESET_MAX_FAIL_CNT - 1 2033fe735c84SHuazhong Tan * times 2034fe735c84SHuazhong Tan */ 2035fe735c84SHuazhong Tan if (ret && 2036fe735c84SHuazhong Tan hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT - 1) 2037fe735c84SHuazhong Tan return ret; 2038fe735c84SHuazhong Tan 2039fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UP_CLIENT); 2040fe735c84SHuazhong Tan if (ret) 2041fe735c84SHuazhong Tan return ret; 2042fe735c84SHuazhong Tan 2043b644a8d4SHuazhong Tan hdev->last_reset_time = jiffies; 2044c88a6e7dSHuazhong Tan hdev->rst_stats.rst_done_cnt++; 2045bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt = 0; 2046d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2047b644a8d4SHuazhong Tan 20481cc9bc6eSHuazhong Tan return 0; 20491cc9bc6eSHuazhong Tan } 20501cc9bc6eSHuazhong Tan 20511cc9bc6eSHuazhong Tan static void hclgevf_reset(struct hclgevf_dev *hdev) 20521cc9bc6eSHuazhong Tan { 20531cc9bc6eSHuazhong Tan if (hclgevf_reset_prepare(hdev)) 20541cc9bc6eSHuazhong Tan goto err_reset; 20551cc9bc6eSHuazhong Tan 20561cc9bc6eSHuazhong Tan /* check if VF could successfully fetch the hardware reset completion 20571cc9bc6eSHuazhong Tan * status from the hardware 20581cc9bc6eSHuazhong Tan */ 20591cc9bc6eSHuazhong Tan if (hclgevf_reset_wait(hdev)) { 20601cc9bc6eSHuazhong Tan /* can't do much in this situation, will disable VF */ 20611cc9bc6eSHuazhong Tan dev_err(&hdev->pdev->dev, 20621cc9bc6eSHuazhong Tan "failed to fetch H/W reset completion status\n"); 20631cc9bc6eSHuazhong Tan goto err_reset; 20641cc9bc6eSHuazhong Tan } 20651cc9bc6eSHuazhong Tan 20661cc9bc6eSHuazhong Tan if (hclgevf_reset_rebuild(hdev)) 20671cc9bc6eSHuazhong Tan goto err_reset; 20681cc9bc6eSHuazhong Tan 20691cc9bc6eSHuazhong Tan return; 20701cc9bc6eSHuazhong Tan 20716a5f6fa3SHuazhong Tan err_reset: 2072bbe6540eSHuazhong Tan hclgevf_reset_err_handle(hdev); 20736988eb2aSSalil Mehta } 20746988eb2aSSalil Mehta 2075720bd583SHuazhong Tan static enum hnae3_reset_type hclgevf_get_reset_level(struct hclgevf_dev *hdev, 2076720bd583SHuazhong Tan unsigned long *addr) 2077720bd583SHuazhong Tan { 2078720bd583SHuazhong Tan enum hnae3_reset_type rst_level = HNAE3_NONE_RESET; 2079720bd583SHuazhong Tan 2080dea846e8SHuazhong Tan /* return the highest priority reset level amongst all */ 2081b90fcc5bSHuazhong Tan if (test_bit(HNAE3_VF_RESET, addr)) { 2082b90fcc5bSHuazhong Tan rst_level = HNAE3_VF_RESET; 2083b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_RESET, addr); 2084b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2085b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2086b90fcc5bSHuazhong Tan } else if (test_bit(HNAE3_VF_FULL_RESET, addr)) { 2087dea846e8SHuazhong Tan rst_level = HNAE3_VF_FULL_RESET; 2088dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FULL_RESET, addr); 2089dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2090aa5c4f17SHuazhong Tan } else if (test_bit(HNAE3_VF_PF_FUNC_RESET, addr)) { 2091aa5c4f17SHuazhong Tan rst_level = HNAE3_VF_PF_FUNC_RESET; 2092aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2093aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2094dea846e8SHuazhong Tan } else if (test_bit(HNAE3_VF_FUNC_RESET, addr)) { 2095dea846e8SHuazhong Tan rst_level = HNAE3_VF_FUNC_RESET; 2096dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 20976ff3cf07SHuazhong Tan } else if (test_bit(HNAE3_FLR_RESET, addr)) { 20986ff3cf07SHuazhong Tan rst_level = HNAE3_FLR_RESET; 20996ff3cf07SHuazhong Tan clear_bit(HNAE3_FLR_RESET, addr); 2100720bd583SHuazhong Tan } 2101720bd583SHuazhong Tan 2102720bd583SHuazhong Tan return rst_level; 2103720bd583SHuazhong Tan } 2104720bd583SHuazhong Tan 21056ae4e733SShiju Jose static void hclgevf_reset_event(struct pci_dev *pdev, 21066ae4e733SShiju Jose struct hnae3_handle *handle) 21076d4c3981SSalil Mehta { 21086ff3cf07SHuazhong Tan struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); 21096ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 21106d4c3981SSalil Mehta 21116d4c3981SSalil Mehta dev_info(&hdev->pdev->dev, "received reset request from VF enet\n"); 21126d4c3981SSalil Mehta 21136ff3cf07SHuazhong Tan if (hdev->default_reset_request) 21140742ed7cSHuazhong Tan hdev->reset_level = 2115720bd583SHuazhong Tan hclgevf_get_reset_level(hdev, 2116720bd583SHuazhong Tan &hdev->default_reset_request); 2117720bd583SHuazhong Tan else 2118dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 21196d4c3981SSalil Mehta 2120436667d2SSalil Mehta /* reset of this VF requested */ 2121436667d2SSalil Mehta set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state); 2122436667d2SSalil Mehta hclgevf_reset_task_schedule(hdev); 21236d4c3981SSalil Mehta 21240742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 21256d4c3981SSalil Mehta } 21266d4c3981SSalil Mehta 2127720bd583SHuazhong Tan static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev, 2128720bd583SHuazhong Tan enum hnae3_reset_type rst_type) 2129720bd583SHuazhong Tan { 2130720bd583SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2131720bd583SHuazhong Tan 2132720bd583SHuazhong Tan set_bit(rst_type, &hdev->default_reset_request); 2133720bd583SHuazhong Tan } 2134720bd583SHuazhong Tan 2135f28368bbSHuazhong Tan static void hclgevf_enable_vector(struct hclgevf_misc_vector *vector, bool en) 2136f28368bbSHuazhong Tan { 2137f28368bbSHuazhong Tan writel(en ? 1 : 0, vector->addr); 2138f28368bbSHuazhong Tan } 2139f28368bbSHuazhong Tan 2140bb1890d5SJiaran Zhang static void hclgevf_reset_prepare_general(struct hnae3_ae_dev *ae_dev, 2141bb1890d5SJiaran Zhang enum hnae3_reset_type rst_type) 21426ff3cf07SHuazhong Tan { 2143bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_WAIT_MS 500 2144bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_CNT 5 2145f28368bbSHuazhong Tan 21466ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2147f28368bbSHuazhong Tan int retry_cnt = 0; 2148f28368bbSHuazhong Tan int ret; 21496ff3cf07SHuazhong Tan 2150f28368bbSHuazhong Tan retry: 2151f28368bbSHuazhong Tan down(&hdev->reset_sem); 2152f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2153bb1890d5SJiaran Zhang hdev->reset_type = rst_type; 2154f28368bbSHuazhong Tan ret = hclgevf_reset_prepare(hdev); 2155f28368bbSHuazhong Tan if (ret) { 2156bb1890d5SJiaran Zhang dev_err(&hdev->pdev->dev, "fail to prepare to reset, ret=%d\n", 2157f28368bbSHuazhong Tan ret); 2158f28368bbSHuazhong Tan if (hdev->reset_pending || 2159bb1890d5SJiaran Zhang retry_cnt++ < HCLGEVF_RESET_RETRY_CNT) { 21606ff3cf07SHuazhong Tan dev_err(&hdev->pdev->dev, 2161f28368bbSHuazhong Tan "reset_pending:0x%lx, retry_cnt:%d\n", 2162f28368bbSHuazhong Tan hdev->reset_pending, retry_cnt); 2163f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2164f28368bbSHuazhong Tan up(&hdev->reset_sem); 2165bb1890d5SJiaran Zhang msleep(HCLGEVF_RESET_RETRY_WAIT_MS); 2166f28368bbSHuazhong Tan goto retry; 2167f28368bbSHuazhong Tan } 2168f28368bbSHuazhong Tan } 2169f28368bbSHuazhong Tan 2170bb1890d5SJiaran Zhang /* disable misc vector before reset done */ 2171f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, false); 2172bb1890d5SJiaran Zhang 2173bb1890d5SJiaran Zhang if (hdev->reset_type == HNAE3_FLR_RESET) 2174f28368bbSHuazhong Tan hdev->rst_stats.flr_rst_cnt++; 2175f28368bbSHuazhong Tan } 2176f28368bbSHuazhong Tan 2177bb1890d5SJiaran Zhang static void hclgevf_reset_done(struct hnae3_ae_dev *ae_dev) 2178f28368bbSHuazhong Tan { 2179f28368bbSHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2180f28368bbSHuazhong Tan int ret; 2181f28368bbSHuazhong Tan 2182f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, true); 2183f28368bbSHuazhong Tan 2184f28368bbSHuazhong Tan ret = hclgevf_reset_rebuild(hdev); 2185f28368bbSHuazhong Tan if (ret) 2186f28368bbSHuazhong Tan dev_warn(&hdev->pdev->dev, "fail to rebuild, ret=%d\n", 2187f28368bbSHuazhong Tan ret); 2188f28368bbSHuazhong Tan 2189f28368bbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 2190f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2191f28368bbSHuazhong Tan up(&hdev->reset_sem); 21926ff3cf07SHuazhong Tan } 21936ff3cf07SHuazhong Tan 2194e2cb1decSSalil Mehta static u32 hclgevf_get_fw_version(struct hnae3_handle *handle) 2195e2cb1decSSalil Mehta { 2196e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2197e2cb1decSSalil Mehta 2198e2cb1decSSalil Mehta return hdev->fw_version; 2199e2cb1decSSalil Mehta } 2200e2cb1decSSalil Mehta 2201e2cb1decSSalil Mehta static void hclgevf_get_misc_vector(struct hclgevf_dev *hdev) 2202e2cb1decSSalil Mehta { 2203e2cb1decSSalil Mehta struct hclgevf_misc_vector *vector = &hdev->misc_vector; 2204e2cb1decSSalil Mehta 2205e2cb1decSSalil Mehta vector->vector_irq = pci_irq_vector(hdev->pdev, 2206e2cb1decSSalil Mehta HCLGEVF_MISC_VECTOR_NUM); 2207e2cb1decSSalil Mehta vector->addr = hdev->hw.io_base + HCLGEVF_MISC_VECTOR_REG_BASE; 2208e2cb1decSSalil Mehta /* vector status always valid for Vector 0 */ 2209e2cb1decSSalil Mehta hdev->vector_status[HCLGEVF_MISC_VECTOR_NUM] = 0; 2210e2cb1decSSalil Mehta hdev->vector_irq[HCLGEVF_MISC_VECTOR_NUM] = vector->vector_irq; 2211e2cb1decSSalil Mehta 2212e2cb1decSSalil Mehta hdev->num_msi_left -= 1; 2213e2cb1decSSalil Mehta hdev->num_msi_used += 1; 2214e2cb1decSSalil Mehta } 2215e2cb1decSSalil Mehta 221635a1e503SSalil Mehta void hclgevf_reset_task_schedule(struct hclgevf_dev *hdev) 221735a1e503SSalil Mehta { 2218ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2219ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, 2220ff200099SYunsheng Lin &hdev->state)) 22210ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 222235a1e503SSalil Mehta } 222335a1e503SSalil Mehta 222407a0556aSSalil Mehta void hclgevf_mbx_task_schedule(struct hclgevf_dev *hdev) 2225e2cb1decSSalil Mehta { 2226ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2227ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, 2228ff200099SYunsheng Lin &hdev->state)) 22290ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 223007a0556aSSalil Mehta } 2231e2cb1decSSalil Mehta 2232ff200099SYunsheng Lin static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 2233ff200099SYunsheng Lin unsigned long delay) 2234e2cb1decSSalil Mehta { 2235d5432455SGuojia Liao if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2236d5432455SGuojia Liao !test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 22370ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, delay); 2238e2cb1decSSalil Mehta } 2239e2cb1decSSalil Mehta 2240ff200099SYunsheng Lin static void hclgevf_reset_service_task(struct hclgevf_dev *hdev) 224135a1e503SSalil Mehta { 2242d6ad7c53SGuojia Liao #define HCLGEVF_MAX_RESET_ATTEMPTS_CNT 3 2243d6ad7c53SGuojia Liao 2244ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state)) 2245ff200099SYunsheng Lin return; 2246ff200099SYunsheng Lin 2247f28368bbSHuazhong Tan down(&hdev->reset_sem); 2248f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 224935a1e503SSalil Mehta 2250436667d2SSalil Mehta if (test_and_clear_bit(HCLGEVF_RESET_PENDING, 2251436667d2SSalil Mehta &hdev->reset_state)) { 2252cd7e963dSSalil Mehta /* PF has intimated that it is about to reset the hardware. 22539b2f3477SWeihang Li * We now have to poll & check if hardware has actually 22549b2f3477SWeihang Li * completed the reset sequence. On hardware reset completion, 22559b2f3477SWeihang Li * VF needs to reset the client and ae device. 225635a1e503SSalil Mehta */ 2257436667d2SSalil Mehta hdev->reset_attempts = 0; 2258436667d2SSalil Mehta 2259dea846e8SHuazhong Tan hdev->last_reset_time = jiffies; 2260dea846e8SHuazhong Tan while ((hdev->reset_type = 2261dea846e8SHuazhong Tan hclgevf_get_reset_level(hdev, &hdev->reset_pending)) 22621cc9bc6eSHuazhong Tan != HNAE3_NONE_RESET) 22631cc9bc6eSHuazhong Tan hclgevf_reset(hdev); 2264436667d2SSalil Mehta } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED, 2265436667d2SSalil Mehta &hdev->reset_state)) { 2266436667d2SSalil Mehta /* we could be here when either of below happens: 22679b2f3477SWeihang Li * 1. reset was initiated due to watchdog timeout caused by 2268436667d2SSalil Mehta * a. IMP was earlier reset and our TX got choked down and 2269436667d2SSalil Mehta * which resulted in watchdog reacting and inducing VF 2270436667d2SSalil Mehta * reset. This also means our cmdq would be unreliable. 2271436667d2SSalil Mehta * b. problem in TX due to other lower layer(example link 2272436667d2SSalil Mehta * layer not functioning properly etc.) 2273436667d2SSalil Mehta * 2. VF reset might have been initiated due to some config 2274436667d2SSalil Mehta * change. 2275436667d2SSalil Mehta * 2276436667d2SSalil Mehta * NOTE: Theres no clear way to detect above cases than to react 2277436667d2SSalil Mehta * to the response of PF for this reset request. PF will ack the 2278436667d2SSalil Mehta * 1b and 2. cases but we will not get any intimation about 1a 2279436667d2SSalil Mehta * from PF as cmdq would be in unreliable state i.e. mailbox 2280436667d2SSalil Mehta * communication between PF and VF would be broken. 228146ee7350SGuojia Liao * 228246ee7350SGuojia Liao * if we are never geting into pending state it means either: 2283436667d2SSalil Mehta * 1. PF is not receiving our request which could be due to IMP 2284436667d2SSalil Mehta * reset 2285436667d2SSalil Mehta * 2. PF is screwed 2286436667d2SSalil Mehta * We cannot do much for 2. but to check first we can try reset 2287436667d2SSalil Mehta * our PCIe + stack and see if it alleviates the problem. 2288436667d2SSalil Mehta */ 2289d6ad7c53SGuojia Liao if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) { 2290436667d2SSalil Mehta /* prepare for full reset of stack + pcie interface */ 2291dea846e8SHuazhong Tan set_bit(HNAE3_VF_FULL_RESET, &hdev->reset_pending); 2292436667d2SSalil Mehta 2293436667d2SSalil Mehta /* "defer" schedule the reset task again */ 2294436667d2SSalil Mehta set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2295436667d2SSalil Mehta } else { 2296436667d2SSalil Mehta hdev->reset_attempts++; 2297436667d2SSalil Mehta 2298dea846e8SHuazhong Tan set_bit(hdev->reset_level, &hdev->reset_pending); 2299dea846e8SHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2300436667d2SSalil Mehta } 2301dea846e8SHuazhong Tan hclgevf_reset_task_schedule(hdev); 2302436667d2SSalil Mehta } 230335a1e503SSalil Mehta 2304afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 230535a1e503SSalil Mehta clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2306f28368bbSHuazhong Tan up(&hdev->reset_sem); 230735a1e503SSalil Mehta } 230835a1e503SSalil Mehta 2309ff200099SYunsheng Lin static void hclgevf_mailbox_service_task(struct hclgevf_dev *hdev) 2310e2cb1decSSalil Mehta { 2311ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state)) 2312ff200099SYunsheng Lin return; 2313e2cb1decSSalil Mehta 2314e2cb1decSSalil Mehta if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state)) 2315e2cb1decSSalil Mehta return; 2316e2cb1decSSalil Mehta 231707a0556aSSalil Mehta hclgevf_mbx_async_handler(hdev); 2318e2cb1decSSalil Mehta 2319e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2320e2cb1decSSalil Mehta } 2321e2cb1decSSalil Mehta 2322ff200099SYunsheng Lin static void hclgevf_keep_alive(struct hclgevf_dev *hdev) 2323a6d818e3SYunsheng Lin { 2324d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2325a6d818e3SYunsheng Lin int ret; 2326a6d818e3SYunsheng Lin 23271416d333SHuazhong Tan if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) 2328c59a85c0SJian Shen return; 2329c59a85c0SJian Shen 2330d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_KEEP_ALIVE, 0); 2331d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2332a6d818e3SYunsheng Lin if (ret) 2333a6d818e3SYunsheng Lin dev_err(&hdev->pdev->dev, 2334a6d818e3SYunsheng Lin "VF sends keep alive cmd failed(=%d)\n", ret); 2335a6d818e3SYunsheng Lin } 2336a6d818e3SYunsheng Lin 2337ff200099SYunsheng Lin static void hclgevf_periodic_service_task(struct hclgevf_dev *hdev) 2338e2cb1decSSalil Mehta { 2339ff200099SYunsheng Lin unsigned long delta = round_jiffies_relative(HZ); 2340ff200099SYunsheng Lin struct hnae3_handle *handle = &hdev->nic; 2341e2cb1decSSalil Mehta 2342e6394363SGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 2343e6394363SGuangbin Huang return; 2344e6394363SGuangbin Huang 2345ff200099SYunsheng Lin if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) { 2346ff200099SYunsheng Lin delta = jiffies - hdev->last_serv_processed; 2347db01afebSliuzhongzhu 2348ff200099SYunsheng Lin if (delta < round_jiffies_relative(HZ)) { 2349ff200099SYunsheng Lin delta = round_jiffies_relative(HZ) - delta; 2350ff200099SYunsheng Lin goto out; 2351db01afebSliuzhongzhu } 2352ff200099SYunsheng Lin } 2353ff200099SYunsheng Lin 2354ff200099SYunsheng Lin hdev->serv_processed_cnt++; 2355ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_KEEP_ALIVE_TASK_INTERVAL)) 2356ff200099SYunsheng Lin hclgevf_keep_alive(hdev); 2357ff200099SYunsheng Lin 2358ff200099SYunsheng Lin if (test_bit(HCLGEVF_STATE_DOWN, &hdev->state)) { 2359ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2360ff200099SYunsheng Lin goto out; 2361ff200099SYunsheng Lin } 2362ff200099SYunsheng Lin 2363ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_STATS_TIMER_INTERVAL)) 2364ff200099SYunsheng Lin hclgevf_tqps_update_stats(handle); 2365e2cb1decSSalil Mehta 236601305e16SGuangbin Huang /* VF does not need to request link status when this bit is set, because 236701305e16SGuangbin Huang * PF will push its link status to VFs when link status changed. 2368e2cb1decSSalil Mehta */ 236901305e16SGuangbin Huang if (!test_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state)) 2370e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2371e2cb1decSSalil Mehta 23729194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 23739194d18bSliuzhongzhu 2374fe4144d4SJian Shen hclgevf_sync_vlan_filter(hdev); 2375fe4144d4SJian Shen 2376ee4bcd3bSJian Shen hclgevf_sync_mac_table(hdev); 2377ee4bcd3bSJian Shen 2378c631c696SJian Shen hclgevf_sync_promisc_mode(hdev); 2379c631c696SJian Shen 2380ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2381436667d2SSalil Mehta 2382ff200099SYunsheng Lin out: 2383ff200099SYunsheng Lin hclgevf_task_schedule(hdev, delta); 2384ff200099SYunsheng Lin } 2385b3c3fe8eSYunsheng Lin 2386ff200099SYunsheng Lin static void hclgevf_service_task(struct work_struct *work) 2387ff200099SYunsheng Lin { 2388ff200099SYunsheng Lin struct hclgevf_dev *hdev = container_of(work, struct hclgevf_dev, 2389ff200099SYunsheng Lin service_task.work); 2390ff200099SYunsheng Lin 2391ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2392ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2393ff200099SYunsheng Lin hclgevf_periodic_service_task(hdev); 2394ff200099SYunsheng Lin 2395ff200099SYunsheng Lin /* Handle reset and mbx again in case periodical task delays the 2396ff200099SYunsheng Lin * handling by calling hclgevf_task_schedule() in 2397ff200099SYunsheng Lin * hclgevf_periodic_service_task() 2398ff200099SYunsheng Lin */ 2399ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2400ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2401e2cb1decSSalil Mehta } 2402e2cb1decSSalil Mehta 2403e2cb1decSSalil Mehta static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr) 2404e2cb1decSSalil Mehta { 2405e2cb1decSSalil Mehta hclgevf_write_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_SRC_REG, regclr); 2406e2cb1decSSalil Mehta } 2407e2cb1decSSalil Mehta 2408b90fcc5bSHuazhong Tan static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, 2409b90fcc5bSHuazhong Tan u32 *clearval) 2410e2cb1decSSalil Mehta { 241113050921SHuazhong Tan u32 val, cmdq_stat_reg, rst_ing_reg; 2412e2cb1decSSalil Mehta 2413e2cb1decSSalil Mehta /* fetch the events from their corresponding regs */ 241413050921SHuazhong Tan cmdq_stat_reg = hclgevf_read_dev(&hdev->hw, 24159cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG); 241613050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RST_INT_B) & cmdq_stat_reg) { 2417b90fcc5bSHuazhong Tan rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 2418b90fcc5bSHuazhong Tan dev_info(&hdev->pdev->dev, 2419b90fcc5bSHuazhong Tan "receive reset interrupt 0x%x!\n", rst_ing_reg); 2420b90fcc5bSHuazhong Tan set_bit(HNAE3_VF_RESET, &hdev->reset_pending); 2421b90fcc5bSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2422ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 242313050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RST_INT_B); 2424c88a6e7dSHuazhong Tan hdev->rst_stats.vf_rst_cnt++; 242572e2fb07SHuazhong Tan /* set up VF hardware reset status, its PF will clear 242672e2fb07SHuazhong Tan * this status when PF has initialized done. 242772e2fb07SHuazhong Tan */ 242872e2fb07SHuazhong Tan val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); 242972e2fb07SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, 243072e2fb07SHuazhong Tan val | HCLGEVF_VF_RST_ING_BIT); 2431b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_RST; 2432b90fcc5bSHuazhong Tan } 2433b90fcc5bSHuazhong Tan 2434e2cb1decSSalil Mehta /* check for vector0 mailbox(=CMDQ RX) event source */ 243513050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) { 243613050921SHuazhong Tan /* for revision 0x21, clearing interrupt is writing bit 0 243713050921SHuazhong Tan * to the clear register, writing bit 1 means to keep the 243813050921SHuazhong Tan * old value. 243913050921SHuazhong Tan * for revision 0x20, the clear register is a read & write 244013050921SHuazhong Tan * register, so we should just write 0 to the bit we are 244113050921SHuazhong Tan * handling, and keep other bits as cmdq_stat_reg. 244213050921SHuazhong Tan */ 2443295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) 244413050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 244513050921SHuazhong Tan else 244613050921SHuazhong Tan *clearval = cmdq_stat_reg & 244713050921SHuazhong Tan ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 244813050921SHuazhong Tan 2449b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_MBX; 2450e2cb1decSSalil Mehta } 2451e2cb1decSSalil Mehta 2452e45afb39SHuazhong Tan /* print other vector0 event source */ 2453e45afb39SHuazhong Tan dev_info(&hdev->pdev->dev, 2454e45afb39SHuazhong Tan "vector 0 interrupt from unknown source, cmdq_src = %#x\n", 2455e45afb39SHuazhong Tan cmdq_stat_reg); 2456e2cb1decSSalil Mehta 2457b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_OTHER; 2458e2cb1decSSalil Mehta } 2459e2cb1decSSalil Mehta 2460e2cb1decSSalil Mehta static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) 2461e2cb1decSSalil Mehta { 2462b90fcc5bSHuazhong Tan enum hclgevf_evt_cause event_cause; 2463e2cb1decSSalil Mehta struct hclgevf_dev *hdev = data; 2464e2cb1decSSalil Mehta u32 clearval; 2465e2cb1decSSalil Mehta 2466e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 2467b90fcc5bSHuazhong Tan event_cause = hclgevf_check_evt_cause(hdev, &clearval); 2468*427900d2SJiaran Zhang if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) 2469*427900d2SJiaran Zhang hclgevf_clear_event_cause(hdev, clearval); 2470e2cb1decSSalil Mehta 2471b90fcc5bSHuazhong Tan switch (event_cause) { 2472b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_RST: 2473b90fcc5bSHuazhong Tan hclgevf_reset_task_schedule(hdev); 2474b90fcc5bSHuazhong Tan break; 2475b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_MBX: 247607a0556aSSalil Mehta hclgevf_mbx_handler(hdev); 2477b90fcc5bSHuazhong Tan break; 2478b90fcc5bSHuazhong Tan default: 2479b90fcc5bSHuazhong Tan break; 2480b90fcc5bSHuazhong Tan } 2481e2cb1decSSalil Mehta 2482*427900d2SJiaran Zhang if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) 2483e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2484e2cb1decSSalil Mehta 2485e2cb1decSSalil Mehta return IRQ_HANDLED; 2486e2cb1decSSalil Mehta } 2487e2cb1decSSalil Mehta 2488e2cb1decSSalil Mehta static int hclgevf_configure(struct hclgevf_dev *hdev) 2489e2cb1decSSalil Mehta { 2490e2cb1decSSalil Mehta int ret; 2491e2cb1decSSalil Mehta 24923462207dSYufeng Mo hdev->gro_en = true; 24933462207dSYufeng Mo 249432e6d104SJian Shen ret = hclgevf_get_basic_info(hdev); 249532e6d104SJian Shen if (ret) 249632e6d104SJian Shen return ret; 249732e6d104SJian Shen 249892f11ea1SJian Shen /* get current port based vlan state from PF */ 249992f11ea1SJian Shen ret = hclgevf_get_port_base_vlan_filter_state(hdev); 250092f11ea1SJian Shen if (ret) 250192f11ea1SJian Shen return ret; 250292f11ea1SJian Shen 2503e2cb1decSSalil Mehta /* get queue configuration from PF */ 25046cee6fc3SJian Shen ret = hclgevf_get_queue_info(hdev); 2505e2cb1decSSalil Mehta if (ret) 2506e2cb1decSSalil Mehta return ret; 2507c0425944SPeng Li 2508c0425944SPeng Li /* get queue depth info from PF */ 2509c0425944SPeng Li ret = hclgevf_get_queue_depth(hdev); 2510c0425944SPeng Li if (ret) 2511c0425944SPeng Li return ret; 2512c0425944SPeng Li 251332e6d104SJian Shen return hclgevf_get_pf_media_type(hdev); 2514e2cb1decSSalil Mehta } 2515e2cb1decSSalil Mehta 25167a01c897SSalil Mehta static int hclgevf_alloc_hdev(struct hnae3_ae_dev *ae_dev) 25177a01c897SSalil Mehta { 25187a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 25191154bb26SPeng Li struct hclgevf_dev *hdev; 25207a01c897SSalil Mehta 25217a01c897SSalil Mehta hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL); 25227a01c897SSalil Mehta if (!hdev) 25237a01c897SSalil Mehta return -ENOMEM; 25247a01c897SSalil Mehta 25257a01c897SSalil Mehta hdev->pdev = pdev; 25267a01c897SSalil Mehta hdev->ae_dev = ae_dev; 25277a01c897SSalil Mehta ae_dev->priv = hdev; 25287a01c897SSalil Mehta 25297a01c897SSalil Mehta return 0; 25307a01c897SSalil Mehta } 25317a01c897SSalil Mehta 2532e2cb1decSSalil Mehta static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev) 2533e2cb1decSSalil Mehta { 2534e2cb1decSSalil Mehta struct hnae3_handle *roce = &hdev->roce; 2535e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 2536e2cb1decSSalil Mehta 253707acf909SJian Shen roce->rinfo.num_vectors = hdev->num_roce_msix; 2538e2cb1decSSalil Mehta 2539e2cb1decSSalil Mehta if (hdev->num_msi_left < roce->rinfo.num_vectors || 2540e2cb1decSSalil Mehta hdev->num_msi_left == 0) 2541e2cb1decSSalil Mehta return -EINVAL; 2542e2cb1decSSalil Mehta 254307acf909SJian Shen roce->rinfo.base_vector = hdev->roce_base_vector; 2544e2cb1decSSalil Mehta 2545e2cb1decSSalil Mehta roce->rinfo.netdev = nic->kinfo.netdev; 2546e2cb1decSSalil Mehta roce->rinfo.roce_io_base = hdev->hw.io_base; 254730ae7f8aSHuazhong Tan roce->rinfo.roce_mem_base = hdev->hw.mem_base; 2548e2cb1decSSalil Mehta 2549e2cb1decSSalil Mehta roce->pdev = nic->pdev; 2550e2cb1decSSalil Mehta roce->ae_algo = nic->ae_algo; 2551e2cb1decSSalil Mehta roce->numa_node_mask = nic->numa_node_mask; 2552e2cb1decSSalil Mehta 2553e2cb1decSSalil Mehta return 0; 2554e2cb1decSSalil Mehta } 2555e2cb1decSSalil Mehta 25563462207dSYufeng Mo static int hclgevf_config_gro(struct hclgevf_dev *hdev) 2557b26a6feaSPeng Li { 2558b26a6feaSPeng Li struct hclgevf_cfg_gro_status_cmd *req; 2559b26a6feaSPeng Li struct hclgevf_desc desc; 2560b26a6feaSPeng Li int ret; 2561b26a6feaSPeng Li 2562b26a6feaSPeng Li if (!hnae3_dev_gro_supported(hdev)) 2563b26a6feaSPeng Li return 0; 2564b26a6feaSPeng Li 2565b26a6feaSPeng Li hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_GRO_GENERIC_CONFIG, 2566b26a6feaSPeng Li false); 2567b26a6feaSPeng Li req = (struct hclgevf_cfg_gro_status_cmd *)desc.data; 2568b26a6feaSPeng Li 25693462207dSYufeng Mo req->gro_en = hdev->gro_en ? 1 : 0; 2570b26a6feaSPeng Li 2571b26a6feaSPeng Li ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 2572b26a6feaSPeng Li if (ret) 2573b26a6feaSPeng Li dev_err(&hdev->pdev->dev, 2574b26a6feaSPeng Li "VF GRO hardware config cmd failed, ret = %d.\n", ret); 2575b26a6feaSPeng Li 2576b26a6feaSPeng Li return ret; 2577b26a6feaSPeng Li } 2578b26a6feaSPeng Li 257987ce161eSGuangbin Huang static int hclgevf_rss_init_cfg(struct hclgevf_dev *hdev) 2580e2cb1decSSalil Mehta { 258187ce161eSGuangbin Huang u16 rss_ind_tbl_size = hdev->ae_dev->dev_specs.rss_ind_tbl_size; 2582e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2583944de484SGuojia Liao struct hclgevf_rss_tuple_cfg *tuple_sets; 25844093d1a2SGuangbin Huang u32 i; 2585e2cb1decSSalil Mehta 2586944de484SGuojia Liao rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 25874093d1a2SGuangbin Huang rss_cfg->rss_size = hdev->nic.kinfo.rss_size; 2588944de484SGuojia Liao tuple_sets = &rss_cfg->rss_tuple_sets; 2589295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 259087ce161eSGuangbin Huang u8 *rss_ind_tbl; 259187ce161eSGuangbin Huang 2592472d7eceSJian Shen rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_SIMPLE; 259387ce161eSGuangbin Huang 259487ce161eSGuangbin Huang rss_ind_tbl = devm_kcalloc(&hdev->pdev->dev, rss_ind_tbl_size, 259587ce161eSGuangbin Huang sizeof(*rss_ind_tbl), GFP_KERNEL); 259687ce161eSGuangbin Huang if (!rss_ind_tbl) 259787ce161eSGuangbin Huang return -ENOMEM; 259887ce161eSGuangbin Huang 259987ce161eSGuangbin Huang rss_cfg->rss_indirection_tbl = rss_ind_tbl; 2600472d7eceSJian Shen memcpy(rss_cfg->rss_hash_key, hclgevf_hash_key, 2601374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 2602374ad291SJian Shen 2603944de484SGuojia Liao tuple_sets->ipv4_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2604944de484SGuojia Liao tuple_sets->ipv4_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2605944de484SGuojia Liao tuple_sets->ipv4_sctp_en = HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2606944de484SGuojia Liao tuple_sets->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2607944de484SGuojia Liao tuple_sets->ipv6_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2608944de484SGuojia Liao tuple_sets->ipv6_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2609ab6e32d2SJian Shen tuple_sets->ipv6_sctp_en = 2610ab6e32d2SJian Shen hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 ? 2611ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP_NO_PORT : 2612ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2613944de484SGuojia Liao tuple_sets->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2614374ad291SJian Shen } 2615374ad291SJian Shen 26169b2f3477SWeihang Li /* Initialize RSS indirect table */ 261787ce161eSGuangbin Huang for (i = 0; i < rss_ind_tbl_size; i++) 26184093d1a2SGuangbin Huang rss_cfg->rss_indirection_tbl[i] = i % rss_cfg->rss_size; 261987ce161eSGuangbin Huang 262087ce161eSGuangbin Huang return 0; 2621944de484SGuojia Liao } 2622944de484SGuojia Liao 2623944de484SGuojia Liao static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) 2624944de484SGuojia Liao { 2625944de484SGuojia Liao struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2626944de484SGuojia Liao int ret; 2627944de484SGuojia Liao 2628295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 2629944de484SGuojia Liao ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo, 2630944de484SGuojia Liao rss_cfg->rss_hash_key); 2631944de484SGuojia Liao if (ret) 2632944de484SGuojia Liao return ret; 2633944de484SGuojia Liao 2634944de484SGuojia Liao ret = hclgevf_set_rss_input_tuple(hdev, rss_cfg); 2635944de484SGuojia Liao if (ret) 2636944de484SGuojia Liao return ret; 2637944de484SGuojia Liao } 2638e2cb1decSSalil Mehta 2639e2cb1decSSalil Mehta ret = hclgevf_set_rss_indir_table(hdev); 2640e2cb1decSSalil Mehta if (ret) 2641e2cb1decSSalil Mehta return ret; 2642e2cb1decSSalil Mehta 26434093d1a2SGuangbin Huang return hclgevf_set_rss_tc_mode(hdev, rss_cfg->rss_size); 2644e2cb1decSSalil Mehta } 2645e2cb1decSSalil Mehta 2646e2cb1decSSalil Mehta static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev) 2647e2cb1decSSalil Mehta { 2648bbfd4506SJian Shen struct hnae3_handle *nic = &hdev->nic; 2649bbfd4506SJian Shen int ret; 2650bbfd4506SJian Shen 2651bbfd4506SJian Shen ret = hclgevf_en_hw_strip_rxvtag(nic, true); 2652bbfd4506SJian Shen if (ret) { 2653bbfd4506SJian Shen dev_err(&hdev->pdev->dev, 2654bbfd4506SJian Shen "failed to enable rx vlan offload, ret = %d\n", ret); 2655bbfd4506SJian Shen return ret; 2656bbfd4506SJian Shen } 2657bbfd4506SJian Shen 2658e2cb1decSSalil Mehta return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0, 2659e2cb1decSSalil Mehta false); 2660e2cb1decSSalil Mehta } 2661e2cb1decSSalil Mehta 2662ff200099SYunsheng Lin static void hclgevf_flush_link_update(struct hclgevf_dev *hdev) 2663ff200099SYunsheng Lin { 2664ff200099SYunsheng Lin #define HCLGEVF_FLUSH_LINK_TIMEOUT 100000 2665ff200099SYunsheng Lin 2666ff200099SYunsheng Lin unsigned long last = hdev->serv_processed_cnt; 2667ff200099SYunsheng Lin int i = 0; 2668ff200099SYunsheng Lin 2669ff200099SYunsheng Lin while (test_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state) && 2670ff200099SYunsheng Lin i++ < HCLGEVF_FLUSH_LINK_TIMEOUT && 2671ff200099SYunsheng Lin last == hdev->serv_processed_cnt) 2672ff200099SYunsheng Lin usleep_range(1, 1); 2673ff200099SYunsheng Lin } 2674ff200099SYunsheng Lin 26758cdb992fSJian Shen static void hclgevf_set_timer_task(struct hnae3_handle *handle, bool enable) 26768cdb992fSJian Shen { 26778cdb992fSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 26788cdb992fSJian Shen 26798cdb992fSJian Shen if (enable) { 2680ff200099SYunsheng Lin hclgevf_task_schedule(hdev, 0); 26818cdb992fSJian Shen } else { 2682b3c3fe8eSYunsheng Lin set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2683ff200099SYunsheng Lin 2684ff200099SYunsheng Lin /* flush memory to make sure DOWN is seen by service task */ 2685ff200099SYunsheng Lin smp_mb__before_atomic(); 2686ff200099SYunsheng Lin hclgevf_flush_link_update(hdev); 26878cdb992fSJian Shen } 26888cdb992fSJian Shen } 26898cdb992fSJian Shen 2690e2cb1decSSalil Mehta static int hclgevf_ae_start(struct hnae3_handle *handle) 2691e2cb1decSSalil Mehta { 2692e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2693e2cb1decSSalil Mehta 2694ed7bedd2SGuangbin Huang clear_bit(HCLGEVF_STATE_DOWN, &hdev->state); 269501305e16SGuangbin Huang clear_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state); 2696ed7bedd2SGuangbin Huang 2697e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 2698e2cb1decSSalil Mehta 2699e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2700e2cb1decSSalil Mehta 27019194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 27029194d18bSliuzhongzhu 2703e2cb1decSSalil Mehta return 0; 2704e2cb1decSSalil Mehta } 2705e2cb1decSSalil Mehta 2706e2cb1decSSalil Mehta static void hclgevf_ae_stop(struct hnae3_handle *handle) 2707e2cb1decSSalil Mehta { 2708e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2709e2cb1decSSalil Mehta 27102f7e4896SFuyun Liang set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 27112f7e4896SFuyun Liang 2712146e92c1SHuazhong Tan if (hdev->reset_type != HNAE3_VF_RESET) 27138fa86551SYufeng Mo hclgevf_reset_tqp(handle); 271439cfbc9cSHuazhong Tan 2715e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 27168cc6c1f7SFuyun Liang hclgevf_update_link_status(hdev, 0); 2717e2cb1decSSalil Mehta } 2718e2cb1decSSalil Mehta 2719a6d818e3SYunsheng Lin static int hclgevf_set_alive(struct hnae3_handle *handle, bool alive) 2720a6d818e3SYunsheng Lin { 2721d3410018SYufeng Mo #define HCLGEVF_STATE_ALIVE 1 2722d3410018SYufeng Mo #define HCLGEVF_STATE_NOT_ALIVE 0 2723a6d818e3SYunsheng Lin 2724d3410018SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2725d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2726d3410018SYufeng Mo 2727d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_ALIVE, 0); 2728d3410018SYufeng Mo send_msg.data[0] = alive ? HCLGEVF_STATE_ALIVE : 2729d3410018SYufeng Mo HCLGEVF_STATE_NOT_ALIVE; 2730d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2731a6d818e3SYunsheng Lin } 2732a6d818e3SYunsheng Lin 2733a6d818e3SYunsheng Lin static int hclgevf_client_start(struct hnae3_handle *handle) 2734a6d818e3SYunsheng Lin { 2735f621df96SQinglang Miao return hclgevf_set_alive(handle, true); 2736a6d818e3SYunsheng Lin } 2737a6d818e3SYunsheng Lin 2738a6d818e3SYunsheng Lin static void hclgevf_client_stop(struct hnae3_handle *handle) 2739a6d818e3SYunsheng Lin { 2740a6d818e3SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2741a6d818e3SYunsheng Lin int ret; 2742a6d818e3SYunsheng Lin 2743a6d818e3SYunsheng Lin ret = hclgevf_set_alive(handle, false); 2744a6d818e3SYunsheng Lin if (ret) 2745a6d818e3SYunsheng Lin dev_warn(&hdev->pdev->dev, 2746a6d818e3SYunsheng Lin "%s failed %d\n", __func__, ret); 2747a6d818e3SYunsheng Lin } 2748a6d818e3SYunsheng Lin 2749e2cb1decSSalil Mehta static void hclgevf_state_init(struct hclgevf_dev *hdev) 2750e2cb1decSSalil Mehta { 2751e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state); 2752e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2753d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2754e2cb1decSSalil Mehta 2755b3c3fe8eSYunsheng Lin INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task); 275635a1e503SSalil Mehta 2757e2cb1decSSalil Mehta mutex_init(&hdev->mbx_resp.mbx_mutex); 2758f28368bbSHuazhong Tan sema_init(&hdev->reset_sem, 1); 2759e2cb1decSSalil Mehta 2760ee4bcd3bSJian Shen spin_lock_init(&hdev->mac_table.mac_list_lock); 2761ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.uc_mac_list); 2762ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.mc_mac_list); 2763ee4bcd3bSJian Shen 2764e2cb1decSSalil Mehta /* bring the device down */ 2765e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2766e2cb1decSSalil Mehta } 2767e2cb1decSSalil Mehta 2768e2cb1decSSalil Mehta static void hclgevf_state_uninit(struct hclgevf_dev *hdev) 2769e2cb1decSSalil Mehta { 2770e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2771acfc3d55SHuazhong Tan set_bit(HCLGEVF_STATE_REMOVING, &hdev->state); 2772e2cb1decSSalil Mehta 2773b3c3fe8eSYunsheng Lin if (hdev->service_task.work.func) 2774b3c3fe8eSYunsheng Lin cancel_delayed_work_sync(&hdev->service_task); 2775e2cb1decSSalil Mehta 2776e2cb1decSSalil Mehta mutex_destroy(&hdev->mbx_resp.mbx_mutex); 2777e2cb1decSSalil Mehta } 2778e2cb1decSSalil Mehta 2779e2cb1decSSalil Mehta static int hclgevf_init_msi(struct hclgevf_dev *hdev) 2780e2cb1decSSalil Mehta { 2781e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2782e2cb1decSSalil Mehta int vectors; 2783e2cb1decSSalil Mehta int i; 2784e2cb1decSSalil Mehta 2785580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) 278607acf909SJian Shen vectors = pci_alloc_irq_vectors(pdev, 278707acf909SJian Shen hdev->roce_base_msix_offset + 1, 278807acf909SJian Shen hdev->num_msi, 278907acf909SJian Shen PCI_IRQ_MSIX); 279007acf909SJian Shen else 2791580a05f9SYonglong Liu vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM, 2792580a05f9SYonglong Liu hdev->num_msi, 2793e2cb1decSSalil Mehta PCI_IRQ_MSI | PCI_IRQ_MSIX); 279407acf909SJian Shen 2795e2cb1decSSalil Mehta if (vectors < 0) { 2796e2cb1decSSalil Mehta dev_err(&pdev->dev, 2797e2cb1decSSalil Mehta "failed(%d) to allocate MSI/MSI-X vectors\n", 2798e2cb1decSSalil Mehta vectors); 2799e2cb1decSSalil Mehta return vectors; 2800e2cb1decSSalil Mehta } 2801e2cb1decSSalil Mehta if (vectors < hdev->num_msi) 2802e2cb1decSSalil Mehta dev_warn(&hdev->pdev->dev, 2803adcf738bSGuojia Liao "requested %u MSI/MSI-X, but allocated %d MSI/MSI-X\n", 2804e2cb1decSSalil Mehta hdev->num_msi, vectors); 2805e2cb1decSSalil Mehta 2806e2cb1decSSalil Mehta hdev->num_msi = vectors; 2807e2cb1decSSalil Mehta hdev->num_msi_left = vectors; 2808580a05f9SYonglong Liu 2809e2cb1decSSalil Mehta hdev->base_msi_vector = pdev->irq; 281007acf909SJian Shen hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset; 2811e2cb1decSSalil Mehta 2812e2cb1decSSalil Mehta hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi, 2813e2cb1decSSalil Mehta sizeof(u16), GFP_KERNEL); 2814e2cb1decSSalil Mehta if (!hdev->vector_status) { 2815e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2816e2cb1decSSalil Mehta return -ENOMEM; 2817e2cb1decSSalil Mehta } 2818e2cb1decSSalil Mehta 2819e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 2820e2cb1decSSalil Mehta hdev->vector_status[i] = HCLGEVF_INVALID_VPORT; 2821e2cb1decSSalil Mehta 2822e2cb1decSSalil Mehta hdev->vector_irq = devm_kcalloc(&pdev->dev, hdev->num_msi, 2823e2cb1decSSalil Mehta sizeof(int), GFP_KERNEL); 2824e2cb1decSSalil Mehta if (!hdev->vector_irq) { 2825862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2826e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2827e2cb1decSSalil Mehta return -ENOMEM; 2828e2cb1decSSalil Mehta } 2829e2cb1decSSalil Mehta 2830e2cb1decSSalil Mehta return 0; 2831e2cb1decSSalil Mehta } 2832e2cb1decSSalil Mehta 2833e2cb1decSSalil Mehta static void hclgevf_uninit_msi(struct hclgevf_dev *hdev) 2834e2cb1decSSalil Mehta { 2835e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2836e2cb1decSSalil Mehta 2837862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2838862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_irq); 2839e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2840e2cb1decSSalil Mehta } 2841e2cb1decSSalil Mehta 2842e2cb1decSSalil Mehta static int hclgevf_misc_irq_init(struct hclgevf_dev *hdev) 2843e2cb1decSSalil Mehta { 2844cdd332acSGuojia Liao int ret; 2845e2cb1decSSalil Mehta 2846e2cb1decSSalil Mehta hclgevf_get_misc_vector(hdev); 2847e2cb1decSSalil Mehta 2848f97c4d82SYonglong Liu snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s", 2849f97c4d82SYonglong Liu HCLGEVF_NAME, pci_name(hdev->pdev)); 2850e2cb1decSSalil Mehta ret = request_irq(hdev->misc_vector.vector_irq, hclgevf_misc_irq_handle, 2851f97c4d82SYonglong Liu 0, hdev->misc_vector.name, hdev); 2852e2cb1decSSalil Mehta if (ret) { 2853e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF failed to request misc irq(%d)\n", 2854e2cb1decSSalil Mehta hdev->misc_vector.vector_irq); 2855e2cb1decSSalil Mehta return ret; 2856e2cb1decSSalil Mehta } 2857e2cb1decSSalil Mehta 28581819e409SXi Wang hclgevf_clear_event_cause(hdev, 0); 28591819e409SXi Wang 2860e2cb1decSSalil Mehta /* enable misc. vector(vector 0) */ 2861e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2862e2cb1decSSalil Mehta 2863e2cb1decSSalil Mehta return ret; 2864e2cb1decSSalil Mehta } 2865e2cb1decSSalil Mehta 2866e2cb1decSSalil Mehta static void hclgevf_misc_irq_uninit(struct hclgevf_dev *hdev) 2867e2cb1decSSalil Mehta { 2868e2cb1decSSalil Mehta /* disable misc vector(vector 0) */ 2869e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 28701819e409SXi Wang synchronize_irq(hdev->misc_vector.vector_irq); 2871e2cb1decSSalil Mehta free_irq(hdev->misc_vector.vector_irq, hdev); 2872e2cb1decSSalil Mehta hclgevf_free_vector(hdev, 0); 2873e2cb1decSSalil Mehta } 2874e2cb1decSSalil Mehta 2875bb87be87SYonglong Liu static void hclgevf_info_show(struct hclgevf_dev *hdev) 2876bb87be87SYonglong Liu { 2877bb87be87SYonglong Liu struct device *dev = &hdev->pdev->dev; 2878bb87be87SYonglong Liu 2879bb87be87SYonglong Liu dev_info(dev, "VF info begin:\n"); 2880bb87be87SYonglong Liu 2881adcf738bSGuojia Liao dev_info(dev, "Task queue pairs numbers: %u\n", hdev->num_tqps); 2882adcf738bSGuojia Liao dev_info(dev, "Desc num per TX queue: %u\n", hdev->num_tx_desc); 2883adcf738bSGuojia Liao dev_info(dev, "Desc num per RX queue: %u\n", hdev->num_rx_desc); 2884adcf738bSGuojia Liao dev_info(dev, "Numbers of vports: %u\n", hdev->num_alloc_vport); 2885adcf738bSGuojia Liao dev_info(dev, "HW tc map: 0x%x\n", hdev->hw_tc_map); 2886adcf738bSGuojia Liao dev_info(dev, "PF media type of this VF: %u\n", 2887bb87be87SYonglong Liu hdev->hw.mac.media_type); 2888bb87be87SYonglong Liu 2889bb87be87SYonglong Liu dev_info(dev, "VF info end.\n"); 2890bb87be87SYonglong Liu } 2891bb87be87SYonglong Liu 28921db58f86SHuazhong Tan static int hclgevf_init_nic_client_instance(struct hnae3_ae_dev *ae_dev, 28931db58f86SHuazhong Tan struct hnae3_client *client) 28941db58f86SHuazhong Tan { 28951db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 28964cd5beaaSGuangbin Huang int rst_cnt = hdev->rst_stats.rst_cnt; 28971db58f86SHuazhong Tan int ret; 28981db58f86SHuazhong Tan 28991db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->nic); 29001db58f86SHuazhong Tan if (ret) 29011db58f86SHuazhong Tan return ret; 29021db58f86SHuazhong Tan 29031db58f86SHuazhong Tan set_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 29044cd5beaaSGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 29054cd5beaaSGuangbin Huang rst_cnt != hdev->rst_stats.rst_cnt) { 29064cd5beaaSGuangbin Huang clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 29074cd5beaaSGuangbin Huang 29084cd5beaaSGuangbin Huang client->ops->uninit_instance(&hdev->nic, 0); 29094cd5beaaSGuangbin Huang return -EBUSY; 29104cd5beaaSGuangbin Huang } 29114cd5beaaSGuangbin Huang 29121db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 29131db58f86SHuazhong Tan 29141db58f86SHuazhong Tan if (netif_msg_drv(&hdev->nic)) 29151db58f86SHuazhong Tan hclgevf_info_show(hdev); 29161db58f86SHuazhong Tan 29171db58f86SHuazhong Tan return 0; 29181db58f86SHuazhong Tan } 29191db58f86SHuazhong Tan 29201db58f86SHuazhong Tan static int hclgevf_init_roce_client_instance(struct hnae3_ae_dev *ae_dev, 29211db58f86SHuazhong Tan struct hnae3_client *client) 29221db58f86SHuazhong Tan { 29231db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 29241db58f86SHuazhong Tan int ret; 29251db58f86SHuazhong Tan 29261db58f86SHuazhong Tan if (!hnae3_dev_roce_supported(hdev) || !hdev->roce_client || 29271db58f86SHuazhong Tan !hdev->nic_client) 29281db58f86SHuazhong Tan return 0; 29291db58f86SHuazhong Tan 29301db58f86SHuazhong Tan ret = hclgevf_init_roce_base_info(hdev); 29311db58f86SHuazhong Tan if (ret) 29321db58f86SHuazhong Tan return ret; 29331db58f86SHuazhong Tan 29341db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->roce); 29351db58f86SHuazhong Tan if (ret) 29361db58f86SHuazhong Tan return ret; 29371db58f86SHuazhong Tan 2938fe735c84SHuazhong Tan set_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 29391db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 29401db58f86SHuazhong Tan 29411db58f86SHuazhong Tan return 0; 29421db58f86SHuazhong Tan } 29431db58f86SHuazhong Tan 2944e718a93fSPeng Li static int hclgevf_init_client_instance(struct hnae3_client *client, 2945e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2946e2cb1decSSalil Mehta { 2947e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2948e2cb1decSSalil Mehta int ret; 2949e2cb1decSSalil Mehta 2950e2cb1decSSalil Mehta switch (client->type) { 2951e2cb1decSSalil Mehta case HNAE3_CLIENT_KNIC: 2952e2cb1decSSalil Mehta hdev->nic_client = client; 2953e2cb1decSSalil Mehta hdev->nic.client = client; 2954e2cb1decSSalil Mehta 29551db58f86SHuazhong Tan ret = hclgevf_init_nic_client_instance(ae_dev, client); 2956e2cb1decSSalil Mehta if (ret) 295749dd8054SJian Shen goto clear_nic; 2958e2cb1decSSalil Mehta 29591db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, 29601db58f86SHuazhong Tan hdev->roce_client); 2961e2cb1decSSalil Mehta if (ret) 296249dd8054SJian Shen goto clear_roce; 2963d9f28fc2SJian Shen 2964e2cb1decSSalil Mehta break; 2965e2cb1decSSalil Mehta case HNAE3_CLIENT_ROCE: 2966544a7bcdSLijun Ou if (hnae3_dev_roce_supported(hdev)) { 2967e2cb1decSSalil Mehta hdev->roce_client = client; 2968e2cb1decSSalil Mehta hdev->roce.client = client; 2969544a7bcdSLijun Ou } 2970e2cb1decSSalil Mehta 29711db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, client); 2972e2cb1decSSalil Mehta if (ret) 297349dd8054SJian Shen goto clear_roce; 2974e2cb1decSSalil Mehta 2975fa7a4bd5SJian Shen break; 2976fa7a4bd5SJian Shen default: 2977fa7a4bd5SJian Shen return -EINVAL; 2978e2cb1decSSalil Mehta } 2979e2cb1decSSalil Mehta 2980e2cb1decSSalil Mehta return 0; 298149dd8054SJian Shen 298249dd8054SJian Shen clear_nic: 298349dd8054SJian Shen hdev->nic_client = NULL; 298449dd8054SJian Shen hdev->nic.client = NULL; 298549dd8054SJian Shen return ret; 298649dd8054SJian Shen clear_roce: 298749dd8054SJian Shen hdev->roce_client = NULL; 298849dd8054SJian Shen hdev->roce.client = NULL; 298949dd8054SJian Shen return ret; 2990e2cb1decSSalil Mehta } 2991e2cb1decSSalil Mehta 2992e718a93fSPeng Li static void hclgevf_uninit_client_instance(struct hnae3_client *client, 2993e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2994e2cb1decSSalil Mehta { 2995e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2996e718a93fSPeng Li 2997e2cb1decSSalil Mehta /* un-init roce, if it exists */ 299849dd8054SJian Shen if (hdev->roce_client) { 2999fe735c84SHuazhong Tan clear_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 3000e2cb1decSSalil Mehta hdev->roce_client->ops->uninit_instance(&hdev->roce, 0); 300149dd8054SJian Shen hdev->roce_client = NULL; 300249dd8054SJian Shen hdev->roce.client = NULL; 300349dd8054SJian Shen } 3004e2cb1decSSalil Mehta 3005e2cb1decSSalil Mehta /* un-init nic/unic, if this was not called by roce client */ 300649dd8054SJian Shen if (client->ops->uninit_instance && hdev->nic_client && 300749dd8054SJian Shen client->type != HNAE3_CLIENT_ROCE) { 300825d1817cSHuazhong Tan clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 300925d1817cSHuazhong Tan 3010e2cb1decSSalil Mehta client->ops->uninit_instance(&hdev->nic, 0); 301149dd8054SJian Shen hdev->nic_client = NULL; 301249dd8054SJian Shen hdev->nic.client = NULL; 301349dd8054SJian Shen } 3014e2cb1decSSalil Mehta } 3015e2cb1decSSalil Mehta 301630ae7f8aSHuazhong Tan static int hclgevf_dev_mem_map(struct hclgevf_dev *hdev) 301730ae7f8aSHuazhong Tan { 301830ae7f8aSHuazhong Tan #define HCLGEVF_MEM_BAR 4 301930ae7f8aSHuazhong Tan 302030ae7f8aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 302130ae7f8aSHuazhong Tan struct hclgevf_hw *hw = &hdev->hw; 302230ae7f8aSHuazhong Tan 302330ae7f8aSHuazhong Tan /* for device does not have device memory, return directly */ 302430ae7f8aSHuazhong Tan if (!(pci_select_bars(pdev, IORESOURCE_MEM) & BIT(HCLGEVF_MEM_BAR))) 302530ae7f8aSHuazhong Tan return 0; 302630ae7f8aSHuazhong Tan 302730ae7f8aSHuazhong Tan hw->mem_base = devm_ioremap_wc(&pdev->dev, 302830ae7f8aSHuazhong Tan pci_resource_start(pdev, 302930ae7f8aSHuazhong Tan HCLGEVF_MEM_BAR), 303030ae7f8aSHuazhong Tan pci_resource_len(pdev, HCLGEVF_MEM_BAR)); 303130ae7f8aSHuazhong Tan if (!hw->mem_base) { 3032be419fcaSColin Ian King dev_err(&pdev->dev, "failed to map device memory\n"); 303330ae7f8aSHuazhong Tan return -EFAULT; 303430ae7f8aSHuazhong Tan } 303530ae7f8aSHuazhong Tan 303630ae7f8aSHuazhong Tan return 0; 303730ae7f8aSHuazhong Tan } 303830ae7f8aSHuazhong Tan 3039e2cb1decSSalil Mehta static int hclgevf_pci_init(struct hclgevf_dev *hdev) 3040e2cb1decSSalil Mehta { 3041e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3042e2cb1decSSalil Mehta struct hclgevf_hw *hw; 3043e2cb1decSSalil Mehta int ret; 3044e2cb1decSSalil Mehta 3045e2cb1decSSalil Mehta ret = pci_enable_device(pdev); 3046e2cb1decSSalil Mehta if (ret) { 3047e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed to enable PCI device\n"); 30483e249d3bSFuyun Liang return ret; 3049e2cb1decSSalil Mehta } 3050e2cb1decSSalil Mehta 3051e2cb1decSSalil Mehta ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 3052e2cb1decSSalil Mehta if (ret) { 3053e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't set consistent PCI DMA, exiting"); 3054e2cb1decSSalil Mehta goto err_disable_device; 3055e2cb1decSSalil Mehta } 3056e2cb1decSSalil Mehta 3057e2cb1decSSalil Mehta ret = pci_request_regions(pdev, HCLGEVF_DRIVER_NAME); 3058e2cb1decSSalil Mehta if (ret) { 3059e2cb1decSSalil Mehta dev_err(&pdev->dev, "PCI request regions failed %d\n", ret); 3060e2cb1decSSalil Mehta goto err_disable_device; 3061e2cb1decSSalil Mehta } 3062e2cb1decSSalil Mehta 3063e2cb1decSSalil Mehta pci_set_master(pdev); 3064e2cb1decSSalil Mehta hw = &hdev->hw; 3065e2cb1decSSalil Mehta hw->hdev = hdev; 30662e1ea493SPeng Li hw->io_base = pci_iomap(pdev, 2, 0); 3067e2cb1decSSalil Mehta if (!hw->io_base) { 3068e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't map configuration register space\n"); 3069e2cb1decSSalil Mehta ret = -ENOMEM; 3070e2cb1decSSalil Mehta goto err_clr_master; 3071e2cb1decSSalil Mehta } 3072e2cb1decSSalil Mehta 307330ae7f8aSHuazhong Tan ret = hclgevf_dev_mem_map(hdev); 307430ae7f8aSHuazhong Tan if (ret) 307530ae7f8aSHuazhong Tan goto err_unmap_io_base; 307630ae7f8aSHuazhong Tan 3077e2cb1decSSalil Mehta return 0; 3078e2cb1decSSalil Mehta 307930ae7f8aSHuazhong Tan err_unmap_io_base: 308030ae7f8aSHuazhong Tan pci_iounmap(pdev, hdev->hw.io_base); 3081e2cb1decSSalil Mehta err_clr_master: 3082e2cb1decSSalil Mehta pci_clear_master(pdev); 3083e2cb1decSSalil Mehta pci_release_regions(pdev); 3084e2cb1decSSalil Mehta err_disable_device: 3085e2cb1decSSalil Mehta pci_disable_device(pdev); 30863e249d3bSFuyun Liang 3087e2cb1decSSalil Mehta return ret; 3088e2cb1decSSalil Mehta } 3089e2cb1decSSalil Mehta 3090e2cb1decSSalil Mehta static void hclgevf_pci_uninit(struct hclgevf_dev *hdev) 3091e2cb1decSSalil Mehta { 3092e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3093e2cb1decSSalil Mehta 309430ae7f8aSHuazhong Tan if (hdev->hw.mem_base) 309530ae7f8aSHuazhong Tan devm_iounmap(&pdev->dev, hdev->hw.mem_base); 309630ae7f8aSHuazhong Tan 3097e2cb1decSSalil Mehta pci_iounmap(pdev, hdev->hw.io_base); 3098e2cb1decSSalil Mehta pci_clear_master(pdev); 3099e2cb1decSSalil Mehta pci_release_regions(pdev); 3100e2cb1decSSalil Mehta pci_disable_device(pdev); 3101e2cb1decSSalil Mehta } 3102e2cb1decSSalil Mehta 310307acf909SJian Shen static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 310407acf909SJian Shen { 310507acf909SJian Shen struct hclgevf_query_res_cmd *req; 310607acf909SJian Shen struct hclgevf_desc desc; 310707acf909SJian Shen int ret; 310807acf909SJian Shen 310907acf909SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_VF_RSRC, true); 311007acf909SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 311107acf909SJian Shen if (ret) { 311207acf909SJian Shen dev_err(&hdev->pdev->dev, 311307acf909SJian Shen "query vf resource failed, ret = %d.\n", ret); 311407acf909SJian Shen return ret; 311507acf909SJian Shen } 311607acf909SJian Shen 311707acf909SJian Shen req = (struct hclgevf_query_res_cmd *)desc.data; 311807acf909SJian Shen 3119580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) { 312007acf909SJian Shen hdev->roce_base_msix_offset = 312160df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee), 312207acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_M, 312307acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_S); 312407acf909SJian Shen hdev->num_roce_msix = 312560df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 312607acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 312707acf909SJian Shen 3128580a05f9SYonglong Liu /* nic's msix numbers is always equals to the roce's. */ 3129580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_roce_msix; 3130580a05f9SYonglong Liu 313107acf909SJian Shen /* VF should have NIC vectors and Roce vectors, NIC vectors 313207acf909SJian Shen * are queued before Roce vectors. The offset is fixed to 64. 313307acf909SJian Shen */ 313407acf909SJian Shen hdev->num_msi = hdev->num_roce_msix + 313507acf909SJian Shen hdev->roce_base_msix_offset; 313607acf909SJian Shen } else { 313707acf909SJian Shen hdev->num_msi = 313860df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 313907acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 3140580a05f9SYonglong Liu 3141580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_msi; 3142580a05f9SYonglong Liu } 3143580a05f9SYonglong Liu 3144580a05f9SYonglong Liu if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) { 3145580a05f9SYonglong Liu dev_err(&hdev->pdev->dev, 3146580a05f9SYonglong Liu "Just %u msi resources, not enough for vf(min:2).\n", 3147580a05f9SYonglong Liu hdev->num_nic_msix); 3148580a05f9SYonglong Liu return -EINVAL; 314907acf909SJian Shen } 315007acf909SJian Shen 315107acf909SJian Shen return 0; 315207acf909SJian Shen } 315307acf909SJian Shen 3154af2aedc5SGuangbin Huang static void hclgevf_set_default_dev_specs(struct hclgevf_dev *hdev) 3155af2aedc5SGuangbin Huang { 3156af2aedc5SGuangbin Huang #define HCLGEVF_MAX_NON_TSO_BD_NUM 8U 3157af2aedc5SGuangbin Huang 3158af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3159af2aedc5SGuangbin Huang 3160af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = 3161af2aedc5SGuangbin Huang HCLGEVF_MAX_NON_TSO_BD_NUM; 3162af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 3163af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3164ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3165e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; 3166af2aedc5SGuangbin Huang } 3167af2aedc5SGuangbin Huang 3168af2aedc5SGuangbin Huang static void hclgevf_parse_dev_specs(struct hclgevf_dev *hdev, 3169af2aedc5SGuangbin Huang struct hclgevf_desc *desc) 3170af2aedc5SGuangbin Huang { 3171af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3172af2aedc5SGuangbin Huang struct hclgevf_dev_specs_0_cmd *req0; 3173ab16b49cSHuazhong Tan struct hclgevf_dev_specs_1_cmd *req1; 3174af2aedc5SGuangbin Huang 3175af2aedc5SGuangbin Huang req0 = (struct hclgevf_dev_specs_0_cmd *)desc[0].data; 3176ab16b49cSHuazhong Tan req1 = (struct hclgevf_dev_specs_1_cmd *)desc[1].data; 3177af2aedc5SGuangbin Huang 3178af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; 3179af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = 3180af2aedc5SGuangbin Huang le16_to_cpu(req0->rss_ind_tbl_size); 318191bfae25SHuazhong Tan ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); 3182af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size); 3183ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl); 3184e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size); 3185af2aedc5SGuangbin Huang } 3186af2aedc5SGuangbin Huang 318713297028SGuangbin Huang static void hclgevf_check_dev_specs(struct hclgevf_dev *hdev) 318813297028SGuangbin Huang { 318913297028SGuangbin Huang struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; 319013297028SGuangbin Huang 319113297028SGuangbin Huang if (!dev_specs->max_non_tso_bd_num) 319213297028SGuangbin Huang dev_specs->max_non_tso_bd_num = HCLGEVF_MAX_NON_TSO_BD_NUM; 319313297028SGuangbin Huang if (!dev_specs->rss_ind_tbl_size) 319413297028SGuangbin Huang dev_specs->rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 319513297028SGuangbin Huang if (!dev_specs->rss_key_size) 319613297028SGuangbin Huang dev_specs->rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3197ab16b49cSHuazhong Tan if (!dev_specs->max_int_gl) 3198ab16b49cSHuazhong Tan dev_specs->max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3199e070c8b9SYufeng Mo if (!dev_specs->max_frm_size) 3200e070c8b9SYufeng Mo dev_specs->max_frm_size = HCLGEVF_MAC_MAX_FRAME; 320113297028SGuangbin Huang } 320213297028SGuangbin Huang 3203af2aedc5SGuangbin Huang static int hclgevf_query_dev_specs(struct hclgevf_dev *hdev) 3204af2aedc5SGuangbin Huang { 3205af2aedc5SGuangbin Huang struct hclgevf_desc desc[HCLGEVF_QUERY_DEV_SPECS_BD_NUM]; 3206af2aedc5SGuangbin Huang int ret; 3207af2aedc5SGuangbin Huang int i; 3208af2aedc5SGuangbin Huang 3209af2aedc5SGuangbin Huang /* set default specifications as devices lower than version V3 do not 3210af2aedc5SGuangbin Huang * support querying specifications from firmware. 3211af2aedc5SGuangbin Huang */ 3212af2aedc5SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) { 3213af2aedc5SGuangbin Huang hclgevf_set_default_dev_specs(hdev); 3214af2aedc5SGuangbin Huang return 0; 3215af2aedc5SGuangbin Huang } 3216af2aedc5SGuangbin Huang 3217af2aedc5SGuangbin Huang for (i = 0; i < HCLGEVF_QUERY_DEV_SPECS_BD_NUM - 1; i++) { 3218af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], 3219af2aedc5SGuangbin Huang HCLGEVF_OPC_QUERY_DEV_SPECS, true); 3220af2aedc5SGuangbin Huang desc[i].flag |= cpu_to_le16(HCLGEVF_CMD_FLAG_NEXT); 3221af2aedc5SGuangbin Huang } 3222af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], HCLGEVF_OPC_QUERY_DEV_SPECS, 3223af2aedc5SGuangbin Huang true); 3224af2aedc5SGuangbin Huang 3225af2aedc5SGuangbin Huang ret = hclgevf_cmd_send(&hdev->hw, desc, HCLGEVF_QUERY_DEV_SPECS_BD_NUM); 3226af2aedc5SGuangbin Huang if (ret) 3227af2aedc5SGuangbin Huang return ret; 3228af2aedc5SGuangbin Huang 3229af2aedc5SGuangbin Huang hclgevf_parse_dev_specs(hdev, desc); 323013297028SGuangbin Huang hclgevf_check_dev_specs(hdev); 3231af2aedc5SGuangbin Huang 3232af2aedc5SGuangbin Huang return 0; 3233af2aedc5SGuangbin Huang } 3234af2aedc5SGuangbin Huang 3235862d969aSHuazhong Tan static int hclgevf_pci_reset(struct hclgevf_dev *hdev) 3236862d969aSHuazhong Tan { 3237862d969aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 3238862d969aSHuazhong Tan int ret = 0; 3239862d969aSHuazhong Tan 3240862d969aSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FULL_RESET && 3241862d969aSHuazhong Tan test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3242862d969aSHuazhong Tan hclgevf_misc_irq_uninit(hdev); 3243862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3244862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3245862d969aSHuazhong Tan } 3246862d969aSHuazhong Tan 3247862d969aSHuazhong Tan if (!test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3248862d969aSHuazhong Tan pci_set_master(pdev); 3249862d969aSHuazhong Tan ret = hclgevf_init_msi(hdev); 3250862d969aSHuazhong Tan if (ret) { 3251862d969aSHuazhong Tan dev_err(&pdev->dev, 3252862d969aSHuazhong Tan "failed(%d) to init MSI/MSI-X\n", ret); 3253862d969aSHuazhong Tan return ret; 3254862d969aSHuazhong Tan } 3255862d969aSHuazhong Tan 3256862d969aSHuazhong Tan ret = hclgevf_misc_irq_init(hdev); 3257862d969aSHuazhong Tan if (ret) { 3258862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3259862d969aSHuazhong Tan dev_err(&pdev->dev, "failed(%d) to init Misc IRQ(vector0)\n", 3260862d969aSHuazhong Tan ret); 3261862d969aSHuazhong Tan return ret; 3262862d969aSHuazhong Tan } 3263862d969aSHuazhong Tan 3264862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3265862d969aSHuazhong Tan } 3266862d969aSHuazhong Tan 3267862d969aSHuazhong Tan return ret; 3268862d969aSHuazhong Tan } 3269862d969aSHuazhong Tan 3270039ba863SJian Shen static int hclgevf_clear_vport_list(struct hclgevf_dev *hdev) 3271039ba863SJian Shen { 3272039ba863SJian Shen struct hclge_vf_to_pf_msg send_msg; 3273039ba863SJian Shen 3274039ba863SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_HANDLE_VF_TBL, 3275039ba863SJian Shen HCLGE_MBX_VPORT_LIST_CLEAR); 3276039ba863SJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3277039ba863SJian Shen } 3278039ba863SJian Shen 327979664077SHuazhong Tan static void hclgevf_init_rxd_adv_layout(struct hclgevf_dev *hdev) 328079664077SHuazhong Tan { 328179664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 328279664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 1); 328379664077SHuazhong Tan } 328479664077SHuazhong Tan 328579664077SHuazhong Tan static void hclgevf_uninit_rxd_adv_layout(struct hclgevf_dev *hdev) 328679664077SHuazhong Tan { 328779664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 328879664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 0); 328979664077SHuazhong Tan } 329079664077SHuazhong Tan 32919c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) 3292e2cb1decSSalil Mehta { 32937a01c897SSalil Mehta struct pci_dev *pdev = hdev->pdev; 3294e2cb1decSSalil Mehta int ret; 3295e2cb1decSSalil Mehta 3296862d969aSHuazhong Tan ret = hclgevf_pci_reset(hdev); 3297862d969aSHuazhong Tan if (ret) { 3298862d969aSHuazhong Tan dev_err(&pdev->dev, "pci reset failed %d\n", ret); 3299862d969aSHuazhong Tan return ret; 3300862d969aSHuazhong Tan } 3301862d969aSHuazhong Tan 33029c6f7085SHuazhong Tan ret = hclgevf_cmd_init(hdev); 33039c6f7085SHuazhong Tan if (ret) { 33049c6f7085SHuazhong Tan dev_err(&pdev->dev, "cmd failed %d\n", ret); 33059c6f7085SHuazhong Tan return ret; 33067a01c897SSalil Mehta } 3307e2cb1decSSalil Mehta 33089c6f7085SHuazhong Tan ret = hclgevf_rss_init_hw(hdev); 33099c6f7085SHuazhong Tan if (ret) { 33109c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 33119c6f7085SHuazhong Tan "failed(%d) to initialize RSS\n", ret); 33129c6f7085SHuazhong Tan return ret; 33139c6f7085SHuazhong Tan } 33149c6f7085SHuazhong Tan 33153462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 3316b26a6feaSPeng Li if (ret) 3317b26a6feaSPeng Li return ret; 3318b26a6feaSPeng Li 33199c6f7085SHuazhong Tan ret = hclgevf_init_vlan_config(hdev); 33209c6f7085SHuazhong Tan if (ret) { 33219c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 33229c6f7085SHuazhong Tan "failed(%d) to initialize VLAN config\n", ret); 33239c6f7085SHuazhong Tan return ret; 33249c6f7085SHuazhong Tan } 33259c6f7085SHuazhong Tan 3326c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 3327c631c696SJian Shen 332879664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 332979664077SHuazhong Tan 33309c6f7085SHuazhong Tan dev_info(&hdev->pdev->dev, "Reset done\n"); 33319c6f7085SHuazhong Tan 33329c6f7085SHuazhong Tan return 0; 33339c6f7085SHuazhong Tan } 33349c6f7085SHuazhong Tan 33359c6f7085SHuazhong Tan static int hclgevf_init_hdev(struct hclgevf_dev *hdev) 33369c6f7085SHuazhong Tan { 33379c6f7085SHuazhong Tan struct pci_dev *pdev = hdev->pdev; 33389c6f7085SHuazhong Tan int ret; 33399c6f7085SHuazhong Tan 3340e2cb1decSSalil Mehta ret = hclgevf_pci_init(hdev); 334160df7e91SHuazhong Tan if (ret) 3342e2cb1decSSalil Mehta return ret; 3343e2cb1decSSalil Mehta 3344cd624299SYufeng Mo ret = hclgevf_devlink_init(hdev); 3345cd624299SYufeng Mo if (ret) 3346cd624299SYufeng Mo goto err_devlink_init; 3347cd624299SYufeng Mo 33488b0195a3SHuazhong Tan ret = hclgevf_cmd_queue_init(hdev); 334960df7e91SHuazhong Tan if (ret) 33508b0195a3SHuazhong Tan goto err_cmd_queue_init; 33518b0195a3SHuazhong Tan 3352eddf0462SYunsheng Lin ret = hclgevf_cmd_init(hdev); 3353eddf0462SYunsheng Lin if (ret) 3354eddf0462SYunsheng Lin goto err_cmd_init; 3355eddf0462SYunsheng Lin 335607acf909SJian Shen /* Get vf resource */ 335707acf909SJian Shen ret = hclgevf_query_vf_resource(hdev); 335860df7e91SHuazhong Tan if (ret) 33598b0195a3SHuazhong Tan goto err_cmd_init; 336007acf909SJian Shen 3361af2aedc5SGuangbin Huang ret = hclgevf_query_dev_specs(hdev); 3362af2aedc5SGuangbin Huang if (ret) { 3363af2aedc5SGuangbin Huang dev_err(&pdev->dev, 3364af2aedc5SGuangbin Huang "failed to query dev specifications, ret = %d\n", ret); 3365af2aedc5SGuangbin Huang goto err_cmd_init; 3366af2aedc5SGuangbin Huang } 3367af2aedc5SGuangbin Huang 336807acf909SJian Shen ret = hclgevf_init_msi(hdev); 336907acf909SJian Shen if (ret) { 337007acf909SJian Shen dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret); 33718b0195a3SHuazhong Tan goto err_cmd_init; 337207acf909SJian Shen } 337307acf909SJian Shen 337407acf909SJian Shen hclgevf_state_init(hdev); 3375dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 3376afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 337707acf909SJian Shen 3378e2cb1decSSalil Mehta ret = hclgevf_misc_irq_init(hdev); 337960df7e91SHuazhong Tan if (ret) 3380e2cb1decSSalil Mehta goto err_misc_irq_init; 3381e2cb1decSSalil Mehta 3382862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3383862d969aSHuazhong Tan 3384e2cb1decSSalil Mehta ret = hclgevf_configure(hdev); 3385e2cb1decSSalil Mehta if (ret) { 3386e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to fetch configuration\n", ret); 3387e2cb1decSSalil Mehta goto err_config; 3388e2cb1decSSalil Mehta } 3389e2cb1decSSalil Mehta 3390e2cb1decSSalil Mehta ret = hclgevf_alloc_tqps(hdev); 3391e2cb1decSSalil Mehta if (ret) { 3392e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret); 3393e2cb1decSSalil Mehta goto err_config; 3394e2cb1decSSalil Mehta } 3395e2cb1decSSalil Mehta 3396e2cb1decSSalil Mehta ret = hclgevf_set_handle_info(hdev); 339760df7e91SHuazhong Tan if (ret) 3398e2cb1decSSalil Mehta goto err_config; 3399e2cb1decSSalil Mehta 34003462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 3401b26a6feaSPeng Li if (ret) 3402b26a6feaSPeng Li goto err_config; 3403b26a6feaSPeng Li 3404e2cb1decSSalil Mehta /* Initialize RSS for this VF */ 340587ce161eSGuangbin Huang ret = hclgevf_rss_init_cfg(hdev); 340687ce161eSGuangbin Huang if (ret) { 340787ce161eSGuangbin Huang dev_err(&pdev->dev, "failed to init rss cfg, ret = %d\n", ret); 340887ce161eSGuangbin Huang goto err_config; 340987ce161eSGuangbin Huang } 341087ce161eSGuangbin Huang 3411e2cb1decSSalil Mehta ret = hclgevf_rss_init_hw(hdev); 3412e2cb1decSSalil Mehta if (ret) { 3413e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3414e2cb1decSSalil Mehta "failed(%d) to initialize RSS\n", ret); 3415e2cb1decSSalil Mehta goto err_config; 3416e2cb1decSSalil Mehta } 3417e2cb1decSSalil Mehta 3418039ba863SJian Shen /* ensure vf tbl list as empty before init*/ 3419039ba863SJian Shen ret = hclgevf_clear_vport_list(hdev); 3420039ba863SJian Shen if (ret) { 3421039ba863SJian Shen dev_err(&pdev->dev, 3422039ba863SJian Shen "failed to clear tbl list configuration, ret = %d.\n", 3423039ba863SJian Shen ret); 3424039ba863SJian Shen goto err_config; 3425039ba863SJian Shen } 3426039ba863SJian Shen 3427e2cb1decSSalil Mehta ret = hclgevf_init_vlan_config(hdev); 3428e2cb1decSSalil Mehta if (ret) { 3429e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3430e2cb1decSSalil Mehta "failed(%d) to initialize VLAN config\n", ret); 3431e2cb1decSSalil Mehta goto err_config; 3432e2cb1decSSalil Mehta } 3433e2cb1decSSalil Mehta 343479664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 343579664077SHuazhong Tan 34360742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 343708d80a4cSHuazhong Tan dev_info(&hdev->pdev->dev, "finished initializing %s driver\n", 343808d80a4cSHuazhong Tan HCLGEVF_DRIVER_NAME); 3439e2cb1decSSalil Mehta 3440ff200099SYunsheng Lin hclgevf_task_schedule(hdev, round_jiffies_relative(HZ)); 3441ff200099SYunsheng Lin 3442e2cb1decSSalil Mehta return 0; 3443e2cb1decSSalil Mehta 3444e2cb1decSSalil Mehta err_config: 3445e2cb1decSSalil Mehta hclgevf_misc_irq_uninit(hdev); 3446e2cb1decSSalil Mehta err_misc_irq_init: 3447e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 3448e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 344907acf909SJian Shen err_cmd_init: 34508b0195a3SHuazhong Tan hclgevf_cmd_uninit(hdev); 34518b0195a3SHuazhong Tan err_cmd_queue_init: 3452cd624299SYufeng Mo hclgevf_devlink_uninit(hdev); 3453cd624299SYufeng Mo err_devlink_init: 3454e2cb1decSSalil Mehta hclgevf_pci_uninit(hdev); 3455862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3456e2cb1decSSalil Mehta return ret; 3457e2cb1decSSalil Mehta } 3458e2cb1decSSalil Mehta 34597a01c897SSalil Mehta static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev) 3460e2cb1decSSalil Mehta { 3461d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3462d3410018SYufeng Mo 3463e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 346479664077SHuazhong Tan hclgevf_uninit_rxd_adv_layout(hdev); 3465862d969aSHuazhong Tan 3466d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_VF_UNINIT, 0); 3467d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 346823b4201dSJian Shen 3469862d969aSHuazhong Tan if (test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3470eddf0462SYunsheng Lin hclgevf_misc_irq_uninit(hdev); 3471e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 34727a01c897SSalil Mehta } 34737a01c897SSalil Mehta 3474862d969aSHuazhong Tan hclgevf_cmd_uninit(hdev); 3475cd624299SYufeng Mo hclgevf_devlink_uninit(hdev); 3476e3364c5fSZenghui Yu hclgevf_pci_uninit(hdev); 3477ee4bcd3bSJian Shen hclgevf_uninit_mac_list(hdev); 3478862d969aSHuazhong Tan } 3479862d969aSHuazhong Tan 34807a01c897SSalil Mehta static int hclgevf_init_ae_dev(struct hnae3_ae_dev *ae_dev) 34817a01c897SSalil Mehta { 34827a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 34837a01c897SSalil Mehta int ret; 34847a01c897SSalil Mehta 34857a01c897SSalil Mehta ret = hclgevf_alloc_hdev(ae_dev); 34867a01c897SSalil Mehta if (ret) { 34877a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device allocation failed\n"); 34887a01c897SSalil Mehta return ret; 34897a01c897SSalil Mehta } 34907a01c897SSalil Mehta 34917a01c897SSalil Mehta ret = hclgevf_init_hdev(ae_dev->priv); 3492a6d818e3SYunsheng Lin if (ret) { 34937a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device initialization failed\n"); 34947a01c897SSalil Mehta return ret; 34957a01c897SSalil Mehta } 34967a01c897SSalil Mehta 3497a6d818e3SYunsheng Lin return 0; 3498a6d818e3SYunsheng Lin } 3499a6d818e3SYunsheng Lin 35007a01c897SSalil Mehta static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) 35017a01c897SSalil Mehta { 35027a01c897SSalil Mehta struct hclgevf_dev *hdev = ae_dev->priv; 35037a01c897SSalil Mehta 35047a01c897SSalil Mehta hclgevf_uninit_hdev(hdev); 3505e2cb1decSSalil Mehta ae_dev->priv = NULL; 3506e2cb1decSSalil Mehta } 3507e2cb1decSSalil Mehta 3508849e4607SPeng Li static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev) 3509849e4607SPeng Li { 3510849e4607SPeng Li struct hnae3_handle *nic = &hdev->nic; 3511849e4607SPeng Li struct hnae3_knic_private_info *kinfo = &nic->kinfo; 3512849e4607SPeng Li 35138be73621SHuazhong Tan return min_t(u32, hdev->rss_size_max, 351435244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 3515849e4607SPeng Li } 3516849e4607SPeng Li 3517849e4607SPeng Li /** 3518849e4607SPeng Li * hclgevf_get_channels - Get the current channels enabled and max supported. 3519849e4607SPeng Li * @handle: hardware information for network interface 3520849e4607SPeng Li * @ch: ethtool channels structure 3521849e4607SPeng Li * 3522849e4607SPeng Li * We don't support separate tx and rx queues as channels. The other count 3523849e4607SPeng Li * represents how many queues are being used for control. max_combined counts 3524849e4607SPeng Li * how many queue pairs we can support. They may not be mapped 1 to 1 with 3525849e4607SPeng Li * q_vectors since we support a lot more queue pairs than q_vectors. 3526849e4607SPeng Li **/ 3527849e4607SPeng Li static void hclgevf_get_channels(struct hnae3_handle *handle, 3528849e4607SPeng Li struct ethtool_channels *ch) 3529849e4607SPeng Li { 3530849e4607SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3531849e4607SPeng Li 3532849e4607SPeng Li ch->max_combined = hclgevf_get_max_channels(hdev); 3533849e4607SPeng Li ch->other_count = 0; 3534849e4607SPeng Li ch->max_other = 0; 35358be73621SHuazhong Tan ch->combined_count = handle->kinfo.rss_size; 3536849e4607SPeng Li } 3537849e4607SPeng Li 3538cc719218SPeng Li static void hclgevf_get_tqps_and_rss_info(struct hnae3_handle *handle, 35390d43bf45SHuazhong Tan u16 *alloc_tqps, u16 *max_rss_size) 3540cc719218SPeng Li { 3541cc719218SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3542cc719218SPeng Li 35430d43bf45SHuazhong Tan *alloc_tqps = hdev->num_tqps; 3544cc719218SPeng Li *max_rss_size = hdev->rss_size_max; 3545cc719218SPeng Li } 3546cc719218SPeng Li 35474093d1a2SGuangbin Huang static void hclgevf_update_rss_size(struct hnae3_handle *handle, 35484093d1a2SGuangbin Huang u32 new_tqps_num) 35494093d1a2SGuangbin Huang { 35504093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 35514093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35524093d1a2SGuangbin Huang u16 max_rss_size; 35534093d1a2SGuangbin Huang 35544093d1a2SGuangbin Huang kinfo->req_rss_size = new_tqps_num; 35554093d1a2SGuangbin Huang 35564093d1a2SGuangbin Huang max_rss_size = min_t(u16, hdev->rss_size_max, 355735244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 35584093d1a2SGuangbin Huang 35594093d1a2SGuangbin Huang /* Use the user's configuration when it is not larger than 35604093d1a2SGuangbin Huang * max_rss_size, otherwise, use the maximum specification value. 35614093d1a2SGuangbin Huang */ 35624093d1a2SGuangbin Huang if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && 35634093d1a2SGuangbin Huang kinfo->req_rss_size <= max_rss_size) 35644093d1a2SGuangbin Huang kinfo->rss_size = kinfo->req_rss_size; 35654093d1a2SGuangbin Huang else if (kinfo->rss_size > max_rss_size || 35664093d1a2SGuangbin Huang (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) 35674093d1a2SGuangbin Huang kinfo->rss_size = max_rss_size; 35684093d1a2SGuangbin Huang 356935244430SJian Shen kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; 35704093d1a2SGuangbin Huang } 35714093d1a2SGuangbin Huang 35724093d1a2SGuangbin Huang static int hclgevf_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, 35734093d1a2SGuangbin Huang bool rxfh_configured) 35744093d1a2SGuangbin Huang { 35754093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35764093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 35774093d1a2SGuangbin Huang u16 cur_rss_size = kinfo->rss_size; 35784093d1a2SGuangbin Huang u16 cur_tqps = kinfo->num_tqps; 35794093d1a2SGuangbin Huang u32 *rss_indir; 35804093d1a2SGuangbin Huang unsigned int i; 35814093d1a2SGuangbin Huang int ret; 35824093d1a2SGuangbin Huang 35834093d1a2SGuangbin Huang hclgevf_update_rss_size(handle, new_tqps_num); 35844093d1a2SGuangbin Huang 35854093d1a2SGuangbin Huang ret = hclgevf_set_rss_tc_mode(hdev, kinfo->rss_size); 35864093d1a2SGuangbin Huang if (ret) 35874093d1a2SGuangbin Huang return ret; 35884093d1a2SGuangbin Huang 3589cd7e963dSSalil Mehta /* RSS indirection table has been configured by user */ 35904093d1a2SGuangbin Huang if (rxfh_configured) 35914093d1a2SGuangbin Huang goto out; 35924093d1a2SGuangbin Huang 35934093d1a2SGuangbin Huang /* Reinitializes the rss indirect table according to the new RSS size */ 359487ce161eSGuangbin Huang rss_indir = kcalloc(hdev->ae_dev->dev_specs.rss_ind_tbl_size, 359587ce161eSGuangbin Huang sizeof(u32), GFP_KERNEL); 35964093d1a2SGuangbin Huang if (!rss_indir) 35974093d1a2SGuangbin Huang return -ENOMEM; 35984093d1a2SGuangbin Huang 359987ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 36004093d1a2SGuangbin Huang rss_indir[i] = i % kinfo->rss_size; 36014093d1a2SGuangbin Huang 3602944de484SGuojia Liao hdev->rss_cfg.rss_size = kinfo->rss_size; 3603944de484SGuojia Liao 36044093d1a2SGuangbin Huang ret = hclgevf_set_rss(handle, rss_indir, NULL, 0); 36054093d1a2SGuangbin Huang if (ret) 36064093d1a2SGuangbin Huang dev_err(&hdev->pdev->dev, "set rss indir table fail, ret=%d\n", 36074093d1a2SGuangbin Huang ret); 36084093d1a2SGuangbin Huang 36094093d1a2SGuangbin Huang kfree(rss_indir); 36104093d1a2SGuangbin Huang 36114093d1a2SGuangbin Huang out: 36124093d1a2SGuangbin Huang if (!ret) 36134093d1a2SGuangbin Huang dev_info(&hdev->pdev->dev, 36144093d1a2SGuangbin Huang "Channels changed, rss_size from %u to %u, tqps from %u to %u", 36154093d1a2SGuangbin Huang cur_rss_size, kinfo->rss_size, 361635244430SJian Shen cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc); 36174093d1a2SGuangbin Huang 36184093d1a2SGuangbin Huang return ret; 36194093d1a2SGuangbin Huang } 36204093d1a2SGuangbin Huang 3621175ec96bSFuyun Liang static int hclgevf_get_status(struct hnae3_handle *handle) 3622175ec96bSFuyun Liang { 3623175ec96bSFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3624175ec96bSFuyun Liang 3625175ec96bSFuyun Liang return hdev->hw.mac.link; 3626175ec96bSFuyun Liang } 3627175ec96bSFuyun Liang 36284a152de9SFuyun Liang static void hclgevf_get_ksettings_an_result(struct hnae3_handle *handle, 36294a152de9SFuyun Liang u8 *auto_neg, u32 *speed, 36304a152de9SFuyun Liang u8 *duplex) 36314a152de9SFuyun Liang { 36324a152de9SFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36334a152de9SFuyun Liang 36344a152de9SFuyun Liang if (speed) 36354a152de9SFuyun Liang *speed = hdev->hw.mac.speed; 36364a152de9SFuyun Liang if (duplex) 36374a152de9SFuyun Liang *duplex = hdev->hw.mac.duplex; 36384a152de9SFuyun Liang if (auto_neg) 36394a152de9SFuyun Liang *auto_neg = AUTONEG_DISABLE; 36404a152de9SFuyun Liang } 36414a152de9SFuyun Liang 36424a152de9SFuyun Liang void hclgevf_update_speed_duplex(struct hclgevf_dev *hdev, u32 speed, 36434a152de9SFuyun Liang u8 duplex) 36444a152de9SFuyun Liang { 36454a152de9SFuyun Liang hdev->hw.mac.speed = speed; 36464a152de9SFuyun Liang hdev->hw.mac.duplex = duplex; 36474a152de9SFuyun Liang } 36484a152de9SFuyun Liang 36491731be4cSYonglong Liu static int hclgevf_gro_en(struct hnae3_handle *handle, bool enable) 36505c9f6b39SPeng Li { 36515c9f6b39SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36523462207dSYufeng Mo bool gro_en_old = hdev->gro_en; 36533462207dSYufeng Mo int ret; 36545c9f6b39SPeng Li 36553462207dSYufeng Mo hdev->gro_en = enable; 36563462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 36573462207dSYufeng Mo if (ret) 36583462207dSYufeng Mo hdev->gro_en = gro_en_old; 36593462207dSYufeng Mo 36603462207dSYufeng Mo return ret; 36615c9f6b39SPeng Li } 36625c9f6b39SPeng Li 366388d10bd6SJian Shen static void hclgevf_get_media_type(struct hnae3_handle *handle, u8 *media_type, 366488d10bd6SJian Shen u8 *module_type) 3665c136b884SPeng Li { 3666c136b884SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 366788d10bd6SJian Shen 3668c136b884SPeng Li if (media_type) 3669c136b884SPeng Li *media_type = hdev->hw.mac.media_type; 367088d10bd6SJian Shen 367188d10bd6SJian Shen if (module_type) 367288d10bd6SJian Shen *module_type = hdev->hw.mac.module_type; 3673c136b884SPeng Li } 3674c136b884SPeng Li 36754d60291bSHuazhong Tan static bool hclgevf_get_hw_reset_stat(struct hnae3_handle *handle) 36764d60291bSHuazhong Tan { 36774d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36784d60291bSHuazhong Tan 3679aa5c4f17SHuazhong Tan return !!hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 36804d60291bSHuazhong Tan } 36814d60291bSHuazhong Tan 3682fe735c84SHuazhong Tan static bool hclgevf_get_cmdq_stat(struct hnae3_handle *handle) 3683fe735c84SHuazhong Tan { 3684fe735c84SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3685fe735c84SHuazhong Tan 3686fe735c84SHuazhong Tan return test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 3687fe735c84SHuazhong Tan } 3688fe735c84SHuazhong Tan 36894d60291bSHuazhong Tan static bool hclgevf_ae_dev_resetting(struct hnae3_handle *handle) 36904d60291bSHuazhong Tan { 36914d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36924d60291bSHuazhong Tan 36934d60291bSHuazhong Tan return test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 36944d60291bSHuazhong Tan } 36954d60291bSHuazhong Tan 36964d60291bSHuazhong Tan static unsigned long hclgevf_ae_dev_reset_cnt(struct hnae3_handle *handle) 36974d60291bSHuazhong Tan { 36984d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36994d60291bSHuazhong Tan 3700c88a6e7dSHuazhong Tan return hdev->rst_stats.hw_rst_done_cnt; 37014d60291bSHuazhong Tan } 37024d60291bSHuazhong Tan 37039194d18bSliuzhongzhu static void hclgevf_get_link_mode(struct hnae3_handle *handle, 37049194d18bSliuzhongzhu unsigned long *supported, 37059194d18bSliuzhongzhu unsigned long *advertising) 37069194d18bSliuzhongzhu { 37079194d18bSliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37089194d18bSliuzhongzhu 37099194d18bSliuzhongzhu *supported = hdev->hw.mac.supported; 37109194d18bSliuzhongzhu *advertising = hdev->hw.mac.advertising; 37119194d18bSliuzhongzhu } 37129194d18bSliuzhongzhu 37131600c3e5SJian Shen #define MAX_SEPARATE_NUM 4 3714e407efddSHuazhong Tan #define SEPARATOR_VALUE 0xFDFCFBFA 37151600c3e5SJian Shen #define REG_NUM_PER_LINE 4 37161600c3e5SJian Shen #define REG_LEN_PER_LINE (REG_NUM_PER_LINE * sizeof(u32)) 37171600c3e5SJian Shen 37181600c3e5SJian Shen static int hclgevf_get_regs_len(struct hnae3_handle *handle) 37191600c3e5SJian Shen { 37201600c3e5SJian Shen int cmdq_lines, common_lines, ring_lines, tqp_intr_lines; 37211600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37221600c3e5SJian Shen 37231600c3e5SJian Shen cmdq_lines = sizeof(cmdq_reg_addr_list) / REG_LEN_PER_LINE + 1; 37241600c3e5SJian Shen common_lines = sizeof(common_reg_addr_list) / REG_LEN_PER_LINE + 1; 37251600c3e5SJian Shen ring_lines = sizeof(ring_reg_addr_list) / REG_LEN_PER_LINE + 1; 37261600c3e5SJian Shen tqp_intr_lines = sizeof(tqp_intr_reg_addr_list) / REG_LEN_PER_LINE + 1; 37271600c3e5SJian Shen 37281600c3e5SJian Shen return (cmdq_lines + common_lines + ring_lines * hdev->num_tqps + 37291600c3e5SJian Shen tqp_intr_lines * (hdev->num_msi_used - 1)) * REG_LEN_PER_LINE; 37301600c3e5SJian Shen } 37311600c3e5SJian Shen 37321600c3e5SJian Shen static void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version, 37331600c3e5SJian Shen void *data) 37341600c3e5SJian Shen { 37351600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37361600c3e5SJian Shen int i, j, reg_um, separator_num; 37371600c3e5SJian Shen u32 *reg = data; 37381600c3e5SJian Shen 37391600c3e5SJian Shen *version = hdev->fw_version; 37401600c3e5SJian Shen 37411600c3e5SJian Shen /* fetching per-VF registers values from VF PCIe register space */ 37421600c3e5SJian Shen reg_um = sizeof(cmdq_reg_addr_list) / sizeof(u32); 37431600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37441600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37451600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]); 37461600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37471600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37481600c3e5SJian Shen 37491600c3e5SJian Shen reg_um = sizeof(common_reg_addr_list) / sizeof(u32); 37501600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37511600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37521600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]); 37531600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37541600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37551600c3e5SJian Shen 37561600c3e5SJian Shen reg_um = sizeof(ring_reg_addr_list) / sizeof(u32); 37571600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37581600c3e5SJian Shen for (j = 0; j < hdev->num_tqps; j++) { 37591600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37601600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 37611600c3e5SJian Shen ring_reg_addr_list[i] + 37621600c3e5SJian Shen 0x200 * j); 37631600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37641600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37651600c3e5SJian Shen } 37661600c3e5SJian Shen 37671600c3e5SJian Shen reg_um = sizeof(tqp_intr_reg_addr_list) / sizeof(u32); 37681600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37691600c3e5SJian Shen for (j = 0; j < hdev->num_msi_used - 1; j++) { 37701600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37711600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 37721600c3e5SJian Shen tqp_intr_reg_addr_list[i] + 37731600c3e5SJian Shen 4 * j); 37741600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37751600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37761600c3e5SJian Shen } 37771600c3e5SJian Shen } 37781600c3e5SJian Shen 377992f11ea1SJian Shen void hclgevf_update_port_base_vlan_info(struct hclgevf_dev *hdev, u16 state, 378092f11ea1SJian Shen u8 *port_base_vlan_info, u8 data_size) 378192f11ea1SJian Shen { 378292f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 3783d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3784a6f7bfdcSJian Shen int ret; 378592f11ea1SJian Shen 378692f11ea1SJian Shen rtnl_lock(); 3787a6f7bfdcSJian Shen 3788b7b5d25bSGuojia Liao if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 3789b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) { 3790a6f7bfdcSJian Shen dev_warn(&hdev->pdev->dev, 3791a6f7bfdcSJian Shen "is resetting when updating port based vlan info\n"); 379292f11ea1SJian Shen rtnl_unlock(); 3793a6f7bfdcSJian Shen return; 3794a6f7bfdcSJian Shen } 3795a6f7bfdcSJian Shen 3796a6f7bfdcSJian Shen ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 3797a6f7bfdcSJian Shen if (ret) { 3798a6f7bfdcSJian Shen rtnl_unlock(); 3799a6f7bfdcSJian Shen return; 3800a6f7bfdcSJian Shen } 380192f11ea1SJian Shen 380292f11ea1SJian Shen /* send msg to PF and wait update port based vlan info */ 3803d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 3804d3410018SYufeng Mo HCLGE_MBX_PORT_BASE_VLAN_CFG); 3805d3410018SYufeng Mo memcpy(send_msg.data, port_base_vlan_info, data_size); 3806a6f7bfdcSJian Shen ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3807a6f7bfdcSJian Shen if (!ret) { 380892f11ea1SJian Shen if (state == HNAE3_PORT_BASE_VLAN_DISABLE) 3809a6f7bfdcSJian Shen nic->port_base_vlan_state = state; 381092f11ea1SJian Shen else 381192f11ea1SJian Shen nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE; 3812a6f7bfdcSJian Shen } 381392f11ea1SJian Shen 381492f11ea1SJian Shen hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 381592f11ea1SJian Shen rtnl_unlock(); 381692f11ea1SJian Shen } 381792f11ea1SJian Shen 3818e2cb1decSSalil Mehta static const struct hnae3_ae_ops hclgevf_ops = { 3819e2cb1decSSalil Mehta .init_ae_dev = hclgevf_init_ae_dev, 3820e2cb1decSSalil Mehta .uninit_ae_dev = hclgevf_uninit_ae_dev, 3821bb1890d5SJiaran Zhang .reset_prepare = hclgevf_reset_prepare_general, 3822bb1890d5SJiaran Zhang .reset_done = hclgevf_reset_done, 3823e718a93fSPeng Li .init_client_instance = hclgevf_init_client_instance, 3824e718a93fSPeng Li .uninit_client_instance = hclgevf_uninit_client_instance, 3825e2cb1decSSalil Mehta .start = hclgevf_ae_start, 3826e2cb1decSSalil Mehta .stop = hclgevf_ae_stop, 3827a6d818e3SYunsheng Lin .client_start = hclgevf_client_start, 3828a6d818e3SYunsheng Lin .client_stop = hclgevf_client_stop, 3829e2cb1decSSalil Mehta .map_ring_to_vector = hclgevf_map_ring_to_vector, 3830e2cb1decSSalil Mehta .unmap_ring_from_vector = hclgevf_unmap_ring_from_vector, 3831e2cb1decSSalil Mehta .get_vector = hclgevf_get_vector, 38320d3e6631SYunsheng Lin .put_vector = hclgevf_put_vector, 3833e2cb1decSSalil Mehta .reset_queue = hclgevf_reset_tqp, 3834e2cb1decSSalil Mehta .get_mac_addr = hclgevf_get_mac_addr, 3835e2cb1decSSalil Mehta .set_mac_addr = hclgevf_set_mac_addr, 3836e2cb1decSSalil Mehta .add_uc_addr = hclgevf_add_uc_addr, 3837e2cb1decSSalil Mehta .rm_uc_addr = hclgevf_rm_uc_addr, 3838e2cb1decSSalil Mehta .add_mc_addr = hclgevf_add_mc_addr, 3839e2cb1decSSalil Mehta .rm_mc_addr = hclgevf_rm_mc_addr, 3840e2cb1decSSalil Mehta .get_stats = hclgevf_get_stats, 3841e2cb1decSSalil Mehta .update_stats = hclgevf_update_stats, 3842e2cb1decSSalil Mehta .get_strings = hclgevf_get_strings, 3843e2cb1decSSalil Mehta .get_sset_count = hclgevf_get_sset_count, 3844e2cb1decSSalil Mehta .get_rss_key_size = hclgevf_get_rss_key_size, 3845e2cb1decSSalil Mehta .get_rss = hclgevf_get_rss, 3846e2cb1decSSalil Mehta .set_rss = hclgevf_set_rss, 3847d97b3072SJian Shen .get_rss_tuple = hclgevf_get_rss_tuple, 3848d97b3072SJian Shen .set_rss_tuple = hclgevf_set_rss_tuple, 3849e2cb1decSSalil Mehta .get_tc_size = hclgevf_get_tc_size, 3850e2cb1decSSalil Mehta .get_fw_version = hclgevf_get_fw_version, 3851e2cb1decSSalil Mehta .set_vlan_filter = hclgevf_set_vlan_filter, 3852fa6a262aSJian Shen .enable_vlan_filter = hclgevf_enable_vlan_filter, 3853b2641e2aSYunsheng Lin .enable_hw_strip_rxvtag = hclgevf_en_hw_strip_rxvtag, 38546d4c3981SSalil Mehta .reset_event = hclgevf_reset_event, 3855720bd583SHuazhong Tan .set_default_reset_request = hclgevf_set_def_reset_request, 38564093d1a2SGuangbin Huang .set_channels = hclgevf_set_channels, 3857849e4607SPeng Li .get_channels = hclgevf_get_channels, 3858cc719218SPeng Li .get_tqps_and_rss_info = hclgevf_get_tqps_and_rss_info, 38591600c3e5SJian Shen .get_regs_len = hclgevf_get_regs_len, 38601600c3e5SJian Shen .get_regs = hclgevf_get_regs, 3861175ec96bSFuyun Liang .get_status = hclgevf_get_status, 38624a152de9SFuyun Liang .get_ksettings_an_result = hclgevf_get_ksettings_an_result, 3863c136b884SPeng Li .get_media_type = hclgevf_get_media_type, 38644d60291bSHuazhong Tan .get_hw_reset_stat = hclgevf_get_hw_reset_stat, 38654d60291bSHuazhong Tan .ae_dev_resetting = hclgevf_ae_dev_resetting, 38664d60291bSHuazhong Tan .ae_dev_reset_cnt = hclgevf_ae_dev_reset_cnt, 38675c9f6b39SPeng Li .set_gro_en = hclgevf_gro_en, 3868818f1675SYunsheng Lin .set_mtu = hclgevf_set_mtu, 38690c29d191Sliuzhongzhu .get_global_queue_id = hclgevf_get_qid_global, 38708cdb992fSJian Shen .set_timer_task = hclgevf_set_timer_task, 38719194d18bSliuzhongzhu .get_link_mode = hclgevf_get_link_mode, 3872e196ec75SJian Shen .set_promisc_mode = hclgevf_set_promisc_mode, 3873c631c696SJian Shen .request_update_promisc_mode = hclgevf_request_update_promisc_mode, 3874fe735c84SHuazhong Tan .get_cmdq_stat = hclgevf_get_cmdq_stat, 3875e2cb1decSSalil Mehta }; 3876e2cb1decSSalil Mehta 3877e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf = { 3878e2cb1decSSalil Mehta .ops = &hclgevf_ops, 3879e2cb1decSSalil Mehta .pdev_id_table = ae_algovf_pci_tbl, 3880e2cb1decSSalil Mehta }; 3881e2cb1decSSalil Mehta 3882e2cb1decSSalil Mehta static int hclgevf_init(void) 3883e2cb1decSSalil Mehta { 3884e2cb1decSSalil Mehta pr_info("%s is initializing\n", HCLGEVF_NAME); 3885e2cb1decSSalil Mehta 388616deaef2SYunsheng Lin hclgevf_wq = alloc_workqueue("%s", 0, 0, HCLGEVF_NAME); 38870ea68902SYunsheng Lin if (!hclgevf_wq) { 38880ea68902SYunsheng Lin pr_err("%s: failed to create workqueue\n", HCLGEVF_NAME); 38890ea68902SYunsheng Lin return -ENOMEM; 38900ea68902SYunsheng Lin } 38910ea68902SYunsheng Lin 3892854cf33aSFuyun Liang hnae3_register_ae_algo(&ae_algovf); 3893854cf33aSFuyun Liang 3894854cf33aSFuyun Liang return 0; 3895e2cb1decSSalil Mehta } 3896e2cb1decSSalil Mehta 3897e2cb1decSSalil Mehta static void hclgevf_exit(void) 3898e2cb1decSSalil Mehta { 3899e2cb1decSSalil Mehta hnae3_unregister_ae_algo(&ae_algovf); 39000ea68902SYunsheng Lin destroy_workqueue(hclgevf_wq); 3901e2cb1decSSalil Mehta } 3902e2cb1decSSalil Mehta module_init(hclgevf_init); 3903e2cb1decSSalil Mehta module_exit(hclgevf_exit); 3904e2cb1decSSalil Mehta 3905e2cb1decSSalil Mehta MODULE_LICENSE("GPL"); 3906e2cb1decSSalil Mehta MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 3907e2cb1decSSalil Mehta MODULE_DESCRIPTION("HCLGEVF Driver"); 3908e2cb1decSSalil Mehta MODULE_VERSION(HCLGEVF_MOD_VERSION); 3909