1e2cb1decSSalil Mehta // SPDX-License-Identifier: GPL-2.0+ 2e2cb1decSSalil Mehta // Copyright (c) 2016-2017 Hisilicon Limited. 3e2cb1decSSalil Mehta 4e2cb1decSSalil Mehta #include <linux/etherdevice.h> 5aa5c4f17SHuazhong Tan #include <linux/iopoll.h> 66988eb2aSSalil Mehta #include <net/rtnetlink.h> 7e2cb1decSSalil Mehta #include "hclgevf_cmd.h" 8e2cb1decSSalil Mehta #include "hclgevf_main.h" 9e2cb1decSSalil Mehta #include "hclge_mbx.h" 10e2cb1decSSalil Mehta #include "hnae3.h" 11cd624299SYufeng Mo #include "hclgevf_devlink.h" 12e2cb1decSSalil Mehta 13e2cb1decSSalil Mehta #define HCLGEVF_NAME "hclgevf" 14e2cb1decSSalil Mehta 15bbe6540eSHuazhong Tan #define HCLGEVF_RESET_MAX_FAIL_CNT 5 16bbe6540eSHuazhong Tan 179c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev); 185e7414cdSJian Shen static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 195e7414cdSJian Shen unsigned long delay); 205e7414cdSJian Shen 21e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf; 22e2cb1decSSalil Mehta 230ea68902SYunsheng Lin static struct workqueue_struct *hclgevf_wq; 240ea68902SYunsheng Lin 25e2cb1decSSalil Mehta static const struct pci_device_id ae_algovf_pci_tbl[] = { 26c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_VF), 0}, 27c155e22bSGuangbin Huang {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF), 28c155e22bSGuangbin Huang HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 29e2cb1decSSalil Mehta /* required last entry */ 30e2cb1decSSalil Mehta {0, } 31e2cb1decSSalil Mehta }; 32e2cb1decSSalil Mehta 33472d7eceSJian Shen static const u8 hclgevf_hash_key[] = { 34472d7eceSJian Shen 0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2, 35472d7eceSJian Shen 0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0, 36472d7eceSJian Shen 0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4, 37472d7eceSJian Shen 0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C, 38472d7eceSJian Shen 0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA 39472d7eceSJian Shen }; 40472d7eceSJian Shen 412f550a46SYunsheng Lin MODULE_DEVICE_TABLE(pci, ae_algovf_pci_tbl); 422f550a46SYunsheng Lin 435a24b1fdSPeng Li static const u32 cmdq_reg_addr_list[] = {HCLGEVF_NIC_CSQ_BASEADDR_L_REG, 445a24b1fdSPeng Li HCLGEVF_NIC_CSQ_BASEADDR_H_REG, 455a24b1fdSPeng Li HCLGEVF_NIC_CSQ_DEPTH_REG, 465a24b1fdSPeng Li HCLGEVF_NIC_CSQ_TAIL_REG, 475a24b1fdSPeng Li HCLGEVF_NIC_CSQ_HEAD_REG, 485a24b1fdSPeng Li HCLGEVF_NIC_CRQ_BASEADDR_L_REG, 495a24b1fdSPeng Li HCLGEVF_NIC_CRQ_BASEADDR_H_REG, 505a24b1fdSPeng Li HCLGEVF_NIC_CRQ_DEPTH_REG, 515a24b1fdSPeng Li HCLGEVF_NIC_CRQ_TAIL_REG, 525a24b1fdSPeng Li HCLGEVF_NIC_CRQ_HEAD_REG, 531600c3e5SJian Shen HCLGEVF_VECTOR0_CMDQ_SRC_REG, 549cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG, 551600c3e5SJian Shen HCLGEVF_CMDQ_INTR_EN_REG, 561600c3e5SJian Shen HCLGEVF_CMDQ_INTR_GEN_REG}; 571600c3e5SJian Shen 581600c3e5SJian Shen static const u32 common_reg_addr_list[] = {HCLGEVF_MISC_VECTOR_REG_BASE, 591600c3e5SJian Shen HCLGEVF_RST_ING, 601600c3e5SJian Shen HCLGEVF_GRO_EN_REG}; 611600c3e5SJian Shen 621600c3e5SJian Shen static const u32 ring_reg_addr_list[] = {HCLGEVF_RING_RX_ADDR_L_REG, 631600c3e5SJian Shen HCLGEVF_RING_RX_ADDR_H_REG, 641600c3e5SJian Shen HCLGEVF_RING_RX_BD_NUM_REG, 651600c3e5SJian Shen HCLGEVF_RING_RX_BD_LENGTH_REG, 661600c3e5SJian Shen HCLGEVF_RING_RX_MERGE_EN_REG, 671600c3e5SJian Shen HCLGEVF_RING_RX_TAIL_REG, 681600c3e5SJian Shen HCLGEVF_RING_RX_HEAD_REG, 691600c3e5SJian Shen HCLGEVF_RING_RX_FBD_NUM_REG, 701600c3e5SJian Shen HCLGEVF_RING_RX_OFFSET_REG, 711600c3e5SJian Shen HCLGEVF_RING_RX_FBD_OFFSET_REG, 721600c3e5SJian Shen HCLGEVF_RING_RX_STASH_REG, 731600c3e5SJian Shen HCLGEVF_RING_RX_BD_ERR_REG, 741600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_L_REG, 751600c3e5SJian Shen HCLGEVF_RING_TX_ADDR_H_REG, 761600c3e5SJian Shen HCLGEVF_RING_TX_BD_NUM_REG, 771600c3e5SJian Shen HCLGEVF_RING_TX_PRIORITY_REG, 781600c3e5SJian Shen HCLGEVF_RING_TX_TC_REG, 791600c3e5SJian Shen HCLGEVF_RING_TX_MERGE_EN_REG, 801600c3e5SJian Shen HCLGEVF_RING_TX_TAIL_REG, 811600c3e5SJian Shen HCLGEVF_RING_TX_HEAD_REG, 821600c3e5SJian Shen HCLGEVF_RING_TX_FBD_NUM_REG, 831600c3e5SJian Shen HCLGEVF_RING_TX_OFFSET_REG, 841600c3e5SJian Shen HCLGEVF_RING_TX_EBD_NUM_REG, 851600c3e5SJian Shen HCLGEVF_RING_TX_EBD_OFFSET_REG, 861600c3e5SJian Shen HCLGEVF_RING_TX_BD_ERR_REG, 871600c3e5SJian Shen HCLGEVF_RING_EN_REG}; 881600c3e5SJian Shen 891600c3e5SJian Shen static const u32 tqp_intr_reg_addr_list[] = {HCLGEVF_TQP_INTR_CTRL_REG, 901600c3e5SJian Shen HCLGEVF_TQP_INTR_GL0_REG, 911600c3e5SJian Shen HCLGEVF_TQP_INTR_GL1_REG, 921600c3e5SJian Shen HCLGEVF_TQP_INTR_GL2_REG, 931600c3e5SJian Shen HCLGEVF_TQP_INTR_RL_REG}; 941600c3e5SJian Shen 959b2f3477SWeihang Li static struct hclgevf_dev *hclgevf_ae_get_hdev(struct hnae3_handle *handle) 96e2cb1decSSalil Mehta { 97eed9535fSPeng Li if (!handle->client) 98eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, nic); 99eed9535fSPeng Li else if (handle->client->type == HNAE3_CLIENT_ROCE) 100eed9535fSPeng Li return container_of(handle, struct hclgevf_dev, roce); 101eed9535fSPeng Li else 102e2cb1decSSalil Mehta return container_of(handle, struct hclgevf_dev, nic); 103e2cb1decSSalil Mehta } 104e2cb1decSSalil Mehta 105e2cb1decSSalil Mehta static int hclgevf_tqps_update_stats(struct hnae3_handle *handle) 106e2cb1decSSalil Mehta { 107b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 108e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 109e2cb1decSSalil Mehta struct hclgevf_desc desc; 110e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 111e2cb1decSSalil Mehta int status; 112e2cb1decSSalil Mehta int i; 113e2cb1decSSalil Mehta 114b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 115b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 116e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, 117e2cb1decSSalil Mehta HCLGEVF_OPC_QUERY_RX_STATUS, 118e2cb1decSSalil Mehta true); 119e2cb1decSSalil Mehta 120e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 121e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 122e2cb1decSSalil Mehta if (status) { 123e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 124e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 125e2cb1decSSalil Mehta status, i); 126e2cb1decSSalil Mehta return status; 127e2cb1decSSalil Mehta } 128e2cb1decSSalil Mehta tqp->tqp_stats.rcb_rx_ring_pktnum_rcd += 129cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 130e2cb1decSSalil Mehta 131e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_TX_STATUS, 132e2cb1decSSalil Mehta true); 133e2cb1decSSalil Mehta 134e2cb1decSSalil Mehta desc.data[0] = cpu_to_le32(tqp->index & 0x1ff); 135e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 136e2cb1decSSalil Mehta if (status) { 137e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 138e2cb1decSSalil Mehta "Query tqp stat fail, status = %d,queue = %d\n", 139e2cb1decSSalil Mehta status, i); 140e2cb1decSSalil Mehta return status; 141e2cb1decSSalil Mehta } 142e2cb1decSSalil Mehta tqp->tqp_stats.rcb_tx_ring_pktnum_rcd += 143cf72fa63SJian Shen le32_to_cpu(desc.data[1]); 144e2cb1decSSalil Mehta } 145e2cb1decSSalil Mehta 146e2cb1decSSalil Mehta return 0; 147e2cb1decSSalil Mehta } 148e2cb1decSSalil Mehta 149e2cb1decSSalil Mehta static u64 *hclgevf_tqps_get_stats(struct hnae3_handle *handle, u64 *data) 150e2cb1decSSalil Mehta { 151e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo = &handle->kinfo; 152e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 153e2cb1decSSalil Mehta u64 *buff = data; 154e2cb1decSSalil Mehta int i; 155e2cb1decSSalil Mehta 156b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 157b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 158e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_tx_ring_pktnum_rcd; 159e2cb1decSSalil Mehta } 160e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 161b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 162e2cb1decSSalil Mehta *buff++ = tqp->tqp_stats.rcb_rx_ring_pktnum_rcd; 163e2cb1decSSalil Mehta } 164e2cb1decSSalil Mehta 165e2cb1decSSalil Mehta return buff; 166e2cb1decSSalil Mehta } 167e2cb1decSSalil Mehta 168e2cb1decSSalil Mehta static int hclgevf_tqps_get_sset_count(struct hnae3_handle *handle, int strset) 169e2cb1decSSalil Mehta { 170b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 171e2cb1decSSalil Mehta 172b4f1d303SJian Shen return kinfo->num_tqps * 2; 173e2cb1decSSalil Mehta } 174e2cb1decSSalil Mehta 175e2cb1decSSalil Mehta static u8 *hclgevf_tqps_get_strings(struct hnae3_handle *handle, u8 *data) 176e2cb1decSSalil Mehta { 177b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 178e2cb1decSSalil Mehta u8 *buff = data; 1799d8d5a36SYufeng Mo int i; 180e2cb1decSSalil Mehta 181b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 182b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 183e2cb1decSSalil Mehta struct hclgevf_tqp, q); 184c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "txq%u_pktnum_rcd", 185e2cb1decSSalil Mehta tqp->index); 186e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 187e2cb1decSSalil Mehta } 188e2cb1decSSalil Mehta 189b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 190b4f1d303SJian Shen struct hclgevf_tqp *tqp = container_of(kinfo->tqp[i], 191e2cb1decSSalil Mehta struct hclgevf_tqp, q); 192c5aaf176SJiaran Zhang snprintf(buff, ETH_GSTRING_LEN, "rxq%u_pktnum_rcd", 193e2cb1decSSalil Mehta tqp->index); 194e2cb1decSSalil Mehta buff += ETH_GSTRING_LEN; 195e2cb1decSSalil Mehta } 196e2cb1decSSalil Mehta 197e2cb1decSSalil Mehta return buff; 198e2cb1decSSalil Mehta } 199e2cb1decSSalil Mehta 200e2cb1decSSalil Mehta static void hclgevf_update_stats(struct hnae3_handle *handle, 201e2cb1decSSalil Mehta struct net_device_stats *net_stats) 202e2cb1decSSalil Mehta { 203e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 204e2cb1decSSalil Mehta int status; 205e2cb1decSSalil Mehta 206e2cb1decSSalil Mehta status = hclgevf_tqps_update_stats(handle); 207e2cb1decSSalil Mehta if (status) 208e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 209e2cb1decSSalil Mehta "VF update of TQPS stats fail, status = %d.\n", 210e2cb1decSSalil Mehta status); 211e2cb1decSSalil Mehta } 212e2cb1decSSalil Mehta 213e2cb1decSSalil Mehta static int hclgevf_get_sset_count(struct hnae3_handle *handle, int strset) 214e2cb1decSSalil Mehta { 215e2cb1decSSalil Mehta if (strset == ETH_SS_TEST) 216e2cb1decSSalil Mehta return -EOPNOTSUPP; 217e2cb1decSSalil Mehta else if (strset == ETH_SS_STATS) 218e2cb1decSSalil Mehta return hclgevf_tqps_get_sset_count(handle, strset); 219e2cb1decSSalil Mehta 220e2cb1decSSalil Mehta return 0; 221e2cb1decSSalil Mehta } 222e2cb1decSSalil Mehta 223e2cb1decSSalil Mehta static void hclgevf_get_strings(struct hnae3_handle *handle, u32 strset, 224e2cb1decSSalil Mehta u8 *data) 225e2cb1decSSalil Mehta { 226e2cb1decSSalil Mehta u8 *p = (char *)data; 227e2cb1decSSalil Mehta 228e2cb1decSSalil Mehta if (strset == ETH_SS_STATS) 229e2cb1decSSalil Mehta p = hclgevf_tqps_get_strings(handle, p); 230e2cb1decSSalil Mehta } 231e2cb1decSSalil Mehta 232e2cb1decSSalil Mehta static void hclgevf_get_stats(struct hnae3_handle *handle, u64 *data) 233e2cb1decSSalil Mehta { 234e2cb1decSSalil Mehta hclgevf_tqps_get_stats(handle, data); 235e2cb1decSSalil Mehta } 236e2cb1decSSalil Mehta 237d3410018SYufeng Mo static void hclgevf_build_send_msg(struct hclge_vf_to_pf_msg *msg, u8 code, 238d3410018SYufeng Mo u8 subcode) 239d3410018SYufeng Mo { 240d3410018SYufeng Mo if (msg) { 241d3410018SYufeng Mo memset(msg, 0, sizeof(struct hclge_vf_to_pf_msg)); 242d3410018SYufeng Mo msg->code = code; 243d3410018SYufeng Mo msg->subcode = subcode; 244d3410018SYufeng Mo } 245d3410018SYufeng Mo } 246d3410018SYufeng Mo 24732e6d104SJian Shen static int hclgevf_get_basic_info(struct hclgevf_dev *hdev) 248e2cb1decSSalil Mehta { 24932e6d104SJian Shen struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 25032e6d104SJian Shen u8 resp_msg[HCLGE_MBX_MAX_RESP_DATA_SIZE]; 25132e6d104SJian Shen struct hclge_basic_info *basic_info; 252d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 25332e6d104SJian Shen unsigned long caps; 254e2cb1decSSalil Mehta int status; 255e2cb1decSSalil Mehta 25632e6d104SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_BASIC_INFO, 0); 25732e6d104SJian Shen status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 258d3410018SYufeng Mo sizeof(resp_msg)); 259e2cb1decSSalil Mehta if (status) { 260e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 26132e6d104SJian Shen "failed to get basic info from pf, ret = %d", status); 262e2cb1decSSalil Mehta return status; 263e2cb1decSSalil Mehta } 264e2cb1decSSalil Mehta 26532e6d104SJian Shen basic_info = (struct hclge_basic_info *)resp_msg; 26632e6d104SJian Shen 26732e6d104SJian Shen hdev->hw_tc_map = basic_info->hw_tc_map; 26832e6d104SJian Shen hdev->mbx_api_version = basic_info->mbx_api_version; 26932e6d104SJian Shen caps = basic_info->pf_caps; 27032e6d104SJian Shen if (test_bit(HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B, &caps)) 27132e6d104SJian Shen set_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps); 272e2cb1decSSalil Mehta 273e2cb1decSSalil Mehta return 0; 274e2cb1decSSalil Mehta } 275e2cb1decSSalil Mehta 27692f11ea1SJian Shen static int hclgevf_get_port_base_vlan_filter_state(struct hclgevf_dev *hdev) 27792f11ea1SJian Shen { 27892f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 279d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 28092f11ea1SJian Shen u8 resp_msg; 28192f11ea1SJian Shen int ret; 28292f11ea1SJian Shen 283d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 284d3410018SYufeng Mo HCLGE_MBX_GET_PORT_BASE_VLAN_STATE); 285d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, 286d3410018SYufeng Mo sizeof(u8)); 28792f11ea1SJian Shen if (ret) { 28892f11ea1SJian Shen dev_err(&hdev->pdev->dev, 28992f11ea1SJian Shen "VF request to get port based vlan state failed %d", 29092f11ea1SJian Shen ret); 29192f11ea1SJian Shen return ret; 29292f11ea1SJian Shen } 29392f11ea1SJian Shen 29492f11ea1SJian Shen nic->port_base_vlan_state = resp_msg; 29592f11ea1SJian Shen 29692f11ea1SJian Shen return 0; 29792f11ea1SJian Shen } 29892f11ea1SJian Shen 2996cee6fc3SJian Shen static int hclgevf_get_queue_info(struct hclgevf_dev *hdev) 300e2cb1decSSalil Mehta { 301c0425944SPeng Li #define HCLGEVF_TQPS_RSS_INFO_LEN 6 302d3410018SYufeng Mo #define HCLGEVF_TQPS_ALLOC_OFFSET 0 303d3410018SYufeng Mo #define HCLGEVF_TQPS_RSS_SIZE_OFFSET 2 304d3410018SYufeng Mo #define HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET 4 305d3410018SYufeng Mo 306e2cb1decSSalil Mehta u8 resp_msg[HCLGEVF_TQPS_RSS_INFO_LEN]; 307d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 308e2cb1decSSalil Mehta int status; 309e2cb1decSSalil Mehta 310d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QINFO, 0); 311d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 312e2cb1decSSalil Mehta HCLGEVF_TQPS_RSS_INFO_LEN); 313e2cb1decSSalil Mehta if (status) { 314e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 315e2cb1decSSalil Mehta "VF request to get tqp info from PF failed %d", 316e2cb1decSSalil Mehta status); 317e2cb1decSSalil Mehta return status; 318e2cb1decSSalil Mehta } 319e2cb1decSSalil Mehta 320d3410018SYufeng Mo memcpy(&hdev->num_tqps, &resp_msg[HCLGEVF_TQPS_ALLOC_OFFSET], 321d3410018SYufeng Mo sizeof(u16)); 322d3410018SYufeng Mo memcpy(&hdev->rss_size_max, &resp_msg[HCLGEVF_TQPS_RSS_SIZE_OFFSET], 323d3410018SYufeng Mo sizeof(u16)); 324d3410018SYufeng Mo memcpy(&hdev->rx_buf_len, &resp_msg[HCLGEVF_TQPS_RX_BUFFER_LEN_OFFSET], 325d3410018SYufeng Mo sizeof(u16)); 326c0425944SPeng Li 327c0425944SPeng Li return 0; 328c0425944SPeng Li } 329c0425944SPeng Li 330c0425944SPeng Li static int hclgevf_get_queue_depth(struct hclgevf_dev *hdev) 331c0425944SPeng Li { 332c0425944SPeng Li #define HCLGEVF_TQPS_DEPTH_INFO_LEN 4 333d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_TX_DESC_OFFSET 0 334d3410018SYufeng Mo #define HCLGEVF_TQPS_NUM_RX_DESC_OFFSET 2 335d3410018SYufeng Mo 336c0425944SPeng Li u8 resp_msg[HCLGEVF_TQPS_DEPTH_INFO_LEN]; 337d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 338c0425944SPeng Li int ret; 339c0425944SPeng Li 340d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QDEPTH, 0); 341d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 342c0425944SPeng Li HCLGEVF_TQPS_DEPTH_INFO_LEN); 343c0425944SPeng Li if (ret) { 344c0425944SPeng Li dev_err(&hdev->pdev->dev, 345c0425944SPeng Li "VF request to get tqp depth info from PF failed %d", 346c0425944SPeng Li ret); 347c0425944SPeng Li return ret; 348c0425944SPeng Li } 349c0425944SPeng Li 350d3410018SYufeng Mo memcpy(&hdev->num_tx_desc, &resp_msg[HCLGEVF_TQPS_NUM_TX_DESC_OFFSET], 351d3410018SYufeng Mo sizeof(u16)); 352d3410018SYufeng Mo memcpy(&hdev->num_rx_desc, &resp_msg[HCLGEVF_TQPS_NUM_RX_DESC_OFFSET], 353d3410018SYufeng Mo sizeof(u16)); 354e2cb1decSSalil Mehta 355e2cb1decSSalil Mehta return 0; 356e2cb1decSSalil Mehta } 357e2cb1decSSalil Mehta 3580c29d191Sliuzhongzhu static u16 hclgevf_get_qid_global(struct hnae3_handle *handle, u16 queue_id) 3590c29d191Sliuzhongzhu { 3600c29d191Sliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 361d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3620c29d191Sliuzhongzhu u16 qid_in_pf = 0; 363d3410018SYufeng Mo u8 resp_data[2]; 3640c29d191Sliuzhongzhu int ret; 3650c29d191Sliuzhongzhu 366d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_QID_IN_PF, 0); 367d3410018SYufeng Mo memcpy(send_msg.data, &queue_id, sizeof(queue_id)); 368d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_data, 36963cbf7a9SYufeng Mo sizeof(resp_data)); 3700c29d191Sliuzhongzhu if (!ret) 3710c29d191Sliuzhongzhu qid_in_pf = *(u16 *)resp_data; 3720c29d191Sliuzhongzhu 3730c29d191Sliuzhongzhu return qid_in_pf; 3740c29d191Sliuzhongzhu } 3750c29d191Sliuzhongzhu 3769c3e7130Sliuzhongzhu static int hclgevf_get_pf_media_type(struct hclgevf_dev *hdev) 3779c3e7130Sliuzhongzhu { 378d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 37988d10bd6SJian Shen u8 resp_msg[2]; 3809c3e7130Sliuzhongzhu int ret; 3819c3e7130Sliuzhongzhu 382d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MEDIA_TYPE, 0); 383d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 384d3410018SYufeng Mo sizeof(resp_msg)); 3859c3e7130Sliuzhongzhu if (ret) { 3869c3e7130Sliuzhongzhu dev_err(&hdev->pdev->dev, 3879c3e7130Sliuzhongzhu "VF request to get the pf port media type failed %d", 3889c3e7130Sliuzhongzhu ret); 3899c3e7130Sliuzhongzhu return ret; 3909c3e7130Sliuzhongzhu } 3919c3e7130Sliuzhongzhu 39288d10bd6SJian Shen hdev->hw.mac.media_type = resp_msg[0]; 39388d10bd6SJian Shen hdev->hw.mac.module_type = resp_msg[1]; 3949c3e7130Sliuzhongzhu 3959c3e7130Sliuzhongzhu return 0; 3969c3e7130Sliuzhongzhu } 3979c3e7130Sliuzhongzhu 398e2cb1decSSalil Mehta static int hclgevf_alloc_tqps(struct hclgevf_dev *hdev) 399e2cb1decSSalil Mehta { 400e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 401e2cb1decSSalil Mehta int i; 402e2cb1decSSalil Mehta 403e2cb1decSSalil Mehta hdev->htqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps, 404e2cb1decSSalil Mehta sizeof(struct hclgevf_tqp), GFP_KERNEL); 405e2cb1decSSalil Mehta if (!hdev->htqp) 406e2cb1decSSalil Mehta return -ENOMEM; 407e2cb1decSSalil Mehta 408e2cb1decSSalil Mehta tqp = hdev->htqp; 409e2cb1decSSalil Mehta 410e2cb1decSSalil Mehta for (i = 0; i < hdev->num_tqps; i++) { 411e2cb1decSSalil Mehta tqp->dev = &hdev->pdev->dev; 412e2cb1decSSalil Mehta tqp->index = i; 413e2cb1decSSalil Mehta 414e2cb1decSSalil Mehta tqp->q.ae_algo = &ae_algovf; 415e2cb1decSSalil Mehta tqp->q.buf_size = hdev->rx_buf_len; 416c0425944SPeng Li tqp->q.tx_desc_num = hdev->num_tx_desc; 417c0425944SPeng Li tqp->q.rx_desc_num = hdev->num_rx_desc; 4189a5ef4aaSYonglong Liu 4199a5ef4aaSYonglong Liu /* need an extended offset to configure queues >= 4209a5ef4aaSYonglong Liu * HCLGEVF_TQP_MAX_SIZE_DEV_V2. 4219a5ef4aaSYonglong Liu */ 4229a5ef4aaSYonglong Liu if (i < HCLGEVF_TQP_MAX_SIZE_DEV_V2) 4239a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4249a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 425e2cb1decSSalil Mehta i * HCLGEVF_TQP_REG_SIZE; 4269a5ef4aaSYonglong Liu else 4279a5ef4aaSYonglong Liu tqp->q.io_base = hdev->hw.io_base + 4289a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_OFFSET + 4299a5ef4aaSYonglong Liu HCLGEVF_TQP_EXT_REG_OFFSET + 4309a5ef4aaSYonglong Liu (i - HCLGEVF_TQP_MAX_SIZE_DEV_V2) * 4319a5ef4aaSYonglong Liu HCLGEVF_TQP_REG_SIZE; 432e2cb1decSSalil Mehta 433e2cb1decSSalil Mehta tqp++; 434e2cb1decSSalil Mehta } 435e2cb1decSSalil Mehta 436e2cb1decSSalil Mehta return 0; 437e2cb1decSSalil Mehta } 438e2cb1decSSalil Mehta 439e2cb1decSSalil Mehta static int hclgevf_knic_setup(struct hclgevf_dev *hdev) 440e2cb1decSSalil Mehta { 441e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 442e2cb1decSSalil Mehta struct hnae3_knic_private_info *kinfo; 443e2cb1decSSalil Mehta u16 new_tqps = hdev->num_tqps; 444ebaf1908SWeihang Li unsigned int i; 44535244430SJian Shen u8 num_tc = 0; 446e2cb1decSSalil Mehta 447e2cb1decSSalil Mehta kinfo = &nic->kinfo; 448c0425944SPeng Li kinfo->num_tx_desc = hdev->num_tx_desc; 449c0425944SPeng Li kinfo->num_rx_desc = hdev->num_rx_desc; 450e2cb1decSSalil Mehta kinfo->rx_buf_len = hdev->rx_buf_len; 451e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) 452e2cb1decSSalil Mehta if (hdev->hw_tc_map & BIT(i)) 45335244430SJian Shen num_tc++; 454e2cb1decSSalil Mehta 45535244430SJian Shen num_tc = num_tc ? num_tc : 1; 45635244430SJian Shen kinfo->tc_info.num_tc = num_tc; 45735244430SJian Shen kinfo->rss_size = min_t(u16, hdev->rss_size_max, new_tqps / num_tc); 45835244430SJian Shen new_tqps = kinfo->rss_size * num_tc; 459e2cb1decSSalil Mehta kinfo->num_tqps = min(new_tqps, hdev->num_tqps); 460e2cb1decSSalil Mehta 461e2cb1decSSalil Mehta kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, 462e2cb1decSSalil Mehta sizeof(struct hnae3_queue *), GFP_KERNEL); 463e2cb1decSSalil Mehta if (!kinfo->tqp) 464e2cb1decSSalil Mehta return -ENOMEM; 465e2cb1decSSalil Mehta 466e2cb1decSSalil Mehta for (i = 0; i < kinfo->num_tqps; i++) { 467e2cb1decSSalil Mehta hdev->htqp[i].q.handle = &hdev->nic; 468e2cb1decSSalil Mehta hdev->htqp[i].q.tqp_index = i; 469e2cb1decSSalil Mehta kinfo->tqp[i] = &hdev->htqp[i].q; 470e2cb1decSSalil Mehta } 471e2cb1decSSalil Mehta 472580a05f9SYonglong Liu /* after init the max rss_size and tqps, adjust the default tqp numbers 473580a05f9SYonglong Liu * and rss size with the actual vector numbers 474580a05f9SYonglong Liu */ 475580a05f9SYonglong Liu kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); 47635244430SJian Shen kinfo->rss_size = min_t(u16, kinfo->num_tqps / num_tc, 477580a05f9SYonglong Liu kinfo->rss_size); 478580a05f9SYonglong Liu 479e2cb1decSSalil Mehta return 0; 480e2cb1decSSalil Mehta } 481e2cb1decSSalil Mehta 482e2cb1decSSalil Mehta static void hclgevf_request_link_info(struct hclgevf_dev *hdev) 483e2cb1decSSalil Mehta { 484d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 485e2cb1decSSalil Mehta int status; 486e2cb1decSSalil Mehta 487d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_STATUS, 0); 488d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 489e2cb1decSSalil Mehta if (status) 490e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 491e2cb1decSSalil Mehta "VF failed to fetch link status(%d) from PF", status); 492e2cb1decSSalil Mehta } 493e2cb1decSSalil Mehta 494e2cb1decSSalil Mehta void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state) 495e2cb1decSSalil Mehta { 49645e92b7eSPeng Li struct hnae3_handle *rhandle = &hdev->roce; 497e2cb1decSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 49845e92b7eSPeng Li struct hnae3_client *rclient; 499e2cb1decSSalil Mehta struct hnae3_client *client; 500e2cb1decSSalil Mehta 501ff200099SYunsheng Lin if (test_and_set_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state)) 502ff200099SYunsheng Lin return; 503ff200099SYunsheng Lin 504e2cb1decSSalil Mehta client = handle->client; 50545e92b7eSPeng Li rclient = hdev->roce_client; 506e2cb1decSSalil Mehta 507582d37bbSPeng Li link_state = 508582d37bbSPeng Li test_bit(HCLGEVF_STATE_DOWN, &hdev->state) ? 0 : link_state; 509e2cb1decSSalil Mehta if (link_state != hdev->hw.mac.link) { 510b15c072aSYonglong Liu hdev->hw.mac.link = link_state; 511e2cb1decSSalil Mehta client->ops->link_status_change(handle, !!link_state); 51245e92b7eSPeng Li if (rclient && rclient->ops->link_status_change) 51345e92b7eSPeng Li rclient->ops->link_status_change(rhandle, !!link_state); 514e2cb1decSSalil Mehta } 515ff200099SYunsheng Lin 516ff200099SYunsheng Lin clear_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state); 517e2cb1decSSalil Mehta } 518e2cb1decSSalil Mehta 519538abaf3SYueHaibing static void hclgevf_update_link_mode(struct hclgevf_dev *hdev) 5209194d18bSliuzhongzhu { 5219194d18bSliuzhongzhu #define HCLGEVF_ADVERTISING 0 5229194d18bSliuzhongzhu #define HCLGEVF_SUPPORTED 1 5239194d18bSliuzhongzhu 524d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 525d3410018SYufeng Mo 526d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_LINK_MODE, 0); 527d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_ADVERTISING; 528d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 529d3410018SYufeng Mo send_msg.data[0] = HCLGEVF_SUPPORTED; 530d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 5319194d18bSliuzhongzhu } 5329194d18bSliuzhongzhu 533e2cb1decSSalil Mehta static int hclgevf_set_handle_info(struct hclgevf_dev *hdev) 534e2cb1decSSalil Mehta { 535e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 536e2cb1decSSalil Mehta int ret; 537e2cb1decSSalil Mehta 538e2cb1decSSalil Mehta nic->ae_algo = &ae_algovf; 539e2cb1decSSalil Mehta nic->pdev = hdev->pdev; 540e2cb1decSSalil Mehta nic->numa_node_mask = hdev->numa_node_mask; 541424eb834SSalil Mehta nic->flags |= HNAE3_SUPPORT_VF; 5429f0c6f4bSYufeng Mo nic->kinfo.io_base = hdev->hw.io_base; 543e2cb1decSSalil Mehta 544e2cb1decSSalil Mehta ret = hclgevf_knic_setup(hdev); 545e2cb1decSSalil Mehta if (ret) 546e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF knic setup failed %d\n", 547e2cb1decSSalil Mehta ret); 548e2cb1decSSalil Mehta return ret; 549e2cb1decSSalil Mehta } 550e2cb1decSSalil Mehta 551e2cb1decSSalil Mehta static void hclgevf_free_vector(struct hclgevf_dev *hdev, int vector_id) 552e2cb1decSSalil Mehta { 55336cbbdf6SPeng Li if (hdev->vector_status[vector_id] == HCLGEVF_INVALID_VPORT) { 55436cbbdf6SPeng Li dev_warn(&hdev->pdev->dev, 55536cbbdf6SPeng Li "vector(vector_id %d) has been freed.\n", vector_id); 55636cbbdf6SPeng Li return; 55736cbbdf6SPeng Li } 55836cbbdf6SPeng Li 559e2cb1decSSalil Mehta hdev->vector_status[vector_id] = HCLGEVF_INVALID_VPORT; 560e2cb1decSSalil Mehta hdev->num_msi_left += 1; 561e2cb1decSSalil Mehta hdev->num_msi_used -= 1; 562e2cb1decSSalil Mehta } 563e2cb1decSSalil Mehta 564e2cb1decSSalil Mehta static int hclgevf_get_vector(struct hnae3_handle *handle, u16 vector_num, 565e2cb1decSSalil Mehta struct hnae3_vector_info *vector_info) 566e2cb1decSSalil Mehta { 567e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 568e2cb1decSSalil Mehta struct hnae3_vector_info *vector = vector_info; 569e2cb1decSSalil Mehta int alloc = 0; 570e2cb1decSSalil Mehta int i, j; 571e2cb1decSSalil Mehta 572580a05f9SYonglong Liu vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num); 573e2cb1decSSalil Mehta vector_num = min(hdev->num_msi_left, vector_num); 574e2cb1decSSalil Mehta 575e2cb1decSSalil Mehta for (j = 0; j < vector_num; j++) { 576e2cb1decSSalil Mehta for (i = HCLGEVF_MISC_VECTOR_NUM + 1; i < hdev->num_msi; i++) { 577e2cb1decSSalil Mehta if (hdev->vector_status[i] == HCLGEVF_INVALID_VPORT) { 578e2cb1decSSalil Mehta vector->vector = pci_irq_vector(hdev->pdev, i); 579e2cb1decSSalil Mehta vector->io_addr = hdev->hw.io_base + 580e2cb1decSSalil Mehta HCLGEVF_VECTOR_REG_BASE + 581e2cb1decSSalil Mehta (i - 1) * HCLGEVF_VECTOR_REG_OFFSET; 582e2cb1decSSalil Mehta hdev->vector_status[i] = 0; 583e2cb1decSSalil Mehta hdev->vector_irq[i] = vector->vector; 584e2cb1decSSalil Mehta 585e2cb1decSSalil Mehta vector++; 586e2cb1decSSalil Mehta alloc++; 587e2cb1decSSalil Mehta 588e2cb1decSSalil Mehta break; 589e2cb1decSSalil Mehta } 590e2cb1decSSalil Mehta } 591e2cb1decSSalil Mehta } 592e2cb1decSSalil Mehta hdev->num_msi_left -= alloc; 593e2cb1decSSalil Mehta hdev->num_msi_used += alloc; 594e2cb1decSSalil Mehta 595e2cb1decSSalil Mehta return alloc; 596e2cb1decSSalil Mehta } 597e2cb1decSSalil Mehta 598e2cb1decSSalil Mehta static int hclgevf_get_vector_index(struct hclgevf_dev *hdev, int vector) 599e2cb1decSSalil Mehta { 600e2cb1decSSalil Mehta int i; 601e2cb1decSSalil Mehta 602e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 603e2cb1decSSalil Mehta if (vector == hdev->vector_irq[i]) 604e2cb1decSSalil Mehta return i; 605e2cb1decSSalil Mehta 606e2cb1decSSalil Mehta return -EINVAL; 607e2cb1decSSalil Mehta } 608e2cb1decSSalil Mehta 609374ad291SJian Shen static int hclgevf_set_rss_algo_key(struct hclgevf_dev *hdev, 610374ad291SJian Shen const u8 hfunc, const u8 *key) 611374ad291SJian Shen { 612374ad291SJian Shen struct hclgevf_rss_config_cmd *req; 613ebaf1908SWeihang Li unsigned int key_offset = 0; 614374ad291SJian Shen struct hclgevf_desc desc; 6153caf772bSYufeng Mo int key_counts; 616374ad291SJian Shen int key_size; 617374ad291SJian Shen int ret; 618374ad291SJian Shen 6193caf772bSYufeng Mo key_counts = HCLGEVF_RSS_KEY_SIZE; 620374ad291SJian Shen req = (struct hclgevf_rss_config_cmd *)desc.data; 621374ad291SJian Shen 6223caf772bSYufeng Mo while (key_counts) { 623374ad291SJian Shen hclgevf_cmd_setup_basic_desc(&desc, 624374ad291SJian Shen HCLGEVF_OPC_RSS_GENERIC_CONFIG, 625374ad291SJian Shen false); 626374ad291SJian Shen 627374ad291SJian Shen req->hash_config |= (hfunc & HCLGEVF_RSS_HASH_ALGO_MASK); 628374ad291SJian Shen req->hash_config |= 629374ad291SJian Shen (key_offset << HCLGEVF_RSS_HASH_KEY_OFFSET_B); 630374ad291SJian Shen 6313caf772bSYufeng Mo key_size = min(HCLGEVF_RSS_HASH_KEY_NUM, key_counts); 632374ad291SJian Shen memcpy(req->hash_key, 633374ad291SJian Shen key + key_offset * HCLGEVF_RSS_HASH_KEY_NUM, key_size); 634374ad291SJian Shen 6353caf772bSYufeng Mo key_counts -= key_size; 6363caf772bSYufeng Mo key_offset++; 637374ad291SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 638374ad291SJian Shen if (ret) { 639374ad291SJian Shen dev_err(&hdev->pdev->dev, 640374ad291SJian Shen "Configure RSS config fail, status = %d\n", 641374ad291SJian Shen ret); 642374ad291SJian Shen return ret; 643374ad291SJian Shen } 644374ad291SJian Shen } 645374ad291SJian Shen 646374ad291SJian Shen return 0; 647374ad291SJian Shen } 648374ad291SJian Shen 649e2cb1decSSalil Mehta static u32 hclgevf_get_rss_key_size(struct hnae3_handle *handle) 650e2cb1decSSalil Mehta { 651e2cb1decSSalil Mehta return HCLGEVF_RSS_KEY_SIZE; 652e2cb1decSSalil Mehta } 653e2cb1decSSalil Mehta 654e2cb1decSSalil Mehta static int hclgevf_set_rss_indir_table(struct hclgevf_dev *hdev) 655e2cb1decSSalil Mehta { 656e2cb1decSSalil Mehta const u8 *indir = hdev->rss_cfg.rss_indirection_tbl; 657e2cb1decSSalil Mehta struct hclgevf_rss_indirection_table_cmd *req; 658e2cb1decSSalil Mehta struct hclgevf_desc desc; 65987ce161eSGuangbin Huang int rss_cfg_tbl_num; 660e2cb1decSSalil Mehta int status; 661e2cb1decSSalil Mehta int i, j; 662e2cb1decSSalil Mehta 663e2cb1decSSalil Mehta req = (struct hclgevf_rss_indirection_table_cmd *)desc.data; 66487ce161eSGuangbin Huang rss_cfg_tbl_num = hdev->ae_dev->dev_specs.rss_ind_tbl_size / 66587ce161eSGuangbin Huang HCLGEVF_RSS_CFG_TBL_SIZE; 666e2cb1decSSalil Mehta 66787ce161eSGuangbin Huang for (i = 0; i < rss_cfg_tbl_num; i++) { 668e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INDIR_TABLE, 669e2cb1decSSalil Mehta false); 67055ff3ed5SJian Shen req->start_table_index = 67155ff3ed5SJian Shen cpu_to_le16(i * HCLGEVF_RSS_CFG_TBL_SIZE); 67255ff3ed5SJian Shen req->rss_set_bitmap = cpu_to_le16(HCLGEVF_RSS_SET_BITMAP_MSK); 673e2cb1decSSalil Mehta for (j = 0; j < HCLGEVF_RSS_CFG_TBL_SIZE; j++) 674e2cb1decSSalil Mehta req->rss_result[j] = 675e2cb1decSSalil Mehta indir[i * HCLGEVF_RSS_CFG_TBL_SIZE + j]; 676e2cb1decSSalil Mehta 677e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 678e2cb1decSSalil Mehta if (status) { 679e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 680e2cb1decSSalil Mehta "VF failed(=%d) to set RSS indirection table\n", 681e2cb1decSSalil Mehta status); 682e2cb1decSSalil Mehta return status; 683e2cb1decSSalil Mehta } 684e2cb1decSSalil Mehta } 685e2cb1decSSalil Mehta 686e2cb1decSSalil Mehta return 0; 687e2cb1decSSalil Mehta } 688e2cb1decSSalil Mehta 689e2cb1decSSalil Mehta static int hclgevf_set_rss_tc_mode(struct hclgevf_dev *hdev, u16 rss_size) 690e2cb1decSSalil Mehta { 691e2cb1decSSalil Mehta struct hclgevf_rss_tc_mode_cmd *req; 692e2cb1decSSalil Mehta u16 tc_offset[HCLGEVF_MAX_TC_NUM]; 693e2cb1decSSalil Mehta u16 tc_valid[HCLGEVF_MAX_TC_NUM]; 694e2cb1decSSalil Mehta u16 tc_size[HCLGEVF_MAX_TC_NUM]; 695e2cb1decSSalil Mehta struct hclgevf_desc desc; 696e2cb1decSSalil Mehta u16 roundup_size; 697ebaf1908SWeihang Li unsigned int i; 6982adb8187SHuazhong Tan int status; 699e2cb1decSSalil Mehta 700e2cb1decSSalil Mehta req = (struct hclgevf_rss_tc_mode_cmd *)desc.data; 701e2cb1decSSalil Mehta 702e2cb1decSSalil Mehta roundup_size = roundup_pow_of_two(rss_size); 703e2cb1decSSalil Mehta roundup_size = ilog2(roundup_size); 704e2cb1decSSalil Mehta 705e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 706e2cb1decSSalil Mehta tc_valid[i] = !!(hdev->hw_tc_map & BIT(i)); 707e2cb1decSSalil Mehta tc_size[i] = roundup_size; 708e2cb1decSSalil Mehta tc_offset[i] = rss_size * i; 709e2cb1decSSalil Mehta } 710e2cb1decSSalil Mehta 711e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_TC_MODE, false); 712e2cb1decSSalil Mehta for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { 71355ff3ed5SJian Shen u16 mode = 0; 71455ff3ed5SJian Shen 71555ff3ed5SJian Shen hnae3_set_bit(mode, HCLGEVF_RSS_TC_VALID_B, 716e2cb1decSSalil Mehta (tc_valid[i] & 0x1)); 71755ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_SIZE_M, 718e2cb1decSSalil Mehta HCLGEVF_RSS_TC_SIZE_S, tc_size[i]); 71933a8f764SGuojia Liao hnae3_set_bit(mode, HCLGEVF_RSS_TC_SIZE_MSB_B, 72033a8f764SGuojia Liao tc_size[i] >> HCLGEVF_RSS_TC_SIZE_MSB_OFFSET & 72133a8f764SGuojia Liao 0x1); 72255ff3ed5SJian Shen hnae3_set_field(mode, HCLGEVF_RSS_TC_OFFSET_M, 723e2cb1decSSalil Mehta HCLGEVF_RSS_TC_OFFSET_S, tc_offset[i]); 72455ff3ed5SJian Shen 72555ff3ed5SJian Shen req->rss_tc_mode[i] = cpu_to_le16(mode); 726e2cb1decSSalil Mehta } 727e2cb1decSSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1); 728e2cb1decSSalil Mehta if (status) 729e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 730e2cb1decSSalil Mehta "VF failed(=%d) to set rss tc mode\n", status); 731e2cb1decSSalil Mehta 732e2cb1decSSalil Mehta return status; 733e2cb1decSSalil Mehta } 734e2cb1decSSalil Mehta 735a638b1d8SJian Shen /* for revision 0x20, vf shared the same rss config with pf */ 736a638b1d8SJian Shen static int hclgevf_get_rss_hash_key(struct hclgevf_dev *hdev) 737a638b1d8SJian Shen { 738a638b1d8SJian Shen #define HCLGEVF_RSS_MBX_RESP_LEN 8 739a638b1d8SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 740a638b1d8SJian Shen u8 resp_msg[HCLGEVF_RSS_MBX_RESP_LEN]; 741d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 742a638b1d8SJian Shen u16 msg_num, hash_key_index; 743a638b1d8SJian Shen u8 index; 744a638b1d8SJian Shen int ret; 745a638b1d8SJian Shen 746d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_RSS_KEY, 0); 747a638b1d8SJian Shen msg_num = (HCLGEVF_RSS_KEY_SIZE + HCLGEVF_RSS_MBX_RESP_LEN - 1) / 748a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN; 749a638b1d8SJian Shen for (index = 0; index < msg_num; index++) { 750d3410018SYufeng Mo send_msg.data[0] = index; 751d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, 752a638b1d8SJian Shen HCLGEVF_RSS_MBX_RESP_LEN); 753a638b1d8SJian Shen if (ret) { 754a638b1d8SJian Shen dev_err(&hdev->pdev->dev, 755a638b1d8SJian Shen "VF get rss hash key from PF failed, ret=%d", 756a638b1d8SJian Shen ret); 757a638b1d8SJian Shen return ret; 758a638b1d8SJian Shen } 759a638b1d8SJian Shen 760a638b1d8SJian Shen hash_key_index = HCLGEVF_RSS_MBX_RESP_LEN * index; 761a638b1d8SJian Shen if (index == msg_num - 1) 762a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 763a638b1d8SJian Shen &resp_msg[0], 764a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE - hash_key_index); 765a638b1d8SJian Shen else 766a638b1d8SJian Shen memcpy(&rss_cfg->rss_hash_key[hash_key_index], 767a638b1d8SJian Shen &resp_msg[0], HCLGEVF_RSS_MBX_RESP_LEN); 768a638b1d8SJian Shen } 769a638b1d8SJian Shen 770a638b1d8SJian Shen return 0; 771a638b1d8SJian Shen } 772a638b1d8SJian Shen 773e2cb1decSSalil Mehta static int hclgevf_get_rss(struct hnae3_handle *handle, u32 *indir, u8 *key, 774e2cb1decSSalil Mehta u8 *hfunc) 775e2cb1decSSalil Mehta { 776e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 777e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 778a638b1d8SJian Shen int i, ret; 779e2cb1decSSalil Mehta 780295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 781374ad291SJian Shen /* Get hash algorithm */ 782374ad291SJian Shen if (hfunc) { 783374ad291SJian Shen switch (rss_cfg->hash_algo) { 784374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_TOEPLITZ: 785374ad291SJian Shen *hfunc = ETH_RSS_HASH_TOP; 786374ad291SJian Shen break; 787374ad291SJian Shen case HCLGEVF_RSS_HASH_ALGO_SIMPLE: 788374ad291SJian Shen *hfunc = ETH_RSS_HASH_XOR; 789374ad291SJian Shen break; 790374ad291SJian Shen default: 791374ad291SJian Shen *hfunc = ETH_RSS_HASH_UNKNOWN; 792374ad291SJian Shen break; 793374ad291SJian Shen } 794374ad291SJian Shen } 795374ad291SJian Shen 796374ad291SJian Shen /* Get the RSS Key required by the user */ 797374ad291SJian Shen if (key) 798374ad291SJian Shen memcpy(key, rss_cfg->rss_hash_key, 799374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 800a638b1d8SJian Shen } else { 801a638b1d8SJian Shen if (hfunc) 802a638b1d8SJian Shen *hfunc = ETH_RSS_HASH_TOP; 803a638b1d8SJian Shen if (key) { 804a638b1d8SJian Shen ret = hclgevf_get_rss_hash_key(hdev); 805a638b1d8SJian Shen if (ret) 806a638b1d8SJian Shen return ret; 807a638b1d8SJian Shen memcpy(key, rss_cfg->rss_hash_key, 808a638b1d8SJian Shen HCLGEVF_RSS_KEY_SIZE); 809a638b1d8SJian Shen } 810374ad291SJian Shen } 811374ad291SJian Shen 812e2cb1decSSalil Mehta if (indir) 81387ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 814e2cb1decSSalil Mehta indir[i] = rss_cfg->rss_indirection_tbl[i]; 815e2cb1decSSalil Mehta 816374ad291SJian Shen return 0; 817e2cb1decSSalil Mehta } 818e2cb1decSSalil Mehta 819e184cec5SJian Shen static int hclgevf_parse_rss_hfunc(struct hclgevf_dev *hdev, const u8 hfunc, 820e184cec5SJian Shen u8 *hash_algo) 821e184cec5SJian Shen { 822e184cec5SJian Shen switch (hfunc) { 823e184cec5SJian Shen case ETH_RSS_HASH_TOP: 824e184cec5SJian Shen *hash_algo = HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 825e184cec5SJian Shen return 0; 826e184cec5SJian Shen case ETH_RSS_HASH_XOR: 827e184cec5SJian Shen *hash_algo = HCLGEVF_RSS_HASH_ALGO_SIMPLE; 828e184cec5SJian Shen return 0; 829e184cec5SJian Shen case ETH_RSS_HASH_NO_CHANGE: 830e184cec5SJian Shen *hash_algo = hdev->rss_cfg.hash_algo; 831e184cec5SJian Shen return 0; 832e184cec5SJian Shen default: 833e184cec5SJian Shen return -EINVAL; 834e184cec5SJian Shen } 835e184cec5SJian Shen } 836e184cec5SJian Shen 837e2cb1decSSalil Mehta static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir, 838e2cb1decSSalil Mehta const u8 *key, const u8 hfunc) 839e2cb1decSSalil Mehta { 840e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 841e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 842e184cec5SJian Shen u8 hash_algo; 843374ad291SJian Shen int ret, i; 844374ad291SJian Shen 845295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 846e184cec5SJian Shen ret = hclgevf_parse_rss_hfunc(hdev, hfunc, &hash_algo); 847374ad291SJian Shen if (ret) 848374ad291SJian Shen return ret; 849374ad291SJian Shen 850e184cec5SJian Shen /* Set the RSS Hash Key if specififed by the user */ 851e184cec5SJian Shen if (key) { 852e184cec5SJian Shen ret = hclgevf_set_rss_algo_key(hdev, hash_algo, key); 853e184cec5SJian Shen if (ret) { 854e184cec5SJian Shen dev_err(&hdev->pdev->dev, 855e184cec5SJian Shen "invalid hfunc type %u\n", hfunc); 856e184cec5SJian Shen return ret; 857e184cec5SJian Shen } 858e184cec5SJian Shen 859374ad291SJian Shen /* Update the shadow RSS key with user specified qids */ 860374ad291SJian Shen memcpy(rss_cfg->rss_hash_key, key, 861374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 862e184cec5SJian Shen } else { 863e184cec5SJian Shen ret = hclgevf_set_rss_algo_key(hdev, hash_algo, 864e184cec5SJian Shen rss_cfg->rss_hash_key); 865e184cec5SJian Shen if (ret) 866e184cec5SJian Shen return ret; 867374ad291SJian Shen } 868e184cec5SJian Shen rss_cfg->hash_algo = hash_algo; 869374ad291SJian Shen } 870e2cb1decSSalil Mehta 871e2cb1decSSalil Mehta /* update the shadow RSS table with user specified qids */ 87287ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 873e2cb1decSSalil Mehta rss_cfg->rss_indirection_tbl[i] = indir[i]; 874e2cb1decSSalil Mehta 875e2cb1decSSalil Mehta /* update the hardware */ 876e2cb1decSSalil Mehta return hclgevf_set_rss_indir_table(hdev); 877e2cb1decSSalil Mehta } 878e2cb1decSSalil Mehta 879d97b3072SJian Shen static u8 hclgevf_get_rss_hash_bits(struct ethtool_rxnfc *nfc) 880d97b3072SJian Shen { 881d97b3072SJian Shen u8 hash_sets = nfc->data & RXH_L4_B_0_1 ? HCLGEVF_S_PORT_BIT : 0; 882d97b3072SJian Shen 883d97b3072SJian Shen if (nfc->data & RXH_L4_B_2_3) 884d97b3072SJian Shen hash_sets |= HCLGEVF_D_PORT_BIT; 885d97b3072SJian Shen else 886d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_PORT_BIT; 887d97b3072SJian Shen 888d97b3072SJian Shen if (nfc->data & RXH_IP_SRC) 889d97b3072SJian Shen hash_sets |= HCLGEVF_S_IP_BIT; 890d97b3072SJian Shen else 891d97b3072SJian Shen hash_sets &= ~HCLGEVF_S_IP_BIT; 892d97b3072SJian Shen 893d97b3072SJian Shen if (nfc->data & RXH_IP_DST) 894d97b3072SJian Shen hash_sets |= HCLGEVF_D_IP_BIT; 895d97b3072SJian Shen else 896d97b3072SJian Shen hash_sets &= ~HCLGEVF_D_IP_BIT; 897d97b3072SJian Shen 898d97b3072SJian Shen if (nfc->flow_type == SCTP_V4_FLOW || nfc->flow_type == SCTP_V6_FLOW) 899d97b3072SJian Shen hash_sets |= HCLGEVF_V_TAG_BIT; 900d97b3072SJian Shen 901d97b3072SJian Shen return hash_sets; 902d97b3072SJian Shen } 903d97b3072SJian Shen 9045fd0e7b4SHuazhong Tan static int hclgevf_init_rss_tuple_cmd(struct hnae3_handle *handle, 9055fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc, 9065fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req) 907d97b3072SJian Shen { 908d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 909d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 910d97b3072SJian Shen u8 tuple_sets; 911d97b3072SJian Shen 912d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 913d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 914d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 915d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 916d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 917d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 918d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 919d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 920d97b3072SJian Shen 921d97b3072SJian Shen tuple_sets = hclgevf_get_rss_hash_bits(nfc); 922d97b3072SJian Shen switch (nfc->flow_type) { 923d97b3072SJian Shen case TCP_V4_FLOW: 924d97b3072SJian Shen req->ipv4_tcp_en = tuple_sets; 925d97b3072SJian Shen break; 926d97b3072SJian Shen case TCP_V6_FLOW: 927d97b3072SJian Shen req->ipv6_tcp_en = tuple_sets; 928d97b3072SJian Shen break; 929d97b3072SJian Shen case UDP_V4_FLOW: 930d97b3072SJian Shen req->ipv4_udp_en = tuple_sets; 931d97b3072SJian Shen break; 932d97b3072SJian Shen case UDP_V6_FLOW: 933d97b3072SJian Shen req->ipv6_udp_en = tuple_sets; 934d97b3072SJian Shen break; 935d97b3072SJian Shen case SCTP_V4_FLOW: 936d97b3072SJian Shen req->ipv4_sctp_en = tuple_sets; 937d97b3072SJian Shen break; 938d97b3072SJian Shen case SCTP_V6_FLOW: 939ab6e32d2SJian Shen if (hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 && 940ab6e32d2SJian Shen (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3))) 941d97b3072SJian Shen return -EINVAL; 942d97b3072SJian Shen 943d97b3072SJian Shen req->ipv6_sctp_en = tuple_sets; 944d97b3072SJian Shen break; 945d97b3072SJian Shen case IPV4_FLOW: 946d97b3072SJian Shen req->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 947d97b3072SJian Shen break; 948d97b3072SJian Shen case IPV6_FLOW: 949d97b3072SJian Shen req->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 950d97b3072SJian Shen break; 951d97b3072SJian Shen default: 952d97b3072SJian Shen return -EINVAL; 953d97b3072SJian Shen } 954d97b3072SJian Shen 9555fd0e7b4SHuazhong Tan return 0; 9565fd0e7b4SHuazhong Tan } 9575fd0e7b4SHuazhong Tan 9585fd0e7b4SHuazhong Tan static int hclgevf_set_rss_tuple(struct hnae3_handle *handle, 9595fd0e7b4SHuazhong Tan struct ethtool_rxnfc *nfc) 9605fd0e7b4SHuazhong Tan { 9615fd0e7b4SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 9625fd0e7b4SHuazhong Tan struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 9635fd0e7b4SHuazhong Tan struct hclgevf_rss_input_tuple_cmd *req; 9645fd0e7b4SHuazhong Tan struct hclgevf_desc desc; 9655fd0e7b4SHuazhong Tan int ret; 9665fd0e7b4SHuazhong Tan 9675fd0e7b4SHuazhong Tan if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 9685fd0e7b4SHuazhong Tan return -EOPNOTSUPP; 9695fd0e7b4SHuazhong Tan 9705fd0e7b4SHuazhong Tan if (nfc->data & 9715fd0e7b4SHuazhong Tan ~(RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)) 9725fd0e7b4SHuazhong Tan return -EINVAL; 9735fd0e7b4SHuazhong Tan 9745fd0e7b4SHuazhong Tan req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 9755fd0e7b4SHuazhong Tan hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 9765fd0e7b4SHuazhong Tan 9775fd0e7b4SHuazhong Tan ret = hclgevf_init_rss_tuple_cmd(handle, nfc, req); 9785fd0e7b4SHuazhong Tan if (ret) { 9795fd0e7b4SHuazhong Tan dev_err(&hdev->pdev->dev, 9805fd0e7b4SHuazhong Tan "failed to init rss tuple cmd, ret = %d\n", ret); 9815fd0e7b4SHuazhong Tan return ret; 9825fd0e7b4SHuazhong Tan } 9835fd0e7b4SHuazhong Tan 984d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 985d97b3072SJian Shen if (ret) { 986d97b3072SJian Shen dev_err(&hdev->pdev->dev, 987d97b3072SJian Shen "Set rss tuple fail, status = %d\n", ret); 988d97b3072SJian Shen return ret; 989d97b3072SJian Shen } 990d97b3072SJian Shen 991d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_tcp_en = req->ipv4_tcp_en; 992d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_udp_en = req->ipv4_udp_en; 993d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_sctp_en = req->ipv4_sctp_en; 994d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv4_fragment_en = req->ipv4_fragment_en; 995d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_tcp_en = req->ipv6_tcp_en; 996d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_udp_en = req->ipv6_udp_en; 997d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_sctp_en = req->ipv6_sctp_en; 998d97b3072SJian Shen rss_cfg->rss_tuple_sets.ipv6_fragment_en = req->ipv6_fragment_en; 999d97b3072SJian Shen return 0; 1000d97b3072SJian Shen } 1001d97b3072SJian Shen 100273f7767eSJian Shen static int hclgevf_get_rss_tuple_by_flow_type(struct hclgevf_dev *hdev, 100373f7767eSJian Shen int flow_type, u8 *tuple_sets) 100473f7767eSJian Shen { 100573f7767eSJian Shen switch (flow_type) { 100673f7767eSJian Shen case TCP_V4_FLOW: 100773f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_tcp_en; 100873f7767eSJian Shen break; 100973f7767eSJian Shen case UDP_V4_FLOW: 101073f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_udp_en; 101173f7767eSJian Shen break; 101273f7767eSJian Shen case TCP_V6_FLOW: 101373f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_tcp_en; 101473f7767eSJian Shen break; 101573f7767eSJian Shen case UDP_V6_FLOW: 101673f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_udp_en; 101773f7767eSJian Shen break; 101873f7767eSJian Shen case SCTP_V4_FLOW: 101973f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv4_sctp_en; 102073f7767eSJian Shen break; 102173f7767eSJian Shen case SCTP_V6_FLOW: 102273f7767eSJian Shen *tuple_sets = hdev->rss_cfg.rss_tuple_sets.ipv6_sctp_en; 102373f7767eSJian Shen break; 102473f7767eSJian Shen case IPV4_FLOW: 102573f7767eSJian Shen case IPV6_FLOW: 102673f7767eSJian Shen *tuple_sets = HCLGEVF_S_IP_BIT | HCLGEVF_D_IP_BIT; 102773f7767eSJian Shen break; 102873f7767eSJian Shen default: 102973f7767eSJian Shen return -EINVAL; 103073f7767eSJian Shen } 103173f7767eSJian Shen 103273f7767eSJian Shen return 0; 103373f7767eSJian Shen } 103473f7767eSJian Shen 103573f7767eSJian Shen static u64 hclgevf_convert_rss_tuple(u8 tuple_sets) 103673f7767eSJian Shen { 103773f7767eSJian Shen u64 tuple_data = 0; 103873f7767eSJian Shen 103973f7767eSJian Shen if (tuple_sets & HCLGEVF_D_PORT_BIT) 104073f7767eSJian Shen tuple_data |= RXH_L4_B_2_3; 104173f7767eSJian Shen if (tuple_sets & HCLGEVF_S_PORT_BIT) 104273f7767eSJian Shen tuple_data |= RXH_L4_B_0_1; 104373f7767eSJian Shen if (tuple_sets & HCLGEVF_D_IP_BIT) 104473f7767eSJian Shen tuple_data |= RXH_IP_DST; 104573f7767eSJian Shen if (tuple_sets & HCLGEVF_S_IP_BIT) 104673f7767eSJian Shen tuple_data |= RXH_IP_SRC; 104773f7767eSJian Shen 104873f7767eSJian Shen return tuple_data; 104973f7767eSJian Shen } 105073f7767eSJian Shen 1051d97b3072SJian Shen static int hclgevf_get_rss_tuple(struct hnae3_handle *handle, 1052d97b3072SJian Shen struct ethtool_rxnfc *nfc) 1053d97b3072SJian Shen { 1054d97b3072SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1055d97b3072SJian Shen u8 tuple_sets; 105673f7767eSJian Shen int ret; 1057d97b3072SJian Shen 1058295ba232SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) 1059d97b3072SJian Shen return -EOPNOTSUPP; 1060d97b3072SJian Shen 1061d97b3072SJian Shen nfc->data = 0; 1062d97b3072SJian Shen 106373f7767eSJian Shen ret = hclgevf_get_rss_tuple_by_flow_type(hdev, nfc->flow_type, 106473f7767eSJian Shen &tuple_sets); 106573f7767eSJian Shen if (ret || !tuple_sets) 106673f7767eSJian Shen return ret; 1067d97b3072SJian Shen 106873f7767eSJian Shen nfc->data = hclgevf_convert_rss_tuple(tuple_sets); 1069d97b3072SJian Shen 1070d97b3072SJian Shen return 0; 1071d97b3072SJian Shen } 1072d97b3072SJian Shen 1073d97b3072SJian Shen static int hclgevf_set_rss_input_tuple(struct hclgevf_dev *hdev, 1074d97b3072SJian Shen struct hclgevf_rss_cfg *rss_cfg) 1075d97b3072SJian Shen { 1076d97b3072SJian Shen struct hclgevf_rss_input_tuple_cmd *req; 1077d97b3072SJian Shen struct hclgevf_desc desc; 1078d97b3072SJian Shen int ret; 1079d97b3072SJian Shen 1080d97b3072SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INPUT_TUPLE, false); 1081d97b3072SJian Shen 1082d97b3072SJian Shen req = (struct hclgevf_rss_input_tuple_cmd *)desc.data; 1083d97b3072SJian Shen 1084d97b3072SJian Shen req->ipv4_tcp_en = rss_cfg->rss_tuple_sets.ipv4_tcp_en; 1085d97b3072SJian Shen req->ipv4_udp_en = rss_cfg->rss_tuple_sets.ipv4_udp_en; 1086d97b3072SJian Shen req->ipv4_sctp_en = rss_cfg->rss_tuple_sets.ipv4_sctp_en; 1087d97b3072SJian Shen req->ipv4_fragment_en = rss_cfg->rss_tuple_sets.ipv4_fragment_en; 1088d97b3072SJian Shen req->ipv6_tcp_en = rss_cfg->rss_tuple_sets.ipv6_tcp_en; 1089d97b3072SJian Shen req->ipv6_udp_en = rss_cfg->rss_tuple_sets.ipv6_udp_en; 1090d97b3072SJian Shen req->ipv6_sctp_en = rss_cfg->rss_tuple_sets.ipv6_sctp_en; 1091d97b3072SJian Shen req->ipv6_fragment_en = rss_cfg->rss_tuple_sets.ipv6_fragment_en; 1092d97b3072SJian Shen 1093d97b3072SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 1094d97b3072SJian Shen if (ret) 1095d97b3072SJian Shen dev_err(&hdev->pdev->dev, 1096d97b3072SJian Shen "Configure rss input fail, status = %d\n", ret); 1097d97b3072SJian Shen return ret; 1098d97b3072SJian Shen } 1099d97b3072SJian Shen 1100e2cb1decSSalil Mehta static int hclgevf_get_tc_size(struct hnae3_handle *handle) 1101e2cb1decSSalil Mehta { 1102e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1103e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 1104e2cb1decSSalil Mehta 1105e2cb1decSSalil Mehta return rss_cfg->rss_size; 1106e2cb1decSSalil Mehta } 1107e2cb1decSSalil Mehta 1108e2cb1decSSalil Mehta static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en, 1109b204bc74SPeng Li int vector_id, 1110e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1111e2cb1decSSalil Mehta { 1112e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1113d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1114e2cb1decSSalil Mehta struct hnae3_ring_chain_node *node; 1115e2cb1decSSalil Mehta int status; 1116d3410018SYufeng Mo int i = 0; 1117e2cb1decSSalil Mehta 1118d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1119d3410018SYufeng Mo send_msg.code = en ? HCLGE_MBX_MAP_RING_TO_VECTOR : 1120c09ba484SPeng Li HCLGE_MBX_UNMAP_RING_TO_VECTOR; 1121d3410018SYufeng Mo send_msg.vector_id = vector_id; 1122e2cb1decSSalil Mehta 1123e2cb1decSSalil Mehta for (node = ring_chain; node; node = node->next) { 1124d3410018SYufeng Mo send_msg.param[i].ring_type = 1125e4e87715SPeng Li hnae3_get_bit(node->flag, HNAE3_RING_TYPE_B); 1126d3410018SYufeng Mo 1127d3410018SYufeng Mo send_msg.param[i].tqp_index = node->tqp_index; 1128d3410018SYufeng Mo send_msg.param[i].int_gl_index = 1129d3410018SYufeng Mo hnae3_get_field(node->int_gl_idx, 113079eee410SFuyun Liang HNAE3_RING_GL_IDX_M, 113179eee410SFuyun Liang HNAE3_RING_GL_IDX_S); 113279eee410SFuyun Liang 11335d02a58dSYunsheng Lin i++; 1134d3410018SYufeng Mo if (i == HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM || !node->next) { 1135d3410018SYufeng Mo send_msg.ring_num = i; 1136e2cb1decSSalil Mehta 1137d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, false, 1138d3410018SYufeng Mo NULL, 0); 1139e2cb1decSSalil Mehta if (status) { 1140e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1141e2cb1decSSalil Mehta "Map TQP fail, status is %d.\n", 1142e2cb1decSSalil Mehta status); 1143e2cb1decSSalil Mehta return status; 1144e2cb1decSSalil Mehta } 1145e2cb1decSSalil Mehta i = 0; 1146e2cb1decSSalil Mehta } 1147e2cb1decSSalil Mehta } 1148e2cb1decSSalil Mehta 1149e2cb1decSSalil Mehta return 0; 1150e2cb1decSSalil Mehta } 1151e2cb1decSSalil Mehta 1152e2cb1decSSalil Mehta static int hclgevf_map_ring_to_vector(struct hnae3_handle *handle, int vector, 1153e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1154e2cb1decSSalil Mehta { 1155b204bc74SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1156b204bc74SPeng Li int vector_id; 1157b204bc74SPeng Li 1158b204bc74SPeng Li vector_id = hclgevf_get_vector_index(hdev, vector); 1159b204bc74SPeng Li if (vector_id < 0) { 1160b204bc74SPeng Li dev_err(&handle->pdev->dev, 1161b204bc74SPeng Li "Get vector index fail. ret =%d\n", vector_id); 1162b204bc74SPeng Li return vector_id; 1163b204bc74SPeng Li } 1164b204bc74SPeng Li 1165b204bc74SPeng Li return hclgevf_bind_ring_to_vector(handle, true, vector_id, ring_chain); 1166e2cb1decSSalil Mehta } 1167e2cb1decSSalil Mehta 1168e2cb1decSSalil Mehta static int hclgevf_unmap_ring_from_vector( 1169e2cb1decSSalil Mehta struct hnae3_handle *handle, 1170e2cb1decSSalil Mehta int vector, 1171e2cb1decSSalil Mehta struct hnae3_ring_chain_node *ring_chain) 1172e2cb1decSSalil Mehta { 1173e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1174e2cb1decSSalil Mehta int ret, vector_id; 1175e2cb1decSSalil Mehta 1176dea846e8SHuazhong Tan if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) 1177dea846e8SHuazhong Tan return 0; 1178dea846e8SHuazhong Tan 1179e2cb1decSSalil Mehta vector_id = hclgevf_get_vector_index(hdev, vector); 1180e2cb1decSSalil Mehta if (vector_id < 0) { 1181e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1182e2cb1decSSalil Mehta "Get vector index fail. ret =%d\n", vector_id); 1183e2cb1decSSalil Mehta return vector_id; 1184e2cb1decSSalil Mehta } 1185e2cb1decSSalil Mehta 1186b204bc74SPeng Li ret = hclgevf_bind_ring_to_vector(handle, false, vector_id, ring_chain); 11870d3e6631SYunsheng Lin if (ret) 1188e2cb1decSSalil Mehta dev_err(&handle->pdev->dev, 1189e2cb1decSSalil Mehta "Unmap ring from vector fail. vector=%d, ret =%d\n", 1190e2cb1decSSalil Mehta vector_id, 1191e2cb1decSSalil Mehta ret); 11920d3e6631SYunsheng Lin 1193e2cb1decSSalil Mehta return ret; 1194e2cb1decSSalil Mehta } 1195e2cb1decSSalil Mehta 11960d3e6631SYunsheng Lin static int hclgevf_put_vector(struct hnae3_handle *handle, int vector) 11970d3e6631SYunsheng Lin { 11980d3e6631SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 119903718db9SYunsheng Lin int vector_id; 12000d3e6631SYunsheng Lin 120103718db9SYunsheng Lin vector_id = hclgevf_get_vector_index(hdev, vector); 120203718db9SYunsheng Lin if (vector_id < 0) { 120303718db9SYunsheng Lin dev_err(&handle->pdev->dev, 120403718db9SYunsheng Lin "hclgevf_put_vector get vector index fail. ret =%d\n", 120503718db9SYunsheng Lin vector_id); 120603718db9SYunsheng Lin return vector_id; 120703718db9SYunsheng Lin } 120803718db9SYunsheng Lin 120903718db9SYunsheng Lin hclgevf_free_vector(hdev, vector_id); 1210e2cb1decSSalil Mehta 1211e2cb1decSSalil Mehta return 0; 1212e2cb1decSSalil Mehta } 1213e2cb1decSSalil Mehta 12143b75c3dfSPeng Li static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev *hdev, 1215e196ec75SJian Shen bool en_uc_pmc, bool en_mc_pmc, 1216f01f5559SJian Shen bool en_bc_pmc) 1217e2cb1decSSalil Mehta { 12185e7414cdSJian Shen struct hnae3_handle *handle = &hdev->nic; 1219d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1220f01f5559SJian Shen int ret; 1221e2cb1decSSalil Mehta 1222d3410018SYufeng Mo memset(&send_msg, 0, sizeof(send_msg)); 1223d3410018SYufeng Mo send_msg.code = HCLGE_MBX_SET_PROMISC_MODE; 1224d3410018SYufeng Mo send_msg.en_bc = en_bc_pmc ? 1 : 0; 1225d3410018SYufeng Mo send_msg.en_uc = en_uc_pmc ? 1 : 0; 1226d3410018SYufeng Mo send_msg.en_mc = en_mc_pmc ? 1 : 0; 12275e7414cdSJian Shen send_msg.en_limit_promisc = test_bit(HNAE3_PFLAG_LIMIT_PROMISC, 12285e7414cdSJian Shen &handle->priv_flags) ? 1 : 0; 1229e2cb1decSSalil Mehta 1230d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1231f01f5559SJian Shen if (ret) 1232e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 1233f01f5559SJian Shen "Set promisc mode fail, status is %d.\n", ret); 1234e2cb1decSSalil Mehta 1235f01f5559SJian Shen return ret; 1236e2cb1decSSalil Mehta } 1237e2cb1decSSalil Mehta 1238e196ec75SJian Shen static int hclgevf_set_promisc_mode(struct hnae3_handle *handle, bool en_uc_pmc, 1239e196ec75SJian Shen bool en_mc_pmc) 1240e2cb1decSSalil Mehta { 1241e196ec75SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1242e196ec75SJian Shen bool en_bc_pmc; 1243e196ec75SJian Shen 1244295ba232SGuangbin Huang en_bc_pmc = hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2; 1245e196ec75SJian Shen 1246e196ec75SJian Shen return hclgevf_cmd_set_promisc_mode(hdev, en_uc_pmc, en_mc_pmc, 1247e196ec75SJian Shen en_bc_pmc); 1248e2cb1decSSalil Mehta } 1249e2cb1decSSalil Mehta 1250c631c696SJian Shen static void hclgevf_request_update_promisc_mode(struct hnae3_handle *handle) 1251c631c696SJian Shen { 1252c631c696SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1253c631c696SJian Shen 1254c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 12555e7414cdSJian Shen hclgevf_task_schedule(hdev, 0); 1256c631c696SJian Shen } 1257c631c696SJian Shen 1258c631c696SJian Shen static void hclgevf_sync_promisc_mode(struct hclgevf_dev *hdev) 1259c631c696SJian Shen { 1260c631c696SJian Shen struct hnae3_handle *handle = &hdev->nic; 1261c631c696SJian Shen bool en_uc_pmc = handle->netdev_flags & HNAE3_UPE; 1262c631c696SJian Shen bool en_mc_pmc = handle->netdev_flags & HNAE3_MPE; 1263c631c696SJian Shen int ret; 1264c631c696SJian Shen 1265c631c696SJian Shen if (test_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state)) { 1266c631c696SJian Shen ret = hclgevf_set_promisc_mode(handle, en_uc_pmc, en_mc_pmc); 1267c631c696SJian Shen if (!ret) 1268c631c696SJian Shen clear_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 1269c631c696SJian Shen } 1270c631c696SJian Shen } 1271c631c696SJian Shen 12728fa86551SYufeng Mo static int hclgevf_tqp_enable_cmd_send(struct hclgevf_dev *hdev, u16 tqp_id, 12738fa86551SYufeng Mo u16 stream_id, bool enable) 1274e2cb1decSSalil Mehta { 1275e2cb1decSSalil Mehta struct hclgevf_cfg_com_tqp_queue_cmd *req; 1276e2cb1decSSalil Mehta struct hclgevf_desc desc; 1277e2cb1decSSalil Mehta 1278e2cb1decSSalil Mehta req = (struct hclgevf_cfg_com_tqp_queue_cmd *)desc.data; 1279e2cb1decSSalil Mehta 1280e2cb1decSSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_CFG_COM_TQP_QUEUE, 1281e2cb1decSSalil Mehta false); 1282e2cb1decSSalil Mehta req->tqp_id = cpu_to_le16(tqp_id & HCLGEVF_RING_ID_MASK); 1283e2cb1decSSalil Mehta req->stream_id = cpu_to_le16(stream_id); 1284ebaf1908SWeihang Li if (enable) 1285ebaf1908SWeihang Li req->enable |= 1U << HCLGEVF_TQP_ENABLE_B; 1286e2cb1decSSalil Mehta 12878fa86551SYufeng Mo return hclgevf_cmd_send(&hdev->hw, &desc, 1); 12888fa86551SYufeng Mo } 1289e2cb1decSSalil Mehta 12908fa86551SYufeng Mo static int hclgevf_tqp_enable(struct hnae3_handle *handle, bool enable) 12918fa86551SYufeng Mo { 12928fa86551SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 12938fa86551SYufeng Mo int ret; 12948fa86551SYufeng Mo u16 i; 12958fa86551SYufeng Mo 12968fa86551SYufeng Mo for (i = 0; i < handle->kinfo.num_tqps; i++) { 12978fa86551SYufeng Mo ret = hclgevf_tqp_enable_cmd_send(hdev, i, 0, enable); 12988fa86551SYufeng Mo if (ret) 12998fa86551SYufeng Mo return ret; 13008fa86551SYufeng Mo } 13018fa86551SYufeng Mo 13028fa86551SYufeng Mo return 0; 1303e2cb1decSSalil Mehta } 1304e2cb1decSSalil Mehta 1305e2cb1decSSalil Mehta static void hclgevf_reset_tqp_stats(struct hnae3_handle *handle) 1306e2cb1decSSalil Mehta { 1307b4f1d303SJian Shen struct hnae3_knic_private_info *kinfo = &handle->kinfo; 1308e2cb1decSSalil Mehta struct hclgevf_tqp *tqp; 1309e2cb1decSSalil Mehta int i; 1310e2cb1decSSalil Mehta 1311b4f1d303SJian Shen for (i = 0; i < kinfo->num_tqps; i++) { 1312b4f1d303SJian Shen tqp = container_of(kinfo->tqp[i], struct hclgevf_tqp, q); 1313e2cb1decSSalil Mehta memset(&tqp->tqp_stats, 0, sizeof(tqp->tqp_stats)); 1314e2cb1decSSalil Mehta } 1315e2cb1decSSalil Mehta } 1316e2cb1decSSalil Mehta 13178e6de441SHuazhong Tan static int hclgevf_get_host_mac_addr(struct hclgevf_dev *hdev, u8 *p) 13188e6de441SHuazhong Tan { 1319d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 13208e6de441SHuazhong Tan u8 host_mac[ETH_ALEN]; 13218e6de441SHuazhong Tan int status; 13228e6de441SHuazhong Tan 1323d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_MAC_ADDR, 0); 1324d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, host_mac, 1325d3410018SYufeng Mo ETH_ALEN); 13268e6de441SHuazhong Tan if (status) { 13278e6de441SHuazhong Tan dev_err(&hdev->pdev->dev, 13288e6de441SHuazhong Tan "fail to get VF MAC from host %d", status); 13298e6de441SHuazhong Tan return status; 13308e6de441SHuazhong Tan } 13318e6de441SHuazhong Tan 13328e6de441SHuazhong Tan ether_addr_copy(p, host_mac); 13338e6de441SHuazhong Tan 13348e6de441SHuazhong Tan return 0; 13358e6de441SHuazhong Tan } 13368e6de441SHuazhong Tan 1337e2cb1decSSalil Mehta static void hclgevf_get_mac_addr(struct hnae3_handle *handle, u8 *p) 1338e2cb1decSSalil Mehta { 1339e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 13408e6de441SHuazhong Tan u8 host_mac_addr[ETH_ALEN]; 1341e2cb1decSSalil Mehta 13428e6de441SHuazhong Tan if (hclgevf_get_host_mac_addr(hdev, host_mac_addr)) 13438e6de441SHuazhong Tan return; 13448e6de441SHuazhong Tan 13458e6de441SHuazhong Tan hdev->has_pf_mac = !is_zero_ether_addr(host_mac_addr); 13468e6de441SHuazhong Tan if (hdev->has_pf_mac) 13478e6de441SHuazhong Tan ether_addr_copy(p, host_mac_addr); 13488e6de441SHuazhong Tan else 1349e2cb1decSSalil Mehta ether_addr_copy(p, hdev->hw.mac.mac_addr); 1350e2cb1decSSalil Mehta } 1351e2cb1decSSalil Mehta 135259098055SFuyun Liang static int hclgevf_set_mac_addr(struct hnae3_handle *handle, void *p, 135359098055SFuyun Liang bool is_first) 1354e2cb1decSSalil Mehta { 1355e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1356e2cb1decSSalil Mehta u8 *old_mac_addr = (u8 *)hdev->hw.mac.mac_addr; 1357d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1358e2cb1decSSalil Mehta u8 *new_mac_addr = (u8 *)p; 1359e2cb1decSSalil Mehta int status; 1360e2cb1decSSalil Mehta 1361d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_UNICAST, 0); 1362ee4bcd3bSJian Shen send_msg.subcode = HCLGE_MBX_MAC_VLAN_UC_MODIFY; 1363d3410018SYufeng Mo ether_addr_copy(send_msg.data, new_mac_addr); 1364ee4bcd3bSJian Shen if (is_first && !hdev->has_pf_mac) 1365ee4bcd3bSJian Shen eth_zero_addr(&send_msg.data[ETH_ALEN]); 1366ee4bcd3bSJian Shen else 1367d3410018SYufeng Mo ether_addr_copy(&send_msg.data[ETH_ALEN], old_mac_addr); 1368d3410018SYufeng Mo status = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1369e2cb1decSSalil Mehta if (!status) 1370e2cb1decSSalil Mehta ether_addr_copy(hdev->hw.mac.mac_addr, new_mac_addr); 1371e2cb1decSSalil Mehta 1372e2cb1decSSalil Mehta return status; 1373e2cb1decSSalil Mehta } 1374e2cb1decSSalil Mehta 1375ee4bcd3bSJian Shen static struct hclgevf_mac_addr_node * 1376ee4bcd3bSJian Shen hclgevf_find_mac_node(struct list_head *list, const u8 *mac_addr) 1377ee4bcd3bSJian Shen { 1378ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1379ee4bcd3bSJian Shen 1380ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) 1381ee4bcd3bSJian Shen if (ether_addr_equal(mac_addr, mac_node->mac_addr)) 1382ee4bcd3bSJian Shen return mac_node; 1383ee4bcd3bSJian Shen 1384ee4bcd3bSJian Shen return NULL; 1385ee4bcd3bSJian Shen } 1386ee4bcd3bSJian Shen 1387ee4bcd3bSJian Shen static void hclgevf_update_mac_node(struct hclgevf_mac_addr_node *mac_node, 1388ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state) 1389ee4bcd3bSJian Shen { 1390ee4bcd3bSJian Shen switch (state) { 1391ee4bcd3bSJian Shen /* from set_rx_mode or tmp_add_list */ 1392ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1393ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_DEL) 1394ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1395ee4bcd3bSJian Shen break; 1396ee4bcd3bSJian Shen /* only from set_rx_mode */ 1397ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 1398ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1399ee4bcd3bSJian Shen list_del(&mac_node->node); 1400ee4bcd3bSJian Shen kfree(mac_node); 1401ee4bcd3bSJian Shen } else { 1402ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 1403ee4bcd3bSJian Shen } 1404ee4bcd3bSJian Shen break; 1405ee4bcd3bSJian Shen /* only from tmp_add_list, the mac_node->state won't be 1406ee4bcd3bSJian Shen * HCLGEVF_MAC_ACTIVE 1407ee4bcd3bSJian Shen */ 1408ee4bcd3bSJian Shen case HCLGEVF_MAC_ACTIVE: 1409ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1410ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1411ee4bcd3bSJian Shen break; 1412ee4bcd3bSJian Shen } 1413ee4bcd3bSJian Shen } 1414ee4bcd3bSJian Shen 1415ee4bcd3bSJian Shen static int hclgevf_update_mac_list(struct hnae3_handle *handle, 1416ee4bcd3bSJian Shen enum HCLGEVF_MAC_NODE_STATE state, 1417ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type, 1418e2cb1decSSalil Mehta const unsigned char *addr) 1419e2cb1decSSalil Mehta { 1420e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1421ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node; 1422ee4bcd3bSJian Shen struct list_head *list; 1423e2cb1decSSalil Mehta 1424ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1425ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1426ee4bcd3bSJian Shen 1427ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1428ee4bcd3bSJian Shen 1429ee4bcd3bSJian Shen /* if the mac addr is already in the mac list, no need to add a new 1430ee4bcd3bSJian Shen * one into it, just check the mac addr state, convert it to a new 1431ee4bcd3bSJian Shen * new state, or just remove it, or do nothing. 1432ee4bcd3bSJian Shen */ 1433ee4bcd3bSJian Shen mac_node = hclgevf_find_mac_node(list, addr); 1434ee4bcd3bSJian Shen if (mac_node) { 1435ee4bcd3bSJian Shen hclgevf_update_mac_node(mac_node, state); 1436ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1437ee4bcd3bSJian Shen return 0; 1438ee4bcd3bSJian Shen } 1439ee4bcd3bSJian Shen /* if this address is never added, unnecessary to delete */ 1440ee4bcd3bSJian Shen if (state == HCLGEVF_MAC_TO_DEL) { 1441ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1442ee4bcd3bSJian Shen return -ENOENT; 1443ee4bcd3bSJian Shen } 1444ee4bcd3bSJian Shen 1445ee4bcd3bSJian Shen mac_node = kzalloc(sizeof(*mac_node), GFP_ATOMIC); 1446ee4bcd3bSJian Shen if (!mac_node) { 1447ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1448ee4bcd3bSJian Shen return -ENOMEM; 1449ee4bcd3bSJian Shen } 1450ee4bcd3bSJian Shen 1451ee4bcd3bSJian Shen mac_node->state = state; 1452ee4bcd3bSJian Shen ether_addr_copy(mac_node->mac_addr, addr); 1453ee4bcd3bSJian Shen list_add_tail(&mac_node->node, list); 1454ee4bcd3bSJian Shen 1455ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1456ee4bcd3bSJian Shen return 0; 1457ee4bcd3bSJian Shen } 1458ee4bcd3bSJian Shen 1459ee4bcd3bSJian Shen static int hclgevf_add_uc_addr(struct hnae3_handle *handle, 1460ee4bcd3bSJian Shen const unsigned char *addr) 1461ee4bcd3bSJian Shen { 1462ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1463ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1464e2cb1decSSalil Mehta } 1465e2cb1decSSalil Mehta 1466e2cb1decSSalil Mehta static int hclgevf_rm_uc_addr(struct hnae3_handle *handle, 1467e2cb1decSSalil Mehta const unsigned char *addr) 1468e2cb1decSSalil Mehta { 1469ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1470ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_UC, addr); 1471e2cb1decSSalil Mehta } 1472e2cb1decSSalil Mehta 1473e2cb1decSSalil Mehta static int hclgevf_add_mc_addr(struct hnae3_handle *handle, 1474e2cb1decSSalil Mehta const unsigned char *addr) 1475e2cb1decSSalil Mehta { 1476ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_ADD, 1477ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1478e2cb1decSSalil Mehta } 1479e2cb1decSSalil Mehta 1480e2cb1decSSalil Mehta static int hclgevf_rm_mc_addr(struct hnae3_handle *handle, 1481e2cb1decSSalil Mehta const unsigned char *addr) 1482e2cb1decSSalil Mehta { 1483ee4bcd3bSJian Shen return hclgevf_update_mac_list(handle, HCLGEVF_MAC_TO_DEL, 1484ee4bcd3bSJian Shen HCLGEVF_MAC_ADDR_MC, addr); 1485ee4bcd3bSJian Shen } 1486e2cb1decSSalil Mehta 1487ee4bcd3bSJian Shen static int hclgevf_add_del_mac_addr(struct hclgevf_dev *hdev, 1488ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, 1489ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1490ee4bcd3bSJian Shen { 1491ee4bcd3bSJian Shen struct hclge_vf_to_pf_msg send_msg; 1492ee4bcd3bSJian Shen u8 code, subcode; 1493ee4bcd3bSJian Shen 1494ee4bcd3bSJian Shen if (mac_type == HCLGEVF_MAC_ADDR_UC) { 1495ee4bcd3bSJian Shen code = HCLGE_MBX_SET_UNICAST; 1496ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1497ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_ADD; 1498ee4bcd3bSJian Shen else 1499ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_UC_REMOVE; 1500ee4bcd3bSJian Shen } else { 1501ee4bcd3bSJian Shen code = HCLGE_MBX_SET_MULTICAST; 1502ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) 1503ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_ADD; 1504ee4bcd3bSJian Shen else 1505ee4bcd3bSJian Shen subcode = HCLGE_MBX_MAC_VLAN_MC_REMOVE; 1506ee4bcd3bSJian Shen } 1507ee4bcd3bSJian Shen 1508ee4bcd3bSJian Shen hclgevf_build_send_msg(&send_msg, code, subcode); 1509ee4bcd3bSJian Shen ether_addr_copy(send_msg.data, mac_node->mac_addr); 1510d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1511e2cb1decSSalil Mehta } 1512e2cb1decSSalil Mehta 1513ee4bcd3bSJian Shen static void hclgevf_config_mac_list(struct hclgevf_dev *hdev, 1514ee4bcd3bSJian Shen struct list_head *list, 1515ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1516ee4bcd3bSJian Shen { 1517ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1518ee4bcd3bSJian Shen int ret; 1519ee4bcd3bSJian Shen 1520ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1521ee4bcd3bSJian Shen ret = hclgevf_add_del_mac_addr(hdev, mac_node, mac_type); 1522ee4bcd3bSJian Shen if (ret) { 1523ee4bcd3bSJian Shen dev_err(&hdev->pdev->dev, 1524ee4bcd3bSJian Shen "failed to configure mac %pM, state = %d, ret = %d\n", 1525ee4bcd3bSJian Shen mac_node->mac_addr, mac_node->state, ret); 1526ee4bcd3bSJian Shen return; 1527ee4bcd3bSJian Shen } 1528ee4bcd3bSJian Shen if (mac_node->state == HCLGEVF_MAC_TO_ADD) { 1529ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_ACTIVE; 1530ee4bcd3bSJian Shen } else { 1531ee4bcd3bSJian Shen list_del(&mac_node->node); 1532ee4bcd3bSJian Shen kfree(mac_node); 1533ee4bcd3bSJian Shen } 1534ee4bcd3bSJian Shen } 1535ee4bcd3bSJian Shen } 1536ee4bcd3bSJian Shen 1537ee4bcd3bSJian Shen static void hclgevf_sync_from_add_list(struct list_head *add_list, 1538ee4bcd3bSJian Shen struct list_head *mac_list) 1539ee4bcd3bSJian Shen { 1540ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1541ee4bcd3bSJian Shen 1542ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, add_list, node) { 1543ee4bcd3bSJian Shen /* if the mac address from tmp_add_list is not in the 1544ee4bcd3bSJian Shen * uc/mc_mac_list, it means have received a TO_DEL request 1545ee4bcd3bSJian Shen * during the time window of sending mac config request to PF 1546ee4bcd3bSJian Shen * If mac_node state is ACTIVE, then change its state to TO_DEL, 1547ee4bcd3bSJian Shen * then it will be removed at next time. If is TO_ADD, it means 1548ee4bcd3bSJian Shen * send TO_ADD request failed, so just remove the mac node. 1549ee4bcd3bSJian Shen */ 1550ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1551ee4bcd3bSJian Shen if (new_node) { 1552ee4bcd3bSJian Shen hclgevf_update_mac_node(new_node, mac_node->state); 1553ee4bcd3bSJian Shen list_del(&mac_node->node); 1554ee4bcd3bSJian Shen kfree(mac_node); 1555ee4bcd3bSJian Shen } else if (mac_node->state == HCLGEVF_MAC_ACTIVE) { 1556ee4bcd3bSJian Shen mac_node->state = HCLGEVF_MAC_TO_DEL; 155749768ce9SBaokun Li list_move_tail(&mac_node->node, mac_list); 1558ee4bcd3bSJian Shen } else { 1559ee4bcd3bSJian Shen list_del(&mac_node->node); 1560ee4bcd3bSJian Shen kfree(mac_node); 1561ee4bcd3bSJian Shen } 1562ee4bcd3bSJian Shen } 1563ee4bcd3bSJian Shen } 1564ee4bcd3bSJian Shen 1565ee4bcd3bSJian Shen static void hclgevf_sync_from_del_list(struct list_head *del_list, 1566ee4bcd3bSJian Shen struct list_head *mac_list) 1567ee4bcd3bSJian Shen { 1568ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1569ee4bcd3bSJian Shen 1570ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, del_list, node) { 1571ee4bcd3bSJian Shen new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); 1572ee4bcd3bSJian Shen if (new_node) { 1573ee4bcd3bSJian Shen /* If the mac addr is exist in the mac list, it means 1574ee4bcd3bSJian Shen * received a new request TO_ADD during the time window 1575ee4bcd3bSJian Shen * of sending mac addr configurrequest to PF, so just 1576ee4bcd3bSJian Shen * change the mac state to ACTIVE. 1577ee4bcd3bSJian Shen */ 1578ee4bcd3bSJian Shen new_node->state = HCLGEVF_MAC_ACTIVE; 1579ee4bcd3bSJian Shen list_del(&mac_node->node); 1580ee4bcd3bSJian Shen kfree(mac_node); 1581ee4bcd3bSJian Shen } else { 158249768ce9SBaokun Li list_move_tail(&mac_node->node, mac_list); 1583ee4bcd3bSJian Shen } 1584ee4bcd3bSJian Shen } 1585ee4bcd3bSJian Shen } 1586ee4bcd3bSJian Shen 1587ee4bcd3bSJian Shen static void hclgevf_clear_list(struct list_head *list) 1588ee4bcd3bSJian Shen { 1589ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp; 1590ee4bcd3bSJian Shen 1591ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1592ee4bcd3bSJian Shen list_del(&mac_node->node); 1593ee4bcd3bSJian Shen kfree(mac_node); 1594ee4bcd3bSJian Shen } 1595ee4bcd3bSJian Shen } 1596ee4bcd3bSJian Shen 1597ee4bcd3bSJian Shen static void hclgevf_sync_mac_list(struct hclgevf_dev *hdev, 1598ee4bcd3bSJian Shen enum HCLGEVF_MAC_ADDR_TYPE mac_type) 1599ee4bcd3bSJian Shen { 1600ee4bcd3bSJian Shen struct hclgevf_mac_addr_node *mac_node, *tmp, *new_node; 1601ee4bcd3bSJian Shen struct list_head tmp_add_list, tmp_del_list; 1602ee4bcd3bSJian Shen struct list_head *list; 1603ee4bcd3bSJian Shen 1604ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_add_list); 1605ee4bcd3bSJian Shen INIT_LIST_HEAD(&tmp_del_list); 1606ee4bcd3bSJian Shen 1607ee4bcd3bSJian Shen /* move the mac addr to the tmp_add_list and tmp_del_list, then 1608ee4bcd3bSJian Shen * we can add/delete these mac addr outside the spin lock 1609ee4bcd3bSJian Shen */ 1610ee4bcd3bSJian Shen list = (mac_type == HCLGEVF_MAC_ADDR_UC) ? 1611ee4bcd3bSJian Shen &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; 1612ee4bcd3bSJian Shen 1613ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1614ee4bcd3bSJian Shen 1615ee4bcd3bSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1616ee4bcd3bSJian Shen switch (mac_node->state) { 1617ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_DEL: 161849768ce9SBaokun Li list_move_tail(&mac_node->node, &tmp_del_list); 1619ee4bcd3bSJian Shen break; 1620ee4bcd3bSJian Shen case HCLGEVF_MAC_TO_ADD: 1621ee4bcd3bSJian Shen new_node = kzalloc(sizeof(*new_node), GFP_ATOMIC); 1622ee4bcd3bSJian Shen if (!new_node) 1623ee4bcd3bSJian Shen goto stop_traverse; 1624ee4bcd3bSJian Shen 1625ee4bcd3bSJian Shen ether_addr_copy(new_node->mac_addr, mac_node->mac_addr); 1626ee4bcd3bSJian Shen new_node->state = mac_node->state; 1627ee4bcd3bSJian Shen list_add_tail(&new_node->node, &tmp_add_list); 1628ee4bcd3bSJian Shen break; 1629ee4bcd3bSJian Shen default: 1630ee4bcd3bSJian Shen break; 1631ee4bcd3bSJian Shen } 1632ee4bcd3bSJian Shen } 1633ee4bcd3bSJian Shen 1634ee4bcd3bSJian Shen stop_traverse: 1635ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1636ee4bcd3bSJian Shen 1637ee4bcd3bSJian Shen /* delete first, in order to get max mac table space for adding */ 1638ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_del_list, mac_type); 1639ee4bcd3bSJian Shen hclgevf_config_mac_list(hdev, &tmp_add_list, mac_type); 1640ee4bcd3bSJian Shen 1641ee4bcd3bSJian Shen /* if some mac addresses were added/deleted fail, move back to the 1642ee4bcd3bSJian Shen * mac_list, and retry at next time. 1643ee4bcd3bSJian Shen */ 1644ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1645ee4bcd3bSJian Shen 1646ee4bcd3bSJian Shen hclgevf_sync_from_del_list(&tmp_del_list, list); 1647ee4bcd3bSJian Shen hclgevf_sync_from_add_list(&tmp_add_list, list); 1648ee4bcd3bSJian Shen 1649ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1650ee4bcd3bSJian Shen } 1651ee4bcd3bSJian Shen 1652ee4bcd3bSJian Shen static void hclgevf_sync_mac_table(struct hclgevf_dev *hdev) 1653ee4bcd3bSJian Shen { 1654ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_UC); 1655ee4bcd3bSJian Shen hclgevf_sync_mac_list(hdev, HCLGEVF_MAC_ADDR_MC); 1656ee4bcd3bSJian Shen } 1657ee4bcd3bSJian Shen 1658ee4bcd3bSJian Shen static void hclgevf_uninit_mac_list(struct hclgevf_dev *hdev) 1659ee4bcd3bSJian Shen { 1660ee4bcd3bSJian Shen spin_lock_bh(&hdev->mac_table.mac_list_lock); 1661ee4bcd3bSJian Shen 1662ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.uc_mac_list); 1663ee4bcd3bSJian Shen hclgevf_clear_list(&hdev->mac_table.mc_mac_list); 1664ee4bcd3bSJian Shen 1665ee4bcd3bSJian Shen spin_unlock_bh(&hdev->mac_table.mac_list_lock); 1666ee4bcd3bSJian Shen } 1667ee4bcd3bSJian Shen 1668fa6a262aSJian Shen static int hclgevf_enable_vlan_filter(struct hnae3_handle *handle, bool enable) 1669fa6a262aSJian Shen { 1670fa6a262aSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1671fa6a262aSJian Shen struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 1672fa6a262aSJian Shen struct hclge_vf_to_pf_msg send_msg; 1673fa6a262aSJian Shen 1674fa6a262aSJian Shen if (!test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) 1675fa6a262aSJian Shen return -EOPNOTSUPP; 1676fa6a262aSJian Shen 1677fa6a262aSJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1678fa6a262aSJian Shen HCLGE_MBX_ENABLE_VLAN_FILTER); 1679fa6a262aSJian Shen send_msg.data[0] = enable ? 1 : 0; 1680fa6a262aSJian Shen 1681fa6a262aSJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1682fa6a262aSJian Shen } 1683fa6a262aSJian Shen 1684e2cb1decSSalil Mehta static int hclgevf_set_vlan_filter(struct hnae3_handle *handle, 1685e2cb1decSSalil Mehta __be16 proto, u16 vlan_id, 1686e2cb1decSSalil Mehta bool is_kill) 1687e2cb1decSSalil Mehta { 1688d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_IS_KILL_OFFSET 0 1689d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET 1 1690d3410018SYufeng Mo #define HCLGEVF_VLAN_MBX_PROTO_OFFSET 3 1691d3410018SYufeng Mo 1692e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1693d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1694fe4144d4SJian Shen int ret; 1695e2cb1decSSalil Mehta 1696b37ce587SYufeng Mo if (vlan_id > HCLGEVF_MAX_VLAN_ID) 1697e2cb1decSSalil Mehta return -EINVAL; 1698e2cb1decSSalil Mehta 1699e2cb1decSSalil Mehta if (proto != htons(ETH_P_8021Q)) 1700e2cb1decSSalil Mehta return -EPROTONOSUPPORT; 1701e2cb1decSSalil Mehta 1702b7b5d25bSGuojia Liao /* When device is resetting or reset failed, firmware is unable to 1703b7b5d25bSGuojia Liao * handle mailbox. Just record the vlan id, and remove it after 1704fe4144d4SJian Shen * reset finished. 1705fe4144d4SJian Shen */ 1706b7b5d25bSGuojia Liao if ((test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 1707b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) { 1708fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1709fe4144d4SJian Shen return -EBUSY; 1710fe4144d4SJian Shen } 1711fe4144d4SJian Shen 1712d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1713d3410018SYufeng Mo HCLGE_MBX_VLAN_FILTER); 1714d3410018SYufeng Mo send_msg.data[HCLGEVF_VLAN_MBX_IS_KILL_OFFSET] = is_kill; 1715d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_VLAN_ID_OFFSET], &vlan_id, 1716d3410018SYufeng Mo sizeof(vlan_id)); 1717d3410018SYufeng Mo memcpy(&send_msg.data[HCLGEVF_VLAN_MBX_PROTO_OFFSET], &proto, 1718d3410018SYufeng Mo sizeof(proto)); 171946ee7350SGuojia Liao /* when remove hw vlan filter failed, record the vlan id, 1720fe4144d4SJian Shen * and try to remove it from hw later, to be consistence 1721fe4144d4SJian Shen * with stack. 1722fe4144d4SJian Shen */ 1723d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1724fe4144d4SJian Shen if (is_kill && ret) 1725fe4144d4SJian Shen set_bit(vlan_id, hdev->vlan_del_fail_bmap); 1726fe4144d4SJian Shen 1727fe4144d4SJian Shen return ret; 1728fe4144d4SJian Shen } 1729fe4144d4SJian Shen 1730fe4144d4SJian Shen static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev) 1731fe4144d4SJian Shen { 1732fe4144d4SJian Shen #define HCLGEVF_MAX_SYNC_COUNT 60 1733fe4144d4SJian Shen struct hnae3_handle *handle = &hdev->nic; 1734fe4144d4SJian Shen int ret, sync_cnt = 0; 1735fe4144d4SJian Shen u16 vlan_id; 1736fe4144d4SJian Shen 1737fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1738fe4144d4SJian Shen while (vlan_id != VLAN_N_VID) { 1739fe4144d4SJian Shen ret = hclgevf_set_vlan_filter(handle, htons(ETH_P_8021Q), 1740fe4144d4SJian Shen vlan_id, true); 1741fe4144d4SJian Shen if (ret) 1742fe4144d4SJian Shen return; 1743fe4144d4SJian Shen 1744fe4144d4SJian Shen clear_bit(vlan_id, hdev->vlan_del_fail_bmap); 1745fe4144d4SJian Shen sync_cnt++; 1746fe4144d4SJian Shen if (sync_cnt >= HCLGEVF_MAX_SYNC_COUNT) 1747fe4144d4SJian Shen return; 1748fe4144d4SJian Shen 1749fe4144d4SJian Shen vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); 1750fe4144d4SJian Shen } 1751e2cb1decSSalil Mehta } 1752e2cb1decSSalil Mehta 1753b2641e2aSYunsheng Lin static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) 1754b2641e2aSYunsheng Lin { 1755b2641e2aSYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1756d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1757b2641e2aSYunsheng Lin 1758d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 1759d3410018SYufeng Mo HCLGE_MBX_VLAN_RX_OFF_CFG); 1760d3410018SYufeng Mo send_msg.data[0] = enable ? 1 : 0; 1761d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 1762b2641e2aSYunsheng Lin } 1763b2641e2aSYunsheng Lin 17648fa86551SYufeng Mo static int hclgevf_reset_tqp(struct hnae3_handle *handle) 1765e2cb1decSSalil Mehta { 17668fa86551SYufeng Mo #define HCLGEVF_RESET_ALL_QUEUE_DONE 1U 1767e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1768d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 17698fa86551SYufeng Mo u8 return_status = 0; 17701a426f8bSPeng Li int ret; 17718fa86551SYufeng Mo u16 i; 1772e2cb1decSSalil Mehta 17731a426f8bSPeng Li /* disable vf queue before send queue reset msg to PF */ 17748fa86551SYufeng Mo ret = hclgevf_tqp_enable(handle, false); 17758fa86551SYufeng Mo if (ret) { 17768fa86551SYufeng Mo dev_err(&hdev->pdev->dev, "failed to disable tqp, ret = %d\n", 17778fa86551SYufeng Mo ret); 17787fa6be4fSHuazhong Tan return ret; 17798fa86551SYufeng Mo } 17801a426f8bSPeng Li 1781d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 17828fa86551SYufeng Mo 17838fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, &return_status, 17848fa86551SYufeng Mo sizeof(return_status)); 17858fa86551SYufeng Mo if (ret || return_status == HCLGEVF_RESET_ALL_QUEUE_DONE) 17868fa86551SYufeng Mo return ret; 17878fa86551SYufeng Mo 17888fa86551SYufeng Mo for (i = 1; i < handle->kinfo.num_tqps; i++) { 17898fa86551SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_QUEUE_RESET, 0); 17908fa86551SYufeng Mo memcpy(send_msg.data, &i, sizeof(i)); 17918fa86551SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 17928fa86551SYufeng Mo if (ret) 17938fa86551SYufeng Mo return ret; 17948fa86551SYufeng Mo } 17958fa86551SYufeng Mo 17968fa86551SYufeng Mo return 0; 1797e2cb1decSSalil Mehta } 1798e2cb1decSSalil Mehta 1799818f1675SYunsheng Lin static int hclgevf_set_mtu(struct hnae3_handle *handle, int new_mtu) 1800818f1675SYunsheng Lin { 1801818f1675SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 1802d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 1803818f1675SYunsheng Lin 1804d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_MTU, 0); 1805d3410018SYufeng Mo memcpy(send_msg.data, &new_mtu, sizeof(new_mtu)); 1806d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1807818f1675SYunsheng Lin } 1808818f1675SYunsheng Lin 18096988eb2aSSalil Mehta static int hclgevf_notify_client(struct hclgevf_dev *hdev, 18106988eb2aSSalil Mehta enum hnae3_reset_notify_type type) 18116988eb2aSSalil Mehta { 18126988eb2aSSalil Mehta struct hnae3_client *client = hdev->nic_client; 18136988eb2aSSalil Mehta struct hnae3_handle *handle = &hdev->nic; 18146a5f6fa3SHuazhong Tan int ret; 18156988eb2aSSalil Mehta 181625d1817cSHuazhong Tan if (!test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state) || 181725d1817cSHuazhong Tan !client) 181825d1817cSHuazhong Tan return 0; 181925d1817cSHuazhong Tan 18206988eb2aSSalil Mehta if (!client->ops->reset_notify) 18216988eb2aSSalil Mehta return -EOPNOTSUPP; 18226988eb2aSSalil Mehta 18236a5f6fa3SHuazhong Tan ret = client->ops->reset_notify(handle, type); 18246a5f6fa3SHuazhong Tan if (ret) 18256a5f6fa3SHuazhong Tan dev_err(&hdev->pdev->dev, "notify nic client failed %d(%d)\n", 18266a5f6fa3SHuazhong Tan type, ret); 18276a5f6fa3SHuazhong Tan 18286a5f6fa3SHuazhong Tan return ret; 18296988eb2aSSalil Mehta } 18306988eb2aSSalil Mehta 1831fe735c84SHuazhong Tan static int hclgevf_notify_roce_client(struct hclgevf_dev *hdev, 1832fe735c84SHuazhong Tan enum hnae3_reset_notify_type type) 1833fe735c84SHuazhong Tan { 1834fe735c84SHuazhong Tan struct hnae3_client *client = hdev->roce_client; 1835fe735c84SHuazhong Tan struct hnae3_handle *handle = &hdev->roce; 1836fe735c84SHuazhong Tan int ret; 1837fe735c84SHuazhong Tan 1838fe735c84SHuazhong Tan if (!test_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state) || !client) 1839fe735c84SHuazhong Tan return 0; 1840fe735c84SHuazhong Tan 1841fe735c84SHuazhong Tan if (!client->ops->reset_notify) 1842fe735c84SHuazhong Tan return -EOPNOTSUPP; 1843fe735c84SHuazhong Tan 1844fe735c84SHuazhong Tan ret = client->ops->reset_notify(handle, type); 1845fe735c84SHuazhong Tan if (ret) 1846fe735c84SHuazhong Tan dev_err(&hdev->pdev->dev, "notify roce client failed %d(%d)", 1847fe735c84SHuazhong Tan type, ret); 1848fe735c84SHuazhong Tan return ret; 1849fe735c84SHuazhong Tan } 1850fe735c84SHuazhong Tan 18516988eb2aSSalil Mehta static int hclgevf_reset_wait(struct hclgevf_dev *hdev) 18526988eb2aSSalil Mehta { 1853aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_US 20000 1854aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_CNT 2000 1855aa5c4f17SHuazhong Tan #define HCLGEVF_RESET_WAIT_TIMEOUT_US \ 1856aa5c4f17SHuazhong Tan (HCLGEVF_RESET_WAIT_US * HCLGEVF_RESET_WAIT_CNT) 1857aa5c4f17SHuazhong Tan 1858aa5c4f17SHuazhong Tan u32 val; 1859aa5c4f17SHuazhong Tan int ret; 18606988eb2aSSalil Mehta 1861f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_RESET) 186272e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 186372e2fb07SHuazhong Tan HCLGEVF_VF_RST_ING, val, 186472e2fb07SHuazhong Tan !(val & HCLGEVF_VF_RST_ING_BIT), 186572e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_US, 186672e2fb07SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 186772e2fb07SHuazhong Tan else 186872e2fb07SHuazhong Tan ret = readl_poll_timeout(hdev->hw.io_base + 186972e2fb07SHuazhong Tan HCLGEVF_RST_ING, val, 1870aa5c4f17SHuazhong Tan !(val & HCLGEVF_RST_ING_BITS), 1871aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_US, 1872aa5c4f17SHuazhong Tan HCLGEVF_RESET_WAIT_TIMEOUT_US); 18736988eb2aSSalil Mehta 18746988eb2aSSalil Mehta /* hardware completion status should be available by this time */ 1875aa5c4f17SHuazhong Tan if (ret) { 1876aa5c4f17SHuazhong Tan dev_err(&hdev->pdev->dev, 18778912fd6aSColin Ian King "couldn't get reset done status from h/w, timeout!\n"); 1878aa5c4f17SHuazhong Tan return ret; 18796988eb2aSSalil Mehta } 18806988eb2aSSalil Mehta 18816988eb2aSSalil Mehta /* we will wait a bit more to let reset of the stack to complete. This 18826988eb2aSSalil Mehta * might happen in case reset assertion was made by PF. Yes, this also 18836988eb2aSSalil Mehta * means we might end up waiting bit more even for VF reset. 18846988eb2aSSalil Mehta */ 18856988eb2aSSalil Mehta msleep(5000); 18866988eb2aSSalil Mehta 18876988eb2aSSalil Mehta return 0; 18886988eb2aSSalil Mehta } 18896988eb2aSSalil Mehta 18906b428b4fSHuazhong Tan static void hclgevf_reset_handshake(struct hclgevf_dev *hdev, bool enable) 18916b428b4fSHuazhong Tan { 18926b428b4fSHuazhong Tan u32 reg_val; 18936b428b4fSHuazhong Tan 18946b428b4fSHuazhong Tan reg_val = hclgevf_read_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG); 18956b428b4fSHuazhong Tan if (enable) 18966b428b4fSHuazhong Tan reg_val |= HCLGEVF_NIC_SW_RST_RDY; 18976b428b4fSHuazhong Tan else 18986b428b4fSHuazhong Tan reg_val &= ~HCLGEVF_NIC_SW_RST_RDY; 18996b428b4fSHuazhong Tan 19006b428b4fSHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG, 19016b428b4fSHuazhong Tan reg_val); 19026b428b4fSHuazhong Tan } 19036b428b4fSHuazhong Tan 19046988eb2aSSalil Mehta static int hclgevf_reset_stack(struct hclgevf_dev *hdev) 19056988eb2aSSalil Mehta { 19067a01c897SSalil Mehta int ret; 19077a01c897SSalil Mehta 19086988eb2aSSalil Mehta /* uninitialize the nic client */ 19096a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT); 19106a5f6fa3SHuazhong Tan if (ret) 19116a5f6fa3SHuazhong Tan return ret; 19126988eb2aSSalil Mehta 19137a01c897SSalil Mehta /* re-initialize the hclge device */ 19149c6f7085SHuazhong Tan ret = hclgevf_reset_hdev(hdev); 19157a01c897SSalil Mehta if (ret) { 19167a01c897SSalil Mehta dev_err(&hdev->pdev->dev, 19177a01c897SSalil Mehta "hclge device re-init failed, VF is disabled!\n"); 19187a01c897SSalil Mehta return ret; 19197a01c897SSalil Mehta } 19206988eb2aSSalil Mehta 19216988eb2aSSalil Mehta /* bring up the nic client again */ 19226a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_INIT_CLIENT); 19236a5f6fa3SHuazhong Tan if (ret) 19246a5f6fa3SHuazhong Tan return ret; 19256988eb2aSSalil Mehta 19266b428b4fSHuazhong Tan /* clear handshake status with IMP */ 19276b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, false); 19286b428b4fSHuazhong Tan 19291cc9bc6eSHuazhong Tan /* bring up the nic to enable TX/RX again */ 19301cc9bc6eSHuazhong Tan return hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 19316988eb2aSSalil Mehta } 19326988eb2aSSalil Mehta 1933dea846e8SHuazhong Tan static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev) 1934dea846e8SHuazhong Tan { 1935ada13ee3SHuazhong Tan #define HCLGEVF_RESET_SYNC_TIME 100 1936ada13ee3SHuazhong Tan 1937f28368bbSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { 1938d41884eeSHuazhong Tan struct hclge_vf_to_pf_msg send_msg; 1939d41884eeSHuazhong Tan int ret; 1940d41884eeSHuazhong Tan 1941d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0); 1942d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); 1943cddd5648SHuazhong Tan if (ret) { 1944cddd5648SHuazhong Tan dev_err(&hdev->pdev->dev, 1945cddd5648SHuazhong Tan "failed to assert VF reset, ret = %d\n", ret); 1946cddd5648SHuazhong Tan return ret; 1947cddd5648SHuazhong Tan } 1948c88a6e7dSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt++; 1949dea846e8SHuazhong Tan } 1950dea846e8SHuazhong Tan 1951ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 1952ada13ee3SHuazhong Tan /* inform hardware that preparatory work is done */ 1953ada13ee3SHuazhong Tan msleep(HCLGEVF_RESET_SYNC_TIME); 19546b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1955d41884eeSHuazhong Tan dev_info(&hdev->pdev->dev, "prepare reset(%d) wait done\n", 1956d41884eeSHuazhong Tan hdev->reset_type); 1957dea846e8SHuazhong Tan 1958d41884eeSHuazhong Tan return 0; 1959dea846e8SHuazhong Tan } 1960dea846e8SHuazhong Tan 19613d77d0cbSHuazhong Tan static void hclgevf_dump_rst_info(struct hclgevf_dev *hdev) 19623d77d0cbSHuazhong Tan { 19633d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF function reset count: %u\n", 19643d77d0cbSHuazhong Tan hdev->rst_stats.vf_func_rst_cnt); 19653d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", 19663d77d0cbSHuazhong Tan hdev->rst_stats.flr_rst_cnt); 19673d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "VF reset count: %u\n", 19683d77d0cbSHuazhong Tan hdev->rst_stats.vf_rst_cnt); 19693d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset done count: %u\n", 19703d77d0cbSHuazhong Tan hdev->rst_stats.rst_done_cnt); 19713d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", 19723d77d0cbSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt); 19733d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset count: %u\n", 19743d77d0cbSHuazhong Tan hdev->rst_stats.rst_cnt); 19753d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "reset fail count: %u\n", 19763d77d0cbSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 19773d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", 19783d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_MISC_VECTOR_REG_BASE)); 19793d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt status: 0x%x\n", 19809cee2e8dSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_STATE_REG)); 19813d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", 19825a24b1fdSPeng Li hclgevf_read_dev(&hdev->hw, HCLGEVF_NIC_CSQ_DEPTH_REG)); 19833d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", 19843d77d0cbSHuazhong Tan hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING)); 19853d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); 19863d77d0cbSHuazhong Tan } 19873d77d0cbSHuazhong Tan 1988bbe6540eSHuazhong Tan static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev) 1989bbe6540eSHuazhong Tan { 19906b428b4fSHuazhong Tan /* recover handshake status with IMP when reset fail */ 19916b428b4fSHuazhong Tan hclgevf_reset_handshake(hdev, true); 1992bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt++; 1993adcf738bSGuojia Liao dev_err(&hdev->pdev->dev, "failed to reset VF(%u)\n", 1994bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt); 1995bbe6540eSHuazhong Tan 1996bbe6540eSHuazhong Tan if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT) 1997bbe6540eSHuazhong Tan set_bit(hdev->reset_type, &hdev->reset_pending); 1998bbe6540eSHuazhong Tan 1999bbe6540eSHuazhong Tan if (hclgevf_is_reset_pending(hdev)) { 2000bbe6540eSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2001bbe6540eSHuazhong Tan hclgevf_reset_task_schedule(hdev); 20023d77d0cbSHuazhong Tan } else { 2003d5432455SGuojia Liao set_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 20043d77d0cbSHuazhong Tan hclgevf_dump_rst_info(hdev); 2005bbe6540eSHuazhong Tan } 2006bbe6540eSHuazhong Tan } 2007bbe6540eSHuazhong Tan 20081cc9bc6eSHuazhong Tan static int hclgevf_reset_prepare(struct hclgevf_dev *hdev) 20096988eb2aSSalil Mehta { 20106988eb2aSSalil Mehta int ret; 20116988eb2aSSalil Mehta 2012c88a6e7dSHuazhong Tan hdev->rst_stats.rst_cnt++; 20136988eb2aSSalil Mehta 2014fe735c84SHuazhong Tan /* perform reset of the stack & ae device for a client */ 2015fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_DOWN_CLIENT); 2016fe735c84SHuazhong Tan if (ret) 2017fe735c84SHuazhong Tan return ret; 2018fe735c84SHuazhong Tan 20191cc9bc6eSHuazhong Tan rtnl_lock(); 20206988eb2aSSalil Mehta /* bring down the nic to stop any ongoing TX/RX */ 20216a5f6fa3SHuazhong Tan ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 202229118ab9SHuazhong Tan rtnl_unlock(); 20236a5f6fa3SHuazhong Tan if (ret) 20241cc9bc6eSHuazhong Tan return ret; 2025dea846e8SHuazhong Tan 20261cc9bc6eSHuazhong Tan return hclgevf_reset_prepare_wait(hdev); 20276988eb2aSSalil Mehta } 20286988eb2aSSalil Mehta 20291cc9bc6eSHuazhong Tan static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 20301cc9bc6eSHuazhong Tan { 20311cc9bc6eSHuazhong Tan int ret; 20321cc9bc6eSHuazhong Tan 2033c88a6e7dSHuazhong Tan hdev->rst_stats.hw_rst_done_cnt++; 2034fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UNINIT_CLIENT); 2035fe735c84SHuazhong Tan if (ret) 2036fe735c84SHuazhong Tan return ret; 2037c88a6e7dSHuazhong Tan 203829118ab9SHuazhong Tan rtnl_lock(); 20396988eb2aSSalil Mehta /* now, re-initialize the nic client and ae device */ 20406988eb2aSSalil Mehta ret = hclgevf_reset_stack(hdev); 20411cc9bc6eSHuazhong Tan rtnl_unlock(); 20426a5f6fa3SHuazhong Tan if (ret) { 20436988eb2aSSalil Mehta dev_err(&hdev->pdev->dev, "failed to reset VF stack\n"); 20441cc9bc6eSHuazhong Tan return ret; 20456a5f6fa3SHuazhong Tan } 20466988eb2aSSalil Mehta 2047fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_INIT_CLIENT); 2048fe735c84SHuazhong Tan /* ignore RoCE notify error if it fails HCLGEVF_RESET_MAX_FAIL_CNT - 1 2049fe735c84SHuazhong Tan * times 2050fe735c84SHuazhong Tan */ 2051fe735c84SHuazhong Tan if (ret && 2052fe735c84SHuazhong Tan hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT - 1) 2053fe735c84SHuazhong Tan return ret; 2054fe735c84SHuazhong Tan 2055fe735c84SHuazhong Tan ret = hclgevf_notify_roce_client(hdev, HNAE3_UP_CLIENT); 2056fe735c84SHuazhong Tan if (ret) 2057fe735c84SHuazhong Tan return ret; 2058fe735c84SHuazhong Tan 2059b644a8d4SHuazhong Tan hdev->last_reset_time = jiffies; 2060c88a6e7dSHuazhong Tan hdev->rst_stats.rst_done_cnt++; 2061bbe6540eSHuazhong Tan hdev->rst_stats.rst_fail_cnt = 0; 2062d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2063b644a8d4SHuazhong Tan 20641cc9bc6eSHuazhong Tan return 0; 20651cc9bc6eSHuazhong Tan } 20661cc9bc6eSHuazhong Tan 20671cc9bc6eSHuazhong Tan static void hclgevf_reset(struct hclgevf_dev *hdev) 20681cc9bc6eSHuazhong Tan { 20691cc9bc6eSHuazhong Tan if (hclgevf_reset_prepare(hdev)) 20701cc9bc6eSHuazhong Tan goto err_reset; 20711cc9bc6eSHuazhong Tan 20721cc9bc6eSHuazhong Tan /* check if VF could successfully fetch the hardware reset completion 20731cc9bc6eSHuazhong Tan * status from the hardware 20741cc9bc6eSHuazhong Tan */ 20751cc9bc6eSHuazhong Tan if (hclgevf_reset_wait(hdev)) { 20761cc9bc6eSHuazhong Tan /* can't do much in this situation, will disable VF */ 20771cc9bc6eSHuazhong Tan dev_err(&hdev->pdev->dev, 20781cc9bc6eSHuazhong Tan "failed to fetch H/W reset completion status\n"); 20791cc9bc6eSHuazhong Tan goto err_reset; 20801cc9bc6eSHuazhong Tan } 20811cc9bc6eSHuazhong Tan 20821cc9bc6eSHuazhong Tan if (hclgevf_reset_rebuild(hdev)) 20831cc9bc6eSHuazhong Tan goto err_reset; 20841cc9bc6eSHuazhong Tan 20851cc9bc6eSHuazhong Tan return; 20861cc9bc6eSHuazhong Tan 20876a5f6fa3SHuazhong Tan err_reset: 2088bbe6540eSHuazhong Tan hclgevf_reset_err_handle(hdev); 20896988eb2aSSalil Mehta } 20906988eb2aSSalil Mehta 2091720bd583SHuazhong Tan static enum hnae3_reset_type hclgevf_get_reset_level(struct hclgevf_dev *hdev, 2092720bd583SHuazhong Tan unsigned long *addr) 2093720bd583SHuazhong Tan { 2094720bd583SHuazhong Tan enum hnae3_reset_type rst_level = HNAE3_NONE_RESET; 2095720bd583SHuazhong Tan 2096dea846e8SHuazhong Tan /* return the highest priority reset level amongst all */ 2097b90fcc5bSHuazhong Tan if (test_bit(HNAE3_VF_RESET, addr)) { 2098b90fcc5bSHuazhong Tan rst_level = HNAE3_VF_RESET; 2099b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_RESET, addr); 2100b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2101b90fcc5bSHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2102b90fcc5bSHuazhong Tan } else if (test_bit(HNAE3_VF_FULL_RESET, addr)) { 2103dea846e8SHuazhong Tan rst_level = HNAE3_VF_FULL_RESET; 2104dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FULL_RESET, addr); 2105dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2106aa5c4f17SHuazhong Tan } else if (test_bit(HNAE3_VF_PF_FUNC_RESET, addr)) { 2107aa5c4f17SHuazhong Tan rst_level = HNAE3_VF_PF_FUNC_RESET; 2108aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_PF_FUNC_RESET, addr); 2109aa5c4f17SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 2110dea846e8SHuazhong Tan } else if (test_bit(HNAE3_VF_FUNC_RESET, addr)) { 2111dea846e8SHuazhong Tan rst_level = HNAE3_VF_FUNC_RESET; 2112dea846e8SHuazhong Tan clear_bit(HNAE3_VF_FUNC_RESET, addr); 21136ff3cf07SHuazhong Tan } else if (test_bit(HNAE3_FLR_RESET, addr)) { 21146ff3cf07SHuazhong Tan rst_level = HNAE3_FLR_RESET; 21156ff3cf07SHuazhong Tan clear_bit(HNAE3_FLR_RESET, addr); 2116720bd583SHuazhong Tan } 2117720bd583SHuazhong Tan 2118720bd583SHuazhong Tan return rst_level; 2119720bd583SHuazhong Tan } 2120720bd583SHuazhong Tan 21216ae4e733SShiju Jose static void hclgevf_reset_event(struct pci_dev *pdev, 21226ae4e733SShiju Jose struct hnae3_handle *handle) 21236d4c3981SSalil Mehta { 21246ff3cf07SHuazhong Tan struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); 21256ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 21266d4c3981SSalil Mehta 21276d4c3981SSalil Mehta dev_info(&hdev->pdev->dev, "received reset request from VF enet\n"); 21286d4c3981SSalil Mehta 21296ff3cf07SHuazhong Tan if (hdev->default_reset_request) 21300742ed7cSHuazhong Tan hdev->reset_level = 2131720bd583SHuazhong Tan hclgevf_get_reset_level(hdev, 2132720bd583SHuazhong Tan &hdev->default_reset_request); 2133720bd583SHuazhong Tan else 2134dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 21356d4c3981SSalil Mehta 2136436667d2SSalil Mehta /* reset of this VF requested */ 2137436667d2SSalil Mehta set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state); 2138436667d2SSalil Mehta hclgevf_reset_task_schedule(hdev); 21396d4c3981SSalil Mehta 21400742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 21416d4c3981SSalil Mehta } 21426d4c3981SSalil Mehta 2143720bd583SHuazhong Tan static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev, 2144720bd583SHuazhong Tan enum hnae3_reset_type rst_type) 2145720bd583SHuazhong Tan { 2146720bd583SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2147720bd583SHuazhong Tan 2148720bd583SHuazhong Tan set_bit(rst_type, &hdev->default_reset_request); 2149720bd583SHuazhong Tan } 2150720bd583SHuazhong Tan 2151f28368bbSHuazhong Tan static void hclgevf_enable_vector(struct hclgevf_misc_vector *vector, bool en) 2152f28368bbSHuazhong Tan { 2153f28368bbSHuazhong Tan writel(en ? 1 : 0, vector->addr); 2154f28368bbSHuazhong Tan } 2155f28368bbSHuazhong Tan 2156bb1890d5SJiaran Zhang static void hclgevf_reset_prepare_general(struct hnae3_ae_dev *ae_dev, 2157bb1890d5SJiaran Zhang enum hnae3_reset_type rst_type) 21586ff3cf07SHuazhong Tan { 2159bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_WAIT_MS 500 2160bb1890d5SJiaran Zhang #define HCLGEVF_RESET_RETRY_CNT 5 2161f28368bbSHuazhong Tan 21626ff3cf07SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2163f28368bbSHuazhong Tan int retry_cnt = 0; 2164f28368bbSHuazhong Tan int ret; 21656ff3cf07SHuazhong Tan 2166f28368bbSHuazhong Tan retry: 2167f28368bbSHuazhong Tan down(&hdev->reset_sem); 2168f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2169bb1890d5SJiaran Zhang hdev->reset_type = rst_type; 2170f28368bbSHuazhong Tan ret = hclgevf_reset_prepare(hdev); 2171f28368bbSHuazhong Tan if (ret) { 2172bb1890d5SJiaran Zhang dev_err(&hdev->pdev->dev, "fail to prepare to reset, ret=%d\n", 2173f28368bbSHuazhong Tan ret); 2174f28368bbSHuazhong Tan if (hdev->reset_pending || 2175bb1890d5SJiaran Zhang retry_cnt++ < HCLGEVF_RESET_RETRY_CNT) { 21766ff3cf07SHuazhong Tan dev_err(&hdev->pdev->dev, 2177f28368bbSHuazhong Tan "reset_pending:0x%lx, retry_cnt:%d\n", 2178f28368bbSHuazhong Tan hdev->reset_pending, retry_cnt); 2179f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2180f28368bbSHuazhong Tan up(&hdev->reset_sem); 2181bb1890d5SJiaran Zhang msleep(HCLGEVF_RESET_RETRY_WAIT_MS); 2182f28368bbSHuazhong Tan goto retry; 2183f28368bbSHuazhong Tan } 2184f28368bbSHuazhong Tan } 2185f28368bbSHuazhong Tan 2186bb1890d5SJiaran Zhang /* disable misc vector before reset done */ 2187f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, false); 2188bb1890d5SJiaran Zhang 2189bb1890d5SJiaran Zhang if (hdev->reset_type == HNAE3_FLR_RESET) 2190f28368bbSHuazhong Tan hdev->rst_stats.flr_rst_cnt++; 2191f28368bbSHuazhong Tan } 2192f28368bbSHuazhong Tan 2193bb1890d5SJiaran Zhang static void hclgevf_reset_done(struct hnae3_ae_dev *ae_dev) 2194f28368bbSHuazhong Tan { 2195f28368bbSHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 2196f28368bbSHuazhong Tan int ret; 2197f28368bbSHuazhong Tan 2198f28368bbSHuazhong Tan hclgevf_enable_vector(&hdev->misc_vector, true); 2199f28368bbSHuazhong Tan 2200f28368bbSHuazhong Tan ret = hclgevf_reset_rebuild(hdev); 2201f28368bbSHuazhong Tan if (ret) 2202f28368bbSHuazhong Tan dev_warn(&hdev->pdev->dev, "fail to rebuild, ret=%d\n", 2203f28368bbSHuazhong Tan ret); 2204f28368bbSHuazhong Tan 2205f28368bbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 2206f28368bbSHuazhong Tan clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2207f28368bbSHuazhong Tan up(&hdev->reset_sem); 22086ff3cf07SHuazhong Tan } 22096ff3cf07SHuazhong Tan 2210e2cb1decSSalil Mehta static u32 hclgevf_get_fw_version(struct hnae3_handle *handle) 2211e2cb1decSSalil Mehta { 2212e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2213e2cb1decSSalil Mehta 2214e2cb1decSSalil Mehta return hdev->fw_version; 2215e2cb1decSSalil Mehta } 2216e2cb1decSSalil Mehta 2217e2cb1decSSalil Mehta static void hclgevf_get_misc_vector(struct hclgevf_dev *hdev) 2218e2cb1decSSalil Mehta { 2219e2cb1decSSalil Mehta struct hclgevf_misc_vector *vector = &hdev->misc_vector; 2220e2cb1decSSalil Mehta 2221e2cb1decSSalil Mehta vector->vector_irq = pci_irq_vector(hdev->pdev, 2222e2cb1decSSalil Mehta HCLGEVF_MISC_VECTOR_NUM); 2223e2cb1decSSalil Mehta vector->addr = hdev->hw.io_base + HCLGEVF_MISC_VECTOR_REG_BASE; 2224e2cb1decSSalil Mehta /* vector status always valid for Vector 0 */ 2225e2cb1decSSalil Mehta hdev->vector_status[HCLGEVF_MISC_VECTOR_NUM] = 0; 2226e2cb1decSSalil Mehta hdev->vector_irq[HCLGEVF_MISC_VECTOR_NUM] = vector->vector_irq; 2227e2cb1decSSalil Mehta 2228e2cb1decSSalil Mehta hdev->num_msi_left -= 1; 2229e2cb1decSSalil Mehta hdev->num_msi_used += 1; 2230e2cb1decSSalil Mehta } 2231e2cb1decSSalil Mehta 223235a1e503SSalil Mehta void hclgevf_reset_task_schedule(struct hclgevf_dev *hdev) 223335a1e503SSalil Mehta { 2234ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2235ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, 2236ff200099SYunsheng Lin &hdev->state)) 22370ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 223835a1e503SSalil Mehta } 223935a1e503SSalil Mehta 224007a0556aSSalil Mehta void hclgevf_mbx_task_schedule(struct hclgevf_dev *hdev) 2241e2cb1decSSalil Mehta { 2242ff200099SYunsheng Lin if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2243ff200099SYunsheng Lin !test_and_set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, 2244ff200099SYunsheng Lin &hdev->state)) 22450ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); 224607a0556aSSalil Mehta } 2247e2cb1decSSalil Mehta 2248ff200099SYunsheng Lin static void hclgevf_task_schedule(struct hclgevf_dev *hdev, 2249ff200099SYunsheng Lin unsigned long delay) 2250e2cb1decSSalil Mehta { 2251d5432455SGuojia Liao if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && 2252d5432455SGuojia Liao !test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 22530ea68902SYunsheng Lin mod_delayed_work(hclgevf_wq, &hdev->service_task, delay); 2254e2cb1decSSalil Mehta } 2255e2cb1decSSalil Mehta 2256ff200099SYunsheng Lin static void hclgevf_reset_service_task(struct hclgevf_dev *hdev) 225735a1e503SSalil Mehta { 2258d6ad7c53SGuojia Liao #define HCLGEVF_MAX_RESET_ATTEMPTS_CNT 3 2259d6ad7c53SGuojia Liao 2260ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state)) 2261ff200099SYunsheng Lin return; 2262ff200099SYunsheng Lin 2263f28368bbSHuazhong Tan down(&hdev->reset_sem); 2264f28368bbSHuazhong Tan set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 226535a1e503SSalil Mehta 2266436667d2SSalil Mehta if (test_and_clear_bit(HCLGEVF_RESET_PENDING, 2267436667d2SSalil Mehta &hdev->reset_state)) { 2268cd7e963dSSalil Mehta /* PF has intimated that it is about to reset the hardware. 22699b2f3477SWeihang Li * We now have to poll & check if hardware has actually 22709b2f3477SWeihang Li * completed the reset sequence. On hardware reset completion, 22719b2f3477SWeihang Li * VF needs to reset the client and ae device. 227235a1e503SSalil Mehta */ 2273436667d2SSalil Mehta hdev->reset_attempts = 0; 2274436667d2SSalil Mehta 2275dea846e8SHuazhong Tan hdev->last_reset_time = jiffies; 2276*1385cc81SYufeng Mo hdev->reset_type = 2277*1385cc81SYufeng Mo hclgevf_get_reset_level(hdev, &hdev->reset_pending); 2278*1385cc81SYufeng Mo if (hdev->reset_type != HNAE3_NONE_RESET) 22791cc9bc6eSHuazhong Tan hclgevf_reset(hdev); 2280436667d2SSalil Mehta } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED, 2281436667d2SSalil Mehta &hdev->reset_state)) { 2282436667d2SSalil Mehta /* we could be here when either of below happens: 22839b2f3477SWeihang Li * 1. reset was initiated due to watchdog timeout caused by 2284436667d2SSalil Mehta * a. IMP was earlier reset and our TX got choked down and 2285436667d2SSalil Mehta * which resulted in watchdog reacting and inducing VF 2286436667d2SSalil Mehta * reset. This also means our cmdq would be unreliable. 2287436667d2SSalil Mehta * b. problem in TX due to other lower layer(example link 2288436667d2SSalil Mehta * layer not functioning properly etc.) 2289436667d2SSalil Mehta * 2. VF reset might have been initiated due to some config 2290436667d2SSalil Mehta * change. 2291436667d2SSalil Mehta * 2292436667d2SSalil Mehta * NOTE: Theres no clear way to detect above cases than to react 2293436667d2SSalil Mehta * to the response of PF for this reset request. PF will ack the 2294436667d2SSalil Mehta * 1b and 2. cases but we will not get any intimation about 1a 2295436667d2SSalil Mehta * from PF as cmdq would be in unreliable state i.e. mailbox 2296436667d2SSalil Mehta * communication between PF and VF would be broken. 229746ee7350SGuojia Liao * 229846ee7350SGuojia Liao * if we are never geting into pending state it means either: 2299436667d2SSalil Mehta * 1. PF is not receiving our request which could be due to IMP 2300436667d2SSalil Mehta * reset 2301436667d2SSalil Mehta * 2. PF is screwed 2302436667d2SSalil Mehta * We cannot do much for 2. but to check first we can try reset 2303436667d2SSalil Mehta * our PCIe + stack and see if it alleviates the problem. 2304436667d2SSalil Mehta */ 2305d6ad7c53SGuojia Liao if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) { 2306436667d2SSalil Mehta /* prepare for full reset of stack + pcie interface */ 2307dea846e8SHuazhong Tan set_bit(HNAE3_VF_FULL_RESET, &hdev->reset_pending); 2308436667d2SSalil Mehta 2309436667d2SSalil Mehta /* "defer" schedule the reset task again */ 2310436667d2SSalil Mehta set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2311436667d2SSalil Mehta } else { 2312436667d2SSalil Mehta hdev->reset_attempts++; 2313436667d2SSalil Mehta 2314dea846e8SHuazhong Tan set_bit(hdev->reset_level, &hdev->reset_pending); 2315dea846e8SHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2316436667d2SSalil Mehta } 2317dea846e8SHuazhong Tan hclgevf_reset_task_schedule(hdev); 2318436667d2SSalil Mehta } 231935a1e503SSalil Mehta 2320afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 232135a1e503SSalil Mehta clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 2322f28368bbSHuazhong Tan up(&hdev->reset_sem); 232335a1e503SSalil Mehta } 232435a1e503SSalil Mehta 2325ff200099SYunsheng Lin static void hclgevf_mailbox_service_task(struct hclgevf_dev *hdev) 2326e2cb1decSSalil Mehta { 2327ff200099SYunsheng Lin if (!test_and_clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state)) 2328ff200099SYunsheng Lin return; 2329e2cb1decSSalil Mehta 2330e2cb1decSSalil Mehta if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state)) 2331e2cb1decSSalil Mehta return; 2332e2cb1decSSalil Mehta 233307a0556aSSalil Mehta hclgevf_mbx_async_handler(hdev); 2334e2cb1decSSalil Mehta 2335e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2336e2cb1decSSalil Mehta } 2337e2cb1decSSalil Mehta 2338ff200099SYunsheng Lin static void hclgevf_keep_alive(struct hclgevf_dev *hdev) 2339a6d818e3SYunsheng Lin { 2340d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2341a6d818e3SYunsheng Lin int ret; 2342a6d818e3SYunsheng Lin 23431416d333SHuazhong Tan if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) 2344c59a85c0SJian Shen return; 2345c59a85c0SJian Shen 2346d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_KEEP_ALIVE, 0); 2347d3410018SYufeng Mo ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2348a6d818e3SYunsheng Lin if (ret) 2349a6d818e3SYunsheng Lin dev_err(&hdev->pdev->dev, 2350a6d818e3SYunsheng Lin "VF sends keep alive cmd failed(=%d)\n", ret); 2351a6d818e3SYunsheng Lin } 2352a6d818e3SYunsheng Lin 2353ff200099SYunsheng Lin static void hclgevf_periodic_service_task(struct hclgevf_dev *hdev) 2354e2cb1decSSalil Mehta { 2355ff200099SYunsheng Lin unsigned long delta = round_jiffies_relative(HZ); 2356ff200099SYunsheng Lin struct hnae3_handle *handle = &hdev->nic; 2357e2cb1decSSalil Mehta 2358e6394363SGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) 2359e6394363SGuangbin Huang return; 2360e6394363SGuangbin Huang 2361ff200099SYunsheng Lin if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) { 2362ff200099SYunsheng Lin delta = jiffies - hdev->last_serv_processed; 2363db01afebSliuzhongzhu 2364ff200099SYunsheng Lin if (delta < round_jiffies_relative(HZ)) { 2365ff200099SYunsheng Lin delta = round_jiffies_relative(HZ) - delta; 2366ff200099SYunsheng Lin goto out; 2367db01afebSliuzhongzhu } 2368ff200099SYunsheng Lin } 2369ff200099SYunsheng Lin 2370ff200099SYunsheng Lin hdev->serv_processed_cnt++; 2371ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_KEEP_ALIVE_TASK_INTERVAL)) 2372ff200099SYunsheng Lin hclgevf_keep_alive(hdev); 2373ff200099SYunsheng Lin 2374ff200099SYunsheng Lin if (test_bit(HCLGEVF_STATE_DOWN, &hdev->state)) { 2375ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2376ff200099SYunsheng Lin goto out; 2377ff200099SYunsheng Lin } 2378ff200099SYunsheng Lin 2379ff200099SYunsheng Lin if (!(hdev->serv_processed_cnt % HCLGEVF_STATS_TIMER_INTERVAL)) 2380ff200099SYunsheng Lin hclgevf_tqps_update_stats(handle); 2381e2cb1decSSalil Mehta 238201305e16SGuangbin Huang /* VF does not need to request link status when this bit is set, because 238301305e16SGuangbin Huang * PF will push its link status to VFs when link status changed. 2384e2cb1decSSalil Mehta */ 238501305e16SGuangbin Huang if (!test_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state)) 2386e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2387e2cb1decSSalil Mehta 23889194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 23899194d18bSliuzhongzhu 2390fe4144d4SJian Shen hclgevf_sync_vlan_filter(hdev); 2391fe4144d4SJian Shen 2392ee4bcd3bSJian Shen hclgevf_sync_mac_table(hdev); 2393ee4bcd3bSJian Shen 2394c631c696SJian Shen hclgevf_sync_promisc_mode(hdev); 2395c631c696SJian Shen 2396ff200099SYunsheng Lin hdev->last_serv_processed = jiffies; 2397436667d2SSalil Mehta 2398ff200099SYunsheng Lin out: 2399ff200099SYunsheng Lin hclgevf_task_schedule(hdev, delta); 2400ff200099SYunsheng Lin } 2401b3c3fe8eSYunsheng Lin 2402ff200099SYunsheng Lin static void hclgevf_service_task(struct work_struct *work) 2403ff200099SYunsheng Lin { 2404ff200099SYunsheng Lin struct hclgevf_dev *hdev = container_of(work, struct hclgevf_dev, 2405ff200099SYunsheng Lin service_task.work); 2406ff200099SYunsheng Lin 2407ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2408ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2409ff200099SYunsheng Lin hclgevf_periodic_service_task(hdev); 2410ff200099SYunsheng Lin 2411ff200099SYunsheng Lin /* Handle reset and mbx again in case periodical task delays the 2412ff200099SYunsheng Lin * handling by calling hclgevf_task_schedule() in 2413ff200099SYunsheng Lin * hclgevf_periodic_service_task() 2414ff200099SYunsheng Lin */ 2415ff200099SYunsheng Lin hclgevf_reset_service_task(hdev); 2416ff200099SYunsheng Lin hclgevf_mailbox_service_task(hdev); 2417e2cb1decSSalil Mehta } 2418e2cb1decSSalil Mehta 2419e2cb1decSSalil Mehta static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr) 2420e2cb1decSSalil Mehta { 2421e2cb1decSSalil Mehta hclgevf_write_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_SRC_REG, regclr); 2422e2cb1decSSalil Mehta } 2423e2cb1decSSalil Mehta 2424b90fcc5bSHuazhong Tan static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, 2425b90fcc5bSHuazhong Tan u32 *clearval) 2426e2cb1decSSalil Mehta { 242713050921SHuazhong Tan u32 val, cmdq_stat_reg, rst_ing_reg; 2428e2cb1decSSalil Mehta 2429e2cb1decSSalil Mehta /* fetch the events from their corresponding regs */ 243013050921SHuazhong Tan cmdq_stat_reg = hclgevf_read_dev(&hdev->hw, 24319cee2e8dSHuazhong Tan HCLGEVF_VECTOR0_CMDQ_STATE_REG); 243213050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RST_INT_B) & cmdq_stat_reg) { 2433b90fcc5bSHuazhong Tan rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 2434b90fcc5bSHuazhong Tan dev_info(&hdev->pdev->dev, 2435b90fcc5bSHuazhong Tan "receive reset interrupt 0x%x!\n", rst_ing_reg); 2436b90fcc5bSHuazhong Tan set_bit(HNAE3_VF_RESET, &hdev->reset_pending); 2437b90fcc5bSHuazhong Tan set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); 2438ef5f8e50SHuazhong Tan set_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 243913050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RST_INT_B); 2440c88a6e7dSHuazhong Tan hdev->rst_stats.vf_rst_cnt++; 244172e2fb07SHuazhong Tan /* set up VF hardware reset status, its PF will clear 244272e2fb07SHuazhong Tan * this status when PF has initialized done. 244372e2fb07SHuazhong Tan */ 244472e2fb07SHuazhong Tan val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); 244572e2fb07SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, 244672e2fb07SHuazhong Tan val | HCLGEVF_VF_RST_ING_BIT); 2447b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_RST; 2448b90fcc5bSHuazhong Tan } 2449b90fcc5bSHuazhong Tan 2450e2cb1decSSalil Mehta /* check for vector0 mailbox(=CMDQ RX) event source */ 245113050921SHuazhong Tan if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) { 245213050921SHuazhong Tan /* for revision 0x21, clearing interrupt is writing bit 0 245313050921SHuazhong Tan * to the clear register, writing bit 1 means to keep the 245413050921SHuazhong Tan * old value. 245513050921SHuazhong Tan * for revision 0x20, the clear register is a read & write 245613050921SHuazhong Tan * register, so we should just write 0 to the bit we are 245713050921SHuazhong Tan * handling, and keep other bits as cmdq_stat_reg. 245813050921SHuazhong Tan */ 2459295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) 246013050921SHuazhong Tan *clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 246113050921SHuazhong Tan else 246213050921SHuazhong Tan *clearval = cmdq_stat_reg & 246313050921SHuazhong Tan ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B); 246413050921SHuazhong Tan 2465b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_MBX; 2466e2cb1decSSalil Mehta } 2467e2cb1decSSalil Mehta 2468e45afb39SHuazhong Tan /* print other vector0 event source */ 2469e45afb39SHuazhong Tan dev_info(&hdev->pdev->dev, 2470e45afb39SHuazhong Tan "vector 0 interrupt from unknown source, cmdq_src = %#x\n", 2471e45afb39SHuazhong Tan cmdq_stat_reg); 2472e2cb1decSSalil Mehta 2473b90fcc5bSHuazhong Tan return HCLGEVF_VECTOR0_EVENT_OTHER; 2474e2cb1decSSalil Mehta } 2475e2cb1decSSalil Mehta 2476e2cb1decSSalil Mehta static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) 2477e2cb1decSSalil Mehta { 2478b90fcc5bSHuazhong Tan enum hclgevf_evt_cause event_cause; 2479e2cb1decSSalil Mehta struct hclgevf_dev *hdev = data; 2480e2cb1decSSalil Mehta u32 clearval; 2481e2cb1decSSalil Mehta 2482e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 2483b90fcc5bSHuazhong Tan event_cause = hclgevf_check_evt_cause(hdev, &clearval); 2484427900d2SJiaran Zhang if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) 2485427900d2SJiaran Zhang hclgevf_clear_event_cause(hdev, clearval); 2486e2cb1decSSalil Mehta 2487b90fcc5bSHuazhong Tan switch (event_cause) { 2488b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_RST: 2489b90fcc5bSHuazhong Tan hclgevf_reset_task_schedule(hdev); 2490b90fcc5bSHuazhong Tan break; 2491b90fcc5bSHuazhong Tan case HCLGEVF_VECTOR0_EVENT_MBX: 249207a0556aSSalil Mehta hclgevf_mbx_handler(hdev); 2493b90fcc5bSHuazhong Tan break; 2494b90fcc5bSHuazhong Tan default: 2495b90fcc5bSHuazhong Tan break; 2496b90fcc5bSHuazhong Tan } 2497e2cb1decSSalil Mehta 2498427900d2SJiaran Zhang if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) 2499e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2500e2cb1decSSalil Mehta 2501e2cb1decSSalil Mehta return IRQ_HANDLED; 2502e2cb1decSSalil Mehta } 2503e2cb1decSSalil Mehta 2504e2cb1decSSalil Mehta static int hclgevf_configure(struct hclgevf_dev *hdev) 2505e2cb1decSSalil Mehta { 2506e2cb1decSSalil Mehta int ret; 2507e2cb1decSSalil Mehta 25083462207dSYufeng Mo hdev->gro_en = true; 25093462207dSYufeng Mo 251032e6d104SJian Shen ret = hclgevf_get_basic_info(hdev); 251132e6d104SJian Shen if (ret) 251232e6d104SJian Shen return ret; 251332e6d104SJian Shen 251492f11ea1SJian Shen /* get current port based vlan state from PF */ 251592f11ea1SJian Shen ret = hclgevf_get_port_base_vlan_filter_state(hdev); 251692f11ea1SJian Shen if (ret) 251792f11ea1SJian Shen return ret; 251892f11ea1SJian Shen 2519e2cb1decSSalil Mehta /* get queue configuration from PF */ 25206cee6fc3SJian Shen ret = hclgevf_get_queue_info(hdev); 2521e2cb1decSSalil Mehta if (ret) 2522e2cb1decSSalil Mehta return ret; 2523c0425944SPeng Li 2524c0425944SPeng Li /* get queue depth info from PF */ 2525c0425944SPeng Li ret = hclgevf_get_queue_depth(hdev); 2526c0425944SPeng Li if (ret) 2527c0425944SPeng Li return ret; 2528c0425944SPeng Li 252932e6d104SJian Shen return hclgevf_get_pf_media_type(hdev); 2530e2cb1decSSalil Mehta } 2531e2cb1decSSalil Mehta 25327a01c897SSalil Mehta static int hclgevf_alloc_hdev(struct hnae3_ae_dev *ae_dev) 25337a01c897SSalil Mehta { 25347a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 25351154bb26SPeng Li struct hclgevf_dev *hdev; 25367a01c897SSalil Mehta 25377a01c897SSalil Mehta hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL); 25387a01c897SSalil Mehta if (!hdev) 25397a01c897SSalil Mehta return -ENOMEM; 25407a01c897SSalil Mehta 25417a01c897SSalil Mehta hdev->pdev = pdev; 25427a01c897SSalil Mehta hdev->ae_dev = ae_dev; 25437a01c897SSalil Mehta ae_dev->priv = hdev; 25447a01c897SSalil Mehta 25457a01c897SSalil Mehta return 0; 25467a01c897SSalil Mehta } 25477a01c897SSalil Mehta 2548e2cb1decSSalil Mehta static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev) 2549e2cb1decSSalil Mehta { 2550e2cb1decSSalil Mehta struct hnae3_handle *roce = &hdev->roce; 2551e2cb1decSSalil Mehta struct hnae3_handle *nic = &hdev->nic; 2552e2cb1decSSalil Mehta 255307acf909SJian Shen roce->rinfo.num_vectors = hdev->num_roce_msix; 2554e2cb1decSSalil Mehta 2555e2cb1decSSalil Mehta if (hdev->num_msi_left < roce->rinfo.num_vectors || 2556e2cb1decSSalil Mehta hdev->num_msi_left == 0) 2557e2cb1decSSalil Mehta return -EINVAL; 2558e2cb1decSSalil Mehta 255907acf909SJian Shen roce->rinfo.base_vector = hdev->roce_base_vector; 2560e2cb1decSSalil Mehta 2561e2cb1decSSalil Mehta roce->rinfo.netdev = nic->kinfo.netdev; 2562e2cb1decSSalil Mehta roce->rinfo.roce_io_base = hdev->hw.io_base; 256330ae7f8aSHuazhong Tan roce->rinfo.roce_mem_base = hdev->hw.mem_base; 2564e2cb1decSSalil Mehta 2565e2cb1decSSalil Mehta roce->pdev = nic->pdev; 2566e2cb1decSSalil Mehta roce->ae_algo = nic->ae_algo; 2567e2cb1decSSalil Mehta roce->numa_node_mask = nic->numa_node_mask; 2568e2cb1decSSalil Mehta 2569e2cb1decSSalil Mehta return 0; 2570e2cb1decSSalil Mehta } 2571e2cb1decSSalil Mehta 25723462207dSYufeng Mo static int hclgevf_config_gro(struct hclgevf_dev *hdev) 2573b26a6feaSPeng Li { 2574b26a6feaSPeng Li struct hclgevf_cfg_gro_status_cmd *req; 2575b26a6feaSPeng Li struct hclgevf_desc desc; 2576b26a6feaSPeng Li int ret; 2577b26a6feaSPeng Li 2578b26a6feaSPeng Li if (!hnae3_dev_gro_supported(hdev)) 2579b26a6feaSPeng Li return 0; 2580b26a6feaSPeng Li 2581b26a6feaSPeng Li hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_GRO_GENERIC_CONFIG, 2582b26a6feaSPeng Li false); 2583b26a6feaSPeng Li req = (struct hclgevf_cfg_gro_status_cmd *)desc.data; 2584b26a6feaSPeng Li 25853462207dSYufeng Mo req->gro_en = hdev->gro_en ? 1 : 0; 2586b26a6feaSPeng Li 2587b26a6feaSPeng Li ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 2588b26a6feaSPeng Li if (ret) 2589b26a6feaSPeng Li dev_err(&hdev->pdev->dev, 2590b26a6feaSPeng Li "VF GRO hardware config cmd failed, ret = %d.\n", ret); 2591b26a6feaSPeng Li 2592b26a6feaSPeng Li return ret; 2593b26a6feaSPeng Li } 2594b26a6feaSPeng Li 259587ce161eSGuangbin Huang static int hclgevf_rss_init_cfg(struct hclgevf_dev *hdev) 2596e2cb1decSSalil Mehta { 259787ce161eSGuangbin Huang u16 rss_ind_tbl_size = hdev->ae_dev->dev_specs.rss_ind_tbl_size; 2598e2cb1decSSalil Mehta struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2599944de484SGuojia Liao struct hclgevf_rss_tuple_cfg *tuple_sets; 26004093d1a2SGuangbin Huang u32 i; 2601e2cb1decSSalil Mehta 2602944de484SGuojia Liao rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_TOEPLITZ; 26034093d1a2SGuangbin Huang rss_cfg->rss_size = hdev->nic.kinfo.rss_size; 2604944de484SGuojia Liao tuple_sets = &rss_cfg->rss_tuple_sets; 2605295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 260687ce161eSGuangbin Huang u8 *rss_ind_tbl; 260787ce161eSGuangbin Huang 2608472d7eceSJian Shen rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_SIMPLE; 260987ce161eSGuangbin Huang 261087ce161eSGuangbin Huang rss_ind_tbl = devm_kcalloc(&hdev->pdev->dev, rss_ind_tbl_size, 261187ce161eSGuangbin Huang sizeof(*rss_ind_tbl), GFP_KERNEL); 261287ce161eSGuangbin Huang if (!rss_ind_tbl) 261387ce161eSGuangbin Huang return -ENOMEM; 261487ce161eSGuangbin Huang 261587ce161eSGuangbin Huang rss_cfg->rss_indirection_tbl = rss_ind_tbl; 2616472d7eceSJian Shen memcpy(rss_cfg->rss_hash_key, hclgevf_hash_key, 2617374ad291SJian Shen HCLGEVF_RSS_KEY_SIZE); 2618374ad291SJian Shen 2619944de484SGuojia Liao tuple_sets->ipv4_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2620944de484SGuojia Liao tuple_sets->ipv4_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2621944de484SGuojia Liao tuple_sets->ipv4_sctp_en = HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2622944de484SGuojia Liao tuple_sets->ipv4_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2623944de484SGuojia Liao tuple_sets->ipv6_tcp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2624944de484SGuojia Liao tuple_sets->ipv6_udp_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2625ab6e32d2SJian Shen tuple_sets->ipv6_sctp_en = 2626ab6e32d2SJian Shen hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 ? 2627ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP_NO_PORT : 2628ab6e32d2SJian Shen HCLGEVF_RSS_INPUT_TUPLE_SCTP; 2629944de484SGuojia Liao tuple_sets->ipv6_fragment_en = HCLGEVF_RSS_INPUT_TUPLE_OTHER; 2630374ad291SJian Shen } 2631374ad291SJian Shen 26329b2f3477SWeihang Li /* Initialize RSS indirect table */ 263387ce161eSGuangbin Huang for (i = 0; i < rss_ind_tbl_size; i++) 26344093d1a2SGuangbin Huang rss_cfg->rss_indirection_tbl[i] = i % rss_cfg->rss_size; 263587ce161eSGuangbin Huang 263687ce161eSGuangbin Huang return 0; 2637944de484SGuojia Liao } 2638944de484SGuojia Liao 2639944de484SGuojia Liao static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) 2640944de484SGuojia Liao { 2641944de484SGuojia Liao struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; 2642944de484SGuojia Liao int ret; 2643944de484SGuojia Liao 2644295ba232SGuangbin Huang if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { 2645944de484SGuojia Liao ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo, 2646944de484SGuojia Liao rss_cfg->rss_hash_key); 2647944de484SGuojia Liao if (ret) 2648944de484SGuojia Liao return ret; 2649944de484SGuojia Liao 2650944de484SGuojia Liao ret = hclgevf_set_rss_input_tuple(hdev, rss_cfg); 2651944de484SGuojia Liao if (ret) 2652944de484SGuojia Liao return ret; 2653944de484SGuojia Liao } 2654e2cb1decSSalil Mehta 2655e2cb1decSSalil Mehta ret = hclgevf_set_rss_indir_table(hdev); 2656e2cb1decSSalil Mehta if (ret) 2657e2cb1decSSalil Mehta return ret; 2658e2cb1decSSalil Mehta 26594093d1a2SGuangbin Huang return hclgevf_set_rss_tc_mode(hdev, rss_cfg->rss_size); 2660e2cb1decSSalil Mehta } 2661e2cb1decSSalil Mehta 2662e2cb1decSSalil Mehta static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev) 2663e2cb1decSSalil Mehta { 2664bbfd4506SJian Shen struct hnae3_handle *nic = &hdev->nic; 2665bbfd4506SJian Shen int ret; 2666bbfd4506SJian Shen 2667bbfd4506SJian Shen ret = hclgevf_en_hw_strip_rxvtag(nic, true); 2668bbfd4506SJian Shen if (ret) { 2669bbfd4506SJian Shen dev_err(&hdev->pdev->dev, 2670bbfd4506SJian Shen "failed to enable rx vlan offload, ret = %d\n", ret); 2671bbfd4506SJian Shen return ret; 2672bbfd4506SJian Shen } 2673bbfd4506SJian Shen 2674e2cb1decSSalil Mehta return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0, 2675e2cb1decSSalil Mehta false); 2676e2cb1decSSalil Mehta } 2677e2cb1decSSalil Mehta 2678ff200099SYunsheng Lin static void hclgevf_flush_link_update(struct hclgevf_dev *hdev) 2679ff200099SYunsheng Lin { 2680ff200099SYunsheng Lin #define HCLGEVF_FLUSH_LINK_TIMEOUT 100000 2681ff200099SYunsheng Lin 2682ff200099SYunsheng Lin unsigned long last = hdev->serv_processed_cnt; 2683ff200099SYunsheng Lin int i = 0; 2684ff200099SYunsheng Lin 2685ff200099SYunsheng Lin while (test_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state) && 2686ff200099SYunsheng Lin i++ < HCLGEVF_FLUSH_LINK_TIMEOUT && 2687ff200099SYunsheng Lin last == hdev->serv_processed_cnt) 2688ff200099SYunsheng Lin usleep_range(1, 1); 2689ff200099SYunsheng Lin } 2690ff200099SYunsheng Lin 26918cdb992fSJian Shen static void hclgevf_set_timer_task(struct hnae3_handle *handle, bool enable) 26928cdb992fSJian Shen { 26938cdb992fSJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 26948cdb992fSJian Shen 26958cdb992fSJian Shen if (enable) { 2696ff200099SYunsheng Lin hclgevf_task_schedule(hdev, 0); 26978cdb992fSJian Shen } else { 2698b3c3fe8eSYunsheng Lin set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2699ff200099SYunsheng Lin 2700ff200099SYunsheng Lin /* flush memory to make sure DOWN is seen by service task */ 2701ff200099SYunsheng Lin smp_mb__before_atomic(); 2702ff200099SYunsheng Lin hclgevf_flush_link_update(hdev); 27038cdb992fSJian Shen } 27048cdb992fSJian Shen } 27058cdb992fSJian Shen 2706e2cb1decSSalil Mehta static int hclgevf_ae_start(struct hnae3_handle *handle) 2707e2cb1decSSalil Mehta { 2708e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2709e2cb1decSSalil Mehta 2710ed7bedd2SGuangbin Huang clear_bit(HCLGEVF_STATE_DOWN, &hdev->state); 271101305e16SGuangbin Huang clear_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state); 2712ed7bedd2SGuangbin Huang 2713e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 2714e2cb1decSSalil Mehta 2715e2cb1decSSalil Mehta hclgevf_request_link_info(hdev); 2716e2cb1decSSalil Mehta 27179194d18bSliuzhongzhu hclgevf_update_link_mode(hdev); 27189194d18bSliuzhongzhu 2719e2cb1decSSalil Mehta return 0; 2720e2cb1decSSalil Mehta } 2721e2cb1decSSalil Mehta 2722e2cb1decSSalil Mehta static void hclgevf_ae_stop(struct hnae3_handle *handle) 2723e2cb1decSSalil Mehta { 2724e2cb1decSSalil Mehta struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2725e2cb1decSSalil Mehta 27262f7e4896SFuyun Liang set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 27272f7e4896SFuyun Liang 2728146e92c1SHuazhong Tan if (hdev->reset_type != HNAE3_VF_RESET) 27298fa86551SYufeng Mo hclgevf_reset_tqp(handle); 273039cfbc9cSHuazhong Tan 2731e2cb1decSSalil Mehta hclgevf_reset_tqp_stats(handle); 27328cc6c1f7SFuyun Liang hclgevf_update_link_status(hdev, 0); 2733e2cb1decSSalil Mehta } 2734e2cb1decSSalil Mehta 2735a6d818e3SYunsheng Lin static int hclgevf_set_alive(struct hnae3_handle *handle, bool alive) 2736a6d818e3SYunsheng Lin { 2737d3410018SYufeng Mo #define HCLGEVF_STATE_ALIVE 1 2738d3410018SYufeng Mo #define HCLGEVF_STATE_NOT_ALIVE 0 2739a6d818e3SYunsheng Lin 2740d3410018SYufeng Mo struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2741d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 2742d3410018SYufeng Mo 2743d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_ALIVE, 0); 2744d3410018SYufeng Mo send_msg.data[0] = alive ? HCLGEVF_STATE_ALIVE : 2745d3410018SYufeng Mo HCLGEVF_STATE_NOT_ALIVE; 2746d3410018SYufeng Mo return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 2747a6d818e3SYunsheng Lin } 2748a6d818e3SYunsheng Lin 2749a6d818e3SYunsheng Lin static int hclgevf_client_start(struct hnae3_handle *handle) 2750a6d818e3SYunsheng Lin { 2751f621df96SQinglang Miao return hclgevf_set_alive(handle, true); 2752a6d818e3SYunsheng Lin } 2753a6d818e3SYunsheng Lin 2754a6d818e3SYunsheng Lin static void hclgevf_client_stop(struct hnae3_handle *handle) 2755a6d818e3SYunsheng Lin { 2756a6d818e3SYunsheng Lin struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 2757a6d818e3SYunsheng Lin int ret; 2758a6d818e3SYunsheng Lin 2759a6d818e3SYunsheng Lin ret = hclgevf_set_alive(handle, false); 2760a6d818e3SYunsheng Lin if (ret) 2761a6d818e3SYunsheng Lin dev_warn(&hdev->pdev->dev, 2762a6d818e3SYunsheng Lin "%s failed %d\n", __func__, ret); 2763a6d818e3SYunsheng Lin } 2764a6d818e3SYunsheng Lin 2765e2cb1decSSalil Mehta static void hclgevf_state_init(struct hclgevf_dev *hdev) 2766e2cb1decSSalil Mehta { 2767e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state); 2768e2cb1decSSalil Mehta clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); 2769d5432455SGuojia Liao clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); 2770e2cb1decSSalil Mehta 2771b3c3fe8eSYunsheng Lin INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task); 277235a1e503SSalil Mehta 2773e2cb1decSSalil Mehta mutex_init(&hdev->mbx_resp.mbx_mutex); 2774f28368bbSHuazhong Tan sema_init(&hdev->reset_sem, 1); 2775e2cb1decSSalil Mehta 2776ee4bcd3bSJian Shen spin_lock_init(&hdev->mac_table.mac_list_lock); 2777ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.uc_mac_list); 2778ee4bcd3bSJian Shen INIT_LIST_HEAD(&hdev->mac_table.mc_mac_list); 2779ee4bcd3bSJian Shen 2780e2cb1decSSalil Mehta /* bring the device down */ 2781e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2782e2cb1decSSalil Mehta } 2783e2cb1decSSalil Mehta 2784e2cb1decSSalil Mehta static void hclgevf_state_uninit(struct hclgevf_dev *hdev) 2785e2cb1decSSalil Mehta { 2786e2cb1decSSalil Mehta set_bit(HCLGEVF_STATE_DOWN, &hdev->state); 2787acfc3d55SHuazhong Tan set_bit(HCLGEVF_STATE_REMOVING, &hdev->state); 2788e2cb1decSSalil Mehta 2789b3c3fe8eSYunsheng Lin if (hdev->service_task.work.func) 2790b3c3fe8eSYunsheng Lin cancel_delayed_work_sync(&hdev->service_task); 2791e2cb1decSSalil Mehta 2792e2cb1decSSalil Mehta mutex_destroy(&hdev->mbx_resp.mbx_mutex); 2793e2cb1decSSalil Mehta } 2794e2cb1decSSalil Mehta 2795e2cb1decSSalil Mehta static int hclgevf_init_msi(struct hclgevf_dev *hdev) 2796e2cb1decSSalil Mehta { 2797e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2798e2cb1decSSalil Mehta int vectors; 2799e2cb1decSSalil Mehta int i; 2800e2cb1decSSalil Mehta 2801580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) 280207acf909SJian Shen vectors = pci_alloc_irq_vectors(pdev, 280307acf909SJian Shen hdev->roce_base_msix_offset + 1, 280407acf909SJian Shen hdev->num_msi, 280507acf909SJian Shen PCI_IRQ_MSIX); 280607acf909SJian Shen else 2807580a05f9SYonglong Liu vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM, 2808580a05f9SYonglong Liu hdev->num_msi, 2809e2cb1decSSalil Mehta PCI_IRQ_MSI | PCI_IRQ_MSIX); 281007acf909SJian Shen 2811e2cb1decSSalil Mehta if (vectors < 0) { 2812e2cb1decSSalil Mehta dev_err(&pdev->dev, 2813e2cb1decSSalil Mehta "failed(%d) to allocate MSI/MSI-X vectors\n", 2814e2cb1decSSalil Mehta vectors); 2815e2cb1decSSalil Mehta return vectors; 2816e2cb1decSSalil Mehta } 2817e2cb1decSSalil Mehta if (vectors < hdev->num_msi) 2818e2cb1decSSalil Mehta dev_warn(&hdev->pdev->dev, 2819adcf738bSGuojia Liao "requested %u MSI/MSI-X, but allocated %d MSI/MSI-X\n", 2820e2cb1decSSalil Mehta hdev->num_msi, vectors); 2821e2cb1decSSalil Mehta 2822e2cb1decSSalil Mehta hdev->num_msi = vectors; 2823e2cb1decSSalil Mehta hdev->num_msi_left = vectors; 2824580a05f9SYonglong Liu 2825e2cb1decSSalil Mehta hdev->base_msi_vector = pdev->irq; 282607acf909SJian Shen hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset; 2827e2cb1decSSalil Mehta 2828e2cb1decSSalil Mehta hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi, 2829e2cb1decSSalil Mehta sizeof(u16), GFP_KERNEL); 2830e2cb1decSSalil Mehta if (!hdev->vector_status) { 2831e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2832e2cb1decSSalil Mehta return -ENOMEM; 2833e2cb1decSSalil Mehta } 2834e2cb1decSSalil Mehta 2835e2cb1decSSalil Mehta for (i = 0; i < hdev->num_msi; i++) 2836e2cb1decSSalil Mehta hdev->vector_status[i] = HCLGEVF_INVALID_VPORT; 2837e2cb1decSSalil Mehta 2838e2cb1decSSalil Mehta hdev->vector_irq = devm_kcalloc(&pdev->dev, hdev->num_msi, 2839e2cb1decSSalil Mehta sizeof(int), GFP_KERNEL); 2840e2cb1decSSalil Mehta if (!hdev->vector_irq) { 2841862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2842e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2843e2cb1decSSalil Mehta return -ENOMEM; 2844e2cb1decSSalil Mehta } 2845e2cb1decSSalil Mehta 2846e2cb1decSSalil Mehta return 0; 2847e2cb1decSSalil Mehta } 2848e2cb1decSSalil Mehta 2849e2cb1decSSalil Mehta static void hclgevf_uninit_msi(struct hclgevf_dev *hdev) 2850e2cb1decSSalil Mehta { 2851e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 2852e2cb1decSSalil Mehta 2853862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_status); 2854862d969aSHuazhong Tan devm_kfree(&pdev->dev, hdev->vector_irq); 2855e2cb1decSSalil Mehta pci_free_irq_vectors(pdev); 2856e2cb1decSSalil Mehta } 2857e2cb1decSSalil Mehta 2858e2cb1decSSalil Mehta static int hclgevf_misc_irq_init(struct hclgevf_dev *hdev) 2859e2cb1decSSalil Mehta { 2860cdd332acSGuojia Liao int ret; 2861e2cb1decSSalil Mehta 2862e2cb1decSSalil Mehta hclgevf_get_misc_vector(hdev); 2863e2cb1decSSalil Mehta 2864f97c4d82SYonglong Liu snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s", 2865f97c4d82SYonglong Liu HCLGEVF_NAME, pci_name(hdev->pdev)); 2866e2cb1decSSalil Mehta ret = request_irq(hdev->misc_vector.vector_irq, hclgevf_misc_irq_handle, 2867f97c4d82SYonglong Liu 0, hdev->misc_vector.name, hdev); 2868e2cb1decSSalil Mehta if (ret) { 2869e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, "VF failed to request misc irq(%d)\n", 2870e2cb1decSSalil Mehta hdev->misc_vector.vector_irq); 2871e2cb1decSSalil Mehta return ret; 2872e2cb1decSSalil Mehta } 2873e2cb1decSSalil Mehta 28741819e409SXi Wang hclgevf_clear_event_cause(hdev, 0); 28751819e409SXi Wang 2876e2cb1decSSalil Mehta /* enable misc. vector(vector 0) */ 2877e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, true); 2878e2cb1decSSalil Mehta 2879e2cb1decSSalil Mehta return ret; 2880e2cb1decSSalil Mehta } 2881e2cb1decSSalil Mehta 2882e2cb1decSSalil Mehta static void hclgevf_misc_irq_uninit(struct hclgevf_dev *hdev) 2883e2cb1decSSalil Mehta { 2884e2cb1decSSalil Mehta /* disable misc vector(vector 0) */ 2885e2cb1decSSalil Mehta hclgevf_enable_vector(&hdev->misc_vector, false); 28861819e409SXi Wang synchronize_irq(hdev->misc_vector.vector_irq); 2887e2cb1decSSalil Mehta free_irq(hdev->misc_vector.vector_irq, hdev); 2888e2cb1decSSalil Mehta hclgevf_free_vector(hdev, 0); 2889e2cb1decSSalil Mehta } 2890e2cb1decSSalil Mehta 2891bb87be87SYonglong Liu static void hclgevf_info_show(struct hclgevf_dev *hdev) 2892bb87be87SYonglong Liu { 2893bb87be87SYonglong Liu struct device *dev = &hdev->pdev->dev; 2894bb87be87SYonglong Liu 2895bb87be87SYonglong Liu dev_info(dev, "VF info begin:\n"); 2896bb87be87SYonglong Liu 2897adcf738bSGuojia Liao dev_info(dev, "Task queue pairs numbers: %u\n", hdev->num_tqps); 2898adcf738bSGuojia Liao dev_info(dev, "Desc num per TX queue: %u\n", hdev->num_tx_desc); 2899adcf738bSGuojia Liao dev_info(dev, "Desc num per RX queue: %u\n", hdev->num_rx_desc); 2900adcf738bSGuojia Liao dev_info(dev, "Numbers of vports: %u\n", hdev->num_alloc_vport); 2901adcf738bSGuojia Liao dev_info(dev, "HW tc map: 0x%x\n", hdev->hw_tc_map); 2902adcf738bSGuojia Liao dev_info(dev, "PF media type of this VF: %u\n", 2903bb87be87SYonglong Liu hdev->hw.mac.media_type); 2904bb87be87SYonglong Liu 2905bb87be87SYonglong Liu dev_info(dev, "VF info end.\n"); 2906bb87be87SYonglong Liu } 2907bb87be87SYonglong Liu 29081db58f86SHuazhong Tan static int hclgevf_init_nic_client_instance(struct hnae3_ae_dev *ae_dev, 29091db58f86SHuazhong Tan struct hnae3_client *client) 29101db58f86SHuazhong Tan { 29111db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 29124cd5beaaSGuangbin Huang int rst_cnt = hdev->rst_stats.rst_cnt; 29131db58f86SHuazhong Tan int ret; 29141db58f86SHuazhong Tan 29151db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->nic); 29161db58f86SHuazhong Tan if (ret) 29171db58f86SHuazhong Tan return ret; 29181db58f86SHuazhong Tan 29191db58f86SHuazhong Tan set_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 29204cd5beaaSGuangbin Huang if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 29214cd5beaaSGuangbin Huang rst_cnt != hdev->rst_stats.rst_cnt) { 29224cd5beaaSGuangbin Huang clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 29234cd5beaaSGuangbin Huang 29244cd5beaaSGuangbin Huang client->ops->uninit_instance(&hdev->nic, 0); 29254cd5beaaSGuangbin Huang return -EBUSY; 29264cd5beaaSGuangbin Huang } 29274cd5beaaSGuangbin Huang 29281db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 29291db58f86SHuazhong Tan 29301db58f86SHuazhong Tan if (netif_msg_drv(&hdev->nic)) 29311db58f86SHuazhong Tan hclgevf_info_show(hdev); 29321db58f86SHuazhong Tan 29331db58f86SHuazhong Tan return 0; 29341db58f86SHuazhong Tan } 29351db58f86SHuazhong Tan 29361db58f86SHuazhong Tan static int hclgevf_init_roce_client_instance(struct hnae3_ae_dev *ae_dev, 29371db58f86SHuazhong Tan struct hnae3_client *client) 29381db58f86SHuazhong Tan { 29391db58f86SHuazhong Tan struct hclgevf_dev *hdev = ae_dev->priv; 29401db58f86SHuazhong Tan int ret; 29411db58f86SHuazhong Tan 29421db58f86SHuazhong Tan if (!hnae3_dev_roce_supported(hdev) || !hdev->roce_client || 29431db58f86SHuazhong Tan !hdev->nic_client) 29441db58f86SHuazhong Tan return 0; 29451db58f86SHuazhong Tan 29461db58f86SHuazhong Tan ret = hclgevf_init_roce_base_info(hdev); 29471db58f86SHuazhong Tan if (ret) 29481db58f86SHuazhong Tan return ret; 29491db58f86SHuazhong Tan 29501db58f86SHuazhong Tan ret = client->ops->init_instance(&hdev->roce); 29511db58f86SHuazhong Tan if (ret) 29521db58f86SHuazhong Tan return ret; 29531db58f86SHuazhong Tan 2954fe735c84SHuazhong Tan set_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 29551db58f86SHuazhong Tan hnae3_set_client_init_flag(client, ae_dev, 1); 29561db58f86SHuazhong Tan 29571db58f86SHuazhong Tan return 0; 29581db58f86SHuazhong Tan } 29591db58f86SHuazhong Tan 2960e718a93fSPeng Li static int hclgevf_init_client_instance(struct hnae3_client *client, 2961e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 2962e2cb1decSSalil Mehta { 2963e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 2964e2cb1decSSalil Mehta int ret; 2965e2cb1decSSalil Mehta 2966e2cb1decSSalil Mehta switch (client->type) { 2967e2cb1decSSalil Mehta case HNAE3_CLIENT_KNIC: 2968e2cb1decSSalil Mehta hdev->nic_client = client; 2969e2cb1decSSalil Mehta hdev->nic.client = client; 2970e2cb1decSSalil Mehta 29711db58f86SHuazhong Tan ret = hclgevf_init_nic_client_instance(ae_dev, client); 2972e2cb1decSSalil Mehta if (ret) 297349dd8054SJian Shen goto clear_nic; 2974e2cb1decSSalil Mehta 29751db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, 29761db58f86SHuazhong Tan hdev->roce_client); 2977e2cb1decSSalil Mehta if (ret) 297849dd8054SJian Shen goto clear_roce; 2979d9f28fc2SJian Shen 2980e2cb1decSSalil Mehta break; 2981e2cb1decSSalil Mehta case HNAE3_CLIENT_ROCE: 2982544a7bcdSLijun Ou if (hnae3_dev_roce_supported(hdev)) { 2983e2cb1decSSalil Mehta hdev->roce_client = client; 2984e2cb1decSSalil Mehta hdev->roce.client = client; 2985544a7bcdSLijun Ou } 2986e2cb1decSSalil Mehta 29871db58f86SHuazhong Tan ret = hclgevf_init_roce_client_instance(ae_dev, client); 2988e2cb1decSSalil Mehta if (ret) 298949dd8054SJian Shen goto clear_roce; 2990e2cb1decSSalil Mehta 2991fa7a4bd5SJian Shen break; 2992fa7a4bd5SJian Shen default: 2993fa7a4bd5SJian Shen return -EINVAL; 2994e2cb1decSSalil Mehta } 2995e2cb1decSSalil Mehta 2996e2cb1decSSalil Mehta return 0; 299749dd8054SJian Shen 299849dd8054SJian Shen clear_nic: 299949dd8054SJian Shen hdev->nic_client = NULL; 300049dd8054SJian Shen hdev->nic.client = NULL; 300149dd8054SJian Shen return ret; 300249dd8054SJian Shen clear_roce: 300349dd8054SJian Shen hdev->roce_client = NULL; 300449dd8054SJian Shen hdev->roce.client = NULL; 300549dd8054SJian Shen return ret; 3006e2cb1decSSalil Mehta } 3007e2cb1decSSalil Mehta 3008e718a93fSPeng Li static void hclgevf_uninit_client_instance(struct hnae3_client *client, 3009e718a93fSPeng Li struct hnae3_ae_dev *ae_dev) 3010e2cb1decSSalil Mehta { 3011e718a93fSPeng Li struct hclgevf_dev *hdev = ae_dev->priv; 3012e718a93fSPeng Li 3013e2cb1decSSalil Mehta /* un-init roce, if it exists */ 301449dd8054SJian Shen if (hdev->roce_client) { 3015fe735c84SHuazhong Tan clear_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); 3016e2cb1decSSalil Mehta hdev->roce_client->ops->uninit_instance(&hdev->roce, 0); 301749dd8054SJian Shen hdev->roce_client = NULL; 301849dd8054SJian Shen hdev->roce.client = NULL; 301949dd8054SJian Shen } 3020e2cb1decSSalil Mehta 3021e2cb1decSSalil Mehta /* un-init nic/unic, if this was not called by roce client */ 302249dd8054SJian Shen if (client->ops->uninit_instance && hdev->nic_client && 302349dd8054SJian Shen client->type != HNAE3_CLIENT_ROCE) { 302425d1817cSHuazhong Tan clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); 302525d1817cSHuazhong Tan 3026e2cb1decSSalil Mehta client->ops->uninit_instance(&hdev->nic, 0); 302749dd8054SJian Shen hdev->nic_client = NULL; 302849dd8054SJian Shen hdev->nic.client = NULL; 302949dd8054SJian Shen } 3030e2cb1decSSalil Mehta } 3031e2cb1decSSalil Mehta 303230ae7f8aSHuazhong Tan static int hclgevf_dev_mem_map(struct hclgevf_dev *hdev) 303330ae7f8aSHuazhong Tan { 303430ae7f8aSHuazhong Tan #define HCLGEVF_MEM_BAR 4 303530ae7f8aSHuazhong Tan 303630ae7f8aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 303730ae7f8aSHuazhong Tan struct hclgevf_hw *hw = &hdev->hw; 303830ae7f8aSHuazhong Tan 303930ae7f8aSHuazhong Tan /* for device does not have device memory, return directly */ 304030ae7f8aSHuazhong Tan if (!(pci_select_bars(pdev, IORESOURCE_MEM) & BIT(HCLGEVF_MEM_BAR))) 304130ae7f8aSHuazhong Tan return 0; 304230ae7f8aSHuazhong Tan 304330ae7f8aSHuazhong Tan hw->mem_base = devm_ioremap_wc(&pdev->dev, 304430ae7f8aSHuazhong Tan pci_resource_start(pdev, 304530ae7f8aSHuazhong Tan HCLGEVF_MEM_BAR), 304630ae7f8aSHuazhong Tan pci_resource_len(pdev, HCLGEVF_MEM_BAR)); 304730ae7f8aSHuazhong Tan if (!hw->mem_base) { 3048be419fcaSColin Ian King dev_err(&pdev->dev, "failed to map device memory\n"); 304930ae7f8aSHuazhong Tan return -EFAULT; 305030ae7f8aSHuazhong Tan } 305130ae7f8aSHuazhong Tan 305230ae7f8aSHuazhong Tan return 0; 305330ae7f8aSHuazhong Tan } 305430ae7f8aSHuazhong Tan 3055e2cb1decSSalil Mehta static int hclgevf_pci_init(struct hclgevf_dev *hdev) 3056e2cb1decSSalil Mehta { 3057e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3058e2cb1decSSalil Mehta struct hclgevf_hw *hw; 3059e2cb1decSSalil Mehta int ret; 3060e2cb1decSSalil Mehta 3061e2cb1decSSalil Mehta ret = pci_enable_device(pdev); 3062e2cb1decSSalil Mehta if (ret) { 3063e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed to enable PCI device\n"); 30643e249d3bSFuyun Liang return ret; 3065e2cb1decSSalil Mehta } 3066e2cb1decSSalil Mehta 3067e2cb1decSSalil Mehta ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 3068e2cb1decSSalil Mehta if (ret) { 3069e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't set consistent PCI DMA, exiting"); 3070e2cb1decSSalil Mehta goto err_disable_device; 3071e2cb1decSSalil Mehta } 3072e2cb1decSSalil Mehta 3073e2cb1decSSalil Mehta ret = pci_request_regions(pdev, HCLGEVF_DRIVER_NAME); 3074e2cb1decSSalil Mehta if (ret) { 3075e2cb1decSSalil Mehta dev_err(&pdev->dev, "PCI request regions failed %d\n", ret); 3076e2cb1decSSalil Mehta goto err_disable_device; 3077e2cb1decSSalil Mehta } 3078e2cb1decSSalil Mehta 3079e2cb1decSSalil Mehta pci_set_master(pdev); 3080e2cb1decSSalil Mehta hw = &hdev->hw; 3081e2cb1decSSalil Mehta hw->hdev = hdev; 30822e1ea493SPeng Li hw->io_base = pci_iomap(pdev, 2, 0); 3083e2cb1decSSalil Mehta if (!hw->io_base) { 3084e2cb1decSSalil Mehta dev_err(&pdev->dev, "can't map configuration register space\n"); 3085e2cb1decSSalil Mehta ret = -ENOMEM; 3086e2cb1decSSalil Mehta goto err_clr_master; 3087e2cb1decSSalil Mehta } 3088e2cb1decSSalil Mehta 308930ae7f8aSHuazhong Tan ret = hclgevf_dev_mem_map(hdev); 309030ae7f8aSHuazhong Tan if (ret) 309130ae7f8aSHuazhong Tan goto err_unmap_io_base; 309230ae7f8aSHuazhong Tan 3093e2cb1decSSalil Mehta return 0; 3094e2cb1decSSalil Mehta 309530ae7f8aSHuazhong Tan err_unmap_io_base: 309630ae7f8aSHuazhong Tan pci_iounmap(pdev, hdev->hw.io_base); 3097e2cb1decSSalil Mehta err_clr_master: 3098e2cb1decSSalil Mehta pci_clear_master(pdev); 3099e2cb1decSSalil Mehta pci_release_regions(pdev); 3100e2cb1decSSalil Mehta err_disable_device: 3101e2cb1decSSalil Mehta pci_disable_device(pdev); 31023e249d3bSFuyun Liang 3103e2cb1decSSalil Mehta return ret; 3104e2cb1decSSalil Mehta } 3105e2cb1decSSalil Mehta 3106e2cb1decSSalil Mehta static void hclgevf_pci_uninit(struct hclgevf_dev *hdev) 3107e2cb1decSSalil Mehta { 3108e2cb1decSSalil Mehta struct pci_dev *pdev = hdev->pdev; 3109e2cb1decSSalil Mehta 311030ae7f8aSHuazhong Tan if (hdev->hw.mem_base) 311130ae7f8aSHuazhong Tan devm_iounmap(&pdev->dev, hdev->hw.mem_base); 311230ae7f8aSHuazhong Tan 3113e2cb1decSSalil Mehta pci_iounmap(pdev, hdev->hw.io_base); 3114e2cb1decSSalil Mehta pci_clear_master(pdev); 3115e2cb1decSSalil Mehta pci_release_regions(pdev); 3116e2cb1decSSalil Mehta pci_disable_device(pdev); 3117e2cb1decSSalil Mehta } 3118e2cb1decSSalil Mehta 311907acf909SJian Shen static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 312007acf909SJian Shen { 312107acf909SJian Shen struct hclgevf_query_res_cmd *req; 312207acf909SJian Shen struct hclgevf_desc desc; 312307acf909SJian Shen int ret; 312407acf909SJian Shen 312507acf909SJian Shen hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_VF_RSRC, true); 312607acf909SJian Shen ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); 312707acf909SJian Shen if (ret) { 312807acf909SJian Shen dev_err(&hdev->pdev->dev, 312907acf909SJian Shen "query vf resource failed, ret = %d.\n", ret); 313007acf909SJian Shen return ret; 313107acf909SJian Shen } 313207acf909SJian Shen 313307acf909SJian Shen req = (struct hclgevf_query_res_cmd *)desc.data; 313407acf909SJian Shen 3135580a05f9SYonglong Liu if (hnae3_dev_roce_supported(hdev)) { 313607acf909SJian Shen hdev->roce_base_msix_offset = 313760df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee), 313807acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_M, 313907acf909SJian Shen HCLGEVF_MSIX_OFT_ROCEE_S); 314007acf909SJian Shen hdev->num_roce_msix = 314160df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 314207acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 314307acf909SJian Shen 3144580a05f9SYonglong Liu /* nic's msix numbers is always equals to the roce's. */ 3145580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_roce_msix; 3146580a05f9SYonglong Liu 314707acf909SJian Shen /* VF should have NIC vectors and Roce vectors, NIC vectors 314807acf909SJian Shen * are queued before Roce vectors. The offset is fixed to 64. 314907acf909SJian Shen */ 315007acf909SJian Shen hdev->num_msi = hdev->num_roce_msix + 315107acf909SJian Shen hdev->roce_base_msix_offset; 315207acf909SJian Shen } else { 315307acf909SJian Shen hdev->num_msi = 315460df7e91SHuazhong Tan hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), 315507acf909SJian Shen HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); 3156580a05f9SYonglong Liu 3157580a05f9SYonglong Liu hdev->num_nic_msix = hdev->num_msi; 3158580a05f9SYonglong Liu } 3159580a05f9SYonglong Liu 3160580a05f9SYonglong Liu if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) { 3161580a05f9SYonglong Liu dev_err(&hdev->pdev->dev, 3162580a05f9SYonglong Liu "Just %u msi resources, not enough for vf(min:2).\n", 3163580a05f9SYonglong Liu hdev->num_nic_msix); 3164580a05f9SYonglong Liu return -EINVAL; 316507acf909SJian Shen } 316607acf909SJian Shen 316707acf909SJian Shen return 0; 316807acf909SJian Shen } 316907acf909SJian Shen 3170af2aedc5SGuangbin Huang static void hclgevf_set_default_dev_specs(struct hclgevf_dev *hdev) 3171af2aedc5SGuangbin Huang { 3172af2aedc5SGuangbin Huang #define HCLGEVF_MAX_NON_TSO_BD_NUM 8U 3173af2aedc5SGuangbin Huang 3174af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3175af2aedc5SGuangbin Huang 3176af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = 3177af2aedc5SGuangbin Huang HCLGEVF_MAX_NON_TSO_BD_NUM; 3178af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 3179af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3180ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3181e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; 3182af2aedc5SGuangbin Huang } 3183af2aedc5SGuangbin Huang 3184af2aedc5SGuangbin Huang static void hclgevf_parse_dev_specs(struct hclgevf_dev *hdev, 3185af2aedc5SGuangbin Huang struct hclgevf_desc *desc) 3186af2aedc5SGuangbin Huang { 3187af2aedc5SGuangbin Huang struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); 3188af2aedc5SGuangbin Huang struct hclgevf_dev_specs_0_cmd *req0; 3189ab16b49cSHuazhong Tan struct hclgevf_dev_specs_1_cmd *req1; 3190af2aedc5SGuangbin Huang 3191af2aedc5SGuangbin Huang req0 = (struct hclgevf_dev_specs_0_cmd *)desc[0].data; 3192ab16b49cSHuazhong Tan req1 = (struct hclgevf_dev_specs_1_cmd *)desc[1].data; 3193af2aedc5SGuangbin Huang 3194af2aedc5SGuangbin Huang ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; 3195af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_ind_tbl_size = 3196af2aedc5SGuangbin Huang le16_to_cpu(req0->rss_ind_tbl_size); 319791bfae25SHuazhong Tan ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); 3198af2aedc5SGuangbin Huang ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size); 3199ab16b49cSHuazhong Tan ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl); 3200e070c8b9SYufeng Mo ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size); 3201af2aedc5SGuangbin Huang } 3202af2aedc5SGuangbin Huang 320313297028SGuangbin Huang static void hclgevf_check_dev_specs(struct hclgevf_dev *hdev) 320413297028SGuangbin Huang { 320513297028SGuangbin Huang struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; 320613297028SGuangbin Huang 320713297028SGuangbin Huang if (!dev_specs->max_non_tso_bd_num) 320813297028SGuangbin Huang dev_specs->max_non_tso_bd_num = HCLGEVF_MAX_NON_TSO_BD_NUM; 320913297028SGuangbin Huang if (!dev_specs->rss_ind_tbl_size) 321013297028SGuangbin Huang dev_specs->rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; 321113297028SGuangbin Huang if (!dev_specs->rss_key_size) 321213297028SGuangbin Huang dev_specs->rss_key_size = HCLGEVF_RSS_KEY_SIZE; 3213ab16b49cSHuazhong Tan if (!dev_specs->max_int_gl) 3214ab16b49cSHuazhong Tan dev_specs->max_int_gl = HCLGEVF_DEF_MAX_INT_GL; 3215e070c8b9SYufeng Mo if (!dev_specs->max_frm_size) 3216e070c8b9SYufeng Mo dev_specs->max_frm_size = HCLGEVF_MAC_MAX_FRAME; 321713297028SGuangbin Huang } 321813297028SGuangbin Huang 3219af2aedc5SGuangbin Huang static int hclgevf_query_dev_specs(struct hclgevf_dev *hdev) 3220af2aedc5SGuangbin Huang { 3221af2aedc5SGuangbin Huang struct hclgevf_desc desc[HCLGEVF_QUERY_DEV_SPECS_BD_NUM]; 3222af2aedc5SGuangbin Huang int ret; 3223af2aedc5SGuangbin Huang int i; 3224af2aedc5SGuangbin Huang 3225af2aedc5SGuangbin Huang /* set default specifications as devices lower than version V3 do not 3226af2aedc5SGuangbin Huang * support querying specifications from firmware. 3227af2aedc5SGuangbin Huang */ 3228af2aedc5SGuangbin Huang if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) { 3229af2aedc5SGuangbin Huang hclgevf_set_default_dev_specs(hdev); 3230af2aedc5SGuangbin Huang return 0; 3231af2aedc5SGuangbin Huang } 3232af2aedc5SGuangbin Huang 3233af2aedc5SGuangbin Huang for (i = 0; i < HCLGEVF_QUERY_DEV_SPECS_BD_NUM - 1; i++) { 3234af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], 3235af2aedc5SGuangbin Huang HCLGEVF_OPC_QUERY_DEV_SPECS, true); 3236af2aedc5SGuangbin Huang desc[i].flag |= cpu_to_le16(HCLGEVF_CMD_FLAG_NEXT); 3237af2aedc5SGuangbin Huang } 3238af2aedc5SGuangbin Huang hclgevf_cmd_setup_basic_desc(&desc[i], HCLGEVF_OPC_QUERY_DEV_SPECS, 3239af2aedc5SGuangbin Huang true); 3240af2aedc5SGuangbin Huang 3241af2aedc5SGuangbin Huang ret = hclgevf_cmd_send(&hdev->hw, desc, HCLGEVF_QUERY_DEV_SPECS_BD_NUM); 3242af2aedc5SGuangbin Huang if (ret) 3243af2aedc5SGuangbin Huang return ret; 3244af2aedc5SGuangbin Huang 3245af2aedc5SGuangbin Huang hclgevf_parse_dev_specs(hdev, desc); 324613297028SGuangbin Huang hclgevf_check_dev_specs(hdev); 3247af2aedc5SGuangbin Huang 3248af2aedc5SGuangbin Huang return 0; 3249af2aedc5SGuangbin Huang } 3250af2aedc5SGuangbin Huang 3251862d969aSHuazhong Tan static int hclgevf_pci_reset(struct hclgevf_dev *hdev) 3252862d969aSHuazhong Tan { 3253862d969aSHuazhong Tan struct pci_dev *pdev = hdev->pdev; 3254862d969aSHuazhong Tan int ret = 0; 3255862d969aSHuazhong Tan 3256862d969aSHuazhong Tan if (hdev->reset_type == HNAE3_VF_FULL_RESET && 3257862d969aSHuazhong Tan test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3258862d969aSHuazhong Tan hclgevf_misc_irq_uninit(hdev); 3259862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3260862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3261862d969aSHuazhong Tan } 3262862d969aSHuazhong Tan 3263862d969aSHuazhong Tan if (!test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3264862d969aSHuazhong Tan pci_set_master(pdev); 3265862d969aSHuazhong Tan ret = hclgevf_init_msi(hdev); 3266862d969aSHuazhong Tan if (ret) { 3267862d969aSHuazhong Tan dev_err(&pdev->dev, 3268862d969aSHuazhong Tan "failed(%d) to init MSI/MSI-X\n", ret); 3269862d969aSHuazhong Tan return ret; 3270862d969aSHuazhong Tan } 3271862d969aSHuazhong Tan 3272862d969aSHuazhong Tan ret = hclgevf_misc_irq_init(hdev); 3273862d969aSHuazhong Tan if (ret) { 3274862d969aSHuazhong Tan hclgevf_uninit_msi(hdev); 3275862d969aSHuazhong Tan dev_err(&pdev->dev, "failed(%d) to init Misc IRQ(vector0)\n", 3276862d969aSHuazhong Tan ret); 3277862d969aSHuazhong Tan return ret; 3278862d969aSHuazhong Tan } 3279862d969aSHuazhong Tan 3280862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3281862d969aSHuazhong Tan } 3282862d969aSHuazhong Tan 3283862d969aSHuazhong Tan return ret; 3284862d969aSHuazhong Tan } 3285862d969aSHuazhong Tan 3286039ba863SJian Shen static int hclgevf_clear_vport_list(struct hclgevf_dev *hdev) 3287039ba863SJian Shen { 3288039ba863SJian Shen struct hclge_vf_to_pf_msg send_msg; 3289039ba863SJian Shen 3290039ba863SJian Shen hclgevf_build_send_msg(&send_msg, HCLGE_MBX_HANDLE_VF_TBL, 3291039ba863SJian Shen HCLGE_MBX_VPORT_LIST_CLEAR); 3292039ba863SJian Shen return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3293039ba863SJian Shen } 3294039ba863SJian Shen 329579664077SHuazhong Tan static void hclgevf_init_rxd_adv_layout(struct hclgevf_dev *hdev) 329679664077SHuazhong Tan { 329779664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 329879664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 1); 329979664077SHuazhong Tan } 330079664077SHuazhong Tan 330179664077SHuazhong Tan static void hclgevf_uninit_rxd_adv_layout(struct hclgevf_dev *hdev) 330279664077SHuazhong Tan { 330379664077SHuazhong Tan if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) 330479664077SHuazhong Tan hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 0); 330579664077SHuazhong Tan } 330679664077SHuazhong Tan 33079c6f7085SHuazhong Tan static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) 3308e2cb1decSSalil Mehta { 33097a01c897SSalil Mehta struct pci_dev *pdev = hdev->pdev; 3310e2cb1decSSalil Mehta int ret; 3311e2cb1decSSalil Mehta 3312862d969aSHuazhong Tan ret = hclgevf_pci_reset(hdev); 3313862d969aSHuazhong Tan if (ret) { 3314862d969aSHuazhong Tan dev_err(&pdev->dev, "pci reset failed %d\n", ret); 3315862d969aSHuazhong Tan return ret; 3316862d969aSHuazhong Tan } 3317862d969aSHuazhong Tan 33189c6f7085SHuazhong Tan ret = hclgevf_cmd_init(hdev); 33199c6f7085SHuazhong Tan if (ret) { 33209c6f7085SHuazhong Tan dev_err(&pdev->dev, "cmd failed %d\n", ret); 33219c6f7085SHuazhong Tan return ret; 33227a01c897SSalil Mehta } 3323e2cb1decSSalil Mehta 33249c6f7085SHuazhong Tan ret = hclgevf_rss_init_hw(hdev); 33259c6f7085SHuazhong Tan if (ret) { 33269c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 33279c6f7085SHuazhong Tan "failed(%d) to initialize RSS\n", ret); 33289c6f7085SHuazhong Tan return ret; 33299c6f7085SHuazhong Tan } 33309c6f7085SHuazhong Tan 33313462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 3332b26a6feaSPeng Li if (ret) 3333b26a6feaSPeng Li return ret; 3334b26a6feaSPeng Li 33359c6f7085SHuazhong Tan ret = hclgevf_init_vlan_config(hdev); 33369c6f7085SHuazhong Tan if (ret) { 33379c6f7085SHuazhong Tan dev_err(&hdev->pdev->dev, 33389c6f7085SHuazhong Tan "failed(%d) to initialize VLAN config\n", ret); 33399c6f7085SHuazhong Tan return ret; 33409c6f7085SHuazhong Tan } 33419c6f7085SHuazhong Tan 3342c631c696SJian Shen set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); 3343c631c696SJian Shen 334479664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 334579664077SHuazhong Tan 33469c6f7085SHuazhong Tan dev_info(&hdev->pdev->dev, "Reset done\n"); 33479c6f7085SHuazhong Tan 33489c6f7085SHuazhong Tan return 0; 33499c6f7085SHuazhong Tan } 33509c6f7085SHuazhong Tan 33519c6f7085SHuazhong Tan static int hclgevf_init_hdev(struct hclgevf_dev *hdev) 33529c6f7085SHuazhong Tan { 33539c6f7085SHuazhong Tan struct pci_dev *pdev = hdev->pdev; 33549c6f7085SHuazhong Tan int ret; 33559c6f7085SHuazhong Tan 3356e2cb1decSSalil Mehta ret = hclgevf_pci_init(hdev); 335760df7e91SHuazhong Tan if (ret) 3358e2cb1decSSalil Mehta return ret; 3359e2cb1decSSalil Mehta 3360cd624299SYufeng Mo ret = hclgevf_devlink_init(hdev); 3361cd624299SYufeng Mo if (ret) 3362cd624299SYufeng Mo goto err_devlink_init; 3363cd624299SYufeng Mo 33648b0195a3SHuazhong Tan ret = hclgevf_cmd_queue_init(hdev); 336560df7e91SHuazhong Tan if (ret) 33668b0195a3SHuazhong Tan goto err_cmd_queue_init; 33678b0195a3SHuazhong Tan 3368eddf0462SYunsheng Lin ret = hclgevf_cmd_init(hdev); 3369eddf0462SYunsheng Lin if (ret) 3370eddf0462SYunsheng Lin goto err_cmd_init; 3371eddf0462SYunsheng Lin 337207acf909SJian Shen /* Get vf resource */ 337307acf909SJian Shen ret = hclgevf_query_vf_resource(hdev); 337460df7e91SHuazhong Tan if (ret) 33758b0195a3SHuazhong Tan goto err_cmd_init; 337607acf909SJian Shen 3377af2aedc5SGuangbin Huang ret = hclgevf_query_dev_specs(hdev); 3378af2aedc5SGuangbin Huang if (ret) { 3379af2aedc5SGuangbin Huang dev_err(&pdev->dev, 3380af2aedc5SGuangbin Huang "failed to query dev specifications, ret = %d\n", ret); 3381af2aedc5SGuangbin Huang goto err_cmd_init; 3382af2aedc5SGuangbin Huang } 3383af2aedc5SGuangbin Huang 338407acf909SJian Shen ret = hclgevf_init_msi(hdev); 338507acf909SJian Shen if (ret) { 338607acf909SJian Shen dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret); 33878b0195a3SHuazhong Tan goto err_cmd_init; 338807acf909SJian Shen } 338907acf909SJian Shen 339007acf909SJian Shen hclgevf_state_init(hdev); 3391dea846e8SHuazhong Tan hdev->reset_level = HNAE3_VF_FUNC_RESET; 3392afb6afdbSHuazhong Tan hdev->reset_type = HNAE3_NONE_RESET; 339307acf909SJian Shen 3394e2cb1decSSalil Mehta ret = hclgevf_misc_irq_init(hdev); 339560df7e91SHuazhong Tan if (ret) 3396e2cb1decSSalil Mehta goto err_misc_irq_init; 3397e2cb1decSSalil Mehta 3398862d969aSHuazhong Tan set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3399862d969aSHuazhong Tan 3400e2cb1decSSalil Mehta ret = hclgevf_configure(hdev); 3401e2cb1decSSalil Mehta if (ret) { 3402e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to fetch configuration\n", ret); 3403e2cb1decSSalil Mehta goto err_config; 3404e2cb1decSSalil Mehta } 3405e2cb1decSSalil Mehta 3406e2cb1decSSalil Mehta ret = hclgevf_alloc_tqps(hdev); 3407e2cb1decSSalil Mehta if (ret) { 3408e2cb1decSSalil Mehta dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret); 3409e2cb1decSSalil Mehta goto err_config; 3410e2cb1decSSalil Mehta } 3411e2cb1decSSalil Mehta 3412e2cb1decSSalil Mehta ret = hclgevf_set_handle_info(hdev); 341360df7e91SHuazhong Tan if (ret) 3414e2cb1decSSalil Mehta goto err_config; 3415e2cb1decSSalil Mehta 34163462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 3417b26a6feaSPeng Li if (ret) 3418b26a6feaSPeng Li goto err_config; 3419b26a6feaSPeng Li 3420e2cb1decSSalil Mehta /* Initialize RSS for this VF */ 342187ce161eSGuangbin Huang ret = hclgevf_rss_init_cfg(hdev); 342287ce161eSGuangbin Huang if (ret) { 342387ce161eSGuangbin Huang dev_err(&pdev->dev, "failed to init rss cfg, ret = %d\n", ret); 342487ce161eSGuangbin Huang goto err_config; 342587ce161eSGuangbin Huang } 342687ce161eSGuangbin Huang 3427e2cb1decSSalil Mehta ret = hclgevf_rss_init_hw(hdev); 3428e2cb1decSSalil Mehta if (ret) { 3429e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3430e2cb1decSSalil Mehta "failed(%d) to initialize RSS\n", ret); 3431e2cb1decSSalil Mehta goto err_config; 3432e2cb1decSSalil Mehta } 3433e2cb1decSSalil Mehta 3434039ba863SJian Shen /* ensure vf tbl list as empty before init*/ 3435039ba863SJian Shen ret = hclgevf_clear_vport_list(hdev); 3436039ba863SJian Shen if (ret) { 3437039ba863SJian Shen dev_err(&pdev->dev, 3438039ba863SJian Shen "failed to clear tbl list configuration, ret = %d.\n", 3439039ba863SJian Shen ret); 3440039ba863SJian Shen goto err_config; 3441039ba863SJian Shen } 3442039ba863SJian Shen 3443e2cb1decSSalil Mehta ret = hclgevf_init_vlan_config(hdev); 3444e2cb1decSSalil Mehta if (ret) { 3445e2cb1decSSalil Mehta dev_err(&hdev->pdev->dev, 3446e2cb1decSSalil Mehta "failed(%d) to initialize VLAN config\n", ret); 3447e2cb1decSSalil Mehta goto err_config; 3448e2cb1decSSalil Mehta } 3449e2cb1decSSalil Mehta 345079664077SHuazhong Tan hclgevf_init_rxd_adv_layout(hdev); 345179664077SHuazhong Tan 34520742ed7cSHuazhong Tan hdev->last_reset_time = jiffies; 345308d80a4cSHuazhong Tan dev_info(&hdev->pdev->dev, "finished initializing %s driver\n", 345408d80a4cSHuazhong Tan HCLGEVF_DRIVER_NAME); 3455e2cb1decSSalil Mehta 3456ff200099SYunsheng Lin hclgevf_task_schedule(hdev, round_jiffies_relative(HZ)); 3457ff200099SYunsheng Lin 3458e2cb1decSSalil Mehta return 0; 3459e2cb1decSSalil Mehta 3460e2cb1decSSalil Mehta err_config: 3461e2cb1decSSalil Mehta hclgevf_misc_irq_uninit(hdev); 3462e2cb1decSSalil Mehta err_misc_irq_init: 3463e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 3464e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 346507acf909SJian Shen err_cmd_init: 34668b0195a3SHuazhong Tan hclgevf_cmd_uninit(hdev); 34678b0195a3SHuazhong Tan err_cmd_queue_init: 3468cd624299SYufeng Mo hclgevf_devlink_uninit(hdev); 3469cd624299SYufeng Mo err_devlink_init: 3470e2cb1decSSalil Mehta hclgevf_pci_uninit(hdev); 3471862d969aSHuazhong Tan clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); 3472e2cb1decSSalil Mehta return ret; 3473e2cb1decSSalil Mehta } 3474e2cb1decSSalil Mehta 34757a01c897SSalil Mehta static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev) 3476e2cb1decSSalil Mehta { 3477d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3478d3410018SYufeng Mo 3479e2cb1decSSalil Mehta hclgevf_state_uninit(hdev); 348079664077SHuazhong Tan hclgevf_uninit_rxd_adv_layout(hdev); 3481862d969aSHuazhong Tan 3482d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_VF_UNINIT, 0); 3483d3410018SYufeng Mo hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 348423b4201dSJian Shen 3485862d969aSHuazhong Tan if (test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { 3486eddf0462SYunsheng Lin hclgevf_misc_irq_uninit(hdev); 3487e2cb1decSSalil Mehta hclgevf_uninit_msi(hdev); 34887a01c897SSalil Mehta } 34897a01c897SSalil Mehta 3490862d969aSHuazhong Tan hclgevf_cmd_uninit(hdev); 3491cd624299SYufeng Mo hclgevf_devlink_uninit(hdev); 3492e3364c5fSZenghui Yu hclgevf_pci_uninit(hdev); 3493ee4bcd3bSJian Shen hclgevf_uninit_mac_list(hdev); 3494862d969aSHuazhong Tan } 3495862d969aSHuazhong Tan 34967a01c897SSalil Mehta static int hclgevf_init_ae_dev(struct hnae3_ae_dev *ae_dev) 34977a01c897SSalil Mehta { 34987a01c897SSalil Mehta struct pci_dev *pdev = ae_dev->pdev; 34997a01c897SSalil Mehta int ret; 35007a01c897SSalil Mehta 35017a01c897SSalil Mehta ret = hclgevf_alloc_hdev(ae_dev); 35027a01c897SSalil Mehta if (ret) { 35037a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device allocation failed\n"); 35047a01c897SSalil Mehta return ret; 35057a01c897SSalil Mehta } 35067a01c897SSalil Mehta 35077a01c897SSalil Mehta ret = hclgevf_init_hdev(ae_dev->priv); 3508a6d818e3SYunsheng Lin if (ret) { 35097a01c897SSalil Mehta dev_err(&pdev->dev, "hclge device initialization failed\n"); 35107a01c897SSalil Mehta return ret; 35117a01c897SSalil Mehta } 35127a01c897SSalil Mehta 3513a6d818e3SYunsheng Lin return 0; 3514a6d818e3SYunsheng Lin } 3515a6d818e3SYunsheng Lin 35167a01c897SSalil Mehta static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) 35177a01c897SSalil Mehta { 35187a01c897SSalil Mehta struct hclgevf_dev *hdev = ae_dev->priv; 35197a01c897SSalil Mehta 35207a01c897SSalil Mehta hclgevf_uninit_hdev(hdev); 3521e2cb1decSSalil Mehta ae_dev->priv = NULL; 3522e2cb1decSSalil Mehta } 3523e2cb1decSSalil Mehta 3524849e4607SPeng Li static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev) 3525849e4607SPeng Li { 3526849e4607SPeng Li struct hnae3_handle *nic = &hdev->nic; 3527849e4607SPeng Li struct hnae3_knic_private_info *kinfo = &nic->kinfo; 3528849e4607SPeng Li 35298be73621SHuazhong Tan return min_t(u32, hdev->rss_size_max, 353035244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 3531849e4607SPeng Li } 3532849e4607SPeng Li 3533849e4607SPeng Li /** 3534849e4607SPeng Li * hclgevf_get_channels - Get the current channels enabled and max supported. 3535849e4607SPeng Li * @handle: hardware information for network interface 3536849e4607SPeng Li * @ch: ethtool channels structure 3537849e4607SPeng Li * 3538849e4607SPeng Li * We don't support separate tx and rx queues as channels. The other count 3539849e4607SPeng Li * represents how many queues are being used for control. max_combined counts 3540849e4607SPeng Li * how many queue pairs we can support. They may not be mapped 1 to 1 with 3541849e4607SPeng Li * q_vectors since we support a lot more queue pairs than q_vectors. 3542849e4607SPeng Li **/ 3543849e4607SPeng Li static void hclgevf_get_channels(struct hnae3_handle *handle, 3544849e4607SPeng Li struct ethtool_channels *ch) 3545849e4607SPeng Li { 3546849e4607SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3547849e4607SPeng Li 3548849e4607SPeng Li ch->max_combined = hclgevf_get_max_channels(hdev); 3549849e4607SPeng Li ch->other_count = 0; 3550849e4607SPeng Li ch->max_other = 0; 35518be73621SHuazhong Tan ch->combined_count = handle->kinfo.rss_size; 3552849e4607SPeng Li } 3553849e4607SPeng Li 3554cc719218SPeng Li static void hclgevf_get_tqps_and_rss_info(struct hnae3_handle *handle, 35550d43bf45SHuazhong Tan u16 *alloc_tqps, u16 *max_rss_size) 3556cc719218SPeng Li { 3557cc719218SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3558cc719218SPeng Li 35590d43bf45SHuazhong Tan *alloc_tqps = hdev->num_tqps; 3560cc719218SPeng Li *max_rss_size = hdev->rss_size_max; 3561cc719218SPeng Li } 3562cc719218SPeng Li 35634093d1a2SGuangbin Huang static void hclgevf_update_rss_size(struct hnae3_handle *handle, 35644093d1a2SGuangbin Huang u32 new_tqps_num) 35654093d1a2SGuangbin Huang { 35664093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 35674093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35684093d1a2SGuangbin Huang u16 max_rss_size; 35694093d1a2SGuangbin Huang 35704093d1a2SGuangbin Huang kinfo->req_rss_size = new_tqps_num; 35714093d1a2SGuangbin Huang 35724093d1a2SGuangbin Huang max_rss_size = min_t(u16, hdev->rss_size_max, 357335244430SJian Shen hdev->num_tqps / kinfo->tc_info.num_tc); 35744093d1a2SGuangbin Huang 35754093d1a2SGuangbin Huang /* Use the user's configuration when it is not larger than 35764093d1a2SGuangbin Huang * max_rss_size, otherwise, use the maximum specification value. 35774093d1a2SGuangbin Huang */ 35784093d1a2SGuangbin Huang if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && 35794093d1a2SGuangbin Huang kinfo->req_rss_size <= max_rss_size) 35804093d1a2SGuangbin Huang kinfo->rss_size = kinfo->req_rss_size; 35814093d1a2SGuangbin Huang else if (kinfo->rss_size > max_rss_size || 35824093d1a2SGuangbin Huang (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) 35834093d1a2SGuangbin Huang kinfo->rss_size = max_rss_size; 35844093d1a2SGuangbin Huang 358535244430SJian Shen kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; 35864093d1a2SGuangbin Huang } 35874093d1a2SGuangbin Huang 35884093d1a2SGuangbin Huang static int hclgevf_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, 35894093d1a2SGuangbin Huang bool rxfh_configured) 35904093d1a2SGuangbin Huang { 35914093d1a2SGuangbin Huang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 35924093d1a2SGuangbin Huang struct hnae3_knic_private_info *kinfo = &handle->kinfo; 35934093d1a2SGuangbin Huang u16 cur_rss_size = kinfo->rss_size; 35944093d1a2SGuangbin Huang u16 cur_tqps = kinfo->num_tqps; 35954093d1a2SGuangbin Huang u32 *rss_indir; 35964093d1a2SGuangbin Huang unsigned int i; 35974093d1a2SGuangbin Huang int ret; 35984093d1a2SGuangbin Huang 35994093d1a2SGuangbin Huang hclgevf_update_rss_size(handle, new_tqps_num); 36004093d1a2SGuangbin Huang 36014093d1a2SGuangbin Huang ret = hclgevf_set_rss_tc_mode(hdev, kinfo->rss_size); 36024093d1a2SGuangbin Huang if (ret) 36034093d1a2SGuangbin Huang return ret; 36044093d1a2SGuangbin Huang 3605cd7e963dSSalil Mehta /* RSS indirection table has been configured by user */ 36064093d1a2SGuangbin Huang if (rxfh_configured) 36074093d1a2SGuangbin Huang goto out; 36084093d1a2SGuangbin Huang 36094093d1a2SGuangbin Huang /* Reinitializes the rss indirect table according to the new RSS size */ 361087ce161eSGuangbin Huang rss_indir = kcalloc(hdev->ae_dev->dev_specs.rss_ind_tbl_size, 361187ce161eSGuangbin Huang sizeof(u32), GFP_KERNEL); 36124093d1a2SGuangbin Huang if (!rss_indir) 36134093d1a2SGuangbin Huang return -ENOMEM; 36144093d1a2SGuangbin Huang 361587ce161eSGuangbin Huang for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) 36164093d1a2SGuangbin Huang rss_indir[i] = i % kinfo->rss_size; 36174093d1a2SGuangbin Huang 3618944de484SGuojia Liao hdev->rss_cfg.rss_size = kinfo->rss_size; 3619944de484SGuojia Liao 36204093d1a2SGuangbin Huang ret = hclgevf_set_rss(handle, rss_indir, NULL, 0); 36214093d1a2SGuangbin Huang if (ret) 36224093d1a2SGuangbin Huang dev_err(&hdev->pdev->dev, "set rss indir table fail, ret=%d\n", 36234093d1a2SGuangbin Huang ret); 36244093d1a2SGuangbin Huang 36254093d1a2SGuangbin Huang kfree(rss_indir); 36264093d1a2SGuangbin Huang 36274093d1a2SGuangbin Huang out: 36284093d1a2SGuangbin Huang if (!ret) 36294093d1a2SGuangbin Huang dev_info(&hdev->pdev->dev, 36304093d1a2SGuangbin Huang "Channels changed, rss_size from %u to %u, tqps from %u to %u", 36314093d1a2SGuangbin Huang cur_rss_size, kinfo->rss_size, 363235244430SJian Shen cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc); 36334093d1a2SGuangbin Huang 36344093d1a2SGuangbin Huang return ret; 36354093d1a2SGuangbin Huang } 36364093d1a2SGuangbin Huang 3637175ec96bSFuyun Liang static int hclgevf_get_status(struct hnae3_handle *handle) 3638175ec96bSFuyun Liang { 3639175ec96bSFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3640175ec96bSFuyun Liang 3641175ec96bSFuyun Liang return hdev->hw.mac.link; 3642175ec96bSFuyun Liang } 3643175ec96bSFuyun Liang 36444a152de9SFuyun Liang static void hclgevf_get_ksettings_an_result(struct hnae3_handle *handle, 36454a152de9SFuyun Liang u8 *auto_neg, u32 *speed, 36464a152de9SFuyun Liang u8 *duplex) 36474a152de9SFuyun Liang { 36484a152de9SFuyun Liang struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36494a152de9SFuyun Liang 36504a152de9SFuyun Liang if (speed) 36514a152de9SFuyun Liang *speed = hdev->hw.mac.speed; 36524a152de9SFuyun Liang if (duplex) 36534a152de9SFuyun Liang *duplex = hdev->hw.mac.duplex; 36544a152de9SFuyun Liang if (auto_neg) 36554a152de9SFuyun Liang *auto_neg = AUTONEG_DISABLE; 36564a152de9SFuyun Liang } 36574a152de9SFuyun Liang 36584a152de9SFuyun Liang void hclgevf_update_speed_duplex(struct hclgevf_dev *hdev, u32 speed, 36594a152de9SFuyun Liang u8 duplex) 36604a152de9SFuyun Liang { 36614a152de9SFuyun Liang hdev->hw.mac.speed = speed; 36624a152de9SFuyun Liang hdev->hw.mac.duplex = duplex; 36634a152de9SFuyun Liang } 36644a152de9SFuyun Liang 36651731be4cSYonglong Liu static int hclgevf_gro_en(struct hnae3_handle *handle, bool enable) 36665c9f6b39SPeng Li { 36675c9f6b39SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36683462207dSYufeng Mo bool gro_en_old = hdev->gro_en; 36693462207dSYufeng Mo int ret; 36705c9f6b39SPeng Li 36713462207dSYufeng Mo hdev->gro_en = enable; 36723462207dSYufeng Mo ret = hclgevf_config_gro(hdev); 36733462207dSYufeng Mo if (ret) 36743462207dSYufeng Mo hdev->gro_en = gro_en_old; 36753462207dSYufeng Mo 36763462207dSYufeng Mo return ret; 36775c9f6b39SPeng Li } 36785c9f6b39SPeng Li 367988d10bd6SJian Shen static void hclgevf_get_media_type(struct hnae3_handle *handle, u8 *media_type, 368088d10bd6SJian Shen u8 *module_type) 3681c136b884SPeng Li { 3682c136b884SPeng Li struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 368388d10bd6SJian Shen 3684c136b884SPeng Li if (media_type) 3685c136b884SPeng Li *media_type = hdev->hw.mac.media_type; 368688d10bd6SJian Shen 368788d10bd6SJian Shen if (module_type) 368888d10bd6SJian Shen *module_type = hdev->hw.mac.module_type; 3689c136b884SPeng Li } 3690c136b884SPeng Li 36914d60291bSHuazhong Tan static bool hclgevf_get_hw_reset_stat(struct hnae3_handle *handle) 36924d60291bSHuazhong Tan { 36934d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 36944d60291bSHuazhong Tan 3695aa5c4f17SHuazhong Tan return !!hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); 36964d60291bSHuazhong Tan } 36974d60291bSHuazhong Tan 3698fe735c84SHuazhong Tan static bool hclgevf_get_cmdq_stat(struct hnae3_handle *handle) 3699fe735c84SHuazhong Tan { 3700fe735c84SHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 3701fe735c84SHuazhong Tan 3702fe735c84SHuazhong Tan return test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state); 3703fe735c84SHuazhong Tan } 3704fe735c84SHuazhong Tan 37054d60291bSHuazhong Tan static bool hclgevf_ae_dev_resetting(struct hnae3_handle *handle) 37064d60291bSHuazhong Tan { 37074d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37084d60291bSHuazhong Tan 37094d60291bSHuazhong Tan return test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); 37104d60291bSHuazhong Tan } 37114d60291bSHuazhong Tan 37124d60291bSHuazhong Tan static unsigned long hclgevf_ae_dev_reset_cnt(struct hnae3_handle *handle) 37134d60291bSHuazhong Tan { 37144d60291bSHuazhong Tan struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37154d60291bSHuazhong Tan 3716c88a6e7dSHuazhong Tan return hdev->rst_stats.hw_rst_done_cnt; 37174d60291bSHuazhong Tan } 37184d60291bSHuazhong Tan 37199194d18bSliuzhongzhu static void hclgevf_get_link_mode(struct hnae3_handle *handle, 37209194d18bSliuzhongzhu unsigned long *supported, 37219194d18bSliuzhongzhu unsigned long *advertising) 37229194d18bSliuzhongzhu { 37239194d18bSliuzhongzhu struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37249194d18bSliuzhongzhu 37259194d18bSliuzhongzhu *supported = hdev->hw.mac.supported; 37269194d18bSliuzhongzhu *advertising = hdev->hw.mac.advertising; 37279194d18bSliuzhongzhu } 37289194d18bSliuzhongzhu 37291600c3e5SJian Shen #define MAX_SEPARATE_NUM 4 3730e407efddSHuazhong Tan #define SEPARATOR_VALUE 0xFDFCFBFA 37311600c3e5SJian Shen #define REG_NUM_PER_LINE 4 37321600c3e5SJian Shen #define REG_LEN_PER_LINE (REG_NUM_PER_LINE * sizeof(u32)) 37331600c3e5SJian Shen 37341600c3e5SJian Shen static int hclgevf_get_regs_len(struct hnae3_handle *handle) 37351600c3e5SJian Shen { 37361600c3e5SJian Shen int cmdq_lines, common_lines, ring_lines, tqp_intr_lines; 37371600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37381600c3e5SJian Shen 37391600c3e5SJian Shen cmdq_lines = sizeof(cmdq_reg_addr_list) / REG_LEN_PER_LINE + 1; 37401600c3e5SJian Shen common_lines = sizeof(common_reg_addr_list) / REG_LEN_PER_LINE + 1; 37411600c3e5SJian Shen ring_lines = sizeof(ring_reg_addr_list) / REG_LEN_PER_LINE + 1; 37421600c3e5SJian Shen tqp_intr_lines = sizeof(tqp_intr_reg_addr_list) / REG_LEN_PER_LINE + 1; 37431600c3e5SJian Shen 37441600c3e5SJian Shen return (cmdq_lines + common_lines + ring_lines * hdev->num_tqps + 37451600c3e5SJian Shen tqp_intr_lines * (hdev->num_msi_used - 1)) * REG_LEN_PER_LINE; 37461600c3e5SJian Shen } 37471600c3e5SJian Shen 37481600c3e5SJian Shen static void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version, 37491600c3e5SJian Shen void *data) 37501600c3e5SJian Shen { 37511600c3e5SJian Shen struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); 37521600c3e5SJian Shen int i, j, reg_um, separator_num; 37531600c3e5SJian Shen u32 *reg = data; 37541600c3e5SJian Shen 37551600c3e5SJian Shen *version = hdev->fw_version; 37561600c3e5SJian Shen 37571600c3e5SJian Shen /* fetching per-VF registers values from VF PCIe register space */ 37581600c3e5SJian Shen reg_um = sizeof(cmdq_reg_addr_list) / sizeof(u32); 37591600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37601600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37611600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]); 37621600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37631600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37641600c3e5SJian Shen 37651600c3e5SJian Shen reg_um = sizeof(common_reg_addr_list) / sizeof(u32); 37661600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37671600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37681600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]); 37691600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37701600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37711600c3e5SJian Shen 37721600c3e5SJian Shen reg_um = sizeof(ring_reg_addr_list) / sizeof(u32); 37731600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37741600c3e5SJian Shen for (j = 0; j < hdev->num_tqps; j++) { 37751600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37761600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 37771600c3e5SJian Shen ring_reg_addr_list[i] + 37781600c3e5SJian Shen 0x200 * j); 37791600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37801600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37811600c3e5SJian Shen } 37821600c3e5SJian Shen 37831600c3e5SJian Shen reg_um = sizeof(tqp_intr_reg_addr_list) / sizeof(u32); 37841600c3e5SJian Shen separator_num = MAX_SEPARATE_NUM - reg_um % REG_NUM_PER_LINE; 37851600c3e5SJian Shen for (j = 0; j < hdev->num_msi_used - 1; j++) { 37861600c3e5SJian Shen for (i = 0; i < reg_um; i++) 37871600c3e5SJian Shen *reg++ = hclgevf_read_dev(&hdev->hw, 37881600c3e5SJian Shen tqp_intr_reg_addr_list[i] + 37891600c3e5SJian Shen 4 * j); 37901600c3e5SJian Shen for (i = 0; i < separator_num; i++) 37911600c3e5SJian Shen *reg++ = SEPARATOR_VALUE; 37921600c3e5SJian Shen } 37931600c3e5SJian Shen } 37941600c3e5SJian Shen 379592f11ea1SJian Shen void hclgevf_update_port_base_vlan_info(struct hclgevf_dev *hdev, u16 state, 379692f11ea1SJian Shen u8 *port_base_vlan_info, u8 data_size) 379792f11ea1SJian Shen { 379892f11ea1SJian Shen struct hnae3_handle *nic = &hdev->nic; 3799d3410018SYufeng Mo struct hclge_vf_to_pf_msg send_msg; 3800a6f7bfdcSJian Shen int ret; 380192f11ea1SJian Shen 380292f11ea1SJian Shen rtnl_lock(); 3803a6f7bfdcSJian Shen 3804b7b5d25bSGuojia Liao if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || 3805b7b5d25bSGuojia Liao test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) { 3806a6f7bfdcSJian Shen dev_warn(&hdev->pdev->dev, 3807a6f7bfdcSJian Shen "is resetting when updating port based vlan info\n"); 380892f11ea1SJian Shen rtnl_unlock(); 3809a6f7bfdcSJian Shen return; 3810a6f7bfdcSJian Shen } 3811a6f7bfdcSJian Shen 3812a6f7bfdcSJian Shen ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); 3813a6f7bfdcSJian Shen if (ret) { 3814a6f7bfdcSJian Shen rtnl_unlock(); 3815a6f7bfdcSJian Shen return; 3816a6f7bfdcSJian Shen } 381792f11ea1SJian Shen 381892f11ea1SJian Shen /* send msg to PF and wait update port based vlan info */ 3819d3410018SYufeng Mo hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, 3820d3410018SYufeng Mo HCLGE_MBX_PORT_BASE_VLAN_CFG); 3821d3410018SYufeng Mo memcpy(send_msg.data, port_base_vlan_info, data_size); 3822a6f7bfdcSJian Shen ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); 3823a6f7bfdcSJian Shen if (!ret) { 382492f11ea1SJian Shen if (state == HNAE3_PORT_BASE_VLAN_DISABLE) 3825a6f7bfdcSJian Shen nic->port_base_vlan_state = state; 382692f11ea1SJian Shen else 382792f11ea1SJian Shen nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE; 3828a6f7bfdcSJian Shen } 382992f11ea1SJian Shen 383092f11ea1SJian Shen hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); 383192f11ea1SJian Shen rtnl_unlock(); 383292f11ea1SJian Shen } 383392f11ea1SJian Shen 3834e2cb1decSSalil Mehta static const struct hnae3_ae_ops hclgevf_ops = { 3835e2cb1decSSalil Mehta .init_ae_dev = hclgevf_init_ae_dev, 3836e2cb1decSSalil Mehta .uninit_ae_dev = hclgevf_uninit_ae_dev, 3837bb1890d5SJiaran Zhang .reset_prepare = hclgevf_reset_prepare_general, 3838bb1890d5SJiaran Zhang .reset_done = hclgevf_reset_done, 3839e718a93fSPeng Li .init_client_instance = hclgevf_init_client_instance, 3840e718a93fSPeng Li .uninit_client_instance = hclgevf_uninit_client_instance, 3841e2cb1decSSalil Mehta .start = hclgevf_ae_start, 3842e2cb1decSSalil Mehta .stop = hclgevf_ae_stop, 3843a6d818e3SYunsheng Lin .client_start = hclgevf_client_start, 3844a6d818e3SYunsheng Lin .client_stop = hclgevf_client_stop, 3845e2cb1decSSalil Mehta .map_ring_to_vector = hclgevf_map_ring_to_vector, 3846e2cb1decSSalil Mehta .unmap_ring_from_vector = hclgevf_unmap_ring_from_vector, 3847e2cb1decSSalil Mehta .get_vector = hclgevf_get_vector, 38480d3e6631SYunsheng Lin .put_vector = hclgevf_put_vector, 3849e2cb1decSSalil Mehta .reset_queue = hclgevf_reset_tqp, 3850e2cb1decSSalil Mehta .get_mac_addr = hclgevf_get_mac_addr, 3851e2cb1decSSalil Mehta .set_mac_addr = hclgevf_set_mac_addr, 3852e2cb1decSSalil Mehta .add_uc_addr = hclgevf_add_uc_addr, 3853e2cb1decSSalil Mehta .rm_uc_addr = hclgevf_rm_uc_addr, 3854e2cb1decSSalil Mehta .add_mc_addr = hclgevf_add_mc_addr, 3855e2cb1decSSalil Mehta .rm_mc_addr = hclgevf_rm_mc_addr, 3856e2cb1decSSalil Mehta .get_stats = hclgevf_get_stats, 3857e2cb1decSSalil Mehta .update_stats = hclgevf_update_stats, 3858e2cb1decSSalil Mehta .get_strings = hclgevf_get_strings, 3859e2cb1decSSalil Mehta .get_sset_count = hclgevf_get_sset_count, 3860e2cb1decSSalil Mehta .get_rss_key_size = hclgevf_get_rss_key_size, 3861e2cb1decSSalil Mehta .get_rss = hclgevf_get_rss, 3862e2cb1decSSalil Mehta .set_rss = hclgevf_set_rss, 3863d97b3072SJian Shen .get_rss_tuple = hclgevf_get_rss_tuple, 3864d97b3072SJian Shen .set_rss_tuple = hclgevf_set_rss_tuple, 3865e2cb1decSSalil Mehta .get_tc_size = hclgevf_get_tc_size, 3866e2cb1decSSalil Mehta .get_fw_version = hclgevf_get_fw_version, 3867e2cb1decSSalil Mehta .set_vlan_filter = hclgevf_set_vlan_filter, 3868fa6a262aSJian Shen .enable_vlan_filter = hclgevf_enable_vlan_filter, 3869b2641e2aSYunsheng Lin .enable_hw_strip_rxvtag = hclgevf_en_hw_strip_rxvtag, 38706d4c3981SSalil Mehta .reset_event = hclgevf_reset_event, 3871720bd583SHuazhong Tan .set_default_reset_request = hclgevf_set_def_reset_request, 38724093d1a2SGuangbin Huang .set_channels = hclgevf_set_channels, 3873849e4607SPeng Li .get_channels = hclgevf_get_channels, 3874cc719218SPeng Li .get_tqps_and_rss_info = hclgevf_get_tqps_and_rss_info, 38751600c3e5SJian Shen .get_regs_len = hclgevf_get_regs_len, 38761600c3e5SJian Shen .get_regs = hclgevf_get_regs, 3877175ec96bSFuyun Liang .get_status = hclgevf_get_status, 38784a152de9SFuyun Liang .get_ksettings_an_result = hclgevf_get_ksettings_an_result, 3879c136b884SPeng Li .get_media_type = hclgevf_get_media_type, 38804d60291bSHuazhong Tan .get_hw_reset_stat = hclgevf_get_hw_reset_stat, 38814d60291bSHuazhong Tan .ae_dev_resetting = hclgevf_ae_dev_resetting, 38824d60291bSHuazhong Tan .ae_dev_reset_cnt = hclgevf_ae_dev_reset_cnt, 38835c9f6b39SPeng Li .set_gro_en = hclgevf_gro_en, 3884818f1675SYunsheng Lin .set_mtu = hclgevf_set_mtu, 38850c29d191Sliuzhongzhu .get_global_queue_id = hclgevf_get_qid_global, 38868cdb992fSJian Shen .set_timer_task = hclgevf_set_timer_task, 38879194d18bSliuzhongzhu .get_link_mode = hclgevf_get_link_mode, 3888e196ec75SJian Shen .set_promisc_mode = hclgevf_set_promisc_mode, 3889c631c696SJian Shen .request_update_promisc_mode = hclgevf_request_update_promisc_mode, 3890fe735c84SHuazhong Tan .get_cmdq_stat = hclgevf_get_cmdq_stat, 3891e2cb1decSSalil Mehta }; 3892e2cb1decSSalil Mehta 3893e2cb1decSSalil Mehta static struct hnae3_ae_algo ae_algovf = { 3894e2cb1decSSalil Mehta .ops = &hclgevf_ops, 3895e2cb1decSSalil Mehta .pdev_id_table = ae_algovf_pci_tbl, 3896e2cb1decSSalil Mehta }; 3897e2cb1decSSalil Mehta 3898e2cb1decSSalil Mehta static int hclgevf_init(void) 3899e2cb1decSSalil Mehta { 3900e2cb1decSSalil Mehta pr_info("%s is initializing\n", HCLGEVF_NAME); 3901e2cb1decSSalil Mehta 390216deaef2SYunsheng Lin hclgevf_wq = alloc_workqueue("%s", 0, 0, HCLGEVF_NAME); 39030ea68902SYunsheng Lin if (!hclgevf_wq) { 39040ea68902SYunsheng Lin pr_err("%s: failed to create workqueue\n", HCLGEVF_NAME); 39050ea68902SYunsheng Lin return -ENOMEM; 39060ea68902SYunsheng Lin } 39070ea68902SYunsheng Lin 3908854cf33aSFuyun Liang hnae3_register_ae_algo(&ae_algovf); 3909854cf33aSFuyun Liang 3910854cf33aSFuyun Liang return 0; 3911e2cb1decSSalil Mehta } 3912e2cb1decSSalil Mehta 3913e2cb1decSSalil Mehta static void hclgevf_exit(void) 3914e2cb1decSSalil Mehta { 3915e2cb1decSSalil Mehta hnae3_unregister_ae_algo(&ae_algovf); 39160ea68902SYunsheng Lin destroy_workqueue(hclgevf_wq); 3917e2cb1decSSalil Mehta } 3918e2cb1decSSalil Mehta module_init(hclgevf_init); 3919e2cb1decSSalil Mehta module_exit(hclgevf_exit); 3920e2cb1decSSalil Mehta 3921e2cb1decSSalil Mehta MODULE_LICENSE("GPL"); 3922e2cb1decSSalil Mehta MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 3923e2cb1decSSalil Mehta MODULE_DESCRIPTION("HCLGEVF Driver"); 3924e2cb1decSSalil Mehta MODULE_VERSION(HCLGEVF_MOD_VERSION); 3925