1 /* SPDX-License-Identifier: GPL-2.0+ */
2 // Copyright (c) 2021 Hisilicon Limited.
3 
4 #ifndef __HCLGE_PTP_H
5 #define __HCLGE_PTP_H
6 
7 #include <linux/ptp_clock_kernel.h>
8 #include <linux/net_tstamp.h>
9 #include <linux/types.h>
10 
11 #define HCLGE_PTP_REG_OFFSET	0x29000
12 
13 #define HCLGE_PTP_TX_TS_SEQID_REG	0x0
14 #define HCLGE_PTP_TX_TS_NSEC_REG	0x4
15 #define HCLGE_PTP_TX_TS_NSEC_MASK	GENMASK(29, 0)
16 #define HCLGE_PTP_TX_TS_SEC_L_REG	0x8
17 #define HCLGE_PTP_TX_TS_SEC_H_REG	0xC
18 #define HCLGE_PTP_TX_TS_SEC_H_MASK	GENMASK(15, 0)
19 #define HCLGE_PTP_TX_TS_CNT_REG		0x30
20 
21 #define HCLGE_PTP_TIME_SEC_H_REG	0x50
22 #define HCLGE_PTP_TIME_SEC_H_MASK	GENMASK(15, 0)
23 #define HCLGE_PTP_TIME_SEC_L_REG	0x54
24 #define HCLGE_PTP_TIME_NSEC_REG		0x58
25 #define HCLGE_PTP_TIME_NSEC_MASK	GENMASK(29, 0)
26 #define HCLGE_PTP_TIME_NSEC_NEG		BIT(31)
27 #define HCLGE_PTP_TIME_SYNC_REG		0x5C
28 #define HCLGE_PTP_TIME_SYNC_EN		BIT(0)
29 #define HCLGE_PTP_TIME_ADJ_REG		0x60
30 #define HCLGE_PTP_TIME_ADJ_EN		BIT(0)
31 #define HCLGE_PTP_CYCLE_QUO_REG		0x64
32 #define HCLGE_PTP_CYCLE_QUO_MASK	GENMASK(7, 0)
33 #define HCLGE_PTP_CYCLE_DEN_REG		0x68
34 #define HCLGE_PTP_CYCLE_NUM_REG		0x6C
35 #define HCLGE_PTP_CYCLE_CFG_REG		0x70
36 #define HCLGE_PTP_CYCLE_ADJ_EN		BIT(0)
37 #define HCLGE_PTP_CUR_TIME_SEC_H_REG	0x74
38 #define HCLGE_PTP_CUR_TIME_SEC_L_REG	0x78
39 #define HCLGE_PTP_CUR_TIME_NSEC_REG	0x7C
40 
41 #define HCLGE_PTP_CYCLE_ADJ_MAX		500000000
42 #define HCLGE_PTP_SEC_H_OFFSET		32u
43 #define HCLGE_PTP_SEC_L_MASK		GENMASK(31, 0)
44 
45 #define HCLGE_PTP_FLAG_EN		0
46 #define HCLGE_PTP_FLAG_TX_EN		1
47 #define HCLGE_PTP_FLAG_RX_EN		2
48 
49 struct hclge_ptp_cycle {
50 	u32 quo;
51 	u32 numer;
52 	u32 den;
53 };
54 
55 struct hclge_ptp {
56 	struct hclge_dev *hdev;
57 	struct ptp_clock *clock;
58 	struct sk_buff *tx_skb;
59 	unsigned long flags;
60 	void __iomem *io_base;
61 	struct ptp_clock_info info;
62 	struct hwtstamp_config ts_cfg;
63 	spinlock_t lock;	/* protects ptp registers */
64 	u32 ptp_cfg;
65 	u32 last_tx_seqid;
66 	struct hclge_ptp_cycle cycle;
67 	unsigned long tx_start;
68 	unsigned long tx_cnt;
69 	unsigned long tx_skipped;
70 	unsigned long tx_cleaned;
71 	unsigned long last_rx;
72 	unsigned long rx_cnt;
73 	unsigned long tx_timeout;
74 };
75 
76 struct hclge_ptp_int_cmd {
77 #define HCLGE_PTP_INT_EN_B	BIT(0)
78 
79 	u8 int_en;
80 	u8 rsvd[23];
81 };
82 
83 enum hclge_ptp_udp_type {
84 	HCLGE_PTP_UDP_NOT_TYPE,
85 	HCLGE_PTP_UDP_P13F_TYPE,
86 	HCLGE_PTP_UDP_P140_TYPE,
87 	HCLGE_PTP_UDP_FULL_TYPE,
88 };
89 
90 enum hclge_ptp_msg_type {
91 	HCLGE_PTP_MSG_TYPE_V2_L2,
92 	HCLGE_PTP_MSG_TYPE_V2,
93 	HCLGE_PTP_MSG_TYPE_V2_EVENT,
94 };
95 
96 enum hclge_ptp_msg0_type {
97 	HCLGE_PTP_MSG0_V2_DELAY_REQ = 1,
98 	HCLGE_PTP_MSG0_V2_PDELAY_REQ,
99 	HCLGE_PTP_MSG0_V2_DELAY_RESP,
100 	HCLGE_PTP_MSG0_V2_EVENT = 0xF,
101 };
102 
103 #define HCLGE_PTP_MSG1_V2_DEFAULT	1
104 
105 struct hclge_ptp_cfg_cmd {
106 #define HCLGE_PTP_EN_B			BIT(0)
107 #define HCLGE_PTP_TX_EN_B		BIT(1)
108 #define HCLGE_PTP_RX_EN_B		BIT(2)
109 #define HCLGE_PTP_UDP_EN_SHIFT		3
110 #define HCLGE_PTP_UDP_EN_MASK		GENMASK(4, 3)
111 #define HCLGE_PTP_MSG_TYPE_SHIFT	8
112 #define HCLGE_PTP_MSG_TYPE_MASK		GENMASK(9, 8)
113 #define HCLGE_PTP_MSG1_SHIFT		16
114 #define HCLGE_PTP_MSG1_MASK		GENMASK(19, 16)
115 #define HCLGE_PTP_MSG0_SHIFT		24
116 #define HCLGE_PTP_MSG0_MASK		GENMASK(27, 24)
117 
118 	__le32 cfg;
119 	u8 rsvd[20];
120 };
121 
122 static inline struct hclge_dev *hclge_ptp_get_hdev(struct ptp_clock_info *info)
123 {
124 	struct hclge_ptp *ptp = container_of(info, struct hclge_ptp, info);
125 
126 	return ptp->hdev;
127 }
128 
129 bool hclge_ptp_set_tx_info(struct hnae3_handle *handle, struct sk_buff *skb);
130 void hclge_ptp_clean_tx_hwts(struct hclge_dev *hdev);
131 void hclge_ptp_get_rx_hwts(struct hnae3_handle *handle, struct sk_buff *skb,
132 			   u32 nsec, u32 sec);
133 int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr);
134 int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr);
135 int hclge_ptp_init(struct hclge_dev *hdev);
136 void hclge_ptp_uninit(struct hclge_dev *hdev);
137 int hclge_ptp_get_ts_info(struct hnae3_handle *handle,
138 			  struct ethtool_ts_info *info);
139 int hclge_ptp_cfg_qry(struct hclge_dev *hdev, u32 *cfg);
140 #endif
141