1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 // Copyright (c) 2021 Hisilicon Limited. 3 4 #ifndef __HCLGE_PTP_H 5 #define __HCLGE_PTP_H 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/net_tstamp.h> 9 #include <linux/types.h> 10 11 #define HCLGE_PTP_REG_OFFSET 0x29000 12 13 #define HCLGE_PTP_TX_TS_SEQID_REG 0x0 14 #define HCLGE_PTP_TX_TS_NSEC_REG 0x4 15 #define HCLGE_PTP_TX_TS_NSEC_MASK GENMASK(29, 0) 16 #define HCLGE_PTP_TX_TS_SEC_L_REG 0x8 17 #define HCLGE_PTP_TX_TS_SEC_H_REG 0xC 18 #define HCLGE_PTP_TX_TS_SEC_H_MASK GENMASK(15, 0) 19 #define HCLGE_PTP_TX_TS_CNT_REG 0x30 20 21 #define HCLGE_PTP_TIME_SEC_H_REG 0x50 22 #define HCLGE_PTP_TIME_SEC_H_MASK GENMASK(15, 0) 23 #define HCLGE_PTP_TIME_SEC_L_REG 0x54 24 #define HCLGE_PTP_TIME_NSEC_REG 0x58 25 #define HCLGE_PTP_TIME_NSEC_MASK GENMASK(29, 0) 26 #define HCLGE_PTP_TIME_NSEC_NEG BIT(31) 27 #define HCLGE_PTP_TIME_SYNC_REG 0x5C 28 #define HCLGE_PTP_TIME_SYNC_EN BIT(0) 29 #define HCLGE_PTP_TIME_ADJ_REG 0x60 30 #define HCLGE_PTP_TIME_ADJ_EN BIT(0) 31 #define HCLGE_PTP_CYCLE_QUO_REG 0x64 32 #define HCLGE_PTP_CYCLE_DEN_REG 0x68 33 #define HCLGE_PTP_CYCLE_NUM_REG 0x6C 34 #define HCLGE_PTP_CYCLE_CFG_REG 0x70 35 #define HCLGE_PTP_CYCLE_ADJ_EN BIT(0) 36 #define HCLGE_PTP_CUR_TIME_SEC_H_REG 0x74 37 #define HCLGE_PTP_CUR_TIME_SEC_L_REG 0x78 38 #define HCLGE_PTP_CUR_TIME_NSEC_REG 0x7C 39 40 #define HCLGE_PTP_CYCLE_ADJ_BASE 2 41 #define HCLGE_PTP_CYCLE_ADJ_MAX 500000000 42 #define HCLGE_PTP_CYCLE_ADJ_UNIT 100000000 43 #define HCLGE_PTP_SEC_H_OFFSET 32u 44 #define HCLGE_PTP_SEC_L_MASK GENMASK(31, 0) 45 46 #define HCLGE_PTP_FLAG_EN 0 47 #define HCLGE_PTP_FLAG_TX_EN 1 48 #define HCLGE_PTP_FLAG_RX_EN 2 49 50 struct hclge_ptp { 51 struct hclge_dev *hdev; 52 struct ptp_clock *clock; 53 struct sk_buff *tx_skb; 54 unsigned long flags; 55 void __iomem *io_base; 56 struct ptp_clock_info info; 57 struct hwtstamp_config ts_cfg; 58 spinlock_t lock; /* protects ptp registers */ 59 u32 ptp_cfg; 60 u32 last_tx_seqid; 61 unsigned long tx_start; 62 unsigned long tx_cnt; 63 unsigned long tx_skipped; 64 unsigned long tx_cleaned; 65 unsigned long last_rx; 66 unsigned long rx_cnt; 67 unsigned long tx_timeout; 68 }; 69 70 struct hclge_ptp_int_cmd { 71 #define HCLGE_PTP_INT_EN_B BIT(0) 72 73 u8 int_en; 74 u8 rsvd[23]; 75 }; 76 77 enum hclge_ptp_udp_type { 78 HCLGE_PTP_UDP_NOT_TYPE, 79 HCLGE_PTP_UDP_P13F_TYPE, 80 HCLGE_PTP_UDP_P140_TYPE, 81 HCLGE_PTP_UDP_FULL_TYPE, 82 }; 83 84 enum hclge_ptp_msg_type { 85 HCLGE_PTP_MSG_TYPE_V2_L2, 86 HCLGE_PTP_MSG_TYPE_V2, 87 HCLGE_PTP_MSG_TYPE_V2_EVENT, 88 }; 89 90 enum hclge_ptp_msg0_type { 91 HCLGE_PTP_MSG0_V2_DELAY_REQ = 1, 92 HCLGE_PTP_MSG0_V2_PDELAY_REQ, 93 HCLGE_PTP_MSG0_V2_DELAY_RESP, 94 HCLGE_PTP_MSG0_V2_EVENT = 0xF, 95 }; 96 97 #define HCLGE_PTP_MSG1_V2_DEFAULT 1 98 99 struct hclge_ptp_cfg_cmd { 100 #define HCLGE_PTP_EN_B BIT(0) 101 #define HCLGE_PTP_TX_EN_B BIT(1) 102 #define HCLGE_PTP_RX_EN_B BIT(2) 103 #define HCLGE_PTP_UDP_EN_SHIFT 3 104 #define HCLGE_PTP_UDP_EN_MASK GENMASK(4, 3) 105 #define HCLGE_PTP_MSG_TYPE_SHIFT 8 106 #define HCLGE_PTP_MSG_TYPE_MASK GENMASK(9, 8) 107 #define HCLGE_PTP_MSG1_SHIFT 16 108 #define HCLGE_PTP_MSG1_MASK GENMASK(19, 16) 109 #define HCLGE_PTP_MSG0_SHIFT 24 110 #define HCLGE_PTP_MSG0_MASK GENMASK(27, 24) 111 112 __le32 cfg; 113 u8 rsvd[20]; 114 }; 115 116 static inline struct hclge_dev *hclge_ptp_get_hdev(struct ptp_clock_info *info) 117 { 118 struct hclge_ptp *ptp = container_of(info, struct hclge_ptp, info); 119 120 return ptp->hdev; 121 } 122 123 bool hclge_ptp_set_tx_info(struct hnae3_handle *handle, struct sk_buff *skb); 124 void hclge_ptp_clean_tx_hwts(struct hclge_dev *dev); 125 void hclge_ptp_get_rx_hwts(struct hnae3_handle *handle, struct sk_buff *skb, 126 u32 nsec, u32 sec); 127 int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr); 128 int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr); 129 int hclge_ptp_init(struct hclge_dev *hdev); 130 void hclge_ptp_uninit(struct hclge_dev *hdev); 131 int hclge_ptp_get_ts_info(struct hnae3_handle *handle, 132 struct ethtool_ts_info *info); 133 int hclge_ptp_cfg_qry(struct hclge_dev *hdev, u32 *cfg); 134 #endif 135