1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #include "hclge_main.h" 5 #include "hclge_mbx.h" 6 #include "hnae3.h" 7 8 /* hclge_gen_resp_to_vf: used to generate a synchronous response to VF when PF 9 * receives a mailbox message from VF. 10 * @vport: pointer to struct hclge_vport 11 * @vf_to_pf_req: pointer to hclge_mbx_vf_to_pf_cmd of the original mailbox 12 * message 13 * @resp_status: indicate to VF whether its request success(0) or failed. 14 */ 15 static int hclge_gen_resp_to_vf(struct hclge_vport *vport, 16 struct hclge_mbx_vf_to_pf_cmd *vf_to_pf_req, 17 int resp_status, 18 u8 *resp_data, u16 resp_data_len) 19 { 20 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 21 struct hclge_dev *hdev = vport->back; 22 enum hclge_cmd_status status; 23 struct hclge_desc desc; 24 25 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 26 27 if (resp_data_len > HCLGE_MBX_MAX_RESP_DATA_SIZE) { 28 dev_err(&hdev->pdev->dev, 29 "PF fail to gen resp to VF len %d exceeds max len %d\n", 30 resp_data_len, 31 HCLGE_MBX_MAX_RESP_DATA_SIZE); 32 } 33 34 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 35 36 resp_pf_to_vf->dest_vfid = vf_to_pf_req->mbx_src_vfid; 37 resp_pf_to_vf->msg_len = vf_to_pf_req->msg_len; 38 39 resp_pf_to_vf->msg[0] = HCLGE_MBX_PF_VF_RESP; 40 resp_pf_to_vf->msg[1] = vf_to_pf_req->msg[0]; 41 resp_pf_to_vf->msg[2] = vf_to_pf_req->msg[1]; 42 resp_pf_to_vf->msg[3] = (resp_status == 0) ? 0 : 1; 43 44 if (resp_data && resp_data_len > 0) 45 memcpy(&resp_pf_to_vf->msg[4], resp_data, resp_data_len); 46 47 status = hclge_cmd_send(&hdev->hw, &desc, 1); 48 if (status) 49 dev_err(&hdev->pdev->dev, 50 "PF failed(=%d) to send response to VF\n", status); 51 52 return status; 53 } 54 55 static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len, 56 u16 mbx_opcode, u8 dest_vfid) 57 { 58 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 59 struct hclge_dev *hdev = vport->back; 60 enum hclge_cmd_status status; 61 struct hclge_desc desc; 62 63 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 64 65 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 66 67 resp_pf_to_vf->dest_vfid = dest_vfid; 68 resp_pf_to_vf->msg_len = msg_len; 69 resp_pf_to_vf->msg[0] = mbx_opcode; 70 71 memcpy(&resp_pf_to_vf->msg[1], msg, msg_len); 72 73 status = hclge_cmd_send(&hdev->hw, &desc, 1); 74 if (status) 75 dev_err(&hdev->pdev->dev, 76 "PF failed(=%d) to send mailbox message to VF\n", 77 status); 78 79 return status; 80 } 81 82 static int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport) 83 { 84 u8 msg_data[2]; 85 u8 dest_vfid; 86 87 dest_vfid = (u8)vport->vport_id; 88 89 /* send this requested info to VF */ 90 return hclge_send_mbx_msg(vport, msg_data, sizeof(u8), 91 HCLGE_MBX_ASSERTING_RESET, dest_vfid); 92 } 93 94 static void hclge_free_vector_ring_chain(struct hnae3_ring_chain_node *head) 95 { 96 struct hnae3_ring_chain_node *chain_tmp, *chain; 97 98 chain = head->next; 99 100 while (chain) { 101 chain_tmp = chain->next; 102 kzfree(chain); 103 chain = chain_tmp; 104 } 105 } 106 107 /* hclge_get_ring_chain_from_mbx: get ring type & tqpid from mailbox message 108 * msg[0]: opcode 109 * msg[1]: <not relevant to this function> 110 * msg[2]: ring_num 111 * msg[3]: first ring type (TX|RX) 112 * msg[4]: first tqp id 113 * msg[5] ~ msg[14]: other ring type and tqp id 114 */ 115 static int hclge_get_ring_chain_from_mbx( 116 struct hclge_mbx_vf_to_pf_cmd *req, 117 struct hnae3_ring_chain_node *ring_chain, 118 struct hclge_vport *vport) 119 { 120 struct hnae3_ring_chain_node *cur_chain, *new_chain; 121 int ring_num; 122 int i; 123 124 ring_num = req->msg[2]; 125 126 if (ring_num > ((HCLGE_MBX_VF_MSG_DATA_NUM - 127 HCLGE_MBX_RING_MAP_BASIC_MSG_NUM) / 128 HCLGE_MBX_RING_NODE_VARIABLE_NUM)) 129 return -ENOMEM; 130 131 hnae_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B, req->msg[3]); 132 ring_chain->tqp_index = 133 hclge_get_queue_id(vport->nic.kinfo.tqp[req->msg[4]]); 134 hnae_set_field(ring_chain->int_gl_idx, HCLGE_INT_GL_IDX_M, 135 HCLGE_INT_GL_IDX_S, 136 req->msg[5]); 137 138 cur_chain = ring_chain; 139 140 for (i = 1; i < ring_num; i++) { 141 new_chain = kzalloc(sizeof(*new_chain), GFP_KERNEL); 142 if (!new_chain) 143 goto err; 144 145 hnae_set_bit(new_chain->flag, HNAE3_RING_TYPE_B, 146 req->msg[HCLGE_MBX_RING_NODE_VARIABLE_NUM * i + 147 HCLGE_MBX_RING_MAP_BASIC_MSG_NUM]); 148 149 new_chain->tqp_index = 150 hclge_get_queue_id(vport->nic.kinfo.tqp 151 [req->msg[HCLGE_MBX_RING_NODE_VARIABLE_NUM * i + 152 HCLGE_MBX_RING_MAP_BASIC_MSG_NUM + 1]]); 153 154 hnae_set_field(new_chain->int_gl_idx, HCLGE_INT_GL_IDX_M, 155 HCLGE_INT_GL_IDX_S, 156 req->msg[HCLGE_MBX_RING_NODE_VARIABLE_NUM * i + 157 HCLGE_MBX_RING_MAP_BASIC_MSG_NUM + 2]); 158 159 cur_chain->next = new_chain; 160 cur_chain = new_chain; 161 } 162 163 return 0; 164 err: 165 hclge_free_vector_ring_chain(ring_chain); 166 return -ENOMEM; 167 } 168 169 static int hclge_map_unmap_ring_to_vf_vector(struct hclge_vport *vport, bool en, 170 struct hclge_mbx_vf_to_pf_cmd *req) 171 { 172 struct hnae3_ring_chain_node ring_chain; 173 int vector_id = req->msg[1]; 174 int ret; 175 176 memset(&ring_chain, 0, sizeof(ring_chain)); 177 ret = hclge_get_ring_chain_from_mbx(req, &ring_chain, vport); 178 if (ret) 179 return ret; 180 181 ret = hclge_bind_ring_with_vector(vport, vector_id, en, &ring_chain); 182 if (ret) 183 return ret; 184 185 hclge_free_vector_ring_chain(&ring_chain); 186 187 return 0; 188 } 189 190 static int hclge_set_vf_promisc_mode(struct hclge_vport *vport, 191 struct hclge_mbx_vf_to_pf_cmd *req) 192 { 193 bool en_uc = req->msg[1] ? true : false; 194 bool en_mc = req->msg[2] ? true : false; 195 struct hclge_promisc_param param; 196 197 /* always enable broadcast promisc bit */ 198 hclge_promisc_param_init(¶m, en_uc, en_mc, true, vport->vport_id); 199 return hclge_cmd_set_promisc_mode(vport->back, ¶m); 200 } 201 202 static int hclge_set_vf_uc_mac_addr(struct hclge_vport *vport, 203 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 204 bool gen_resp) 205 { 206 const u8 *mac_addr = (const u8 *)(&mbx_req->msg[2]); 207 struct hclge_dev *hdev = vport->back; 208 int status; 209 210 if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_UC_MODIFY) { 211 const u8 *old_addr = (const u8 *)(&mbx_req->msg[8]); 212 213 hclge_rm_uc_addr_common(vport, old_addr); 214 status = hclge_add_uc_addr_common(vport, mac_addr); 215 if (status) 216 hclge_add_uc_addr_common(vport, old_addr); 217 } else if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_UC_ADD) { 218 status = hclge_add_uc_addr_common(vport, mac_addr); 219 } else if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_UC_REMOVE) { 220 status = hclge_rm_uc_addr_common(vport, mac_addr); 221 } else { 222 dev_err(&hdev->pdev->dev, 223 "failed to set unicast mac addr, unknown subcode %d\n", 224 mbx_req->msg[1]); 225 return -EIO; 226 } 227 228 if (gen_resp) 229 hclge_gen_resp_to_vf(vport, mbx_req, status, NULL, 0); 230 231 return 0; 232 } 233 234 static int hclge_set_vf_mc_mta_status(struct hclge_vport *vport, 235 u8 *msg, u8 idx, bool is_end) 236 { 237 #define HCLGE_MTA_STATUS_MSG_SIZE 13 238 #define HCLGE_MTA_STATUS_MSG_BITS \ 239 (HCLGE_MTA_STATUS_MSG_SIZE * BITS_PER_BYTE) 240 #define HCLGE_MTA_STATUS_MSG_END_BITS \ 241 (HCLGE_MTA_TBL_SIZE % HCLGE_MTA_STATUS_MSG_BITS) 242 unsigned long status[BITS_TO_LONGS(HCLGE_MTA_STATUS_MSG_BITS)]; 243 u16 tbl_cnt; 244 u16 tbl_idx; 245 u8 msg_ofs; 246 u8 msg_bit; 247 248 tbl_cnt = is_end ? HCLGE_MTA_STATUS_MSG_END_BITS : 249 HCLGE_MTA_STATUS_MSG_BITS; 250 251 /* set msg field */ 252 msg_ofs = 0; 253 msg_bit = 0; 254 memset(status, 0, sizeof(status)); 255 for (tbl_idx = 0; tbl_idx < tbl_cnt; tbl_idx++) { 256 if (msg[msg_ofs] & BIT(msg_bit)) 257 set_bit(tbl_idx, status); 258 259 msg_bit++; 260 if (msg_bit == BITS_PER_BYTE) { 261 msg_bit = 0; 262 msg_ofs++; 263 } 264 } 265 266 return hclge_update_mta_status_common(vport, 267 status, idx * HCLGE_MTA_STATUS_MSG_BITS, 268 tbl_cnt, is_end); 269 } 270 271 static int hclge_set_vf_mc_mac_addr(struct hclge_vport *vport, 272 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 273 bool gen_resp) 274 { 275 const u8 *mac_addr = (const u8 *)(&mbx_req->msg[2]); 276 struct hclge_dev *hdev = vport->back; 277 u8 resp_len = 0; 278 u8 resp_data; 279 int status; 280 281 if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_MC_ADD) { 282 status = hclge_add_mc_addr_common(vport, mac_addr); 283 } else if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_MC_REMOVE) { 284 status = hclge_rm_mc_addr_common(vport, mac_addr); 285 } else if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_MC_FUNC_MTA_ENABLE) { 286 u8 func_id = vport->vport_id; 287 bool enable = mbx_req->msg[2]; 288 289 status = hclge_cfg_func_mta_filter(hdev, func_id, enable); 290 } else if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_MTA_TYPE_READ) { 291 resp_data = hdev->mta_mac_sel_type; 292 resp_len = sizeof(u8); 293 gen_resp = true; 294 status = 0; 295 } else if (mbx_req->msg[1] == HCLGE_MBX_MAC_VLAN_MTA_STATUS_UPDATE) { 296 /* mta status update msg format 297 * msg[2.6 : 2.0] msg index 298 * msg[2.7] msg is end 299 * msg[15 : 3] mta status bits[103 : 0] 300 */ 301 bool is_end = (mbx_req->msg[2] & 0x80) ? true : false; 302 303 status = hclge_set_vf_mc_mta_status(vport, &mbx_req->msg[3], 304 mbx_req->msg[2] & 0x7F, 305 is_end); 306 } else { 307 dev_err(&hdev->pdev->dev, 308 "failed to set mcast mac addr, unknown subcode %d\n", 309 mbx_req->msg[1]); 310 return -EIO; 311 } 312 313 if (gen_resp) 314 hclge_gen_resp_to_vf(vport, mbx_req, status, 315 &resp_data, resp_len); 316 317 return 0; 318 } 319 320 static int hclge_set_vf_vlan_cfg(struct hclge_vport *vport, 321 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 322 bool gen_resp) 323 { 324 int status = 0; 325 326 if (mbx_req->msg[1] == HCLGE_MBX_VLAN_FILTER) { 327 struct hnae3_handle *handle = &vport->nic; 328 u16 vlan, proto; 329 bool is_kill; 330 331 is_kill = !!mbx_req->msg[2]; 332 memcpy(&vlan, &mbx_req->msg[3], sizeof(vlan)); 333 memcpy(&proto, &mbx_req->msg[5], sizeof(proto)); 334 status = hclge_set_vlan_filter(handle, cpu_to_be16(proto), 335 vlan, is_kill); 336 } else if (mbx_req->msg[1] == HCLGE_MBX_VLAN_RX_OFF_CFG) { 337 struct hnae3_handle *handle = &vport->nic; 338 bool en = mbx_req->msg[2] ? true : false; 339 340 status = hclge_en_hw_strip_rxvtag(handle, en); 341 } 342 343 if (gen_resp) 344 status = hclge_gen_resp_to_vf(vport, mbx_req, status, NULL, 0); 345 346 return status; 347 } 348 349 static int hclge_get_vf_tcinfo(struct hclge_vport *vport, 350 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 351 bool gen_resp) 352 { 353 struct hclge_dev *hdev = vport->back; 354 int ret; 355 356 ret = hclge_gen_resp_to_vf(vport, mbx_req, 0, &hdev->hw_tc_map, 357 sizeof(u8)); 358 359 return ret; 360 } 361 362 static int hclge_get_vf_queue_info(struct hclge_vport *vport, 363 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 364 bool gen_resp) 365 { 366 #define HCLGE_TQPS_RSS_INFO_LEN 8 367 u8 resp_data[HCLGE_TQPS_RSS_INFO_LEN]; 368 struct hclge_dev *hdev = vport->back; 369 370 /* get the queue related info */ 371 memcpy(&resp_data[0], &vport->alloc_tqps, sizeof(u16)); 372 memcpy(&resp_data[2], &vport->nic.kinfo.rss_size, sizeof(u16)); 373 memcpy(&resp_data[4], &hdev->num_desc, sizeof(u16)); 374 memcpy(&resp_data[6], &hdev->rx_buf_len, sizeof(u16)); 375 376 return hclge_gen_resp_to_vf(vport, mbx_req, 0, resp_data, 377 HCLGE_TQPS_RSS_INFO_LEN); 378 } 379 380 static int hclge_get_link_info(struct hclge_vport *vport, 381 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 382 { 383 struct hclge_dev *hdev = vport->back; 384 u16 link_status; 385 u8 msg_data[8]; 386 u8 dest_vfid; 387 u16 duplex; 388 389 /* mac.link can only be 0 or 1 */ 390 link_status = (u16)hdev->hw.mac.link; 391 duplex = hdev->hw.mac.duplex; 392 memcpy(&msg_data[0], &link_status, sizeof(u16)); 393 memcpy(&msg_data[2], &hdev->hw.mac.speed, sizeof(u32)); 394 memcpy(&msg_data[6], &duplex, sizeof(u16)); 395 dest_vfid = mbx_req->mbx_src_vfid; 396 397 /* send this requested info to VF */ 398 return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 399 HCLGE_MBX_LINK_STAT_CHANGE, dest_vfid); 400 } 401 402 static void hclge_mbx_reset_vf_queue(struct hclge_vport *vport, 403 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 404 { 405 u16 queue_id; 406 407 memcpy(&queue_id, &mbx_req->msg[2], sizeof(queue_id)); 408 409 hclge_reset_vf_queue(vport, queue_id); 410 411 /* send response msg to VF after queue reset complete*/ 412 hclge_gen_resp_to_vf(vport, mbx_req, 0, NULL, 0); 413 } 414 415 static void hclge_reset_vf(struct hclge_vport *vport, 416 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 417 { 418 struct hclge_dev *hdev = vport->back; 419 int ret; 420 421 dev_warn(&hdev->pdev->dev, "PF received VF reset request from VF %d!", 422 mbx_req->mbx_src_vfid); 423 424 /* Acknowledge VF that PF is now about to assert the reset for the VF. 425 * On receiving this message VF will get into pending state and will 426 * start polling for the hardware reset completion status. 427 */ 428 ret = hclge_inform_reset_assert_to_vf(vport); 429 if (ret) { 430 dev_err(&hdev->pdev->dev, 431 "PF fail(%d) to inform VF(%d)of reset, reset failed!\n", 432 ret, vport->vport_id); 433 return; 434 } 435 436 dev_warn(&hdev->pdev->dev, "PF is now resetting VF %d.\n", 437 mbx_req->mbx_src_vfid); 438 /* reset this virtual function */ 439 hclge_func_reset_cmd(hdev, mbx_req->mbx_src_vfid); 440 } 441 442 static bool hclge_cmd_crq_empty(struct hclge_hw *hw) 443 { 444 u32 tail = hclge_read_dev(hw, HCLGE_NIC_CRQ_TAIL_REG); 445 446 return tail == hw->cmq.crq.next_to_use; 447 } 448 449 void hclge_mbx_handler(struct hclge_dev *hdev) 450 { 451 struct hclge_cmq_ring *crq = &hdev->hw.cmq.crq; 452 struct hclge_mbx_vf_to_pf_cmd *req; 453 struct hclge_vport *vport; 454 struct hclge_desc *desc; 455 int ret, flag; 456 457 /* handle all the mailbox requests in the queue */ 458 while (!hclge_cmd_crq_empty(&hdev->hw)) { 459 desc = &crq->desc[crq->next_to_use]; 460 req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data; 461 462 flag = le16_to_cpu(crq->desc[crq->next_to_use].flag); 463 if (unlikely(!hnae_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) { 464 dev_warn(&hdev->pdev->dev, 465 "dropped invalid mailbox message, code = %d\n", 466 req->msg[0]); 467 468 /* dropping/not processing this invalid message */ 469 crq->desc[crq->next_to_use].flag = 0; 470 hclge_mbx_ring_ptr_move_crq(crq); 471 continue; 472 } 473 474 vport = &hdev->vport[req->mbx_src_vfid]; 475 476 switch (req->msg[0]) { 477 case HCLGE_MBX_MAP_RING_TO_VECTOR: 478 ret = hclge_map_unmap_ring_to_vf_vector(vport, true, 479 req); 480 break; 481 case HCLGE_MBX_UNMAP_RING_TO_VECTOR: 482 ret = hclge_map_unmap_ring_to_vf_vector(vport, false, 483 req); 484 break; 485 case HCLGE_MBX_SET_PROMISC_MODE: 486 ret = hclge_set_vf_promisc_mode(vport, req); 487 if (ret) 488 dev_err(&hdev->pdev->dev, 489 "PF fail(%d) to set VF promisc mode\n", 490 ret); 491 break; 492 case HCLGE_MBX_SET_UNICAST: 493 ret = hclge_set_vf_uc_mac_addr(vport, req, true); 494 if (ret) 495 dev_err(&hdev->pdev->dev, 496 "PF fail(%d) to set VF UC MAC Addr\n", 497 ret); 498 break; 499 case HCLGE_MBX_SET_MULTICAST: 500 ret = hclge_set_vf_mc_mac_addr(vport, req, false); 501 if (ret) 502 dev_err(&hdev->pdev->dev, 503 "PF fail(%d) to set VF MC MAC Addr\n", 504 ret); 505 break; 506 case HCLGE_MBX_SET_VLAN: 507 ret = hclge_set_vf_vlan_cfg(vport, req, false); 508 if (ret) 509 dev_err(&hdev->pdev->dev, 510 "PF failed(%d) to config VF's VLAN\n", 511 ret); 512 break; 513 case HCLGE_MBX_GET_QINFO: 514 ret = hclge_get_vf_queue_info(vport, req, true); 515 if (ret) 516 dev_err(&hdev->pdev->dev, 517 "PF failed(%d) to get Q info for VF\n", 518 ret); 519 break; 520 case HCLGE_MBX_GET_TCINFO: 521 ret = hclge_get_vf_tcinfo(vport, req, true); 522 if (ret) 523 dev_err(&hdev->pdev->dev, 524 "PF failed(%d) to get TC info for VF\n", 525 ret); 526 break; 527 case HCLGE_MBX_GET_LINK_STATUS: 528 ret = hclge_get_link_info(vport, req); 529 if (ret) 530 dev_err(&hdev->pdev->dev, 531 "PF fail(%d) to get link stat for VF\n", 532 ret); 533 break; 534 case HCLGE_MBX_QUEUE_RESET: 535 hclge_mbx_reset_vf_queue(vport, req); 536 break; 537 case HCLGE_MBX_RESET: 538 hclge_reset_vf(vport, req); 539 break; 540 default: 541 dev_err(&hdev->pdev->dev, 542 "un-supported mailbox message, code = %d\n", 543 req->msg[0]); 544 break; 545 } 546 crq->desc[crq->next_to_use].flag = 0; 547 hclge_mbx_ring_ptr_move_crq(crq); 548 } 549 550 /* Write back CMDQ_RQ header pointer, M7 need this pointer */ 551 hclge_write_dev(&hdev->hw, HCLGE_NIC_CRQ_HEAD_REG, crq->next_to_use); 552 } 553