1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #include "hclge_main.h" 5 #include "hclge_mbx.h" 6 #include "hnae3.h" 7 #include "hclge_comm_rss.h" 8 9 #define CREATE_TRACE_POINTS 10 #include "hclge_trace.h" 11 12 static u16 hclge_errno_to_resp(int errno) 13 { 14 int resp = abs(errno); 15 16 /* The status for pf to vf msg cmd is u16, constrainted by HW. 17 * We need to keep the same type with it. 18 * The intput errno is the stander error code, it's safely to 19 * use a u16 to store the abs(errno). 20 */ 21 return (u16)resp; 22 } 23 24 /* hclge_gen_resp_to_vf: used to generate a synchronous response to VF when PF 25 * receives a mailbox message from VF. 26 * @vport: pointer to struct hclge_vport 27 * @vf_to_pf_req: pointer to hclge_mbx_vf_to_pf_cmd of the original mailbox 28 * message 29 * @resp_status: indicate to VF whether its request success(0) or failed. 30 */ 31 static int hclge_gen_resp_to_vf(struct hclge_vport *vport, 32 struct hclge_mbx_vf_to_pf_cmd *vf_to_pf_req, 33 struct hclge_respond_to_vf_msg *resp_msg) 34 { 35 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 36 struct hclge_dev *hdev = vport->back; 37 enum hclge_comm_cmd_status status; 38 struct hclge_desc desc; 39 u16 resp; 40 41 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 42 43 if (resp_msg->len > HCLGE_MBX_MAX_RESP_DATA_SIZE) { 44 dev_err(&hdev->pdev->dev, 45 "PF fail to gen resp to VF len %u exceeds max len %u\n", 46 resp_msg->len, 47 HCLGE_MBX_MAX_RESP_DATA_SIZE); 48 /* If resp_msg->len is too long, set the value to max length 49 * and return the msg to VF 50 */ 51 resp_msg->len = HCLGE_MBX_MAX_RESP_DATA_SIZE; 52 } 53 54 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 55 56 resp_pf_to_vf->dest_vfid = vf_to_pf_req->mbx_src_vfid; 57 resp_pf_to_vf->msg_len = vf_to_pf_req->msg_len; 58 resp_pf_to_vf->match_id = vf_to_pf_req->match_id; 59 60 resp_pf_to_vf->msg.code = HCLGE_MBX_PF_VF_RESP; 61 resp_pf_to_vf->msg.vf_mbx_msg_code = vf_to_pf_req->msg.code; 62 resp_pf_to_vf->msg.vf_mbx_msg_subcode = vf_to_pf_req->msg.subcode; 63 resp = hclge_errno_to_resp(resp_msg->status); 64 if (resp < SHRT_MAX) { 65 resp_pf_to_vf->msg.resp_status = resp; 66 } else { 67 dev_warn(&hdev->pdev->dev, 68 "failed to send response to VF, response status %u is out-of-bound\n", 69 resp); 70 resp_pf_to_vf->msg.resp_status = EIO; 71 } 72 73 if (resp_msg->len > 0) 74 memcpy(resp_pf_to_vf->msg.resp_data, resp_msg->data, 75 resp_msg->len); 76 77 trace_hclge_pf_mbx_send(hdev, resp_pf_to_vf); 78 79 status = hclge_cmd_send(&hdev->hw, &desc, 1); 80 if (status) 81 dev_err(&hdev->pdev->dev, 82 "failed to send response to VF, status: %d, vfid: %u, code: %u, subcode: %u.\n", 83 status, vf_to_pf_req->mbx_src_vfid, 84 vf_to_pf_req->msg.code, vf_to_pf_req->msg.subcode); 85 86 return status; 87 } 88 89 static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len, 90 u16 mbx_opcode, u8 dest_vfid) 91 { 92 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 93 struct hclge_dev *hdev = vport->back; 94 enum hclge_comm_cmd_status status; 95 struct hclge_desc desc; 96 97 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 98 99 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 100 101 resp_pf_to_vf->dest_vfid = dest_vfid; 102 resp_pf_to_vf->msg_len = msg_len; 103 resp_pf_to_vf->msg.code = mbx_opcode; 104 105 memcpy(&resp_pf_to_vf->msg.vf_mbx_msg_code, msg, msg_len); 106 107 trace_hclge_pf_mbx_send(hdev, resp_pf_to_vf); 108 109 status = hclge_cmd_send(&hdev->hw, &desc, 1); 110 if (status) 111 dev_err(&hdev->pdev->dev, 112 "failed to send mailbox to VF, status: %d, vfid: %u, opcode: %u\n", 113 status, dest_vfid, mbx_opcode); 114 115 return status; 116 } 117 118 int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport) 119 { 120 struct hclge_dev *hdev = vport->back; 121 u16 reset_type; 122 u8 msg_data[2]; 123 u8 dest_vfid; 124 125 BUILD_BUG_ON(HNAE3_MAX_RESET > U16_MAX); 126 127 dest_vfid = (u8)vport->vport_id; 128 129 if (hdev->reset_type == HNAE3_FUNC_RESET) 130 reset_type = HNAE3_VF_PF_FUNC_RESET; 131 else if (hdev->reset_type == HNAE3_FLR_RESET) 132 reset_type = HNAE3_VF_FULL_RESET; 133 else 134 reset_type = HNAE3_VF_FUNC_RESET; 135 136 memcpy(&msg_data[0], &reset_type, sizeof(u16)); 137 138 /* send this requested info to VF */ 139 return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 140 HCLGE_MBX_ASSERTING_RESET, dest_vfid); 141 } 142 143 static void hclge_free_vector_ring_chain(struct hnae3_ring_chain_node *head) 144 { 145 struct hnae3_ring_chain_node *chain_tmp, *chain; 146 147 chain = head->next; 148 149 while (chain) { 150 chain_tmp = chain->next; 151 kfree_sensitive(chain); 152 chain = chain_tmp; 153 } 154 } 155 156 /* hclge_get_ring_chain_from_mbx: get ring type & tqp id & int_gl idx 157 * from mailbox message 158 * msg[0]: opcode 159 * msg[1]: <not relevant to this function> 160 * msg[2]: ring_num 161 * msg[3]: first ring type (TX|RX) 162 * msg[4]: first tqp id 163 * msg[5]: first int_gl idx 164 * msg[6] ~ msg[14]: other ring type, tqp id and int_gl idx 165 */ 166 static int hclge_get_ring_chain_from_mbx( 167 struct hclge_mbx_vf_to_pf_cmd *req, 168 struct hnae3_ring_chain_node *ring_chain, 169 struct hclge_vport *vport) 170 { 171 struct hnae3_ring_chain_node *cur_chain, *new_chain; 172 struct hclge_dev *hdev = vport->back; 173 int ring_num; 174 int i; 175 176 ring_num = req->msg.ring_num; 177 178 if (ring_num > HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM) 179 return -ENOMEM; 180 181 for (i = 0; i < ring_num; i++) { 182 if (req->msg.param[i].tqp_index >= vport->nic.kinfo.rss_size) { 183 dev_err(&hdev->pdev->dev, "tqp index(%u) is out of range(0-%u)\n", 184 req->msg.param[i].tqp_index, 185 vport->nic.kinfo.rss_size - 1U); 186 return -EINVAL; 187 } 188 } 189 190 hnae3_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B, 191 req->msg.param[0].ring_type); 192 ring_chain->tqp_index = 193 hclge_get_queue_id(vport->nic.kinfo.tqp 194 [req->msg.param[0].tqp_index]); 195 hnae3_set_field(ring_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 196 HNAE3_RING_GL_IDX_S, req->msg.param[0].int_gl_index); 197 198 cur_chain = ring_chain; 199 200 for (i = 1; i < ring_num; i++) { 201 new_chain = kzalloc(sizeof(*new_chain), GFP_KERNEL); 202 if (!new_chain) 203 goto err; 204 205 hnae3_set_bit(new_chain->flag, HNAE3_RING_TYPE_B, 206 req->msg.param[i].ring_type); 207 208 new_chain->tqp_index = 209 hclge_get_queue_id(vport->nic.kinfo.tqp 210 [req->msg.param[i].tqp_index]); 211 212 hnae3_set_field(new_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 213 HNAE3_RING_GL_IDX_S, 214 req->msg.param[i].int_gl_index); 215 216 cur_chain->next = new_chain; 217 cur_chain = new_chain; 218 } 219 220 return 0; 221 err: 222 hclge_free_vector_ring_chain(ring_chain); 223 return -ENOMEM; 224 } 225 226 static int hclge_map_unmap_ring_to_vf_vector(struct hclge_vport *vport, bool en, 227 struct hclge_mbx_vf_to_pf_cmd *req) 228 { 229 struct hnae3_ring_chain_node ring_chain; 230 int vector_id = req->msg.vector_id; 231 int ret; 232 233 memset(&ring_chain, 0, sizeof(ring_chain)); 234 ret = hclge_get_ring_chain_from_mbx(req, &ring_chain, vport); 235 if (ret) 236 return ret; 237 238 ret = hclge_bind_ring_with_vector(vport, vector_id, en, &ring_chain); 239 240 hclge_free_vector_ring_chain(&ring_chain); 241 242 return ret; 243 } 244 245 static void hclge_set_vf_promisc_mode(struct hclge_vport *vport, 246 struct hclge_mbx_vf_to_pf_cmd *req) 247 { 248 struct hnae3_handle *handle = &vport->nic; 249 struct hclge_dev *hdev = vport->back; 250 251 vport->vf_info.request_uc_en = req->msg.en_uc; 252 vport->vf_info.request_mc_en = req->msg.en_mc; 253 vport->vf_info.request_bc_en = req->msg.en_bc; 254 255 if (req->msg.en_limit_promisc) 256 set_bit(HNAE3_PFLAG_LIMIT_PROMISC, &handle->priv_flags); 257 else 258 clear_bit(HNAE3_PFLAG_LIMIT_PROMISC, 259 &handle->priv_flags); 260 261 set_bit(HCLGE_VPORT_STATE_PROMISC_CHANGE, &vport->state); 262 hclge_task_schedule(hdev, 0); 263 } 264 265 static int hclge_set_vf_uc_mac_addr(struct hclge_vport *vport, 266 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 267 { 268 #define HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET 6 269 270 const u8 *mac_addr = (const u8 *)(mbx_req->msg.data); 271 struct hclge_dev *hdev = vport->back; 272 int status; 273 274 if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_MODIFY) { 275 const u8 *old_addr = (const u8 *) 276 (&mbx_req->msg.data[HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET]); 277 278 /* If VF MAC has been configured by the host then it 279 * cannot be overridden by the MAC specified by the VM. 280 */ 281 if (!is_zero_ether_addr(vport->vf_info.mac) && 282 !ether_addr_equal(mac_addr, vport->vf_info.mac)) 283 return -EPERM; 284 285 if (!is_valid_ether_addr(mac_addr)) 286 return -EINVAL; 287 288 spin_lock_bh(&vport->mac_list_lock); 289 status = hclge_update_mac_node_for_dev_addr(vport, old_addr, 290 mac_addr); 291 spin_unlock_bh(&vport->mac_list_lock); 292 hclge_task_schedule(hdev, 0); 293 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_ADD) { 294 status = hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD, 295 HCLGE_MAC_ADDR_UC, mac_addr); 296 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_REMOVE) { 297 status = hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL, 298 HCLGE_MAC_ADDR_UC, mac_addr); 299 } else { 300 dev_err(&hdev->pdev->dev, 301 "failed to set unicast mac addr, unknown subcode %u\n", 302 mbx_req->msg.subcode); 303 return -EIO; 304 } 305 306 return status; 307 } 308 309 static int hclge_set_vf_mc_mac_addr(struct hclge_vport *vport, 310 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 311 { 312 const u8 *mac_addr = (const u8 *)(mbx_req->msg.data); 313 struct hclge_dev *hdev = vport->back; 314 315 if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_ADD) { 316 hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD, 317 HCLGE_MAC_ADDR_MC, mac_addr); 318 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_REMOVE) { 319 hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL, 320 HCLGE_MAC_ADDR_MC, mac_addr); 321 } else { 322 dev_err(&hdev->pdev->dev, 323 "failed to set mcast mac addr, unknown subcode %u\n", 324 mbx_req->msg.subcode); 325 return -EIO; 326 } 327 328 return 0; 329 } 330 331 int hclge_push_vf_port_base_vlan_info(struct hclge_vport *vport, u8 vfid, 332 u16 state, 333 struct hclge_vlan_info *vlan_info) 334 { 335 #define MSG_DATA_SIZE 8 336 337 u8 msg_data[MSG_DATA_SIZE]; 338 339 memcpy(&msg_data[0], &state, sizeof(u16)); 340 memcpy(&msg_data[2], &vlan_info->vlan_proto, sizeof(u16)); 341 memcpy(&msg_data[4], &vlan_info->qos, sizeof(u16)); 342 memcpy(&msg_data[6], &vlan_info->vlan_tag, sizeof(u16)); 343 344 return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 345 HCLGE_MBX_PUSH_VLAN_INFO, vfid); 346 } 347 348 static int hclge_set_vf_vlan_cfg(struct hclge_vport *vport, 349 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 350 struct hclge_respond_to_vf_msg *resp_msg) 351 { 352 #define HCLGE_MBX_VLAN_STATE_OFFSET 0 353 #define HCLGE_MBX_VLAN_INFO_OFFSET 2 354 355 struct hnae3_handle *handle = &vport->nic; 356 struct hclge_dev *hdev = vport->back; 357 struct hclge_vf_vlan_cfg *msg_cmd; 358 359 msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg; 360 switch (msg_cmd->subcode) { 361 case HCLGE_MBX_VLAN_FILTER: 362 return hclge_set_vlan_filter(handle, 363 cpu_to_be16(msg_cmd->proto), 364 msg_cmd->vlan, msg_cmd->is_kill); 365 case HCLGE_MBX_VLAN_RX_OFF_CFG: 366 return hclge_en_hw_strip_rxvtag(handle, msg_cmd->enable); 367 case HCLGE_MBX_GET_PORT_BASE_VLAN_STATE: 368 /* vf does not need to know about the port based VLAN state 369 * on device HNAE3_DEVICE_VERSION_V3. So always return disable 370 * on device HNAE3_DEVICE_VERSION_V3 if vf queries the port 371 * based VLAN state. 372 */ 373 resp_msg->data[0] = 374 hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3 ? 375 HNAE3_PORT_BASE_VLAN_DISABLE : 376 vport->port_base_vlan_cfg.state; 377 resp_msg->len = sizeof(u8); 378 return 0; 379 case HCLGE_MBX_ENABLE_VLAN_FILTER: 380 return hclge_enable_vport_vlan_filter(vport, msg_cmd->enable); 381 default: 382 return 0; 383 } 384 } 385 386 static int hclge_set_vf_alive(struct hclge_vport *vport, 387 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 388 { 389 bool alive = !!mbx_req->msg.data[0]; 390 int ret = 0; 391 392 if (alive) 393 ret = hclge_vport_start(vport); 394 else 395 hclge_vport_stop(vport); 396 397 return ret; 398 } 399 400 static void hclge_get_basic_info(struct hclge_vport *vport, 401 struct hclge_respond_to_vf_msg *resp_msg) 402 { 403 struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo; 404 struct hnae3_ae_dev *ae_dev = vport->back->ae_dev; 405 struct hclge_basic_info *basic_info; 406 unsigned int i; 407 408 basic_info = (struct hclge_basic_info *)resp_msg->data; 409 for (i = 0; i < kinfo->tc_info.num_tc; i++) 410 basic_info->hw_tc_map |= BIT(i); 411 412 if (test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) 413 hnae3_set_bit(basic_info->pf_caps, 414 HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B, 1); 415 416 resp_msg->len = HCLGE_MBX_MAX_RESP_DATA_SIZE; 417 } 418 419 static void hclge_get_vf_queue_info(struct hclge_vport *vport, 420 struct hclge_respond_to_vf_msg *resp_msg) 421 { 422 #define HCLGE_TQPS_RSS_INFO_LEN 6 423 #define HCLGE_TQPS_ALLOC_OFFSET 0 424 #define HCLGE_TQPS_RSS_SIZE_OFFSET 2 425 #define HCLGE_TQPS_RX_BUFFER_LEN_OFFSET 4 426 427 struct hclge_dev *hdev = vport->back; 428 429 /* get the queue related info */ 430 memcpy(&resp_msg->data[HCLGE_TQPS_ALLOC_OFFSET], 431 &vport->alloc_tqps, sizeof(u16)); 432 memcpy(&resp_msg->data[HCLGE_TQPS_RSS_SIZE_OFFSET], 433 &vport->nic.kinfo.rss_size, sizeof(u16)); 434 memcpy(&resp_msg->data[HCLGE_TQPS_RX_BUFFER_LEN_OFFSET], 435 &hdev->rx_buf_len, sizeof(u16)); 436 resp_msg->len = HCLGE_TQPS_RSS_INFO_LEN; 437 } 438 439 static void hclge_get_vf_mac_addr(struct hclge_vport *vport, 440 struct hclge_respond_to_vf_msg *resp_msg) 441 { 442 ether_addr_copy(resp_msg->data, vport->vf_info.mac); 443 resp_msg->len = ETH_ALEN; 444 } 445 446 static void hclge_get_vf_queue_depth(struct hclge_vport *vport, 447 struct hclge_respond_to_vf_msg *resp_msg) 448 { 449 #define HCLGE_TQPS_DEPTH_INFO_LEN 4 450 #define HCLGE_TQPS_NUM_TX_DESC_OFFSET 0 451 #define HCLGE_TQPS_NUM_RX_DESC_OFFSET 2 452 453 struct hclge_dev *hdev = vport->back; 454 455 /* get the queue depth info */ 456 memcpy(&resp_msg->data[HCLGE_TQPS_NUM_TX_DESC_OFFSET], 457 &hdev->num_tx_desc, sizeof(u16)); 458 memcpy(&resp_msg->data[HCLGE_TQPS_NUM_RX_DESC_OFFSET], 459 &hdev->num_rx_desc, sizeof(u16)); 460 resp_msg->len = HCLGE_TQPS_DEPTH_INFO_LEN; 461 } 462 463 static void hclge_get_vf_media_type(struct hclge_vport *vport, 464 struct hclge_respond_to_vf_msg *resp_msg) 465 { 466 #define HCLGE_VF_MEDIA_TYPE_OFFSET 0 467 #define HCLGE_VF_MODULE_TYPE_OFFSET 1 468 #define HCLGE_VF_MEDIA_TYPE_LENGTH 2 469 470 struct hclge_dev *hdev = vport->back; 471 472 resp_msg->data[HCLGE_VF_MEDIA_TYPE_OFFSET] = 473 hdev->hw.mac.media_type; 474 resp_msg->data[HCLGE_VF_MODULE_TYPE_OFFSET] = 475 hdev->hw.mac.module_type; 476 resp_msg->len = HCLGE_VF_MEDIA_TYPE_LENGTH; 477 } 478 479 int hclge_push_vf_link_status(struct hclge_vport *vport) 480 { 481 #define HCLGE_VF_LINK_STATE_UP 1U 482 #define HCLGE_VF_LINK_STATE_DOWN 0U 483 484 struct hclge_dev *hdev = vport->back; 485 u16 link_status; 486 u8 msg_data[9]; 487 u16 duplex; 488 489 /* mac.link can only be 0 or 1 */ 490 switch (vport->vf_info.link_state) { 491 case IFLA_VF_LINK_STATE_ENABLE: 492 link_status = HCLGE_VF_LINK_STATE_UP; 493 break; 494 case IFLA_VF_LINK_STATE_DISABLE: 495 link_status = HCLGE_VF_LINK_STATE_DOWN; 496 break; 497 case IFLA_VF_LINK_STATE_AUTO: 498 default: 499 link_status = (u16)hdev->hw.mac.link; 500 break; 501 } 502 503 duplex = hdev->hw.mac.duplex; 504 memcpy(&msg_data[0], &link_status, sizeof(u16)); 505 memcpy(&msg_data[2], &hdev->hw.mac.speed, sizeof(u32)); 506 memcpy(&msg_data[6], &duplex, sizeof(u16)); 507 msg_data[8] = HCLGE_MBX_PUSH_LINK_STATUS_EN; 508 509 /* send this requested info to VF */ 510 return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 511 HCLGE_MBX_LINK_STAT_CHANGE, vport->vport_id); 512 } 513 514 static void hclge_get_link_mode(struct hclge_vport *vport, 515 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 516 { 517 #define HCLGE_SUPPORTED 1 518 struct hclge_dev *hdev = vport->back; 519 unsigned long advertising; 520 unsigned long supported; 521 unsigned long send_data; 522 u8 msg_data[10] = {}; 523 u8 dest_vfid; 524 525 advertising = hdev->hw.mac.advertising[0]; 526 supported = hdev->hw.mac.supported[0]; 527 dest_vfid = mbx_req->mbx_src_vfid; 528 msg_data[0] = mbx_req->msg.data[0]; 529 530 send_data = msg_data[0] == HCLGE_SUPPORTED ? supported : advertising; 531 532 memcpy(&msg_data[2], &send_data, sizeof(unsigned long)); 533 hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 534 HCLGE_MBX_LINK_STAT_MODE, dest_vfid); 535 } 536 537 static int hclge_mbx_reset_vf_queue(struct hclge_vport *vport, 538 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 539 struct hclge_respond_to_vf_msg *resp_msg) 540 { 541 #define HCLGE_RESET_ALL_QUEUE_DONE 1U 542 struct hnae3_handle *handle = &vport->nic; 543 struct hclge_dev *hdev = vport->back; 544 u16 queue_id; 545 int ret; 546 547 memcpy(&queue_id, mbx_req->msg.data, sizeof(queue_id)); 548 resp_msg->data[0] = HCLGE_RESET_ALL_QUEUE_DONE; 549 resp_msg->len = sizeof(u8); 550 551 /* pf will reset vf's all queues at a time. So it is unnecessary 552 * to reset queues if queue_id > 0, just return success. 553 */ 554 if (queue_id > 0) 555 return 0; 556 557 ret = hclge_reset_tqp(handle); 558 if (ret) 559 dev_err(&hdev->pdev->dev, "failed to reset vf %u queue, ret = %d\n", 560 vport->vport_id - HCLGE_VF_VPORT_START_NUM, ret); 561 562 return ret; 563 } 564 565 static int hclge_reset_vf(struct hclge_vport *vport) 566 { 567 struct hclge_dev *hdev = vport->back; 568 569 dev_warn(&hdev->pdev->dev, "PF received VF reset request from VF %u!", 570 vport->vport_id - HCLGE_VF_VPORT_START_NUM); 571 572 return hclge_func_reset_cmd(hdev, vport->vport_id); 573 } 574 575 static void hclge_vf_keep_alive(struct hclge_vport *vport) 576 { 577 vport->last_active_jiffies = jiffies; 578 } 579 580 static int hclge_set_vf_mtu(struct hclge_vport *vport, 581 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 582 { 583 u32 mtu; 584 585 memcpy(&mtu, mbx_req->msg.data, sizeof(mtu)); 586 587 return hclge_set_vport_mtu(vport, mtu); 588 } 589 590 static void hclge_get_queue_id_in_pf(struct hclge_vport *vport, 591 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 592 struct hclge_respond_to_vf_msg *resp_msg) 593 { 594 struct hnae3_handle *handle = &vport->nic; 595 struct hclge_dev *hdev = vport->back; 596 u16 queue_id, qid_in_pf; 597 598 memcpy(&queue_id, mbx_req->msg.data, sizeof(queue_id)); 599 if (queue_id >= handle->kinfo.num_tqps) { 600 dev_err(&hdev->pdev->dev, "Invalid queue id(%u) from VF %u\n", 601 queue_id, mbx_req->mbx_src_vfid); 602 return; 603 } 604 605 qid_in_pf = hclge_covert_handle_qid_global(&vport->nic, queue_id); 606 memcpy(resp_msg->data, &qid_in_pf, sizeof(qid_in_pf)); 607 resp_msg->len = sizeof(qid_in_pf); 608 } 609 610 static void hclge_get_rss_key(struct hclge_vport *vport, 611 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 612 struct hclge_respond_to_vf_msg *resp_msg) 613 { 614 #define HCLGE_RSS_MBX_RESP_LEN 8 615 struct hclge_dev *hdev = vport->back; 616 struct hclge_comm_rss_cfg *rss_cfg; 617 u8 index; 618 619 index = mbx_req->msg.data[0]; 620 rss_cfg = &hdev->rss_cfg; 621 622 /* Check the query index of rss_hash_key from VF, make sure no 623 * more than the size of rss_hash_key. 624 */ 625 if (((index + 1) * HCLGE_RSS_MBX_RESP_LEN) > 626 sizeof(rss_cfg->rss_hash_key)) { 627 dev_warn(&hdev->pdev->dev, 628 "failed to get the rss hash key, the index(%u) invalid !\n", 629 index); 630 return; 631 } 632 633 memcpy(resp_msg->data, 634 &rss_cfg->rss_hash_key[index * HCLGE_RSS_MBX_RESP_LEN], 635 HCLGE_RSS_MBX_RESP_LEN); 636 resp_msg->len = HCLGE_RSS_MBX_RESP_LEN; 637 } 638 639 static void hclge_link_fail_parse(struct hclge_dev *hdev, u8 link_fail_code) 640 { 641 switch (link_fail_code) { 642 case HCLGE_LF_REF_CLOCK_LOST: 643 dev_warn(&hdev->pdev->dev, "Reference clock lost!\n"); 644 break; 645 case HCLGE_LF_XSFP_TX_DISABLE: 646 dev_warn(&hdev->pdev->dev, "SFP tx is disabled!\n"); 647 break; 648 case HCLGE_LF_XSFP_ABSENT: 649 dev_warn(&hdev->pdev->dev, "SFP is absent!\n"); 650 break; 651 default: 652 break; 653 } 654 } 655 656 static void hclge_handle_link_change_event(struct hclge_dev *hdev, 657 struct hclge_mbx_vf_to_pf_cmd *req) 658 { 659 hclge_task_schedule(hdev, 0); 660 661 if (!req->msg.subcode) 662 hclge_link_fail_parse(hdev, req->msg.data[0]); 663 } 664 665 static bool hclge_cmd_crq_empty(struct hclge_hw *hw) 666 { 667 u32 tail = hclge_read_dev(hw, HCLGE_COMM_NIC_CRQ_TAIL_REG); 668 669 return tail == hw->hw.cmq.crq.next_to_use; 670 } 671 672 static void hclge_handle_ncsi_error(struct hclge_dev *hdev) 673 { 674 struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 675 676 ae_dev->ops->set_default_reset_request(ae_dev, HNAE3_GLOBAL_RESET); 677 dev_warn(&hdev->pdev->dev, "requesting reset due to NCSI error\n"); 678 ae_dev->ops->reset_event(hdev->pdev, NULL); 679 } 680 681 static void hclge_handle_vf_tbl(struct hclge_vport *vport, 682 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 683 { 684 struct hclge_dev *hdev = vport->back; 685 struct hclge_vf_vlan_cfg *msg_cmd; 686 687 msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg; 688 if (msg_cmd->subcode == HCLGE_MBX_VPORT_LIST_CLEAR) { 689 hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_UC); 690 hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_MC); 691 hclge_rm_vport_all_vlan_table(vport, true); 692 } else { 693 dev_warn(&hdev->pdev->dev, "Invalid cmd(%u)\n", 694 msg_cmd->subcode); 695 } 696 } 697 698 void hclge_mbx_handler(struct hclge_dev *hdev) 699 { 700 struct hclge_comm_cmq_ring *crq = &hdev->hw.hw.cmq.crq; 701 struct hclge_respond_to_vf_msg resp_msg; 702 struct hclge_mbx_vf_to_pf_cmd *req; 703 struct hclge_vport *vport; 704 struct hclge_desc *desc; 705 bool is_del = false; 706 unsigned int flag; 707 int ret = 0; 708 709 /* handle all the mailbox requests in the queue */ 710 while (!hclge_cmd_crq_empty(&hdev->hw)) { 711 if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, 712 &hdev->hw.hw.comm_state)) { 713 dev_warn(&hdev->pdev->dev, 714 "command queue needs re-initializing\n"); 715 return; 716 } 717 718 desc = &crq->desc[crq->next_to_use]; 719 req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data; 720 721 flag = le16_to_cpu(crq->desc[crq->next_to_use].flag); 722 if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) { 723 dev_warn(&hdev->pdev->dev, 724 "dropped invalid mailbox message, code = %u\n", 725 req->msg.code); 726 727 /* dropping/not processing this invalid message */ 728 crq->desc[crq->next_to_use].flag = 0; 729 hclge_mbx_ring_ptr_move_crq(crq); 730 continue; 731 } 732 733 vport = &hdev->vport[req->mbx_src_vfid]; 734 735 trace_hclge_pf_mbx_get(hdev, req); 736 737 /* clear the resp_msg before processing every mailbox message */ 738 memset(&resp_msg, 0, sizeof(resp_msg)); 739 740 switch (req->msg.code) { 741 case HCLGE_MBX_MAP_RING_TO_VECTOR: 742 ret = hclge_map_unmap_ring_to_vf_vector(vport, true, 743 req); 744 break; 745 case HCLGE_MBX_UNMAP_RING_TO_VECTOR: 746 ret = hclge_map_unmap_ring_to_vf_vector(vport, false, 747 req); 748 break; 749 case HCLGE_MBX_SET_PROMISC_MODE: 750 hclge_set_vf_promisc_mode(vport, req); 751 break; 752 case HCLGE_MBX_SET_UNICAST: 753 ret = hclge_set_vf_uc_mac_addr(vport, req); 754 if (ret) 755 dev_err(&hdev->pdev->dev, 756 "PF fail(%d) to set VF UC MAC Addr\n", 757 ret); 758 break; 759 case HCLGE_MBX_SET_MULTICAST: 760 ret = hclge_set_vf_mc_mac_addr(vport, req); 761 if (ret) 762 dev_err(&hdev->pdev->dev, 763 "PF fail(%d) to set VF MC MAC Addr\n", 764 ret); 765 break; 766 case HCLGE_MBX_SET_VLAN: 767 ret = hclge_set_vf_vlan_cfg(vport, req, &resp_msg); 768 if (ret) 769 dev_err(&hdev->pdev->dev, 770 "PF failed(%d) to config VF's VLAN\n", 771 ret); 772 break; 773 case HCLGE_MBX_SET_ALIVE: 774 ret = hclge_set_vf_alive(vport, req); 775 if (ret) 776 dev_err(&hdev->pdev->dev, 777 "PF failed(%d) to set VF's ALIVE\n", 778 ret); 779 break; 780 case HCLGE_MBX_GET_QINFO: 781 hclge_get_vf_queue_info(vport, &resp_msg); 782 break; 783 case HCLGE_MBX_GET_QDEPTH: 784 hclge_get_vf_queue_depth(vport, &resp_msg); 785 break; 786 case HCLGE_MBX_GET_BASIC_INFO: 787 hclge_get_basic_info(vport, &resp_msg); 788 break; 789 case HCLGE_MBX_GET_LINK_STATUS: 790 ret = hclge_push_vf_link_status(vport); 791 if (ret) 792 dev_err(&hdev->pdev->dev, 793 "failed to inform link stat to VF, ret = %d\n", 794 ret); 795 break; 796 case HCLGE_MBX_QUEUE_RESET: 797 ret = hclge_mbx_reset_vf_queue(vport, req, &resp_msg); 798 break; 799 case HCLGE_MBX_RESET: 800 ret = hclge_reset_vf(vport); 801 break; 802 case HCLGE_MBX_KEEP_ALIVE: 803 hclge_vf_keep_alive(vport); 804 break; 805 case HCLGE_MBX_SET_MTU: 806 ret = hclge_set_vf_mtu(vport, req); 807 if (ret) 808 dev_err(&hdev->pdev->dev, 809 "VF fail(%d) to set mtu\n", ret); 810 break; 811 case HCLGE_MBX_GET_QID_IN_PF: 812 hclge_get_queue_id_in_pf(vport, req, &resp_msg); 813 break; 814 case HCLGE_MBX_GET_RSS_KEY: 815 hclge_get_rss_key(vport, req, &resp_msg); 816 break; 817 case HCLGE_MBX_GET_LINK_MODE: 818 hclge_get_link_mode(vport, req); 819 break; 820 case HCLGE_MBX_GET_VF_FLR_STATUS: 821 case HCLGE_MBX_VF_UNINIT: 822 is_del = req->msg.code == HCLGE_MBX_VF_UNINIT; 823 hclge_rm_vport_all_mac_table(vport, is_del, 824 HCLGE_MAC_ADDR_UC); 825 hclge_rm_vport_all_mac_table(vport, is_del, 826 HCLGE_MAC_ADDR_MC); 827 hclge_rm_vport_all_vlan_table(vport, is_del); 828 break; 829 case HCLGE_MBX_GET_MEDIA_TYPE: 830 hclge_get_vf_media_type(vport, &resp_msg); 831 break; 832 case HCLGE_MBX_PUSH_LINK_STATUS: 833 hclge_handle_link_change_event(hdev, req); 834 break; 835 case HCLGE_MBX_GET_MAC_ADDR: 836 hclge_get_vf_mac_addr(vport, &resp_msg); 837 break; 838 case HCLGE_MBX_NCSI_ERROR: 839 hclge_handle_ncsi_error(hdev); 840 break; 841 case HCLGE_MBX_HANDLE_VF_TBL: 842 hclge_handle_vf_tbl(vport, req); 843 break; 844 default: 845 dev_err(&hdev->pdev->dev, 846 "un-supported mailbox message, code = %u\n", 847 req->msg.code); 848 break; 849 } 850 851 /* PF driver should not reply IMP */ 852 if (hnae3_get_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B) && 853 req->msg.code < HCLGE_MBX_GET_VF_FLR_STATUS) { 854 resp_msg.status = ret; 855 if (time_is_before_jiffies(hdev->last_mbx_scheduled + 856 HCLGE_MBX_SCHED_TIMEOUT)) 857 dev_warn(&hdev->pdev->dev, 858 "resp vport%u mbx(%u,%u) late\n", 859 req->mbx_src_vfid, 860 req->msg.code, 861 req->msg.subcode); 862 863 hclge_gen_resp_to_vf(vport, req, &resp_msg); 864 } 865 866 crq->desc[crq->next_to_use].flag = 0; 867 hclge_mbx_ring_ptr_move_crq(crq); 868 869 /* reinitialize ret after complete the mbx message processing */ 870 ret = 0; 871 } 872 873 /* Write back CMDQ_RQ header pointer, M7 need this pointer */ 874 hclge_write_dev(&hdev->hw, HCLGE_COMM_NIC_CRQ_HEAD_REG, 875 crq->next_to_use); 876 } 877