1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #include "hclge_main.h" 5 #include "hclge_mbx.h" 6 #include "hnae3.h" 7 #include "hclge_comm_rss.h" 8 9 #define CREATE_TRACE_POINTS 10 #include "hclge_trace.h" 11 12 static u16 hclge_errno_to_resp(int errno) 13 { 14 int resp = abs(errno); 15 16 /* The status for pf to vf msg cmd is u16, constrainted by HW. 17 * We need to keep the same type with it. 18 * The intput errno is the stander error code, it's safely to 19 * use a u16 to store the abs(errno). 20 */ 21 return (u16)resp; 22 } 23 24 /* hclge_gen_resp_to_vf: used to generate a synchronous response to VF when PF 25 * receives a mailbox message from VF. 26 * @vport: pointer to struct hclge_vport 27 * @vf_to_pf_req: pointer to hclge_mbx_vf_to_pf_cmd of the original mailbox 28 * message 29 * @resp_status: indicate to VF whether its request success(0) or failed. 30 */ 31 static int hclge_gen_resp_to_vf(struct hclge_vport *vport, 32 struct hclge_mbx_vf_to_pf_cmd *vf_to_pf_req, 33 struct hclge_respond_to_vf_msg *resp_msg) 34 { 35 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 36 struct hclge_dev *hdev = vport->back; 37 enum hclge_comm_cmd_status status; 38 struct hclge_desc desc; 39 u16 resp; 40 41 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 42 43 if (resp_msg->len > HCLGE_MBX_MAX_RESP_DATA_SIZE) { 44 dev_err(&hdev->pdev->dev, 45 "PF fail to gen resp to VF len %u exceeds max len %u\n", 46 resp_msg->len, 47 HCLGE_MBX_MAX_RESP_DATA_SIZE); 48 /* If resp_msg->len is too long, set the value to max length 49 * and return the msg to VF 50 */ 51 resp_msg->len = HCLGE_MBX_MAX_RESP_DATA_SIZE; 52 } 53 54 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 55 56 resp_pf_to_vf->dest_vfid = vf_to_pf_req->mbx_src_vfid; 57 resp_pf_to_vf->msg_len = vf_to_pf_req->msg_len; 58 resp_pf_to_vf->match_id = vf_to_pf_req->match_id; 59 60 resp_pf_to_vf->msg.code = cpu_to_le16(HCLGE_MBX_PF_VF_RESP); 61 resp_pf_to_vf->msg.vf_mbx_msg_code = 62 cpu_to_le16(vf_to_pf_req->msg.code); 63 resp_pf_to_vf->msg.vf_mbx_msg_subcode = 64 cpu_to_le16(vf_to_pf_req->msg.subcode); 65 resp = hclge_errno_to_resp(resp_msg->status); 66 if (resp < SHRT_MAX) { 67 resp_pf_to_vf->msg.resp_status = cpu_to_le16(resp); 68 } else { 69 dev_warn(&hdev->pdev->dev, 70 "failed to send response to VF, response status %u is out-of-bound\n", 71 resp); 72 resp_pf_to_vf->msg.resp_status = cpu_to_le16(EIO); 73 } 74 75 if (resp_msg->len > 0) 76 memcpy(resp_pf_to_vf->msg.resp_data, resp_msg->data, 77 resp_msg->len); 78 79 trace_hclge_pf_mbx_send(hdev, resp_pf_to_vf); 80 81 status = hclge_cmd_send(&hdev->hw, &desc, 1); 82 if (status) 83 dev_err(&hdev->pdev->dev, 84 "failed to send response to VF, status: %d, vfid: %u, code: %u, subcode: %u.\n", 85 status, vf_to_pf_req->mbx_src_vfid, 86 vf_to_pf_req->msg.code, vf_to_pf_req->msg.subcode); 87 88 return status; 89 } 90 91 static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len, 92 u16 mbx_opcode, u8 dest_vfid) 93 { 94 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 95 struct hclge_dev *hdev = vport->back; 96 enum hclge_comm_cmd_status status; 97 struct hclge_desc desc; 98 99 if (msg_len > HCLGE_MBX_MAX_MSG_SIZE) { 100 dev_err(&hdev->pdev->dev, 101 "msg data length(=%u) exceeds maximum(=%u)\n", 102 msg_len, HCLGE_MBX_MAX_MSG_SIZE); 103 return -EMSGSIZE; 104 } 105 106 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 107 108 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 109 110 resp_pf_to_vf->dest_vfid = dest_vfid; 111 resp_pf_to_vf->msg_len = msg_len; 112 resp_pf_to_vf->msg.code = cpu_to_le16(mbx_opcode); 113 114 memcpy(resp_pf_to_vf->msg.msg_data, msg, msg_len); 115 116 trace_hclge_pf_mbx_send(hdev, resp_pf_to_vf); 117 118 status = hclge_cmd_send(&hdev->hw, &desc, 1); 119 if (status) 120 dev_err(&hdev->pdev->dev, 121 "failed to send mailbox to VF, status: %d, vfid: %u, opcode: %u\n", 122 status, dest_vfid, mbx_opcode); 123 124 return status; 125 } 126 127 int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport) 128 { 129 struct hclge_dev *hdev = vport->back; 130 __le16 msg_data; 131 u16 reset_type; 132 u8 dest_vfid; 133 134 BUILD_BUG_ON(HNAE3_MAX_RESET > U16_MAX); 135 136 dest_vfid = (u8)vport->vport_id; 137 138 if (hdev->reset_type == HNAE3_FUNC_RESET) 139 reset_type = HNAE3_VF_PF_FUNC_RESET; 140 else if (hdev->reset_type == HNAE3_FLR_RESET) 141 reset_type = HNAE3_VF_FULL_RESET; 142 else 143 reset_type = HNAE3_VF_FUNC_RESET; 144 145 msg_data = cpu_to_le16(reset_type); 146 147 /* send this requested info to VF */ 148 return hclge_send_mbx_msg(vport, (u8 *)&msg_data, sizeof(msg_data), 149 HCLGE_MBX_ASSERTING_RESET, dest_vfid); 150 } 151 152 static void hclge_free_vector_ring_chain(struct hnae3_ring_chain_node *head) 153 { 154 struct hnae3_ring_chain_node *chain_tmp, *chain; 155 156 chain = head->next; 157 158 while (chain) { 159 chain_tmp = chain->next; 160 kfree_sensitive(chain); 161 chain = chain_tmp; 162 } 163 } 164 165 /* hclge_get_ring_chain_from_mbx: get ring type & tqp id & int_gl idx 166 * from mailbox message 167 * msg[0]: opcode 168 * msg[1]: <not relevant to this function> 169 * msg[2]: ring_num 170 * msg[3]: first ring type (TX|RX) 171 * msg[4]: first tqp id 172 * msg[5]: first int_gl idx 173 * msg[6] ~ msg[14]: other ring type, tqp id and int_gl idx 174 */ 175 static int hclge_get_ring_chain_from_mbx( 176 struct hclge_mbx_vf_to_pf_cmd *req, 177 struct hnae3_ring_chain_node *ring_chain, 178 struct hclge_vport *vport) 179 { 180 struct hnae3_ring_chain_node *cur_chain, *new_chain; 181 struct hclge_dev *hdev = vport->back; 182 int ring_num; 183 int i; 184 185 ring_num = req->msg.ring_num; 186 187 if (ring_num > HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM) 188 return -EINVAL; 189 190 for (i = 0; i < ring_num; i++) { 191 if (req->msg.param[i].tqp_index >= vport->nic.kinfo.rss_size) { 192 dev_err(&hdev->pdev->dev, "tqp index(%u) is out of range(0-%u)\n", 193 req->msg.param[i].tqp_index, 194 vport->nic.kinfo.rss_size - 1U); 195 return -EINVAL; 196 } 197 } 198 199 hnae3_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B, 200 req->msg.param[0].ring_type); 201 ring_chain->tqp_index = 202 hclge_get_queue_id(vport->nic.kinfo.tqp 203 [req->msg.param[0].tqp_index]); 204 hnae3_set_field(ring_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 205 HNAE3_RING_GL_IDX_S, req->msg.param[0].int_gl_index); 206 207 cur_chain = ring_chain; 208 209 for (i = 1; i < ring_num; i++) { 210 new_chain = kzalloc(sizeof(*new_chain), GFP_KERNEL); 211 if (!new_chain) 212 goto err; 213 214 hnae3_set_bit(new_chain->flag, HNAE3_RING_TYPE_B, 215 req->msg.param[i].ring_type); 216 217 new_chain->tqp_index = 218 hclge_get_queue_id(vport->nic.kinfo.tqp 219 [req->msg.param[i].tqp_index]); 220 221 hnae3_set_field(new_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 222 HNAE3_RING_GL_IDX_S, 223 req->msg.param[i].int_gl_index); 224 225 cur_chain->next = new_chain; 226 cur_chain = new_chain; 227 } 228 229 return 0; 230 err: 231 hclge_free_vector_ring_chain(ring_chain); 232 return -ENOMEM; 233 } 234 235 static int hclge_map_unmap_ring_to_vf_vector(struct hclge_vport *vport, bool en, 236 struct hclge_mbx_vf_to_pf_cmd *req) 237 { 238 struct hnae3_ring_chain_node ring_chain; 239 int vector_id = req->msg.vector_id; 240 int ret; 241 242 memset(&ring_chain, 0, sizeof(ring_chain)); 243 ret = hclge_get_ring_chain_from_mbx(req, &ring_chain, vport); 244 if (ret) 245 return ret; 246 247 ret = hclge_bind_ring_with_vector(vport, vector_id, en, &ring_chain); 248 249 hclge_free_vector_ring_chain(&ring_chain); 250 251 return ret; 252 } 253 254 static int hclge_query_ring_vector_map(struct hclge_vport *vport, 255 struct hnae3_ring_chain_node *ring_chain, 256 struct hclge_desc *desc) 257 { 258 struct hclge_ctrl_vector_chain_cmd *req = 259 (struct hclge_ctrl_vector_chain_cmd *)desc->data; 260 struct hclge_dev *hdev = vport->back; 261 u16 tqp_type_and_id; 262 int status; 263 264 hclge_cmd_setup_basic_desc(desc, HCLGE_OPC_ADD_RING_TO_VECTOR, true); 265 266 tqp_type_and_id = le16_to_cpu(req->tqp_type_and_id[0]); 267 hnae3_set_field(tqp_type_and_id, HCLGE_INT_TYPE_M, HCLGE_INT_TYPE_S, 268 hnae3_get_bit(ring_chain->flag, HNAE3_RING_TYPE_B)); 269 hnae3_set_field(tqp_type_and_id, HCLGE_TQP_ID_M, HCLGE_TQP_ID_S, 270 ring_chain->tqp_index); 271 req->tqp_type_and_id[0] = cpu_to_le16(tqp_type_and_id); 272 req->vfid = vport->vport_id; 273 274 status = hclge_cmd_send(&hdev->hw, desc, 1); 275 if (status) 276 dev_err(&hdev->pdev->dev, 277 "Get VF ring vector map info fail, status is %d.\n", 278 status); 279 280 return status; 281 } 282 283 static int hclge_get_vf_ring_vector_map(struct hclge_vport *vport, 284 struct hclge_mbx_vf_to_pf_cmd *req, 285 struct hclge_respond_to_vf_msg *resp) 286 { 287 #define HCLGE_LIMIT_RING_NUM 1 288 #define HCLGE_RING_TYPE_OFFSET 0 289 #define HCLGE_TQP_INDEX_OFFSET 1 290 #define HCLGE_INT_GL_INDEX_OFFSET 2 291 #define HCLGE_VECTOR_ID_OFFSET 3 292 #define HCLGE_RING_VECTOR_MAP_INFO_LEN 4 293 struct hnae3_ring_chain_node ring_chain; 294 struct hclge_desc desc; 295 struct hclge_ctrl_vector_chain_cmd *data = 296 (struct hclge_ctrl_vector_chain_cmd *)desc.data; 297 u16 tqp_type_and_id; 298 u8 int_gl_index; 299 int ret; 300 301 req->msg.ring_num = HCLGE_LIMIT_RING_NUM; 302 303 memset(&ring_chain, 0, sizeof(ring_chain)); 304 ret = hclge_get_ring_chain_from_mbx(req, &ring_chain, vport); 305 if (ret) 306 return ret; 307 308 ret = hclge_query_ring_vector_map(vport, &ring_chain, &desc); 309 if (ret) { 310 hclge_free_vector_ring_chain(&ring_chain); 311 return ret; 312 } 313 314 tqp_type_and_id = le16_to_cpu(data->tqp_type_and_id[0]); 315 int_gl_index = hnae3_get_field(tqp_type_and_id, 316 HCLGE_INT_GL_IDX_M, HCLGE_INT_GL_IDX_S); 317 318 resp->data[HCLGE_RING_TYPE_OFFSET] = req->msg.param[0].ring_type; 319 resp->data[HCLGE_TQP_INDEX_OFFSET] = req->msg.param[0].tqp_index; 320 resp->data[HCLGE_INT_GL_INDEX_OFFSET] = int_gl_index; 321 resp->data[HCLGE_VECTOR_ID_OFFSET] = data->int_vector_id_l; 322 resp->len = HCLGE_RING_VECTOR_MAP_INFO_LEN; 323 324 hclge_free_vector_ring_chain(&ring_chain); 325 326 return ret; 327 } 328 329 static void hclge_set_vf_promisc_mode(struct hclge_vport *vport, 330 struct hclge_mbx_vf_to_pf_cmd *req) 331 { 332 struct hnae3_handle *handle = &vport->nic; 333 struct hclge_dev *hdev = vport->back; 334 335 vport->vf_info.request_uc_en = req->msg.en_uc; 336 vport->vf_info.request_mc_en = req->msg.en_mc; 337 vport->vf_info.request_bc_en = req->msg.en_bc; 338 339 if (req->msg.en_limit_promisc) 340 set_bit(HNAE3_PFLAG_LIMIT_PROMISC, &handle->priv_flags); 341 else 342 clear_bit(HNAE3_PFLAG_LIMIT_PROMISC, 343 &handle->priv_flags); 344 345 set_bit(HCLGE_VPORT_STATE_PROMISC_CHANGE, &vport->state); 346 hclge_task_schedule(hdev, 0); 347 } 348 349 static int hclge_set_vf_uc_mac_addr(struct hclge_vport *vport, 350 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 351 { 352 #define HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET 6 353 354 const u8 *mac_addr = (const u8 *)(mbx_req->msg.data); 355 struct hclge_dev *hdev = vport->back; 356 int status; 357 358 if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_MODIFY) { 359 const u8 *old_addr = (const u8 *) 360 (&mbx_req->msg.data[HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET]); 361 362 /* If VF MAC has been configured by the host then it 363 * cannot be overridden by the MAC specified by the VM. 364 */ 365 if (!is_zero_ether_addr(vport->vf_info.mac) && 366 !ether_addr_equal(mac_addr, vport->vf_info.mac)) 367 return -EPERM; 368 369 if (!is_valid_ether_addr(mac_addr)) 370 return -EINVAL; 371 372 spin_lock_bh(&vport->mac_list_lock); 373 status = hclge_update_mac_node_for_dev_addr(vport, old_addr, 374 mac_addr); 375 spin_unlock_bh(&vport->mac_list_lock); 376 hclge_task_schedule(hdev, 0); 377 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_ADD) { 378 status = hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD, 379 HCLGE_MAC_ADDR_UC, mac_addr); 380 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_REMOVE) { 381 status = hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL, 382 HCLGE_MAC_ADDR_UC, mac_addr); 383 } else { 384 dev_err(&hdev->pdev->dev, 385 "failed to set unicast mac addr, unknown subcode %u\n", 386 mbx_req->msg.subcode); 387 return -EIO; 388 } 389 390 return status; 391 } 392 393 static int hclge_set_vf_mc_mac_addr(struct hclge_vport *vport, 394 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 395 { 396 const u8 *mac_addr = (const u8 *)(mbx_req->msg.data); 397 struct hclge_dev *hdev = vport->back; 398 399 if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_ADD) { 400 hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD, 401 HCLGE_MAC_ADDR_MC, mac_addr); 402 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_REMOVE) { 403 hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL, 404 HCLGE_MAC_ADDR_MC, mac_addr); 405 } else { 406 dev_err(&hdev->pdev->dev, 407 "failed to set mcast mac addr, unknown subcode %u\n", 408 mbx_req->msg.subcode); 409 return -EIO; 410 } 411 412 return 0; 413 } 414 415 int hclge_push_vf_port_base_vlan_info(struct hclge_vport *vport, u8 vfid, 416 u16 state, 417 struct hclge_vlan_info *vlan_info) 418 { 419 struct hclge_mbx_port_base_vlan base_vlan; 420 421 base_vlan.state = cpu_to_le16(state); 422 base_vlan.vlan_proto = cpu_to_le16(vlan_info->vlan_proto); 423 base_vlan.qos = cpu_to_le16(vlan_info->qos); 424 base_vlan.vlan_tag = cpu_to_le16(vlan_info->vlan_tag); 425 426 return hclge_send_mbx_msg(vport, (u8 *)&base_vlan, sizeof(base_vlan), 427 HCLGE_MBX_PUSH_VLAN_INFO, vfid); 428 } 429 430 static int hclge_set_vf_vlan_cfg(struct hclge_vport *vport, 431 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 432 struct hclge_respond_to_vf_msg *resp_msg) 433 { 434 #define HCLGE_MBX_VLAN_STATE_OFFSET 0 435 #define HCLGE_MBX_VLAN_INFO_OFFSET 2 436 437 struct hnae3_handle *handle = &vport->nic; 438 struct hclge_dev *hdev = vport->back; 439 struct hclge_vf_vlan_cfg *msg_cmd; 440 __be16 proto; 441 u16 vlan_id; 442 443 msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg; 444 switch (msg_cmd->subcode) { 445 case HCLGE_MBX_VLAN_FILTER: 446 proto = cpu_to_be16(le16_to_cpu(msg_cmd->proto)); 447 vlan_id = le16_to_cpu(msg_cmd->vlan); 448 return hclge_set_vlan_filter(handle, proto, vlan_id, 449 msg_cmd->is_kill); 450 case HCLGE_MBX_VLAN_RX_OFF_CFG: 451 return hclge_en_hw_strip_rxvtag(handle, msg_cmd->enable); 452 case HCLGE_MBX_GET_PORT_BASE_VLAN_STATE: 453 /* vf does not need to know about the port based VLAN state 454 * on device HNAE3_DEVICE_VERSION_V3. So always return disable 455 * on device HNAE3_DEVICE_VERSION_V3 if vf queries the port 456 * based VLAN state. 457 */ 458 resp_msg->data[0] = 459 hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3 ? 460 HNAE3_PORT_BASE_VLAN_DISABLE : 461 vport->port_base_vlan_cfg.state; 462 resp_msg->len = sizeof(u8); 463 return 0; 464 case HCLGE_MBX_ENABLE_VLAN_FILTER: 465 return hclge_enable_vport_vlan_filter(vport, msg_cmd->enable); 466 default: 467 return 0; 468 } 469 } 470 471 static int hclge_set_vf_alive(struct hclge_vport *vport, 472 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 473 { 474 bool alive = !!mbx_req->msg.data[0]; 475 int ret = 0; 476 477 if (alive) 478 ret = hclge_vport_start(vport); 479 else 480 hclge_vport_stop(vport); 481 482 return ret; 483 } 484 485 static void hclge_get_basic_info(struct hclge_vport *vport, 486 struct hclge_respond_to_vf_msg *resp_msg) 487 { 488 struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo; 489 struct hnae3_ae_dev *ae_dev = vport->back->ae_dev; 490 struct hclge_basic_info *basic_info; 491 unsigned int i; 492 u32 pf_caps; 493 494 basic_info = (struct hclge_basic_info *)resp_msg->data; 495 for (i = 0; i < kinfo->tc_info.num_tc; i++) 496 basic_info->hw_tc_map |= BIT(i); 497 498 pf_caps = le32_to_cpu(basic_info->pf_caps); 499 if (test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) 500 hnae3_set_bit(pf_caps, HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B, 1); 501 502 basic_info->pf_caps = cpu_to_le32(pf_caps); 503 resp_msg->len = HCLGE_MBX_MAX_RESP_DATA_SIZE; 504 } 505 506 static void hclge_get_vf_queue_info(struct hclge_vport *vport, 507 struct hclge_respond_to_vf_msg *resp_msg) 508 { 509 #define HCLGE_TQPS_RSS_INFO_LEN 6 510 511 struct hclge_mbx_vf_queue_info *queue_info; 512 struct hclge_dev *hdev = vport->back; 513 514 /* get the queue related info */ 515 queue_info = (struct hclge_mbx_vf_queue_info *)resp_msg->data; 516 queue_info->num_tqps = cpu_to_le16(vport->alloc_tqps); 517 queue_info->rss_size = cpu_to_le16(vport->nic.kinfo.rss_size); 518 queue_info->rx_buf_len = cpu_to_le16(hdev->rx_buf_len); 519 resp_msg->len = HCLGE_TQPS_RSS_INFO_LEN; 520 } 521 522 static void hclge_get_vf_mac_addr(struct hclge_vport *vport, 523 struct hclge_respond_to_vf_msg *resp_msg) 524 { 525 ether_addr_copy(resp_msg->data, vport->vf_info.mac); 526 resp_msg->len = ETH_ALEN; 527 } 528 529 static void hclge_get_vf_queue_depth(struct hclge_vport *vport, 530 struct hclge_respond_to_vf_msg *resp_msg) 531 { 532 #define HCLGE_TQPS_DEPTH_INFO_LEN 4 533 534 struct hclge_mbx_vf_queue_depth *queue_depth; 535 struct hclge_dev *hdev = vport->back; 536 537 /* get the queue depth info */ 538 queue_depth = (struct hclge_mbx_vf_queue_depth *)resp_msg->data; 539 queue_depth->num_tx_desc = cpu_to_le16(hdev->num_tx_desc); 540 queue_depth->num_rx_desc = cpu_to_le16(hdev->num_rx_desc); 541 542 resp_msg->len = HCLGE_TQPS_DEPTH_INFO_LEN; 543 } 544 545 static void hclge_get_vf_media_type(struct hclge_vport *vport, 546 struct hclge_respond_to_vf_msg *resp_msg) 547 { 548 #define HCLGE_VF_MEDIA_TYPE_OFFSET 0 549 #define HCLGE_VF_MODULE_TYPE_OFFSET 1 550 #define HCLGE_VF_MEDIA_TYPE_LENGTH 2 551 552 struct hclge_dev *hdev = vport->back; 553 554 resp_msg->data[HCLGE_VF_MEDIA_TYPE_OFFSET] = 555 hdev->hw.mac.media_type; 556 resp_msg->data[HCLGE_VF_MODULE_TYPE_OFFSET] = 557 hdev->hw.mac.module_type; 558 resp_msg->len = HCLGE_VF_MEDIA_TYPE_LENGTH; 559 } 560 561 int hclge_push_vf_link_status(struct hclge_vport *vport) 562 { 563 #define HCLGE_VF_LINK_STATE_UP 1U 564 #define HCLGE_VF_LINK_STATE_DOWN 0U 565 566 struct hclge_mbx_link_status link_info; 567 struct hclge_dev *hdev = vport->back; 568 u16 link_status; 569 570 /* mac.link can only be 0 or 1 */ 571 switch (vport->vf_info.link_state) { 572 case IFLA_VF_LINK_STATE_ENABLE: 573 link_status = HCLGE_VF_LINK_STATE_UP; 574 break; 575 case IFLA_VF_LINK_STATE_DISABLE: 576 link_status = HCLGE_VF_LINK_STATE_DOWN; 577 break; 578 case IFLA_VF_LINK_STATE_AUTO: 579 default: 580 link_status = (u16)hdev->hw.mac.link; 581 break; 582 } 583 584 link_info.link_status = cpu_to_le16(link_status); 585 link_info.speed = cpu_to_le32(hdev->hw.mac.speed); 586 link_info.duplex = cpu_to_le16(hdev->hw.mac.duplex); 587 link_info.flag = HCLGE_MBX_PUSH_LINK_STATUS_EN; 588 589 /* send this requested info to VF */ 590 return hclge_send_mbx_msg(vport, (u8 *)&link_info, sizeof(link_info), 591 HCLGE_MBX_LINK_STAT_CHANGE, vport->vport_id); 592 } 593 594 static void hclge_get_link_mode(struct hclge_vport *vport, 595 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 596 { 597 #define HCLGE_SUPPORTED 1 598 struct hclge_mbx_link_mode link_mode; 599 struct hclge_dev *hdev = vport->back; 600 unsigned long advertising; 601 unsigned long supported; 602 unsigned long send_data; 603 u8 dest_vfid; 604 605 advertising = hdev->hw.mac.advertising[0]; 606 supported = hdev->hw.mac.supported[0]; 607 dest_vfid = mbx_req->mbx_src_vfid; 608 send_data = mbx_req->msg.data[0] == HCLGE_SUPPORTED ? supported : 609 advertising; 610 link_mode.idx = cpu_to_le16((u16)mbx_req->msg.data[0]); 611 link_mode.link_mode = cpu_to_le64(send_data); 612 613 hclge_send_mbx_msg(vport, (u8 *)&link_mode, sizeof(link_mode), 614 HCLGE_MBX_LINK_STAT_MODE, dest_vfid); 615 } 616 617 static int hclge_mbx_reset_vf_queue(struct hclge_vport *vport, 618 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 619 struct hclge_respond_to_vf_msg *resp_msg) 620 { 621 #define HCLGE_RESET_ALL_QUEUE_DONE 1U 622 struct hnae3_handle *handle = &vport->nic; 623 struct hclge_dev *hdev = vport->back; 624 u16 queue_id; 625 int ret; 626 627 queue_id = le16_to_cpu(*(__le16 *)mbx_req->msg.data); 628 resp_msg->data[0] = HCLGE_RESET_ALL_QUEUE_DONE; 629 resp_msg->len = sizeof(u8); 630 631 /* pf will reset vf's all queues at a time. So it is unnecessary 632 * to reset queues if queue_id > 0, just return success. 633 */ 634 if (queue_id > 0) 635 return 0; 636 637 ret = hclge_reset_tqp(handle); 638 if (ret) 639 dev_err(&hdev->pdev->dev, "failed to reset vf %u queue, ret = %d\n", 640 vport->vport_id - HCLGE_VF_VPORT_START_NUM, ret); 641 642 return ret; 643 } 644 645 static int hclge_reset_vf(struct hclge_vport *vport) 646 { 647 struct hclge_dev *hdev = vport->back; 648 649 dev_warn(&hdev->pdev->dev, "PF received VF reset request from VF %u!", 650 vport->vport_id - HCLGE_VF_VPORT_START_NUM); 651 652 return hclge_func_reset_cmd(hdev, vport->vport_id); 653 } 654 655 static void hclge_vf_keep_alive(struct hclge_vport *vport) 656 { 657 vport->last_active_jiffies = jiffies; 658 } 659 660 static int hclge_set_vf_mtu(struct hclge_vport *vport, 661 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 662 { 663 struct hclge_mbx_mtu_info *mtu_info; 664 u32 mtu; 665 666 mtu_info = (struct hclge_mbx_mtu_info *)mbx_req->msg.data; 667 mtu = le32_to_cpu(mtu_info->mtu); 668 669 return hclge_set_vport_mtu(vport, mtu); 670 } 671 672 static int hclge_get_queue_id_in_pf(struct hclge_vport *vport, 673 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 674 struct hclge_respond_to_vf_msg *resp_msg) 675 { 676 struct hnae3_handle *handle = &vport->nic; 677 struct hclge_dev *hdev = vport->back; 678 u16 queue_id, qid_in_pf; 679 680 queue_id = le16_to_cpu(*(__le16 *)mbx_req->msg.data); 681 if (queue_id >= handle->kinfo.num_tqps) { 682 dev_err(&hdev->pdev->dev, "Invalid queue id(%u) from VF %u\n", 683 queue_id, mbx_req->mbx_src_vfid); 684 return -EINVAL; 685 } 686 687 qid_in_pf = hclge_covert_handle_qid_global(&vport->nic, queue_id); 688 *(__le16 *)resp_msg->data = cpu_to_le16(qid_in_pf); 689 resp_msg->len = sizeof(qid_in_pf); 690 return 0; 691 } 692 693 static int hclge_get_rss_key(struct hclge_vport *vport, 694 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 695 struct hclge_respond_to_vf_msg *resp_msg) 696 { 697 #define HCLGE_RSS_MBX_RESP_LEN 8 698 struct hclge_dev *hdev = vport->back; 699 struct hclge_comm_rss_cfg *rss_cfg; 700 u8 index; 701 702 index = mbx_req->msg.data[0]; 703 rss_cfg = &hdev->rss_cfg; 704 705 /* Check the query index of rss_hash_key from VF, make sure no 706 * more than the size of rss_hash_key. 707 */ 708 if (((index + 1) * HCLGE_RSS_MBX_RESP_LEN) > 709 sizeof(rss_cfg->rss_hash_key)) { 710 dev_warn(&hdev->pdev->dev, 711 "failed to get the rss hash key, the index(%u) invalid !\n", 712 index); 713 return -EINVAL; 714 } 715 716 memcpy(resp_msg->data, 717 &rss_cfg->rss_hash_key[index * HCLGE_RSS_MBX_RESP_LEN], 718 HCLGE_RSS_MBX_RESP_LEN); 719 resp_msg->len = HCLGE_RSS_MBX_RESP_LEN; 720 return 0; 721 } 722 723 static void hclge_link_fail_parse(struct hclge_dev *hdev, u8 link_fail_code) 724 { 725 switch (link_fail_code) { 726 case HCLGE_LF_REF_CLOCK_LOST: 727 dev_warn(&hdev->pdev->dev, "Reference clock lost!\n"); 728 break; 729 case HCLGE_LF_XSFP_TX_DISABLE: 730 dev_warn(&hdev->pdev->dev, "SFP tx is disabled!\n"); 731 break; 732 case HCLGE_LF_XSFP_ABSENT: 733 dev_warn(&hdev->pdev->dev, "SFP is absent!\n"); 734 break; 735 default: 736 break; 737 } 738 } 739 740 static void hclge_handle_link_change_event(struct hclge_dev *hdev, 741 struct hclge_mbx_vf_to_pf_cmd *req) 742 { 743 hclge_task_schedule(hdev, 0); 744 745 if (!req->msg.subcode) 746 hclge_link_fail_parse(hdev, req->msg.data[0]); 747 } 748 749 static bool hclge_cmd_crq_empty(struct hclge_hw *hw) 750 { 751 u32 tail = hclge_read_dev(hw, HCLGE_COMM_NIC_CRQ_TAIL_REG); 752 753 return tail == hw->hw.cmq.crq.next_to_use; 754 } 755 756 static void hclge_handle_ncsi_error(struct hclge_dev *hdev) 757 { 758 struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 759 760 ae_dev->ops->set_default_reset_request(ae_dev, HNAE3_GLOBAL_RESET); 761 dev_warn(&hdev->pdev->dev, "requesting reset due to NCSI error\n"); 762 ae_dev->ops->reset_event(hdev->pdev, NULL); 763 } 764 765 static void hclge_handle_vf_tbl(struct hclge_vport *vport, 766 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 767 { 768 struct hclge_dev *hdev = vport->back; 769 struct hclge_vf_vlan_cfg *msg_cmd; 770 771 msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg; 772 if (msg_cmd->subcode == HCLGE_MBX_VPORT_LIST_CLEAR) { 773 hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_UC); 774 hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_MC); 775 hclge_rm_vport_all_vlan_table(vport, true); 776 } else { 777 dev_warn(&hdev->pdev->dev, "Invalid cmd(%u)\n", 778 msg_cmd->subcode); 779 } 780 } 781 782 void hclge_mbx_handler(struct hclge_dev *hdev) 783 { 784 struct hclge_comm_cmq_ring *crq = &hdev->hw.hw.cmq.crq; 785 struct hclge_respond_to_vf_msg resp_msg; 786 struct hclge_mbx_vf_to_pf_cmd *req; 787 struct hclge_vport *vport; 788 struct hclge_desc *desc; 789 bool is_del = false; 790 unsigned int flag; 791 int ret = 0; 792 793 /* handle all the mailbox requests in the queue */ 794 while (!hclge_cmd_crq_empty(&hdev->hw)) { 795 if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, 796 &hdev->hw.hw.comm_state)) { 797 dev_warn(&hdev->pdev->dev, 798 "command queue needs re-initializing\n"); 799 return; 800 } 801 802 desc = &crq->desc[crq->next_to_use]; 803 req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data; 804 805 flag = le16_to_cpu(crq->desc[crq->next_to_use].flag); 806 if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) { 807 dev_warn(&hdev->pdev->dev, 808 "dropped invalid mailbox message, code = %u\n", 809 req->msg.code); 810 811 /* dropping/not processing this invalid message */ 812 crq->desc[crq->next_to_use].flag = 0; 813 hclge_mbx_ring_ptr_move_crq(crq); 814 continue; 815 } 816 817 vport = &hdev->vport[req->mbx_src_vfid]; 818 819 trace_hclge_pf_mbx_get(hdev, req); 820 821 /* clear the resp_msg before processing every mailbox message */ 822 memset(&resp_msg, 0, sizeof(resp_msg)); 823 824 switch (req->msg.code) { 825 case HCLGE_MBX_MAP_RING_TO_VECTOR: 826 ret = hclge_map_unmap_ring_to_vf_vector(vport, true, 827 req); 828 break; 829 case HCLGE_MBX_UNMAP_RING_TO_VECTOR: 830 ret = hclge_map_unmap_ring_to_vf_vector(vport, false, 831 req); 832 break; 833 case HCLGE_MBX_GET_RING_VECTOR_MAP: 834 ret = hclge_get_vf_ring_vector_map(vport, req, 835 &resp_msg); 836 if (ret) 837 dev_err(&hdev->pdev->dev, 838 "PF fail(%d) to get VF ring vector map\n", 839 ret); 840 break; 841 case HCLGE_MBX_SET_PROMISC_MODE: 842 hclge_set_vf_promisc_mode(vport, req); 843 break; 844 case HCLGE_MBX_SET_UNICAST: 845 ret = hclge_set_vf_uc_mac_addr(vport, req); 846 if (ret) 847 dev_err(&hdev->pdev->dev, 848 "PF fail(%d) to set VF UC MAC Addr\n", 849 ret); 850 break; 851 case HCLGE_MBX_SET_MULTICAST: 852 ret = hclge_set_vf_mc_mac_addr(vport, req); 853 if (ret) 854 dev_err(&hdev->pdev->dev, 855 "PF fail(%d) to set VF MC MAC Addr\n", 856 ret); 857 break; 858 case HCLGE_MBX_SET_VLAN: 859 ret = hclge_set_vf_vlan_cfg(vport, req, &resp_msg); 860 if (ret) 861 dev_err(&hdev->pdev->dev, 862 "PF failed(%d) to config VF's VLAN\n", 863 ret); 864 break; 865 case HCLGE_MBX_SET_ALIVE: 866 ret = hclge_set_vf_alive(vport, req); 867 if (ret) 868 dev_err(&hdev->pdev->dev, 869 "PF failed(%d) to set VF's ALIVE\n", 870 ret); 871 break; 872 case HCLGE_MBX_GET_QINFO: 873 hclge_get_vf_queue_info(vport, &resp_msg); 874 break; 875 case HCLGE_MBX_GET_QDEPTH: 876 hclge_get_vf_queue_depth(vport, &resp_msg); 877 break; 878 case HCLGE_MBX_GET_BASIC_INFO: 879 hclge_get_basic_info(vport, &resp_msg); 880 break; 881 case HCLGE_MBX_GET_LINK_STATUS: 882 ret = hclge_push_vf_link_status(vport); 883 if (ret) 884 dev_err(&hdev->pdev->dev, 885 "failed to inform link stat to VF, ret = %d\n", 886 ret); 887 break; 888 case HCLGE_MBX_QUEUE_RESET: 889 ret = hclge_mbx_reset_vf_queue(vport, req, &resp_msg); 890 break; 891 case HCLGE_MBX_RESET: 892 ret = hclge_reset_vf(vport); 893 break; 894 case HCLGE_MBX_KEEP_ALIVE: 895 hclge_vf_keep_alive(vport); 896 break; 897 case HCLGE_MBX_SET_MTU: 898 ret = hclge_set_vf_mtu(vport, req); 899 if (ret) 900 dev_err(&hdev->pdev->dev, 901 "VF fail(%d) to set mtu\n", ret); 902 break; 903 case HCLGE_MBX_GET_QID_IN_PF: 904 ret = hclge_get_queue_id_in_pf(vport, req, &resp_msg); 905 break; 906 case HCLGE_MBX_GET_RSS_KEY: 907 ret = hclge_get_rss_key(vport, req, &resp_msg); 908 break; 909 case HCLGE_MBX_GET_LINK_MODE: 910 hclge_get_link_mode(vport, req); 911 break; 912 case HCLGE_MBX_GET_VF_FLR_STATUS: 913 case HCLGE_MBX_VF_UNINIT: 914 is_del = req->msg.code == HCLGE_MBX_VF_UNINIT; 915 hclge_rm_vport_all_mac_table(vport, is_del, 916 HCLGE_MAC_ADDR_UC); 917 hclge_rm_vport_all_mac_table(vport, is_del, 918 HCLGE_MAC_ADDR_MC); 919 hclge_rm_vport_all_vlan_table(vport, is_del); 920 break; 921 case HCLGE_MBX_GET_MEDIA_TYPE: 922 hclge_get_vf_media_type(vport, &resp_msg); 923 break; 924 case HCLGE_MBX_PUSH_LINK_STATUS: 925 hclge_handle_link_change_event(hdev, req); 926 break; 927 case HCLGE_MBX_GET_MAC_ADDR: 928 hclge_get_vf_mac_addr(vport, &resp_msg); 929 break; 930 case HCLGE_MBX_NCSI_ERROR: 931 hclge_handle_ncsi_error(hdev); 932 break; 933 case HCLGE_MBX_HANDLE_VF_TBL: 934 hclge_handle_vf_tbl(vport, req); 935 break; 936 default: 937 dev_err(&hdev->pdev->dev, 938 "un-supported mailbox message, code = %u\n", 939 req->msg.code); 940 break; 941 } 942 943 /* PF driver should not reply IMP */ 944 if (hnae3_get_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B) && 945 req->msg.code < HCLGE_MBX_GET_VF_FLR_STATUS) { 946 resp_msg.status = ret; 947 if (time_is_before_jiffies(hdev->last_mbx_scheduled + 948 HCLGE_MBX_SCHED_TIMEOUT)) 949 dev_warn(&hdev->pdev->dev, 950 "resp vport%u mbx(%u,%u) late\n", 951 req->mbx_src_vfid, 952 req->msg.code, 953 req->msg.subcode); 954 955 hclge_gen_resp_to_vf(vport, req, &resp_msg); 956 } 957 958 crq->desc[crq->next_to_use].flag = 0; 959 hclge_mbx_ring_ptr_move_crq(crq); 960 961 /* reinitialize ret after complete the mbx message processing */ 962 ret = 0; 963 } 964 965 /* Write back CMDQ_RQ header pointer, M7 need this pointer */ 966 hclge_write_dev(&hdev->hw, HCLGE_COMM_NIC_CRQ_HEAD_REG, 967 crq->next_to_use); 968 } 969