13c666b58Sliuzhongzhu // SPDX-License-Identifier: GPL-2.0+ 23c666b58Sliuzhongzhu /* Copyright (c) 2018-2019 Hisilicon Limited. */ 33c666b58Sliuzhongzhu 43c666b58Sliuzhongzhu #include <linux/device.h> 53c666b58Sliuzhongzhu 66fc22440Sliuzhongzhu #include "hclge_debugfs.h" 73c666b58Sliuzhongzhu #include "hclge_main.h" 82849d4e7Sliuzhongzhu #include "hclge_tm.h" 93c666b58Sliuzhongzhu #include "hnae3.h" 103c666b58Sliuzhongzhu 11a582b78dSZhongzhu Liu static struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = { 12a582b78dSZhongzhu Liu { .reg_type = "bios common", 13a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_bios_common_reg[0], 14a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_bios_common_reg), 15a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_BIOS_OFFSET, 16a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_BIOS_COMMON_REG } }, 17a582b78dSZhongzhu Liu { .reg_type = "ssu", 18a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ssu_reg_0[0], 19a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_0), 20a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_SSU_0_OFFSET, 21a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_SSU_REG_0 } }, 22a582b78dSZhongzhu Liu { .reg_type = "ssu", 23a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ssu_reg_1[0], 24a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_1), 25a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_SSU_1_OFFSET, 26a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_SSU_REG_1 } }, 27a582b78dSZhongzhu Liu { .reg_type = "ssu", 28a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ssu_reg_2[0], 29a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_2), 30a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_SSU_2_OFFSET, 31a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_SSU_REG_2 } }, 32a582b78dSZhongzhu Liu { .reg_type = "igu egu", 33a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_igu_egu_reg[0], 34a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_igu_egu_reg), 35a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_IGU_OFFSET, 36a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_IGU_EGU_REG } }, 37a582b78dSZhongzhu Liu { .reg_type = "rpu", 38a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rpu_reg_0[0], 39a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rpu_reg_0), 40a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RPU_0_OFFSET, 41a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RPU_REG_0 } }, 42a582b78dSZhongzhu Liu { .reg_type = "rpu", 43a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rpu_reg_1[0], 44a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rpu_reg_1), 45a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RPU_1_OFFSET, 46a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RPU_REG_1 } }, 47a582b78dSZhongzhu Liu { .reg_type = "ncsi", 48a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ncsi_reg[0], 49a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ncsi_reg), 50a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_NCSI_OFFSET, 51a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_NCSI_REG } }, 52a582b78dSZhongzhu Liu { .reg_type = "rtc", 53a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rtc_reg[0], 54a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rtc_reg), 55a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RTC_OFFSET, 56a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RTC_REG } }, 57a582b78dSZhongzhu Liu { .reg_type = "ppp", 58a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ppp_reg[0], 59a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ppp_reg), 60a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_PPP_OFFSET, 61a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_PPP_REG } }, 62a582b78dSZhongzhu Liu { .reg_type = "rcb", 63a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rcb_reg[0], 64a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rcb_reg), 65a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RCB_OFFSET, 66a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RCB_REG } }, 67a582b78dSZhongzhu Liu { .reg_type = "tqp", 68a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_tqp_reg[0], 69a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_tqp_reg), 70a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_TQP_OFFSET, 71a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_TQP_REG } }, 72a582b78dSZhongzhu Liu }; 73a582b78dSZhongzhu Liu 7427cf979aSliuzhongzhu static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset) 7527cf979aSliuzhongzhu { 76a582b78dSZhongzhu Liu struct hclge_desc desc[HCLGE_GET_DFX_REG_TYPE_CNT]; 77a582b78dSZhongzhu Liu int entries_per_desc; 78a582b78dSZhongzhu Liu int index; 7927cf979aSliuzhongzhu int ret; 8027cf979aSliuzhongzhu 81ddb54554SGuangbin Huang ret = hclge_query_bd_num_cmd_send(hdev, desc); 82ddb54554SGuangbin Huang if (ret) { 8327cf979aSliuzhongzhu dev_err(&hdev->pdev->dev, 84ed5b255bSYufeng Mo "get dfx bdnum fail, ret = %d\n", ret); 8527cf979aSliuzhongzhu return ret; 8627cf979aSliuzhongzhu } 8727cf979aSliuzhongzhu 88a582b78dSZhongzhu Liu entries_per_desc = ARRAY_SIZE(desc[0].data); 89a582b78dSZhongzhu Liu index = offset % entries_per_desc; 9072fa4904SGuojia Liao return le32_to_cpu(desc[offset / entries_per_desc].data[index]); 9127cf979aSliuzhongzhu } 9227cf979aSliuzhongzhu 9327cf979aSliuzhongzhu static int hclge_dbg_cmd_send(struct hclge_dev *hdev, 9427cf979aSliuzhongzhu struct hclge_desc *desc_src, 9527cf979aSliuzhongzhu int index, int bd_num, 9627cf979aSliuzhongzhu enum hclge_opcode_type cmd) 9727cf979aSliuzhongzhu { 9827cf979aSliuzhongzhu struct hclge_desc *desc = desc_src; 9927cf979aSliuzhongzhu int ret, i; 10027cf979aSliuzhongzhu 10127cf979aSliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 10227cf979aSliuzhongzhu desc->data[0] = cpu_to_le32(index); 10327cf979aSliuzhongzhu 10427cf979aSliuzhongzhu for (i = 1; i < bd_num; i++) { 10527cf979aSliuzhongzhu desc->flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 10627cf979aSliuzhongzhu desc++; 10727cf979aSliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 10827cf979aSliuzhongzhu } 10927cf979aSliuzhongzhu 11027cf979aSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc_src, bd_num); 111ed5b255bSYufeng Mo if (ret) 11227cf979aSliuzhongzhu dev_err(&hdev->pdev->dev, 113ed5b255bSYufeng Mo "cmd(0x%x) send fail, ret = %d\n", cmd, ret); 11427cf979aSliuzhongzhu return ret; 11527cf979aSliuzhongzhu } 11627cf979aSliuzhongzhu 11727cf979aSliuzhongzhu static void hclge_dbg_dump_reg_common(struct hclge_dev *hdev, 118a582b78dSZhongzhu Liu struct hclge_dbg_reg_type_info *reg_info, 119a582b78dSZhongzhu Liu const char *cmd_buf) 12027cf979aSliuzhongzhu { 121a582b78dSZhongzhu Liu #define IDX_OFFSET 1 122b37ce587SYufeng Mo 123a582b78dSZhongzhu Liu const char *s = &cmd_buf[strlen(reg_info->reg_type) + IDX_OFFSET]; 124a582b78dSZhongzhu Liu struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg; 125a582b78dSZhongzhu Liu struct hclge_dbg_reg_common_msg *reg_msg = ®_info->reg_msg; 12627cf979aSliuzhongzhu struct hclge_desc *desc_src; 12727cf979aSliuzhongzhu struct hclge_desc *desc; 128a582b78dSZhongzhu Liu int entries_per_desc; 12927cf979aSliuzhongzhu int bd_num, buf_len; 130a582b78dSZhongzhu Liu int index = 0; 131a582b78dSZhongzhu Liu int min_num; 13227cf979aSliuzhongzhu int ret, i; 13327cf979aSliuzhongzhu 134a582b78dSZhongzhu Liu if (*s) { 135a582b78dSZhongzhu Liu ret = kstrtouint(s, 0, &index); 13627cf979aSliuzhongzhu index = (ret != 0) ? 0 : index; 137a582b78dSZhongzhu Liu } 13827cf979aSliuzhongzhu 139a582b78dSZhongzhu Liu bd_num = hclge_dbg_get_dfx_bd_num(hdev, reg_msg->offset); 140ed5b255bSYufeng Mo if (bd_num <= 0) { 141ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "get cmd(%d) bd num(%d) failed\n", 142ed5b255bSYufeng Mo reg_msg->offset, bd_num); 14327cf979aSliuzhongzhu return; 144ed5b255bSYufeng Mo } 14527cf979aSliuzhongzhu 14627cf979aSliuzhongzhu buf_len = sizeof(struct hclge_desc) * bd_num; 14727cf979aSliuzhongzhu desc_src = kzalloc(buf_len, GFP_KERNEL); 148fbdc4d79SYufeng Mo if (!desc_src) 14927cf979aSliuzhongzhu return; 15027cf979aSliuzhongzhu 15127cf979aSliuzhongzhu desc = desc_src; 152a582b78dSZhongzhu Liu ret = hclge_dbg_cmd_send(hdev, desc, index, bd_num, reg_msg->cmd); 153a582b78dSZhongzhu Liu if (ret) { 15427cf979aSliuzhongzhu kfree(desc_src); 15527cf979aSliuzhongzhu return; 15627cf979aSliuzhongzhu } 15727cf979aSliuzhongzhu 158a582b78dSZhongzhu Liu entries_per_desc = ARRAY_SIZE(desc->data); 159a582b78dSZhongzhu Liu min_num = min_t(int, bd_num * entries_per_desc, reg_msg->msg_num); 16027cf979aSliuzhongzhu 16127cf979aSliuzhongzhu desc = desc_src; 162a582b78dSZhongzhu Liu for (i = 0; i < min_num; i++) { 163a582b78dSZhongzhu Liu if (i > 0 && (i % entries_per_desc) == 0) 164a582b78dSZhongzhu Liu desc++; 16527cf979aSliuzhongzhu if (dfx_message->flag) 16627cf979aSliuzhongzhu dev_info(&hdev->pdev->dev, "%s: 0x%x\n", 167b37ce587SYufeng Mo dfx_message->message, 16839edaf24SGuojia Liao le32_to_cpu(desc->data[i % entries_per_desc])); 16927cf979aSliuzhongzhu 17027cf979aSliuzhongzhu dfx_message++; 17127cf979aSliuzhongzhu } 17227cf979aSliuzhongzhu 17327cf979aSliuzhongzhu kfree(desc_src); 17427cf979aSliuzhongzhu } 17527cf979aSliuzhongzhu 176ebaf1908SWeihang Li static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, const char *cmd_buf) 177c0ebebb9Sliuzhongzhu { 178c0ebebb9Sliuzhongzhu struct device *dev = &hdev->pdev->dev; 179c0ebebb9Sliuzhongzhu struct hclge_dbg_bitmap_cmd *bitmap; 18077ba415dSYufeng Mo enum hclge_opcode_type cmd; 181c0ebebb9Sliuzhongzhu int rq_id, pri_id, qset_id; 182c0ebebb9Sliuzhongzhu int port_id, nq_id, pg_id; 183c0ebebb9Sliuzhongzhu struct hclge_desc desc[2]; 184c0ebebb9Sliuzhongzhu 185c0ebebb9Sliuzhongzhu int cnt, ret; 186c0ebebb9Sliuzhongzhu 187c0ebebb9Sliuzhongzhu cnt = sscanf(cmd_buf, "%i %i %i %i %i %i", 188c0ebebb9Sliuzhongzhu &port_id, &pri_id, &pg_id, &rq_id, &nq_id, &qset_id); 189c0ebebb9Sliuzhongzhu if (cnt != 6) { 190c0ebebb9Sliuzhongzhu dev_err(&hdev->pdev->dev, 191c0ebebb9Sliuzhongzhu "dump dcb: bad command parameter, cnt=%d\n", cnt); 192c0ebebb9Sliuzhongzhu return; 193c0ebebb9Sliuzhongzhu } 194c0ebebb9Sliuzhongzhu 19577ba415dSYufeng Mo cmd = HCLGE_OPC_QSET_DFX_STS; 19677ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, qset_id, 1, cmd); 197c0ebebb9Sliuzhongzhu if (ret) 19877ba415dSYufeng Mo goto err_dcb_cmd_send; 199c0ebebb9Sliuzhongzhu 200c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 201c0ebebb9Sliuzhongzhu dev_info(dev, "roce_qset_mask: 0x%x\n", bitmap->bit0); 202c0ebebb9Sliuzhongzhu dev_info(dev, "nic_qs_mask: 0x%x\n", bitmap->bit1); 203c0ebebb9Sliuzhongzhu dev_info(dev, "qs_shaping_pass: 0x%x\n", bitmap->bit2); 204c0ebebb9Sliuzhongzhu dev_info(dev, "qs_bp_sts: 0x%x\n", bitmap->bit3); 205c0ebebb9Sliuzhongzhu 20677ba415dSYufeng Mo cmd = HCLGE_OPC_PRI_DFX_STS; 20777ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, pri_id, 1, cmd); 208c0ebebb9Sliuzhongzhu if (ret) 20977ba415dSYufeng Mo goto err_dcb_cmd_send; 210c0ebebb9Sliuzhongzhu 211c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 212c0ebebb9Sliuzhongzhu dev_info(dev, "pri_mask: 0x%x\n", bitmap->bit0); 213c0ebebb9Sliuzhongzhu dev_info(dev, "pri_cshaping_pass: 0x%x\n", bitmap->bit1); 214c0ebebb9Sliuzhongzhu dev_info(dev, "pri_pshaping_pass: 0x%x\n", bitmap->bit2); 215c0ebebb9Sliuzhongzhu 21677ba415dSYufeng Mo cmd = HCLGE_OPC_PG_DFX_STS; 21777ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, pg_id, 1, cmd); 218c0ebebb9Sliuzhongzhu if (ret) 21977ba415dSYufeng Mo goto err_dcb_cmd_send; 220c0ebebb9Sliuzhongzhu 221c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 222c0ebebb9Sliuzhongzhu dev_info(dev, "pg_mask: 0x%x\n", bitmap->bit0); 223c0ebebb9Sliuzhongzhu dev_info(dev, "pg_cshaping_pass: 0x%x\n", bitmap->bit1); 224c0ebebb9Sliuzhongzhu dev_info(dev, "pg_pshaping_pass: 0x%x\n", bitmap->bit2); 225c0ebebb9Sliuzhongzhu 22677ba415dSYufeng Mo cmd = HCLGE_OPC_PORT_DFX_STS; 22777ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd); 228c0ebebb9Sliuzhongzhu if (ret) 22977ba415dSYufeng Mo goto err_dcb_cmd_send; 230c0ebebb9Sliuzhongzhu 231c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 232c0ebebb9Sliuzhongzhu dev_info(dev, "port_mask: 0x%x\n", bitmap->bit0); 233c0ebebb9Sliuzhongzhu dev_info(dev, "port_shaping_pass: 0x%x\n", bitmap->bit1); 234c0ebebb9Sliuzhongzhu 23577ba415dSYufeng Mo cmd = HCLGE_OPC_SCH_NQ_CNT; 23677ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, nq_id, 1, cmd); 237c0ebebb9Sliuzhongzhu if (ret) 23877ba415dSYufeng Mo goto err_dcb_cmd_send; 239c0ebebb9Sliuzhongzhu 24039edaf24SGuojia Liao dev_info(dev, "sch_nq_cnt: 0x%x\n", le32_to_cpu(desc[0].data[1])); 241c0ebebb9Sliuzhongzhu 24277ba415dSYufeng Mo cmd = HCLGE_OPC_SCH_RQ_CNT; 24377ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, nq_id, 1, cmd); 244c0ebebb9Sliuzhongzhu if (ret) 24577ba415dSYufeng Mo goto err_dcb_cmd_send; 246c0ebebb9Sliuzhongzhu 24739edaf24SGuojia Liao dev_info(dev, "sch_rq_cnt: 0x%x\n", le32_to_cpu(desc[0].data[1])); 248c0ebebb9Sliuzhongzhu 24977ba415dSYufeng Mo cmd = HCLGE_OPC_TM_INTERNAL_STS; 25077ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, 0, 2, cmd); 251c0ebebb9Sliuzhongzhu if (ret) 25277ba415dSYufeng Mo goto err_dcb_cmd_send; 253c0ebebb9Sliuzhongzhu 25439edaf24SGuojia Liao dev_info(dev, "pri_bp: 0x%x\n", le32_to_cpu(desc[0].data[1])); 25539edaf24SGuojia Liao dev_info(dev, "fifo_dfx_info: 0x%x\n", le32_to_cpu(desc[0].data[2])); 25639edaf24SGuojia Liao dev_info(dev, "sch_roce_fifo_afull_gap: 0x%x\n", 25739edaf24SGuojia Liao le32_to_cpu(desc[0].data[3])); 25839edaf24SGuojia Liao dev_info(dev, "tx_private_waterline: 0x%x\n", 25939edaf24SGuojia Liao le32_to_cpu(desc[0].data[4])); 26039edaf24SGuojia Liao dev_info(dev, "tm_bypass_en: 0x%x\n", le32_to_cpu(desc[0].data[5])); 26139edaf24SGuojia Liao dev_info(dev, "SSU_TM_BYPASS_EN: 0x%x\n", le32_to_cpu(desc[1].data[0])); 26239edaf24SGuojia Liao dev_info(dev, "SSU_RESERVE_CFG: 0x%x\n", le32_to_cpu(desc[1].data[1])); 263c0ebebb9Sliuzhongzhu 26477ba415dSYufeng Mo cmd = HCLGE_OPC_TM_INTERNAL_CNT; 26577ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd); 266c0ebebb9Sliuzhongzhu if (ret) 26777ba415dSYufeng Mo goto err_dcb_cmd_send; 268c0ebebb9Sliuzhongzhu 26939edaf24SGuojia Liao dev_info(dev, "SCH_NIC_NUM: 0x%x\n", le32_to_cpu(desc[0].data[1])); 27039edaf24SGuojia Liao dev_info(dev, "SCH_ROCE_NUM: 0x%x\n", le32_to_cpu(desc[0].data[2])); 271c0ebebb9Sliuzhongzhu 27277ba415dSYufeng Mo cmd = HCLGE_OPC_TM_INTERNAL_STS_1; 27377ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd); 274c0ebebb9Sliuzhongzhu if (ret) 27577ba415dSYufeng Mo goto err_dcb_cmd_send; 276c0ebebb9Sliuzhongzhu 27739edaf24SGuojia Liao dev_info(dev, "TC_MAP_SEL: 0x%x\n", le32_to_cpu(desc[0].data[1])); 27839edaf24SGuojia Liao dev_info(dev, "IGU_PFC_PRI_EN: 0x%x\n", le32_to_cpu(desc[0].data[2])); 27939edaf24SGuojia Liao dev_info(dev, "MAC_PFC_PRI_EN: 0x%x\n", le32_to_cpu(desc[0].data[3])); 28039edaf24SGuojia Liao dev_info(dev, "IGU_PRI_MAP_TC_CFG: 0x%x\n", 28139edaf24SGuojia Liao le32_to_cpu(desc[0].data[4])); 28239edaf24SGuojia Liao dev_info(dev, "IGU_TX_PRI_MAP_TC_CFG: 0x%x\n", 28339edaf24SGuojia Liao le32_to_cpu(desc[0].data[5])); 28477ba415dSYufeng Mo return; 28577ba415dSYufeng Mo 28677ba415dSYufeng Mo err_dcb_cmd_send: 28777ba415dSYufeng Mo dev_err(&hdev->pdev->dev, 28877ba415dSYufeng Mo "failed to dump dcb dfx, cmd = %#x, ret = %d\n", 28977ba415dSYufeng Mo cmd, ret); 290c0ebebb9Sliuzhongzhu } 291c0ebebb9Sliuzhongzhu 292ebaf1908SWeihang Li static void hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, const char *cmd_buf) 29327cf979aSliuzhongzhu { 294bdad7529SColin Ian King struct hclge_dbg_reg_type_info *reg_info; 295a582b78dSZhongzhu Liu bool has_dump = false; 296a582b78dSZhongzhu Liu int i; 29727cf979aSliuzhongzhu 298a582b78dSZhongzhu Liu for (i = 0; i < ARRAY_SIZE(hclge_dbg_reg_info); i++) { 299a582b78dSZhongzhu Liu reg_info = &hclge_dbg_reg_info[i]; 300a582b78dSZhongzhu Liu if (!strncmp(cmd_buf, reg_info->reg_type, 301a582b78dSZhongzhu Liu strlen(reg_info->reg_type))) { 302a582b78dSZhongzhu Liu hclge_dbg_dump_reg_common(hdev, reg_info, cmd_buf); 303a582b78dSZhongzhu Liu has_dump = true; 304a582b78dSZhongzhu Liu } 305a582b78dSZhongzhu Liu } 30627cf979aSliuzhongzhu 307a582b78dSZhongzhu Liu if (strncmp(cmd_buf, "dcb", 3) == 0) { 308a582b78dSZhongzhu Liu hclge_dbg_dump_dcb(hdev, &cmd_buf[sizeof("dcb")]); 309a582b78dSZhongzhu Liu has_dump = true; 310a582b78dSZhongzhu Liu } 31127cf979aSliuzhongzhu 312a582b78dSZhongzhu Liu if (!has_dump) { 31327cf979aSliuzhongzhu dev_info(&hdev->pdev->dev, "unknown command\n"); 31427cf979aSliuzhongzhu return; 31527cf979aSliuzhongzhu } 31627cf979aSliuzhongzhu } 31727cf979aSliuzhongzhu 3182849d4e7Sliuzhongzhu static void hclge_title_idx_print(struct hclge_dev *hdev, bool flag, int index, 3192849d4e7Sliuzhongzhu char *title_buf, char *true_buf, 3202849d4e7Sliuzhongzhu char *false_buf) 3212849d4e7Sliuzhongzhu { 3222849d4e7Sliuzhongzhu if (flag) 323a8adbb8aSYonglong Liu dev_info(&hdev->pdev->dev, "%s(%d): %s weight: %u\n", 324a8adbb8aSYonglong Liu title_buf, index, true_buf, 325a8adbb8aSYonglong Liu hdev->tm_info.pg_info[0].tc_dwrr[index]); 3262849d4e7Sliuzhongzhu else 3272849d4e7Sliuzhongzhu dev_info(&hdev->pdev->dev, "%s(%d): %s\n", title_buf, index, 3282849d4e7Sliuzhongzhu false_buf); 3292849d4e7Sliuzhongzhu } 3302849d4e7Sliuzhongzhu 3312849d4e7Sliuzhongzhu static void hclge_dbg_dump_tc(struct hclge_dev *hdev) 3322849d4e7Sliuzhongzhu { 3332849d4e7Sliuzhongzhu struct hclge_ets_tc_weight_cmd *ets_weight; 3342849d4e7Sliuzhongzhu struct hclge_desc desc; 3352849d4e7Sliuzhongzhu int i, ret; 3362849d4e7Sliuzhongzhu 3373f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 3383f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 3393f0f3253SYufeng Mo "Only DCB-supported dev supports tc\n"); 3403f0f3253SYufeng Mo return; 3413f0f3253SYufeng Mo } 3423f0f3253SYufeng Mo 3432849d4e7Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_ETS_TC_WEIGHT, true); 3442849d4e7Sliuzhongzhu 3452849d4e7Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 3462849d4e7Sliuzhongzhu if (ret) { 347ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tc fail, ret = %d\n", ret); 3482849d4e7Sliuzhongzhu return; 3492849d4e7Sliuzhongzhu } 3502849d4e7Sliuzhongzhu 3512849d4e7Sliuzhongzhu ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data; 3522849d4e7Sliuzhongzhu 353a8adbb8aSYonglong Liu dev_info(&hdev->pdev->dev, "dump tc: %u tc enabled\n", 354a8adbb8aSYonglong Liu hdev->tm_info.num_tc); 3552849d4e7Sliuzhongzhu dev_info(&hdev->pdev->dev, "weight_offset: %u\n", 3562849d4e7Sliuzhongzhu ets_weight->weight_offset); 3572849d4e7Sliuzhongzhu 3582849d4e7Sliuzhongzhu for (i = 0; i < HNAE3_MAX_TC; i++) 3592849d4e7Sliuzhongzhu hclge_title_idx_print(hdev, ets_weight->tc_weight[i], i, 3602849d4e7Sliuzhongzhu "tc", "no sp mode", "sp mode"); 3612849d4e7Sliuzhongzhu } 3622849d4e7Sliuzhongzhu 36396227f4cSliuzhongzhu static void hclge_dbg_dump_tm_pg(struct hclge_dev *hdev) 36496227f4cSliuzhongzhu { 36596227f4cSliuzhongzhu struct hclge_port_shapping_cmd *port_shap_cfg_cmd; 36696227f4cSliuzhongzhu struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd; 36796227f4cSliuzhongzhu struct hclge_pg_shapping_cmd *pg_shap_cfg_cmd; 36896227f4cSliuzhongzhu enum hclge_opcode_type cmd; 36996227f4cSliuzhongzhu struct hclge_desc desc; 37096227f4cSliuzhongzhu int ret; 37196227f4cSliuzhongzhu 37296227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_C_SHAPPING; 37396227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 37496227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 37596227f4cSliuzhongzhu if (ret) 37696227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 37796227f4cSliuzhongzhu 37896227f4cSliuzhongzhu pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; 37996227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_C pg_id: %u\n", pg_shap_cfg_cmd->pg_id); 38096227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_C pg_shapping: 0x%x\n", 38139edaf24SGuojia Liao le32_to_cpu(pg_shap_cfg_cmd->pg_shapping_para)); 38296227f4cSliuzhongzhu 38396227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_P_SHAPPING; 38496227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 38596227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 38696227f4cSliuzhongzhu if (ret) 38796227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 38896227f4cSliuzhongzhu 38996227f4cSliuzhongzhu pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; 39096227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_P pg_id: %u\n", pg_shap_cfg_cmd->pg_id); 39196227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_P pg_shapping: 0x%x\n", 39239edaf24SGuojia Liao le32_to_cpu(pg_shap_cfg_cmd->pg_shapping_para)); 39396227f4cSliuzhongzhu 39496227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PORT_SHAPPING; 39596227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 39696227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 39796227f4cSliuzhongzhu if (ret) 39896227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 39996227f4cSliuzhongzhu 40096227f4cSliuzhongzhu port_shap_cfg_cmd = (struct hclge_port_shapping_cmd *)desc.data; 40196227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PORT port_shapping: 0x%x\n", 40239edaf24SGuojia Liao le32_to_cpu(port_shap_cfg_cmd->port_shapping_para)); 40396227f4cSliuzhongzhu 40496227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_SCH_MODE_CFG; 40596227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 40696227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 40796227f4cSliuzhongzhu if (ret) 40896227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 40996227f4cSliuzhongzhu 41039edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "PG_SCH pg_id: %u\n", 41139edaf24SGuojia Liao le32_to_cpu(desc.data[0])); 41296227f4cSliuzhongzhu 41396227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_SCH_MODE_CFG; 41496227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 41596227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 41696227f4cSliuzhongzhu if (ret) 41796227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 41896227f4cSliuzhongzhu 41939edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "PRI_SCH pri_id: %u\n", 42039edaf24SGuojia Liao le32_to_cpu(desc.data[0])); 42196227f4cSliuzhongzhu 42296227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_QS_SCH_MODE_CFG; 42396227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 42496227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 42596227f4cSliuzhongzhu if (ret) 42696227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 42796227f4cSliuzhongzhu 42839edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "QS_SCH qs_id: %u\n", 42939edaf24SGuojia Liao le32_to_cpu(desc.data[0])); 43096227f4cSliuzhongzhu 4313f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 4323f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 4333f0f3253SYufeng Mo "Only DCB-supported dev supports tm mapping\n"); 4343f0f3253SYufeng Mo return; 4353f0f3253SYufeng Mo } 4363f0f3253SYufeng Mo 43796227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING; 43896227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 43996227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 44096227f4cSliuzhongzhu if (ret) 44196227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 44296227f4cSliuzhongzhu 44396227f4cSliuzhongzhu bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data; 4449b2f3477SWeihang Li dev_info(&hdev->pdev->dev, "BP_TO_QSET tc_id: %u\n", 44596227f4cSliuzhongzhu bp_to_qs_map_cmd->tc_id); 4469b2f3477SWeihang Li dev_info(&hdev->pdev->dev, "BP_TO_QSET qs_group_id: 0x%x\n", 44796227f4cSliuzhongzhu bp_to_qs_map_cmd->qs_group_id); 44896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "BP_TO_QSET qs_bit_map: 0x%x\n", 44939edaf24SGuojia Liao le32_to_cpu(bp_to_qs_map_cmd->qs_bit_map)); 45096227f4cSliuzhongzhu return; 45196227f4cSliuzhongzhu 45296227f4cSliuzhongzhu err_tm_pg_cmd_send: 453ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tm_pg fail(0x%x), ret = %d\n", 45496227f4cSliuzhongzhu cmd, ret); 45596227f4cSliuzhongzhu } 45696227f4cSliuzhongzhu 45796227f4cSliuzhongzhu static void hclge_dbg_dump_tm(struct hclge_dev *hdev) 45896227f4cSliuzhongzhu { 45996227f4cSliuzhongzhu struct hclge_priority_weight_cmd *priority_weight; 46096227f4cSliuzhongzhu struct hclge_pg_to_pri_link_cmd *pg_to_pri_map; 46196227f4cSliuzhongzhu struct hclge_qs_to_pri_link_cmd *qs_to_pri_map; 46296227f4cSliuzhongzhu struct hclge_nq_to_qs_link_cmd *nq_to_qs_map; 46396227f4cSliuzhongzhu struct hclge_pri_shapping_cmd *shap_cfg_cmd; 46496227f4cSliuzhongzhu struct hclge_pg_weight_cmd *pg_weight; 46596227f4cSliuzhongzhu struct hclge_qs_weight_cmd *qs_weight; 46696227f4cSliuzhongzhu enum hclge_opcode_type cmd; 46796227f4cSliuzhongzhu struct hclge_desc desc; 46896227f4cSliuzhongzhu int ret; 46996227f4cSliuzhongzhu 47096227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_TO_PRI_LINK; 47196227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 47296227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 47396227f4cSliuzhongzhu if (ret) 47496227f4cSliuzhongzhu goto err_tm_cmd_send; 47596227f4cSliuzhongzhu 47696227f4cSliuzhongzhu pg_to_pri_map = (struct hclge_pg_to_pri_link_cmd *)desc.data; 47796227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "dump tm\n"); 47896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_TO_PRI gp_id: %u\n", 47996227f4cSliuzhongzhu pg_to_pri_map->pg_id); 48096227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_TO_PRI map: 0x%x\n", 48196227f4cSliuzhongzhu pg_to_pri_map->pri_bit_map); 48296227f4cSliuzhongzhu 48396227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK; 48496227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 48596227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 48696227f4cSliuzhongzhu if (ret) 48796227f4cSliuzhongzhu goto err_tm_cmd_send; 48896227f4cSliuzhongzhu 48996227f4cSliuzhongzhu qs_to_pri_map = (struct hclge_qs_to_pri_link_cmd *)desc.data; 49096227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS_TO_PRI qs_id: %u\n", 49139edaf24SGuojia Liao le16_to_cpu(qs_to_pri_map->qs_id)); 49296227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS_TO_PRI priority: %u\n", 49396227f4cSliuzhongzhu qs_to_pri_map->priority); 49496227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS_TO_PRI link_vld: %u\n", 49596227f4cSliuzhongzhu qs_to_pri_map->link_vld); 49696227f4cSliuzhongzhu 49796227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK; 49896227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 49996227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 50096227f4cSliuzhongzhu if (ret) 50196227f4cSliuzhongzhu goto err_tm_cmd_send; 50296227f4cSliuzhongzhu 50396227f4cSliuzhongzhu nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data; 50439edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "NQ_TO_QS nq_id: %u\n", 50539edaf24SGuojia Liao le16_to_cpu(nq_to_qs_map->nq_id)); 5069b2f3477SWeihang Li dev_info(&hdev->pdev->dev, "NQ_TO_QS qset_id: 0x%x\n", 50739edaf24SGuojia Liao le16_to_cpu(nq_to_qs_map->qset_id)); 50896227f4cSliuzhongzhu 50996227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_WEIGHT; 51096227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 51196227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 51296227f4cSliuzhongzhu if (ret) 51396227f4cSliuzhongzhu goto err_tm_cmd_send; 51496227f4cSliuzhongzhu 51596227f4cSliuzhongzhu pg_weight = (struct hclge_pg_weight_cmd *)desc.data; 51696227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG pg_id: %u\n", pg_weight->pg_id); 51796227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG dwrr: %u\n", pg_weight->dwrr); 51896227f4cSliuzhongzhu 51996227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_QS_WEIGHT; 52096227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 52196227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 52296227f4cSliuzhongzhu if (ret) 52396227f4cSliuzhongzhu goto err_tm_cmd_send; 52496227f4cSliuzhongzhu 52596227f4cSliuzhongzhu qs_weight = (struct hclge_qs_weight_cmd *)desc.data; 52639edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "QS qs_id: %u\n", 52739edaf24SGuojia Liao le16_to_cpu(qs_weight->qs_id)); 52896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS dwrr: %u\n", qs_weight->dwrr); 52996227f4cSliuzhongzhu 53096227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_WEIGHT; 53196227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 53296227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 53396227f4cSliuzhongzhu if (ret) 53496227f4cSliuzhongzhu goto err_tm_cmd_send; 53596227f4cSliuzhongzhu 53696227f4cSliuzhongzhu priority_weight = (struct hclge_priority_weight_cmd *)desc.data; 53796227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI pri_id: %u\n", priority_weight->pri_id); 53896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI dwrr: %u\n", priority_weight->dwrr); 53996227f4cSliuzhongzhu 54096227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_C_SHAPPING; 54196227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 54296227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 54396227f4cSliuzhongzhu if (ret) 54496227f4cSliuzhongzhu goto err_tm_cmd_send; 54596227f4cSliuzhongzhu 54696227f4cSliuzhongzhu shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; 54796227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_C pri_id: %u\n", shap_cfg_cmd->pri_id); 54896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_C pri_shapping: 0x%x\n", 54939edaf24SGuojia Liao le32_to_cpu(shap_cfg_cmd->pri_shapping_para)); 55096227f4cSliuzhongzhu 55196227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_P_SHAPPING; 55296227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 55396227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 55496227f4cSliuzhongzhu if (ret) 55596227f4cSliuzhongzhu goto err_tm_cmd_send; 55696227f4cSliuzhongzhu 55796227f4cSliuzhongzhu shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; 55896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_P pri_id: %u\n", shap_cfg_cmd->pri_id); 55996227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_P pri_shapping: 0x%x\n", 56039edaf24SGuojia Liao le32_to_cpu(shap_cfg_cmd->pri_shapping_para)); 56196227f4cSliuzhongzhu 56296227f4cSliuzhongzhu hclge_dbg_dump_tm_pg(hdev); 56396227f4cSliuzhongzhu 56496227f4cSliuzhongzhu return; 56596227f4cSliuzhongzhu 56696227f4cSliuzhongzhu err_tm_cmd_send: 567ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tm fail(0x%x), ret = %d\n", 56896227f4cSliuzhongzhu cmd, ret); 56996227f4cSliuzhongzhu } 57096227f4cSliuzhongzhu 571ebaf1908SWeihang Li static void hclge_dbg_dump_tm_map(struct hclge_dev *hdev, 572ebaf1908SWeihang Li const char *cmd_buf) 57382e00b86Sliuzhongzhu { 57482e00b86Sliuzhongzhu struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd; 57582e00b86Sliuzhongzhu struct hclge_nq_to_qs_link_cmd *nq_to_qs_map; 57682e00b86Sliuzhongzhu struct hclge_qs_to_pri_link_cmd *map; 57782e00b86Sliuzhongzhu struct hclge_tqp_tx_queue_tc_cmd *tc; 57882e00b86Sliuzhongzhu enum hclge_opcode_type cmd; 57982e00b86Sliuzhongzhu struct hclge_desc desc; 58082e00b86Sliuzhongzhu int queue_id, group_id; 58182e00b86Sliuzhongzhu u32 qset_maping[32]; 58282e00b86Sliuzhongzhu int tc_id, qset_id; 58382e00b86Sliuzhongzhu int pri_id, ret; 58482e00b86Sliuzhongzhu u32 i; 58582e00b86Sliuzhongzhu 5866125b52dSHuazhong Tan ret = kstrtouint(cmd_buf, 0, &queue_id); 58782e00b86Sliuzhongzhu queue_id = (ret != 0) ? 0 : queue_id; 58882e00b86Sliuzhongzhu 58982e00b86Sliuzhongzhu cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK; 59082e00b86Sliuzhongzhu nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data; 59182e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 59282e00b86Sliuzhongzhu nq_to_qs_map->nq_id = cpu_to_le16(queue_id); 59382e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 59482e00b86Sliuzhongzhu if (ret) 59582e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 59672fa4904SGuojia Liao qset_id = le16_to_cpu(nq_to_qs_map->qset_id) & 0x3FF; 59782e00b86Sliuzhongzhu 59882e00b86Sliuzhongzhu cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK; 59982e00b86Sliuzhongzhu map = (struct hclge_qs_to_pri_link_cmd *)desc.data; 60082e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 60182e00b86Sliuzhongzhu map->qs_id = cpu_to_le16(qset_id); 60282e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 60382e00b86Sliuzhongzhu if (ret) 60482e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 60582e00b86Sliuzhongzhu pri_id = map->priority; 60682e00b86Sliuzhongzhu 60782e00b86Sliuzhongzhu cmd = HCLGE_OPC_TQP_TX_QUEUE_TC; 60882e00b86Sliuzhongzhu tc = (struct hclge_tqp_tx_queue_tc_cmd *)desc.data; 60982e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 61082e00b86Sliuzhongzhu tc->queue_id = cpu_to_le16(queue_id); 61182e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 61282e00b86Sliuzhongzhu if (ret) 61382e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 61482e00b86Sliuzhongzhu tc_id = tc->tc_id & 0x7; 61582e00b86Sliuzhongzhu 61682e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, "queue_id | qset_id | pri_id | tc_id\n"); 61782e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, "%04d | %04d | %02d | %02d\n", 61882e00b86Sliuzhongzhu queue_id, qset_id, pri_id, tc_id); 61982e00b86Sliuzhongzhu 6203f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 6213f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 6223f0f3253SYufeng Mo "Only DCB-supported dev supports tm mapping\n"); 6233f0f3253SYufeng Mo return; 6243f0f3253SYufeng Mo } 6253f0f3253SYufeng Mo 62682e00b86Sliuzhongzhu cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING; 62782e00b86Sliuzhongzhu bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data; 62882e00b86Sliuzhongzhu for (group_id = 0; group_id < 32; group_id++) { 62982e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 63082e00b86Sliuzhongzhu bp_to_qs_map_cmd->tc_id = tc_id; 63182e00b86Sliuzhongzhu bp_to_qs_map_cmd->qs_group_id = group_id; 63282e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 63382e00b86Sliuzhongzhu if (ret) 63482e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 63582e00b86Sliuzhongzhu 63672fa4904SGuojia Liao qset_maping[group_id] = 63772fa4904SGuojia Liao le32_to_cpu(bp_to_qs_map_cmd->qs_bit_map); 63882e00b86Sliuzhongzhu } 63982e00b86Sliuzhongzhu 64082e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, "index | tm bp qset maping:\n"); 64182e00b86Sliuzhongzhu 64282e00b86Sliuzhongzhu i = 0; 64382e00b86Sliuzhongzhu for (group_id = 0; group_id < 4; group_id++) { 64482e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, 64582e00b86Sliuzhongzhu "%04d | %08x:%08x:%08x:%08x:%08x:%08x:%08x:%08x\n", 64682e00b86Sliuzhongzhu group_id * 256, qset_maping[(u32)(i + 7)], 64782e00b86Sliuzhongzhu qset_maping[(u32)(i + 6)], qset_maping[(u32)(i + 5)], 64882e00b86Sliuzhongzhu qset_maping[(u32)(i + 4)], qset_maping[(u32)(i + 3)], 64982e00b86Sliuzhongzhu qset_maping[(u32)(i + 2)], qset_maping[(u32)(i + 1)], 65082e00b86Sliuzhongzhu qset_maping[i]); 65182e00b86Sliuzhongzhu i += 8; 65282e00b86Sliuzhongzhu } 65382e00b86Sliuzhongzhu 65482e00b86Sliuzhongzhu return; 65582e00b86Sliuzhongzhu 65682e00b86Sliuzhongzhu err_tm_map_cmd_send: 657ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tqp map fail(0x%x), ret = %d\n", 65882e00b86Sliuzhongzhu cmd, ret); 65982e00b86Sliuzhongzhu } 66082e00b86Sliuzhongzhu 661d958919dSliuzhongzhu static void hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev) 662d958919dSliuzhongzhu { 663d958919dSliuzhongzhu struct hclge_cfg_pause_param_cmd *pause_param; 664d958919dSliuzhongzhu struct hclge_desc desc; 665d958919dSliuzhongzhu int ret; 666d958919dSliuzhongzhu 667d958919dSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_MAC_PARA, true); 668d958919dSliuzhongzhu 669d958919dSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 670d958919dSliuzhongzhu if (ret) { 671ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump checksum fail, ret = %d\n", 672d958919dSliuzhongzhu ret); 673d958919dSliuzhongzhu return; 674d958919dSliuzhongzhu } 675d958919dSliuzhongzhu 676d958919dSliuzhongzhu pause_param = (struct hclge_cfg_pause_param_cmd *)desc.data; 677d958919dSliuzhongzhu dev_info(&hdev->pdev->dev, "dump qos pause cfg\n"); 678d958919dSliuzhongzhu dev_info(&hdev->pdev->dev, "pause_trans_gap: 0x%x\n", 679d958919dSliuzhongzhu pause_param->pause_trans_gap); 680d958919dSliuzhongzhu dev_info(&hdev->pdev->dev, "pause_trans_time: 0x%x\n", 68139edaf24SGuojia Liao le16_to_cpu(pause_param->pause_trans_time)); 682d958919dSliuzhongzhu } 683d958919dSliuzhongzhu 6846fc22440Sliuzhongzhu static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev) 6856fc22440Sliuzhongzhu { 6866fc22440Sliuzhongzhu struct hclge_qos_pri_map_cmd *pri_map; 6876fc22440Sliuzhongzhu struct hclge_desc desc; 6886fc22440Sliuzhongzhu int ret; 6896fc22440Sliuzhongzhu 6906fc22440Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PRI_TO_TC_MAPPING, true); 6916fc22440Sliuzhongzhu 6926fc22440Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 6936fc22440Sliuzhongzhu if (ret) { 6946fc22440Sliuzhongzhu dev_err(&hdev->pdev->dev, 695ed5b255bSYufeng Mo "dump qos pri map fail, ret = %d\n", ret); 6966fc22440Sliuzhongzhu return; 6976fc22440Sliuzhongzhu } 6986fc22440Sliuzhongzhu 6996fc22440Sliuzhongzhu pri_map = (struct hclge_qos_pri_map_cmd *)desc.data; 7006fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "dump qos pri map\n"); 7016fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "vlan_to_pri: 0x%x\n", pri_map->vlan_pri); 7026fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_0_to_tc: 0x%x\n", pri_map->pri0_tc); 7036fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_1_to_tc: 0x%x\n", pri_map->pri1_tc); 7046fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_2_to_tc: 0x%x\n", pri_map->pri2_tc); 7056fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_3_to_tc: 0x%x\n", pri_map->pri3_tc); 7066fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_4_to_tc: 0x%x\n", pri_map->pri4_tc); 7076fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_5_to_tc: 0x%x\n", pri_map->pri5_tc); 7086fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_6_to_tc: 0x%x\n", pri_map->pri6_tc); 7096fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc); 7106fc22440Sliuzhongzhu } 7116fc22440Sliuzhongzhu 7127d9d7f88Sliuzhongzhu static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) 7137d9d7f88Sliuzhongzhu { 7147d9d7f88Sliuzhongzhu struct hclge_tx_buff_alloc_cmd *tx_buf_cmd; 7157d9d7f88Sliuzhongzhu struct hclge_rx_priv_buff_cmd *rx_buf_cmd; 7167d9d7f88Sliuzhongzhu struct hclge_rx_priv_wl_buf *rx_priv_wl; 7177d9d7f88Sliuzhongzhu struct hclge_rx_com_wl *rx_packet_cnt; 7187d9d7f88Sliuzhongzhu struct hclge_rx_com_thrd *rx_com_thrd; 7197d9d7f88Sliuzhongzhu struct hclge_rx_com_wl *rx_com_wl; 7207d9d7f88Sliuzhongzhu enum hclge_opcode_type cmd; 7217d9d7f88Sliuzhongzhu struct hclge_desc desc[2]; 7227d9d7f88Sliuzhongzhu int i, ret; 7237d9d7f88Sliuzhongzhu 7247d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_TX_BUFF_ALLOC; 7257d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 7267d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 1); 7277d9d7f88Sliuzhongzhu if (ret) 7287d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 7297d9d7f88Sliuzhongzhu 7307d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "dump qos buf cfg\n"); 7317d9d7f88Sliuzhongzhu 7327d9d7f88Sliuzhongzhu tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc[0].data; 733f9f07091Sliuzhongzhu for (i = 0; i < HCLGE_MAX_TC_NUM; i++) 7347d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "tx_packet_buf_tc_%d: 0x%x\n", i, 73539edaf24SGuojia Liao le16_to_cpu(tx_buf_cmd->tx_pkt_buff[i])); 7367d9d7f88Sliuzhongzhu 7377d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC; 7387d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 7397d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 1); 7407d9d7f88Sliuzhongzhu if (ret) 7417d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 7427d9d7f88Sliuzhongzhu 7437d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "\n"); 7447d9d7f88Sliuzhongzhu rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc[0].data; 745f9f07091Sliuzhongzhu for (i = 0; i < HCLGE_MAX_TC_NUM; i++) 7467d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "rx_packet_buf_tc_%d: 0x%x\n", i, 74739edaf24SGuojia Liao le16_to_cpu(rx_buf_cmd->buf_num[i])); 7487d9d7f88Sliuzhongzhu 7497d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "rx_share_buf: 0x%x\n", 75039edaf24SGuojia Liao le16_to_cpu(rx_buf_cmd->shared_buf)); 7517d9d7f88Sliuzhongzhu 7523f0f3253SYufeng Mo cmd = HCLGE_OPC_RX_COM_WL_ALLOC; 7533f0f3253SYufeng Mo hclge_cmd_setup_basic_desc(desc, cmd, true); 7543f0f3253SYufeng Mo ret = hclge_cmd_send(&hdev->hw, desc, 1); 7553f0f3253SYufeng Mo if (ret) 7563f0f3253SYufeng Mo goto err_qos_cmd_send; 7573f0f3253SYufeng Mo 7583f0f3253SYufeng Mo rx_com_wl = (struct hclge_rx_com_wl *)desc[0].data; 7593f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, "\n"); 7603f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, "rx_com_wl: high: 0x%x, low: 0x%x\n", 76139edaf24SGuojia Liao le16_to_cpu(rx_com_wl->com_wl.high), 76239edaf24SGuojia Liao le16_to_cpu(rx_com_wl->com_wl.low)); 7633f0f3253SYufeng Mo 7643f0f3253SYufeng Mo cmd = HCLGE_OPC_RX_GBL_PKT_CNT; 7653f0f3253SYufeng Mo hclge_cmd_setup_basic_desc(desc, cmd, true); 7663f0f3253SYufeng Mo ret = hclge_cmd_send(&hdev->hw, desc, 1); 7673f0f3253SYufeng Mo if (ret) 7683f0f3253SYufeng Mo goto err_qos_cmd_send; 7693f0f3253SYufeng Mo 7703f0f3253SYufeng Mo rx_packet_cnt = (struct hclge_rx_com_wl *)desc[0].data; 7713f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 7723f0f3253SYufeng Mo "rx_global_packet_cnt: high: 0x%x, low: 0x%x\n", 77339edaf24SGuojia Liao le16_to_cpu(rx_packet_cnt->com_wl.high), 77439edaf24SGuojia Liao le16_to_cpu(rx_packet_cnt->com_wl.low)); 7753f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, "\n"); 7763f0f3253SYufeng Mo 7773f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 7783f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 7793f0f3253SYufeng Mo "Only DCB-supported dev supports rx priv wl\n"); 7803f0f3253SYufeng Mo return; 7813f0f3253SYufeng Mo } 7827d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC; 7837d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[0], cmd, true); 7847d9d7f88Sliuzhongzhu desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 7857d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[1], cmd, true); 7867d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 2); 7877d9d7f88Sliuzhongzhu if (ret) 7887d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 7897d9d7f88Sliuzhongzhu 7907d9d7f88Sliuzhongzhu rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data; 7917d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 7927d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 7937d9d7f88Sliuzhongzhu "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i, 79439edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].high), 79539edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 7967d9d7f88Sliuzhongzhu 7977d9d7f88Sliuzhongzhu rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[1].data; 7987d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 7997d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 8006f92bfd7SHuazhong Tan "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", 8016f92bfd7SHuazhong Tan i + HCLGE_TC_NUM_ONE_DESC, 80239edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].high), 80339edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 8047d9d7f88Sliuzhongzhu 8057d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_RX_COM_THRD_ALLOC; 8067d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[0], cmd, true); 8077d9d7f88Sliuzhongzhu desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 8087d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[1], cmd, true); 8097d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 2); 8107d9d7f88Sliuzhongzhu if (ret) 8117d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 8127d9d7f88Sliuzhongzhu 8137d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "\n"); 8147d9d7f88Sliuzhongzhu rx_com_thrd = (struct hclge_rx_com_thrd *)desc[0].data; 8157d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 8167d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 8177d9d7f88Sliuzhongzhu "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", i, 81839edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].high), 81939edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 8207d9d7f88Sliuzhongzhu 8217d9d7f88Sliuzhongzhu rx_com_thrd = (struct hclge_rx_com_thrd *)desc[1].data; 8227d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 8237d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 8246f92bfd7SHuazhong Tan "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", 8256f92bfd7SHuazhong Tan i + HCLGE_TC_NUM_ONE_DESC, 82639edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].high), 82739edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 8287d9d7f88Sliuzhongzhu return; 8297d9d7f88Sliuzhongzhu 8307d9d7f88Sliuzhongzhu err_qos_cmd_send: 8317d9d7f88Sliuzhongzhu dev_err(&hdev->pdev->dev, 832ed5b255bSYufeng Mo "dump qos buf cfg fail(0x%x), ret = %d\n", cmd, ret); 8337d9d7f88Sliuzhongzhu } 8347d9d7f88Sliuzhongzhu 8357737f1fbSliuzhongzhu static void hclge_dbg_dump_mng_table(struct hclge_dev *hdev) 8367737f1fbSliuzhongzhu { 8377737f1fbSliuzhongzhu struct hclge_mac_ethertype_idx_rd_cmd *req0; 8387737f1fbSliuzhongzhu char printf_buf[HCLGE_DBG_BUF_LEN]; 8397737f1fbSliuzhongzhu struct hclge_desc desc; 84072fa4904SGuojia Liao u32 msg_egress_port; 8417737f1fbSliuzhongzhu int ret, i; 8427737f1fbSliuzhongzhu 8437737f1fbSliuzhongzhu dev_info(&hdev->pdev->dev, "mng tab:\n"); 8447737f1fbSliuzhongzhu memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); 8457737f1fbSliuzhongzhu strncat(printf_buf, 8467737f1fbSliuzhongzhu "entry|mac_addr |mask|ether|mask|vlan|mask", 8477737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - 1); 8487737f1fbSliuzhongzhu strncat(printf_buf + strlen(printf_buf), 8497737f1fbSliuzhongzhu "|i_map|i_dir|e_type|pf_id|vf_id|q_id|drop\n", 8507737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - strlen(printf_buf) - 1); 8517737f1fbSliuzhongzhu 8527737f1fbSliuzhongzhu dev_info(&hdev->pdev->dev, "%s", printf_buf); 8537737f1fbSliuzhongzhu 8547737f1fbSliuzhongzhu for (i = 0; i < HCLGE_DBG_MNG_TBL_MAX; i++) { 8557737f1fbSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_MAC_ETHERTYPE_IDX_RD, 8567737f1fbSliuzhongzhu true); 8577737f1fbSliuzhongzhu req0 = (struct hclge_mac_ethertype_idx_rd_cmd *)&desc.data; 8587737f1fbSliuzhongzhu req0->index = cpu_to_le16(i); 8597737f1fbSliuzhongzhu 8607737f1fbSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 8617737f1fbSliuzhongzhu if (ret) { 8627737f1fbSliuzhongzhu dev_err(&hdev->pdev->dev, 8637737f1fbSliuzhongzhu "call hclge_cmd_send fail, ret = %d\n", ret); 8647737f1fbSliuzhongzhu return; 8657737f1fbSliuzhongzhu } 8667737f1fbSliuzhongzhu 8677737f1fbSliuzhongzhu if (!req0->resp_code) 8687737f1fbSliuzhongzhu continue; 8697737f1fbSliuzhongzhu 8707737f1fbSliuzhongzhu memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); 8717737f1fbSliuzhongzhu snprintf(printf_buf, HCLGE_DBG_BUF_LEN, 8727737f1fbSliuzhongzhu "%02u |%02x:%02x:%02x:%02x:%02x:%02x|", 87339edaf24SGuojia Liao le16_to_cpu(req0->index), 87439edaf24SGuojia Liao req0->mac_addr[0], req0->mac_addr[1], 8756e6e7680SGuojia Liao req0->mac_addr[2], req0->mac_addr[3], 8766e6e7680SGuojia Liao req0->mac_addr[4], req0->mac_addr[5]); 8777737f1fbSliuzhongzhu 8787737f1fbSliuzhongzhu snprintf(printf_buf + strlen(printf_buf), 8797737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - strlen(printf_buf), 8807737f1fbSliuzhongzhu "%x |%04x |%x |%04x|%x |%02x |%02x |", 8817737f1fbSliuzhongzhu !!(req0->flags & HCLGE_DBG_MNG_MAC_MASK_B), 88272fa4904SGuojia Liao le16_to_cpu(req0->ethter_type), 8837737f1fbSliuzhongzhu !!(req0->flags & HCLGE_DBG_MNG_ETHER_MASK_B), 88472fa4904SGuojia Liao le16_to_cpu(req0->vlan_tag) & HCLGE_DBG_MNG_VLAN_TAG, 8857737f1fbSliuzhongzhu !!(req0->flags & HCLGE_DBG_MNG_VLAN_MASK_B), 8867737f1fbSliuzhongzhu req0->i_port_bitmap, req0->i_port_direction); 8877737f1fbSliuzhongzhu 88872fa4904SGuojia Liao msg_egress_port = le16_to_cpu(req0->egress_port); 8897737f1fbSliuzhongzhu snprintf(printf_buf + strlen(printf_buf), 8907737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - strlen(printf_buf), 89172fa4904SGuojia Liao "%x |%x |%02x |%04x|%x\n", 89272fa4904SGuojia Liao !!(msg_egress_port & HCLGE_DBG_MNG_E_TYPE_B), 89372fa4904SGuojia Liao msg_egress_port & HCLGE_DBG_MNG_PF_ID, 89472fa4904SGuojia Liao (msg_egress_port >> 3) & HCLGE_DBG_MNG_VF_ID, 89572fa4904SGuojia Liao le16_to_cpu(req0->egress_queue), 89672fa4904SGuojia Liao !!(msg_egress_port & HCLGE_DBG_MNG_DROP_B)); 8977737f1fbSliuzhongzhu 8987737f1fbSliuzhongzhu dev_info(&hdev->pdev->dev, "%s", printf_buf); 8997737f1fbSliuzhongzhu } 9007737f1fbSliuzhongzhu } 9017737f1fbSliuzhongzhu 90244b6b883SYufeng Mo static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage, 9033c666b58Sliuzhongzhu bool sel_x, u32 loc) 9043c666b58Sliuzhongzhu { 9053c666b58Sliuzhongzhu struct hclge_fd_tcam_config_1_cmd *req1; 9063c666b58Sliuzhongzhu struct hclge_fd_tcam_config_2_cmd *req2; 9073c666b58Sliuzhongzhu struct hclge_fd_tcam_config_3_cmd *req3; 9083c666b58Sliuzhongzhu struct hclge_desc desc[3]; 9093c666b58Sliuzhongzhu int ret, i; 9103c666b58Sliuzhongzhu u32 *req; 9113c666b58Sliuzhongzhu 9123c666b58Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_FD_TCAM_OP, true); 9133c666b58Sliuzhongzhu desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 9143c666b58Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_FD_TCAM_OP, true); 9153c666b58Sliuzhongzhu desc[1].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 9163c666b58Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[2], HCLGE_OPC_FD_TCAM_OP, true); 9173c666b58Sliuzhongzhu 9183c666b58Sliuzhongzhu req1 = (struct hclge_fd_tcam_config_1_cmd *)desc[0].data; 9193c666b58Sliuzhongzhu req2 = (struct hclge_fd_tcam_config_2_cmd *)desc[1].data; 9203c666b58Sliuzhongzhu req3 = (struct hclge_fd_tcam_config_3_cmd *)desc[2].data; 9213c666b58Sliuzhongzhu 9223c666b58Sliuzhongzhu req1->stage = stage; 9233c666b58Sliuzhongzhu req1->xy_sel = sel_x ? 1 : 0; 9243c666b58Sliuzhongzhu req1->index = cpu_to_le32(loc); 9253c666b58Sliuzhongzhu 9263c666b58Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 3); 9273c666b58Sliuzhongzhu if (ret) 92844b6b883SYufeng Mo return ret; 9293c666b58Sliuzhongzhu 9303c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, " read result tcam key %s(%u):\n", 9313c666b58Sliuzhongzhu sel_x ? "x" : "y", loc); 9323c666b58Sliuzhongzhu 93346ee7350SGuojia Liao /* tcam_data0 ~ tcam_data1 */ 9343c666b58Sliuzhongzhu req = (u32 *)req1->tcam_data; 9353c666b58Sliuzhongzhu for (i = 0; i < 2; i++) 9363c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "%08x\n", *req++); 9373c666b58Sliuzhongzhu 93846ee7350SGuojia Liao /* tcam_data2 ~ tcam_data7 */ 9393c666b58Sliuzhongzhu req = (u32 *)req2->tcam_data; 9403c666b58Sliuzhongzhu for (i = 0; i < 6; i++) 9413c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "%08x\n", *req++); 9423c666b58Sliuzhongzhu 94346ee7350SGuojia Liao /* tcam_data8 ~ tcam_data12 */ 9443c666b58Sliuzhongzhu req = (u32 *)req3->tcam_data; 9453c666b58Sliuzhongzhu for (i = 0; i < 5; i++) 9463c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "%08x\n", *req++); 94744b6b883SYufeng Mo 94844b6b883SYufeng Mo return ret; 94944b6b883SYufeng Mo } 95044b6b883SYufeng Mo 95144b6b883SYufeng Mo static int hclge_dbg_get_rules_location(struct hclge_dev *hdev, u16 *rule_locs) 95244b6b883SYufeng Mo { 95344b6b883SYufeng Mo struct hclge_fd_rule *rule; 95444b6b883SYufeng Mo struct hlist_node *node; 95544b6b883SYufeng Mo int cnt = 0; 95644b6b883SYufeng Mo 95744b6b883SYufeng Mo spin_lock_bh(&hdev->fd_rule_lock); 95844b6b883SYufeng Mo hlist_for_each_entry_safe(rule, node, &hdev->fd_rule_list, rule_node) { 95944b6b883SYufeng Mo rule_locs[cnt] = rule->location; 96044b6b883SYufeng Mo cnt++; 96144b6b883SYufeng Mo } 96244b6b883SYufeng Mo spin_unlock_bh(&hdev->fd_rule_lock); 96344b6b883SYufeng Mo 96444b6b883SYufeng Mo if (cnt != hdev->hclge_fd_rule_num) 96544b6b883SYufeng Mo return -EINVAL; 96644b6b883SYufeng Mo 96744b6b883SYufeng Mo return cnt; 9683c666b58Sliuzhongzhu } 9693c666b58Sliuzhongzhu 9703c666b58Sliuzhongzhu static void hclge_dbg_fd_tcam(struct hclge_dev *hdev) 9713c666b58Sliuzhongzhu { 97244b6b883SYufeng Mo int i, ret, rule_cnt; 97344b6b883SYufeng Mo u16 *rule_locs; 9743c666b58Sliuzhongzhu 97544b6b883SYufeng Mo if (!hnae3_dev_fd_supported(hdev)) { 97644b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 97744b6b883SYufeng Mo "Only FD-supported dev supports dump fd tcam\n"); 97844b6b883SYufeng Mo return; 9793c666b58Sliuzhongzhu } 98044b6b883SYufeng Mo 98144b6b883SYufeng Mo if (!hdev->hclge_fd_rule_num || 98244b6b883SYufeng Mo !hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]) 98344b6b883SYufeng Mo return; 98444b6b883SYufeng Mo 98544b6b883SYufeng Mo rule_locs = kcalloc(hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1], 98644b6b883SYufeng Mo sizeof(u16), GFP_KERNEL); 98744b6b883SYufeng Mo if (!rule_locs) 98844b6b883SYufeng Mo return; 98944b6b883SYufeng Mo 99044b6b883SYufeng Mo rule_cnt = hclge_dbg_get_rules_location(hdev, rule_locs); 99144b6b883SYufeng Mo if (rule_cnt <= 0) { 99244b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 99344b6b883SYufeng Mo "failed to get rule number, ret = %d\n", rule_cnt); 99444b6b883SYufeng Mo kfree(rule_locs); 99544b6b883SYufeng Mo return; 99644b6b883SYufeng Mo } 99744b6b883SYufeng Mo 99844b6b883SYufeng Mo for (i = 0; i < rule_cnt; i++) { 99944b6b883SYufeng Mo ret = hclge_dbg_fd_tcam_read(hdev, 0, true, rule_locs[i]); 100044b6b883SYufeng Mo if (ret) { 100144b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 100244b6b883SYufeng Mo "failed to get fd tcam key x, ret = %d\n", ret); 100344b6b883SYufeng Mo kfree(rule_locs); 100444b6b883SYufeng Mo return; 100544b6b883SYufeng Mo } 100644b6b883SYufeng Mo 100744b6b883SYufeng Mo ret = hclge_dbg_fd_tcam_read(hdev, 0, false, rule_locs[i]); 100844b6b883SYufeng Mo if (ret) { 100944b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 101044b6b883SYufeng Mo "failed to get fd tcam key y, ret = %d\n", ret); 101144b6b883SYufeng Mo kfree(rule_locs); 101244b6b883SYufeng Mo return; 101344b6b883SYufeng Mo } 101444b6b883SYufeng Mo } 101544b6b883SYufeng Mo 101644b6b883SYufeng Mo kfree(rule_locs); 10173c666b58Sliuzhongzhu } 10183c666b58Sliuzhongzhu 10193d77d0cbSHuazhong Tan void hclge_dbg_dump_rst_info(struct hclge_dev *hdev) 1020f02eb82dSHuazhong Tan { 10210ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "PF reset count: %u\n", 1022f02eb82dSHuazhong Tan hdev->rst_stats.pf_rst_cnt); 10230ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", 1024f02eb82dSHuazhong Tan hdev->rst_stats.flr_rst_cnt); 10250ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "GLOBAL reset count: %u\n", 1026f02eb82dSHuazhong Tan hdev->rst_stats.global_rst_cnt); 10270ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "IMP reset count: %u\n", 1028f02eb82dSHuazhong Tan hdev->rst_stats.imp_rst_cnt); 10290ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset done count: %u\n", 1030f02eb82dSHuazhong Tan hdev->rst_stats.reset_done_cnt); 10310ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", 1032f02eb82dSHuazhong Tan hdev->rst_stats.hw_reset_done_cnt); 10330ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset count: %u\n", 1034f02eb82dSHuazhong Tan hdev->rst_stats.reset_cnt); 10350ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset fail count: %u\n", 10360ecf1f7bSHuazhong Tan hdev->rst_stats.reset_fail_cnt); 10370ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", 10380ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE)); 10390ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset interrupt source: 0x%x\n", 10400ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG)); 10410ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset interrupt status: 0x%x\n", 10420ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS)); 10430ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "hardware reset status: 0x%x\n", 10440ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG)); 10450ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", 10460ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG)); 10470ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", 10480ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING)); 10493d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); 1050f02eb82dSHuazhong Tan } 1051f02eb82dSHuazhong Tan 10521c6dfe6fSYunsheng Lin static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev) 10531c6dfe6fSYunsheng Lin { 10541c6dfe6fSYunsheng Lin dev_info(&hdev->pdev->dev, "last_serv_processed: %lu\n", 10551c6dfe6fSYunsheng Lin hdev->last_serv_processed); 10561c6dfe6fSYunsheng Lin dev_info(&hdev->pdev->dev, "last_serv_cnt: %lu\n", 10571c6dfe6fSYunsheng Lin hdev->serv_processed_cnt); 10581c6dfe6fSYunsheng Lin } 10591c6dfe6fSYunsheng Lin 106091f8ff09SGuojia Liao static void hclge_dbg_get_m7_stats_info(struct hclge_dev *hdev) 106133a90e2fSZhongzhu Liu { 106233a90e2fSZhongzhu Liu struct hclge_desc *desc_src, *desc_tmp; 106333a90e2fSZhongzhu Liu struct hclge_get_m7_bd_cmd *req; 106433a90e2fSZhongzhu Liu struct hclge_desc desc; 106533a90e2fSZhongzhu Liu u32 bd_num, buf_len; 106633a90e2fSZhongzhu Liu int ret, i; 106733a90e2fSZhongzhu Liu 106833a90e2fSZhongzhu Liu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_M7_STATS_BD, true); 106933a90e2fSZhongzhu Liu 107033a90e2fSZhongzhu Liu req = (struct hclge_get_m7_bd_cmd *)desc.data; 107133a90e2fSZhongzhu Liu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 107233a90e2fSZhongzhu Liu if (ret) { 107333a90e2fSZhongzhu Liu dev_err(&hdev->pdev->dev, 107433a90e2fSZhongzhu Liu "get firmware statistics bd number failed, ret = %d\n", 107533a90e2fSZhongzhu Liu ret); 107633a90e2fSZhongzhu Liu return; 107733a90e2fSZhongzhu Liu } 107833a90e2fSZhongzhu Liu 107933a90e2fSZhongzhu Liu bd_num = le32_to_cpu(req->bd_num); 108033a90e2fSZhongzhu Liu 108133a90e2fSZhongzhu Liu buf_len = sizeof(struct hclge_desc) * bd_num; 108233a90e2fSZhongzhu Liu desc_src = kzalloc(buf_len, GFP_KERNEL); 1083fbdc4d79SYufeng Mo if (!desc_src) 108433a90e2fSZhongzhu Liu return; 108533a90e2fSZhongzhu Liu 108633a90e2fSZhongzhu Liu desc_tmp = desc_src; 108733a90e2fSZhongzhu Liu ret = hclge_dbg_cmd_send(hdev, desc_tmp, 0, bd_num, 108833a90e2fSZhongzhu Liu HCLGE_OPC_M7_STATS_INFO); 108933a90e2fSZhongzhu Liu if (ret) { 109033a90e2fSZhongzhu Liu kfree(desc_src); 109133a90e2fSZhongzhu Liu dev_err(&hdev->pdev->dev, 109233a90e2fSZhongzhu Liu "get firmware statistics failed, ret = %d\n", ret); 109333a90e2fSZhongzhu Liu return; 109433a90e2fSZhongzhu Liu } 109533a90e2fSZhongzhu Liu 109633a90e2fSZhongzhu Liu for (i = 0; i < bd_num; i++) { 109733a90e2fSZhongzhu Liu dev_info(&hdev->pdev->dev, "0x%08x 0x%08x 0x%08x\n", 109833a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[0]), 109933a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[1]), 110033a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[2])); 110133a90e2fSZhongzhu Liu dev_info(&hdev->pdev->dev, "0x%08x 0x%08x 0x%08x\n", 110233a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[3]), 110333a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[4]), 110433a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[5])); 110533a90e2fSZhongzhu Liu 110633a90e2fSZhongzhu Liu desc_tmp++; 110733a90e2fSZhongzhu Liu } 110833a90e2fSZhongzhu Liu 110933a90e2fSZhongzhu Liu kfree(desc_src); 111033a90e2fSZhongzhu Liu } 111133a90e2fSZhongzhu Liu 1112dec84660SYufeng Mo #define HCLGE_CMD_NCL_CONFIG_BD_NUM 5 1113dec84660SYufeng Mo 1114dec84660SYufeng Mo static void hclge_ncl_config_data_print(struct hclge_dev *hdev, 1115dec84660SYufeng Mo struct hclge_desc *desc, int *offset, 1116dec84660SYufeng Mo int *length) 1117dec84660SYufeng Mo { 1118dec84660SYufeng Mo #define HCLGE_CMD_DATA_NUM 6 1119dec84660SYufeng Mo 1120dec84660SYufeng Mo int i; 1121dec84660SYufeng Mo int j; 1122dec84660SYufeng Mo 1123dec84660SYufeng Mo for (i = 0; i < HCLGE_CMD_NCL_CONFIG_BD_NUM; i++) { 1124dec84660SYufeng Mo for (j = 0; j < HCLGE_CMD_DATA_NUM; j++) { 1125dec84660SYufeng Mo if (i == 0 && j == 0) 1126dec84660SYufeng Mo continue; 1127dec84660SYufeng Mo 1128dec84660SYufeng Mo dev_info(&hdev->pdev->dev, "0x%04x | 0x%08x\n", 1129dec84660SYufeng Mo *offset, 1130dec84660SYufeng Mo le32_to_cpu(desc[i].data[j])); 1131dec84660SYufeng Mo *offset += sizeof(u32); 1132dec84660SYufeng Mo *length -= sizeof(u32); 1133dec84660SYufeng Mo if (*length <= 0) 1134dec84660SYufeng Mo return; 1135dec84660SYufeng Mo } 1136dec84660SYufeng Mo } 1137dec84660SYufeng Mo } 1138dec84660SYufeng Mo 1139ffd140e2SWeihang Li /* hclge_dbg_dump_ncl_config: print specified range of NCL_CONFIG file 1140ffd140e2SWeihang Li * @hdev: pointer to struct hclge_dev 1141ffd140e2SWeihang Li * @cmd_buf: string that contains offset and length 1142ffd140e2SWeihang Li */ 1143ebaf1908SWeihang Li static void hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, 1144ebaf1908SWeihang Li const char *cmd_buf) 1145ffd140e2SWeihang Li { 1146ffd140e2SWeihang Li #define HCLGE_MAX_NCL_CONFIG_OFFSET 4096 11474960cabfSYufeng Mo #define HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD (20 + 24 * 4) 1148ffd140e2SWeihang Li 1149dec84660SYufeng Mo struct hclge_desc desc[HCLGE_CMD_NCL_CONFIG_BD_NUM]; 1150dec84660SYufeng Mo int bd_num = HCLGE_CMD_NCL_CONFIG_BD_NUM; 1151ffd140e2SWeihang Li int offset; 1152ffd140e2SWeihang Li int length; 1153ffd140e2SWeihang Li int data0; 1154ffd140e2SWeihang Li int ret; 1155ffd140e2SWeihang Li 1156ffd140e2SWeihang Li ret = sscanf(cmd_buf, "%x %x", &offset, &length); 1157ffd140e2SWeihang Li if (ret != 2 || offset >= HCLGE_MAX_NCL_CONFIG_OFFSET || 1158ffd140e2SWeihang Li length > HCLGE_MAX_NCL_CONFIG_OFFSET - offset) { 1159ffd140e2SWeihang Li dev_err(&hdev->pdev->dev, "Invalid offset or length.\n"); 1160ffd140e2SWeihang Li return; 1161ffd140e2SWeihang Li } 1162ffd140e2SWeihang Li if (offset < 0 || length <= 0) { 1163ffd140e2SWeihang Li dev_err(&hdev->pdev->dev, "Non-positive offset or length.\n"); 1164ffd140e2SWeihang Li return; 1165ffd140e2SWeihang Li } 1166ffd140e2SWeihang Li 1167ffd140e2SWeihang Li dev_info(&hdev->pdev->dev, "offset | data\n"); 1168ffd140e2SWeihang Li 1169ffd140e2SWeihang Li while (length > 0) { 1170ffd140e2SWeihang Li data0 = offset; 11714960cabfSYufeng Mo if (length >= HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD) 11724960cabfSYufeng Mo data0 |= HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD << 16; 1173ffd140e2SWeihang Li else 1174ffd140e2SWeihang Li data0 |= length << 16; 1175ffd140e2SWeihang Li ret = hclge_dbg_cmd_send(hdev, desc, data0, bd_num, 1176ffd140e2SWeihang Li HCLGE_OPC_QUERY_NCL_CONFIG); 1177ffd140e2SWeihang Li if (ret) 1178ffd140e2SWeihang Li return; 1179ffd140e2SWeihang Li 1180dec84660SYufeng Mo hclge_ncl_config_data_print(hdev, desc, &offset, &length); 1181ffd140e2SWeihang Li } 1182ffd140e2SWeihang Li } 1183ffd140e2SWeihang Li 1184ded45d40SYufeng Mo static void hclge_dbg_dump_loopback(struct hclge_dev *hdev, 1185ded45d40SYufeng Mo const char *cmd_buf) 1186ded45d40SYufeng Mo { 1187ded45d40SYufeng Mo struct phy_device *phydev = hdev->hw.mac.phydev; 1188ded45d40SYufeng Mo struct hclge_config_mac_mode_cmd *req_app; 1189ded45d40SYufeng Mo struct hclge_serdes_lb_cmd *req_serdes; 1190ded45d40SYufeng Mo struct hclge_desc desc; 1191ded45d40SYufeng Mo u8 loopback_en; 1192ded45d40SYufeng Mo int ret; 1193ded45d40SYufeng Mo 1194ded45d40SYufeng Mo req_app = (struct hclge_config_mac_mode_cmd *)desc.data; 1195ded45d40SYufeng Mo req_serdes = (struct hclge_serdes_lb_cmd *)desc.data; 1196ded45d40SYufeng Mo 1197ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "mac id: %u\n", hdev->hw.mac.mac_id); 1198ded45d40SYufeng Mo 1199ded45d40SYufeng Mo hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true); 1200ded45d40SYufeng Mo ret = hclge_cmd_send(&hdev->hw, &desc, 1); 1201ded45d40SYufeng Mo if (ret) { 1202ded45d40SYufeng Mo dev_err(&hdev->pdev->dev, 1203ded45d40SYufeng Mo "failed to dump app loopback status, ret = %d\n", ret); 1204ded45d40SYufeng Mo return; 1205ded45d40SYufeng Mo } 1206ded45d40SYufeng Mo 1207ded45d40SYufeng Mo loopback_en = hnae3_get_bit(le32_to_cpu(req_app->txrx_pad_fcs_loop_en), 1208ded45d40SYufeng Mo HCLGE_MAC_APP_LP_B); 1209ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "app loopback: %s\n", 1210ded45d40SYufeng Mo loopback_en ? "on" : "off"); 1211ded45d40SYufeng Mo 1212ded45d40SYufeng Mo hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_SERDES_LOOPBACK, true); 1213ded45d40SYufeng Mo ret = hclge_cmd_send(&hdev->hw, &desc, 1); 1214ded45d40SYufeng Mo if (ret) { 1215ded45d40SYufeng Mo dev_err(&hdev->pdev->dev, 1216ded45d40SYufeng Mo "failed to dump serdes loopback status, ret = %d\n", 1217ded45d40SYufeng Mo ret); 1218ded45d40SYufeng Mo return; 1219ded45d40SYufeng Mo } 1220ded45d40SYufeng Mo 1221ded45d40SYufeng Mo loopback_en = req_serdes->enable & HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B; 1222ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "serdes serial loopback: %s\n", 1223ded45d40SYufeng Mo loopback_en ? "on" : "off"); 1224ded45d40SYufeng Mo 1225ded45d40SYufeng Mo loopback_en = req_serdes->enable & 1226ded45d40SYufeng Mo HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B; 1227ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "serdes parallel loopback: %s\n", 1228ded45d40SYufeng Mo loopback_en ? "on" : "off"); 1229ded45d40SYufeng Mo 1230ded45d40SYufeng Mo if (phydev) 1231ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "phy loopback: %s\n", 1232ded45d40SYufeng Mo phydev->loopback_enabled ? "on" : "off"); 1233ded45d40SYufeng Mo } 1234ded45d40SYufeng Mo 1235a6345787SWeihang Li /* hclge_dbg_dump_mac_tnl_status: print message about mac tnl interrupt 1236a6345787SWeihang Li * @hdev: pointer to struct hclge_dev 1237a6345787SWeihang Li */ 1238a6345787SWeihang Li static void hclge_dbg_dump_mac_tnl_status(struct hclge_dev *hdev) 1239a6345787SWeihang Li { 1240a6345787SWeihang Li #define HCLGE_BILLION_NANO_SECONDS 1000000000 1241a6345787SWeihang Li 1242a6345787SWeihang Li struct hclge_mac_tnl_stats stats; 1243a6345787SWeihang Li unsigned long rem_nsec; 1244a6345787SWeihang Li 1245a6345787SWeihang Li dev_info(&hdev->pdev->dev, "Recently generated mac tnl interruption:\n"); 1246a6345787SWeihang Li 1247a6345787SWeihang Li while (kfifo_get(&hdev->mac_tnl_log, &stats)) { 1248a6345787SWeihang Li rem_nsec = do_div(stats.time, HCLGE_BILLION_NANO_SECONDS); 1249a6345787SWeihang Li dev_info(&hdev->pdev->dev, "[%07lu.%03lu] status = 0x%x\n", 1250a6345787SWeihang Li (unsigned long)stats.time, rem_nsec / 1000, 1251a6345787SWeihang Li stats.status); 1252a6345787SWeihang Li } 1253a6345787SWeihang Li } 1254a6345787SWeihang Li 1255ee9e4424SYonglong Liu static void hclge_dbg_dump_qs_shaper_single(struct hclge_dev *hdev, u16 qsid) 1256ee9e4424SYonglong Liu { 1257ee9e4424SYonglong Liu struct hclge_qs_shapping_cmd *shap_cfg_cmd; 1258ee9e4424SYonglong Liu u8 ir_u, ir_b, ir_s, bs_b, bs_s; 1259ee9e4424SYonglong Liu struct hclge_desc desc; 1260ee9e4424SYonglong Liu u32 shapping_para; 1261ee9e4424SYonglong Liu int ret; 1262ee9e4424SYonglong Liu 1263ee9e4424SYonglong Liu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QCN_SHAPPING_CFG, true); 1264ee9e4424SYonglong Liu 1265ee9e4424SYonglong Liu shap_cfg_cmd = (struct hclge_qs_shapping_cmd *)desc.data; 1266ee9e4424SYonglong Liu shap_cfg_cmd->qs_id = cpu_to_le16(qsid); 1267ee9e4424SYonglong Liu 1268ee9e4424SYonglong Liu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 1269ee9e4424SYonglong Liu if (ret) { 1270ee9e4424SYonglong Liu dev_err(&hdev->pdev->dev, 1271ee9e4424SYonglong Liu "qs%u failed to get tx_rate, ret=%d\n", 1272ee9e4424SYonglong Liu qsid, ret); 1273ee9e4424SYonglong Liu return; 1274ee9e4424SYonglong Liu } 1275ee9e4424SYonglong Liu 1276ee9e4424SYonglong Liu shapping_para = le32_to_cpu(shap_cfg_cmd->qs_shapping_para); 1277ee9e4424SYonglong Liu ir_b = hclge_tm_get_field(shapping_para, IR_B); 1278ee9e4424SYonglong Liu ir_u = hclge_tm_get_field(shapping_para, IR_U); 1279ee9e4424SYonglong Liu ir_s = hclge_tm_get_field(shapping_para, IR_S); 1280ee9e4424SYonglong Liu bs_b = hclge_tm_get_field(shapping_para, BS_B); 1281ee9e4424SYonglong Liu bs_s = hclge_tm_get_field(shapping_para, BS_S); 1282ee9e4424SYonglong Liu 1283ee9e4424SYonglong Liu dev_info(&hdev->pdev->dev, 1284ee9e4424SYonglong Liu "qs%u ir_b:%u, ir_u:%u, ir_s:%u, bs_b:%u, bs_s:%u\n", 1285ee9e4424SYonglong Liu qsid, ir_b, ir_u, ir_s, bs_b, bs_s); 1286ee9e4424SYonglong Liu } 1287ee9e4424SYonglong Liu 1288ee9e4424SYonglong Liu static void hclge_dbg_dump_qs_shaper_all(struct hclge_dev *hdev) 1289ee9e4424SYonglong Liu { 1290ee9e4424SYonglong Liu struct hnae3_knic_private_info *kinfo; 1291ee9e4424SYonglong Liu struct hclge_vport *vport; 1292ee9e4424SYonglong Liu int vport_id, i; 1293ee9e4424SYonglong Liu 1294ee9e4424SYonglong Liu for (vport_id = 0; vport_id <= pci_num_vf(hdev->pdev); vport_id++) { 1295ee9e4424SYonglong Liu vport = &hdev->vport[vport_id]; 1296ee9e4424SYonglong Liu kinfo = &vport->nic.kinfo; 1297ee9e4424SYonglong Liu 1298ee9e4424SYonglong Liu dev_info(&hdev->pdev->dev, "qs cfg of vport%d:\n", vport_id); 1299ee9e4424SYonglong Liu 1300ee9e4424SYonglong Liu for (i = 0; i < kinfo->num_tc; i++) { 1301ee9e4424SYonglong Liu u16 qsid = vport->qs_offset + i; 1302ee9e4424SYonglong Liu 1303ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper_single(hdev, qsid); 1304ee9e4424SYonglong Liu } 1305ee9e4424SYonglong Liu } 1306ee9e4424SYonglong Liu } 1307ee9e4424SYonglong Liu 1308ee9e4424SYonglong Liu static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev, 1309ee9e4424SYonglong Liu const char *cmd_buf) 1310ee9e4424SYonglong Liu { 1311ee9e4424SYonglong Liu #define HCLGE_MAX_QSET_NUM 1024 1312ee9e4424SYonglong Liu 1313ee9e4424SYonglong Liu u16 qsid; 1314ee9e4424SYonglong Liu int ret; 1315ee9e4424SYonglong Liu 1316ee9e4424SYonglong Liu ret = kstrtou16(cmd_buf, 0, &qsid); 1317ee9e4424SYonglong Liu if (ret) { 1318ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper_all(hdev); 1319ee9e4424SYonglong Liu return; 1320ee9e4424SYonglong Liu } 1321ee9e4424SYonglong Liu 1322ee9e4424SYonglong Liu if (qsid >= HCLGE_MAX_QSET_NUM) { 1323ee9e4424SYonglong Liu dev_err(&hdev->pdev->dev, "qsid(%u) out of range[0-1023]\n", 1324ee9e4424SYonglong Liu qsid); 1325ee9e4424SYonglong Liu return; 1326ee9e4424SYonglong Liu } 1327ee9e4424SYonglong Liu 1328ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper_single(hdev, qsid); 1329ee9e4424SYonglong Liu } 1330ee9e4424SYonglong Liu 1331ebaf1908SWeihang Li int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) 13323c666b58Sliuzhongzhu { 1333a582b78dSZhongzhu Liu #define DUMP_REG "dump reg" 13346125b52dSHuazhong Tan #define DUMP_TM_MAP "dump tm map" 1335ded45d40SYufeng Mo #define DUMP_LOOPBACK "dump loopback" 1336a582b78dSZhongzhu Liu 13373c666b58Sliuzhongzhu struct hclge_vport *vport = hclge_get_vport(handle); 13383c666b58Sliuzhongzhu struct hclge_dev *hdev = vport->back; 13393c666b58Sliuzhongzhu 13403c666b58Sliuzhongzhu if (strncmp(cmd_buf, "dump fd tcam", 12) == 0) { 13413c666b58Sliuzhongzhu hclge_dbg_fd_tcam(hdev); 13422849d4e7Sliuzhongzhu } else if (strncmp(cmd_buf, "dump tc", 7) == 0) { 13432849d4e7Sliuzhongzhu hclge_dbg_dump_tc(hdev); 13446125b52dSHuazhong Tan } else if (strncmp(cmd_buf, DUMP_TM_MAP, strlen(DUMP_TM_MAP)) == 0) { 13456125b52dSHuazhong Tan hclge_dbg_dump_tm_map(hdev, &cmd_buf[sizeof(DUMP_TM_MAP)]); 134696227f4cSliuzhongzhu } else if (strncmp(cmd_buf, "dump tm", 7) == 0) { 134796227f4cSliuzhongzhu hclge_dbg_dump_tm(hdev); 1348d958919dSliuzhongzhu } else if (strncmp(cmd_buf, "dump qos pause cfg", 18) == 0) { 1349d958919dSliuzhongzhu hclge_dbg_dump_qos_pause_cfg(hdev); 13506fc22440Sliuzhongzhu } else if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) { 13516fc22440Sliuzhongzhu hclge_dbg_dump_qos_pri_map(hdev); 13527d9d7f88Sliuzhongzhu } else if (strncmp(cmd_buf, "dump qos buf cfg", 16) == 0) { 13537d9d7f88Sliuzhongzhu hclge_dbg_dump_qos_buf_cfg(hdev); 13547737f1fbSliuzhongzhu } else if (strncmp(cmd_buf, "dump mng tbl", 12) == 0) { 13557737f1fbSliuzhongzhu hclge_dbg_dump_mng_table(hdev); 1356a582b78dSZhongzhu Liu } else if (strncmp(cmd_buf, DUMP_REG, strlen(DUMP_REG)) == 0) { 1357a582b78dSZhongzhu Liu hclge_dbg_dump_reg_cmd(hdev, &cmd_buf[sizeof(DUMP_REG)]); 1358f02eb82dSHuazhong Tan } else if (strncmp(cmd_buf, "dump reset info", 15) == 0) { 1359f02eb82dSHuazhong Tan hclge_dbg_dump_rst_info(hdev); 13601c6dfe6fSYunsheng Lin } else if (strncmp(cmd_buf, "dump serv info", 14) == 0) { 13611c6dfe6fSYunsheng Lin hclge_dbg_dump_serv_info(hdev); 136233a90e2fSZhongzhu Liu } else if (strncmp(cmd_buf, "dump m7 info", 12) == 0) { 136333a90e2fSZhongzhu Liu hclge_dbg_get_m7_stats_info(hdev); 1364ffd140e2SWeihang Li } else if (strncmp(cmd_buf, "dump ncl_config", 15) == 0) { 1365ffd140e2SWeihang Li hclge_dbg_dump_ncl_config(hdev, 1366ffd140e2SWeihang Li &cmd_buf[sizeof("dump ncl_config")]); 1367a6345787SWeihang Li } else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) { 1368a6345787SWeihang Li hclge_dbg_dump_mac_tnl_status(hdev); 1369ded45d40SYufeng Mo } else if (strncmp(cmd_buf, DUMP_LOOPBACK, 1370ded45d40SYufeng Mo strlen(DUMP_LOOPBACK)) == 0) { 1371ded45d40SYufeng Mo hclge_dbg_dump_loopback(hdev, &cmd_buf[sizeof(DUMP_LOOPBACK)]); 1372ee9e4424SYonglong Liu } else if (strncmp(cmd_buf, "dump qs shaper", 14) == 0) { 1373ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper(hdev, 1374ee9e4424SYonglong Liu &cmd_buf[sizeof("dump qs shaper")]); 13753c666b58Sliuzhongzhu } else { 13763c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "unknown command\n"); 13773c666b58Sliuzhongzhu return -EINVAL; 13783c666b58Sliuzhongzhu } 13793c666b58Sliuzhongzhu 13803c666b58Sliuzhongzhu return 0; 13813c666b58Sliuzhongzhu } 1382