13c666b58Sliuzhongzhu // SPDX-License-Identifier: GPL-2.0+ 23c666b58Sliuzhongzhu /* Copyright (c) 2018-2019 Hisilicon Limited. */ 33c666b58Sliuzhongzhu 43c666b58Sliuzhongzhu #include <linux/device.h> 53c666b58Sliuzhongzhu 66fc22440Sliuzhongzhu #include "hclge_debugfs.h" 73c666b58Sliuzhongzhu #include "hclge_main.h" 82849d4e7Sliuzhongzhu #include "hclge_tm.h" 93c666b58Sliuzhongzhu #include "hnae3.h" 103c666b58Sliuzhongzhu 11e4b91468SRikard Falkeborn static const struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = { 12a582b78dSZhongzhu Liu { .reg_type = "bios common", 13a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_bios_common_reg[0], 14a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_bios_common_reg), 15a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_BIOS_OFFSET, 16a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_BIOS_COMMON_REG } }, 17a582b78dSZhongzhu Liu { .reg_type = "ssu", 18a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ssu_reg_0[0], 19a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_0), 20a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_SSU_0_OFFSET, 21a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_SSU_REG_0 } }, 22a582b78dSZhongzhu Liu { .reg_type = "ssu", 23a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ssu_reg_1[0], 24a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_1), 25a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_SSU_1_OFFSET, 26a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_SSU_REG_1 } }, 27a582b78dSZhongzhu Liu { .reg_type = "ssu", 28a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ssu_reg_2[0], 29a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_2), 30a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_SSU_2_OFFSET, 31a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_SSU_REG_2 } }, 32a582b78dSZhongzhu Liu { .reg_type = "igu egu", 33a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_igu_egu_reg[0], 34a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_igu_egu_reg), 35a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_IGU_OFFSET, 36a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_IGU_EGU_REG } }, 37a582b78dSZhongzhu Liu { .reg_type = "rpu", 38a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rpu_reg_0[0], 39a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rpu_reg_0), 40a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RPU_0_OFFSET, 41a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RPU_REG_0 } }, 42a582b78dSZhongzhu Liu { .reg_type = "rpu", 43a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rpu_reg_1[0], 44a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rpu_reg_1), 45a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RPU_1_OFFSET, 46a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RPU_REG_1 } }, 47a582b78dSZhongzhu Liu { .reg_type = "ncsi", 48a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ncsi_reg[0], 49a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ncsi_reg), 50a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_NCSI_OFFSET, 51a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_NCSI_REG } }, 52a582b78dSZhongzhu Liu { .reg_type = "rtc", 53a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rtc_reg[0], 54a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rtc_reg), 55a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RTC_OFFSET, 56a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RTC_REG } }, 57a582b78dSZhongzhu Liu { .reg_type = "ppp", 58a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_ppp_reg[0], 59a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ppp_reg), 60a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_PPP_OFFSET, 61a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_PPP_REG } }, 62a582b78dSZhongzhu Liu { .reg_type = "rcb", 63a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_rcb_reg[0], 64a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rcb_reg), 65a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_RCB_OFFSET, 66a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_RCB_REG } }, 67a582b78dSZhongzhu Liu { .reg_type = "tqp", 68a582b78dSZhongzhu Liu .dfx_msg = &hclge_dbg_tqp_reg[0], 69a582b78dSZhongzhu Liu .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_tqp_reg), 70a582b78dSZhongzhu Liu .offset = HCLGE_DBG_DFX_TQP_OFFSET, 71a582b78dSZhongzhu Liu .cmd = HCLGE_OPC_DFX_TQP_REG } }, 72a582b78dSZhongzhu Liu }; 73a582b78dSZhongzhu Liu 7427cf979aSliuzhongzhu static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset) 7527cf979aSliuzhongzhu { 76a582b78dSZhongzhu Liu struct hclge_desc desc[HCLGE_GET_DFX_REG_TYPE_CNT]; 77a582b78dSZhongzhu Liu int entries_per_desc; 78a582b78dSZhongzhu Liu int index; 7927cf979aSliuzhongzhu int ret; 8027cf979aSliuzhongzhu 81ddb54554SGuangbin Huang ret = hclge_query_bd_num_cmd_send(hdev, desc); 82ddb54554SGuangbin Huang if (ret) { 8327cf979aSliuzhongzhu dev_err(&hdev->pdev->dev, 84ed5b255bSYufeng Mo "get dfx bdnum fail, ret = %d\n", ret); 8527cf979aSliuzhongzhu return ret; 8627cf979aSliuzhongzhu } 8727cf979aSliuzhongzhu 88a582b78dSZhongzhu Liu entries_per_desc = ARRAY_SIZE(desc[0].data); 89a582b78dSZhongzhu Liu index = offset % entries_per_desc; 9072fa4904SGuojia Liao return le32_to_cpu(desc[offset / entries_per_desc].data[index]); 9127cf979aSliuzhongzhu } 9227cf979aSliuzhongzhu 9327cf979aSliuzhongzhu static int hclge_dbg_cmd_send(struct hclge_dev *hdev, 9427cf979aSliuzhongzhu struct hclge_desc *desc_src, 9527cf979aSliuzhongzhu int index, int bd_num, 9627cf979aSliuzhongzhu enum hclge_opcode_type cmd) 9727cf979aSliuzhongzhu { 9827cf979aSliuzhongzhu struct hclge_desc *desc = desc_src; 9927cf979aSliuzhongzhu int ret, i; 10027cf979aSliuzhongzhu 10127cf979aSliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 10227cf979aSliuzhongzhu desc->data[0] = cpu_to_le32(index); 10327cf979aSliuzhongzhu 10427cf979aSliuzhongzhu for (i = 1; i < bd_num; i++) { 10527cf979aSliuzhongzhu desc->flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 10627cf979aSliuzhongzhu desc++; 10727cf979aSliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 10827cf979aSliuzhongzhu } 10927cf979aSliuzhongzhu 11027cf979aSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc_src, bd_num); 111ed5b255bSYufeng Mo if (ret) 11227cf979aSliuzhongzhu dev_err(&hdev->pdev->dev, 113ed5b255bSYufeng Mo "cmd(0x%x) send fail, ret = %d\n", cmd, ret); 11427cf979aSliuzhongzhu return ret; 11527cf979aSliuzhongzhu } 11627cf979aSliuzhongzhu 11727cf979aSliuzhongzhu static void hclge_dbg_dump_reg_common(struct hclge_dev *hdev, 118e4b91468SRikard Falkeborn const struct hclge_dbg_reg_type_info *reg_info, 119a582b78dSZhongzhu Liu const char *cmd_buf) 12027cf979aSliuzhongzhu { 121a582b78dSZhongzhu Liu #define IDX_OFFSET 1 122b37ce587SYufeng Mo 123a582b78dSZhongzhu Liu const char *s = &cmd_buf[strlen(reg_info->reg_type) + IDX_OFFSET]; 124e4b91468SRikard Falkeborn const struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg; 125e4b91468SRikard Falkeborn const struct hclge_dbg_reg_common_msg *reg_msg = ®_info->reg_msg; 12627cf979aSliuzhongzhu struct hclge_desc *desc_src; 12727cf979aSliuzhongzhu struct hclge_desc *desc; 128a582b78dSZhongzhu Liu int entries_per_desc; 12927cf979aSliuzhongzhu int bd_num, buf_len; 130a582b78dSZhongzhu Liu int index = 0; 131a582b78dSZhongzhu Liu int min_num; 13227cf979aSliuzhongzhu int ret, i; 13327cf979aSliuzhongzhu 134a582b78dSZhongzhu Liu if (*s) { 135a582b78dSZhongzhu Liu ret = kstrtouint(s, 0, &index); 13627cf979aSliuzhongzhu index = (ret != 0) ? 0 : index; 137a582b78dSZhongzhu Liu } 13827cf979aSliuzhongzhu 139a582b78dSZhongzhu Liu bd_num = hclge_dbg_get_dfx_bd_num(hdev, reg_msg->offset); 140ed5b255bSYufeng Mo if (bd_num <= 0) { 141ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "get cmd(%d) bd num(%d) failed\n", 142ed5b255bSYufeng Mo reg_msg->offset, bd_num); 14327cf979aSliuzhongzhu return; 144ed5b255bSYufeng Mo } 14527cf979aSliuzhongzhu 14627cf979aSliuzhongzhu buf_len = sizeof(struct hclge_desc) * bd_num; 14727cf979aSliuzhongzhu desc_src = kzalloc(buf_len, GFP_KERNEL); 148fbdc4d79SYufeng Mo if (!desc_src) 14927cf979aSliuzhongzhu return; 15027cf979aSliuzhongzhu 15127cf979aSliuzhongzhu desc = desc_src; 152a582b78dSZhongzhu Liu ret = hclge_dbg_cmd_send(hdev, desc, index, bd_num, reg_msg->cmd); 153a582b78dSZhongzhu Liu if (ret) { 15427cf979aSliuzhongzhu kfree(desc_src); 15527cf979aSliuzhongzhu return; 15627cf979aSliuzhongzhu } 15727cf979aSliuzhongzhu 158a582b78dSZhongzhu Liu entries_per_desc = ARRAY_SIZE(desc->data); 159a582b78dSZhongzhu Liu min_num = min_t(int, bd_num * entries_per_desc, reg_msg->msg_num); 16027cf979aSliuzhongzhu 16127cf979aSliuzhongzhu desc = desc_src; 162a582b78dSZhongzhu Liu for (i = 0; i < min_num; i++) { 163a582b78dSZhongzhu Liu if (i > 0 && (i % entries_per_desc) == 0) 164a582b78dSZhongzhu Liu desc++; 16527cf979aSliuzhongzhu if (dfx_message->flag) 16627cf979aSliuzhongzhu dev_info(&hdev->pdev->dev, "%s: 0x%x\n", 167b37ce587SYufeng Mo dfx_message->message, 16839edaf24SGuojia Liao le32_to_cpu(desc->data[i % entries_per_desc])); 16927cf979aSliuzhongzhu 17027cf979aSliuzhongzhu dfx_message++; 17127cf979aSliuzhongzhu } 17227cf979aSliuzhongzhu 17327cf979aSliuzhongzhu kfree(desc_src); 17427cf979aSliuzhongzhu } 17527cf979aSliuzhongzhu 1765cb51cfeSYufeng Mo static void hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev) 1775cb51cfeSYufeng Mo { 1785cb51cfeSYufeng Mo struct hclge_config_mac_mode_cmd *req; 1795cb51cfeSYufeng Mo struct hclge_desc desc; 1805cb51cfeSYufeng Mo u32 loop_en; 1815cb51cfeSYufeng Mo int ret; 1825cb51cfeSYufeng Mo 1835cb51cfeSYufeng Mo hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true); 1845cb51cfeSYufeng Mo 1855cb51cfeSYufeng Mo ret = hclge_cmd_send(&hdev->hw, &desc, 1); 1865cb51cfeSYufeng Mo if (ret) { 1875cb51cfeSYufeng Mo dev_err(&hdev->pdev->dev, 1885cb51cfeSYufeng Mo "failed to dump mac enable status, ret = %d\n", ret); 1895cb51cfeSYufeng Mo return; 1905cb51cfeSYufeng Mo } 1915cb51cfeSYufeng Mo 1925cb51cfeSYufeng Mo req = (struct hclge_config_mac_mode_cmd *)desc.data; 1935cb51cfeSYufeng Mo loop_en = le32_to_cpu(req->txrx_pad_fcs_loop_en); 1945cb51cfeSYufeng Mo 1955cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_trans_en: %#x\n", 1965cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_TX_EN_B)); 1975cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_rcv_en: %#x\n", 1985cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_RX_EN_B)); 1995cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_pad_trans_en: %#x\n", 2005cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_PAD_TX_B)); 2015cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_pad_rcv_en: %#x\n", 2025cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_PAD_RX_B)); 2035cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_1588_trans_en: %#x\n", 2045cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_1588_TX_B)); 2055cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_1588_rcv_en: %#x\n", 2065cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_1588_RX_B)); 2075cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_app_loop_en: %#x\n", 2085cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_APP_LP_B)); 2095cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_line_loop_en: %#x\n", 2105cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_LINE_LP_B)); 2115cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_fcs_tx_en: %#x\n", 2125cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_FCS_TX_B)); 2135cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_rx_oversize_truncate_en: %#x\n", 2145cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_RX_OVERSIZE_TRUNCATE_B)); 2155cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_rx_fcs_strip_en: %#x\n", 2165cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_RX_FCS_STRIP_B)); 2175cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_rx_fcs_en: %#x\n", 2185cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_RX_FCS_B)); 2195cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_tx_under_min_err_en: %#x\n", 2205cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_TX_UNDER_MIN_ERR_B)); 2215cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "config_mac_tx_oversize_truncate_en: %#x\n", 2225cb51cfeSYufeng Mo hnae3_get_bit(loop_en, HCLGE_MAC_TX_OVERSIZE_TRUNCATE_B)); 2235cb51cfeSYufeng Mo } 2245cb51cfeSYufeng Mo 2255cb51cfeSYufeng Mo static void hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev) 2265cb51cfeSYufeng Mo { 2275cb51cfeSYufeng Mo struct hclge_config_max_frm_size_cmd *req; 2285cb51cfeSYufeng Mo struct hclge_desc desc; 2295cb51cfeSYufeng Mo int ret; 2305cb51cfeSYufeng Mo 2315cb51cfeSYufeng Mo hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAX_FRM_SIZE, true); 2325cb51cfeSYufeng Mo 2335cb51cfeSYufeng Mo ret = hclge_cmd_send(&hdev->hw, &desc, 1); 2345cb51cfeSYufeng Mo if (ret) { 2355cb51cfeSYufeng Mo dev_err(&hdev->pdev->dev, 2365cb51cfeSYufeng Mo "failed to dump mac frame size, ret = %d\n", ret); 2375cb51cfeSYufeng Mo return; 2385cb51cfeSYufeng Mo } 2395cb51cfeSYufeng Mo 2405cb51cfeSYufeng Mo req = (struct hclge_config_max_frm_size_cmd *)desc.data; 2415cb51cfeSYufeng Mo 2425cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "max_frame_size: %u\n", 2435cb51cfeSYufeng Mo le16_to_cpu(req->max_frm_size)); 2445cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "min_frame_size: %u\n", req->min_frm_size); 2455cb51cfeSYufeng Mo } 2465cb51cfeSYufeng Mo 2475cb51cfeSYufeng Mo static void hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev) 2485cb51cfeSYufeng Mo { 2495cb51cfeSYufeng Mo #define HCLGE_MAC_SPEED_SHIFT 0 2505cb51cfeSYufeng Mo #define HCLGE_MAC_SPEED_MASK GENMASK(5, 0) 2515cb51cfeSYufeng Mo #define HCLGE_MAC_DUPLEX_SHIFT 7 2525cb51cfeSYufeng Mo 2535cb51cfeSYufeng Mo struct hclge_config_mac_speed_dup_cmd *req; 2545cb51cfeSYufeng Mo struct hclge_desc desc; 2555cb51cfeSYufeng Mo int ret; 2565cb51cfeSYufeng Mo 2575cb51cfeSYufeng Mo hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_SPEED_DUP, true); 2585cb51cfeSYufeng Mo 2595cb51cfeSYufeng Mo ret = hclge_cmd_send(&hdev->hw, &desc, 1); 2605cb51cfeSYufeng Mo if (ret) { 2615cb51cfeSYufeng Mo dev_err(&hdev->pdev->dev, 2625cb51cfeSYufeng Mo "failed to dump mac speed duplex, ret = %d\n", ret); 2635cb51cfeSYufeng Mo return; 2645cb51cfeSYufeng Mo } 2655cb51cfeSYufeng Mo 2665cb51cfeSYufeng Mo req = (struct hclge_config_mac_speed_dup_cmd *)desc.data; 2675cb51cfeSYufeng Mo 2685cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "speed: %#lx\n", 2695cb51cfeSYufeng Mo hnae3_get_field(req->speed_dup, HCLGE_MAC_SPEED_MASK, 2705cb51cfeSYufeng Mo HCLGE_MAC_SPEED_SHIFT)); 2715cb51cfeSYufeng Mo dev_info(&hdev->pdev->dev, "duplex: %#x\n", 2725cb51cfeSYufeng Mo hnae3_get_bit(req->speed_dup, HCLGE_MAC_DUPLEX_SHIFT)); 2735cb51cfeSYufeng Mo } 2745cb51cfeSYufeng Mo 2755cb51cfeSYufeng Mo static void hclge_dbg_dump_mac(struct hclge_dev *hdev) 2765cb51cfeSYufeng Mo { 2775cb51cfeSYufeng Mo hclge_dbg_dump_mac_enable_status(hdev); 2785cb51cfeSYufeng Mo 2795cb51cfeSYufeng Mo hclge_dbg_dump_mac_frame_size(hdev); 2805cb51cfeSYufeng Mo 2815cb51cfeSYufeng Mo hclge_dbg_dump_mac_speed_duplex(hdev); 2825cb51cfeSYufeng Mo } 2835cb51cfeSYufeng Mo 284ebaf1908SWeihang Li static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, const char *cmd_buf) 285c0ebebb9Sliuzhongzhu { 286c0ebebb9Sliuzhongzhu struct device *dev = &hdev->pdev->dev; 287c0ebebb9Sliuzhongzhu struct hclge_dbg_bitmap_cmd *bitmap; 28877ba415dSYufeng Mo enum hclge_opcode_type cmd; 289c0ebebb9Sliuzhongzhu int rq_id, pri_id, qset_id; 290c0ebebb9Sliuzhongzhu int port_id, nq_id, pg_id; 291c0ebebb9Sliuzhongzhu struct hclge_desc desc[2]; 292c0ebebb9Sliuzhongzhu 293c0ebebb9Sliuzhongzhu int cnt, ret; 294c0ebebb9Sliuzhongzhu 295c0ebebb9Sliuzhongzhu cnt = sscanf(cmd_buf, "%i %i %i %i %i %i", 296c0ebebb9Sliuzhongzhu &port_id, &pri_id, &pg_id, &rq_id, &nq_id, &qset_id); 297c0ebebb9Sliuzhongzhu if (cnt != 6) { 298c0ebebb9Sliuzhongzhu dev_err(&hdev->pdev->dev, 299c0ebebb9Sliuzhongzhu "dump dcb: bad command parameter, cnt=%d\n", cnt); 300c0ebebb9Sliuzhongzhu return; 301c0ebebb9Sliuzhongzhu } 302c0ebebb9Sliuzhongzhu 30377ba415dSYufeng Mo cmd = HCLGE_OPC_QSET_DFX_STS; 30477ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, qset_id, 1, cmd); 305c0ebebb9Sliuzhongzhu if (ret) 30677ba415dSYufeng Mo goto err_dcb_cmd_send; 307c0ebebb9Sliuzhongzhu 308c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 309c0ebebb9Sliuzhongzhu dev_info(dev, "roce_qset_mask: 0x%x\n", bitmap->bit0); 310c0ebebb9Sliuzhongzhu dev_info(dev, "nic_qs_mask: 0x%x\n", bitmap->bit1); 311c0ebebb9Sliuzhongzhu dev_info(dev, "qs_shaping_pass: 0x%x\n", bitmap->bit2); 312c0ebebb9Sliuzhongzhu dev_info(dev, "qs_bp_sts: 0x%x\n", bitmap->bit3); 313c0ebebb9Sliuzhongzhu 31477ba415dSYufeng Mo cmd = HCLGE_OPC_PRI_DFX_STS; 31577ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, pri_id, 1, cmd); 316c0ebebb9Sliuzhongzhu if (ret) 31777ba415dSYufeng Mo goto err_dcb_cmd_send; 318c0ebebb9Sliuzhongzhu 319c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 320c0ebebb9Sliuzhongzhu dev_info(dev, "pri_mask: 0x%x\n", bitmap->bit0); 321c0ebebb9Sliuzhongzhu dev_info(dev, "pri_cshaping_pass: 0x%x\n", bitmap->bit1); 322c0ebebb9Sliuzhongzhu dev_info(dev, "pri_pshaping_pass: 0x%x\n", bitmap->bit2); 323c0ebebb9Sliuzhongzhu 32477ba415dSYufeng Mo cmd = HCLGE_OPC_PG_DFX_STS; 32577ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, pg_id, 1, cmd); 326c0ebebb9Sliuzhongzhu if (ret) 32777ba415dSYufeng Mo goto err_dcb_cmd_send; 328c0ebebb9Sliuzhongzhu 329c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 330c0ebebb9Sliuzhongzhu dev_info(dev, "pg_mask: 0x%x\n", bitmap->bit0); 331c0ebebb9Sliuzhongzhu dev_info(dev, "pg_cshaping_pass: 0x%x\n", bitmap->bit1); 332c0ebebb9Sliuzhongzhu dev_info(dev, "pg_pshaping_pass: 0x%x\n", bitmap->bit2); 333c0ebebb9Sliuzhongzhu 33477ba415dSYufeng Mo cmd = HCLGE_OPC_PORT_DFX_STS; 33577ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd); 336c0ebebb9Sliuzhongzhu if (ret) 33777ba415dSYufeng Mo goto err_dcb_cmd_send; 338c0ebebb9Sliuzhongzhu 339c0ebebb9Sliuzhongzhu bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; 340c0ebebb9Sliuzhongzhu dev_info(dev, "port_mask: 0x%x\n", bitmap->bit0); 341c0ebebb9Sliuzhongzhu dev_info(dev, "port_shaping_pass: 0x%x\n", bitmap->bit1); 342c0ebebb9Sliuzhongzhu 34377ba415dSYufeng Mo cmd = HCLGE_OPC_SCH_NQ_CNT; 34477ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, nq_id, 1, cmd); 345c0ebebb9Sliuzhongzhu if (ret) 34677ba415dSYufeng Mo goto err_dcb_cmd_send; 347c0ebebb9Sliuzhongzhu 34839edaf24SGuojia Liao dev_info(dev, "sch_nq_cnt: 0x%x\n", le32_to_cpu(desc[0].data[1])); 349c0ebebb9Sliuzhongzhu 35077ba415dSYufeng Mo cmd = HCLGE_OPC_SCH_RQ_CNT; 35177ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, nq_id, 1, cmd); 352c0ebebb9Sliuzhongzhu if (ret) 35377ba415dSYufeng Mo goto err_dcb_cmd_send; 354c0ebebb9Sliuzhongzhu 35539edaf24SGuojia Liao dev_info(dev, "sch_rq_cnt: 0x%x\n", le32_to_cpu(desc[0].data[1])); 356c0ebebb9Sliuzhongzhu 35777ba415dSYufeng Mo cmd = HCLGE_OPC_TM_INTERNAL_STS; 35877ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, 0, 2, cmd); 359c0ebebb9Sliuzhongzhu if (ret) 36077ba415dSYufeng Mo goto err_dcb_cmd_send; 361c0ebebb9Sliuzhongzhu 36239edaf24SGuojia Liao dev_info(dev, "pri_bp: 0x%x\n", le32_to_cpu(desc[0].data[1])); 36339edaf24SGuojia Liao dev_info(dev, "fifo_dfx_info: 0x%x\n", le32_to_cpu(desc[0].data[2])); 36439edaf24SGuojia Liao dev_info(dev, "sch_roce_fifo_afull_gap: 0x%x\n", 36539edaf24SGuojia Liao le32_to_cpu(desc[0].data[3])); 36639edaf24SGuojia Liao dev_info(dev, "tx_private_waterline: 0x%x\n", 36739edaf24SGuojia Liao le32_to_cpu(desc[0].data[4])); 36839edaf24SGuojia Liao dev_info(dev, "tm_bypass_en: 0x%x\n", le32_to_cpu(desc[0].data[5])); 36939edaf24SGuojia Liao dev_info(dev, "SSU_TM_BYPASS_EN: 0x%x\n", le32_to_cpu(desc[1].data[0])); 37039edaf24SGuojia Liao dev_info(dev, "SSU_RESERVE_CFG: 0x%x\n", le32_to_cpu(desc[1].data[1])); 371c0ebebb9Sliuzhongzhu 37277ba415dSYufeng Mo cmd = HCLGE_OPC_TM_INTERNAL_CNT; 37377ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd); 374c0ebebb9Sliuzhongzhu if (ret) 37577ba415dSYufeng Mo goto err_dcb_cmd_send; 376c0ebebb9Sliuzhongzhu 37739edaf24SGuojia Liao dev_info(dev, "SCH_NIC_NUM: 0x%x\n", le32_to_cpu(desc[0].data[1])); 37839edaf24SGuojia Liao dev_info(dev, "SCH_ROCE_NUM: 0x%x\n", le32_to_cpu(desc[0].data[2])); 379c0ebebb9Sliuzhongzhu 38077ba415dSYufeng Mo cmd = HCLGE_OPC_TM_INTERNAL_STS_1; 38177ba415dSYufeng Mo ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd); 382c0ebebb9Sliuzhongzhu if (ret) 38377ba415dSYufeng Mo goto err_dcb_cmd_send; 384c0ebebb9Sliuzhongzhu 38539edaf24SGuojia Liao dev_info(dev, "TC_MAP_SEL: 0x%x\n", le32_to_cpu(desc[0].data[1])); 38639edaf24SGuojia Liao dev_info(dev, "IGU_PFC_PRI_EN: 0x%x\n", le32_to_cpu(desc[0].data[2])); 38739edaf24SGuojia Liao dev_info(dev, "MAC_PFC_PRI_EN: 0x%x\n", le32_to_cpu(desc[0].data[3])); 38839edaf24SGuojia Liao dev_info(dev, "IGU_PRI_MAP_TC_CFG: 0x%x\n", 38939edaf24SGuojia Liao le32_to_cpu(desc[0].data[4])); 39039edaf24SGuojia Liao dev_info(dev, "IGU_TX_PRI_MAP_TC_CFG: 0x%x\n", 39139edaf24SGuojia Liao le32_to_cpu(desc[0].data[5])); 39277ba415dSYufeng Mo return; 39377ba415dSYufeng Mo 39477ba415dSYufeng Mo err_dcb_cmd_send: 39577ba415dSYufeng Mo dev_err(&hdev->pdev->dev, 39677ba415dSYufeng Mo "failed to dump dcb dfx, cmd = %#x, ret = %d\n", 39777ba415dSYufeng Mo cmd, ret); 398c0ebebb9Sliuzhongzhu } 399c0ebebb9Sliuzhongzhu 400ebaf1908SWeihang Li static void hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, const char *cmd_buf) 40127cf979aSliuzhongzhu { 402e4b91468SRikard Falkeborn const struct hclge_dbg_reg_type_info *reg_info; 403a582b78dSZhongzhu Liu bool has_dump = false; 404a582b78dSZhongzhu Liu int i; 40527cf979aSliuzhongzhu 406a582b78dSZhongzhu Liu for (i = 0; i < ARRAY_SIZE(hclge_dbg_reg_info); i++) { 407a582b78dSZhongzhu Liu reg_info = &hclge_dbg_reg_info[i]; 408a582b78dSZhongzhu Liu if (!strncmp(cmd_buf, reg_info->reg_type, 409a582b78dSZhongzhu Liu strlen(reg_info->reg_type))) { 410a582b78dSZhongzhu Liu hclge_dbg_dump_reg_common(hdev, reg_info, cmd_buf); 411a582b78dSZhongzhu Liu has_dump = true; 412a582b78dSZhongzhu Liu } 413a582b78dSZhongzhu Liu } 41427cf979aSliuzhongzhu 4155cb51cfeSYufeng Mo if (strncmp(cmd_buf, "mac", strlen("mac")) == 0) { 4165cb51cfeSYufeng Mo hclge_dbg_dump_mac(hdev); 4175cb51cfeSYufeng Mo has_dump = true; 4185cb51cfeSYufeng Mo } 4195cb51cfeSYufeng Mo 420a582b78dSZhongzhu Liu if (strncmp(cmd_buf, "dcb", 3) == 0) { 421a582b78dSZhongzhu Liu hclge_dbg_dump_dcb(hdev, &cmd_buf[sizeof("dcb")]); 422a582b78dSZhongzhu Liu has_dump = true; 423a582b78dSZhongzhu Liu } 42427cf979aSliuzhongzhu 425a582b78dSZhongzhu Liu if (!has_dump) { 42627cf979aSliuzhongzhu dev_info(&hdev->pdev->dev, "unknown command\n"); 42727cf979aSliuzhongzhu return; 42827cf979aSliuzhongzhu } 42927cf979aSliuzhongzhu } 43027cf979aSliuzhongzhu 43100577c8bSYufeng Mo static void hclge_print_tc_info(struct hclge_dev *hdev, bool flag, int index) 4322849d4e7Sliuzhongzhu { 4332849d4e7Sliuzhongzhu if (flag) 43400577c8bSYufeng Mo dev_info(&hdev->pdev->dev, "tc(%d): no sp mode weight: %u\n", 43500577c8bSYufeng Mo index, hdev->tm_info.pg_info[0].tc_dwrr[index]); 4362849d4e7Sliuzhongzhu else 43700577c8bSYufeng Mo dev_info(&hdev->pdev->dev, "tc(%d): sp mode\n", index); 4382849d4e7Sliuzhongzhu } 4392849d4e7Sliuzhongzhu 4402849d4e7Sliuzhongzhu static void hclge_dbg_dump_tc(struct hclge_dev *hdev) 4412849d4e7Sliuzhongzhu { 4422849d4e7Sliuzhongzhu struct hclge_ets_tc_weight_cmd *ets_weight; 4432849d4e7Sliuzhongzhu struct hclge_desc desc; 4442849d4e7Sliuzhongzhu int i, ret; 4452849d4e7Sliuzhongzhu 4463f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 4473f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 4483f0f3253SYufeng Mo "Only DCB-supported dev supports tc\n"); 4493f0f3253SYufeng Mo return; 4503f0f3253SYufeng Mo } 4513f0f3253SYufeng Mo 4522849d4e7Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_ETS_TC_WEIGHT, true); 4532849d4e7Sliuzhongzhu 4542849d4e7Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 4552849d4e7Sliuzhongzhu if (ret) { 456ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tc fail, ret = %d\n", ret); 4572849d4e7Sliuzhongzhu return; 4582849d4e7Sliuzhongzhu } 4592849d4e7Sliuzhongzhu 4602849d4e7Sliuzhongzhu ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data; 4612849d4e7Sliuzhongzhu 462a8adbb8aSYonglong Liu dev_info(&hdev->pdev->dev, "dump tc: %u tc enabled\n", 463a8adbb8aSYonglong Liu hdev->tm_info.num_tc); 4642849d4e7Sliuzhongzhu dev_info(&hdev->pdev->dev, "weight_offset: %u\n", 4652849d4e7Sliuzhongzhu ets_weight->weight_offset); 4662849d4e7Sliuzhongzhu 4672849d4e7Sliuzhongzhu for (i = 0; i < HNAE3_MAX_TC; i++) 46800577c8bSYufeng Mo hclge_print_tc_info(hdev, ets_weight->tc_weight[i], i); 4692849d4e7Sliuzhongzhu } 4702849d4e7Sliuzhongzhu 47196227f4cSliuzhongzhu static void hclge_dbg_dump_tm_pg(struct hclge_dev *hdev) 47296227f4cSliuzhongzhu { 47396227f4cSliuzhongzhu struct hclge_port_shapping_cmd *port_shap_cfg_cmd; 47496227f4cSliuzhongzhu struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd; 47596227f4cSliuzhongzhu struct hclge_pg_shapping_cmd *pg_shap_cfg_cmd; 47696227f4cSliuzhongzhu enum hclge_opcode_type cmd; 47796227f4cSliuzhongzhu struct hclge_desc desc; 47896227f4cSliuzhongzhu int ret; 47996227f4cSliuzhongzhu 48096227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_C_SHAPPING; 48196227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 48296227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 48396227f4cSliuzhongzhu if (ret) 48496227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 48596227f4cSliuzhongzhu 48696227f4cSliuzhongzhu pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; 48796227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_C pg_id: %u\n", pg_shap_cfg_cmd->pg_id); 48896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_C pg_shapping: 0x%x\n", 48939edaf24SGuojia Liao le32_to_cpu(pg_shap_cfg_cmd->pg_shapping_para)); 49096227f4cSliuzhongzhu 49196227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_P_SHAPPING; 49296227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 49396227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 49496227f4cSliuzhongzhu if (ret) 49596227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 49696227f4cSliuzhongzhu 49796227f4cSliuzhongzhu pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; 49896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_P pg_id: %u\n", pg_shap_cfg_cmd->pg_id); 49996227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_P pg_shapping: 0x%x\n", 50039edaf24SGuojia Liao le32_to_cpu(pg_shap_cfg_cmd->pg_shapping_para)); 50196227f4cSliuzhongzhu 50296227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PORT_SHAPPING; 50396227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 50496227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 50596227f4cSliuzhongzhu if (ret) 50696227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 50796227f4cSliuzhongzhu 50896227f4cSliuzhongzhu port_shap_cfg_cmd = (struct hclge_port_shapping_cmd *)desc.data; 50996227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PORT port_shapping: 0x%x\n", 51039edaf24SGuojia Liao le32_to_cpu(port_shap_cfg_cmd->port_shapping_para)); 51196227f4cSliuzhongzhu 51296227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_SCH_MODE_CFG; 51396227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 51496227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 51596227f4cSliuzhongzhu if (ret) 51696227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 51796227f4cSliuzhongzhu 51839edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "PG_SCH pg_id: %u\n", 51939edaf24SGuojia Liao le32_to_cpu(desc.data[0])); 52096227f4cSliuzhongzhu 52196227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_SCH_MODE_CFG; 52296227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 52396227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 52496227f4cSliuzhongzhu if (ret) 52596227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 52696227f4cSliuzhongzhu 52739edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "PRI_SCH pri_id: %u\n", 52839edaf24SGuojia Liao le32_to_cpu(desc.data[0])); 52996227f4cSliuzhongzhu 53096227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_QS_SCH_MODE_CFG; 53196227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 53296227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 53396227f4cSliuzhongzhu if (ret) 53496227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 53596227f4cSliuzhongzhu 53639edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "QS_SCH qs_id: %u\n", 53739edaf24SGuojia Liao le32_to_cpu(desc.data[0])); 53896227f4cSliuzhongzhu 5393f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 5403f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 5413f0f3253SYufeng Mo "Only DCB-supported dev supports tm mapping\n"); 5423f0f3253SYufeng Mo return; 5433f0f3253SYufeng Mo } 5443f0f3253SYufeng Mo 54596227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING; 54696227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 54796227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 54896227f4cSliuzhongzhu if (ret) 54996227f4cSliuzhongzhu goto err_tm_pg_cmd_send; 55096227f4cSliuzhongzhu 55196227f4cSliuzhongzhu bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data; 5529b2f3477SWeihang Li dev_info(&hdev->pdev->dev, "BP_TO_QSET tc_id: %u\n", 55396227f4cSliuzhongzhu bp_to_qs_map_cmd->tc_id); 5549b2f3477SWeihang Li dev_info(&hdev->pdev->dev, "BP_TO_QSET qs_group_id: 0x%x\n", 55596227f4cSliuzhongzhu bp_to_qs_map_cmd->qs_group_id); 55696227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "BP_TO_QSET qs_bit_map: 0x%x\n", 55739edaf24SGuojia Liao le32_to_cpu(bp_to_qs_map_cmd->qs_bit_map)); 55896227f4cSliuzhongzhu return; 55996227f4cSliuzhongzhu 56096227f4cSliuzhongzhu err_tm_pg_cmd_send: 561ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tm_pg fail(0x%x), ret = %d\n", 56296227f4cSliuzhongzhu cmd, ret); 56396227f4cSliuzhongzhu } 56496227f4cSliuzhongzhu 56596227f4cSliuzhongzhu static void hclge_dbg_dump_tm(struct hclge_dev *hdev) 56696227f4cSliuzhongzhu { 56796227f4cSliuzhongzhu struct hclge_priority_weight_cmd *priority_weight; 56896227f4cSliuzhongzhu struct hclge_pg_to_pri_link_cmd *pg_to_pri_map; 56996227f4cSliuzhongzhu struct hclge_qs_to_pri_link_cmd *qs_to_pri_map; 57096227f4cSliuzhongzhu struct hclge_nq_to_qs_link_cmd *nq_to_qs_map; 57196227f4cSliuzhongzhu struct hclge_pri_shapping_cmd *shap_cfg_cmd; 57296227f4cSliuzhongzhu struct hclge_pg_weight_cmd *pg_weight; 57396227f4cSliuzhongzhu struct hclge_qs_weight_cmd *qs_weight; 57496227f4cSliuzhongzhu enum hclge_opcode_type cmd; 57596227f4cSliuzhongzhu struct hclge_desc desc; 57696227f4cSliuzhongzhu int ret; 57796227f4cSliuzhongzhu 57896227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_TO_PRI_LINK; 57996227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 58096227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 58196227f4cSliuzhongzhu if (ret) 58296227f4cSliuzhongzhu goto err_tm_cmd_send; 58396227f4cSliuzhongzhu 58496227f4cSliuzhongzhu pg_to_pri_map = (struct hclge_pg_to_pri_link_cmd *)desc.data; 58596227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "dump tm\n"); 58696227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_TO_PRI gp_id: %u\n", 58796227f4cSliuzhongzhu pg_to_pri_map->pg_id); 58896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG_TO_PRI map: 0x%x\n", 58996227f4cSliuzhongzhu pg_to_pri_map->pri_bit_map); 59096227f4cSliuzhongzhu 59196227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK; 59296227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 59396227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 59496227f4cSliuzhongzhu if (ret) 59596227f4cSliuzhongzhu goto err_tm_cmd_send; 59696227f4cSliuzhongzhu 59796227f4cSliuzhongzhu qs_to_pri_map = (struct hclge_qs_to_pri_link_cmd *)desc.data; 59896227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS_TO_PRI qs_id: %u\n", 59939edaf24SGuojia Liao le16_to_cpu(qs_to_pri_map->qs_id)); 60096227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS_TO_PRI priority: %u\n", 60196227f4cSliuzhongzhu qs_to_pri_map->priority); 60296227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS_TO_PRI link_vld: %u\n", 60396227f4cSliuzhongzhu qs_to_pri_map->link_vld); 60496227f4cSliuzhongzhu 60596227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK; 60696227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 60796227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 60896227f4cSliuzhongzhu if (ret) 60996227f4cSliuzhongzhu goto err_tm_cmd_send; 61096227f4cSliuzhongzhu 61196227f4cSliuzhongzhu nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data; 61239edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "NQ_TO_QS nq_id: %u\n", 61339edaf24SGuojia Liao le16_to_cpu(nq_to_qs_map->nq_id)); 6149b2f3477SWeihang Li dev_info(&hdev->pdev->dev, "NQ_TO_QS qset_id: 0x%x\n", 61539edaf24SGuojia Liao le16_to_cpu(nq_to_qs_map->qset_id)); 61696227f4cSliuzhongzhu 61796227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PG_WEIGHT; 61896227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 61996227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 62096227f4cSliuzhongzhu if (ret) 62196227f4cSliuzhongzhu goto err_tm_cmd_send; 62296227f4cSliuzhongzhu 62396227f4cSliuzhongzhu pg_weight = (struct hclge_pg_weight_cmd *)desc.data; 62496227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG pg_id: %u\n", pg_weight->pg_id); 62596227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PG dwrr: %u\n", pg_weight->dwrr); 62696227f4cSliuzhongzhu 62796227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_QS_WEIGHT; 62896227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 62996227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 63096227f4cSliuzhongzhu if (ret) 63196227f4cSliuzhongzhu goto err_tm_cmd_send; 63296227f4cSliuzhongzhu 63396227f4cSliuzhongzhu qs_weight = (struct hclge_qs_weight_cmd *)desc.data; 63439edaf24SGuojia Liao dev_info(&hdev->pdev->dev, "QS qs_id: %u\n", 63539edaf24SGuojia Liao le16_to_cpu(qs_weight->qs_id)); 63696227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "QS dwrr: %u\n", qs_weight->dwrr); 63796227f4cSliuzhongzhu 63896227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_WEIGHT; 63996227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 64096227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 64196227f4cSliuzhongzhu if (ret) 64296227f4cSliuzhongzhu goto err_tm_cmd_send; 64396227f4cSliuzhongzhu 64496227f4cSliuzhongzhu priority_weight = (struct hclge_priority_weight_cmd *)desc.data; 64596227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI pri_id: %u\n", priority_weight->pri_id); 64696227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI dwrr: %u\n", priority_weight->dwrr); 64796227f4cSliuzhongzhu 64896227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_C_SHAPPING; 64996227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 65096227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 65196227f4cSliuzhongzhu if (ret) 65296227f4cSliuzhongzhu goto err_tm_cmd_send; 65396227f4cSliuzhongzhu 65496227f4cSliuzhongzhu shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; 65596227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_C pri_id: %u\n", shap_cfg_cmd->pri_id); 65696227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_C pri_shapping: 0x%x\n", 65739edaf24SGuojia Liao le32_to_cpu(shap_cfg_cmd->pri_shapping_para)); 65896227f4cSliuzhongzhu 65996227f4cSliuzhongzhu cmd = HCLGE_OPC_TM_PRI_P_SHAPPING; 66096227f4cSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 66196227f4cSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 66296227f4cSliuzhongzhu if (ret) 66396227f4cSliuzhongzhu goto err_tm_cmd_send; 66496227f4cSliuzhongzhu 66596227f4cSliuzhongzhu shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; 66696227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_P pri_id: %u\n", shap_cfg_cmd->pri_id); 66796227f4cSliuzhongzhu dev_info(&hdev->pdev->dev, "PRI_P pri_shapping: 0x%x\n", 66839edaf24SGuojia Liao le32_to_cpu(shap_cfg_cmd->pri_shapping_para)); 66996227f4cSliuzhongzhu 67096227f4cSliuzhongzhu hclge_dbg_dump_tm_pg(hdev); 67196227f4cSliuzhongzhu 67296227f4cSliuzhongzhu return; 67396227f4cSliuzhongzhu 67496227f4cSliuzhongzhu err_tm_cmd_send: 675ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tm fail(0x%x), ret = %d\n", 67696227f4cSliuzhongzhu cmd, ret); 67796227f4cSliuzhongzhu } 67896227f4cSliuzhongzhu 679ebaf1908SWeihang Li static void hclge_dbg_dump_tm_map(struct hclge_dev *hdev, 680ebaf1908SWeihang Li const char *cmd_buf) 68182e00b86Sliuzhongzhu { 68282e00b86Sliuzhongzhu struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd; 68382e00b86Sliuzhongzhu struct hclge_nq_to_qs_link_cmd *nq_to_qs_map; 68482e00b86Sliuzhongzhu struct hclge_qs_to_pri_link_cmd *map; 68582e00b86Sliuzhongzhu struct hclge_tqp_tx_queue_tc_cmd *tc; 68682e00b86Sliuzhongzhu enum hclge_opcode_type cmd; 68782e00b86Sliuzhongzhu struct hclge_desc desc; 68882e00b86Sliuzhongzhu int queue_id, group_id; 68996b8e878SHuazhong Tan u32 qset_mapping[32]; 69082e00b86Sliuzhongzhu int tc_id, qset_id; 69182e00b86Sliuzhongzhu int pri_id, ret; 69282e00b86Sliuzhongzhu u32 i; 69382e00b86Sliuzhongzhu 6946125b52dSHuazhong Tan ret = kstrtouint(cmd_buf, 0, &queue_id); 69582e00b86Sliuzhongzhu queue_id = (ret != 0) ? 0 : queue_id; 69682e00b86Sliuzhongzhu 69782e00b86Sliuzhongzhu cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK; 69882e00b86Sliuzhongzhu nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data; 69982e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 70082e00b86Sliuzhongzhu nq_to_qs_map->nq_id = cpu_to_le16(queue_id); 70182e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 70282e00b86Sliuzhongzhu if (ret) 70382e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 70472fa4904SGuojia Liao qset_id = le16_to_cpu(nq_to_qs_map->qset_id) & 0x3FF; 70582e00b86Sliuzhongzhu 70682e00b86Sliuzhongzhu cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK; 70782e00b86Sliuzhongzhu map = (struct hclge_qs_to_pri_link_cmd *)desc.data; 70882e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 70982e00b86Sliuzhongzhu map->qs_id = cpu_to_le16(qset_id); 71082e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 71182e00b86Sliuzhongzhu if (ret) 71282e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 71382e00b86Sliuzhongzhu pri_id = map->priority; 71482e00b86Sliuzhongzhu 71582e00b86Sliuzhongzhu cmd = HCLGE_OPC_TQP_TX_QUEUE_TC; 71682e00b86Sliuzhongzhu tc = (struct hclge_tqp_tx_queue_tc_cmd *)desc.data; 71782e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 71882e00b86Sliuzhongzhu tc->queue_id = cpu_to_le16(queue_id); 71982e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 72082e00b86Sliuzhongzhu if (ret) 72182e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 72282e00b86Sliuzhongzhu tc_id = tc->tc_id & 0x7; 72382e00b86Sliuzhongzhu 72482e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, "queue_id | qset_id | pri_id | tc_id\n"); 72582e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, "%04d | %04d | %02d | %02d\n", 72682e00b86Sliuzhongzhu queue_id, qset_id, pri_id, tc_id); 72782e00b86Sliuzhongzhu 7283f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 7293f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 7303f0f3253SYufeng Mo "Only DCB-supported dev supports tm mapping\n"); 7313f0f3253SYufeng Mo return; 7323f0f3253SYufeng Mo } 7333f0f3253SYufeng Mo 73482e00b86Sliuzhongzhu cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING; 73582e00b86Sliuzhongzhu bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data; 73682e00b86Sliuzhongzhu for (group_id = 0; group_id < 32; group_id++) { 73782e00b86Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, cmd, true); 73882e00b86Sliuzhongzhu bp_to_qs_map_cmd->tc_id = tc_id; 73982e00b86Sliuzhongzhu bp_to_qs_map_cmd->qs_group_id = group_id; 74082e00b86Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 74182e00b86Sliuzhongzhu if (ret) 74282e00b86Sliuzhongzhu goto err_tm_map_cmd_send; 74382e00b86Sliuzhongzhu 74496b8e878SHuazhong Tan qset_mapping[group_id] = 74572fa4904SGuojia Liao le32_to_cpu(bp_to_qs_map_cmd->qs_bit_map); 74682e00b86Sliuzhongzhu } 74782e00b86Sliuzhongzhu 74882e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, "index | tm bp qset maping:\n"); 74982e00b86Sliuzhongzhu 75082e00b86Sliuzhongzhu i = 0; 75182e00b86Sliuzhongzhu for (group_id = 0; group_id < 4; group_id++) { 75282e00b86Sliuzhongzhu dev_info(&hdev->pdev->dev, 75382e00b86Sliuzhongzhu "%04d | %08x:%08x:%08x:%08x:%08x:%08x:%08x:%08x\n", 75496b8e878SHuazhong Tan group_id * 256, qset_mapping[(u32)(i + 7)], 75596b8e878SHuazhong Tan qset_mapping[(u32)(i + 6)], qset_mapping[(u32)(i + 5)], 75696b8e878SHuazhong Tan qset_mapping[(u32)(i + 4)], qset_mapping[(u32)(i + 3)], 75796b8e878SHuazhong Tan qset_mapping[(u32)(i + 2)], qset_mapping[(u32)(i + 1)], 75896b8e878SHuazhong Tan qset_mapping[i]); 75982e00b86Sliuzhongzhu i += 8; 76082e00b86Sliuzhongzhu } 76182e00b86Sliuzhongzhu 76282e00b86Sliuzhongzhu return; 76382e00b86Sliuzhongzhu 76482e00b86Sliuzhongzhu err_tm_map_cmd_send: 765ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump tqp map fail(0x%x), ret = %d\n", 76682e00b86Sliuzhongzhu cmd, ret); 76782e00b86Sliuzhongzhu } 76882e00b86Sliuzhongzhu 769d958919dSliuzhongzhu static void hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev) 770d958919dSliuzhongzhu { 771d958919dSliuzhongzhu struct hclge_cfg_pause_param_cmd *pause_param; 772d958919dSliuzhongzhu struct hclge_desc desc; 773d958919dSliuzhongzhu int ret; 774d958919dSliuzhongzhu 775d958919dSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_MAC_PARA, true); 776d958919dSliuzhongzhu 777d958919dSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 778d958919dSliuzhongzhu if (ret) { 779ed5b255bSYufeng Mo dev_err(&hdev->pdev->dev, "dump checksum fail, ret = %d\n", 780d958919dSliuzhongzhu ret); 781d958919dSliuzhongzhu return; 782d958919dSliuzhongzhu } 783d958919dSliuzhongzhu 784d958919dSliuzhongzhu pause_param = (struct hclge_cfg_pause_param_cmd *)desc.data; 785d958919dSliuzhongzhu dev_info(&hdev->pdev->dev, "dump qos pause cfg\n"); 786d958919dSliuzhongzhu dev_info(&hdev->pdev->dev, "pause_trans_gap: 0x%x\n", 787d958919dSliuzhongzhu pause_param->pause_trans_gap); 788d958919dSliuzhongzhu dev_info(&hdev->pdev->dev, "pause_trans_time: 0x%x\n", 78939edaf24SGuojia Liao le16_to_cpu(pause_param->pause_trans_time)); 790d958919dSliuzhongzhu } 791d958919dSliuzhongzhu 7926fc22440Sliuzhongzhu static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev) 7936fc22440Sliuzhongzhu { 7946fc22440Sliuzhongzhu struct hclge_qos_pri_map_cmd *pri_map; 7956fc22440Sliuzhongzhu struct hclge_desc desc; 7966fc22440Sliuzhongzhu int ret; 7976fc22440Sliuzhongzhu 7986fc22440Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PRI_TO_TC_MAPPING, true); 7996fc22440Sliuzhongzhu 8006fc22440Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 8016fc22440Sliuzhongzhu if (ret) { 8026fc22440Sliuzhongzhu dev_err(&hdev->pdev->dev, 803ed5b255bSYufeng Mo "dump qos pri map fail, ret = %d\n", ret); 8046fc22440Sliuzhongzhu return; 8056fc22440Sliuzhongzhu } 8066fc22440Sliuzhongzhu 8076fc22440Sliuzhongzhu pri_map = (struct hclge_qos_pri_map_cmd *)desc.data; 8086fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "dump qos pri map\n"); 8096fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "vlan_to_pri: 0x%x\n", pri_map->vlan_pri); 8106fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_0_to_tc: 0x%x\n", pri_map->pri0_tc); 8116fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_1_to_tc: 0x%x\n", pri_map->pri1_tc); 8126fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_2_to_tc: 0x%x\n", pri_map->pri2_tc); 8136fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_3_to_tc: 0x%x\n", pri_map->pri3_tc); 8146fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_4_to_tc: 0x%x\n", pri_map->pri4_tc); 8156fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_5_to_tc: 0x%x\n", pri_map->pri5_tc); 8166fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_6_to_tc: 0x%x\n", pri_map->pri6_tc); 8176fc22440Sliuzhongzhu dev_info(&hdev->pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc); 8186fc22440Sliuzhongzhu } 8196fc22440Sliuzhongzhu 8207d9d7f88Sliuzhongzhu static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) 8217d9d7f88Sliuzhongzhu { 8227d9d7f88Sliuzhongzhu struct hclge_tx_buff_alloc_cmd *tx_buf_cmd; 8237d9d7f88Sliuzhongzhu struct hclge_rx_priv_buff_cmd *rx_buf_cmd; 8247d9d7f88Sliuzhongzhu struct hclge_rx_priv_wl_buf *rx_priv_wl; 8257d9d7f88Sliuzhongzhu struct hclge_rx_com_wl *rx_packet_cnt; 8267d9d7f88Sliuzhongzhu struct hclge_rx_com_thrd *rx_com_thrd; 8277d9d7f88Sliuzhongzhu struct hclge_rx_com_wl *rx_com_wl; 8287d9d7f88Sliuzhongzhu enum hclge_opcode_type cmd; 8297d9d7f88Sliuzhongzhu struct hclge_desc desc[2]; 8307d9d7f88Sliuzhongzhu int i, ret; 8317d9d7f88Sliuzhongzhu 8327d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_TX_BUFF_ALLOC; 8337d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 8347d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 1); 8357d9d7f88Sliuzhongzhu if (ret) 8367d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 8377d9d7f88Sliuzhongzhu 8387d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "dump qos buf cfg\n"); 8397d9d7f88Sliuzhongzhu 8407d9d7f88Sliuzhongzhu tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc[0].data; 841f9f07091Sliuzhongzhu for (i = 0; i < HCLGE_MAX_TC_NUM; i++) 8427d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "tx_packet_buf_tc_%d: 0x%x\n", i, 84339edaf24SGuojia Liao le16_to_cpu(tx_buf_cmd->tx_pkt_buff[i])); 8447d9d7f88Sliuzhongzhu 8457d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC; 8467d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(desc, cmd, true); 8477d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 1); 8487d9d7f88Sliuzhongzhu if (ret) 8497d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 8507d9d7f88Sliuzhongzhu 8517d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "\n"); 8527d9d7f88Sliuzhongzhu rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc[0].data; 853f9f07091Sliuzhongzhu for (i = 0; i < HCLGE_MAX_TC_NUM; i++) 8547d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "rx_packet_buf_tc_%d: 0x%x\n", i, 85539edaf24SGuojia Liao le16_to_cpu(rx_buf_cmd->buf_num[i])); 8567d9d7f88Sliuzhongzhu 8577d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "rx_share_buf: 0x%x\n", 85839edaf24SGuojia Liao le16_to_cpu(rx_buf_cmd->shared_buf)); 8597d9d7f88Sliuzhongzhu 8603f0f3253SYufeng Mo cmd = HCLGE_OPC_RX_COM_WL_ALLOC; 8613f0f3253SYufeng Mo hclge_cmd_setup_basic_desc(desc, cmd, true); 8623f0f3253SYufeng Mo ret = hclge_cmd_send(&hdev->hw, desc, 1); 8633f0f3253SYufeng Mo if (ret) 8643f0f3253SYufeng Mo goto err_qos_cmd_send; 8653f0f3253SYufeng Mo 8663f0f3253SYufeng Mo rx_com_wl = (struct hclge_rx_com_wl *)desc[0].data; 8673f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, "\n"); 8683f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, "rx_com_wl: high: 0x%x, low: 0x%x\n", 86939edaf24SGuojia Liao le16_to_cpu(rx_com_wl->com_wl.high), 87039edaf24SGuojia Liao le16_to_cpu(rx_com_wl->com_wl.low)); 8713f0f3253SYufeng Mo 8723f0f3253SYufeng Mo cmd = HCLGE_OPC_RX_GBL_PKT_CNT; 8733f0f3253SYufeng Mo hclge_cmd_setup_basic_desc(desc, cmd, true); 8743f0f3253SYufeng Mo ret = hclge_cmd_send(&hdev->hw, desc, 1); 8753f0f3253SYufeng Mo if (ret) 8763f0f3253SYufeng Mo goto err_qos_cmd_send; 8773f0f3253SYufeng Mo 8783f0f3253SYufeng Mo rx_packet_cnt = (struct hclge_rx_com_wl *)desc[0].data; 8793f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 8803f0f3253SYufeng Mo "rx_global_packet_cnt: high: 0x%x, low: 0x%x\n", 88139edaf24SGuojia Liao le16_to_cpu(rx_packet_cnt->com_wl.high), 88239edaf24SGuojia Liao le16_to_cpu(rx_packet_cnt->com_wl.low)); 8833f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, "\n"); 8843f0f3253SYufeng Mo 8853f0f3253SYufeng Mo if (!hnae3_dev_dcb_supported(hdev)) { 8863f0f3253SYufeng Mo dev_info(&hdev->pdev->dev, 8873f0f3253SYufeng Mo "Only DCB-supported dev supports rx priv wl\n"); 8883f0f3253SYufeng Mo return; 8893f0f3253SYufeng Mo } 8907d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC; 8917d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[0], cmd, true); 8927d9d7f88Sliuzhongzhu desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 8937d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[1], cmd, true); 8947d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 2); 8957d9d7f88Sliuzhongzhu if (ret) 8967d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 8977d9d7f88Sliuzhongzhu 8987d9d7f88Sliuzhongzhu rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data; 8997d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 9007d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 9017d9d7f88Sliuzhongzhu "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i, 90239edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].high), 90339edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 9047d9d7f88Sliuzhongzhu 9057d9d7f88Sliuzhongzhu rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[1].data; 9067d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 9077d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 9086f92bfd7SHuazhong Tan "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", 9096f92bfd7SHuazhong Tan i + HCLGE_TC_NUM_ONE_DESC, 91039edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].high), 91139edaf24SGuojia Liao le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 9127d9d7f88Sliuzhongzhu 9137d9d7f88Sliuzhongzhu cmd = HCLGE_OPC_RX_COM_THRD_ALLOC; 9147d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[0], cmd, true); 9157d9d7f88Sliuzhongzhu desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 9167d9d7f88Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[1], cmd, true); 9177d9d7f88Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 2); 9187d9d7f88Sliuzhongzhu if (ret) 9197d9d7f88Sliuzhongzhu goto err_qos_cmd_send; 9207d9d7f88Sliuzhongzhu 9217d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, "\n"); 9227d9d7f88Sliuzhongzhu rx_com_thrd = (struct hclge_rx_com_thrd *)desc[0].data; 9237d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 9247d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 9257d9d7f88Sliuzhongzhu "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", i, 92639edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].high), 92739edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 9287d9d7f88Sliuzhongzhu 9297d9d7f88Sliuzhongzhu rx_com_thrd = (struct hclge_rx_com_thrd *)desc[1].data; 9307d9d7f88Sliuzhongzhu for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 9317d9d7f88Sliuzhongzhu dev_info(&hdev->pdev->dev, 9326f92bfd7SHuazhong Tan "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", 9336f92bfd7SHuazhong Tan i + HCLGE_TC_NUM_ONE_DESC, 93439edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].high), 93539edaf24SGuojia Liao le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 9367d9d7f88Sliuzhongzhu return; 9377d9d7f88Sliuzhongzhu 9387d9d7f88Sliuzhongzhu err_qos_cmd_send: 9397d9d7f88Sliuzhongzhu dev_err(&hdev->pdev->dev, 940ed5b255bSYufeng Mo "dump qos buf cfg fail(0x%x), ret = %d\n", cmd, ret); 9417d9d7f88Sliuzhongzhu } 9427d9d7f88Sliuzhongzhu 9437737f1fbSliuzhongzhu static void hclge_dbg_dump_mng_table(struct hclge_dev *hdev) 9447737f1fbSliuzhongzhu { 9457737f1fbSliuzhongzhu struct hclge_mac_ethertype_idx_rd_cmd *req0; 9467737f1fbSliuzhongzhu char printf_buf[HCLGE_DBG_BUF_LEN]; 9477737f1fbSliuzhongzhu struct hclge_desc desc; 94872fa4904SGuojia Liao u32 msg_egress_port; 9497737f1fbSliuzhongzhu int ret, i; 9507737f1fbSliuzhongzhu 9517737f1fbSliuzhongzhu dev_info(&hdev->pdev->dev, "mng tab:\n"); 9527737f1fbSliuzhongzhu memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); 9537737f1fbSliuzhongzhu strncat(printf_buf, 9547737f1fbSliuzhongzhu "entry|mac_addr |mask|ether|mask|vlan|mask", 9557737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - 1); 9567737f1fbSliuzhongzhu strncat(printf_buf + strlen(printf_buf), 9577737f1fbSliuzhongzhu "|i_map|i_dir|e_type|pf_id|vf_id|q_id|drop\n", 9587737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - strlen(printf_buf) - 1); 9597737f1fbSliuzhongzhu 9607737f1fbSliuzhongzhu dev_info(&hdev->pdev->dev, "%s", printf_buf); 9617737f1fbSliuzhongzhu 9627737f1fbSliuzhongzhu for (i = 0; i < HCLGE_DBG_MNG_TBL_MAX; i++) { 9637737f1fbSliuzhongzhu hclge_cmd_setup_basic_desc(&desc, HCLGE_MAC_ETHERTYPE_IDX_RD, 9647737f1fbSliuzhongzhu true); 9657737f1fbSliuzhongzhu req0 = (struct hclge_mac_ethertype_idx_rd_cmd *)&desc.data; 9667737f1fbSliuzhongzhu req0->index = cpu_to_le16(i); 9677737f1fbSliuzhongzhu 9687737f1fbSliuzhongzhu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 9697737f1fbSliuzhongzhu if (ret) { 9707737f1fbSliuzhongzhu dev_err(&hdev->pdev->dev, 9717737f1fbSliuzhongzhu "call hclge_cmd_send fail, ret = %d\n", ret); 9727737f1fbSliuzhongzhu return; 9737737f1fbSliuzhongzhu } 9747737f1fbSliuzhongzhu 9757737f1fbSliuzhongzhu if (!req0->resp_code) 9767737f1fbSliuzhongzhu continue; 9777737f1fbSliuzhongzhu 9787737f1fbSliuzhongzhu memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); 9797737f1fbSliuzhongzhu snprintf(printf_buf, HCLGE_DBG_BUF_LEN, 9807737f1fbSliuzhongzhu "%02u |%02x:%02x:%02x:%02x:%02x:%02x|", 98139edaf24SGuojia Liao le16_to_cpu(req0->index), 98239edaf24SGuojia Liao req0->mac_addr[0], req0->mac_addr[1], 9836e6e7680SGuojia Liao req0->mac_addr[2], req0->mac_addr[3], 9846e6e7680SGuojia Liao req0->mac_addr[4], req0->mac_addr[5]); 9857737f1fbSliuzhongzhu 9867737f1fbSliuzhongzhu snprintf(printf_buf + strlen(printf_buf), 9877737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - strlen(printf_buf), 9887737f1fbSliuzhongzhu "%x |%04x |%x |%04x|%x |%02x |%02x |", 9897737f1fbSliuzhongzhu !!(req0->flags & HCLGE_DBG_MNG_MAC_MASK_B), 99072fa4904SGuojia Liao le16_to_cpu(req0->ethter_type), 9917737f1fbSliuzhongzhu !!(req0->flags & HCLGE_DBG_MNG_ETHER_MASK_B), 99272fa4904SGuojia Liao le16_to_cpu(req0->vlan_tag) & HCLGE_DBG_MNG_VLAN_TAG, 9937737f1fbSliuzhongzhu !!(req0->flags & HCLGE_DBG_MNG_VLAN_MASK_B), 9947737f1fbSliuzhongzhu req0->i_port_bitmap, req0->i_port_direction); 9957737f1fbSliuzhongzhu 99672fa4904SGuojia Liao msg_egress_port = le16_to_cpu(req0->egress_port); 9977737f1fbSliuzhongzhu snprintf(printf_buf + strlen(printf_buf), 9987737f1fbSliuzhongzhu HCLGE_DBG_BUF_LEN - strlen(printf_buf), 99972fa4904SGuojia Liao "%x |%x |%02x |%04x|%x\n", 100072fa4904SGuojia Liao !!(msg_egress_port & HCLGE_DBG_MNG_E_TYPE_B), 100172fa4904SGuojia Liao msg_egress_port & HCLGE_DBG_MNG_PF_ID, 100272fa4904SGuojia Liao (msg_egress_port >> 3) & HCLGE_DBG_MNG_VF_ID, 100372fa4904SGuojia Liao le16_to_cpu(req0->egress_queue), 100472fa4904SGuojia Liao !!(msg_egress_port & HCLGE_DBG_MNG_DROP_B)); 10057737f1fbSliuzhongzhu 10067737f1fbSliuzhongzhu dev_info(&hdev->pdev->dev, "%s", printf_buf); 10077737f1fbSliuzhongzhu } 10087737f1fbSliuzhongzhu } 10097737f1fbSliuzhongzhu 101044b6b883SYufeng Mo static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage, 10113c666b58Sliuzhongzhu bool sel_x, u32 loc) 10123c666b58Sliuzhongzhu { 10133c666b58Sliuzhongzhu struct hclge_fd_tcam_config_1_cmd *req1; 10143c666b58Sliuzhongzhu struct hclge_fd_tcam_config_2_cmd *req2; 10153c666b58Sliuzhongzhu struct hclge_fd_tcam_config_3_cmd *req3; 10163c666b58Sliuzhongzhu struct hclge_desc desc[3]; 10173c666b58Sliuzhongzhu int ret, i; 10183c666b58Sliuzhongzhu u32 *req; 10193c666b58Sliuzhongzhu 10203c666b58Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_FD_TCAM_OP, true); 10213c666b58Sliuzhongzhu desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 10223c666b58Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_FD_TCAM_OP, true); 10233c666b58Sliuzhongzhu desc[1].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); 10243c666b58Sliuzhongzhu hclge_cmd_setup_basic_desc(&desc[2], HCLGE_OPC_FD_TCAM_OP, true); 10253c666b58Sliuzhongzhu 10263c666b58Sliuzhongzhu req1 = (struct hclge_fd_tcam_config_1_cmd *)desc[0].data; 10273c666b58Sliuzhongzhu req2 = (struct hclge_fd_tcam_config_2_cmd *)desc[1].data; 10283c666b58Sliuzhongzhu req3 = (struct hclge_fd_tcam_config_3_cmd *)desc[2].data; 10293c666b58Sliuzhongzhu 10303c666b58Sliuzhongzhu req1->stage = stage; 10313c666b58Sliuzhongzhu req1->xy_sel = sel_x ? 1 : 0; 10323c666b58Sliuzhongzhu req1->index = cpu_to_le32(loc); 10333c666b58Sliuzhongzhu 10343c666b58Sliuzhongzhu ret = hclge_cmd_send(&hdev->hw, desc, 3); 10353c666b58Sliuzhongzhu if (ret) 103644b6b883SYufeng Mo return ret; 10373c666b58Sliuzhongzhu 10383c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, " read result tcam key %s(%u):\n", 10393c666b58Sliuzhongzhu sel_x ? "x" : "y", loc); 10403c666b58Sliuzhongzhu 104146ee7350SGuojia Liao /* tcam_data0 ~ tcam_data1 */ 10423c666b58Sliuzhongzhu req = (u32 *)req1->tcam_data; 10433c666b58Sliuzhongzhu for (i = 0; i < 2; i++) 10443c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "%08x\n", *req++); 10453c666b58Sliuzhongzhu 104646ee7350SGuojia Liao /* tcam_data2 ~ tcam_data7 */ 10473c666b58Sliuzhongzhu req = (u32 *)req2->tcam_data; 10483c666b58Sliuzhongzhu for (i = 0; i < 6; i++) 10493c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "%08x\n", *req++); 10503c666b58Sliuzhongzhu 105146ee7350SGuojia Liao /* tcam_data8 ~ tcam_data12 */ 10523c666b58Sliuzhongzhu req = (u32 *)req3->tcam_data; 10533c666b58Sliuzhongzhu for (i = 0; i < 5; i++) 10543c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "%08x\n", *req++); 105544b6b883SYufeng Mo 105644b6b883SYufeng Mo return ret; 105744b6b883SYufeng Mo } 105844b6b883SYufeng Mo 105944b6b883SYufeng Mo static int hclge_dbg_get_rules_location(struct hclge_dev *hdev, u16 *rule_locs) 106044b6b883SYufeng Mo { 106144b6b883SYufeng Mo struct hclge_fd_rule *rule; 106244b6b883SYufeng Mo struct hlist_node *node; 106344b6b883SYufeng Mo int cnt = 0; 106444b6b883SYufeng Mo 106544b6b883SYufeng Mo spin_lock_bh(&hdev->fd_rule_lock); 106644b6b883SYufeng Mo hlist_for_each_entry_safe(rule, node, &hdev->fd_rule_list, rule_node) { 106744b6b883SYufeng Mo rule_locs[cnt] = rule->location; 106844b6b883SYufeng Mo cnt++; 106944b6b883SYufeng Mo } 107044b6b883SYufeng Mo spin_unlock_bh(&hdev->fd_rule_lock); 107144b6b883SYufeng Mo 107244b6b883SYufeng Mo if (cnt != hdev->hclge_fd_rule_num) 107344b6b883SYufeng Mo return -EINVAL; 107444b6b883SYufeng Mo 107544b6b883SYufeng Mo return cnt; 10763c666b58Sliuzhongzhu } 10773c666b58Sliuzhongzhu 10783c666b58Sliuzhongzhu static void hclge_dbg_fd_tcam(struct hclge_dev *hdev) 10793c666b58Sliuzhongzhu { 108044b6b883SYufeng Mo int i, ret, rule_cnt; 108144b6b883SYufeng Mo u16 *rule_locs; 10823c666b58Sliuzhongzhu 108344b6b883SYufeng Mo if (!hnae3_dev_fd_supported(hdev)) { 108444b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 108544b6b883SYufeng Mo "Only FD-supported dev supports dump fd tcam\n"); 108644b6b883SYufeng Mo return; 10873c666b58Sliuzhongzhu } 108844b6b883SYufeng Mo 108944b6b883SYufeng Mo if (!hdev->hclge_fd_rule_num || 109044b6b883SYufeng Mo !hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]) 109144b6b883SYufeng Mo return; 109244b6b883SYufeng Mo 109344b6b883SYufeng Mo rule_locs = kcalloc(hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1], 109444b6b883SYufeng Mo sizeof(u16), GFP_KERNEL); 109544b6b883SYufeng Mo if (!rule_locs) 109644b6b883SYufeng Mo return; 109744b6b883SYufeng Mo 109844b6b883SYufeng Mo rule_cnt = hclge_dbg_get_rules_location(hdev, rule_locs); 109944b6b883SYufeng Mo if (rule_cnt <= 0) { 110044b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 110144b6b883SYufeng Mo "failed to get rule number, ret = %d\n", rule_cnt); 110244b6b883SYufeng Mo kfree(rule_locs); 110344b6b883SYufeng Mo return; 110444b6b883SYufeng Mo } 110544b6b883SYufeng Mo 110644b6b883SYufeng Mo for (i = 0; i < rule_cnt; i++) { 110744b6b883SYufeng Mo ret = hclge_dbg_fd_tcam_read(hdev, 0, true, rule_locs[i]); 110844b6b883SYufeng Mo if (ret) { 110944b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 111044b6b883SYufeng Mo "failed to get fd tcam key x, ret = %d\n", ret); 111144b6b883SYufeng Mo kfree(rule_locs); 111244b6b883SYufeng Mo return; 111344b6b883SYufeng Mo } 111444b6b883SYufeng Mo 111544b6b883SYufeng Mo ret = hclge_dbg_fd_tcam_read(hdev, 0, false, rule_locs[i]); 111644b6b883SYufeng Mo if (ret) { 111744b6b883SYufeng Mo dev_err(&hdev->pdev->dev, 111844b6b883SYufeng Mo "failed to get fd tcam key y, ret = %d\n", ret); 111944b6b883SYufeng Mo kfree(rule_locs); 112044b6b883SYufeng Mo return; 112144b6b883SYufeng Mo } 112244b6b883SYufeng Mo } 112344b6b883SYufeng Mo 112444b6b883SYufeng Mo kfree(rule_locs); 11253c666b58Sliuzhongzhu } 11263c666b58Sliuzhongzhu 11273d77d0cbSHuazhong Tan void hclge_dbg_dump_rst_info(struct hclge_dev *hdev) 1128f02eb82dSHuazhong Tan { 11290ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "PF reset count: %u\n", 1130f02eb82dSHuazhong Tan hdev->rst_stats.pf_rst_cnt); 11310ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", 1132f02eb82dSHuazhong Tan hdev->rst_stats.flr_rst_cnt); 11330ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "GLOBAL reset count: %u\n", 1134f02eb82dSHuazhong Tan hdev->rst_stats.global_rst_cnt); 11350ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "IMP reset count: %u\n", 1136f02eb82dSHuazhong Tan hdev->rst_stats.imp_rst_cnt); 11370ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset done count: %u\n", 1138f02eb82dSHuazhong Tan hdev->rst_stats.reset_done_cnt); 11390ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", 1140f02eb82dSHuazhong Tan hdev->rst_stats.hw_reset_done_cnt); 11410ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset count: %u\n", 1142f02eb82dSHuazhong Tan hdev->rst_stats.reset_cnt); 11430ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset fail count: %u\n", 11440ecf1f7bSHuazhong Tan hdev->rst_stats.reset_fail_cnt); 11450ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", 11460ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE)); 11470ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset interrupt source: 0x%x\n", 11480ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG)); 11490ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "reset interrupt status: 0x%x\n", 11500ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS)); 11510ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "hardware reset status: 0x%x\n", 11520ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG)); 11530ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", 11540ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG)); 11550ecf1f7bSHuazhong Tan dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", 11560ecf1f7bSHuazhong Tan hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING)); 11573d77d0cbSHuazhong Tan dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); 1158f02eb82dSHuazhong Tan } 1159f02eb82dSHuazhong Tan 11601c6dfe6fSYunsheng Lin static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev) 11611c6dfe6fSYunsheng Lin { 11621c6dfe6fSYunsheng Lin dev_info(&hdev->pdev->dev, "last_serv_processed: %lu\n", 11631c6dfe6fSYunsheng Lin hdev->last_serv_processed); 11641c6dfe6fSYunsheng Lin dev_info(&hdev->pdev->dev, "last_serv_cnt: %lu\n", 11651c6dfe6fSYunsheng Lin hdev->serv_processed_cnt); 11661c6dfe6fSYunsheng Lin } 11671c6dfe6fSYunsheng Lin 116891f8ff09SGuojia Liao static void hclge_dbg_get_m7_stats_info(struct hclge_dev *hdev) 116933a90e2fSZhongzhu Liu { 117033a90e2fSZhongzhu Liu struct hclge_desc *desc_src, *desc_tmp; 117133a90e2fSZhongzhu Liu struct hclge_get_m7_bd_cmd *req; 117233a90e2fSZhongzhu Liu struct hclge_desc desc; 117333a90e2fSZhongzhu Liu u32 bd_num, buf_len; 117433a90e2fSZhongzhu Liu int ret, i; 117533a90e2fSZhongzhu Liu 117633a90e2fSZhongzhu Liu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_M7_STATS_BD, true); 117733a90e2fSZhongzhu Liu 117833a90e2fSZhongzhu Liu req = (struct hclge_get_m7_bd_cmd *)desc.data; 117933a90e2fSZhongzhu Liu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 118033a90e2fSZhongzhu Liu if (ret) { 118133a90e2fSZhongzhu Liu dev_err(&hdev->pdev->dev, 118233a90e2fSZhongzhu Liu "get firmware statistics bd number failed, ret = %d\n", 118333a90e2fSZhongzhu Liu ret); 118433a90e2fSZhongzhu Liu return; 118533a90e2fSZhongzhu Liu } 118633a90e2fSZhongzhu Liu 118733a90e2fSZhongzhu Liu bd_num = le32_to_cpu(req->bd_num); 118833a90e2fSZhongzhu Liu 118933a90e2fSZhongzhu Liu buf_len = sizeof(struct hclge_desc) * bd_num; 119033a90e2fSZhongzhu Liu desc_src = kzalloc(buf_len, GFP_KERNEL); 1191fbdc4d79SYufeng Mo if (!desc_src) 119233a90e2fSZhongzhu Liu return; 119333a90e2fSZhongzhu Liu 119433a90e2fSZhongzhu Liu desc_tmp = desc_src; 119533a90e2fSZhongzhu Liu ret = hclge_dbg_cmd_send(hdev, desc_tmp, 0, bd_num, 119633a90e2fSZhongzhu Liu HCLGE_OPC_M7_STATS_INFO); 119733a90e2fSZhongzhu Liu if (ret) { 119833a90e2fSZhongzhu Liu kfree(desc_src); 119933a90e2fSZhongzhu Liu dev_err(&hdev->pdev->dev, 120033a90e2fSZhongzhu Liu "get firmware statistics failed, ret = %d\n", ret); 120133a90e2fSZhongzhu Liu return; 120233a90e2fSZhongzhu Liu } 120333a90e2fSZhongzhu Liu 120433a90e2fSZhongzhu Liu for (i = 0; i < bd_num; i++) { 120533a90e2fSZhongzhu Liu dev_info(&hdev->pdev->dev, "0x%08x 0x%08x 0x%08x\n", 120633a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[0]), 120733a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[1]), 120833a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[2])); 120933a90e2fSZhongzhu Liu dev_info(&hdev->pdev->dev, "0x%08x 0x%08x 0x%08x\n", 121033a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[3]), 121133a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[4]), 121233a90e2fSZhongzhu Liu le32_to_cpu(desc_tmp->data[5])); 121333a90e2fSZhongzhu Liu 121433a90e2fSZhongzhu Liu desc_tmp++; 121533a90e2fSZhongzhu Liu } 121633a90e2fSZhongzhu Liu 121733a90e2fSZhongzhu Liu kfree(desc_src); 121833a90e2fSZhongzhu Liu } 121933a90e2fSZhongzhu Liu 1220dec84660SYufeng Mo #define HCLGE_CMD_NCL_CONFIG_BD_NUM 5 1221dec84660SYufeng Mo 1222dec84660SYufeng Mo static void hclge_ncl_config_data_print(struct hclge_dev *hdev, 1223dec84660SYufeng Mo struct hclge_desc *desc, int *offset, 1224dec84660SYufeng Mo int *length) 1225dec84660SYufeng Mo { 1226dec84660SYufeng Mo #define HCLGE_CMD_DATA_NUM 6 1227dec84660SYufeng Mo 1228dec84660SYufeng Mo int i; 1229dec84660SYufeng Mo int j; 1230dec84660SYufeng Mo 1231dec84660SYufeng Mo for (i = 0; i < HCLGE_CMD_NCL_CONFIG_BD_NUM; i++) { 1232dec84660SYufeng Mo for (j = 0; j < HCLGE_CMD_DATA_NUM; j++) { 1233dec84660SYufeng Mo if (i == 0 && j == 0) 1234dec84660SYufeng Mo continue; 1235dec84660SYufeng Mo 1236dec84660SYufeng Mo dev_info(&hdev->pdev->dev, "0x%04x | 0x%08x\n", 1237dec84660SYufeng Mo *offset, 1238dec84660SYufeng Mo le32_to_cpu(desc[i].data[j])); 1239dec84660SYufeng Mo *offset += sizeof(u32); 1240dec84660SYufeng Mo *length -= sizeof(u32); 1241dec84660SYufeng Mo if (*length <= 0) 1242dec84660SYufeng Mo return; 1243dec84660SYufeng Mo } 1244dec84660SYufeng Mo } 1245dec84660SYufeng Mo } 1246dec84660SYufeng Mo 1247ffd140e2SWeihang Li /* hclge_dbg_dump_ncl_config: print specified range of NCL_CONFIG file 1248ffd140e2SWeihang Li * @hdev: pointer to struct hclge_dev 1249ffd140e2SWeihang Li * @cmd_buf: string that contains offset and length 1250ffd140e2SWeihang Li */ 1251ebaf1908SWeihang Li static void hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, 1252ebaf1908SWeihang Li const char *cmd_buf) 1253ffd140e2SWeihang Li { 1254ffd140e2SWeihang Li #define HCLGE_MAX_NCL_CONFIG_OFFSET 4096 12554960cabfSYufeng Mo #define HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD (20 + 24 * 4) 1256b4401a04SYufeng Mo #define HCLGE_NCL_CONFIG_PARAM_NUM 2 1257ffd140e2SWeihang Li 1258dec84660SYufeng Mo struct hclge_desc desc[HCLGE_CMD_NCL_CONFIG_BD_NUM]; 1259dec84660SYufeng Mo int bd_num = HCLGE_CMD_NCL_CONFIG_BD_NUM; 1260ffd140e2SWeihang Li int offset; 1261ffd140e2SWeihang Li int length; 1262ffd140e2SWeihang Li int data0; 1263ffd140e2SWeihang Li int ret; 1264ffd140e2SWeihang Li 1265ffd140e2SWeihang Li ret = sscanf(cmd_buf, "%x %x", &offset, &length); 1266b4401a04SYufeng Mo if (ret != HCLGE_NCL_CONFIG_PARAM_NUM) { 1267b4401a04SYufeng Mo dev_err(&hdev->pdev->dev, 1268b4401a04SYufeng Mo "Too few parameters, num = %d.\n", ret); 1269ffd140e2SWeihang Li return; 1270ffd140e2SWeihang Li } 1271b4401a04SYufeng Mo 1272b4401a04SYufeng Mo if (offset < 0 || offset >= HCLGE_MAX_NCL_CONFIG_OFFSET || 1273b4401a04SYufeng Mo length <= 0 || length > HCLGE_MAX_NCL_CONFIG_OFFSET - offset) { 1274b4401a04SYufeng Mo dev_err(&hdev->pdev->dev, 1275b4401a04SYufeng Mo "Invalid input, offset = %d, length = %d.\n", 1276b4401a04SYufeng Mo offset, length); 1277ffd140e2SWeihang Li return; 1278ffd140e2SWeihang Li } 1279ffd140e2SWeihang Li 1280ffd140e2SWeihang Li dev_info(&hdev->pdev->dev, "offset | data\n"); 1281ffd140e2SWeihang Li 1282ffd140e2SWeihang Li while (length > 0) { 1283ffd140e2SWeihang Li data0 = offset; 12844960cabfSYufeng Mo if (length >= HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD) 12854960cabfSYufeng Mo data0 |= HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD << 16; 1286ffd140e2SWeihang Li else 1287ffd140e2SWeihang Li data0 |= length << 16; 1288ffd140e2SWeihang Li ret = hclge_dbg_cmd_send(hdev, desc, data0, bd_num, 1289ffd140e2SWeihang Li HCLGE_OPC_QUERY_NCL_CONFIG); 1290ffd140e2SWeihang Li if (ret) 1291ffd140e2SWeihang Li return; 1292ffd140e2SWeihang Li 1293dec84660SYufeng Mo hclge_ncl_config_data_print(hdev, desc, &offset, &length); 1294ffd140e2SWeihang Li } 1295ffd140e2SWeihang Li } 1296ffd140e2SWeihang Li 1297ded45d40SYufeng Mo static void hclge_dbg_dump_loopback(struct hclge_dev *hdev, 1298ded45d40SYufeng Mo const char *cmd_buf) 1299ded45d40SYufeng Mo { 1300ded45d40SYufeng Mo struct phy_device *phydev = hdev->hw.mac.phydev; 1301ded45d40SYufeng Mo struct hclge_config_mac_mode_cmd *req_app; 1302ded45d40SYufeng Mo struct hclge_serdes_lb_cmd *req_serdes; 1303ded45d40SYufeng Mo struct hclge_desc desc; 1304ded45d40SYufeng Mo u8 loopback_en; 1305ded45d40SYufeng Mo int ret; 1306ded45d40SYufeng Mo 1307ded45d40SYufeng Mo req_app = (struct hclge_config_mac_mode_cmd *)desc.data; 1308ded45d40SYufeng Mo req_serdes = (struct hclge_serdes_lb_cmd *)desc.data; 1309ded45d40SYufeng Mo 1310ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "mac id: %u\n", hdev->hw.mac.mac_id); 1311ded45d40SYufeng Mo 1312ded45d40SYufeng Mo hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true); 1313ded45d40SYufeng Mo ret = hclge_cmd_send(&hdev->hw, &desc, 1); 1314ded45d40SYufeng Mo if (ret) { 1315ded45d40SYufeng Mo dev_err(&hdev->pdev->dev, 1316ded45d40SYufeng Mo "failed to dump app loopback status, ret = %d\n", ret); 1317ded45d40SYufeng Mo return; 1318ded45d40SYufeng Mo } 1319ded45d40SYufeng Mo 1320ded45d40SYufeng Mo loopback_en = hnae3_get_bit(le32_to_cpu(req_app->txrx_pad_fcs_loop_en), 1321ded45d40SYufeng Mo HCLGE_MAC_APP_LP_B); 1322ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "app loopback: %s\n", 1323ded45d40SYufeng Mo loopback_en ? "on" : "off"); 1324ded45d40SYufeng Mo 1325ded45d40SYufeng Mo hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_SERDES_LOOPBACK, true); 1326ded45d40SYufeng Mo ret = hclge_cmd_send(&hdev->hw, &desc, 1); 1327ded45d40SYufeng Mo if (ret) { 1328ded45d40SYufeng Mo dev_err(&hdev->pdev->dev, 1329ded45d40SYufeng Mo "failed to dump serdes loopback status, ret = %d\n", 1330ded45d40SYufeng Mo ret); 1331ded45d40SYufeng Mo return; 1332ded45d40SYufeng Mo } 1333ded45d40SYufeng Mo 1334ded45d40SYufeng Mo loopback_en = req_serdes->enable & HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B; 1335ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "serdes serial loopback: %s\n", 1336ded45d40SYufeng Mo loopback_en ? "on" : "off"); 1337ded45d40SYufeng Mo 1338ded45d40SYufeng Mo loopback_en = req_serdes->enable & 1339ded45d40SYufeng Mo HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B; 1340ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "serdes parallel loopback: %s\n", 1341ded45d40SYufeng Mo loopback_en ? "on" : "off"); 1342ded45d40SYufeng Mo 1343ded45d40SYufeng Mo if (phydev) 1344ded45d40SYufeng Mo dev_info(&hdev->pdev->dev, "phy loopback: %s\n", 1345ded45d40SYufeng Mo phydev->loopback_enabled ? "on" : "off"); 1346ded45d40SYufeng Mo } 1347ded45d40SYufeng Mo 1348a6345787SWeihang Li /* hclge_dbg_dump_mac_tnl_status: print message about mac tnl interrupt 1349a6345787SWeihang Li * @hdev: pointer to struct hclge_dev 1350a6345787SWeihang Li */ 1351a6345787SWeihang Li static void hclge_dbg_dump_mac_tnl_status(struct hclge_dev *hdev) 1352a6345787SWeihang Li { 1353a6345787SWeihang Li #define HCLGE_BILLION_NANO_SECONDS 1000000000 1354a6345787SWeihang Li 1355a6345787SWeihang Li struct hclge_mac_tnl_stats stats; 1356a6345787SWeihang Li unsigned long rem_nsec; 1357a6345787SWeihang Li 1358a6345787SWeihang Li dev_info(&hdev->pdev->dev, "Recently generated mac tnl interruption:\n"); 1359a6345787SWeihang Li 1360a6345787SWeihang Li while (kfifo_get(&hdev->mac_tnl_log, &stats)) { 1361a6345787SWeihang Li rem_nsec = do_div(stats.time, HCLGE_BILLION_NANO_SECONDS); 1362a6345787SWeihang Li dev_info(&hdev->pdev->dev, "[%07lu.%03lu] status = 0x%x\n", 1363a6345787SWeihang Li (unsigned long)stats.time, rem_nsec / 1000, 1364a6345787SWeihang Li stats.status); 1365a6345787SWeihang Li } 1366a6345787SWeihang Li } 1367a6345787SWeihang Li 1368ee9e4424SYonglong Liu static void hclge_dbg_dump_qs_shaper_single(struct hclge_dev *hdev, u16 qsid) 1369ee9e4424SYonglong Liu { 1370ee9e4424SYonglong Liu struct hclge_qs_shapping_cmd *shap_cfg_cmd; 1371ee9e4424SYonglong Liu u8 ir_u, ir_b, ir_s, bs_b, bs_s; 1372ee9e4424SYonglong Liu struct hclge_desc desc; 1373ee9e4424SYonglong Liu u32 shapping_para; 1374ee9e4424SYonglong Liu int ret; 1375ee9e4424SYonglong Liu 1376ee9e4424SYonglong Liu hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QCN_SHAPPING_CFG, true); 1377ee9e4424SYonglong Liu 1378ee9e4424SYonglong Liu shap_cfg_cmd = (struct hclge_qs_shapping_cmd *)desc.data; 1379ee9e4424SYonglong Liu shap_cfg_cmd->qs_id = cpu_to_le16(qsid); 1380ee9e4424SYonglong Liu 1381ee9e4424SYonglong Liu ret = hclge_cmd_send(&hdev->hw, &desc, 1); 1382ee9e4424SYonglong Liu if (ret) { 1383ee9e4424SYonglong Liu dev_err(&hdev->pdev->dev, 1384ee9e4424SYonglong Liu "qs%u failed to get tx_rate, ret=%d\n", 1385ee9e4424SYonglong Liu qsid, ret); 1386ee9e4424SYonglong Liu return; 1387ee9e4424SYonglong Liu } 1388ee9e4424SYonglong Liu 1389ee9e4424SYonglong Liu shapping_para = le32_to_cpu(shap_cfg_cmd->qs_shapping_para); 1390ee9e4424SYonglong Liu ir_b = hclge_tm_get_field(shapping_para, IR_B); 1391ee9e4424SYonglong Liu ir_u = hclge_tm_get_field(shapping_para, IR_U); 1392ee9e4424SYonglong Liu ir_s = hclge_tm_get_field(shapping_para, IR_S); 1393ee9e4424SYonglong Liu bs_b = hclge_tm_get_field(shapping_para, BS_B); 1394ee9e4424SYonglong Liu bs_s = hclge_tm_get_field(shapping_para, BS_S); 1395ee9e4424SYonglong Liu 1396ee9e4424SYonglong Liu dev_info(&hdev->pdev->dev, 1397ee9e4424SYonglong Liu "qs%u ir_b:%u, ir_u:%u, ir_s:%u, bs_b:%u, bs_s:%u\n", 1398ee9e4424SYonglong Liu qsid, ir_b, ir_u, ir_s, bs_b, bs_s); 1399ee9e4424SYonglong Liu } 1400ee9e4424SYonglong Liu 1401ee9e4424SYonglong Liu static void hclge_dbg_dump_qs_shaper_all(struct hclge_dev *hdev) 1402ee9e4424SYonglong Liu { 1403ee9e4424SYonglong Liu struct hnae3_knic_private_info *kinfo; 1404ee9e4424SYonglong Liu struct hclge_vport *vport; 1405ee9e4424SYonglong Liu int vport_id, i; 1406ee9e4424SYonglong Liu 1407ee9e4424SYonglong Liu for (vport_id = 0; vport_id <= pci_num_vf(hdev->pdev); vport_id++) { 1408ee9e4424SYonglong Liu vport = &hdev->vport[vport_id]; 1409ee9e4424SYonglong Liu kinfo = &vport->nic.kinfo; 1410ee9e4424SYonglong Liu 1411ee9e4424SYonglong Liu dev_info(&hdev->pdev->dev, "qs cfg of vport%d:\n", vport_id); 1412ee9e4424SYonglong Liu 1413ee9e4424SYonglong Liu for (i = 0; i < kinfo->num_tc; i++) { 1414ee9e4424SYonglong Liu u16 qsid = vport->qs_offset + i; 1415ee9e4424SYonglong Liu 1416ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper_single(hdev, qsid); 1417ee9e4424SYonglong Liu } 1418ee9e4424SYonglong Liu } 1419ee9e4424SYonglong Liu } 1420ee9e4424SYonglong Liu 1421ee9e4424SYonglong Liu static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev, 1422ee9e4424SYonglong Liu const char *cmd_buf) 1423ee9e4424SYonglong Liu { 1424ee9e4424SYonglong Liu #define HCLGE_MAX_QSET_NUM 1024 1425ee9e4424SYonglong Liu 1426ee9e4424SYonglong Liu u16 qsid; 1427ee9e4424SYonglong Liu int ret; 1428ee9e4424SYonglong Liu 1429ee9e4424SYonglong Liu ret = kstrtou16(cmd_buf, 0, &qsid); 1430ee9e4424SYonglong Liu if (ret) { 1431ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper_all(hdev); 1432ee9e4424SYonglong Liu return; 1433ee9e4424SYonglong Liu } 1434ee9e4424SYonglong Liu 1435ee9e4424SYonglong Liu if (qsid >= HCLGE_MAX_QSET_NUM) { 1436ee9e4424SYonglong Liu dev_err(&hdev->pdev->dev, "qsid(%u) out of range[0-1023]\n", 1437ee9e4424SYonglong Liu qsid); 1438ee9e4424SYonglong Liu return; 1439ee9e4424SYonglong Liu } 1440ee9e4424SYonglong Liu 1441ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper_single(hdev, qsid); 1442ee9e4424SYonglong Liu } 1443ee9e4424SYonglong Liu 1444f671237aSJian Shen static int hclge_dbg_dump_mac_list(struct hclge_dev *hdev, const char *cmd_buf, 1445f671237aSJian Shen bool is_unicast) 1446f671237aSJian Shen { 1447f671237aSJian Shen struct hclge_mac_node *mac_node, *tmp; 1448f671237aSJian Shen struct hclge_vport *vport; 1449f671237aSJian Shen struct list_head *list; 1450f671237aSJian Shen u32 func_id; 1451f671237aSJian Shen int ret; 1452f671237aSJian Shen 1453f671237aSJian Shen ret = kstrtouint(cmd_buf, 0, &func_id); 1454f671237aSJian Shen if (ret < 0) { 1455f671237aSJian Shen dev_err(&hdev->pdev->dev, 1456f671237aSJian Shen "dump mac list: bad command string, ret = %d\n", ret); 1457f671237aSJian Shen return -EINVAL; 1458f671237aSJian Shen } 1459f671237aSJian Shen 1460f671237aSJian Shen if (func_id >= hdev->num_alloc_vport) { 1461f671237aSJian Shen dev_err(&hdev->pdev->dev, 1462f671237aSJian Shen "function id(%u) is out of range(0-%u)\n", func_id, 1463f671237aSJian Shen hdev->num_alloc_vport - 1); 1464f671237aSJian Shen return -EINVAL; 1465f671237aSJian Shen } 1466f671237aSJian Shen 1467f671237aSJian Shen vport = &hdev->vport[func_id]; 1468f671237aSJian Shen 1469f671237aSJian Shen list = is_unicast ? &vport->uc_mac_list : &vport->mc_mac_list; 1470f671237aSJian Shen 1471f671237aSJian Shen dev_info(&hdev->pdev->dev, "vport %u %s mac list:\n", 1472f671237aSJian Shen func_id, is_unicast ? "uc" : "mc"); 1473f671237aSJian Shen dev_info(&hdev->pdev->dev, "mac address state\n"); 1474f671237aSJian Shen 1475f671237aSJian Shen spin_lock_bh(&vport->mac_list_lock); 1476f671237aSJian Shen 1477f671237aSJian Shen list_for_each_entry_safe(mac_node, tmp, list, node) { 1478f671237aSJian Shen dev_info(&hdev->pdev->dev, "%pM %d\n", 1479f671237aSJian Shen mac_node->mac_addr, mac_node->state); 1480f671237aSJian Shen } 1481f671237aSJian Shen 1482f671237aSJian Shen spin_unlock_bh(&vport->mac_list_lock); 1483f671237aSJian Shen 1484f671237aSJian Shen return 0; 1485f671237aSJian Shen } 1486f671237aSJian Shen 1487ebaf1908SWeihang Li int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) 14883c666b58Sliuzhongzhu { 1489a582b78dSZhongzhu Liu #define DUMP_REG "dump reg" 14906125b52dSHuazhong Tan #define DUMP_TM_MAP "dump tm map" 1491ded45d40SYufeng Mo #define DUMP_LOOPBACK "dump loopback" 1492a582b78dSZhongzhu Liu 14933c666b58Sliuzhongzhu struct hclge_vport *vport = hclge_get_vport(handle); 14943c666b58Sliuzhongzhu struct hclge_dev *hdev = vport->back; 14953c666b58Sliuzhongzhu 14963c666b58Sliuzhongzhu if (strncmp(cmd_buf, "dump fd tcam", 12) == 0) { 14973c666b58Sliuzhongzhu hclge_dbg_fd_tcam(hdev); 14982849d4e7Sliuzhongzhu } else if (strncmp(cmd_buf, "dump tc", 7) == 0) { 14992849d4e7Sliuzhongzhu hclge_dbg_dump_tc(hdev); 15006125b52dSHuazhong Tan } else if (strncmp(cmd_buf, DUMP_TM_MAP, strlen(DUMP_TM_MAP)) == 0) { 15016125b52dSHuazhong Tan hclge_dbg_dump_tm_map(hdev, &cmd_buf[sizeof(DUMP_TM_MAP)]); 150296227f4cSliuzhongzhu } else if (strncmp(cmd_buf, "dump tm", 7) == 0) { 150396227f4cSliuzhongzhu hclge_dbg_dump_tm(hdev); 1504d958919dSliuzhongzhu } else if (strncmp(cmd_buf, "dump qos pause cfg", 18) == 0) { 1505d958919dSliuzhongzhu hclge_dbg_dump_qos_pause_cfg(hdev); 15066fc22440Sliuzhongzhu } else if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) { 15076fc22440Sliuzhongzhu hclge_dbg_dump_qos_pri_map(hdev); 15087d9d7f88Sliuzhongzhu } else if (strncmp(cmd_buf, "dump qos buf cfg", 16) == 0) { 15097d9d7f88Sliuzhongzhu hclge_dbg_dump_qos_buf_cfg(hdev); 15107737f1fbSliuzhongzhu } else if (strncmp(cmd_buf, "dump mng tbl", 12) == 0) { 15117737f1fbSliuzhongzhu hclge_dbg_dump_mng_table(hdev); 1512a582b78dSZhongzhu Liu } else if (strncmp(cmd_buf, DUMP_REG, strlen(DUMP_REG)) == 0) { 1513a582b78dSZhongzhu Liu hclge_dbg_dump_reg_cmd(hdev, &cmd_buf[sizeof(DUMP_REG)]); 1514f02eb82dSHuazhong Tan } else if (strncmp(cmd_buf, "dump reset info", 15) == 0) { 1515f02eb82dSHuazhong Tan hclge_dbg_dump_rst_info(hdev); 15161c6dfe6fSYunsheng Lin } else if (strncmp(cmd_buf, "dump serv info", 14) == 0) { 15171c6dfe6fSYunsheng Lin hclge_dbg_dump_serv_info(hdev); 151833a90e2fSZhongzhu Liu } else if (strncmp(cmd_buf, "dump m7 info", 12) == 0) { 151933a90e2fSZhongzhu Liu hclge_dbg_get_m7_stats_info(hdev); 1520ffd140e2SWeihang Li } else if (strncmp(cmd_buf, "dump ncl_config", 15) == 0) { 1521ffd140e2SWeihang Li hclge_dbg_dump_ncl_config(hdev, 1522ffd140e2SWeihang Li &cmd_buf[sizeof("dump ncl_config")]); 1523a6345787SWeihang Li } else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) { 1524a6345787SWeihang Li hclge_dbg_dump_mac_tnl_status(hdev); 1525ded45d40SYufeng Mo } else if (strncmp(cmd_buf, DUMP_LOOPBACK, 1526ded45d40SYufeng Mo strlen(DUMP_LOOPBACK)) == 0) { 1527ded45d40SYufeng Mo hclge_dbg_dump_loopback(hdev, &cmd_buf[sizeof(DUMP_LOOPBACK)]); 1528ee9e4424SYonglong Liu } else if (strncmp(cmd_buf, "dump qs shaper", 14) == 0) { 1529ee9e4424SYonglong Liu hclge_dbg_dump_qs_shaper(hdev, 1530ee9e4424SYonglong Liu &cmd_buf[sizeof("dump qs shaper")]); 1531f671237aSJian Shen } else if (strncmp(cmd_buf, "dump uc mac list", 16) == 0) { 1532f671237aSJian Shen hclge_dbg_dump_mac_list(hdev, 1533f671237aSJian Shen &cmd_buf[sizeof("dump uc mac list")], 1534f671237aSJian Shen true); 1535f671237aSJian Shen } else if (strncmp(cmd_buf, "dump mc mac list", 16) == 0) { 1536f671237aSJian Shen hclge_dbg_dump_mac_list(hdev, 1537f671237aSJian Shen &cmd_buf[sizeof("dump mc mac list")], 1538f671237aSJian Shen false); 15393c666b58Sliuzhongzhu } else { 15403c666b58Sliuzhongzhu dev_info(&hdev->pdev->dev, "unknown command\n"); 15413c666b58Sliuzhongzhu return -EINVAL; 15423c666b58Sliuzhongzhu } 15433c666b58Sliuzhongzhu 15443c666b58Sliuzhongzhu return 0; 15453c666b58Sliuzhongzhu } 1546