1 /* 2 * Copyright (c) 2016~2017 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #include <linux/dma-mapping.h> 11 #include <linux/etherdevice.h> 12 #include <linux/interrupt.h> 13 #include <linux/if_vlan.h> 14 #include <linux/ip.h> 15 #include <linux/ipv6.h> 16 #include <linux/module.h> 17 #include <linux/pci.h> 18 #include <linux/skbuff.h> 19 #include <linux/sctp.h> 20 #include <linux/vermagic.h> 21 #include <net/gre.h> 22 #include <net/pkt_cls.h> 23 #include <net/vxlan.h> 24 25 #include "hnae3.h" 26 #include "hns3_enet.h" 27 28 static void hns3_clear_all_ring(struct hnae3_handle *h); 29 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h); 30 31 static const char hns3_driver_name[] = "hns3"; 32 const char hns3_driver_version[] = VERMAGIC_STRING; 33 static const char hns3_driver_string[] = 34 "Hisilicon Ethernet Network Driver for Hip08 Family"; 35 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation."; 36 static struct hnae3_client client; 37 38 /* hns3_pci_tbl - PCI Device ID Table 39 * 40 * Last entry must be all 0s 41 * 42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 43 * Class, Class Mask, private data (not used) } 44 */ 45 static const struct pci_device_id hns3_pci_tbl[] = { 46 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0}, 47 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0}, 48 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 49 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 50 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 51 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 52 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 53 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 54 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 55 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 57 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS}, 58 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0}, 59 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0}, 60 /* required last entry */ 61 {0, } 62 }; 63 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl); 64 65 static irqreturn_t hns3_irq_handle(int irq, void *dev) 66 { 67 struct hns3_enet_tqp_vector *tqp_vector = dev; 68 69 napi_schedule(&tqp_vector->napi); 70 71 return IRQ_HANDLED; 72 } 73 74 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv) 75 { 76 struct hns3_enet_tqp_vector *tqp_vectors; 77 unsigned int i; 78 79 for (i = 0; i < priv->vector_num; i++) { 80 tqp_vectors = &priv->tqp_vector[i]; 81 82 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED) 83 continue; 84 85 /* release the irq resource */ 86 free_irq(tqp_vectors->vector_irq, tqp_vectors); 87 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED; 88 } 89 } 90 91 static int hns3_nic_init_irq(struct hns3_nic_priv *priv) 92 { 93 struct hns3_enet_tqp_vector *tqp_vectors; 94 int txrx_int_idx = 0; 95 int rx_int_idx = 0; 96 int tx_int_idx = 0; 97 unsigned int i; 98 int ret; 99 100 for (i = 0; i < priv->vector_num; i++) { 101 tqp_vectors = &priv->tqp_vector[i]; 102 103 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED) 104 continue; 105 106 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) { 107 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1, 108 "%s-%s-%d", priv->netdev->name, "TxRx", 109 txrx_int_idx++); 110 txrx_int_idx++; 111 } else if (tqp_vectors->rx_group.ring) { 112 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1, 113 "%s-%s-%d", priv->netdev->name, "Rx", 114 rx_int_idx++); 115 } else if (tqp_vectors->tx_group.ring) { 116 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1, 117 "%s-%s-%d", priv->netdev->name, "Tx", 118 tx_int_idx++); 119 } else { 120 /* Skip this unused q_vector */ 121 continue; 122 } 123 124 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0'; 125 126 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0, 127 tqp_vectors->name, 128 tqp_vectors); 129 if (ret) { 130 netdev_err(priv->netdev, "request irq(%d) fail\n", 131 tqp_vectors->vector_irq); 132 return ret; 133 } 134 135 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED; 136 } 137 138 return 0; 139 } 140 141 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector, 142 u32 mask_en) 143 { 144 writel(mask_en, tqp_vector->mask_addr); 145 } 146 147 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector) 148 { 149 napi_enable(&tqp_vector->napi); 150 151 /* enable vector */ 152 hns3_mask_vector_irq(tqp_vector, 1); 153 } 154 155 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector) 156 { 157 /* disable vector */ 158 hns3_mask_vector_irq(tqp_vector, 0); 159 160 disable_irq(tqp_vector->vector_irq); 161 napi_disable(&tqp_vector->napi); 162 } 163 164 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector, 165 u32 rl_value) 166 { 167 u32 rl_reg = hns3_rl_usec_to_reg(rl_value); 168 169 /* this defines the configuration for RL (Interrupt Rate Limiter). 170 * Rl defines rate of interrupts i.e. number of interrupts-per-second 171 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing 172 */ 173 174 if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable && 175 !tqp_vector->rx_group.coal.gl_adapt_enable) 176 /* According to the hardware, the range of rl_reg is 177 * 0-59 and the unit is 4. 178 */ 179 rl_reg |= HNS3_INT_RL_ENABLE_MASK; 180 181 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET); 182 } 183 184 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector, 185 u32 gl_value) 186 { 187 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value); 188 189 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET); 190 } 191 192 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector, 193 u32 gl_value) 194 { 195 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value); 196 197 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET); 198 } 199 200 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector, 201 struct hns3_nic_priv *priv) 202 { 203 struct hnae3_handle *h = priv->ae_handle; 204 205 /* initialize the configuration for interrupt coalescing. 206 * 1. GL (Interrupt Gap Limiter) 207 * 2. RL (Interrupt Rate Limiter) 208 */ 209 210 /* Default: enable interrupt coalescing self-adaptive and GL */ 211 tqp_vector->tx_group.coal.gl_adapt_enable = 1; 212 tqp_vector->rx_group.coal.gl_adapt_enable = 1; 213 214 tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K; 215 tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K; 216 217 /* Default: disable RL */ 218 h->kinfo.int_rl_setting = 0; 219 220 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START; 221 tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW; 222 tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW; 223 } 224 225 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector, 226 struct hns3_nic_priv *priv) 227 { 228 struct hnae3_handle *h = priv->ae_handle; 229 230 hns3_set_vector_coalesce_tx_gl(tqp_vector, 231 tqp_vector->tx_group.coal.int_gl); 232 hns3_set_vector_coalesce_rx_gl(tqp_vector, 233 tqp_vector->rx_group.coal.int_gl); 234 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting); 235 } 236 237 static int hns3_nic_set_real_num_queue(struct net_device *netdev) 238 { 239 struct hnae3_handle *h = hns3_get_handle(netdev); 240 struct hnae3_knic_private_info *kinfo = &h->kinfo; 241 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc; 242 int ret; 243 244 ret = netif_set_real_num_tx_queues(netdev, queue_size); 245 if (ret) { 246 netdev_err(netdev, 247 "netif_set_real_num_tx_queues fail, ret=%d!\n", 248 ret); 249 return ret; 250 } 251 252 ret = netif_set_real_num_rx_queues(netdev, queue_size); 253 if (ret) { 254 netdev_err(netdev, 255 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret); 256 return ret; 257 } 258 259 return 0; 260 } 261 262 static u16 hns3_get_max_available_channels(struct hnae3_handle *h) 263 { 264 u16 free_tqps, max_rss_size, max_tqps; 265 266 h->ae_algo->ops->get_tqps_and_rss_info(h, &free_tqps, &max_rss_size); 267 max_tqps = h->kinfo.num_tc * max_rss_size; 268 269 return min_t(u16, max_tqps, (free_tqps + h->kinfo.num_tqps)); 270 } 271 272 static int hns3_nic_net_up(struct net_device *netdev) 273 { 274 struct hns3_nic_priv *priv = netdev_priv(netdev); 275 struct hnae3_handle *h = priv->ae_handle; 276 int i, j; 277 int ret; 278 279 ret = hns3_nic_reset_all_ring(h); 280 if (ret) 281 return ret; 282 283 /* get irq resource for all vectors */ 284 ret = hns3_nic_init_irq(priv); 285 if (ret) { 286 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret); 287 return ret; 288 } 289 290 /* enable the vectors */ 291 for (i = 0; i < priv->vector_num; i++) 292 hns3_vector_enable(&priv->tqp_vector[i]); 293 294 /* start the ae_dev */ 295 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0; 296 if (ret) 297 goto out_start_err; 298 299 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state); 300 301 return 0; 302 303 out_start_err: 304 for (j = i - 1; j >= 0; j--) 305 hns3_vector_disable(&priv->tqp_vector[j]); 306 307 hns3_nic_uninit_irq(priv); 308 309 return ret; 310 } 311 312 static int hns3_nic_net_open(struct net_device *netdev) 313 { 314 struct hns3_nic_priv *priv = netdev_priv(netdev); 315 int ret; 316 317 netif_carrier_off(netdev); 318 319 ret = hns3_nic_set_real_num_queue(netdev); 320 if (ret) 321 return ret; 322 323 ret = hns3_nic_net_up(netdev); 324 if (ret) { 325 netdev_err(netdev, 326 "hns net up fail, ret=%d!\n", ret); 327 return ret; 328 } 329 330 priv->ae_handle->last_reset_time = jiffies; 331 return 0; 332 } 333 334 static void hns3_nic_net_down(struct net_device *netdev) 335 { 336 struct hns3_nic_priv *priv = netdev_priv(netdev); 337 const struct hnae3_ae_ops *ops; 338 int i; 339 340 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state)) 341 return; 342 343 /* disable vectors */ 344 for (i = 0; i < priv->vector_num; i++) 345 hns3_vector_disable(&priv->tqp_vector[i]); 346 347 /* stop ae_dev */ 348 ops = priv->ae_handle->ae_algo->ops; 349 if (ops->stop) 350 ops->stop(priv->ae_handle); 351 352 /* free irq resources */ 353 hns3_nic_uninit_irq(priv); 354 355 hns3_clear_all_ring(priv->ae_handle); 356 } 357 358 static int hns3_nic_net_stop(struct net_device *netdev) 359 { 360 netif_tx_stop_all_queues(netdev); 361 netif_carrier_off(netdev); 362 363 hns3_nic_net_down(netdev); 364 365 return 0; 366 } 367 368 static int hns3_nic_uc_sync(struct net_device *netdev, 369 const unsigned char *addr) 370 { 371 struct hnae3_handle *h = hns3_get_handle(netdev); 372 373 if (h->ae_algo->ops->add_uc_addr) 374 return h->ae_algo->ops->add_uc_addr(h, addr); 375 376 return 0; 377 } 378 379 static int hns3_nic_uc_unsync(struct net_device *netdev, 380 const unsigned char *addr) 381 { 382 struct hnae3_handle *h = hns3_get_handle(netdev); 383 384 if (h->ae_algo->ops->rm_uc_addr) 385 return h->ae_algo->ops->rm_uc_addr(h, addr); 386 387 return 0; 388 } 389 390 static int hns3_nic_mc_sync(struct net_device *netdev, 391 const unsigned char *addr) 392 { 393 struct hnae3_handle *h = hns3_get_handle(netdev); 394 395 if (h->ae_algo->ops->add_mc_addr) 396 return h->ae_algo->ops->add_mc_addr(h, addr); 397 398 return 0; 399 } 400 401 static int hns3_nic_mc_unsync(struct net_device *netdev, 402 const unsigned char *addr) 403 { 404 struct hnae3_handle *h = hns3_get_handle(netdev); 405 406 if (h->ae_algo->ops->rm_mc_addr) 407 return h->ae_algo->ops->rm_mc_addr(h, addr); 408 409 return 0; 410 } 411 412 static void hns3_nic_set_rx_mode(struct net_device *netdev) 413 { 414 struct hnae3_handle *h = hns3_get_handle(netdev); 415 416 if (h->ae_algo->ops->set_promisc_mode) { 417 if (netdev->flags & IFF_PROMISC) 418 h->ae_algo->ops->set_promisc_mode(h, 1); 419 else 420 h->ae_algo->ops->set_promisc_mode(h, 0); 421 } 422 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync)) 423 netdev_err(netdev, "sync uc address fail\n"); 424 if (netdev->flags & IFF_MULTICAST) 425 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync)) 426 netdev_err(netdev, "sync mc address fail\n"); 427 } 428 429 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen, 430 u16 *mss, u32 *type_cs_vlan_tso) 431 { 432 u32 l4_offset, hdr_len; 433 union l3_hdr_info l3; 434 union l4_hdr_info l4; 435 u32 l4_paylen; 436 int ret; 437 438 if (!skb_is_gso(skb)) 439 return 0; 440 441 ret = skb_cow_head(skb, 0); 442 if (ret) 443 return ret; 444 445 l3.hdr = skb_network_header(skb); 446 l4.hdr = skb_transport_header(skb); 447 448 /* Software should clear the IPv4's checksum field when tso is 449 * needed. 450 */ 451 if (l3.v4->version == 4) 452 l3.v4->check = 0; 453 454 /* tunnel packet.*/ 455 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE | 456 SKB_GSO_GRE_CSUM | 457 SKB_GSO_UDP_TUNNEL | 458 SKB_GSO_UDP_TUNNEL_CSUM)) { 459 if ((!(skb_shinfo(skb)->gso_type & 460 SKB_GSO_PARTIAL)) && 461 (skb_shinfo(skb)->gso_type & 462 SKB_GSO_UDP_TUNNEL_CSUM)) { 463 /* Software should clear the udp's checksum 464 * field when tso is needed. 465 */ 466 l4.udp->check = 0; 467 } 468 /* reset l3&l4 pointers from outer to inner headers */ 469 l3.hdr = skb_inner_network_header(skb); 470 l4.hdr = skb_inner_transport_header(skb); 471 472 /* Software should clear the IPv4's checksum field when 473 * tso is needed. 474 */ 475 if (l3.v4->version == 4) 476 l3.v4->check = 0; 477 } 478 479 /* normal or tunnel packet*/ 480 l4_offset = l4.hdr - skb->data; 481 hdr_len = (l4.tcp->doff * 4) + l4_offset; 482 483 /* remove payload length from inner pseudo checksum when tso*/ 484 l4_paylen = skb->len - l4_offset; 485 csum_replace_by_diff(&l4.tcp->check, 486 (__force __wsum)htonl(l4_paylen)); 487 488 /* find the txbd field values */ 489 *paylen = skb->len - hdr_len; 490 hnae_set_bit(*type_cs_vlan_tso, 491 HNS3_TXD_TSO_B, 1); 492 493 /* get MSS for TSO */ 494 *mss = skb_shinfo(skb)->gso_size; 495 496 return 0; 497 } 498 499 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto, 500 u8 *il4_proto) 501 { 502 union { 503 struct iphdr *v4; 504 struct ipv6hdr *v6; 505 unsigned char *hdr; 506 } l3; 507 unsigned char *l4_hdr; 508 unsigned char *exthdr; 509 u8 l4_proto_tmp; 510 __be16 frag_off; 511 512 /* find outer header point */ 513 l3.hdr = skb_network_header(skb); 514 l4_hdr = skb_transport_header(skb); 515 516 if (skb->protocol == htons(ETH_P_IPV6)) { 517 exthdr = l3.hdr + sizeof(*l3.v6); 518 l4_proto_tmp = l3.v6->nexthdr; 519 if (l4_hdr != exthdr) 520 ipv6_skip_exthdr(skb, exthdr - skb->data, 521 &l4_proto_tmp, &frag_off); 522 } else if (skb->protocol == htons(ETH_P_IP)) { 523 l4_proto_tmp = l3.v4->protocol; 524 } else { 525 return -EINVAL; 526 } 527 528 *ol4_proto = l4_proto_tmp; 529 530 /* tunnel packet */ 531 if (!skb->encapsulation) { 532 *il4_proto = 0; 533 return 0; 534 } 535 536 /* find inner header point */ 537 l3.hdr = skb_inner_network_header(skb); 538 l4_hdr = skb_inner_transport_header(skb); 539 540 if (l3.v6->version == 6) { 541 exthdr = l3.hdr + sizeof(*l3.v6); 542 l4_proto_tmp = l3.v6->nexthdr; 543 if (l4_hdr != exthdr) 544 ipv6_skip_exthdr(skb, exthdr - skb->data, 545 &l4_proto_tmp, &frag_off); 546 } else if (l3.v4->version == 4) { 547 l4_proto_tmp = l3.v4->protocol; 548 } 549 550 *il4_proto = l4_proto_tmp; 551 552 return 0; 553 } 554 555 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto, 556 u8 il4_proto, u32 *type_cs_vlan_tso, 557 u32 *ol_type_vlan_len_msec) 558 { 559 union { 560 struct iphdr *v4; 561 struct ipv6hdr *v6; 562 unsigned char *hdr; 563 } l3; 564 union { 565 struct tcphdr *tcp; 566 struct udphdr *udp; 567 struct gre_base_hdr *gre; 568 unsigned char *hdr; 569 } l4; 570 unsigned char *l2_hdr; 571 u8 l4_proto = ol4_proto; 572 u32 ol2_len; 573 u32 ol3_len; 574 u32 ol4_len; 575 u32 l2_len; 576 u32 l3_len; 577 578 l3.hdr = skb_network_header(skb); 579 l4.hdr = skb_transport_header(skb); 580 581 /* compute L2 header size for normal packet, defined in 2 Bytes */ 582 l2_len = l3.hdr - skb->data; 583 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M, 584 HNS3_TXD_L2LEN_S, l2_len >> 1); 585 586 /* tunnel packet*/ 587 if (skb->encapsulation) { 588 /* compute OL2 header size, defined in 2 Bytes */ 589 ol2_len = l2_len; 590 hnae_set_field(*ol_type_vlan_len_msec, 591 HNS3_TXD_L2LEN_M, 592 HNS3_TXD_L2LEN_S, ol2_len >> 1); 593 594 /* compute OL3 header size, defined in 4 Bytes */ 595 ol3_len = l4.hdr - l3.hdr; 596 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M, 597 HNS3_TXD_L3LEN_S, ol3_len >> 2); 598 599 /* MAC in UDP, MAC in GRE (0x6558)*/ 600 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) { 601 /* switch MAC header ptr from outer to inner header.*/ 602 l2_hdr = skb_inner_mac_header(skb); 603 604 /* compute OL4 header size, defined in 4 Bytes. */ 605 ol4_len = l2_hdr - l4.hdr; 606 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M, 607 HNS3_TXD_L4LEN_S, ol4_len >> 2); 608 609 /* switch IP header ptr from outer to inner header */ 610 l3.hdr = skb_inner_network_header(skb); 611 612 /* compute inner l2 header size, defined in 2 Bytes. */ 613 l2_len = l3.hdr - l2_hdr; 614 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M, 615 HNS3_TXD_L2LEN_S, l2_len >> 1); 616 } else { 617 /* skb packet types not supported by hardware, 618 * txbd len fild doesn't be filled. 619 */ 620 return; 621 } 622 623 /* switch L4 header pointer from outer to inner */ 624 l4.hdr = skb_inner_transport_header(skb); 625 626 l4_proto = il4_proto; 627 } 628 629 /* compute inner(/normal) L3 header size, defined in 4 Bytes */ 630 l3_len = l4.hdr - l3.hdr; 631 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M, 632 HNS3_TXD_L3LEN_S, l3_len >> 2); 633 634 /* compute inner(/normal) L4 header size, defined in 4 Bytes */ 635 switch (l4_proto) { 636 case IPPROTO_TCP: 637 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M, 638 HNS3_TXD_L4LEN_S, l4.tcp->doff); 639 break; 640 case IPPROTO_SCTP: 641 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M, 642 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2)); 643 break; 644 case IPPROTO_UDP: 645 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M, 646 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2)); 647 break; 648 default: 649 /* skb packet types not supported by hardware, 650 * txbd len fild doesn't be filled. 651 */ 652 return; 653 } 654 } 655 656 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto, 657 u8 il4_proto, u32 *type_cs_vlan_tso, 658 u32 *ol_type_vlan_len_msec) 659 { 660 union { 661 struct iphdr *v4; 662 struct ipv6hdr *v6; 663 unsigned char *hdr; 664 } l3; 665 u32 l4_proto = ol4_proto; 666 667 l3.hdr = skb_network_header(skb); 668 669 /* define OL3 type and tunnel type(OL4).*/ 670 if (skb->encapsulation) { 671 /* define outer network header type.*/ 672 if (skb->protocol == htons(ETH_P_IP)) { 673 if (skb_is_gso(skb)) 674 hnae_set_field(*ol_type_vlan_len_msec, 675 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S, 676 HNS3_OL3T_IPV4_CSUM); 677 else 678 hnae_set_field(*ol_type_vlan_len_msec, 679 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S, 680 HNS3_OL3T_IPV4_NO_CSUM); 681 682 } else if (skb->protocol == htons(ETH_P_IPV6)) { 683 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M, 684 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6); 685 } 686 687 /* define tunnel type(OL4).*/ 688 switch (l4_proto) { 689 case IPPROTO_UDP: 690 hnae_set_field(*ol_type_vlan_len_msec, 691 HNS3_TXD_TUNTYPE_M, 692 HNS3_TXD_TUNTYPE_S, 693 HNS3_TUN_MAC_IN_UDP); 694 break; 695 case IPPROTO_GRE: 696 hnae_set_field(*ol_type_vlan_len_msec, 697 HNS3_TXD_TUNTYPE_M, 698 HNS3_TXD_TUNTYPE_S, 699 HNS3_TUN_NVGRE); 700 break; 701 default: 702 /* drop the skb tunnel packet if hardware don't support, 703 * because hardware can't calculate csum when TSO. 704 */ 705 if (skb_is_gso(skb)) 706 return -EDOM; 707 708 /* the stack computes the IP header already, 709 * driver calculate l4 checksum when not TSO. 710 */ 711 skb_checksum_help(skb); 712 return 0; 713 } 714 715 l3.hdr = skb_inner_network_header(skb); 716 l4_proto = il4_proto; 717 } 718 719 if (l3.v4->version == 4) { 720 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M, 721 HNS3_TXD_L3T_S, HNS3_L3T_IPV4); 722 723 /* the stack computes the IP header already, the only time we 724 * need the hardware to recompute it is in the case of TSO. 725 */ 726 if (skb_is_gso(skb)) 727 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1); 728 729 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1); 730 } else if (l3.v6->version == 6) { 731 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M, 732 HNS3_TXD_L3T_S, HNS3_L3T_IPV6); 733 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1); 734 } 735 736 switch (l4_proto) { 737 case IPPROTO_TCP: 738 hnae_set_field(*type_cs_vlan_tso, 739 HNS3_TXD_L4T_M, 740 HNS3_TXD_L4T_S, 741 HNS3_L4T_TCP); 742 break; 743 case IPPROTO_UDP: 744 hnae_set_field(*type_cs_vlan_tso, 745 HNS3_TXD_L4T_M, 746 HNS3_TXD_L4T_S, 747 HNS3_L4T_UDP); 748 break; 749 case IPPROTO_SCTP: 750 hnae_set_field(*type_cs_vlan_tso, 751 HNS3_TXD_L4T_M, 752 HNS3_TXD_L4T_S, 753 HNS3_L4T_SCTP); 754 break; 755 default: 756 /* drop the skb tunnel packet if hardware don't support, 757 * because hardware can't calculate csum when TSO. 758 */ 759 if (skb_is_gso(skb)) 760 return -EDOM; 761 762 /* the stack computes the IP header already, 763 * driver calculate l4 checksum when not TSO. 764 */ 765 skb_checksum_help(skb); 766 return 0; 767 } 768 769 return 0; 770 } 771 772 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end) 773 { 774 /* Config bd buffer end */ 775 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M, 776 HNS3_TXD_BDTYPE_S, 0); 777 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end); 778 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1); 779 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0); 780 } 781 782 static int hns3_fill_desc_vtags(struct sk_buff *skb, 783 struct hns3_enet_ring *tx_ring, 784 u32 *inner_vlan_flag, 785 u32 *out_vlan_flag, 786 u16 *inner_vtag, 787 u16 *out_vtag) 788 { 789 #define HNS3_TX_VLAN_PRIO_SHIFT 13 790 791 if (skb->protocol == htons(ETH_P_8021Q) && 792 !(tx_ring->tqp->handle->kinfo.netdev->features & 793 NETIF_F_HW_VLAN_CTAG_TX)) { 794 /* When HW VLAN acceleration is turned off, and the stack 795 * sets the protocol to 802.1q, the driver just need to 796 * set the protocol to the encapsulated ethertype. 797 */ 798 skb->protocol = vlan_get_protocol(skb); 799 return 0; 800 } 801 802 if (skb_vlan_tag_present(skb)) { 803 u16 vlan_tag; 804 805 vlan_tag = skb_vlan_tag_get(skb); 806 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT; 807 808 /* Based on hw strategy, use out_vtag in two layer tag case, 809 * and use inner_vtag in one tag case. 810 */ 811 if (skb->protocol == htons(ETH_P_8021Q)) { 812 hnae_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1); 813 *out_vtag = vlan_tag; 814 } else { 815 hnae_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1); 816 *inner_vtag = vlan_tag; 817 } 818 } else if (skb->protocol == htons(ETH_P_8021Q)) { 819 struct vlan_ethhdr *vhdr; 820 int rc; 821 822 rc = skb_cow_head(skb, 0); 823 if (rc < 0) 824 return rc; 825 vhdr = (struct vlan_ethhdr *)skb->data; 826 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7) 827 << HNS3_TX_VLAN_PRIO_SHIFT); 828 } 829 830 skb->protocol = vlan_get_protocol(skb); 831 return 0; 832 } 833 834 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, 835 int size, dma_addr_t dma, int frag_end, 836 enum hns_desc_type type) 837 { 838 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use]; 839 struct hns3_desc *desc = &ring->desc[ring->next_to_use]; 840 u32 ol_type_vlan_len_msec = 0; 841 u16 bdtp_fe_sc_vld_ra_ri = 0; 842 u32 type_cs_vlan_tso = 0; 843 struct sk_buff *skb; 844 u16 inner_vtag = 0; 845 u16 out_vtag = 0; 846 u32 paylen = 0; 847 u16 mss = 0; 848 __be16 protocol; 849 u8 ol4_proto; 850 u8 il4_proto; 851 int ret; 852 853 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */ 854 desc_cb->priv = priv; 855 desc_cb->length = size; 856 desc_cb->dma = dma; 857 desc_cb->type = type; 858 859 /* now, fill the descriptor */ 860 desc->addr = cpu_to_le64(dma); 861 desc->tx.send_size = cpu_to_le16((u16)size); 862 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end); 863 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri); 864 865 if (type == DESC_TYPE_SKB) { 866 skb = (struct sk_buff *)priv; 867 paylen = skb->len; 868 869 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso, 870 &ol_type_vlan_len_msec, 871 &inner_vtag, &out_vtag); 872 if (unlikely(ret)) 873 return ret; 874 875 if (skb->ip_summed == CHECKSUM_PARTIAL) { 876 skb_reset_mac_len(skb); 877 protocol = skb->protocol; 878 879 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto); 880 if (ret) 881 return ret; 882 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto, 883 &type_cs_vlan_tso, 884 &ol_type_vlan_len_msec); 885 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto, 886 &type_cs_vlan_tso, 887 &ol_type_vlan_len_msec); 888 if (ret) 889 return ret; 890 891 ret = hns3_set_tso(skb, &paylen, &mss, 892 &type_cs_vlan_tso); 893 if (ret) 894 return ret; 895 } 896 897 /* Set txbd */ 898 desc->tx.ol_type_vlan_len_msec = 899 cpu_to_le32(ol_type_vlan_len_msec); 900 desc->tx.type_cs_vlan_tso_len = 901 cpu_to_le32(type_cs_vlan_tso); 902 desc->tx.paylen = cpu_to_le32(paylen); 903 desc->tx.mss = cpu_to_le16(mss); 904 desc->tx.vlan_tag = cpu_to_le16(inner_vtag); 905 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag); 906 } 907 908 /* move ring pointer to next.*/ 909 ring_ptr_move_fw(ring, next_to_use); 910 911 return 0; 912 } 913 914 static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv, 915 int size, dma_addr_t dma, int frag_end, 916 enum hns_desc_type type) 917 { 918 unsigned int frag_buf_num; 919 unsigned int k; 920 int sizeoflast; 921 int ret; 922 923 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE; 924 sizeoflast = size % HNS3_MAX_BD_SIZE; 925 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE; 926 927 /* When the frag size is bigger than hardware, split this frag */ 928 for (k = 0; k < frag_buf_num; k++) { 929 ret = hns3_fill_desc(ring, priv, 930 (k == frag_buf_num - 1) ? 931 sizeoflast : HNS3_MAX_BD_SIZE, 932 dma + HNS3_MAX_BD_SIZE * k, 933 frag_end && (k == frag_buf_num - 1) ? 1 : 0, 934 (type == DESC_TYPE_SKB && !k) ? 935 DESC_TYPE_SKB : DESC_TYPE_PAGE); 936 if (ret) 937 return ret; 938 } 939 940 return 0; 941 } 942 943 static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum, 944 struct hns3_enet_ring *ring) 945 { 946 struct sk_buff *skb = *out_skb; 947 struct skb_frag_struct *frag; 948 int bdnum_for_frag; 949 int frag_num; 950 int buf_num; 951 int size; 952 int i; 953 954 size = skb_headlen(skb); 955 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE; 956 957 frag_num = skb_shinfo(skb)->nr_frags; 958 for (i = 0; i < frag_num; i++) { 959 frag = &skb_shinfo(skb)->frags[i]; 960 size = skb_frag_size(frag); 961 bdnum_for_frag = 962 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE; 963 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG) 964 return -ENOMEM; 965 966 buf_num += bdnum_for_frag; 967 } 968 969 if (buf_num > ring_space(ring)) 970 return -EBUSY; 971 972 *bnum = buf_num; 973 return 0; 974 } 975 976 static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum, 977 struct hns3_enet_ring *ring) 978 { 979 struct sk_buff *skb = *out_skb; 980 int buf_num; 981 982 /* No. of segments (plus a header) */ 983 buf_num = skb_shinfo(skb)->nr_frags + 1; 984 985 if (buf_num > ring_space(ring)) 986 return -EBUSY; 987 988 *bnum = buf_num; 989 990 return 0; 991 } 992 993 static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig) 994 { 995 struct device *dev = ring_to_dev(ring); 996 unsigned int i; 997 998 for (i = 0; i < ring->desc_num; i++) { 999 /* check if this is where we started */ 1000 if (ring->next_to_use == next_to_use_orig) 1001 break; 1002 1003 /* unmap the descriptor dma address */ 1004 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB) 1005 dma_unmap_single(dev, 1006 ring->desc_cb[ring->next_to_use].dma, 1007 ring->desc_cb[ring->next_to_use].length, 1008 DMA_TO_DEVICE); 1009 else 1010 dma_unmap_page(dev, 1011 ring->desc_cb[ring->next_to_use].dma, 1012 ring->desc_cb[ring->next_to_use].length, 1013 DMA_TO_DEVICE); 1014 1015 /* rollback one */ 1016 ring_ptr_move_bw(ring, next_to_use); 1017 } 1018 } 1019 1020 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev) 1021 { 1022 struct hns3_nic_priv *priv = netdev_priv(netdev); 1023 struct hns3_nic_ring_data *ring_data = 1024 &tx_ring_data(priv, skb->queue_mapping); 1025 struct hns3_enet_ring *ring = ring_data->ring; 1026 struct device *dev = priv->dev; 1027 struct netdev_queue *dev_queue; 1028 struct skb_frag_struct *frag; 1029 int next_to_use_head; 1030 int next_to_use_frag; 1031 dma_addr_t dma; 1032 int buf_num; 1033 int seg_num; 1034 int size; 1035 int ret; 1036 int i; 1037 1038 /* Prefetch the data used later */ 1039 prefetch(skb->data); 1040 1041 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) { 1042 case -EBUSY: 1043 u64_stats_update_begin(&ring->syncp); 1044 ring->stats.tx_busy++; 1045 u64_stats_update_end(&ring->syncp); 1046 1047 goto out_net_tx_busy; 1048 case -ENOMEM: 1049 u64_stats_update_begin(&ring->syncp); 1050 ring->stats.sw_err_cnt++; 1051 u64_stats_update_end(&ring->syncp); 1052 netdev_err(netdev, "no memory to xmit!\n"); 1053 1054 goto out_err_tx_ok; 1055 default: 1056 break; 1057 } 1058 1059 /* No. of segments (plus a header) */ 1060 seg_num = skb_shinfo(skb)->nr_frags + 1; 1061 /* Fill the first part */ 1062 size = skb_headlen(skb); 1063 1064 next_to_use_head = ring->next_to_use; 1065 1066 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE); 1067 if (dma_mapping_error(dev, dma)) { 1068 netdev_err(netdev, "TX head DMA map failed\n"); 1069 ring->stats.sw_err_cnt++; 1070 goto out_err_tx_ok; 1071 } 1072 1073 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0, 1074 DESC_TYPE_SKB); 1075 if (ret) 1076 goto head_dma_map_err; 1077 1078 next_to_use_frag = ring->next_to_use; 1079 /* Fill the fragments */ 1080 for (i = 1; i < seg_num; i++) { 1081 frag = &skb_shinfo(skb)->frags[i - 1]; 1082 size = skb_frag_size(frag); 1083 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE); 1084 if (dma_mapping_error(dev, dma)) { 1085 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i); 1086 ring->stats.sw_err_cnt++; 1087 goto frag_dma_map_err; 1088 } 1089 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma, 1090 seg_num - 1 == i ? 1 : 0, 1091 DESC_TYPE_PAGE); 1092 1093 if (ret) 1094 goto frag_dma_map_err; 1095 } 1096 1097 /* Complete translate all packets */ 1098 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index); 1099 netdev_tx_sent_queue(dev_queue, skb->len); 1100 1101 wmb(); /* Commit all data before submit */ 1102 1103 hnae_queue_xmit(ring->tqp, buf_num); 1104 1105 return NETDEV_TX_OK; 1106 1107 frag_dma_map_err: 1108 hns_nic_dma_unmap(ring, next_to_use_frag); 1109 1110 head_dma_map_err: 1111 hns_nic_dma_unmap(ring, next_to_use_head); 1112 1113 out_err_tx_ok: 1114 dev_kfree_skb_any(skb); 1115 return NETDEV_TX_OK; 1116 1117 out_net_tx_busy: 1118 netif_stop_subqueue(netdev, ring_data->queue_index); 1119 smp_mb(); /* Commit all data before submit */ 1120 1121 return NETDEV_TX_BUSY; 1122 } 1123 1124 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p) 1125 { 1126 struct hnae3_handle *h = hns3_get_handle(netdev); 1127 struct sockaddr *mac_addr = p; 1128 int ret; 1129 1130 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data)) 1131 return -EADDRNOTAVAIL; 1132 1133 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false); 1134 if (ret) { 1135 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret); 1136 return ret; 1137 } 1138 1139 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data); 1140 1141 return 0; 1142 } 1143 1144 static int hns3_nic_set_features(struct net_device *netdev, 1145 netdev_features_t features) 1146 { 1147 netdev_features_t changed = netdev->features ^ features; 1148 struct hns3_nic_priv *priv = netdev_priv(netdev); 1149 struct hnae3_handle *h = priv->ae_handle; 1150 int ret; 1151 1152 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) { 1153 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) { 1154 priv->ops.fill_desc = hns3_fill_desc_tso; 1155 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso; 1156 } else { 1157 priv->ops.fill_desc = hns3_fill_desc; 1158 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx; 1159 } 1160 } 1161 1162 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) && 1163 h->ae_algo->ops->enable_vlan_filter) { 1164 if (features & NETIF_F_HW_VLAN_CTAG_FILTER) 1165 h->ae_algo->ops->enable_vlan_filter(h, true); 1166 else 1167 h->ae_algo->ops->enable_vlan_filter(h, false); 1168 } 1169 1170 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) && 1171 h->ae_algo->ops->enable_hw_strip_rxvtag) { 1172 if (features & NETIF_F_HW_VLAN_CTAG_RX) 1173 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true); 1174 else 1175 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false); 1176 1177 if (ret) 1178 return ret; 1179 } 1180 1181 netdev->features = features; 1182 return 0; 1183 } 1184 1185 static void hns3_nic_get_stats64(struct net_device *netdev, 1186 struct rtnl_link_stats64 *stats) 1187 { 1188 struct hns3_nic_priv *priv = netdev_priv(netdev); 1189 int queue_num = priv->ae_handle->kinfo.num_tqps; 1190 struct hnae3_handle *handle = priv->ae_handle; 1191 struct hns3_enet_ring *ring; 1192 unsigned int start; 1193 unsigned int idx; 1194 u64 tx_bytes = 0; 1195 u64 rx_bytes = 0; 1196 u64 tx_pkts = 0; 1197 u64 rx_pkts = 0; 1198 u64 tx_drop = 0; 1199 u64 rx_drop = 0; 1200 1201 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) 1202 return; 1203 1204 handle->ae_algo->ops->update_stats(handle, &netdev->stats); 1205 1206 for (idx = 0; idx < queue_num; idx++) { 1207 /* fetch the tx stats */ 1208 ring = priv->ring_data[idx].ring; 1209 do { 1210 start = u64_stats_fetch_begin_irq(&ring->syncp); 1211 tx_bytes += ring->stats.tx_bytes; 1212 tx_pkts += ring->stats.tx_pkts; 1213 tx_drop += ring->stats.tx_busy; 1214 tx_drop += ring->stats.sw_err_cnt; 1215 } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); 1216 1217 /* fetch the rx stats */ 1218 ring = priv->ring_data[idx + queue_num].ring; 1219 do { 1220 start = u64_stats_fetch_begin_irq(&ring->syncp); 1221 rx_bytes += ring->stats.rx_bytes; 1222 rx_pkts += ring->stats.rx_pkts; 1223 rx_drop += ring->stats.non_vld_descs; 1224 rx_drop += ring->stats.err_pkt_len; 1225 rx_drop += ring->stats.l2_err; 1226 } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); 1227 } 1228 1229 stats->tx_bytes = tx_bytes; 1230 stats->tx_packets = tx_pkts; 1231 stats->rx_bytes = rx_bytes; 1232 stats->rx_packets = rx_pkts; 1233 1234 stats->rx_errors = netdev->stats.rx_errors; 1235 stats->multicast = netdev->stats.multicast; 1236 stats->rx_length_errors = netdev->stats.rx_length_errors; 1237 stats->rx_crc_errors = netdev->stats.rx_crc_errors; 1238 stats->rx_missed_errors = netdev->stats.rx_missed_errors; 1239 1240 stats->tx_errors = netdev->stats.tx_errors; 1241 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped; 1242 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped; 1243 stats->collisions = netdev->stats.collisions; 1244 stats->rx_over_errors = netdev->stats.rx_over_errors; 1245 stats->rx_frame_errors = netdev->stats.rx_frame_errors; 1246 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors; 1247 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors; 1248 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors; 1249 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors; 1250 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors; 1251 stats->tx_window_errors = netdev->stats.tx_window_errors; 1252 stats->rx_compressed = netdev->stats.rx_compressed; 1253 stats->tx_compressed = netdev->stats.tx_compressed; 1254 } 1255 1256 static int hns3_setup_tc(struct net_device *netdev, void *type_data) 1257 { 1258 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data; 1259 struct hnae3_handle *h = hns3_get_handle(netdev); 1260 struct hnae3_knic_private_info *kinfo = &h->kinfo; 1261 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map; 1262 u8 tc = mqprio_qopt->qopt.num_tc; 1263 u16 mode = mqprio_qopt->mode; 1264 u8 hw = mqprio_qopt->qopt.hw; 1265 bool if_running; 1266 unsigned int i; 1267 int ret; 1268 1269 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS && 1270 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0))) 1271 return -EOPNOTSUPP; 1272 1273 if (tc > HNAE3_MAX_TC) 1274 return -EINVAL; 1275 1276 if (!netdev) 1277 return -EINVAL; 1278 1279 if_running = netif_running(netdev); 1280 if (if_running) { 1281 hns3_nic_net_stop(netdev); 1282 msleep(100); 1283 } 1284 1285 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ? 1286 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP; 1287 if (ret) 1288 goto out; 1289 1290 if (tc <= 1) { 1291 netdev_reset_tc(netdev); 1292 } else { 1293 ret = netdev_set_num_tc(netdev, tc); 1294 if (ret) 1295 goto out; 1296 1297 for (i = 0; i < HNAE3_MAX_TC; i++) { 1298 if (!kinfo->tc_info[i].enable) 1299 continue; 1300 1301 netdev_set_tc_queue(netdev, 1302 kinfo->tc_info[i].tc, 1303 kinfo->tc_info[i].tqp_count, 1304 kinfo->tc_info[i].tqp_offset); 1305 } 1306 } 1307 1308 ret = hns3_nic_set_real_num_queue(netdev); 1309 1310 out: 1311 if (if_running) 1312 hns3_nic_net_open(netdev); 1313 1314 return ret; 1315 } 1316 1317 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type, 1318 void *type_data) 1319 { 1320 if (type != TC_SETUP_QDISC_MQPRIO) 1321 return -EOPNOTSUPP; 1322 1323 return hns3_setup_tc(dev, type_data); 1324 } 1325 1326 static int hns3_vlan_rx_add_vid(struct net_device *netdev, 1327 __be16 proto, u16 vid) 1328 { 1329 struct hnae3_handle *h = hns3_get_handle(netdev); 1330 struct hns3_nic_priv *priv = netdev_priv(netdev); 1331 int ret = -EIO; 1332 1333 if (h->ae_algo->ops->set_vlan_filter) 1334 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false); 1335 1336 if (!ret) 1337 set_bit(vid, priv->active_vlans); 1338 1339 return ret; 1340 } 1341 1342 static int hns3_vlan_rx_kill_vid(struct net_device *netdev, 1343 __be16 proto, u16 vid) 1344 { 1345 struct hnae3_handle *h = hns3_get_handle(netdev); 1346 struct hns3_nic_priv *priv = netdev_priv(netdev); 1347 int ret = -EIO; 1348 1349 if (h->ae_algo->ops->set_vlan_filter) 1350 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true); 1351 1352 if (!ret) 1353 clear_bit(vid, priv->active_vlans); 1354 1355 return ret; 1356 } 1357 1358 static void hns3_restore_vlan(struct net_device *netdev) 1359 { 1360 struct hns3_nic_priv *priv = netdev_priv(netdev); 1361 u16 vid; 1362 int ret; 1363 1364 for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) { 1365 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid); 1366 if (ret) 1367 netdev_warn(netdev, "Restore vlan: %d filter, ret:%d\n", 1368 vid, ret); 1369 } 1370 } 1371 1372 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, 1373 u8 qos, __be16 vlan_proto) 1374 { 1375 struct hnae3_handle *h = hns3_get_handle(netdev); 1376 int ret = -EIO; 1377 1378 if (h->ae_algo->ops->set_vf_vlan_filter) 1379 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan, 1380 qos, vlan_proto); 1381 1382 return ret; 1383 } 1384 1385 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu) 1386 { 1387 struct hnae3_handle *h = hns3_get_handle(netdev); 1388 bool if_running = netif_running(netdev); 1389 int ret; 1390 1391 if (!h->ae_algo->ops->set_mtu) 1392 return -EOPNOTSUPP; 1393 1394 /* if this was called with netdev up then bring netdevice down */ 1395 if (if_running) { 1396 (void)hns3_nic_net_stop(netdev); 1397 msleep(100); 1398 } 1399 1400 ret = h->ae_algo->ops->set_mtu(h, new_mtu); 1401 if (ret) { 1402 netdev_err(netdev, "failed to change MTU in hardware %d\n", 1403 ret); 1404 return ret; 1405 } 1406 1407 netdev->mtu = new_mtu; 1408 1409 /* if the netdev was running earlier, bring it up again */ 1410 if (if_running && hns3_nic_net_open(netdev)) 1411 ret = -EINVAL; 1412 1413 return ret; 1414 } 1415 1416 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev) 1417 { 1418 struct hns3_nic_priv *priv = netdev_priv(ndev); 1419 struct hns3_enet_ring *tx_ring = NULL; 1420 int timeout_queue = 0; 1421 int hw_head, hw_tail; 1422 int i; 1423 1424 /* Find the stopped queue the same way the stack does */ 1425 for (i = 0; i < ndev->real_num_tx_queues; i++) { 1426 struct netdev_queue *q; 1427 unsigned long trans_start; 1428 1429 q = netdev_get_tx_queue(ndev, i); 1430 trans_start = q->trans_start; 1431 if (netif_xmit_stopped(q) && 1432 time_after(jiffies, 1433 (trans_start + ndev->watchdog_timeo))) { 1434 timeout_queue = i; 1435 break; 1436 } 1437 } 1438 1439 if (i == ndev->num_tx_queues) { 1440 netdev_info(ndev, 1441 "no netdev TX timeout queue found, timeout count: %llu\n", 1442 priv->tx_timeout_count); 1443 return false; 1444 } 1445 1446 tx_ring = priv->ring_data[timeout_queue].ring; 1447 1448 hw_head = readl_relaxed(tx_ring->tqp->io_base + 1449 HNS3_RING_TX_RING_HEAD_REG); 1450 hw_tail = readl_relaxed(tx_ring->tqp->io_base + 1451 HNS3_RING_TX_RING_TAIL_REG); 1452 netdev_info(ndev, 1453 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n", 1454 priv->tx_timeout_count, 1455 timeout_queue, 1456 tx_ring->next_to_use, 1457 tx_ring->next_to_clean, 1458 hw_head, 1459 hw_tail, 1460 readl(tx_ring->tqp_vector->mask_addr)); 1461 1462 return true; 1463 } 1464 1465 static void hns3_nic_net_timeout(struct net_device *ndev) 1466 { 1467 struct hns3_nic_priv *priv = netdev_priv(ndev); 1468 struct hnae3_handle *h = priv->ae_handle; 1469 1470 if (!hns3_get_tx_timeo_queue_info(ndev)) 1471 return; 1472 1473 priv->tx_timeout_count++; 1474 1475 if (time_before(jiffies, (h->last_reset_time + ndev->watchdog_timeo))) 1476 return; 1477 1478 /* request the reset */ 1479 if (h->ae_algo->ops->reset_event) 1480 h->ae_algo->ops->reset_event(h); 1481 } 1482 1483 static const struct net_device_ops hns3_nic_netdev_ops = { 1484 .ndo_open = hns3_nic_net_open, 1485 .ndo_stop = hns3_nic_net_stop, 1486 .ndo_start_xmit = hns3_nic_net_xmit, 1487 .ndo_tx_timeout = hns3_nic_net_timeout, 1488 .ndo_set_mac_address = hns3_nic_net_set_mac_address, 1489 .ndo_change_mtu = hns3_nic_change_mtu, 1490 .ndo_set_features = hns3_nic_set_features, 1491 .ndo_get_stats64 = hns3_nic_get_stats64, 1492 .ndo_setup_tc = hns3_nic_setup_tc, 1493 .ndo_set_rx_mode = hns3_nic_set_rx_mode, 1494 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid, 1495 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid, 1496 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan, 1497 }; 1498 1499 static bool hns3_is_phys_func(struct pci_dev *pdev) 1500 { 1501 u32 dev_id = pdev->device; 1502 1503 switch (dev_id) { 1504 case HNAE3_DEV_ID_GE: 1505 case HNAE3_DEV_ID_25GE: 1506 case HNAE3_DEV_ID_25GE_RDMA: 1507 case HNAE3_DEV_ID_25GE_RDMA_MACSEC: 1508 case HNAE3_DEV_ID_50GE_RDMA: 1509 case HNAE3_DEV_ID_50GE_RDMA_MACSEC: 1510 case HNAE3_DEV_ID_100G_RDMA_MACSEC: 1511 return true; 1512 case HNAE3_DEV_ID_100G_VF: 1513 case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF: 1514 return false; 1515 default: 1516 dev_warn(&pdev->dev, "un-recognized pci device-id %d", 1517 dev_id); 1518 } 1519 1520 return false; 1521 } 1522 1523 static void hns3_disable_sriov(struct pci_dev *pdev) 1524 { 1525 /* If our VFs are assigned we cannot shut down SR-IOV 1526 * without causing issues, so just leave the hardware 1527 * available but disabled 1528 */ 1529 if (pci_vfs_assigned(pdev)) { 1530 dev_warn(&pdev->dev, 1531 "disabling driver while VFs are assigned\n"); 1532 return; 1533 } 1534 1535 pci_disable_sriov(pdev); 1536 } 1537 1538 /* hns3_probe - Device initialization routine 1539 * @pdev: PCI device information struct 1540 * @ent: entry in hns3_pci_tbl 1541 * 1542 * hns3_probe initializes a PF identified by a pci_dev structure. 1543 * The OS initialization, configuring of the PF private structure, 1544 * and a hardware reset occur. 1545 * 1546 * Returns 0 on success, negative on failure 1547 */ 1548 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1549 { 1550 struct hnae3_ae_dev *ae_dev; 1551 int ret; 1552 1553 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), 1554 GFP_KERNEL); 1555 if (!ae_dev) { 1556 ret = -ENOMEM; 1557 return ret; 1558 } 1559 1560 ae_dev->pdev = pdev; 1561 ae_dev->flag = ent->driver_data; 1562 ae_dev->dev_type = HNAE3_DEV_KNIC; 1563 pci_set_drvdata(pdev, ae_dev); 1564 1565 hnae3_register_ae_dev(ae_dev); 1566 1567 return 0; 1568 } 1569 1570 /* hns3_remove - Device removal routine 1571 * @pdev: PCI device information struct 1572 */ 1573 static void hns3_remove(struct pci_dev *pdev) 1574 { 1575 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); 1576 1577 if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV)) 1578 hns3_disable_sriov(pdev); 1579 1580 hnae3_unregister_ae_dev(ae_dev); 1581 } 1582 1583 /** 1584 * hns3_pci_sriov_configure 1585 * @pdev: pointer to a pci_dev structure 1586 * @num_vfs: number of VFs to allocate 1587 * 1588 * Enable or change the number of VFs. Called when the user updates the number 1589 * of VFs in sysfs. 1590 **/ 1591 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs) 1592 { 1593 int ret; 1594 1595 if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) { 1596 dev_warn(&pdev->dev, "Can not config SRIOV\n"); 1597 return -EINVAL; 1598 } 1599 1600 if (num_vfs) { 1601 ret = pci_enable_sriov(pdev, num_vfs); 1602 if (ret) 1603 dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret); 1604 else 1605 return num_vfs; 1606 } else if (!pci_vfs_assigned(pdev)) { 1607 pci_disable_sriov(pdev); 1608 } else { 1609 dev_warn(&pdev->dev, 1610 "Unable to free VFs because some are assigned to VMs.\n"); 1611 } 1612 1613 return 0; 1614 } 1615 1616 static struct pci_driver hns3_driver = { 1617 .name = hns3_driver_name, 1618 .id_table = hns3_pci_tbl, 1619 .probe = hns3_probe, 1620 .remove = hns3_remove, 1621 .sriov_configure = hns3_pci_sriov_configure, 1622 }; 1623 1624 /* set default feature to hns3 */ 1625 static void hns3_set_default_feature(struct net_device *netdev) 1626 { 1627 netdev->priv_flags |= IFF_UNICAST_FLT; 1628 1629 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1630 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO | 1631 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE | 1632 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL | 1633 NETIF_F_GSO_UDP_TUNNEL_CSUM; 1634 1635 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID; 1636 1637 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; 1638 1639 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1640 NETIF_F_HW_VLAN_CTAG_FILTER | 1641 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 1642 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO | 1643 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE | 1644 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL | 1645 NETIF_F_GSO_UDP_TUNNEL_CSUM; 1646 1647 netdev->vlan_features |= 1648 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | 1649 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO | 1650 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE | 1651 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL | 1652 NETIF_F_GSO_UDP_TUNNEL_CSUM; 1653 1654 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1655 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 1656 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO | 1657 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE | 1658 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL | 1659 NETIF_F_GSO_UDP_TUNNEL_CSUM; 1660 } 1661 1662 static int hns3_alloc_buffer(struct hns3_enet_ring *ring, 1663 struct hns3_desc_cb *cb) 1664 { 1665 unsigned int order = hnae_page_order(ring); 1666 struct page *p; 1667 1668 p = dev_alloc_pages(order); 1669 if (!p) 1670 return -ENOMEM; 1671 1672 cb->priv = p; 1673 cb->page_offset = 0; 1674 cb->reuse_flag = 0; 1675 cb->buf = page_address(p); 1676 cb->length = hnae_page_size(ring); 1677 cb->type = DESC_TYPE_PAGE; 1678 1679 return 0; 1680 } 1681 1682 static void hns3_free_buffer(struct hns3_enet_ring *ring, 1683 struct hns3_desc_cb *cb) 1684 { 1685 if (cb->type == DESC_TYPE_SKB) 1686 dev_kfree_skb_any((struct sk_buff *)cb->priv); 1687 else if (!HNAE3_IS_TX_RING(ring)) 1688 put_page((struct page *)cb->priv); 1689 memset(cb, 0, sizeof(*cb)); 1690 } 1691 1692 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb) 1693 { 1694 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0, 1695 cb->length, ring_to_dma_dir(ring)); 1696 1697 if (dma_mapping_error(ring_to_dev(ring), cb->dma)) 1698 return -EIO; 1699 1700 return 0; 1701 } 1702 1703 static void hns3_unmap_buffer(struct hns3_enet_ring *ring, 1704 struct hns3_desc_cb *cb) 1705 { 1706 if (cb->type == DESC_TYPE_SKB) 1707 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length, 1708 ring_to_dma_dir(ring)); 1709 else 1710 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length, 1711 ring_to_dma_dir(ring)); 1712 } 1713 1714 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i) 1715 { 1716 hns3_unmap_buffer(ring, &ring->desc_cb[i]); 1717 ring->desc[i].addr = 0; 1718 } 1719 1720 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i) 1721 { 1722 struct hns3_desc_cb *cb = &ring->desc_cb[i]; 1723 1724 if (!ring->desc_cb[i].dma) 1725 return; 1726 1727 hns3_buffer_detach(ring, i); 1728 hns3_free_buffer(ring, cb); 1729 } 1730 1731 static void hns3_free_buffers(struct hns3_enet_ring *ring) 1732 { 1733 int i; 1734 1735 for (i = 0; i < ring->desc_num; i++) 1736 hns3_free_buffer_detach(ring, i); 1737 } 1738 1739 /* free desc along with its attached buffer */ 1740 static void hns3_free_desc(struct hns3_enet_ring *ring) 1741 { 1742 hns3_free_buffers(ring); 1743 1744 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr, 1745 ring->desc_num * sizeof(ring->desc[0]), 1746 DMA_BIDIRECTIONAL); 1747 ring->desc_dma_addr = 0; 1748 kfree(ring->desc); 1749 ring->desc = NULL; 1750 } 1751 1752 static int hns3_alloc_desc(struct hns3_enet_ring *ring) 1753 { 1754 int size = ring->desc_num * sizeof(ring->desc[0]); 1755 1756 ring->desc = kzalloc(size, GFP_KERNEL); 1757 if (!ring->desc) 1758 return -ENOMEM; 1759 1760 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc, 1761 size, DMA_BIDIRECTIONAL); 1762 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) { 1763 ring->desc_dma_addr = 0; 1764 kfree(ring->desc); 1765 ring->desc = NULL; 1766 return -ENOMEM; 1767 } 1768 1769 return 0; 1770 } 1771 1772 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring, 1773 struct hns3_desc_cb *cb) 1774 { 1775 int ret; 1776 1777 ret = hns3_alloc_buffer(ring, cb); 1778 if (ret) 1779 goto out; 1780 1781 ret = hns3_map_buffer(ring, cb); 1782 if (ret) 1783 goto out_with_buf; 1784 1785 return 0; 1786 1787 out_with_buf: 1788 hns3_free_buffer(ring, cb); 1789 out: 1790 return ret; 1791 } 1792 1793 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i) 1794 { 1795 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]); 1796 1797 if (ret) 1798 return ret; 1799 1800 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma); 1801 1802 return 0; 1803 } 1804 1805 /* Allocate memory for raw pkg, and map with dma */ 1806 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring) 1807 { 1808 int i, j, ret; 1809 1810 for (i = 0; i < ring->desc_num; i++) { 1811 ret = hns3_alloc_buffer_attach(ring, i); 1812 if (ret) 1813 goto out_buffer_fail; 1814 } 1815 1816 return 0; 1817 1818 out_buffer_fail: 1819 for (j = i - 1; j >= 0; j--) 1820 hns3_free_buffer_detach(ring, j); 1821 return ret; 1822 } 1823 1824 /* detach a in-used buffer and replace with a reserved one */ 1825 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i, 1826 struct hns3_desc_cb *res_cb) 1827 { 1828 hns3_unmap_buffer(ring, &ring->desc_cb[i]); 1829 ring->desc_cb[i] = *res_cb; 1830 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma); 1831 ring->desc[i].rx.bd_base_info = 0; 1832 } 1833 1834 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i) 1835 { 1836 ring->desc_cb[i].reuse_flag = 0; 1837 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma 1838 + ring->desc_cb[i].page_offset); 1839 ring->desc[i].rx.bd_base_info = 0; 1840 } 1841 1842 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes, 1843 int *pkts) 1844 { 1845 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean]; 1846 1847 (*pkts) += (desc_cb->type == DESC_TYPE_SKB); 1848 (*bytes) += desc_cb->length; 1849 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/ 1850 hns3_free_buffer_detach(ring, ring->next_to_clean); 1851 1852 ring_ptr_move_fw(ring, next_to_clean); 1853 } 1854 1855 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h) 1856 { 1857 int u = ring->next_to_use; 1858 int c = ring->next_to_clean; 1859 1860 if (unlikely(h > ring->desc_num)) 1861 return 0; 1862 1863 return u > c ? (h > c && h <= u) : (h > c || h <= u); 1864 } 1865 1866 bool hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget) 1867 { 1868 struct net_device *netdev = ring->tqp->handle->kinfo.netdev; 1869 struct netdev_queue *dev_queue; 1870 int bytes, pkts; 1871 int head; 1872 1873 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG); 1874 rmb(); /* Make sure head is ready before touch any data */ 1875 1876 if (is_ring_empty(ring) || head == ring->next_to_clean) 1877 return true; /* no data to poll */ 1878 1879 if (!is_valid_clean_head(ring, head)) { 1880 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head, 1881 ring->next_to_use, ring->next_to_clean); 1882 1883 u64_stats_update_begin(&ring->syncp); 1884 ring->stats.io_err_cnt++; 1885 u64_stats_update_end(&ring->syncp); 1886 return true; 1887 } 1888 1889 bytes = 0; 1890 pkts = 0; 1891 while (head != ring->next_to_clean && budget) { 1892 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts); 1893 /* Issue prefetch for next Tx descriptor */ 1894 prefetch(&ring->desc_cb[ring->next_to_clean]); 1895 budget--; 1896 } 1897 1898 ring->tqp_vector->tx_group.total_bytes += bytes; 1899 ring->tqp_vector->tx_group.total_packets += pkts; 1900 1901 u64_stats_update_begin(&ring->syncp); 1902 ring->stats.tx_bytes += bytes; 1903 ring->stats.tx_pkts += pkts; 1904 u64_stats_update_end(&ring->syncp); 1905 1906 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index); 1907 netdev_tx_completed_queue(dev_queue, pkts, bytes); 1908 1909 if (unlikely(pkts && netif_carrier_ok(netdev) && 1910 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) { 1911 /* Make sure that anybody stopping the queue after this 1912 * sees the new next_to_clean. 1913 */ 1914 smp_mb(); 1915 if (netif_tx_queue_stopped(dev_queue)) { 1916 netif_tx_wake_queue(dev_queue); 1917 ring->stats.restart_queue++; 1918 } 1919 } 1920 1921 return !!budget; 1922 } 1923 1924 static int hns3_desc_unused(struct hns3_enet_ring *ring) 1925 { 1926 int ntc = ring->next_to_clean; 1927 int ntu = ring->next_to_use; 1928 1929 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu; 1930 } 1931 1932 static void 1933 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count) 1934 { 1935 struct hns3_desc_cb *desc_cb; 1936 struct hns3_desc_cb res_cbs; 1937 int i, ret; 1938 1939 for (i = 0; i < cleand_count; i++) { 1940 desc_cb = &ring->desc_cb[ring->next_to_use]; 1941 if (desc_cb->reuse_flag) { 1942 u64_stats_update_begin(&ring->syncp); 1943 ring->stats.reuse_pg_cnt++; 1944 u64_stats_update_end(&ring->syncp); 1945 1946 hns3_reuse_buffer(ring, ring->next_to_use); 1947 } else { 1948 ret = hns3_reserve_buffer_map(ring, &res_cbs); 1949 if (ret) { 1950 u64_stats_update_begin(&ring->syncp); 1951 ring->stats.sw_err_cnt++; 1952 u64_stats_update_end(&ring->syncp); 1953 1954 netdev_err(ring->tqp->handle->kinfo.netdev, 1955 "hnae reserve buffer map failed.\n"); 1956 break; 1957 } 1958 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs); 1959 } 1960 1961 ring_ptr_move_fw(ring, next_to_use); 1962 } 1963 1964 wmb(); /* Make all data has been write before submit */ 1965 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG); 1966 } 1967 1968 static void hns3_nic_reuse_page(struct sk_buff *skb, int i, 1969 struct hns3_enet_ring *ring, int pull_len, 1970 struct hns3_desc_cb *desc_cb) 1971 { 1972 struct hns3_desc *desc; 1973 int truesize, size; 1974 int last_offset; 1975 bool twobufs; 1976 1977 twobufs = ((PAGE_SIZE < 8192) && 1978 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048); 1979 1980 desc = &ring->desc[ring->next_to_clean]; 1981 size = le16_to_cpu(desc->rx.size); 1982 1983 truesize = hnae_buf_size(ring); 1984 1985 if (!twobufs) 1986 last_offset = hnae_page_size(ring) - hnae_buf_size(ring); 1987 1988 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len, 1989 size - pull_len, truesize); 1990 1991 /* Avoid re-using remote pages,flag default unreuse */ 1992 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id())) 1993 return; 1994 1995 if (twobufs) { 1996 /* If we are only owner of page we can reuse it */ 1997 if (likely(page_count(desc_cb->priv) == 1)) { 1998 /* Flip page offset to other buffer */ 1999 desc_cb->page_offset ^= truesize; 2000 2001 desc_cb->reuse_flag = 1; 2002 /* bump ref count on page before it is given*/ 2003 get_page(desc_cb->priv); 2004 } 2005 return; 2006 } 2007 2008 /* Move offset up to the next cache line */ 2009 desc_cb->page_offset += truesize; 2010 2011 if (desc_cb->page_offset <= last_offset) { 2012 desc_cb->reuse_flag = 1; 2013 /* Bump ref count on page before it is given*/ 2014 get_page(desc_cb->priv); 2015 } 2016 } 2017 2018 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb, 2019 struct hns3_desc *desc) 2020 { 2021 struct net_device *netdev = ring->tqp->handle->kinfo.netdev; 2022 int l3_type, l4_type; 2023 u32 bd_base_info; 2024 int ol4_type; 2025 u32 l234info; 2026 2027 bd_base_info = le32_to_cpu(desc->rx.bd_base_info); 2028 l234info = le32_to_cpu(desc->rx.l234_info); 2029 2030 skb->ip_summed = CHECKSUM_NONE; 2031 2032 skb_checksum_none_assert(skb); 2033 2034 if (!(netdev->features & NETIF_F_RXCSUM)) 2035 return; 2036 2037 /* check if hardware has done checksum */ 2038 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B)) 2039 return; 2040 2041 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) || 2042 hnae_get_bit(l234info, HNS3_RXD_L4E_B) || 2043 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) || 2044 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) { 2045 netdev_err(netdev, "L3/L4 error pkt\n"); 2046 u64_stats_update_begin(&ring->syncp); 2047 ring->stats.l3l4_csum_err++; 2048 u64_stats_update_end(&ring->syncp); 2049 2050 return; 2051 } 2052 2053 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M, 2054 HNS3_RXD_L3ID_S); 2055 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M, 2056 HNS3_RXD_L4ID_S); 2057 2058 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S); 2059 switch (ol4_type) { 2060 case HNS3_OL4_TYPE_MAC_IN_UDP: 2061 case HNS3_OL4_TYPE_NVGRE: 2062 skb->csum_level = 1; 2063 case HNS3_OL4_TYPE_NO_TUN: 2064 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */ 2065 if (l3_type == HNS3_L3_TYPE_IPV4 || 2066 (l3_type == HNS3_L3_TYPE_IPV6 && 2067 (l4_type == HNS3_L4_TYPE_UDP || 2068 l4_type == HNS3_L4_TYPE_TCP || 2069 l4_type == HNS3_L4_TYPE_SCTP))) 2070 skb->ip_summed = CHECKSUM_UNNECESSARY; 2071 break; 2072 } 2073 } 2074 2075 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb) 2076 { 2077 napi_gro_receive(&ring->tqp_vector->napi, skb); 2078 } 2079 2080 static u16 hns3_parse_vlan_tag(struct hns3_enet_ring *ring, 2081 struct hns3_desc *desc, u32 l234info) 2082 { 2083 struct pci_dev *pdev = ring->tqp->handle->pdev; 2084 u16 vlan_tag; 2085 2086 if (pdev->revision == 0x20) { 2087 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag); 2088 if (!(vlan_tag & VLAN_VID_MASK)) 2089 vlan_tag = le16_to_cpu(desc->rx.vlan_tag); 2090 2091 return vlan_tag; 2092 } 2093 2094 #define HNS3_STRP_OUTER_VLAN 0x1 2095 #define HNS3_STRP_INNER_VLAN 0x2 2096 2097 switch (hnae_get_field(l234info, HNS3_RXD_STRP_TAGP_M, 2098 HNS3_RXD_STRP_TAGP_S)) { 2099 case HNS3_STRP_OUTER_VLAN: 2100 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag); 2101 break; 2102 case HNS3_STRP_INNER_VLAN: 2103 vlan_tag = le16_to_cpu(desc->rx.vlan_tag); 2104 break; 2105 default: 2106 vlan_tag = 0; 2107 break; 2108 } 2109 2110 return vlan_tag; 2111 } 2112 2113 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring, 2114 struct sk_buff **out_skb, int *out_bnum) 2115 { 2116 struct net_device *netdev = ring->tqp->handle->kinfo.netdev; 2117 struct hns3_desc_cb *desc_cb; 2118 struct hns3_desc *desc; 2119 struct sk_buff *skb; 2120 unsigned char *va; 2121 u32 bd_base_info; 2122 int pull_len; 2123 u32 l234info; 2124 int length; 2125 int bnum; 2126 2127 desc = &ring->desc[ring->next_to_clean]; 2128 desc_cb = &ring->desc_cb[ring->next_to_clean]; 2129 2130 prefetch(desc); 2131 2132 length = le16_to_cpu(desc->rx.size); 2133 bd_base_info = le32_to_cpu(desc->rx.bd_base_info); 2134 2135 /* Check valid BD */ 2136 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B)) 2137 return -EFAULT; 2138 2139 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset; 2140 2141 /* Prefetch first cache line of first page 2142 * Idea is to cache few bytes of the header of the packet. Our L1 Cache 2143 * line size is 64B so need to prefetch twice to make it 128B. But in 2144 * actual we can have greater size of caches with 128B Level 1 cache 2145 * lines. In such a case, single fetch would suffice to cache in the 2146 * relevant part of the header. 2147 */ 2148 prefetch(va); 2149 #if L1_CACHE_BYTES < 128 2150 prefetch(va + L1_CACHE_BYTES); 2151 #endif 2152 2153 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi, 2154 HNS3_RX_HEAD_SIZE); 2155 if (unlikely(!skb)) { 2156 netdev_err(netdev, "alloc rx skb fail\n"); 2157 2158 u64_stats_update_begin(&ring->syncp); 2159 ring->stats.sw_err_cnt++; 2160 u64_stats_update_end(&ring->syncp); 2161 2162 return -ENOMEM; 2163 } 2164 2165 prefetchw(skb->data); 2166 2167 bnum = 1; 2168 if (length <= HNS3_RX_HEAD_SIZE) { 2169 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long))); 2170 2171 /* We can reuse buffer as-is, just make sure it is local */ 2172 if (likely(page_to_nid(desc_cb->priv) == numa_node_id())) 2173 desc_cb->reuse_flag = 1; 2174 else /* This page cannot be reused so discard it */ 2175 put_page(desc_cb->priv); 2176 2177 ring_ptr_move_fw(ring, next_to_clean); 2178 } else { 2179 u64_stats_update_begin(&ring->syncp); 2180 ring->stats.seg_pkt_cnt++; 2181 u64_stats_update_end(&ring->syncp); 2182 2183 pull_len = eth_get_headlen(va, HNS3_RX_HEAD_SIZE); 2184 2185 memcpy(__skb_put(skb, pull_len), va, 2186 ALIGN(pull_len, sizeof(long))); 2187 2188 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb); 2189 ring_ptr_move_fw(ring, next_to_clean); 2190 2191 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) { 2192 desc = &ring->desc[ring->next_to_clean]; 2193 desc_cb = &ring->desc_cb[ring->next_to_clean]; 2194 bd_base_info = le32_to_cpu(desc->rx.bd_base_info); 2195 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb); 2196 ring_ptr_move_fw(ring, next_to_clean); 2197 bnum++; 2198 } 2199 } 2200 2201 *out_bnum = bnum; 2202 2203 l234info = le32_to_cpu(desc->rx.l234_info); 2204 2205 /* Based on hw strategy, the tag offloaded will be stored at 2206 * ot_vlan_tag in two layer tag case, and stored at vlan_tag 2207 * in one layer tag case. 2208 */ 2209 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) { 2210 u16 vlan_tag; 2211 2212 vlan_tag = hns3_parse_vlan_tag(ring, desc, l234info); 2213 if (vlan_tag & VLAN_VID_MASK) 2214 __vlan_hwaccel_put_tag(skb, 2215 htons(ETH_P_8021Q), 2216 vlan_tag); 2217 } 2218 2219 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) { 2220 netdev_err(netdev, "no valid bd,%016llx,%016llx\n", 2221 ((u64 *)desc)[0], ((u64 *)desc)[1]); 2222 u64_stats_update_begin(&ring->syncp); 2223 ring->stats.non_vld_descs++; 2224 u64_stats_update_end(&ring->syncp); 2225 2226 dev_kfree_skb_any(skb); 2227 return -EINVAL; 2228 } 2229 2230 if (unlikely((!desc->rx.pkt_len) || 2231 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) { 2232 netdev_err(netdev, "truncated pkt\n"); 2233 u64_stats_update_begin(&ring->syncp); 2234 ring->stats.err_pkt_len++; 2235 u64_stats_update_end(&ring->syncp); 2236 2237 dev_kfree_skb_any(skb); 2238 return -EFAULT; 2239 } 2240 2241 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) { 2242 netdev_err(netdev, "L2 error pkt\n"); 2243 u64_stats_update_begin(&ring->syncp); 2244 ring->stats.l2_err++; 2245 u64_stats_update_end(&ring->syncp); 2246 2247 dev_kfree_skb_any(skb); 2248 return -EFAULT; 2249 } 2250 2251 u64_stats_update_begin(&ring->syncp); 2252 ring->stats.rx_pkts++; 2253 ring->stats.rx_bytes += skb->len; 2254 u64_stats_update_end(&ring->syncp); 2255 2256 ring->tqp_vector->rx_group.total_bytes += skb->len; 2257 2258 hns3_rx_checksum(ring, skb, desc); 2259 return 0; 2260 } 2261 2262 int hns3_clean_rx_ring( 2263 struct hns3_enet_ring *ring, int budget, 2264 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *)) 2265 { 2266 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16 2267 struct net_device *netdev = ring->tqp->handle->kinfo.netdev; 2268 int recv_pkts, recv_bds, clean_count, err; 2269 int unused_count = hns3_desc_unused(ring); 2270 struct sk_buff *skb = NULL; 2271 int num, bnum = 0; 2272 2273 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG); 2274 rmb(); /* Make sure num taken effect before the other data is touched */ 2275 2276 recv_pkts = 0, recv_bds = 0, clean_count = 0; 2277 num -= unused_count; 2278 2279 while (recv_pkts < budget && recv_bds < num) { 2280 /* Reuse or realloc buffers */ 2281 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) { 2282 hns3_nic_alloc_rx_buffers(ring, 2283 clean_count + unused_count); 2284 clean_count = 0; 2285 unused_count = hns3_desc_unused(ring); 2286 } 2287 2288 /* Poll one pkt */ 2289 err = hns3_handle_rx_bd(ring, &skb, &bnum); 2290 if (unlikely(!skb)) /* This fault cannot be repaired */ 2291 goto out; 2292 2293 recv_bds += bnum; 2294 clean_count += bnum; 2295 if (unlikely(err)) { /* Do jump the err */ 2296 recv_pkts++; 2297 continue; 2298 } 2299 2300 /* Do update ip stack process */ 2301 skb->protocol = eth_type_trans(skb, netdev); 2302 rx_fn(ring, skb); 2303 2304 recv_pkts++; 2305 } 2306 2307 out: 2308 /* Make all data has been write before submit */ 2309 if (clean_count + unused_count > 0) 2310 hns3_nic_alloc_rx_buffers(ring, 2311 clean_count + unused_count); 2312 2313 return recv_pkts; 2314 } 2315 2316 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group) 2317 { 2318 struct hns3_enet_tqp_vector *tqp_vector = 2319 ring_group->ring->tqp_vector; 2320 enum hns3_flow_level_range new_flow_level; 2321 int packets_per_msecs; 2322 int bytes_per_msecs; 2323 u32 time_passed_ms; 2324 u16 new_int_gl; 2325 2326 if (!ring_group->coal.int_gl || !tqp_vector->last_jiffies) 2327 return false; 2328 2329 if (ring_group->total_packets == 0) { 2330 ring_group->coal.int_gl = HNS3_INT_GL_50K; 2331 ring_group->coal.flow_level = HNS3_FLOW_LOW; 2332 return true; 2333 } 2334 2335 /* Simple throttlerate management 2336 * 0-10MB/s lower (50000 ints/s) 2337 * 10-20MB/s middle (20000 ints/s) 2338 * 20-1249MB/s high (18000 ints/s) 2339 * > 40000pps ultra (8000 ints/s) 2340 */ 2341 new_flow_level = ring_group->coal.flow_level; 2342 new_int_gl = ring_group->coal.int_gl; 2343 time_passed_ms = 2344 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies); 2345 2346 if (!time_passed_ms) 2347 return false; 2348 2349 do_div(ring_group->total_packets, time_passed_ms); 2350 packets_per_msecs = ring_group->total_packets; 2351 2352 do_div(ring_group->total_bytes, time_passed_ms); 2353 bytes_per_msecs = ring_group->total_bytes; 2354 2355 #define HNS3_RX_LOW_BYTE_RATE 10000 2356 #define HNS3_RX_MID_BYTE_RATE 20000 2357 2358 switch (new_flow_level) { 2359 case HNS3_FLOW_LOW: 2360 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE) 2361 new_flow_level = HNS3_FLOW_MID; 2362 break; 2363 case HNS3_FLOW_MID: 2364 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE) 2365 new_flow_level = HNS3_FLOW_HIGH; 2366 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE) 2367 new_flow_level = HNS3_FLOW_LOW; 2368 break; 2369 case HNS3_FLOW_HIGH: 2370 case HNS3_FLOW_ULTRA: 2371 default: 2372 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE) 2373 new_flow_level = HNS3_FLOW_MID; 2374 break; 2375 } 2376 2377 #define HNS3_RX_ULTRA_PACKET_RATE 40 2378 2379 if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE && 2380 &tqp_vector->rx_group == ring_group) 2381 new_flow_level = HNS3_FLOW_ULTRA; 2382 2383 switch (new_flow_level) { 2384 case HNS3_FLOW_LOW: 2385 new_int_gl = HNS3_INT_GL_50K; 2386 break; 2387 case HNS3_FLOW_MID: 2388 new_int_gl = HNS3_INT_GL_20K; 2389 break; 2390 case HNS3_FLOW_HIGH: 2391 new_int_gl = HNS3_INT_GL_18K; 2392 break; 2393 case HNS3_FLOW_ULTRA: 2394 new_int_gl = HNS3_INT_GL_8K; 2395 break; 2396 default: 2397 break; 2398 } 2399 2400 ring_group->total_bytes = 0; 2401 ring_group->total_packets = 0; 2402 ring_group->coal.flow_level = new_flow_level; 2403 if (new_int_gl != ring_group->coal.int_gl) { 2404 ring_group->coal.int_gl = new_int_gl; 2405 return true; 2406 } 2407 return false; 2408 } 2409 2410 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector) 2411 { 2412 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group; 2413 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group; 2414 bool rx_update, tx_update; 2415 2416 if (tqp_vector->int_adapt_down > 0) { 2417 tqp_vector->int_adapt_down--; 2418 return; 2419 } 2420 2421 if (rx_group->coal.gl_adapt_enable) { 2422 rx_update = hns3_get_new_int_gl(rx_group); 2423 if (rx_update) 2424 hns3_set_vector_coalesce_rx_gl(tqp_vector, 2425 rx_group->coal.int_gl); 2426 } 2427 2428 if (tx_group->coal.gl_adapt_enable) { 2429 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group); 2430 if (tx_update) 2431 hns3_set_vector_coalesce_tx_gl(tqp_vector, 2432 tx_group->coal.int_gl); 2433 } 2434 2435 tqp_vector->last_jiffies = jiffies; 2436 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START; 2437 } 2438 2439 static int hns3_nic_common_poll(struct napi_struct *napi, int budget) 2440 { 2441 struct hns3_enet_ring *ring; 2442 int rx_pkt_total = 0; 2443 2444 struct hns3_enet_tqp_vector *tqp_vector = 2445 container_of(napi, struct hns3_enet_tqp_vector, napi); 2446 bool clean_complete = true; 2447 int rx_budget; 2448 2449 /* Since the actual Tx work is minimal, we can give the Tx a larger 2450 * budget and be more aggressive about cleaning up the Tx descriptors. 2451 */ 2452 hns3_for_each_ring(ring, tqp_vector->tx_group) { 2453 if (!hns3_clean_tx_ring(ring, budget)) 2454 clean_complete = false; 2455 } 2456 2457 /* make sure rx ring budget not smaller than 1 */ 2458 rx_budget = max(budget / tqp_vector->num_tqps, 1); 2459 2460 hns3_for_each_ring(ring, tqp_vector->rx_group) { 2461 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget, 2462 hns3_rx_skb); 2463 2464 if (rx_cleaned >= rx_budget) 2465 clean_complete = false; 2466 2467 rx_pkt_total += rx_cleaned; 2468 } 2469 2470 tqp_vector->rx_group.total_packets += rx_pkt_total; 2471 2472 if (!clean_complete) 2473 return budget; 2474 2475 napi_complete(napi); 2476 hns3_update_new_int_gl(tqp_vector); 2477 hns3_mask_vector_irq(tqp_vector, 1); 2478 2479 return rx_pkt_total; 2480 } 2481 2482 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector, 2483 struct hnae3_ring_chain_node *head) 2484 { 2485 struct pci_dev *pdev = tqp_vector->handle->pdev; 2486 struct hnae3_ring_chain_node *cur_chain = head; 2487 struct hnae3_ring_chain_node *chain; 2488 struct hns3_enet_ring *tx_ring; 2489 struct hns3_enet_ring *rx_ring; 2490 2491 tx_ring = tqp_vector->tx_group.ring; 2492 if (tx_ring) { 2493 cur_chain->tqp_index = tx_ring->tqp->tqp_index; 2494 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B, 2495 HNAE3_RING_TYPE_TX); 2496 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 2497 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX); 2498 2499 cur_chain->next = NULL; 2500 2501 while (tx_ring->next) { 2502 tx_ring = tx_ring->next; 2503 2504 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), 2505 GFP_KERNEL); 2506 if (!chain) 2507 return -ENOMEM; 2508 2509 cur_chain->next = chain; 2510 chain->tqp_index = tx_ring->tqp->tqp_index; 2511 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B, 2512 HNAE3_RING_TYPE_TX); 2513 hnae_set_field(chain->int_gl_idx, 2514 HNAE3_RING_GL_IDX_M, 2515 HNAE3_RING_GL_IDX_S, 2516 HNAE3_RING_GL_TX); 2517 2518 cur_chain = chain; 2519 } 2520 } 2521 2522 rx_ring = tqp_vector->rx_group.ring; 2523 if (!tx_ring && rx_ring) { 2524 cur_chain->next = NULL; 2525 cur_chain->tqp_index = rx_ring->tqp->tqp_index; 2526 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B, 2527 HNAE3_RING_TYPE_RX); 2528 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 2529 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX); 2530 2531 rx_ring = rx_ring->next; 2532 } 2533 2534 while (rx_ring) { 2535 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL); 2536 if (!chain) 2537 return -ENOMEM; 2538 2539 cur_chain->next = chain; 2540 chain->tqp_index = rx_ring->tqp->tqp_index; 2541 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B, 2542 HNAE3_RING_TYPE_RX); 2543 hnae_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 2544 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX); 2545 2546 cur_chain = chain; 2547 2548 rx_ring = rx_ring->next; 2549 } 2550 2551 return 0; 2552 } 2553 2554 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector, 2555 struct hnae3_ring_chain_node *head) 2556 { 2557 struct pci_dev *pdev = tqp_vector->handle->pdev; 2558 struct hnae3_ring_chain_node *chain_tmp, *chain; 2559 2560 chain = head->next; 2561 2562 while (chain) { 2563 chain_tmp = chain->next; 2564 devm_kfree(&pdev->dev, chain); 2565 chain = chain_tmp; 2566 } 2567 } 2568 2569 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group, 2570 struct hns3_enet_ring *ring) 2571 { 2572 ring->next = group->ring; 2573 group->ring = ring; 2574 2575 group->count++; 2576 } 2577 2578 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv) 2579 { 2580 struct hnae3_ring_chain_node vector_ring_chain; 2581 struct hnae3_handle *h = priv->ae_handle; 2582 struct hns3_enet_tqp_vector *tqp_vector; 2583 int ret = 0; 2584 u16 i; 2585 2586 for (i = 0; i < priv->vector_num; i++) { 2587 tqp_vector = &priv->tqp_vector[i]; 2588 hns3_vector_gl_rl_init_hw(tqp_vector, priv); 2589 tqp_vector->num_tqps = 0; 2590 } 2591 2592 for (i = 0; i < h->kinfo.num_tqps; i++) { 2593 u16 vector_i = i % priv->vector_num; 2594 u16 tqp_num = h->kinfo.num_tqps; 2595 2596 tqp_vector = &priv->tqp_vector[vector_i]; 2597 2598 hns3_add_ring_to_group(&tqp_vector->tx_group, 2599 priv->ring_data[i].ring); 2600 2601 hns3_add_ring_to_group(&tqp_vector->rx_group, 2602 priv->ring_data[i + tqp_num].ring); 2603 2604 priv->ring_data[i].ring->tqp_vector = tqp_vector; 2605 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector; 2606 tqp_vector->num_tqps++; 2607 } 2608 2609 for (i = 0; i < priv->vector_num; i++) { 2610 tqp_vector = &priv->tqp_vector[i]; 2611 2612 tqp_vector->rx_group.total_bytes = 0; 2613 tqp_vector->rx_group.total_packets = 0; 2614 tqp_vector->tx_group.total_bytes = 0; 2615 tqp_vector->tx_group.total_packets = 0; 2616 tqp_vector->handle = h; 2617 2618 ret = hns3_get_vector_ring_chain(tqp_vector, 2619 &vector_ring_chain); 2620 if (ret) 2621 return ret; 2622 2623 ret = h->ae_algo->ops->map_ring_to_vector(h, 2624 tqp_vector->vector_irq, &vector_ring_chain); 2625 2626 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain); 2627 2628 if (ret) 2629 return ret; 2630 2631 netif_napi_add(priv->netdev, &tqp_vector->napi, 2632 hns3_nic_common_poll, NAPI_POLL_WEIGHT); 2633 } 2634 2635 return 0; 2636 } 2637 2638 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv) 2639 { 2640 struct hnae3_handle *h = priv->ae_handle; 2641 struct hns3_enet_tqp_vector *tqp_vector; 2642 struct hnae3_vector_info *vector; 2643 struct pci_dev *pdev = h->pdev; 2644 u16 tqp_num = h->kinfo.num_tqps; 2645 u16 vector_num; 2646 int ret = 0; 2647 u16 i; 2648 2649 /* RSS size, cpu online and vector_num should be the same */ 2650 /* Should consider 2p/4p later */ 2651 vector_num = min_t(u16, num_online_cpus(), tqp_num); 2652 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector), 2653 GFP_KERNEL); 2654 if (!vector) 2655 return -ENOMEM; 2656 2657 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector); 2658 2659 priv->vector_num = vector_num; 2660 priv->tqp_vector = (struct hns3_enet_tqp_vector *) 2661 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector), 2662 GFP_KERNEL); 2663 if (!priv->tqp_vector) { 2664 ret = -ENOMEM; 2665 goto out; 2666 } 2667 2668 for (i = 0; i < priv->vector_num; i++) { 2669 tqp_vector = &priv->tqp_vector[i]; 2670 tqp_vector->idx = i; 2671 tqp_vector->mask_addr = vector[i].io_addr; 2672 tqp_vector->vector_irq = vector[i].vector; 2673 hns3_vector_gl_rl_init(tqp_vector, priv); 2674 } 2675 2676 out: 2677 devm_kfree(&pdev->dev, vector); 2678 return ret; 2679 } 2680 2681 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group) 2682 { 2683 group->ring = NULL; 2684 group->count = 0; 2685 } 2686 2687 static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv) 2688 { 2689 struct hnae3_ring_chain_node vector_ring_chain; 2690 struct hnae3_handle *h = priv->ae_handle; 2691 struct hns3_enet_tqp_vector *tqp_vector; 2692 int i, ret; 2693 2694 for (i = 0; i < priv->vector_num; i++) { 2695 tqp_vector = &priv->tqp_vector[i]; 2696 2697 ret = hns3_get_vector_ring_chain(tqp_vector, 2698 &vector_ring_chain); 2699 if (ret) 2700 return ret; 2701 2702 ret = h->ae_algo->ops->unmap_ring_from_vector(h, 2703 tqp_vector->vector_irq, &vector_ring_chain); 2704 if (ret) 2705 return ret; 2706 2707 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq); 2708 if (ret) 2709 return ret; 2710 2711 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain); 2712 2713 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) { 2714 (void)irq_set_affinity_hint( 2715 priv->tqp_vector[i].vector_irq, 2716 NULL); 2717 free_irq(priv->tqp_vector[i].vector_irq, 2718 &priv->tqp_vector[i]); 2719 } 2720 2721 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED; 2722 hns3_clear_ring_group(&tqp_vector->rx_group); 2723 hns3_clear_ring_group(&tqp_vector->tx_group); 2724 netif_napi_del(&priv->tqp_vector[i].napi); 2725 } 2726 2727 return 0; 2728 } 2729 2730 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv) 2731 { 2732 struct hnae3_handle *h = priv->ae_handle; 2733 struct pci_dev *pdev = h->pdev; 2734 int i, ret; 2735 2736 for (i = 0; i < priv->vector_num; i++) { 2737 struct hns3_enet_tqp_vector *tqp_vector; 2738 2739 tqp_vector = &priv->tqp_vector[i]; 2740 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq); 2741 if (ret) 2742 return ret; 2743 } 2744 2745 devm_kfree(&pdev->dev, priv->tqp_vector); 2746 return 0; 2747 } 2748 2749 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv, 2750 int ring_type) 2751 { 2752 struct hns3_nic_ring_data *ring_data = priv->ring_data; 2753 int queue_num = priv->ae_handle->kinfo.num_tqps; 2754 struct pci_dev *pdev = priv->ae_handle->pdev; 2755 struct hns3_enet_ring *ring; 2756 2757 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL); 2758 if (!ring) 2759 return -ENOMEM; 2760 2761 if (ring_type == HNAE3_RING_TYPE_TX) { 2762 ring_data[q->tqp_index].ring = ring; 2763 ring_data[q->tqp_index].queue_index = q->tqp_index; 2764 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET; 2765 } else { 2766 ring_data[q->tqp_index + queue_num].ring = ring; 2767 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index; 2768 ring->io_base = q->io_base; 2769 } 2770 2771 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type); 2772 2773 ring->tqp = q; 2774 ring->desc = NULL; 2775 ring->desc_cb = NULL; 2776 ring->dev = priv->dev; 2777 ring->desc_dma_addr = 0; 2778 ring->buf_size = q->buf_size; 2779 ring->desc_num = q->desc_num; 2780 ring->next_to_use = 0; 2781 ring->next_to_clean = 0; 2782 2783 return 0; 2784 } 2785 2786 static int hns3_queue_to_ring(struct hnae3_queue *tqp, 2787 struct hns3_nic_priv *priv) 2788 { 2789 int ret; 2790 2791 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX); 2792 if (ret) 2793 return ret; 2794 2795 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX); 2796 if (ret) 2797 return ret; 2798 2799 return 0; 2800 } 2801 2802 static int hns3_get_ring_config(struct hns3_nic_priv *priv) 2803 { 2804 struct hnae3_handle *h = priv->ae_handle; 2805 struct pci_dev *pdev = h->pdev; 2806 int i, ret; 2807 2808 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps * 2809 sizeof(*priv->ring_data) * 2, 2810 GFP_KERNEL); 2811 if (!priv->ring_data) 2812 return -ENOMEM; 2813 2814 for (i = 0; i < h->kinfo.num_tqps; i++) { 2815 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv); 2816 if (ret) 2817 goto err; 2818 } 2819 2820 return 0; 2821 err: 2822 devm_kfree(&pdev->dev, priv->ring_data); 2823 return ret; 2824 } 2825 2826 static void hns3_put_ring_config(struct hns3_nic_priv *priv) 2827 { 2828 struct hnae3_handle *h = priv->ae_handle; 2829 int i; 2830 2831 for (i = 0; i < h->kinfo.num_tqps; i++) { 2832 devm_kfree(priv->dev, priv->ring_data[i].ring); 2833 devm_kfree(priv->dev, 2834 priv->ring_data[i + h->kinfo.num_tqps].ring); 2835 } 2836 devm_kfree(priv->dev, priv->ring_data); 2837 } 2838 2839 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring) 2840 { 2841 int ret; 2842 2843 if (ring->desc_num <= 0 || ring->buf_size <= 0) 2844 return -EINVAL; 2845 2846 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]), 2847 GFP_KERNEL); 2848 if (!ring->desc_cb) { 2849 ret = -ENOMEM; 2850 goto out; 2851 } 2852 2853 ret = hns3_alloc_desc(ring); 2854 if (ret) 2855 goto out_with_desc_cb; 2856 2857 if (!HNAE3_IS_TX_RING(ring)) { 2858 ret = hns3_alloc_ring_buffers(ring); 2859 if (ret) 2860 goto out_with_desc; 2861 } 2862 2863 return 0; 2864 2865 out_with_desc: 2866 hns3_free_desc(ring); 2867 out_with_desc_cb: 2868 kfree(ring->desc_cb); 2869 ring->desc_cb = NULL; 2870 out: 2871 return ret; 2872 } 2873 2874 static void hns3_fini_ring(struct hns3_enet_ring *ring) 2875 { 2876 hns3_free_desc(ring); 2877 kfree(ring->desc_cb); 2878 ring->desc_cb = NULL; 2879 ring->next_to_clean = 0; 2880 ring->next_to_use = 0; 2881 } 2882 2883 static int hns3_buf_size2type(u32 buf_size) 2884 { 2885 int bd_size_type; 2886 2887 switch (buf_size) { 2888 case 512: 2889 bd_size_type = HNS3_BD_SIZE_512_TYPE; 2890 break; 2891 case 1024: 2892 bd_size_type = HNS3_BD_SIZE_1024_TYPE; 2893 break; 2894 case 2048: 2895 bd_size_type = HNS3_BD_SIZE_2048_TYPE; 2896 break; 2897 case 4096: 2898 bd_size_type = HNS3_BD_SIZE_4096_TYPE; 2899 break; 2900 default: 2901 bd_size_type = HNS3_BD_SIZE_2048_TYPE; 2902 } 2903 2904 return bd_size_type; 2905 } 2906 2907 static void hns3_init_ring_hw(struct hns3_enet_ring *ring) 2908 { 2909 dma_addr_t dma = ring->desc_dma_addr; 2910 struct hnae3_queue *q = ring->tqp; 2911 2912 if (!HNAE3_IS_TX_RING(ring)) { 2913 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, 2914 (u32)dma); 2915 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG, 2916 (u32)((dma >> 31) >> 1)); 2917 2918 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG, 2919 hns3_buf_size2type(ring->buf_size)); 2920 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG, 2921 ring->desc_num / 8 - 1); 2922 2923 } else { 2924 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG, 2925 (u32)dma); 2926 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG, 2927 (u32)((dma >> 31) >> 1)); 2928 2929 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG, 2930 hns3_buf_size2type(ring->buf_size)); 2931 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG, 2932 ring->desc_num / 8 - 1); 2933 } 2934 } 2935 2936 int hns3_init_all_ring(struct hns3_nic_priv *priv) 2937 { 2938 struct hnae3_handle *h = priv->ae_handle; 2939 int ring_num = h->kinfo.num_tqps * 2; 2940 int i, j; 2941 int ret; 2942 2943 for (i = 0; i < ring_num; i++) { 2944 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring); 2945 if (ret) { 2946 dev_err(priv->dev, 2947 "Alloc ring memory fail! ret=%d\n", ret); 2948 goto out_when_alloc_ring_memory; 2949 } 2950 2951 u64_stats_init(&priv->ring_data[i].ring->syncp); 2952 } 2953 2954 return 0; 2955 2956 out_when_alloc_ring_memory: 2957 for (j = i - 1; j >= 0; j--) 2958 hns3_fini_ring(priv->ring_data[j].ring); 2959 2960 return -ENOMEM; 2961 } 2962 2963 int hns3_uninit_all_ring(struct hns3_nic_priv *priv) 2964 { 2965 struct hnae3_handle *h = priv->ae_handle; 2966 int i; 2967 2968 for (i = 0; i < h->kinfo.num_tqps; i++) { 2969 if (h->ae_algo->ops->reset_queue) 2970 h->ae_algo->ops->reset_queue(h, i); 2971 2972 hns3_fini_ring(priv->ring_data[i].ring); 2973 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring); 2974 } 2975 return 0; 2976 } 2977 2978 /* Set mac addr if it is configured. or leave it to the AE driver */ 2979 static void hns3_init_mac_addr(struct net_device *netdev, bool init) 2980 { 2981 struct hns3_nic_priv *priv = netdev_priv(netdev); 2982 struct hnae3_handle *h = priv->ae_handle; 2983 u8 mac_addr_temp[ETH_ALEN]; 2984 2985 if (h->ae_algo->ops->get_mac_addr && init) { 2986 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp); 2987 ether_addr_copy(netdev->dev_addr, mac_addr_temp); 2988 } 2989 2990 /* Check if the MAC address is valid, if not get a random one */ 2991 if (!is_valid_ether_addr(netdev->dev_addr)) { 2992 eth_hw_addr_random(netdev); 2993 dev_warn(priv->dev, "using random MAC address %pM\n", 2994 netdev->dev_addr); 2995 } 2996 2997 if (h->ae_algo->ops->set_mac_addr) 2998 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true); 2999 3000 } 3001 3002 static void hns3_nic_set_priv_ops(struct net_device *netdev) 3003 { 3004 struct hns3_nic_priv *priv = netdev_priv(netdev); 3005 3006 if ((netdev->features & NETIF_F_TSO) || 3007 (netdev->features & NETIF_F_TSO6)) { 3008 priv->ops.fill_desc = hns3_fill_desc_tso; 3009 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso; 3010 } else { 3011 priv->ops.fill_desc = hns3_fill_desc; 3012 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx; 3013 } 3014 } 3015 3016 static int hns3_client_init(struct hnae3_handle *handle) 3017 { 3018 struct pci_dev *pdev = handle->pdev; 3019 struct hns3_nic_priv *priv; 3020 struct net_device *netdev; 3021 int ret; 3022 3023 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), 3024 hns3_get_max_available_channels(handle)); 3025 if (!netdev) 3026 return -ENOMEM; 3027 3028 priv = netdev_priv(netdev); 3029 priv->dev = &pdev->dev; 3030 priv->netdev = netdev; 3031 priv->ae_handle = handle; 3032 priv->ae_handle->reset_level = HNAE3_NONE_RESET; 3033 priv->ae_handle->last_reset_time = jiffies; 3034 priv->tx_timeout_count = 0; 3035 3036 handle->kinfo.netdev = netdev; 3037 handle->priv = (void *)priv; 3038 3039 hns3_init_mac_addr(netdev, true); 3040 3041 hns3_set_default_feature(netdev); 3042 3043 netdev->watchdog_timeo = HNS3_TX_TIMEOUT; 3044 netdev->priv_flags |= IFF_UNICAST_FLT; 3045 netdev->netdev_ops = &hns3_nic_netdev_ops; 3046 SET_NETDEV_DEV(netdev, &pdev->dev); 3047 hns3_ethtool_set_ops(netdev); 3048 hns3_nic_set_priv_ops(netdev); 3049 3050 /* Carrier off reporting is important to ethtool even BEFORE open */ 3051 netif_carrier_off(netdev); 3052 3053 ret = hns3_get_ring_config(priv); 3054 if (ret) { 3055 ret = -ENOMEM; 3056 goto out_get_ring_cfg; 3057 } 3058 3059 ret = hns3_nic_alloc_vector_data(priv); 3060 if (ret) { 3061 ret = -ENOMEM; 3062 goto out_alloc_vector_data; 3063 } 3064 3065 ret = hns3_nic_init_vector_data(priv); 3066 if (ret) { 3067 ret = -ENOMEM; 3068 goto out_init_vector_data; 3069 } 3070 3071 ret = hns3_init_all_ring(priv); 3072 if (ret) { 3073 ret = -ENOMEM; 3074 goto out_init_ring_data; 3075 } 3076 3077 ret = register_netdev(netdev); 3078 if (ret) { 3079 dev_err(priv->dev, "probe register netdev fail!\n"); 3080 goto out_reg_netdev_fail; 3081 } 3082 3083 hns3_dcbnl_setup(handle); 3084 3085 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */ 3086 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 3087 3088 return ret; 3089 3090 out_reg_netdev_fail: 3091 out_init_ring_data: 3092 (void)hns3_nic_uninit_vector_data(priv); 3093 out_init_vector_data: 3094 hns3_nic_dealloc_vector_data(priv); 3095 out_alloc_vector_data: 3096 priv->ring_data = NULL; 3097 out_get_ring_cfg: 3098 priv->ae_handle = NULL; 3099 free_netdev(netdev); 3100 return ret; 3101 } 3102 3103 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset) 3104 { 3105 struct net_device *netdev = handle->kinfo.netdev; 3106 struct hns3_nic_priv *priv = netdev_priv(netdev); 3107 int ret; 3108 3109 if (netdev->reg_state != NETREG_UNINITIALIZED) 3110 unregister_netdev(netdev); 3111 3112 hns3_force_clear_all_rx_ring(handle); 3113 3114 ret = hns3_nic_uninit_vector_data(priv); 3115 if (ret) 3116 netdev_err(netdev, "uninit vector error\n"); 3117 3118 ret = hns3_nic_dealloc_vector_data(priv); 3119 if (ret) 3120 netdev_err(netdev, "dealloc vector error\n"); 3121 3122 ret = hns3_uninit_all_ring(priv); 3123 if (ret) 3124 netdev_err(netdev, "uninit ring error\n"); 3125 3126 hns3_put_ring_config(priv); 3127 3128 priv->ring_data = NULL; 3129 3130 free_netdev(netdev); 3131 } 3132 3133 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup) 3134 { 3135 struct net_device *netdev = handle->kinfo.netdev; 3136 3137 if (!netdev) 3138 return; 3139 3140 if (linkup) { 3141 netif_carrier_on(netdev); 3142 netif_tx_wake_all_queues(netdev); 3143 netdev_info(netdev, "link up\n"); 3144 } else { 3145 netif_carrier_off(netdev); 3146 netif_tx_stop_all_queues(netdev); 3147 netdev_info(netdev, "link down\n"); 3148 } 3149 } 3150 3151 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc) 3152 { 3153 struct hnae3_knic_private_info *kinfo = &handle->kinfo; 3154 struct net_device *ndev = kinfo->netdev; 3155 bool if_running; 3156 int ret; 3157 u8 i; 3158 3159 if (tc > HNAE3_MAX_TC) 3160 return -EINVAL; 3161 3162 if (!ndev) 3163 return -ENODEV; 3164 3165 if_running = netif_running(ndev); 3166 3167 ret = netdev_set_num_tc(ndev, tc); 3168 if (ret) 3169 return ret; 3170 3171 if (if_running) { 3172 (void)hns3_nic_net_stop(ndev); 3173 msleep(100); 3174 } 3175 3176 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ? 3177 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP; 3178 if (ret) 3179 goto err_out; 3180 3181 if (tc <= 1) { 3182 netdev_reset_tc(ndev); 3183 goto out; 3184 } 3185 3186 for (i = 0; i < HNAE3_MAX_TC; i++) { 3187 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i]; 3188 3189 if (tc_info->enable) 3190 netdev_set_tc_queue(ndev, 3191 tc_info->tc, 3192 tc_info->tqp_count, 3193 tc_info->tqp_offset); 3194 } 3195 3196 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) { 3197 netdev_set_prio_tc_map(ndev, i, 3198 kinfo->prio_tc[i]); 3199 } 3200 3201 out: 3202 ret = hns3_nic_set_real_num_queue(ndev); 3203 3204 err_out: 3205 if (if_running) 3206 (void)hns3_nic_net_open(ndev); 3207 3208 return ret; 3209 } 3210 3211 static void hns3_recover_hw_addr(struct net_device *ndev) 3212 { 3213 struct netdev_hw_addr_list *list; 3214 struct netdev_hw_addr *ha, *tmp; 3215 3216 /* go through and sync uc_addr entries to the device */ 3217 list = &ndev->uc; 3218 list_for_each_entry_safe(ha, tmp, &list->list, list) 3219 hns3_nic_uc_sync(ndev, ha->addr); 3220 3221 /* go through and sync mc_addr entries to the device */ 3222 list = &ndev->mc; 3223 list_for_each_entry_safe(ha, tmp, &list->list, list) 3224 hns3_nic_mc_sync(ndev, ha->addr); 3225 } 3226 3227 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring) 3228 { 3229 while (ring->next_to_clean != ring->next_to_use) { 3230 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0; 3231 hns3_free_buffer_detach(ring, ring->next_to_clean); 3232 ring_ptr_move_fw(ring, next_to_clean); 3233 } 3234 } 3235 3236 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring) 3237 { 3238 struct hns3_desc_cb res_cbs; 3239 int ret; 3240 3241 while (ring->next_to_use != ring->next_to_clean) { 3242 /* When a buffer is not reused, it's memory has been 3243 * freed in hns3_handle_rx_bd or will be freed by 3244 * stack, so we need to replace the buffer here. 3245 */ 3246 if (!ring->desc_cb[ring->next_to_use].reuse_flag) { 3247 ret = hns3_reserve_buffer_map(ring, &res_cbs); 3248 if (ret) { 3249 u64_stats_update_begin(&ring->syncp); 3250 ring->stats.sw_err_cnt++; 3251 u64_stats_update_end(&ring->syncp); 3252 /* if alloc new buffer fail, exit directly 3253 * and reclear in up flow. 3254 */ 3255 netdev_warn(ring->tqp->handle->kinfo.netdev, 3256 "reserve buffer map failed, ret = %d\n", 3257 ret); 3258 return ret; 3259 } 3260 hns3_replace_buffer(ring, ring->next_to_use, 3261 &res_cbs); 3262 } 3263 ring_ptr_move_fw(ring, next_to_use); 3264 } 3265 3266 return 0; 3267 } 3268 3269 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring) 3270 { 3271 while (ring->next_to_use != ring->next_to_clean) { 3272 /* When a buffer is not reused, it's memory has been 3273 * freed in hns3_handle_rx_bd or will be freed by 3274 * stack, so only need to unmap the buffer here. 3275 */ 3276 if (!ring->desc_cb[ring->next_to_use].reuse_flag) { 3277 hns3_unmap_buffer(ring, 3278 &ring->desc_cb[ring->next_to_use]); 3279 ring->desc_cb[ring->next_to_use].dma = 0; 3280 } 3281 3282 ring_ptr_move_fw(ring, next_to_use); 3283 } 3284 } 3285 3286 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h) 3287 { 3288 struct net_device *ndev = h->kinfo.netdev; 3289 struct hns3_nic_priv *priv = netdev_priv(ndev); 3290 struct hns3_enet_ring *ring; 3291 u32 i; 3292 3293 for (i = 0; i < h->kinfo.num_tqps; i++) { 3294 ring = priv->ring_data[i + h->kinfo.num_tqps].ring; 3295 hns3_force_clear_rx_ring(ring); 3296 } 3297 } 3298 3299 static void hns3_clear_all_ring(struct hnae3_handle *h) 3300 { 3301 struct net_device *ndev = h->kinfo.netdev; 3302 struct hns3_nic_priv *priv = netdev_priv(ndev); 3303 u32 i; 3304 3305 for (i = 0; i < h->kinfo.num_tqps; i++) { 3306 struct netdev_queue *dev_queue; 3307 struct hns3_enet_ring *ring; 3308 3309 ring = priv->ring_data[i].ring; 3310 hns3_clear_tx_ring(ring); 3311 dev_queue = netdev_get_tx_queue(ndev, 3312 priv->ring_data[i].queue_index); 3313 netdev_tx_reset_queue(dev_queue); 3314 3315 ring = priv->ring_data[i + h->kinfo.num_tqps].ring; 3316 /* Continue to clear other rings even if clearing some 3317 * rings failed. 3318 */ 3319 hns3_clear_rx_ring(ring); 3320 } 3321 } 3322 3323 int hns3_nic_reset_all_ring(struct hnae3_handle *h) 3324 { 3325 struct net_device *ndev = h->kinfo.netdev; 3326 struct hns3_nic_priv *priv = netdev_priv(ndev); 3327 struct hns3_enet_ring *rx_ring; 3328 int i, j; 3329 int ret; 3330 3331 for (i = 0; i < h->kinfo.num_tqps; i++) { 3332 h->ae_algo->ops->reset_queue(h, i); 3333 hns3_init_ring_hw(priv->ring_data[i].ring); 3334 3335 /* We need to clear tx ring here because self test will 3336 * use the ring and will not run down before up 3337 */ 3338 hns3_clear_tx_ring(priv->ring_data[i].ring); 3339 priv->ring_data[i].ring->next_to_clean = 0; 3340 priv->ring_data[i].ring->next_to_use = 0; 3341 3342 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring; 3343 hns3_init_ring_hw(rx_ring); 3344 ret = hns3_clear_rx_ring(rx_ring); 3345 if (ret) 3346 return ret; 3347 3348 /* We can not know the hardware head and tail when this 3349 * function is called in reset flow, so we reuse all desc. 3350 */ 3351 for (j = 0; j < rx_ring->desc_num; j++) 3352 hns3_reuse_buffer(rx_ring, j); 3353 3354 rx_ring->next_to_clean = 0; 3355 rx_ring->next_to_use = 0; 3356 } 3357 3358 return 0; 3359 } 3360 3361 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle) 3362 { 3363 struct hnae3_knic_private_info *kinfo = &handle->kinfo; 3364 struct net_device *ndev = kinfo->netdev; 3365 3366 if (!netif_running(ndev)) 3367 return -EIO; 3368 3369 return hns3_nic_net_stop(ndev); 3370 } 3371 3372 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle) 3373 { 3374 struct hnae3_knic_private_info *kinfo = &handle->kinfo; 3375 int ret = 0; 3376 3377 if (netif_running(kinfo->netdev)) { 3378 ret = hns3_nic_net_up(kinfo->netdev); 3379 if (ret) { 3380 netdev_err(kinfo->netdev, 3381 "hns net up fail, ret=%d!\n", ret); 3382 return ret; 3383 } 3384 handle->last_reset_time = jiffies; 3385 } 3386 3387 return ret; 3388 } 3389 3390 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle) 3391 { 3392 struct net_device *netdev = handle->kinfo.netdev; 3393 struct hns3_nic_priv *priv = netdev_priv(netdev); 3394 int ret; 3395 3396 hns3_init_mac_addr(netdev, false); 3397 hns3_nic_set_rx_mode(netdev); 3398 hns3_recover_hw_addr(netdev); 3399 3400 /* Hardware table is only clear when pf resets */ 3401 if (!(handle->flags & HNAE3_SUPPORT_VF)) 3402 hns3_restore_vlan(netdev); 3403 3404 /* Carrier off reporting is important to ethtool even BEFORE open */ 3405 netif_carrier_off(netdev); 3406 3407 ret = hns3_get_ring_config(priv); 3408 if (ret) 3409 return ret; 3410 3411 ret = hns3_nic_init_vector_data(priv); 3412 if (ret) 3413 return ret; 3414 3415 ret = hns3_init_all_ring(priv); 3416 if (ret) { 3417 hns3_nic_uninit_vector_data(priv); 3418 priv->ring_data = NULL; 3419 } 3420 3421 return ret; 3422 } 3423 3424 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle) 3425 { 3426 struct net_device *netdev = handle->kinfo.netdev; 3427 struct hns3_nic_priv *priv = netdev_priv(netdev); 3428 int ret; 3429 3430 hns3_force_clear_all_rx_ring(handle); 3431 3432 ret = hns3_nic_uninit_vector_data(priv); 3433 if (ret) { 3434 netdev_err(netdev, "uninit vector error\n"); 3435 return ret; 3436 } 3437 3438 ret = hns3_uninit_all_ring(priv); 3439 if (ret) 3440 netdev_err(netdev, "uninit ring error\n"); 3441 3442 hns3_put_ring_config(priv); 3443 3444 priv->ring_data = NULL; 3445 3446 return ret; 3447 } 3448 3449 static int hns3_reset_notify(struct hnae3_handle *handle, 3450 enum hnae3_reset_notify_type type) 3451 { 3452 int ret = 0; 3453 3454 switch (type) { 3455 case HNAE3_UP_CLIENT: 3456 ret = hns3_reset_notify_up_enet(handle); 3457 break; 3458 case HNAE3_DOWN_CLIENT: 3459 ret = hns3_reset_notify_down_enet(handle); 3460 break; 3461 case HNAE3_INIT_CLIENT: 3462 ret = hns3_reset_notify_init_enet(handle); 3463 break; 3464 case HNAE3_UNINIT_CLIENT: 3465 ret = hns3_reset_notify_uninit_enet(handle); 3466 break; 3467 default: 3468 break; 3469 } 3470 3471 return ret; 3472 } 3473 3474 static void hns3_restore_coal(struct hns3_nic_priv *priv, 3475 struct hns3_enet_coalesce *tx, 3476 struct hns3_enet_coalesce *rx) 3477 { 3478 u16 vector_num = priv->vector_num; 3479 int i; 3480 3481 for (i = 0; i < vector_num; i++) { 3482 memcpy(&priv->tqp_vector[i].tx_group.coal, tx, 3483 sizeof(struct hns3_enet_coalesce)); 3484 memcpy(&priv->tqp_vector[i].rx_group.coal, rx, 3485 sizeof(struct hns3_enet_coalesce)); 3486 } 3487 } 3488 3489 static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num, 3490 struct hns3_enet_coalesce *tx, 3491 struct hns3_enet_coalesce *rx) 3492 { 3493 struct hns3_nic_priv *priv = netdev_priv(netdev); 3494 struct hnae3_handle *h = hns3_get_handle(netdev); 3495 int ret; 3496 3497 ret = h->ae_algo->ops->set_channels(h, new_tqp_num); 3498 if (ret) 3499 return ret; 3500 3501 ret = hns3_get_ring_config(priv); 3502 if (ret) 3503 return ret; 3504 3505 ret = hns3_nic_alloc_vector_data(priv); 3506 if (ret) 3507 goto err_alloc_vector; 3508 3509 hns3_restore_coal(priv, tx, rx); 3510 3511 ret = hns3_nic_init_vector_data(priv); 3512 if (ret) 3513 goto err_uninit_vector; 3514 3515 ret = hns3_init_all_ring(priv); 3516 if (ret) 3517 goto err_put_ring; 3518 3519 return 0; 3520 3521 err_put_ring: 3522 hns3_put_ring_config(priv); 3523 err_uninit_vector: 3524 hns3_nic_uninit_vector_data(priv); 3525 err_alloc_vector: 3526 hns3_nic_dealloc_vector_data(priv); 3527 return ret; 3528 } 3529 3530 static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num) 3531 { 3532 return (new_tqp_num / num_tc) * num_tc; 3533 } 3534 3535 int hns3_set_channels(struct net_device *netdev, 3536 struct ethtool_channels *ch) 3537 { 3538 struct hns3_nic_priv *priv = netdev_priv(netdev); 3539 struct hnae3_handle *h = hns3_get_handle(netdev); 3540 struct hnae3_knic_private_info *kinfo = &h->kinfo; 3541 struct hns3_enet_coalesce tx_coal, rx_coal; 3542 bool if_running = netif_running(netdev); 3543 u32 new_tqp_num = ch->combined_count; 3544 u16 org_tqp_num; 3545 int ret; 3546 3547 if (ch->rx_count || ch->tx_count) 3548 return -EINVAL; 3549 3550 if (new_tqp_num > hns3_get_max_available_channels(h) || 3551 new_tqp_num < kinfo->num_tc) { 3552 dev_err(&netdev->dev, 3553 "Change tqps fail, the tqp range is from %d to %d", 3554 kinfo->num_tc, 3555 hns3_get_max_available_channels(h)); 3556 return -EINVAL; 3557 } 3558 3559 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num); 3560 if (kinfo->num_tqps == new_tqp_num) 3561 return 0; 3562 3563 if (if_running) 3564 hns3_nic_net_stop(netdev); 3565 3566 ret = hns3_nic_uninit_vector_data(priv); 3567 if (ret) { 3568 dev_err(&netdev->dev, 3569 "Unbind vector with tqp fail, nothing is changed"); 3570 goto open_netdev; 3571 } 3572 3573 /* Changing the tqp num may also change the vector num, 3574 * ethtool only support setting and querying one coal 3575 * configuation for now, so save the vector 0' coal 3576 * configuation here in order to restore it. 3577 */ 3578 memcpy(&tx_coal, &priv->tqp_vector[0].tx_group.coal, 3579 sizeof(struct hns3_enet_coalesce)); 3580 memcpy(&rx_coal, &priv->tqp_vector[0].rx_group.coal, 3581 sizeof(struct hns3_enet_coalesce)); 3582 3583 hns3_nic_dealloc_vector_data(priv); 3584 3585 hns3_uninit_all_ring(priv); 3586 hns3_put_ring_config(priv); 3587 3588 org_tqp_num = h->kinfo.num_tqps; 3589 ret = hns3_modify_tqp_num(netdev, new_tqp_num, &tx_coal, &rx_coal); 3590 if (ret) { 3591 ret = hns3_modify_tqp_num(netdev, org_tqp_num, 3592 &tx_coal, &rx_coal); 3593 if (ret) { 3594 /* If revert to old tqp failed, fatal error occurred */ 3595 dev_err(&netdev->dev, 3596 "Revert to old tqp num fail, ret=%d", ret); 3597 return ret; 3598 } 3599 dev_info(&netdev->dev, 3600 "Change tqp num fail, Revert to old tqp num"); 3601 } 3602 3603 open_netdev: 3604 if (if_running) 3605 hns3_nic_net_open(netdev); 3606 3607 return ret; 3608 } 3609 3610 static const struct hnae3_client_ops client_ops = { 3611 .init_instance = hns3_client_init, 3612 .uninit_instance = hns3_client_uninit, 3613 .link_status_change = hns3_link_status_change, 3614 .setup_tc = hns3_client_setup_tc, 3615 .reset_notify = hns3_reset_notify, 3616 }; 3617 3618 /* hns3_init_module - Driver registration routine 3619 * hns3_init_module is the first routine called when the driver is 3620 * loaded. All it does is register with the PCI subsystem. 3621 */ 3622 static int __init hns3_init_module(void) 3623 { 3624 int ret; 3625 3626 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string); 3627 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright); 3628 3629 client.type = HNAE3_CLIENT_KNIC; 3630 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s", 3631 hns3_driver_name); 3632 3633 client.ops = &client_ops; 3634 3635 INIT_LIST_HEAD(&client.node); 3636 3637 ret = hnae3_register_client(&client); 3638 if (ret) 3639 return ret; 3640 3641 ret = pci_register_driver(&hns3_driver); 3642 if (ret) 3643 hnae3_unregister_client(&client); 3644 3645 return ret; 3646 } 3647 module_init(hns3_init_module); 3648 3649 /* hns3_exit_module - Driver exit cleanup routine 3650 * hns3_exit_module is called just before the driver is removed 3651 * from memory. 3652 */ 3653 static void __exit hns3_exit_module(void) 3654 { 3655 pci_unregister_driver(&hns3_driver); 3656 hnae3_unregister_client(&client); 3657 } 3658 module_exit(hns3_exit_module); 3659 3660 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver"); 3661 MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 3662 MODULE_LICENSE("GPL"); 3663 MODULE_ALIAS("pci:hns-nic"); 3664 MODULE_VERSION(HNS3_MOD_VERSION); 3665