1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (c) 2018-2019 Hisilicon Limited. */
3 
4 #include <linux/debugfs.h>
5 #include <linux/device.h>
6 
7 #include "hnae3.h"
8 #include "hns3_enet.h"
9 
10 #define HNS3_DBG_READ_LEN 256
11 
12 static struct dentry *hns3_dbgfs_root;
13 
14 static int hns3_dbg_queue_info(struct hnae3_handle *h,
15 			       const char *cmd_buf)
16 {
17 	struct hns3_nic_priv *priv = h->priv;
18 	struct hns3_nic_ring_data *ring_data;
19 	struct hns3_enet_ring *ring;
20 	u32 base_add_l, base_add_h;
21 	u32 queue_num, queue_max;
22 	u32 value, i = 0;
23 	int cnt;
24 
25 	if (!priv->ring_data) {
26 		dev_err(&h->pdev->dev, "ring_data is NULL\n");
27 		return -EFAULT;
28 	}
29 
30 	queue_max = h->kinfo.num_tqps;
31 	cnt = kstrtouint(&cmd_buf[11], 0, &queue_num);
32 	if (cnt)
33 		queue_num = 0;
34 	else
35 		queue_max = queue_num + 1;
36 
37 	dev_info(&h->pdev->dev, "queue info\n");
38 
39 	if (queue_num >= h->kinfo.num_tqps) {
40 		dev_err(&h->pdev->dev,
41 			"Queue number(%u) is out of range(%u)\n", queue_num,
42 			h->kinfo.num_tqps - 1);
43 		return -EINVAL;
44 	}
45 
46 	ring_data = priv->ring_data;
47 	for (i = queue_num; i < queue_max; i++) {
48 		/* Each cycle needs to determine whether the instance is reset,
49 		 * to prevent reference to invalid memory. And need to ensure
50 		 * that the following code is executed within 100ms.
51 		 */
52 		if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
53 		    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
54 			return -EPERM;
55 
56 		ring = ring_data[(u32)(i + h->kinfo.num_tqps)].ring;
57 		base_add_h = readl_relaxed(ring->tqp->io_base +
58 					   HNS3_RING_RX_RING_BASEADDR_H_REG);
59 		base_add_l = readl_relaxed(ring->tqp->io_base +
60 					   HNS3_RING_RX_RING_BASEADDR_L_REG);
61 		dev_info(&h->pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i,
62 			 base_add_h, base_add_l);
63 
64 		value = readl_relaxed(ring->tqp->io_base +
65 				      HNS3_RING_RX_RING_BD_NUM_REG);
66 		dev_info(&h->pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value);
67 
68 		value = readl_relaxed(ring->tqp->io_base +
69 				      HNS3_RING_RX_RING_BD_LEN_REG);
70 		dev_info(&h->pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value);
71 
72 		value = readl_relaxed(ring->tqp->io_base +
73 				      HNS3_RING_RX_RING_TAIL_REG);
74 		dev_info(&h->pdev->dev, "RX(%d) RING TAIL: %u\n", i, value);
75 
76 		value = readl_relaxed(ring->tqp->io_base +
77 				      HNS3_RING_RX_RING_HEAD_REG);
78 		dev_info(&h->pdev->dev, "RX(%d) RING HEAD: %u\n", i, value);
79 
80 		value = readl_relaxed(ring->tqp->io_base +
81 				      HNS3_RING_RX_RING_FBDNUM_REG);
82 		dev_info(&h->pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value);
83 
84 		value = readl_relaxed(ring->tqp->io_base +
85 				      HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
86 		dev_info(&h->pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value);
87 
88 		ring = ring_data[i].ring;
89 		base_add_h = readl_relaxed(ring->tqp->io_base +
90 					   HNS3_RING_TX_RING_BASEADDR_H_REG);
91 		base_add_l = readl_relaxed(ring->tqp->io_base +
92 					   HNS3_RING_TX_RING_BASEADDR_L_REG);
93 		dev_info(&h->pdev->dev, "TX(%d) BASE ADD: 0x%08x%08x\n", i,
94 			 base_add_h, base_add_l);
95 
96 		value = readl_relaxed(ring->tqp->io_base +
97 				      HNS3_RING_TX_RING_BD_NUM_REG);
98 		dev_info(&h->pdev->dev, "TX(%d) RING BD NUM: %u\n", i, value);
99 
100 		value = readl_relaxed(ring->tqp->io_base +
101 				      HNS3_RING_TX_RING_TC_REG);
102 		dev_info(&h->pdev->dev, "TX(%d) RING TC: %u\n", i, value);
103 
104 		value = readl_relaxed(ring->tqp->io_base +
105 				      HNS3_RING_TX_RING_TAIL_REG);
106 		dev_info(&h->pdev->dev, "TX(%d) RING TAIL: %u\n", i, value);
107 
108 		value = readl_relaxed(ring->tqp->io_base +
109 				      HNS3_RING_TX_RING_HEAD_REG);
110 		dev_info(&h->pdev->dev, "TX(%d) RING HEAD: %u\n", i, value);
111 
112 		value = readl_relaxed(ring->tqp->io_base +
113 				      HNS3_RING_TX_RING_FBDNUM_REG);
114 		dev_info(&h->pdev->dev, "TX(%d) RING FBDNUM: %u\n", i, value);
115 
116 		value = readl_relaxed(ring->tqp->io_base +
117 				      HNS3_RING_TX_RING_OFFSET_REG);
118 		dev_info(&h->pdev->dev, "TX(%d) RING OFFSET: %u\n", i, value);
119 
120 		value = readl_relaxed(ring->tqp->io_base +
121 				      HNS3_RING_TX_RING_PKTNUM_RECORD_REG);
122 		dev_info(&h->pdev->dev, "TX(%d) RING PKTNUM: %u\n\n", i,
123 			 value);
124 	}
125 
126 	return 0;
127 }
128 
129 static int hns3_dbg_queue_map(struct hnae3_handle *h)
130 {
131 	struct hns3_nic_priv *priv = h->priv;
132 	struct hns3_nic_ring_data *ring_data;
133 	int i;
134 
135 	if (!h->ae_algo->ops->get_global_queue_id)
136 		return -EOPNOTSUPP;
137 
138 	dev_info(&h->pdev->dev, "map info for queue id and vector id\n");
139 	dev_info(&h->pdev->dev,
140 		 "local queue id | global queue id | vector id\n");
141 	for (i = 0; i < h->kinfo.num_tqps; i++) {
142 		u16 global_qid;
143 
144 		global_qid = h->ae_algo->ops->get_global_queue_id(h, i);
145 		ring_data = &priv->ring_data[i];
146 		if (!ring_data || !ring_data->ring ||
147 		    !ring_data->ring->tqp_vector)
148 			continue;
149 
150 		dev_info(&h->pdev->dev,
151 			 "      %4d            %4d            %4d\n",
152 			 i, global_qid,
153 			 ring_data->ring->tqp_vector->vector_irq);
154 	}
155 
156 	return 0;
157 }
158 
159 static int hns3_dbg_bd_info(struct hnae3_handle *h, const char *cmd_buf)
160 {
161 	struct hns3_nic_priv *priv = h->priv;
162 	struct hns3_nic_ring_data *ring_data;
163 	struct hns3_desc *rx_desc, *tx_desc;
164 	struct device *dev = &h->pdev->dev;
165 	struct hns3_enet_ring *ring;
166 	u32 tx_index, rx_index;
167 	u32 q_num, value;
168 	int cnt;
169 
170 	cnt = sscanf(&cmd_buf[8], "%u %u", &q_num, &tx_index);
171 	if (cnt == 2) {
172 		rx_index = tx_index;
173 	} else if (cnt != 1) {
174 		dev_err(dev, "bd info: bad command string, cnt=%d\n", cnt);
175 		return -EINVAL;
176 	}
177 
178 	if (q_num >= h->kinfo.num_tqps) {
179 		dev_err(dev, "Queue number(%u) is out of range(%u)\n", q_num,
180 			h->kinfo.num_tqps - 1);
181 		return -EINVAL;
182 	}
183 
184 	ring_data = priv->ring_data;
185 	ring  = ring_data[q_num].ring;
186 	value = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_TAIL_REG);
187 	tx_index = (cnt == 1) ? value : tx_index;
188 
189 	if (tx_index >= ring->desc_num) {
190 		dev_err(dev, "bd index (%u) is out of range(%u)\n", tx_index,
191 			ring->desc_num - 1);
192 		return -EINVAL;
193 	}
194 
195 	tx_desc = &ring->desc[tx_index];
196 	dev_info(dev, "TX Queue Num: %u, BD Index: %u\n", q_num, tx_index);
197 	dev_info(dev, "(TX) addr: 0x%llx\n", tx_desc->addr);
198 	dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.vlan_tag);
199 	dev_info(dev, "(TX)send_size: %u\n", tx_desc->tx.send_size);
200 	dev_info(dev, "(TX)vlan_tso: %u\n", tx_desc->tx.type_cs_vlan_tso);
201 	dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
202 	dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
203 	dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
204 	dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.outer_vlan_tag);
205 	dev_info(dev, "(TX)tv: %u\n", tx_desc->tx.tv);
206 	dev_info(dev, "(TX)vlan_msec: %u\n", tx_desc->tx.ol_type_vlan_msec);
207 	dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
208 	dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
209 	dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
210 	dev_info(dev, "(TX)paylen: %u\n", tx_desc->tx.paylen);
211 	dev_info(dev, "(TX)vld_ra_ri: %u\n", tx_desc->tx.bdtp_fe_sc_vld_ra_ri);
212 	dev_info(dev, "(TX)mss: %u\n", tx_desc->tx.mss);
213 
214 	ring  = ring_data[q_num + h->kinfo.num_tqps].ring;
215 	value = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_TAIL_REG);
216 	rx_index = (cnt == 1) ? value : tx_index;
217 	rx_desc	 = &ring->desc[rx_index];
218 
219 	dev_info(dev, "RX Queue Num: %u, BD Index: %u\n", q_num, rx_index);
220 	dev_info(dev, "(RX)addr: 0x%llx\n", rx_desc->addr);
221 	dev_info(dev, "(RX)pkt_len: %u\n", rx_desc->rx.pkt_len);
222 	dev_info(dev, "(RX)size: %u\n", rx_desc->rx.size);
223 	dev_info(dev, "(RX)rss_hash: %u\n", rx_desc->rx.rss_hash);
224 	dev_info(dev, "(RX)fd_id: %u\n", rx_desc->rx.fd_id);
225 	dev_info(dev, "(RX)vlan_tag: %u\n", rx_desc->rx.vlan_tag);
226 	dev_info(dev, "(RX)o_dm_vlan_id_fb: %u\n", rx_desc->rx.o_dm_vlan_id_fb);
227 	dev_info(dev, "(RX)ot_vlan_tag: %u\n", rx_desc->rx.ot_vlan_tag);
228 	dev_info(dev, "(RX)bd_base_info: %u\n", rx_desc->rx.bd_base_info);
229 
230 	return 0;
231 }
232 
233 static void hns3_dbg_help(struct hnae3_handle *h)
234 {
235 #define HNS3_DBG_BUF_LEN 256
236 
237 	char printf_buf[HNS3_DBG_BUF_LEN];
238 
239 	dev_info(&h->pdev->dev, "available commands\n");
240 	dev_info(&h->pdev->dev, "queue info [number]\n");
241 	dev_info(&h->pdev->dev, "queue map\n");
242 	dev_info(&h->pdev->dev, "bd info [q_num] <bd index>\n");
243 
244 	if (!hns3_is_phys_func(h->pdev))
245 		return;
246 
247 	dev_info(&h->pdev->dev, "dump fd tcam\n");
248 	dev_info(&h->pdev->dev, "dump tc\n");
249 	dev_info(&h->pdev->dev, "dump tm map [q_num]\n");
250 	dev_info(&h->pdev->dev, "dump tm\n");
251 	dev_info(&h->pdev->dev, "dump qos pause cfg\n");
252 	dev_info(&h->pdev->dev, "dump qos pri map\n");
253 	dev_info(&h->pdev->dev, "dump qos buf cfg\n");
254 	dev_info(&h->pdev->dev, "dump mng tbl\n");
255 	dev_info(&h->pdev->dev, "dump reset info\n");
256 	dev_info(&h->pdev->dev, "dump m7 info\n");
257 	dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n");
258 	dev_info(&h->pdev->dev, "dump mac tnl status\n");
259 
260 	memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
261 	strncat(printf_buf, "dump reg [[bios common] [ssu <prt_id>]",
262 		HNS3_DBG_BUF_LEN - 1);
263 	strncat(printf_buf + strlen(printf_buf),
264 		" [igu egu <prt_id>] [rpu <tc_queue_num>]",
265 		HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
266 	strncat(printf_buf + strlen(printf_buf),
267 		" [rtc] [ppp] [rcb] [tqp <q_num>]]\n",
268 		HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
269 	dev_info(&h->pdev->dev, "%s", printf_buf);
270 
271 	memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
272 	strncat(printf_buf, "dump reg dcb [port_id] [pri_id] [pg_id]",
273 		HNS3_DBG_BUF_LEN - 1);
274 	strncat(printf_buf + strlen(printf_buf), " [rq_id] [nq_id] [qset_id]\n",
275 		HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
276 	dev_info(&h->pdev->dev, "%s", printf_buf);
277 }
278 
279 static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
280 				 size_t count, loff_t *ppos)
281 {
282 	int uncopy_bytes;
283 	char *buf;
284 	int len;
285 
286 	if (*ppos != 0)
287 		return 0;
288 
289 	if (count < HNS3_DBG_READ_LEN)
290 		return -ENOSPC;
291 
292 	buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
293 	if (!buf)
294 		return -ENOMEM;
295 
296 	len = snprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
297 		       "Please echo help to cmd to get help information");
298 	uncopy_bytes = copy_to_user(buffer, buf, len);
299 
300 	kfree(buf);
301 
302 	if (uncopy_bytes)
303 		return -EFAULT;
304 
305 	return (*ppos = len);
306 }
307 
308 static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
309 				  size_t count, loff_t *ppos)
310 {
311 	struct hnae3_handle *handle = filp->private_data;
312 	struct hns3_nic_priv *priv  = handle->priv;
313 	char *cmd_buf, *cmd_buf_tmp;
314 	int uncopied_bytes;
315 	int ret = 0;
316 
317 	if (*ppos != 0)
318 		return 0;
319 
320 	/* Judge if the instance is being reset. */
321 	if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
322 	    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
323 		return 0;
324 
325 	cmd_buf = kzalloc(count + 1, GFP_KERNEL);
326 	if (!cmd_buf)
327 		return count;
328 
329 	uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
330 	if (uncopied_bytes) {
331 		kfree(cmd_buf);
332 		return -EFAULT;
333 	}
334 
335 	cmd_buf[count] = '\0';
336 
337 	cmd_buf_tmp = strchr(cmd_buf, '\n');
338 	if (cmd_buf_tmp) {
339 		*cmd_buf_tmp = '\0';
340 		count = cmd_buf_tmp - cmd_buf + 1;
341 	}
342 
343 	if (strncmp(cmd_buf, "help", 4) == 0)
344 		hns3_dbg_help(handle);
345 	else if (strncmp(cmd_buf, "queue info", 10) == 0)
346 		ret = hns3_dbg_queue_info(handle, cmd_buf);
347 	else if (strncmp(cmd_buf, "queue map", 9) == 0)
348 		ret = hns3_dbg_queue_map(handle);
349 	else if (strncmp(cmd_buf, "bd info", 7) == 0)
350 		ret = hns3_dbg_bd_info(handle, cmd_buf);
351 	else if (handle->ae_algo->ops->dbg_run_cmd)
352 		ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf);
353 	else
354 		ret = -EOPNOTSUPP;
355 
356 	if (ret)
357 		hns3_dbg_help(handle);
358 
359 	kfree(cmd_buf);
360 	cmd_buf = NULL;
361 
362 	return count;
363 }
364 
365 static const struct file_operations hns3_dbg_cmd_fops = {
366 	.owner = THIS_MODULE,
367 	.open  = simple_open,
368 	.read  = hns3_dbg_cmd_read,
369 	.write = hns3_dbg_cmd_write,
370 };
371 
372 void hns3_dbg_init(struct hnae3_handle *handle)
373 {
374 	const char *name = pci_name(handle->pdev);
375 	struct dentry *pfile;
376 
377 	handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root);
378 	if (!handle->hnae3_dbgfs)
379 		return;
380 
381 	pfile = debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
382 				    &hns3_dbg_cmd_fops);
383 	if (!pfile) {
384 		debugfs_remove_recursive(handle->hnae3_dbgfs);
385 		handle->hnae3_dbgfs = NULL;
386 		dev_warn(&handle->pdev->dev, "create file for %s fail\n",
387 			 name);
388 	}
389 }
390 
391 void hns3_dbg_uninit(struct hnae3_handle *handle)
392 {
393 	debugfs_remove_recursive(handle->hnae3_dbgfs);
394 	handle->hnae3_dbgfs = NULL;
395 }
396 
397 void hns3_dbg_register_debugfs(const char *debugfs_dir_name)
398 {
399 	hns3_dbgfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
400 	if (!hns3_dbgfs_root) {
401 		pr_warn("Register debugfs for %s fail\n", debugfs_dir_name);
402 		return;
403 	}
404 }
405 
406 void hns3_dbg_unregister_debugfs(void)
407 {
408 	debugfs_remove_recursive(hns3_dbgfs_root);
409 	hns3_dbgfs_root = NULL;
410 }
411