1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
3 
4 #ifndef __HNAE3_H
5 #define __HNAE3_H
6 
7 /* Names used in this framework:
8  *      ae handle (handle):
9  *        a set of queues provided by AE
10  *      ring buffer queue (rbq):
11  *        the channel between upper layer and the AE, can do tx and rx
12  *      ring:
13  *        a tx or rx channel within a rbq
14  *      ring description (desc):
15  *        an element in the ring with packet information
16  *      buffer:
17  *        a memory region referred by desc with the full packet payload
18  *
19  * "num" means a static number set as a parameter, "count" mean a dynamic
20  *   number set while running
21  * "cb" means control block
22  */
23 
24 #include <linux/acpi.h>
25 #include <linux/dcbnl.h>
26 #include <linux/delay.h>
27 #include <linux/device.h>
28 #include <linux/module.h>
29 #include <linux/netdevice.h>
30 #include <linux/pci.h>
31 #include <linux/types.h>
32 
33 #define HNAE3_MOD_VERSION "1.0"
34 
35 /* Device IDs */
36 #define HNAE3_DEV_ID_GE				0xA220
37 #define HNAE3_DEV_ID_25GE			0xA221
38 #define HNAE3_DEV_ID_25GE_RDMA			0xA222
39 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC		0xA223
40 #define HNAE3_DEV_ID_50GE_RDMA			0xA224
41 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC		0xA225
42 #define HNAE3_DEV_ID_100G_RDMA_MACSEC		0xA226
43 #define HNAE3_DEV_ID_100G_VF			0xA22E
44 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF	0xA22F
45 
46 #define HNAE3_CLASS_NAME_SIZE 16
47 
48 #define HNAE3_DEV_INITED_B			0x0
49 #define HNAE3_DEV_SUPPORT_ROCE_B		0x1
50 #define HNAE3_DEV_SUPPORT_DCB_B			0x2
51 #define HNAE3_KNIC_CLIENT_INITED_B		0x3
52 #define HNAE3_UNIC_CLIENT_INITED_B		0x4
53 #define HNAE3_ROCE_CLIENT_INITED_B		0x5
54 #define HNAE3_DEV_SUPPORT_FD_B			0x6
55 #define HNAE3_DEV_SUPPORT_GRO_B			0x7
56 
57 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
58 		BIT(HNAE3_DEV_SUPPORT_ROCE_B))
59 
60 #define hnae3_dev_roce_supported(hdev) \
61 	hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
62 
63 #define hnae3_dev_dcb_supported(hdev) \
64 	hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
65 
66 #define hnae3_dev_fd_supported(hdev) \
67 	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B)
68 
69 #define hnae3_dev_gro_supported(hdev) \
70 	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B)
71 
72 #define ring_ptr_move_fw(ring, p) \
73 	((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
74 #define ring_ptr_move_bw(ring, p) \
75 	((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
76 
77 enum hns_desc_type {
78 	DESC_TYPE_SKB,
79 	DESC_TYPE_PAGE,
80 };
81 
82 struct hnae3_handle;
83 
84 struct hnae3_queue {
85 	void __iomem *io_base;
86 	struct hnae3_ae_algo *ae_algo;
87 	struct hnae3_handle *handle;
88 	int tqp_index;	/* index in a handle */
89 	u32 buf_size;	/* size for hnae_desc->addr, preset by AE */
90 	u16 tx_desc_num;/* total number of tx desc */
91 	u16 rx_desc_num;/* total number of rx desc */
92 };
93 
94 /*hnae3 loop mode*/
95 enum hnae3_loop {
96 	HNAE3_LOOP_APP,
97 	HNAE3_LOOP_SERIAL_SERDES,
98 	HNAE3_LOOP_PARALLEL_SERDES,
99 	HNAE3_LOOP_PHY,
100 	HNAE3_LOOP_NONE,
101 };
102 
103 enum hnae3_client_type {
104 	HNAE3_CLIENT_KNIC,
105 	HNAE3_CLIENT_ROCE,
106 };
107 
108 /* mac media type */
109 enum hnae3_media_type {
110 	HNAE3_MEDIA_TYPE_UNKNOWN,
111 	HNAE3_MEDIA_TYPE_FIBER,
112 	HNAE3_MEDIA_TYPE_COPPER,
113 	HNAE3_MEDIA_TYPE_BACKPLANE,
114 	HNAE3_MEDIA_TYPE_NONE,
115 };
116 
117 /* must be consistent with definition in firmware */
118 enum hnae3_module_type {
119 	HNAE3_MODULE_TYPE_UNKNOWN	= 0x00,
120 	HNAE3_MODULE_TYPE_FIBRE_LR	= 0x01,
121 	HNAE3_MODULE_TYPE_FIBRE_SR	= 0x02,
122 	HNAE3_MODULE_TYPE_AOC		= 0x03,
123 	HNAE3_MODULE_TYPE_CR		= 0x04,
124 	HNAE3_MODULE_TYPE_KR		= 0x05,
125 	HNAE3_MODULE_TYPE_TP		= 0x06,
126 
127 };
128 
129 enum hnae3_fec_mode {
130 	HNAE3_FEC_AUTO = 0,
131 	HNAE3_FEC_BASER,
132 	HNAE3_FEC_RS,
133 	HNAE3_FEC_USER_DEF,
134 };
135 
136 enum hnae3_reset_notify_type {
137 	HNAE3_UP_CLIENT,
138 	HNAE3_DOWN_CLIENT,
139 	HNAE3_INIT_CLIENT,
140 	HNAE3_UNINIT_CLIENT,
141 	HNAE3_RESTORE_CLIENT,
142 };
143 
144 enum hnae3_reset_type {
145 	HNAE3_VF_RESET,
146 	HNAE3_VF_FUNC_RESET,
147 	HNAE3_VF_PF_FUNC_RESET,
148 	HNAE3_VF_FULL_RESET,
149 	HNAE3_FLR_RESET,
150 	HNAE3_FUNC_RESET,
151 	HNAE3_GLOBAL_RESET,
152 	HNAE3_IMP_RESET,
153 	HNAE3_UNKNOWN_RESET,
154 	HNAE3_NONE_RESET,
155 };
156 
157 enum hnae3_flr_state {
158 	HNAE3_FLR_DOWN,
159 	HNAE3_FLR_DONE,
160 };
161 
162 enum hnae3_port_base_vlan_state {
163 	HNAE3_PORT_BASE_VLAN_DISABLE,
164 	HNAE3_PORT_BASE_VLAN_ENABLE,
165 	HNAE3_PORT_BASE_VLAN_MODIFY,
166 	HNAE3_PORT_BASE_VLAN_NOCHANGE,
167 };
168 
169 struct hnae3_vector_info {
170 	u8 __iomem *io_addr;
171 	int vector;
172 };
173 
174 #define HNAE3_RING_TYPE_B 0
175 #define HNAE3_RING_TYPE_TX 0
176 #define HNAE3_RING_TYPE_RX 1
177 #define HNAE3_RING_GL_IDX_S 0
178 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
179 #define HNAE3_RING_GL_RX 0
180 #define HNAE3_RING_GL_TX 1
181 
182 struct hnae3_ring_chain_node {
183 	struct hnae3_ring_chain_node *next;
184 	u32 tqp_index;
185 	u32 flag;
186 	u32 int_gl_idx;
187 };
188 
189 #define HNAE3_IS_TX_RING(node) \
190 	(((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
191 
192 struct hnae3_client_ops {
193 	int (*init_instance)(struct hnae3_handle *handle);
194 	void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
195 	void (*link_status_change)(struct hnae3_handle *handle, bool state);
196 	int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
197 	int (*reset_notify)(struct hnae3_handle *handle,
198 			    enum hnae3_reset_notify_type type);
199 	enum hnae3_reset_type (*process_hw_error)(struct hnae3_handle *handle);
200 };
201 
202 #define HNAE3_CLIENT_NAME_LENGTH 16
203 struct hnae3_client {
204 	char name[HNAE3_CLIENT_NAME_LENGTH];
205 	unsigned long state;
206 	enum hnae3_client_type type;
207 	const struct hnae3_client_ops *ops;
208 	struct list_head node;
209 };
210 
211 struct hnae3_ae_dev {
212 	struct pci_dev *pdev;
213 	const struct hnae3_ae_ops *ops;
214 	struct list_head node;
215 	u32 flag;
216 	unsigned long hw_err_reset_req;
217 	enum hnae3_reset_type reset_type;
218 	void *priv;
219 };
220 
221 /* This struct defines the operation on the handle.
222  *
223  * init_ae_dev(): (mandatory)
224  *   Get PF configure from pci_dev and initialize PF hardware
225  * uninit_ae_dev()
226  *   Disable PF device and release PF resource
227  * register_client
228  *   Register client to ae_dev
229  * unregister_client()
230  *   Unregister client from ae_dev
231  * start()
232  *   Enable the hardware
233  * stop()
234  *   Disable the hardware
235  * start_client()
236  *   Inform the hclge that client has been started
237  * stop_client()
238  *   Inform the hclge that client has been stopped
239  * get_status()
240  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
241  *   non-ok
242  * get_ksettings_an_result()
243  *   Get negotiation status,speed and duplex
244  * get_media_type()
245  *   Get media type of MAC
246  * check_port_speed()
247  *   Check target speed whether is supported
248  * adjust_link()
249  *   Adjust link status
250  * set_loopback()
251  *   Set loopback
252  * set_promisc_mode
253  *   Set promisc mode
254  * set_mtu()
255  *   set mtu
256  * get_pauseparam()
257  *   get tx and rx of pause frame use
258  * set_pauseparam()
259  *   set tx and rx of pause frame use
260  * set_autoneg()
261  *   set auto autonegotiation of pause frame use
262  * get_autoneg()
263  *   get auto autonegotiation of pause frame use
264  * restart_autoneg()
265  *   restart autonegotiation
266  * halt_autoneg()
267  *   halt/resume autonegotiation when autonegotiation on
268  * get_coalesce_usecs()
269  *   get usecs to delay a TX interrupt after a packet is sent
270  * get_rx_max_coalesced_frames()
271  *   get Maximum number of packets to be sent before a TX interrupt.
272  * set_coalesce_usecs()
273  *   set usecs to delay a TX interrupt after a packet is sent
274  * set_coalesce_frames()
275  *   set Maximum number of packets to be sent before a TX interrupt.
276  * get_mac_addr()
277  *   get mac address
278  * set_mac_addr()
279  *   set mac address
280  * add_uc_addr
281  *   Add unicast addr to mac table
282  * rm_uc_addr
283  *   Remove unicast addr from mac table
284  * set_mc_addr()
285  *   Set multicast address
286  * add_mc_addr
287  *   Add multicast address to mac table
288  * rm_mc_addr
289  *   Remove multicast address from mac table
290  * update_stats()
291  *   Update Old network device statistics
292  * get_ethtool_stats()
293  *   Get ethtool network device statistics
294  * get_strings()
295  *   Get a set of strings that describe the requested objects
296  * get_sset_count()
297  *   Get number of strings that @get_strings will write
298  * update_led_status()
299  *   Update the led status
300  * set_led_id()
301  *   Set led id
302  * get_regs()
303  *   Get regs dump
304  * get_regs_len()
305  *   Get the len of the regs dump
306  * get_rss_key_size()
307  *   Get rss key size
308  * get_rss_indir_size()
309  *   Get rss indirection table size
310  * get_rss()
311  *   Get rss table
312  * set_rss()
313  *   Set rss table
314  * get_tc_size()
315  *   Get tc size of handle
316  * get_vector()
317  *   Get vector number and vector information
318  * put_vector()
319  *   Put the vector in hdev
320  * map_ring_to_vector()
321  *   Map rings to vector
322  * unmap_ring_from_vector()
323  *   Unmap rings from vector
324  * reset_queue()
325  *   Reset queue
326  * get_fw_version()
327  *   Get firmware version
328  * get_mdix_mode()
329  *   Get media typr of phy
330  * enable_vlan_filter()
331  *   Enable vlan filter
332  * set_vlan_filter()
333  *   Set vlan filter config of Ports
334  * set_vf_vlan_filter()
335  *   Set vlan filter config of vf
336  * restore_vlan_table()
337  *   Restore vlan filter entries after reset
338  * enable_hw_strip_rxvtag()
339  *   Enable/disable hardware strip vlan tag of packets received
340  * set_gro_en
341  *   Enable/disable HW GRO
342  * add_arfs_entry
343  *   Check the 5-tuples of flow, and create flow director rule
344  */
345 struct hnae3_ae_ops {
346 	int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
347 	void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
348 	void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
349 	void (*flr_done)(struct hnae3_ae_dev *ae_dev);
350 	int (*init_client_instance)(struct hnae3_client *client,
351 				    struct hnae3_ae_dev *ae_dev);
352 	void (*uninit_client_instance)(struct hnae3_client *client,
353 				       struct hnae3_ae_dev *ae_dev);
354 	int (*start)(struct hnae3_handle *handle);
355 	void (*stop)(struct hnae3_handle *handle);
356 	int (*client_start)(struct hnae3_handle *handle);
357 	void (*client_stop)(struct hnae3_handle *handle);
358 	int (*get_status)(struct hnae3_handle *handle);
359 	void (*get_ksettings_an_result)(struct hnae3_handle *handle,
360 					u8 *auto_neg, u32 *speed, u8 *duplex);
361 
362 	int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
363 				   u8 duplex);
364 
365 	void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
366 			       u8 *module_type);
367 	int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
368 	void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
369 			u8 *fec_mode);
370 	int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
371 	void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
372 	int (*set_loopback)(struct hnae3_handle *handle,
373 			    enum hnae3_loop loop_mode, bool en);
374 
375 	int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
376 				bool en_mc_pmc);
377 	int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
378 
379 	void (*get_pauseparam)(struct hnae3_handle *handle,
380 			       u32 *auto_neg, u32 *rx_en, u32 *tx_en);
381 	int (*set_pauseparam)(struct hnae3_handle *handle,
382 			      u32 auto_neg, u32 rx_en, u32 tx_en);
383 
384 	int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
385 	int (*get_autoneg)(struct hnae3_handle *handle);
386 	int (*restart_autoneg)(struct hnae3_handle *handle);
387 	int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
388 
389 	void (*get_coalesce_usecs)(struct hnae3_handle *handle,
390 				   u32 *tx_usecs, u32 *rx_usecs);
391 	void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
392 					    u32 *tx_frames, u32 *rx_frames);
393 	int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
394 	int (*set_coalesce_frames)(struct hnae3_handle *handle,
395 				   u32 coalesce_frames);
396 	void (*get_coalesce_range)(struct hnae3_handle *handle,
397 				   u32 *tx_frames_low, u32 *rx_frames_low,
398 				   u32 *tx_frames_high, u32 *rx_frames_high,
399 				   u32 *tx_usecs_low, u32 *rx_usecs_low,
400 				   u32 *tx_usecs_high, u32 *rx_usecs_high);
401 
402 	void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
403 	int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
404 			    bool is_first);
405 	int (*do_ioctl)(struct hnae3_handle *handle,
406 			struct ifreq *ifr, int cmd);
407 	int (*add_uc_addr)(struct hnae3_handle *handle,
408 			   const unsigned char *addr);
409 	int (*rm_uc_addr)(struct hnae3_handle *handle,
410 			  const unsigned char *addr);
411 	int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
412 	int (*add_mc_addr)(struct hnae3_handle *handle,
413 			   const unsigned char *addr);
414 	int (*rm_mc_addr)(struct hnae3_handle *handle,
415 			  const unsigned char *addr);
416 	void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
417 	void (*update_stats)(struct hnae3_handle *handle,
418 			     struct net_device_stats *net_stats);
419 	void (*get_stats)(struct hnae3_handle *handle, u64 *data);
420 	void (*get_mac_pause_stats)(struct hnae3_handle *handle, u64 *tx_cnt,
421 				    u64 *rx_cnt);
422 	void (*get_strings)(struct hnae3_handle *handle,
423 			    u32 stringset, u8 *data);
424 	int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
425 
426 	void (*get_regs)(struct hnae3_handle *handle, u32 *version,
427 			 void *data);
428 	int (*get_regs_len)(struct hnae3_handle *handle);
429 
430 	u32 (*get_rss_key_size)(struct hnae3_handle *handle);
431 	u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
432 	int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
433 		       u8 *hfunc);
434 	int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
435 		       const u8 *key, const u8 hfunc);
436 	int (*set_rss_tuple)(struct hnae3_handle *handle,
437 			     struct ethtool_rxnfc *cmd);
438 	int (*get_rss_tuple)(struct hnae3_handle *handle,
439 			     struct ethtool_rxnfc *cmd);
440 
441 	int (*get_tc_size)(struct hnae3_handle *handle);
442 
443 	int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
444 			  struct hnae3_vector_info *vector_info);
445 	int (*put_vector)(struct hnae3_handle *handle, int vector_num);
446 	int (*map_ring_to_vector)(struct hnae3_handle *handle,
447 				  int vector_num,
448 				  struct hnae3_ring_chain_node *vr_chain);
449 	int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
450 				      int vector_num,
451 				      struct hnae3_ring_chain_node *vr_chain);
452 
453 	int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
454 	u32 (*get_fw_version)(struct hnae3_handle *handle);
455 	void (*get_mdix_mode)(struct hnae3_handle *handle,
456 			      u8 *tp_mdix_ctrl, u8 *tp_mdix);
457 
458 	void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
459 	int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
460 			       u16 vlan_id, bool is_kill);
461 	int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
462 				  u16 vlan, u8 qos, __be16 proto);
463 	int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
464 	void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
465 	enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
466 						 unsigned long *addr);
467 	void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
468 					  enum hnae3_reset_type rst_type);
469 	void (*get_channels)(struct hnae3_handle *handle,
470 			     struct ethtool_channels *ch);
471 	void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
472 				      u16 *alloc_tqps, u16 *max_rss_size);
473 	int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
474 			    bool rxfh_configured);
475 	void (*get_flowctrl_adv)(struct hnae3_handle *handle,
476 				 u32 *flowctrl_adv);
477 	int (*set_led_id)(struct hnae3_handle *handle,
478 			  enum ethtool_phys_id_state status);
479 	void (*get_link_mode)(struct hnae3_handle *handle,
480 			      unsigned long *supported,
481 			      unsigned long *advertising);
482 	int (*add_fd_entry)(struct hnae3_handle *handle,
483 			    struct ethtool_rxnfc *cmd);
484 	int (*del_fd_entry)(struct hnae3_handle *handle,
485 			    struct ethtool_rxnfc *cmd);
486 	void (*del_all_fd_entries)(struct hnae3_handle *handle,
487 				   bool clear_list);
488 	int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
489 			       struct ethtool_rxnfc *cmd);
490 	int (*get_fd_rule_info)(struct hnae3_handle *handle,
491 				struct ethtool_rxnfc *cmd);
492 	int (*get_fd_all_rules)(struct hnae3_handle *handle,
493 				struct ethtool_rxnfc *cmd, u32 *rule_locs);
494 	int (*restore_fd_rules)(struct hnae3_handle *handle);
495 	void (*enable_fd)(struct hnae3_handle *handle, bool enable);
496 	int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
497 			      u16 flow_id, struct flow_keys *fkeys);
498 	int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf);
499 	pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
500 	bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
501 	bool (*ae_dev_resetting)(struct hnae3_handle *handle);
502 	unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
503 	int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
504 	u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
505 	void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
506 	int (*mac_connect_phy)(struct hnae3_handle *handle);
507 	void (*mac_disconnect_phy)(struct hnae3_handle *handle);
508 	void (*restore_vlan_table)(struct hnae3_handle *handle);
509 };
510 
511 struct hnae3_dcb_ops {
512 	/* IEEE 802.1Qaz std */
513 	int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
514 	int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
515 	int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
516 	int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
517 
518 	/* DCBX configuration */
519 	u8   (*getdcbx)(struct hnae3_handle *);
520 	u8   (*setdcbx)(struct hnae3_handle *, u8);
521 
522 	int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
523 };
524 
525 struct hnae3_ae_algo {
526 	const struct hnae3_ae_ops *ops;
527 	struct list_head node;
528 	const struct pci_device_id *pdev_id_table;
529 };
530 
531 #define HNAE3_INT_NAME_LEN        (IFNAMSIZ + 16)
532 #define HNAE3_ITR_COUNTDOWN_START 100
533 
534 struct hnae3_tc_info {
535 	u16	tqp_offset;	/* TQP offset from base TQP */
536 	u16	tqp_count;	/* Total TQPs */
537 	u8	tc;		/* TC index */
538 	bool	enable;		/* If this TC is enable or not */
539 };
540 
541 #define HNAE3_MAX_TC		8
542 #define HNAE3_MAX_USER_PRIO	8
543 struct hnae3_knic_private_info {
544 	struct net_device *netdev; /* Set by KNIC client when init instance */
545 	u16 rss_size;		   /* Allocated RSS queues */
546 	u16 req_rss_size;
547 	u16 rx_buf_len;
548 	u16 num_tx_desc;
549 	u16 num_rx_desc;
550 
551 	u8 num_tc;		   /* Total number of enabled TCs */
552 	u8 prio_tc[HNAE3_MAX_USER_PRIO];  /* TC indexed by prio */
553 	struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
554 
555 	u16 num_tqps;		  /* total number of TQPs in this handle */
556 	struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
557 	const struct hnae3_dcb_ops *dcb_ops;
558 
559 	u16 int_rl_setting;
560 	enum pkt_hash_types rss_type;
561 };
562 
563 struct hnae3_roce_private_info {
564 	struct net_device *netdev;
565 	void __iomem *roce_io_base;
566 	int base_vector;
567 	int num_vectors;
568 
569 	/* The below attributes defined for RoCE client, hnae3 gives
570 	 * initial values to them, and RoCE client can modify and use
571 	 * them.
572 	 */
573 	unsigned long reset_state;
574 	unsigned long instance_state;
575 	unsigned long state;
576 };
577 
578 struct hnae3_unic_private_info {
579 	struct net_device *netdev;
580 	u16 rx_buf_len;
581 	u16 num_tx_desc;
582 	u16 num_rx_desc;
583 
584 	u16 num_tqps;	/* total number of tqps in this handle */
585 	struct hnae3_queue **tqp;  /* array base of all TQPs of this instance */
586 };
587 
588 #define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
589 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
590 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK	BIT(2)
591 #define HNAE3_SUPPORT_VF	      BIT(3)
592 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK	BIT(4)
593 
594 #define HNAE3_USER_UPE		BIT(0)	/* unicast promisc enabled by user */
595 #define HNAE3_USER_MPE		BIT(1)	/* mulitcast promisc enabled by user */
596 #define HNAE3_BPE		BIT(2)	/* broadcast promisc enable */
597 #define HNAE3_OVERFLOW_UPE	BIT(3)	/* unicast mac vlan overflow */
598 #define HNAE3_OVERFLOW_MPE	BIT(4)	/* multicast mac vlan overflow */
599 #define HNAE3_VLAN_FLTR		BIT(5)	/* enable vlan filter */
600 #define HNAE3_UPE		(HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
601 #define HNAE3_MPE		(HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
602 
603 struct hnae3_handle {
604 	struct hnae3_client *client;
605 	struct pci_dev *pdev;
606 	void *priv;
607 	struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
608 	u64 flags; /* Indicate the capabilities for this handle*/
609 
610 	union {
611 		struct net_device *netdev; /* first member */
612 		struct hnae3_knic_private_info kinfo;
613 		struct hnae3_unic_private_info uinfo;
614 		struct hnae3_roce_private_info rinfo;
615 	};
616 
617 	u32 numa_node_mask;	/* for multi-chip support */
618 
619 	enum hnae3_port_base_vlan_state port_base_vlan_state;
620 
621 	u8 netdev_flags;
622 	struct dentry *hnae3_dbgfs;
623 
624 	/* Network interface message level enabled bits */
625 	u32 msg_enable;
626 };
627 
628 #define hnae3_set_field(origin, mask, shift, val) \
629 	do { \
630 		(origin) &= (~(mask)); \
631 		(origin) |= ((val) << (shift)) & (mask); \
632 	} while (0)
633 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
634 
635 #define hnae3_set_bit(origin, shift, val) \
636 	hnae3_set_field((origin), (0x1 << (shift)), (shift), (val))
637 #define hnae3_get_bit(origin, shift) \
638 	hnae3_get_field((origin), (0x1 << (shift)), (shift))
639 
640 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
641 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
642 
643 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
644 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
645 
646 void hnae3_unregister_client(struct hnae3_client *client);
647 int hnae3_register_client(struct hnae3_client *client);
648 
649 void hnae3_set_client_init_flag(struct hnae3_client *client,
650 				struct hnae3_ae_dev *ae_dev,
651 				unsigned int inited);
652 #endif
653