1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #ifndef __HNAE3_H 5 #define __HNAE3_H 6 7 /* Names used in this framework: 8 * ae handle (handle): 9 * a set of queues provided by AE 10 * ring buffer queue (rbq): 11 * the channel between upper layer and the AE, can do tx and rx 12 * ring: 13 * a tx or rx channel within a rbq 14 * ring description (desc): 15 * an element in the ring with packet information 16 * buffer: 17 * a memory region referred by desc with the full packet payload 18 * 19 * "num" means a static number set as a parameter, "count" mean a dynamic 20 * number set while running 21 * "cb" means control block 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/dcbnl.h> 26 #include <linux/delay.h> 27 #include <linux/device.h> 28 #include <linux/module.h> 29 #include <linux/netdevice.h> 30 #include <linux/pci.h> 31 #include <linux/types.h> 32 33 #define HNAE3_MOD_VERSION "1.0" 34 35 /* Device IDs */ 36 #define HNAE3_DEV_ID_GE 0xA220 37 #define HNAE3_DEV_ID_25GE 0xA221 38 #define HNAE3_DEV_ID_25GE_RDMA 0xA222 39 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223 40 #define HNAE3_DEV_ID_50GE_RDMA 0xA224 41 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225 42 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226 43 #define HNAE3_DEV_ID_100G_VF 0xA22E 44 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F 45 46 #define HNAE3_CLASS_NAME_SIZE 16 47 48 #define HNAE3_DEV_INITED_B 0x0 49 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1 50 #define HNAE3_DEV_SUPPORT_DCB_B 0x2 51 #define HNAE3_KNIC_CLIENT_INITED_B 0x3 52 #define HNAE3_UNIC_CLIENT_INITED_B 0x4 53 #define HNAE3_ROCE_CLIENT_INITED_B 0x5 54 #define HNAE3_DEV_SUPPORT_FD_B 0x6 55 #define HNAE3_DEV_SUPPORT_GRO_B 0x7 56 57 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\ 58 BIT(HNAE3_DEV_SUPPORT_ROCE_B)) 59 60 #define hnae3_dev_roce_supported(hdev) \ 61 hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) 62 63 #define hnae3_dev_dcb_supported(hdev) \ 64 hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) 65 66 #define hnae3_dev_fd_supported(hdev) \ 67 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B) 68 69 #define hnae3_dev_gro_supported(hdev) \ 70 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B) 71 72 #define ring_ptr_move_fw(ring, p) \ 73 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 74 #define ring_ptr_move_bw(ring, p) \ 75 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 76 77 enum hns_desc_type { 78 DESC_TYPE_SKB, 79 DESC_TYPE_PAGE, 80 }; 81 82 struct hnae3_handle; 83 84 struct hnae3_queue { 85 void __iomem *io_base; 86 struct hnae3_ae_algo *ae_algo; 87 struct hnae3_handle *handle; 88 int tqp_index; /* index in a handle */ 89 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 90 u16 desc_num; /* total number of desc */ 91 }; 92 93 /*hnae3 loop mode*/ 94 enum hnae3_loop { 95 HNAE3_LOOP_APP, 96 HNAE3_LOOP_SERIAL_SERDES, 97 HNAE3_LOOP_PARALLEL_SERDES, 98 HNAE3_LOOP_PHY, 99 HNAE3_LOOP_NONE, 100 }; 101 102 enum hnae3_client_type { 103 HNAE3_CLIENT_KNIC, 104 HNAE3_CLIENT_UNIC, 105 HNAE3_CLIENT_ROCE, 106 }; 107 108 enum hnae3_dev_type { 109 HNAE3_DEV_KNIC, 110 HNAE3_DEV_UNIC, 111 }; 112 113 /* mac media type */ 114 enum hnae3_media_type { 115 HNAE3_MEDIA_TYPE_UNKNOWN, 116 HNAE3_MEDIA_TYPE_FIBER, 117 HNAE3_MEDIA_TYPE_COPPER, 118 HNAE3_MEDIA_TYPE_BACKPLANE, 119 HNAE3_MEDIA_TYPE_NONE, 120 }; 121 122 enum hnae3_reset_notify_type { 123 HNAE3_UP_CLIENT, 124 HNAE3_DOWN_CLIENT, 125 HNAE3_INIT_CLIENT, 126 HNAE3_UNINIT_CLIENT, 127 }; 128 129 enum hnae3_reset_type { 130 HNAE3_VF_RESET, 131 HNAE3_VF_FUNC_RESET, 132 HNAE3_VF_PF_FUNC_RESET, 133 HNAE3_VF_FULL_RESET, 134 HNAE3_FLR_RESET, 135 HNAE3_FUNC_RESET, 136 HNAE3_CORE_RESET, 137 HNAE3_GLOBAL_RESET, 138 HNAE3_IMP_RESET, 139 HNAE3_UNKNOWN_RESET, 140 HNAE3_NONE_RESET, 141 }; 142 143 enum hnae3_flr_state { 144 HNAE3_FLR_DOWN, 145 HNAE3_FLR_DONE, 146 }; 147 148 struct hnae3_vector_info { 149 u8 __iomem *io_addr; 150 int vector; 151 }; 152 153 #define HNAE3_RING_TYPE_B 0 154 #define HNAE3_RING_TYPE_TX 0 155 #define HNAE3_RING_TYPE_RX 1 156 #define HNAE3_RING_GL_IDX_S 0 157 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0) 158 #define HNAE3_RING_GL_RX 0 159 #define HNAE3_RING_GL_TX 1 160 161 struct hnae3_ring_chain_node { 162 struct hnae3_ring_chain_node *next; 163 u32 tqp_index; 164 u32 flag; 165 u32 int_gl_idx; 166 }; 167 168 #define HNAE3_IS_TX_RING(node) \ 169 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX) 170 171 struct hnae3_client_ops { 172 int (*init_instance)(struct hnae3_handle *handle); 173 void (*uninit_instance)(struct hnae3_handle *handle, bool reset); 174 void (*link_status_change)(struct hnae3_handle *handle, bool state); 175 int (*setup_tc)(struct hnae3_handle *handle, u8 tc); 176 int (*reset_notify)(struct hnae3_handle *handle, 177 enum hnae3_reset_notify_type type); 178 enum hnae3_reset_type (*process_hw_error)(struct hnae3_handle *handle); 179 }; 180 181 #define HNAE3_CLIENT_NAME_LENGTH 16 182 struct hnae3_client { 183 char name[HNAE3_CLIENT_NAME_LENGTH]; 184 unsigned long state; 185 enum hnae3_client_type type; 186 const struct hnae3_client_ops *ops; 187 struct list_head node; 188 }; 189 190 struct hnae3_ae_dev { 191 struct pci_dev *pdev; 192 const struct hnae3_ae_ops *ops; 193 struct list_head node; 194 u32 flag; 195 enum hnae3_dev_type dev_type; 196 enum hnae3_reset_type reset_type; 197 void *priv; 198 }; 199 200 /* This struct defines the operation on the handle. 201 * 202 * init_ae_dev(): (mandatory) 203 * Get PF configure from pci_dev and initialize PF hardware 204 * uninit_ae_dev() 205 * Disable PF device and release PF resource 206 * register_client 207 * Register client to ae_dev 208 * unregister_client() 209 * Unregister client from ae_dev 210 * start() 211 * Enable the hardware 212 * stop() 213 * Disable the hardware 214 * start_client() 215 * Inform the hclge that client has been started 216 * stop_client() 217 * Inform the hclge that client has been stopped 218 * get_status() 219 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 220 * non-ok 221 * get_ksettings_an_result() 222 * Get negotiation status,speed and duplex 223 * update_speed_duplex_h() 224 * Update hardware speed and duplex 225 * get_media_type() 226 * Get media type of MAC 227 * adjust_link() 228 * Adjust link status 229 * set_loopback() 230 * Set loopback 231 * set_promisc_mode 232 * Set promisc mode 233 * set_mtu() 234 * set mtu 235 * get_pauseparam() 236 * get tx and rx of pause frame use 237 * set_pauseparam() 238 * set tx and rx of pause frame use 239 * set_autoneg() 240 * set auto autonegotiation of pause frame use 241 * get_autoneg() 242 * get auto autonegotiation of pause frame use 243 * get_coalesce_usecs() 244 * get usecs to delay a TX interrupt after a packet is sent 245 * get_rx_max_coalesced_frames() 246 * get Maximum number of packets to be sent before a TX interrupt. 247 * set_coalesce_usecs() 248 * set usecs to delay a TX interrupt after a packet is sent 249 * set_coalesce_frames() 250 * set Maximum number of packets to be sent before a TX interrupt. 251 * get_mac_addr() 252 * get mac address 253 * set_mac_addr() 254 * set mac address 255 * add_uc_addr 256 * Add unicast addr to mac table 257 * rm_uc_addr 258 * Remove unicast addr from mac table 259 * set_mc_addr() 260 * Set multicast address 261 * add_mc_addr 262 * Add multicast address to mac table 263 * rm_mc_addr 264 * Remove multicast address from mac table 265 * update_stats() 266 * Update Old network device statistics 267 * get_ethtool_stats() 268 * Get ethtool network device statistics 269 * get_strings() 270 * Get a set of strings that describe the requested objects 271 * get_sset_count() 272 * Get number of strings that @get_strings will write 273 * update_led_status() 274 * Update the led status 275 * set_led_id() 276 * Set led id 277 * get_regs() 278 * Get regs dump 279 * get_regs_len() 280 * Get the len of the regs dump 281 * get_rss_key_size() 282 * Get rss key size 283 * get_rss_indir_size() 284 * Get rss indirection table size 285 * get_rss() 286 * Get rss table 287 * set_rss() 288 * Set rss table 289 * get_tc_size() 290 * Get tc size of handle 291 * get_vector() 292 * Get vector number and vector information 293 * put_vector() 294 * Put the vector in hdev 295 * map_ring_to_vector() 296 * Map rings to vector 297 * unmap_ring_from_vector() 298 * Unmap rings from vector 299 * reset_queue() 300 * Reset queue 301 * get_fw_version() 302 * Get firmware version 303 * get_mdix_mode() 304 * Get media typr of phy 305 * enable_vlan_filter() 306 * Enable vlan filter 307 * set_vlan_filter() 308 * Set vlan filter config of Ports 309 * set_vf_vlan_filter() 310 * Set vlan filter config of vf 311 * enable_hw_strip_rxvtag() 312 * Enable/disable hardware strip vlan tag of packets received 313 * set_gro_en 314 * Enable/disable HW GRO 315 */ 316 struct hnae3_ae_ops { 317 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); 318 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev); 319 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev); 320 void (*flr_done)(struct hnae3_ae_dev *ae_dev); 321 int (*init_client_instance)(struct hnae3_client *client, 322 struct hnae3_ae_dev *ae_dev); 323 void (*uninit_client_instance)(struct hnae3_client *client, 324 struct hnae3_ae_dev *ae_dev); 325 int (*start)(struct hnae3_handle *handle); 326 void (*stop)(struct hnae3_handle *handle); 327 int (*client_start)(struct hnae3_handle *handle); 328 void (*client_stop)(struct hnae3_handle *handle); 329 int (*get_status)(struct hnae3_handle *handle); 330 void (*get_ksettings_an_result)(struct hnae3_handle *handle, 331 u8 *auto_neg, u32 *speed, u8 *duplex); 332 333 int (*update_speed_duplex_h)(struct hnae3_handle *handle); 334 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed, 335 u8 duplex); 336 337 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type); 338 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex); 339 int (*set_loopback)(struct hnae3_handle *handle, 340 enum hnae3_loop loop_mode, bool en); 341 342 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc, 343 bool en_mc_pmc); 344 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu); 345 346 void (*get_pauseparam)(struct hnae3_handle *handle, 347 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 348 int (*set_pauseparam)(struct hnae3_handle *handle, 349 u32 auto_neg, u32 rx_en, u32 tx_en); 350 351 int (*set_autoneg)(struct hnae3_handle *handle, bool enable); 352 int (*get_autoneg)(struct hnae3_handle *handle); 353 354 void (*get_coalesce_usecs)(struct hnae3_handle *handle, 355 u32 *tx_usecs, u32 *rx_usecs); 356 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle, 357 u32 *tx_frames, u32 *rx_frames); 358 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout); 359 int (*set_coalesce_frames)(struct hnae3_handle *handle, 360 u32 coalesce_frames); 361 void (*get_coalesce_range)(struct hnae3_handle *handle, 362 u32 *tx_frames_low, u32 *rx_frames_low, 363 u32 *tx_frames_high, u32 *rx_frames_high, 364 u32 *tx_usecs_low, u32 *rx_usecs_low, 365 u32 *tx_usecs_high, u32 *rx_usecs_high); 366 367 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p); 368 int (*set_mac_addr)(struct hnae3_handle *handle, void *p, 369 bool is_first); 370 int (*do_ioctl)(struct hnae3_handle *handle, 371 struct ifreq *ifr, int cmd); 372 int (*add_uc_addr)(struct hnae3_handle *handle, 373 const unsigned char *addr); 374 int (*rm_uc_addr)(struct hnae3_handle *handle, 375 const unsigned char *addr); 376 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr); 377 int (*add_mc_addr)(struct hnae3_handle *handle, 378 const unsigned char *addr); 379 int (*rm_mc_addr)(struct hnae3_handle *handle, 380 const unsigned char *addr); 381 void (*set_tso_stats)(struct hnae3_handle *handle, int enable); 382 void (*update_stats)(struct hnae3_handle *handle, 383 struct net_device_stats *net_stats); 384 void (*get_stats)(struct hnae3_handle *handle, u64 *data); 385 386 void (*get_strings)(struct hnae3_handle *handle, 387 u32 stringset, u8 *data); 388 int (*get_sset_count)(struct hnae3_handle *handle, int stringset); 389 390 void (*get_regs)(struct hnae3_handle *handle, u32 *version, 391 void *data); 392 int (*get_regs_len)(struct hnae3_handle *handle); 393 394 u32 (*get_rss_key_size)(struct hnae3_handle *handle); 395 u32 (*get_rss_indir_size)(struct hnae3_handle *handle); 396 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key, 397 u8 *hfunc); 398 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir, 399 const u8 *key, const u8 hfunc); 400 int (*set_rss_tuple)(struct hnae3_handle *handle, 401 struct ethtool_rxnfc *cmd); 402 int (*get_rss_tuple)(struct hnae3_handle *handle, 403 struct ethtool_rxnfc *cmd); 404 405 int (*get_tc_size)(struct hnae3_handle *handle); 406 407 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num, 408 struct hnae3_vector_info *vector_info); 409 int (*put_vector)(struct hnae3_handle *handle, int vector_num); 410 int (*map_ring_to_vector)(struct hnae3_handle *handle, 411 int vector_num, 412 struct hnae3_ring_chain_node *vr_chain); 413 int (*unmap_ring_from_vector)(struct hnae3_handle *handle, 414 int vector_num, 415 struct hnae3_ring_chain_node *vr_chain); 416 417 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); 418 u32 (*get_fw_version)(struct hnae3_handle *handle); 419 void (*get_mdix_mode)(struct hnae3_handle *handle, 420 u8 *tp_mdix_ctrl, u8 *tp_mdix); 421 422 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable); 423 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto, 424 u16 vlan_id, bool is_kill); 425 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, 426 u16 vlan, u8 qos, __be16 proto); 427 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); 428 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle); 429 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev, 430 enum hnae3_reset_type rst_type); 431 void (*get_channels)(struct hnae3_handle *handle, 432 struct ethtool_channels *ch); 433 void (*get_tqps_and_rss_info)(struct hnae3_handle *h, 434 u16 *alloc_tqps, u16 *max_rss_size); 435 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num); 436 void (*get_flowctrl_adv)(struct hnae3_handle *handle, 437 u32 *flowctrl_adv); 438 int (*set_led_id)(struct hnae3_handle *handle, 439 enum ethtool_phys_id_state status); 440 void (*get_link_mode)(struct hnae3_handle *handle, 441 unsigned long *supported, 442 unsigned long *advertising); 443 int (*add_fd_entry)(struct hnae3_handle *handle, 444 struct ethtool_rxnfc *cmd); 445 int (*del_fd_entry)(struct hnae3_handle *handle, 446 struct ethtool_rxnfc *cmd); 447 void (*del_all_fd_entries)(struct hnae3_handle *handle, 448 bool clear_list); 449 int (*get_fd_rule_cnt)(struct hnae3_handle *handle, 450 struct ethtool_rxnfc *cmd); 451 int (*get_fd_rule_info)(struct hnae3_handle *handle, 452 struct ethtool_rxnfc *cmd); 453 int (*get_fd_all_rules)(struct hnae3_handle *handle, 454 struct ethtool_rxnfc *cmd, u32 *rule_locs); 455 int (*restore_fd_rules)(struct hnae3_handle *handle); 456 void (*enable_fd)(struct hnae3_handle *handle, bool enable); 457 int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf); 458 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); 459 bool (*get_hw_reset_stat)(struct hnae3_handle *handle); 460 bool (*ae_dev_resetting)(struct hnae3_handle *handle); 461 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle); 462 int (*set_gro_en)(struct hnae3_handle *handle, int enable); 463 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id); 464 void (*set_timer_task)(struct hnae3_handle *handle, bool enable); 465 }; 466 467 struct hnae3_dcb_ops { 468 /* IEEE 802.1Qaz std */ 469 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *); 470 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *); 471 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *); 472 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *); 473 474 /* DCBX configuration */ 475 u8 (*getdcbx)(struct hnae3_handle *); 476 u8 (*setdcbx)(struct hnae3_handle *, u8); 477 478 int (*map_update)(struct hnae3_handle *); 479 int (*setup_tc)(struct hnae3_handle *, u8, u8 *); 480 }; 481 482 struct hnae3_ae_algo { 483 const struct hnae3_ae_ops *ops; 484 struct list_head node; 485 const struct pci_device_id *pdev_id_table; 486 }; 487 488 #define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16) 489 #define HNAE3_ITR_COUNTDOWN_START 100 490 491 struct hnae3_tc_info { 492 u16 tqp_offset; /* TQP offset from base TQP */ 493 u16 tqp_count; /* Total TQPs */ 494 u8 tc; /* TC index */ 495 bool enable; /* If this TC is enable or not */ 496 }; 497 498 #define HNAE3_MAX_TC 8 499 #define HNAE3_MAX_USER_PRIO 8 500 struct hnae3_knic_private_info { 501 struct net_device *netdev; /* Set by KNIC client when init instance */ 502 u16 rss_size; /* Allocated RSS queues */ 503 u16 rx_buf_len; 504 u16 num_desc; 505 506 u8 num_tc; /* Total number of enabled TCs */ 507 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ 508 struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ 509 510 u16 num_tqps; /* total number of TQPs in this handle */ 511 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */ 512 const struct hnae3_dcb_ops *dcb_ops; 513 514 u16 int_rl_setting; 515 enum pkt_hash_types rss_type; 516 }; 517 518 struct hnae3_roce_private_info { 519 struct net_device *netdev; 520 void __iomem *roce_io_base; 521 int base_vector; 522 int num_vectors; 523 524 /* The below attributes defined for RoCE client, hnae3 gives 525 * initial values to them, and RoCE client can modify and use 526 * them. 527 */ 528 unsigned long reset_state; 529 unsigned long instance_state; 530 unsigned long state; 531 }; 532 533 struct hnae3_unic_private_info { 534 struct net_device *netdev; 535 u16 rx_buf_len; 536 u16 num_desc; 537 u16 num_tqps; /* total number of tqps in this handle */ 538 struct hnae3_queue **tqp; /* array base of all TQPs of this instance */ 539 }; 540 541 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0) 542 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1) 543 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2) 544 #define HNAE3_SUPPORT_VF BIT(3) 545 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4) 546 547 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */ 548 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */ 549 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */ 550 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */ 551 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */ 552 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */ 553 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE) 554 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE) 555 556 struct hnae3_handle { 557 struct hnae3_client *client; 558 struct pci_dev *pdev; 559 void *priv; 560 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ 561 u64 flags; /* Indicate the capabilities for this handle*/ 562 563 union { 564 struct net_device *netdev; /* first member */ 565 struct hnae3_knic_private_info kinfo; 566 struct hnae3_unic_private_info uinfo; 567 struct hnae3_roce_private_info rinfo; 568 }; 569 570 u32 numa_node_mask; /* for multi-chip support */ 571 572 u8 netdev_flags; 573 struct dentry *hnae3_dbgfs; 574 }; 575 576 #define hnae3_set_field(origin, mask, shift, val) \ 577 do { \ 578 (origin) &= (~(mask)); \ 579 (origin) |= ((val) << (shift)) & (mask); \ 580 } while (0) 581 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 582 583 #define hnae3_set_bit(origin, shift, val) \ 584 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val)) 585 #define hnae3_get_bit(origin, shift) \ 586 hnae3_get_field((origin), (0x1 << (shift)), (shift)) 587 588 void hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); 589 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev); 590 591 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo); 592 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo); 593 594 void hnae3_unregister_client(struct hnae3_client *client); 595 int hnae3_register_client(struct hnae3_client *client); 596 597 void hnae3_set_client_init_flag(struct hnae3_client *client, 598 struct hnae3_ae_dev *ae_dev, int inited); 599 #endif 600