xref: /openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hnae3.h (revision 9977a8c3497a8f7f7f951994f298a8e4d961234f)
1 /*
2  * Copyright (c) 2016-2017 Hisilicon Limited.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  */
9 
10 #ifndef __HNAE3_H
11 #define __HNAE3_H
12 
13 /* Names used in this framework:
14  *      ae handle (handle):
15  *        a set of queues provided by AE
16  *      ring buffer queue (rbq):
17  *        the channel between upper layer and the AE, can do tx and rx
18  *      ring:
19  *        a tx or rx channel within a rbq
20  *      ring description (desc):
21  *        an element in the ring with packet information
22  *      buffer:
23  *        a memory region referred by desc with the full packet payload
24  *
25  * "num" means a static number set as a parameter, "count" mean a dynamic
26  *   number set while running
27  * "cb" means control block
28  */
29 
30 #include <linux/acpi.h>
31 #include <linux/dcbnl.h>
32 #include <linux/delay.h>
33 #include <linux/device.h>
34 #include <linux/module.h>
35 #include <linux/netdevice.h>
36 #include <linux/pci.h>
37 #include <linux/types.h>
38 
39 /* Device IDs */
40 #define HNAE3_DEV_ID_GE				0xA220
41 #define HNAE3_DEV_ID_25GE			0xA221
42 #define HNAE3_DEV_ID_25GE_RDMA			0xA222
43 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC		0xA223
44 #define HNAE3_DEV_ID_50GE_RDMA			0xA224
45 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC		0xA225
46 #define HNAE3_DEV_ID_100G_RDMA_MACSEC		0xA226
47 #define HNAE3_DEV_ID_100G_VF			0xA22E
48 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF	0xA22F
49 
50 #define HNAE3_CLASS_NAME_SIZE 16
51 
52 #define HNAE3_DEV_INITED_B			0x0
53 #define HNAE3_DEV_SUPPORT_ROCE_B		0x1
54 #define HNAE3_DEV_SUPPORT_DCB_B			0x2
55 
56 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
57 		BIT(HNAE3_DEV_SUPPORT_ROCE_B))
58 
59 #define hnae3_dev_roce_supported(hdev) \
60 	hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
61 
62 #define hnae3_dev_dcb_supported(hdev) \
63 	hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
64 
65 #define ring_ptr_move_fw(ring, p) \
66 	((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
67 #define ring_ptr_move_bw(ring, p) \
68 	((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
69 
70 enum hns_desc_type {
71 	DESC_TYPE_SKB,
72 	DESC_TYPE_PAGE,
73 };
74 
75 struct hnae3_handle;
76 
77 struct hnae3_queue {
78 	void __iomem *io_base;
79 	struct hnae3_ae_algo *ae_algo;
80 	struct hnae3_handle *handle;
81 	int tqp_index;	/* index in a handle */
82 	u32 buf_size;	/* size for hnae_desc->addr, preset by AE */
83 	u16 desc_num;	/* total number of desc */
84 };
85 
86 /*hnae3 loop mode*/
87 enum hnae3_loop {
88 	HNAE3_MAC_INTER_LOOP_MAC,
89 	HNAE3_MAC_INTER_LOOP_SERDES,
90 	HNAE3_MAC_INTER_LOOP_PHY,
91 	HNAE3_MAC_LOOP_NONE,
92 };
93 
94 enum hnae3_client_type {
95 	HNAE3_CLIENT_KNIC,
96 	HNAE3_CLIENT_UNIC,
97 	HNAE3_CLIENT_ROCE,
98 };
99 
100 enum hnae3_dev_type {
101 	HNAE3_DEV_KNIC,
102 	HNAE3_DEV_UNIC,
103 };
104 
105 /* mac media type */
106 enum hnae3_media_type {
107 	HNAE3_MEDIA_TYPE_UNKNOWN,
108 	HNAE3_MEDIA_TYPE_FIBER,
109 	HNAE3_MEDIA_TYPE_COPPER,
110 	HNAE3_MEDIA_TYPE_BACKPLANE,
111 };
112 
113 enum hnae3_reset_notify_type {
114 	HNAE3_UP_CLIENT,
115 	HNAE3_DOWN_CLIENT,
116 	HNAE3_INIT_CLIENT,
117 	HNAE3_UNINIT_CLIENT,
118 };
119 
120 enum hnae3_reset_type {
121 	HNAE3_FUNC_RESET,
122 	HNAE3_CORE_RESET,
123 	HNAE3_GLOBAL_RESET,
124 	HNAE3_IMP_RESET,
125 	HNAE3_NONE_RESET,
126 };
127 
128 struct hnae3_vector_info {
129 	u8 __iomem *io_addr;
130 	int vector;
131 };
132 
133 #define HNAE3_RING_TYPE_B 0
134 #define HNAE3_RING_TYPE_TX 0
135 #define HNAE3_RING_TYPE_RX 1
136 #define HNAE3_RING_GL_IDX_S 0
137 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
138 #define HNAE3_RING_GL_RX 0
139 #define HNAE3_RING_GL_TX 1
140 
141 struct hnae3_ring_chain_node {
142 	struct hnae3_ring_chain_node *next;
143 	u32 tqp_index;
144 	u32 flag;
145 	u32 int_gl_idx;
146 };
147 
148 #define HNAE3_IS_TX_RING(node) \
149 	(((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
150 
151 struct hnae3_client_ops {
152 	int (*init_instance)(struct hnae3_handle *handle);
153 	void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
154 	void (*link_status_change)(struct hnae3_handle *handle, bool state);
155 	int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
156 	int (*reset_notify)(struct hnae3_handle *handle,
157 			    enum hnae3_reset_notify_type type);
158 };
159 
160 #define HNAE3_CLIENT_NAME_LENGTH 16
161 struct hnae3_client {
162 	char name[HNAE3_CLIENT_NAME_LENGTH];
163 	u16 version;
164 	unsigned long state;
165 	enum hnae3_client_type type;
166 	const struct hnae3_client_ops *ops;
167 	struct list_head node;
168 };
169 
170 struct hnae3_ae_dev {
171 	struct pci_dev *pdev;
172 	const struct hnae3_ae_ops *ops;
173 	struct list_head node;
174 	u32 flag;
175 	enum hnae3_dev_type dev_type;
176 	void *priv;
177 };
178 
179 /* This struct defines the operation on the handle.
180  *
181  * init_ae_dev(): (mandatory)
182  *   Get PF configure from pci_dev and initialize PF hardware
183  * uninit_ae_dev()
184  *   Disable PF device and release PF resource
185  * register_client
186  *   Register client to ae_dev
187  * unregister_client()
188  *   Unregister client from ae_dev
189  * start()
190  *   Enable the hardware
191  * stop()
192  *   Disable the hardware
193  * get_status()
194  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
195  *   non-ok
196  * get_ksettings_an_result()
197  *   Get negotiation status,speed and duplex
198  * update_speed_duplex_h()
199  *   Update hardware speed and duplex
200  * get_media_type()
201  *   Get media type of MAC
202  * adjust_link()
203  *   Adjust link status
204  * set_loopback()
205  *   Set loopback
206  * set_promisc_mode
207  *   Set promisc mode
208  * set_mtu()
209  *   set mtu
210  * get_pauseparam()
211  *   get tx and rx of pause frame use
212  * set_pauseparam()
213  *   set tx and rx of pause frame use
214  * set_autoneg()
215  *   set auto autonegotiation of pause frame use
216  * get_autoneg()
217  *   get auto autonegotiation of pause frame use
218  * get_coalesce_usecs()
219  *   get usecs to delay a TX interrupt after a packet is sent
220  * get_rx_max_coalesced_frames()
221  *   get Maximum number of packets to be sent before a TX interrupt.
222  * set_coalesce_usecs()
223  *   set usecs to delay a TX interrupt after a packet is sent
224  * set_coalesce_frames()
225  *   set Maximum number of packets to be sent before a TX interrupt.
226  * get_mac_addr()
227  *   get mac address
228  * set_mac_addr()
229  *   set mac address
230  * add_uc_addr
231  *   Add unicast addr to mac table
232  * rm_uc_addr
233  *   Remove unicast addr from mac table
234  * set_mc_addr()
235  *   Set multicast address
236  * add_mc_addr
237  *   Add multicast address to mac table
238  * rm_mc_addr
239  *   Remove multicast address from mac table
240  * update_stats()
241  *   Update Old network device statistics
242  * get_ethtool_stats()
243  *   Get ethtool network device statistics
244  * get_strings()
245  *   Get a set of strings that describe the requested objects
246  * get_sset_count()
247  *   Get number of strings that @get_strings will write
248  * update_led_status()
249  *   Update the led status
250  * set_led_id()
251  *   Set led id
252  * get_regs()
253  *   Get regs dump
254  * get_regs_len()
255  *   Get the len of the regs dump
256  * get_rss_key_size()
257  *   Get rss key size
258  * get_rss_indir_size()
259  *   Get rss indirection table size
260  * get_rss()
261  *   Get rss table
262  * set_rss()
263  *   Set rss table
264  * get_tc_size()
265  *   Get tc size of handle
266  * get_vector()
267  *   Get vector number and vector information
268  * map_ring_to_vector()
269  *   Map rings to vector
270  * unmap_ring_from_vector()
271  *   Unmap rings from vector
272  * add_tunnel_udp()
273  *   Add tunnel information to hardware
274  * del_tunnel_udp()
275  *   Delete tunnel information from hardware
276  * reset_queue()
277  *   Reset queue
278  * get_fw_version()
279  *   Get firmware version
280  * get_mdix_mode()
281  *   Get media typr of phy
282  * enable_vlan_filter()
283  *   Enable vlan filter
284  * set_vlan_filter()
285  *   Set vlan filter config of Ports
286  * set_vf_vlan_filter()
287  *   Set vlan filter config of vf
288  * enable_hw_strip_rxvtag()
289  *   Enable/disable hardware strip vlan tag of packets received
290  */
291 struct hnae3_ae_ops {
292 	int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
293 	void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
294 
295 	int (*init_client_instance)(struct hnae3_client *client,
296 				    struct hnae3_ae_dev *ae_dev);
297 	void (*uninit_client_instance)(struct hnae3_client *client,
298 				       struct hnae3_ae_dev *ae_dev);
299 	int (*start)(struct hnae3_handle *handle);
300 	void (*stop)(struct hnae3_handle *handle);
301 	int (*get_status)(struct hnae3_handle *handle);
302 	void (*get_ksettings_an_result)(struct hnae3_handle *handle,
303 					u8 *auto_neg, u32 *speed, u8 *duplex);
304 
305 	int (*update_speed_duplex_h)(struct hnae3_handle *handle);
306 	int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
307 				   u8 duplex);
308 
309 	void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type);
310 	void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
311 	int (*set_loopback)(struct hnae3_handle *handle,
312 			    enum hnae3_loop loop_mode, bool en);
313 
314 	void (*set_promisc_mode)(struct hnae3_handle *handle, u32 en);
315 	int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
316 
317 	void (*get_pauseparam)(struct hnae3_handle *handle,
318 			       u32 *auto_neg, u32 *rx_en, u32 *tx_en);
319 	int (*set_pauseparam)(struct hnae3_handle *handle,
320 			      u32 auto_neg, u32 rx_en, u32 tx_en);
321 
322 	int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
323 	int (*get_autoneg)(struct hnae3_handle *handle);
324 
325 	void (*get_coalesce_usecs)(struct hnae3_handle *handle,
326 				   u32 *tx_usecs, u32 *rx_usecs);
327 	void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
328 					    u32 *tx_frames, u32 *rx_frames);
329 	int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
330 	int (*set_coalesce_frames)(struct hnae3_handle *handle,
331 				   u32 coalesce_frames);
332 	void (*get_coalesce_range)(struct hnae3_handle *handle,
333 				   u32 *tx_frames_low, u32 *rx_frames_low,
334 				   u32 *tx_frames_high, u32 *rx_frames_high,
335 				   u32 *tx_usecs_low, u32 *rx_usecs_low,
336 				   u32 *tx_usecs_high, u32 *rx_usecs_high);
337 
338 	void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
339 	int (*set_mac_addr)(struct hnae3_handle *handle, void *p);
340 	int (*add_uc_addr)(struct hnae3_handle *handle,
341 			   const unsigned char *addr);
342 	int (*rm_uc_addr)(struct hnae3_handle *handle,
343 			  const unsigned char *addr);
344 	int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
345 	int (*add_mc_addr)(struct hnae3_handle *handle,
346 			   const unsigned char *addr);
347 	int (*rm_mc_addr)(struct hnae3_handle *handle,
348 			  const unsigned char *addr);
349 
350 	void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
351 	void (*update_stats)(struct hnae3_handle *handle,
352 			     struct net_device_stats *net_stats);
353 	void (*get_stats)(struct hnae3_handle *handle, u64 *data);
354 
355 	void (*get_strings)(struct hnae3_handle *handle,
356 			    u32 stringset, u8 *data);
357 	int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
358 
359 	void (*get_regs)(struct hnae3_handle *handle, u32 *version,
360 			 void *data);
361 	int (*get_regs_len)(struct hnae3_handle *handle);
362 
363 	u32 (*get_rss_key_size)(struct hnae3_handle *handle);
364 	u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
365 	int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
366 		       u8 *hfunc);
367 	int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
368 		       const u8 *key, const u8 hfunc);
369 	int (*set_rss_tuple)(struct hnae3_handle *handle,
370 			     struct ethtool_rxnfc *cmd);
371 	int (*get_rss_tuple)(struct hnae3_handle *handle,
372 			     struct ethtool_rxnfc *cmd);
373 
374 	int (*get_tc_size)(struct hnae3_handle *handle);
375 
376 	int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
377 			  struct hnae3_vector_info *vector_info);
378 	int (*map_ring_to_vector)(struct hnae3_handle *handle,
379 				  int vector_num,
380 				  struct hnae3_ring_chain_node *vr_chain);
381 	int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
382 				      int vector_num,
383 				      struct hnae3_ring_chain_node *vr_chain);
384 
385 	int (*add_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
386 	int (*del_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
387 
388 	void (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
389 	u32 (*get_fw_version)(struct hnae3_handle *handle);
390 	void (*get_mdix_mode)(struct hnae3_handle *handle,
391 			      u8 *tp_mdix_ctrl, u8 *tp_mdix);
392 
393 	void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
394 	int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
395 			       u16 vlan_id, bool is_kill);
396 	int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
397 				  u16 vlan, u8 qos, __be16 proto);
398 	int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
399 	void (*reset_event)(struct hnae3_handle *handle,
400 			    enum hnae3_reset_type reset);
401 	void (*get_channels)(struct hnae3_handle *handle,
402 			     struct ethtool_channels *ch);
403 	void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
404 				      u16 *free_tqps, u16 *max_rss_size);
405 	int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num);
406 	void (*get_flowctrl_adv)(struct hnae3_handle *handle,
407 				 u32 *flowctrl_adv);
408 	int (*set_led_id)(struct hnae3_handle *handle,
409 			  enum ethtool_phys_id_state status);
410 };
411 
412 struct hnae3_dcb_ops {
413 	/* IEEE 802.1Qaz std */
414 	int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
415 	int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
416 	int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
417 	int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
418 
419 	/* DCBX configuration */
420 	u8   (*getdcbx)(struct hnae3_handle *);
421 	u8   (*setdcbx)(struct hnae3_handle *, u8);
422 
423 	int (*map_update)(struct hnae3_handle *);
424 	int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
425 };
426 
427 struct hnae3_ae_algo {
428 	const struct hnae3_ae_ops *ops;
429 	struct list_head node;
430 	char name[HNAE3_CLASS_NAME_SIZE];
431 	const struct pci_device_id *pdev_id_table;
432 };
433 
434 #define HNAE3_INT_NAME_LEN        (IFNAMSIZ + 16)
435 #define HNAE3_ITR_COUNTDOWN_START 100
436 
437 struct hnae3_tc_info {
438 	u16	tqp_offset;	/* TQP offset from base TQP */
439 	u16	tqp_count;	/* Total TQPs */
440 	u8	tc;		/* TC index */
441 	bool	enable;		/* If this TC is enable or not */
442 };
443 
444 #define HNAE3_MAX_TC		8
445 #define HNAE3_MAX_USER_PRIO	8
446 struct hnae3_knic_private_info {
447 	struct net_device *netdev; /* Set by KNIC client when init instance */
448 	u16 rss_size;		   /* Allocated RSS queues */
449 	u16 rx_buf_len;
450 	u16 num_desc;
451 
452 	u8 num_tc;		   /* Total number of enabled TCs */
453 	u8 prio_tc[HNAE3_MAX_USER_PRIO];  /* TC indexed by prio */
454 	struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
455 
456 	u16 num_tqps;		  /* total number of TQPs in this handle */
457 	struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
458 	const struct hnae3_dcb_ops *dcb_ops;
459 
460 	u16 int_rl_setting;
461 };
462 
463 struct hnae3_roce_private_info {
464 	struct net_device *netdev;
465 	void __iomem *roce_io_base;
466 	int base_vector;
467 	int num_vectors;
468 };
469 
470 struct hnae3_unic_private_info {
471 	struct net_device *netdev;
472 	u16 rx_buf_len;
473 	u16 num_desc;
474 	u16 num_tqps;	/* total number of tqps in this handle */
475 	struct hnae3_queue **tqp;  /* array base of all TQPs of this instance */
476 };
477 
478 #define HNAE3_SUPPORT_MAC_LOOPBACK    BIT(0)
479 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
480 #define HNAE3_SUPPORT_SERDES_LOOPBACK BIT(2)
481 #define HNAE3_SUPPORT_VF	      BIT(3)
482 
483 struct hnae3_handle {
484 	struct hnae3_client *client;
485 	struct pci_dev *pdev;
486 	void *priv;
487 	struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
488 	u64 flags; /* Indicate the capabilities for this handle*/
489 
490 	union {
491 		struct net_device *netdev; /* first member */
492 		struct hnae3_knic_private_info kinfo;
493 		struct hnae3_unic_private_info uinfo;
494 		struct hnae3_roce_private_info rinfo;
495 	};
496 
497 	u32 numa_node_mask;	/* for multi-chip support */
498 };
499 
500 #define hnae_set_field(origin, mask, shift, val) \
501 	do { \
502 		(origin) &= (~(mask)); \
503 		(origin) |= ((val) << (shift)) & (mask); \
504 	} while (0)
505 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
506 
507 #define hnae_set_bit(origin, shift, val) \
508 	hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
509 #define hnae_get_bit(origin, shift) \
510 	hnae_get_field((origin), (0x1 << (shift)), (shift))
511 
512 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
513 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
514 
515 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
516 int hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
517 
518 void hnae3_unregister_client(struct hnae3_client *client);
519 int hnae3_register_client(struct hnae3_client *client);
520 #endif
521