1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #ifndef __HNAE3_H 5 #define __HNAE3_H 6 7 /* Names used in this framework: 8 * ae handle (handle): 9 * a set of queues provided by AE 10 * ring buffer queue (rbq): 11 * the channel between upper layer and the AE, can do tx and rx 12 * ring: 13 * a tx or rx channel within a rbq 14 * ring description (desc): 15 * an element in the ring with packet information 16 * buffer: 17 * a memory region referred by desc with the full packet payload 18 * 19 * "num" means a static number set as a parameter, "count" mean a dynamic 20 * number set while running 21 * "cb" means control block 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/dcbnl.h> 26 #include <linux/delay.h> 27 #include <linux/device.h> 28 #include <linux/module.h> 29 #include <linux/netdevice.h> 30 #include <linux/pci.h> 31 #include <linux/types.h> 32 33 #define HNAE3_MOD_VERSION "1.0" 34 35 /* Device IDs */ 36 #define HNAE3_DEV_ID_GE 0xA220 37 #define HNAE3_DEV_ID_25GE 0xA221 38 #define HNAE3_DEV_ID_25GE_RDMA 0xA222 39 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223 40 #define HNAE3_DEV_ID_50GE_RDMA 0xA224 41 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225 42 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226 43 #define HNAE3_DEV_ID_100G_VF 0xA22E 44 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F 45 46 #define HNAE3_CLASS_NAME_SIZE 16 47 48 #define HNAE3_DEV_INITED_B 0x0 49 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1 50 #define HNAE3_DEV_SUPPORT_DCB_B 0x2 51 #define HNAE3_KNIC_CLIENT_INITED_B 0x3 52 #define HNAE3_UNIC_CLIENT_INITED_B 0x4 53 #define HNAE3_ROCE_CLIENT_INITED_B 0x5 54 #define HNAE3_DEV_SUPPORT_FD_B 0x6 55 #define HNAE3_DEV_SUPPORT_GRO_B 0x7 56 57 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\ 58 BIT(HNAE3_DEV_SUPPORT_ROCE_B)) 59 60 #define hnae3_dev_roce_supported(hdev) \ 61 hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) 62 63 #define hnae3_dev_dcb_supported(hdev) \ 64 hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) 65 66 #define hnae3_dev_fd_supported(hdev) \ 67 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B) 68 69 #define hnae3_dev_gro_supported(hdev) \ 70 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B) 71 72 #define ring_ptr_move_fw(ring, p) \ 73 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 74 #define ring_ptr_move_bw(ring, p) \ 75 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 76 77 enum hns_desc_type { 78 DESC_TYPE_SKB, 79 DESC_TYPE_PAGE, 80 }; 81 82 struct hnae3_handle; 83 84 struct hnae3_queue { 85 void __iomem *io_base; 86 struct hnae3_ae_algo *ae_algo; 87 struct hnae3_handle *handle; 88 int tqp_index; /* index in a handle */ 89 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 90 u16 desc_num; /* total number of desc */ 91 }; 92 93 /*hnae3 loop mode*/ 94 enum hnae3_loop { 95 HNAE3_LOOP_APP, 96 HNAE3_LOOP_SERIAL_SERDES, 97 HNAE3_LOOP_PARALLEL_SERDES, 98 HNAE3_LOOP_PHY, 99 HNAE3_LOOP_NONE, 100 }; 101 102 enum hnae3_client_type { 103 HNAE3_CLIENT_KNIC, 104 HNAE3_CLIENT_UNIC, 105 HNAE3_CLIENT_ROCE, 106 }; 107 108 enum hnae3_dev_type { 109 HNAE3_DEV_KNIC, 110 HNAE3_DEV_UNIC, 111 }; 112 113 /* mac media type */ 114 enum hnae3_media_type { 115 HNAE3_MEDIA_TYPE_UNKNOWN, 116 HNAE3_MEDIA_TYPE_FIBER, 117 HNAE3_MEDIA_TYPE_COPPER, 118 HNAE3_MEDIA_TYPE_BACKPLANE, 119 HNAE3_MEDIA_TYPE_NONE, 120 }; 121 122 enum hnae3_reset_notify_type { 123 HNAE3_UP_CLIENT, 124 HNAE3_DOWN_CLIENT, 125 HNAE3_INIT_CLIENT, 126 HNAE3_UNINIT_CLIENT, 127 HNAE3_RESTORE_CLIENT, 128 }; 129 130 enum hnae3_reset_type { 131 HNAE3_VF_RESET, 132 HNAE3_VF_FUNC_RESET, 133 HNAE3_VF_PF_FUNC_RESET, 134 HNAE3_VF_FULL_RESET, 135 HNAE3_FLR_RESET, 136 HNAE3_FUNC_RESET, 137 HNAE3_CORE_RESET, 138 HNAE3_GLOBAL_RESET, 139 HNAE3_IMP_RESET, 140 HNAE3_UNKNOWN_RESET, 141 HNAE3_NONE_RESET, 142 }; 143 144 enum hnae3_flr_state { 145 HNAE3_FLR_DOWN, 146 HNAE3_FLR_DONE, 147 }; 148 149 struct hnae3_vector_info { 150 u8 __iomem *io_addr; 151 int vector; 152 }; 153 154 #define HNAE3_RING_TYPE_B 0 155 #define HNAE3_RING_TYPE_TX 0 156 #define HNAE3_RING_TYPE_RX 1 157 #define HNAE3_RING_GL_IDX_S 0 158 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0) 159 #define HNAE3_RING_GL_RX 0 160 #define HNAE3_RING_GL_TX 1 161 162 struct hnae3_ring_chain_node { 163 struct hnae3_ring_chain_node *next; 164 u32 tqp_index; 165 u32 flag; 166 u32 int_gl_idx; 167 }; 168 169 #define HNAE3_IS_TX_RING(node) \ 170 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX) 171 172 struct hnae3_client_ops { 173 int (*init_instance)(struct hnae3_handle *handle); 174 void (*uninit_instance)(struct hnae3_handle *handle, bool reset); 175 void (*link_status_change)(struct hnae3_handle *handle, bool state); 176 int (*setup_tc)(struct hnae3_handle *handle, u8 tc); 177 int (*reset_notify)(struct hnae3_handle *handle, 178 enum hnae3_reset_notify_type type); 179 enum hnae3_reset_type (*process_hw_error)(struct hnae3_handle *handle); 180 }; 181 182 #define HNAE3_CLIENT_NAME_LENGTH 16 183 struct hnae3_client { 184 char name[HNAE3_CLIENT_NAME_LENGTH]; 185 unsigned long state; 186 enum hnae3_client_type type; 187 const struct hnae3_client_ops *ops; 188 struct list_head node; 189 }; 190 191 struct hnae3_ae_dev { 192 struct pci_dev *pdev; 193 const struct hnae3_ae_ops *ops; 194 struct list_head node; 195 u32 flag; 196 enum hnae3_dev_type dev_type; 197 enum hnae3_reset_type reset_type; 198 void *priv; 199 }; 200 201 /* This struct defines the operation on the handle. 202 * 203 * init_ae_dev(): (mandatory) 204 * Get PF configure from pci_dev and initialize PF hardware 205 * uninit_ae_dev() 206 * Disable PF device and release PF resource 207 * register_client 208 * Register client to ae_dev 209 * unregister_client() 210 * Unregister client from ae_dev 211 * start() 212 * Enable the hardware 213 * stop() 214 * Disable the hardware 215 * start_client() 216 * Inform the hclge that client has been started 217 * stop_client() 218 * Inform the hclge that client has been stopped 219 * get_status() 220 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 221 * non-ok 222 * get_ksettings_an_result() 223 * Get negotiation status,speed and duplex 224 * update_speed_duplex_h() 225 * Update hardware speed and duplex 226 * get_media_type() 227 * Get media type of MAC 228 * adjust_link() 229 * Adjust link status 230 * set_loopback() 231 * Set loopback 232 * set_promisc_mode 233 * Set promisc mode 234 * set_mtu() 235 * set mtu 236 * get_pauseparam() 237 * get tx and rx of pause frame use 238 * set_pauseparam() 239 * set tx and rx of pause frame use 240 * set_autoneg() 241 * set auto autonegotiation of pause frame use 242 * get_autoneg() 243 * get auto autonegotiation of pause frame use 244 * get_coalesce_usecs() 245 * get usecs to delay a TX interrupt after a packet is sent 246 * get_rx_max_coalesced_frames() 247 * get Maximum number of packets to be sent before a TX interrupt. 248 * set_coalesce_usecs() 249 * set usecs to delay a TX interrupt after a packet is sent 250 * set_coalesce_frames() 251 * set Maximum number of packets to be sent before a TX interrupt. 252 * get_mac_addr() 253 * get mac address 254 * set_mac_addr() 255 * set mac address 256 * add_uc_addr 257 * Add unicast addr to mac table 258 * rm_uc_addr 259 * Remove unicast addr from mac table 260 * set_mc_addr() 261 * Set multicast address 262 * add_mc_addr 263 * Add multicast address to mac table 264 * rm_mc_addr 265 * Remove multicast address from mac table 266 * update_stats() 267 * Update Old network device statistics 268 * get_ethtool_stats() 269 * Get ethtool network device statistics 270 * get_strings() 271 * Get a set of strings that describe the requested objects 272 * get_sset_count() 273 * Get number of strings that @get_strings will write 274 * update_led_status() 275 * Update the led status 276 * set_led_id() 277 * Set led id 278 * get_regs() 279 * Get regs dump 280 * get_regs_len() 281 * Get the len of the regs dump 282 * get_rss_key_size() 283 * Get rss key size 284 * get_rss_indir_size() 285 * Get rss indirection table size 286 * get_rss() 287 * Get rss table 288 * set_rss() 289 * Set rss table 290 * get_tc_size() 291 * Get tc size of handle 292 * get_vector() 293 * Get vector number and vector information 294 * put_vector() 295 * Put the vector in hdev 296 * map_ring_to_vector() 297 * Map rings to vector 298 * unmap_ring_from_vector() 299 * Unmap rings from vector 300 * reset_queue() 301 * Reset queue 302 * get_fw_version() 303 * Get firmware version 304 * get_mdix_mode() 305 * Get media typr of phy 306 * enable_vlan_filter() 307 * Enable vlan filter 308 * set_vlan_filter() 309 * Set vlan filter config of Ports 310 * set_vf_vlan_filter() 311 * Set vlan filter config of vf 312 * enable_hw_strip_rxvtag() 313 * Enable/disable hardware strip vlan tag of packets received 314 * set_gro_en 315 * Enable/disable HW GRO 316 */ 317 struct hnae3_ae_ops { 318 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); 319 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev); 320 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev); 321 void (*flr_done)(struct hnae3_ae_dev *ae_dev); 322 int (*init_client_instance)(struct hnae3_client *client, 323 struct hnae3_ae_dev *ae_dev); 324 void (*uninit_client_instance)(struct hnae3_client *client, 325 struct hnae3_ae_dev *ae_dev); 326 int (*start)(struct hnae3_handle *handle); 327 void (*stop)(struct hnae3_handle *handle); 328 int (*client_start)(struct hnae3_handle *handle); 329 void (*client_stop)(struct hnae3_handle *handle); 330 int (*get_status)(struct hnae3_handle *handle); 331 void (*get_ksettings_an_result)(struct hnae3_handle *handle, 332 u8 *auto_neg, u32 *speed, u8 *duplex); 333 334 int (*update_speed_duplex_h)(struct hnae3_handle *handle); 335 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed, 336 u8 duplex); 337 338 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type); 339 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex); 340 int (*set_loopback)(struct hnae3_handle *handle, 341 enum hnae3_loop loop_mode, bool en); 342 343 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc, 344 bool en_mc_pmc); 345 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu); 346 347 void (*get_pauseparam)(struct hnae3_handle *handle, 348 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 349 int (*set_pauseparam)(struct hnae3_handle *handle, 350 u32 auto_neg, u32 rx_en, u32 tx_en); 351 352 int (*set_autoneg)(struct hnae3_handle *handle, bool enable); 353 int (*get_autoneg)(struct hnae3_handle *handle); 354 355 void (*get_coalesce_usecs)(struct hnae3_handle *handle, 356 u32 *tx_usecs, u32 *rx_usecs); 357 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle, 358 u32 *tx_frames, u32 *rx_frames); 359 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout); 360 int (*set_coalesce_frames)(struct hnae3_handle *handle, 361 u32 coalesce_frames); 362 void (*get_coalesce_range)(struct hnae3_handle *handle, 363 u32 *tx_frames_low, u32 *rx_frames_low, 364 u32 *tx_frames_high, u32 *rx_frames_high, 365 u32 *tx_usecs_low, u32 *rx_usecs_low, 366 u32 *tx_usecs_high, u32 *rx_usecs_high); 367 368 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p); 369 int (*set_mac_addr)(struct hnae3_handle *handle, void *p, 370 bool is_first); 371 int (*do_ioctl)(struct hnae3_handle *handle, 372 struct ifreq *ifr, int cmd); 373 int (*add_uc_addr)(struct hnae3_handle *handle, 374 const unsigned char *addr); 375 int (*rm_uc_addr)(struct hnae3_handle *handle, 376 const unsigned char *addr); 377 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr); 378 int (*add_mc_addr)(struct hnae3_handle *handle, 379 const unsigned char *addr); 380 int (*rm_mc_addr)(struct hnae3_handle *handle, 381 const unsigned char *addr); 382 void (*set_tso_stats)(struct hnae3_handle *handle, int enable); 383 void (*update_stats)(struct hnae3_handle *handle, 384 struct net_device_stats *net_stats); 385 void (*get_stats)(struct hnae3_handle *handle, u64 *data); 386 387 void (*get_strings)(struct hnae3_handle *handle, 388 u32 stringset, u8 *data); 389 int (*get_sset_count)(struct hnae3_handle *handle, int stringset); 390 391 void (*get_regs)(struct hnae3_handle *handle, u32 *version, 392 void *data); 393 int (*get_regs_len)(struct hnae3_handle *handle); 394 395 u32 (*get_rss_key_size)(struct hnae3_handle *handle); 396 u32 (*get_rss_indir_size)(struct hnae3_handle *handle); 397 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key, 398 u8 *hfunc); 399 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir, 400 const u8 *key, const u8 hfunc); 401 int (*set_rss_tuple)(struct hnae3_handle *handle, 402 struct ethtool_rxnfc *cmd); 403 int (*get_rss_tuple)(struct hnae3_handle *handle, 404 struct ethtool_rxnfc *cmd); 405 406 int (*get_tc_size)(struct hnae3_handle *handle); 407 408 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num, 409 struct hnae3_vector_info *vector_info); 410 int (*put_vector)(struct hnae3_handle *handle, int vector_num); 411 int (*map_ring_to_vector)(struct hnae3_handle *handle, 412 int vector_num, 413 struct hnae3_ring_chain_node *vr_chain); 414 int (*unmap_ring_from_vector)(struct hnae3_handle *handle, 415 int vector_num, 416 struct hnae3_ring_chain_node *vr_chain); 417 418 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); 419 u32 (*get_fw_version)(struct hnae3_handle *handle); 420 void (*get_mdix_mode)(struct hnae3_handle *handle, 421 u8 *tp_mdix_ctrl, u8 *tp_mdix); 422 423 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable); 424 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto, 425 u16 vlan_id, bool is_kill); 426 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, 427 u16 vlan, u8 qos, __be16 proto); 428 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); 429 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle); 430 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev, 431 enum hnae3_reset_type rst_type); 432 void (*get_channels)(struct hnae3_handle *handle, 433 struct ethtool_channels *ch); 434 void (*get_tqps_and_rss_info)(struct hnae3_handle *h, 435 u16 *alloc_tqps, u16 *max_rss_size); 436 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num, 437 bool rxfh_configured); 438 void (*get_flowctrl_adv)(struct hnae3_handle *handle, 439 u32 *flowctrl_adv); 440 int (*set_led_id)(struct hnae3_handle *handle, 441 enum ethtool_phys_id_state status); 442 void (*get_link_mode)(struct hnae3_handle *handle, 443 unsigned long *supported, 444 unsigned long *advertising); 445 int (*add_fd_entry)(struct hnae3_handle *handle, 446 struct ethtool_rxnfc *cmd); 447 int (*del_fd_entry)(struct hnae3_handle *handle, 448 struct ethtool_rxnfc *cmd); 449 void (*del_all_fd_entries)(struct hnae3_handle *handle, 450 bool clear_list); 451 int (*get_fd_rule_cnt)(struct hnae3_handle *handle, 452 struct ethtool_rxnfc *cmd); 453 int (*get_fd_rule_info)(struct hnae3_handle *handle, 454 struct ethtool_rxnfc *cmd); 455 int (*get_fd_all_rules)(struct hnae3_handle *handle, 456 struct ethtool_rxnfc *cmd, u32 *rule_locs); 457 int (*restore_fd_rules)(struct hnae3_handle *handle); 458 void (*enable_fd)(struct hnae3_handle *handle, bool enable); 459 int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf); 460 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); 461 bool (*get_hw_reset_stat)(struct hnae3_handle *handle); 462 bool (*ae_dev_resetting)(struct hnae3_handle *handle); 463 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle); 464 int (*set_gro_en)(struct hnae3_handle *handle, int enable); 465 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id); 466 void (*set_timer_task)(struct hnae3_handle *handle, bool enable); 467 }; 468 469 struct hnae3_dcb_ops { 470 /* IEEE 802.1Qaz std */ 471 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *); 472 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *); 473 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *); 474 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *); 475 476 /* DCBX configuration */ 477 u8 (*getdcbx)(struct hnae3_handle *); 478 u8 (*setdcbx)(struct hnae3_handle *, u8); 479 480 int (*setup_tc)(struct hnae3_handle *, u8, u8 *); 481 }; 482 483 struct hnae3_ae_algo { 484 const struct hnae3_ae_ops *ops; 485 struct list_head node; 486 const struct pci_device_id *pdev_id_table; 487 }; 488 489 #define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16) 490 #define HNAE3_ITR_COUNTDOWN_START 100 491 492 struct hnae3_tc_info { 493 u16 tqp_offset; /* TQP offset from base TQP */ 494 u16 tqp_count; /* Total TQPs */ 495 u8 tc; /* TC index */ 496 bool enable; /* If this TC is enable or not */ 497 }; 498 499 #define HNAE3_MAX_TC 8 500 #define HNAE3_MAX_USER_PRIO 8 501 struct hnae3_knic_private_info { 502 struct net_device *netdev; /* Set by KNIC client when init instance */ 503 u16 rss_size; /* Allocated RSS queues */ 504 u16 req_rss_size; 505 u16 rx_buf_len; 506 u16 num_desc; 507 508 u8 num_tc; /* Total number of enabled TCs */ 509 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ 510 struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ 511 512 u16 num_tqps; /* total number of TQPs in this handle */ 513 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */ 514 const struct hnae3_dcb_ops *dcb_ops; 515 516 u16 int_rl_setting; 517 enum pkt_hash_types rss_type; 518 }; 519 520 struct hnae3_roce_private_info { 521 struct net_device *netdev; 522 void __iomem *roce_io_base; 523 int base_vector; 524 int num_vectors; 525 526 /* The below attributes defined for RoCE client, hnae3 gives 527 * initial values to them, and RoCE client can modify and use 528 * them. 529 */ 530 unsigned long reset_state; 531 unsigned long instance_state; 532 unsigned long state; 533 }; 534 535 struct hnae3_unic_private_info { 536 struct net_device *netdev; 537 u16 rx_buf_len; 538 u16 num_desc; 539 u16 num_tqps; /* total number of tqps in this handle */ 540 struct hnae3_queue **tqp; /* array base of all TQPs of this instance */ 541 }; 542 543 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0) 544 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1) 545 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2) 546 #define HNAE3_SUPPORT_VF BIT(3) 547 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4) 548 549 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */ 550 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */ 551 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */ 552 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */ 553 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */ 554 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */ 555 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE) 556 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE) 557 558 struct hnae3_handle { 559 struct hnae3_client *client; 560 struct pci_dev *pdev; 561 void *priv; 562 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ 563 u64 flags; /* Indicate the capabilities for this handle*/ 564 565 union { 566 struct net_device *netdev; /* first member */ 567 struct hnae3_knic_private_info kinfo; 568 struct hnae3_unic_private_info uinfo; 569 struct hnae3_roce_private_info rinfo; 570 }; 571 572 u32 numa_node_mask; /* for multi-chip support */ 573 574 u8 netdev_flags; 575 struct dentry *hnae3_dbgfs; 576 }; 577 578 #define hnae3_set_field(origin, mask, shift, val) \ 579 do { \ 580 (origin) &= (~(mask)); \ 581 (origin) |= ((val) << (shift)) & (mask); \ 582 } while (0) 583 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 584 585 #define hnae3_set_bit(origin, shift, val) \ 586 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val)) 587 #define hnae3_get_bit(origin, shift) \ 588 hnae3_get_field((origin), (0x1 << (shift)), (shift)) 589 590 void hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); 591 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev); 592 593 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo); 594 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo); 595 596 void hnae3_unregister_client(struct hnae3_client *client); 597 int hnae3_register_client(struct hnae3_client *client); 598 599 void hnae3_set_client_init_flag(struct hnae3_client *client, 600 struct hnae3_ae_dev *ae_dev, int inited); 601 #endif 602