1 /* 2 * Copyright (c) 2016-2017 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #ifndef __HNAE3_H 11 #define __HNAE3_H 12 13 /* Names used in this framework: 14 * ae handle (handle): 15 * a set of queues provided by AE 16 * ring buffer queue (rbq): 17 * the channel between upper layer and the AE, can do tx and rx 18 * ring: 19 * a tx or rx channel within a rbq 20 * ring description (desc): 21 * an element in the ring with packet information 22 * buffer: 23 * a memory region referred by desc with the full packet payload 24 * 25 * "num" means a static number set as a parameter, "count" mean a dynamic 26 * number set while running 27 * "cb" means control block 28 */ 29 30 #include <linux/acpi.h> 31 #include <linux/dcbnl.h> 32 #include <linux/delay.h> 33 #include <linux/device.h> 34 #include <linux/module.h> 35 #include <linux/netdevice.h> 36 #include <linux/pci.h> 37 #include <linux/types.h> 38 39 /* Device IDs */ 40 #define HNAE3_DEV_ID_GE 0xA220 41 #define HNAE3_DEV_ID_25GE 0xA221 42 #define HNAE3_DEV_ID_25GE_RDMA 0xA222 43 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223 44 #define HNAE3_DEV_ID_50GE_RDMA 0xA224 45 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225 46 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226 47 #define HNAE3_DEV_ID_100G_VF 0xA22E 48 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F 49 50 #define HNAE3_CLASS_NAME_SIZE 16 51 52 #define HNAE3_DEV_INITED_B 0x0 53 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1 54 #define HNAE3_DEV_SUPPORT_DCB_B 0x2 55 #define HNAE3_CLIENT_INITED_B 0x3 56 57 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\ 58 BIT(HNAE3_DEV_SUPPORT_ROCE_B)) 59 60 #define hnae3_dev_roce_supported(hdev) \ 61 hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) 62 63 #define hnae3_dev_dcb_supported(hdev) \ 64 hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) 65 66 #define ring_ptr_move_fw(ring, p) \ 67 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 68 #define ring_ptr_move_bw(ring, p) \ 69 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 70 71 enum hns_desc_type { 72 DESC_TYPE_SKB, 73 DESC_TYPE_PAGE, 74 }; 75 76 struct hnae3_handle; 77 78 struct hnae3_queue { 79 void __iomem *io_base; 80 struct hnae3_ae_algo *ae_algo; 81 struct hnae3_handle *handle; 82 int tqp_index; /* index in a handle */ 83 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 84 u16 desc_num; /* total number of desc */ 85 }; 86 87 /*hnae3 loop mode*/ 88 enum hnae3_loop { 89 HNAE3_MAC_INTER_LOOP_MAC, 90 HNAE3_MAC_INTER_LOOP_SERDES, 91 HNAE3_MAC_INTER_LOOP_PHY, 92 HNAE3_MAC_LOOP_NONE, 93 }; 94 95 enum hnae3_client_type { 96 HNAE3_CLIENT_KNIC, 97 HNAE3_CLIENT_UNIC, 98 HNAE3_CLIENT_ROCE, 99 }; 100 101 enum hnae3_dev_type { 102 HNAE3_DEV_KNIC, 103 HNAE3_DEV_UNIC, 104 }; 105 106 /* mac media type */ 107 enum hnae3_media_type { 108 HNAE3_MEDIA_TYPE_UNKNOWN, 109 HNAE3_MEDIA_TYPE_FIBER, 110 HNAE3_MEDIA_TYPE_COPPER, 111 HNAE3_MEDIA_TYPE_BACKPLANE, 112 }; 113 114 enum hnae3_reset_notify_type { 115 HNAE3_UP_CLIENT, 116 HNAE3_DOWN_CLIENT, 117 HNAE3_INIT_CLIENT, 118 HNAE3_UNINIT_CLIENT, 119 }; 120 121 enum hnae3_reset_type { 122 HNAE3_VF_RESET, 123 HNAE3_VF_FULL_RESET, 124 HNAE3_FUNC_RESET, 125 HNAE3_CORE_RESET, 126 HNAE3_GLOBAL_RESET, 127 HNAE3_IMP_RESET, 128 HNAE3_NONE_RESET, 129 }; 130 131 struct hnae3_vector_info { 132 u8 __iomem *io_addr; 133 int vector; 134 }; 135 136 #define HNAE3_RING_TYPE_B 0 137 #define HNAE3_RING_TYPE_TX 0 138 #define HNAE3_RING_TYPE_RX 1 139 #define HNAE3_RING_GL_IDX_S 0 140 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0) 141 #define HNAE3_RING_GL_RX 0 142 #define HNAE3_RING_GL_TX 1 143 144 struct hnae3_ring_chain_node { 145 struct hnae3_ring_chain_node *next; 146 u32 tqp_index; 147 u32 flag; 148 u32 int_gl_idx; 149 }; 150 151 #define HNAE3_IS_TX_RING(node) \ 152 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX) 153 154 struct hnae3_client_ops { 155 int (*init_instance)(struct hnae3_handle *handle); 156 void (*uninit_instance)(struct hnae3_handle *handle, bool reset); 157 void (*link_status_change)(struct hnae3_handle *handle, bool state); 158 int (*setup_tc)(struct hnae3_handle *handle, u8 tc); 159 int (*reset_notify)(struct hnae3_handle *handle, 160 enum hnae3_reset_notify_type type); 161 }; 162 163 #define HNAE3_CLIENT_NAME_LENGTH 16 164 struct hnae3_client { 165 char name[HNAE3_CLIENT_NAME_LENGTH]; 166 u16 version; 167 unsigned long state; 168 enum hnae3_client_type type; 169 const struct hnae3_client_ops *ops; 170 struct list_head node; 171 }; 172 173 struct hnae3_ae_dev { 174 struct pci_dev *pdev; 175 const struct hnae3_ae_ops *ops; 176 struct list_head node; 177 u32 flag; 178 enum hnae3_dev_type dev_type; 179 void *priv; 180 }; 181 182 /* This struct defines the operation on the handle. 183 * 184 * init_ae_dev(): (mandatory) 185 * Get PF configure from pci_dev and initialize PF hardware 186 * uninit_ae_dev() 187 * Disable PF device and release PF resource 188 * register_client 189 * Register client to ae_dev 190 * unregister_client() 191 * Unregister client from ae_dev 192 * start() 193 * Enable the hardware 194 * stop() 195 * Disable the hardware 196 * get_status() 197 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 198 * non-ok 199 * get_ksettings_an_result() 200 * Get negotiation status,speed and duplex 201 * update_speed_duplex_h() 202 * Update hardware speed and duplex 203 * get_media_type() 204 * Get media type of MAC 205 * adjust_link() 206 * Adjust link status 207 * set_loopback() 208 * Set loopback 209 * set_promisc_mode 210 * Set promisc mode 211 * set_mtu() 212 * set mtu 213 * get_pauseparam() 214 * get tx and rx of pause frame use 215 * set_pauseparam() 216 * set tx and rx of pause frame use 217 * set_autoneg() 218 * set auto autonegotiation of pause frame use 219 * get_autoneg() 220 * get auto autonegotiation of pause frame use 221 * get_coalesce_usecs() 222 * get usecs to delay a TX interrupt after a packet is sent 223 * get_rx_max_coalesced_frames() 224 * get Maximum number of packets to be sent before a TX interrupt. 225 * set_coalesce_usecs() 226 * set usecs to delay a TX interrupt after a packet is sent 227 * set_coalesce_frames() 228 * set Maximum number of packets to be sent before a TX interrupt. 229 * get_mac_addr() 230 * get mac address 231 * set_mac_addr() 232 * set mac address 233 * add_uc_addr 234 * Add unicast addr to mac table 235 * rm_uc_addr 236 * Remove unicast addr from mac table 237 * set_mc_addr() 238 * Set multicast address 239 * add_mc_addr 240 * Add multicast address to mac table 241 * rm_mc_addr 242 * Remove multicast address from mac table 243 * update_stats() 244 * Update Old network device statistics 245 * get_ethtool_stats() 246 * Get ethtool network device statistics 247 * get_strings() 248 * Get a set of strings that describe the requested objects 249 * get_sset_count() 250 * Get number of strings that @get_strings will write 251 * update_led_status() 252 * Update the led status 253 * set_led_id() 254 * Set led id 255 * get_regs() 256 * Get regs dump 257 * get_regs_len() 258 * Get the len of the regs dump 259 * get_rss_key_size() 260 * Get rss key size 261 * get_rss_indir_size() 262 * Get rss indirection table size 263 * get_rss() 264 * Get rss table 265 * set_rss() 266 * Set rss table 267 * get_tc_size() 268 * Get tc size of handle 269 * get_vector() 270 * Get vector number and vector information 271 * put_vector() 272 * Put the vector in hdev 273 * map_ring_to_vector() 274 * Map rings to vector 275 * unmap_ring_from_vector() 276 * Unmap rings from vector 277 * reset_queue() 278 * Reset queue 279 * get_fw_version() 280 * Get firmware version 281 * get_mdix_mode() 282 * Get media typr of phy 283 * enable_vlan_filter() 284 * Enable vlan filter 285 * set_vlan_filter() 286 * Set vlan filter config of Ports 287 * set_vf_vlan_filter() 288 * Set vlan filter config of vf 289 * enable_hw_strip_rxvtag() 290 * Enable/disable hardware strip vlan tag of packets received 291 */ 292 struct hnae3_ae_ops { 293 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); 294 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev); 295 296 int (*init_client_instance)(struct hnae3_client *client, 297 struct hnae3_ae_dev *ae_dev); 298 void (*uninit_client_instance)(struct hnae3_client *client, 299 struct hnae3_ae_dev *ae_dev); 300 int (*start)(struct hnae3_handle *handle); 301 void (*stop)(struct hnae3_handle *handle); 302 int (*get_status)(struct hnae3_handle *handle); 303 void (*get_ksettings_an_result)(struct hnae3_handle *handle, 304 u8 *auto_neg, u32 *speed, u8 *duplex); 305 306 int (*update_speed_duplex_h)(struct hnae3_handle *handle); 307 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed, 308 u8 duplex); 309 310 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type); 311 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex); 312 int (*set_loopback)(struct hnae3_handle *handle, 313 enum hnae3_loop loop_mode, bool en); 314 315 void (*set_promisc_mode)(struct hnae3_handle *handle, u32 en); 316 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu); 317 318 void (*get_pauseparam)(struct hnae3_handle *handle, 319 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 320 int (*set_pauseparam)(struct hnae3_handle *handle, 321 u32 auto_neg, u32 rx_en, u32 tx_en); 322 323 int (*set_autoneg)(struct hnae3_handle *handle, bool enable); 324 int (*get_autoneg)(struct hnae3_handle *handle); 325 326 void (*get_coalesce_usecs)(struct hnae3_handle *handle, 327 u32 *tx_usecs, u32 *rx_usecs); 328 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle, 329 u32 *tx_frames, u32 *rx_frames); 330 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout); 331 int (*set_coalesce_frames)(struct hnae3_handle *handle, 332 u32 coalesce_frames); 333 void (*get_coalesce_range)(struct hnae3_handle *handle, 334 u32 *tx_frames_low, u32 *rx_frames_low, 335 u32 *tx_frames_high, u32 *rx_frames_high, 336 u32 *tx_usecs_low, u32 *rx_usecs_low, 337 u32 *tx_usecs_high, u32 *rx_usecs_high); 338 339 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p); 340 int (*set_mac_addr)(struct hnae3_handle *handle, void *p, 341 bool is_first); 342 int (*add_uc_addr)(struct hnae3_handle *handle, 343 const unsigned char *addr); 344 int (*rm_uc_addr)(struct hnae3_handle *handle, 345 const unsigned char *addr); 346 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr); 347 int (*add_mc_addr)(struct hnae3_handle *handle, 348 const unsigned char *addr); 349 int (*rm_mc_addr)(struct hnae3_handle *handle, 350 const unsigned char *addr); 351 352 void (*set_tso_stats)(struct hnae3_handle *handle, int enable); 353 void (*update_stats)(struct hnae3_handle *handle, 354 struct net_device_stats *net_stats); 355 void (*get_stats)(struct hnae3_handle *handle, u64 *data); 356 357 void (*get_strings)(struct hnae3_handle *handle, 358 u32 stringset, u8 *data); 359 int (*get_sset_count)(struct hnae3_handle *handle, int stringset); 360 361 void (*get_regs)(struct hnae3_handle *handle, u32 *version, 362 void *data); 363 int (*get_regs_len)(struct hnae3_handle *handle); 364 365 u32 (*get_rss_key_size)(struct hnae3_handle *handle); 366 u32 (*get_rss_indir_size)(struct hnae3_handle *handle); 367 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key, 368 u8 *hfunc); 369 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir, 370 const u8 *key, const u8 hfunc); 371 int (*set_rss_tuple)(struct hnae3_handle *handle, 372 struct ethtool_rxnfc *cmd); 373 int (*get_rss_tuple)(struct hnae3_handle *handle, 374 struct ethtool_rxnfc *cmd); 375 376 int (*get_tc_size)(struct hnae3_handle *handle); 377 378 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num, 379 struct hnae3_vector_info *vector_info); 380 int (*put_vector)(struct hnae3_handle *handle, int vector_num); 381 int (*map_ring_to_vector)(struct hnae3_handle *handle, 382 int vector_num, 383 struct hnae3_ring_chain_node *vr_chain); 384 int (*unmap_ring_from_vector)(struct hnae3_handle *handle, 385 int vector_num, 386 struct hnae3_ring_chain_node *vr_chain); 387 388 void (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); 389 u32 (*get_fw_version)(struct hnae3_handle *handle); 390 void (*get_mdix_mode)(struct hnae3_handle *handle, 391 u8 *tp_mdix_ctrl, u8 *tp_mdix); 392 393 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable); 394 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto, 395 u16 vlan_id, bool is_kill); 396 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, 397 u16 vlan, u8 qos, __be16 proto); 398 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); 399 void (*reset_event)(struct hnae3_handle *handle); 400 void (*get_channels)(struct hnae3_handle *handle, 401 struct ethtool_channels *ch); 402 void (*get_tqps_and_rss_info)(struct hnae3_handle *h, 403 u16 *free_tqps, u16 *max_rss_size); 404 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num); 405 void (*get_flowctrl_adv)(struct hnae3_handle *handle, 406 u32 *flowctrl_adv); 407 int (*set_led_id)(struct hnae3_handle *handle, 408 enum ethtool_phys_id_state status); 409 void (*get_link_mode)(struct hnae3_handle *handle, 410 unsigned long *supported, 411 unsigned long *advertising); 412 void (*get_port_type)(struct hnae3_handle *handle, u8 *port_type); 413 }; 414 415 struct hnae3_dcb_ops { 416 /* IEEE 802.1Qaz std */ 417 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *); 418 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *); 419 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *); 420 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *); 421 422 /* DCBX configuration */ 423 u8 (*getdcbx)(struct hnae3_handle *); 424 u8 (*setdcbx)(struct hnae3_handle *, u8); 425 426 int (*map_update)(struct hnae3_handle *); 427 int (*setup_tc)(struct hnae3_handle *, u8, u8 *); 428 }; 429 430 struct hnae3_ae_algo { 431 const struct hnae3_ae_ops *ops; 432 struct list_head node; 433 char name[HNAE3_CLASS_NAME_SIZE]; 434 const struct pci_device_id *pdev_id_table; 435 }; 436 437 #define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16) 438 #define HNAE3_ITR_COUNTDOWN_START 100 439 440 struct hnae3_tc_info { 441 u16 tqp_offset; /* TQP offset from base TQP */ 442 u16 tqp_count; /* Total TQPs */ 443 u8 tc; /* TC index */ 444 bool enable; /* If this TC is enable or not */ 445 }; 446 447 #define HNAE3_MAX_TC 8 448 #define HNAE3_MAX_USER_PRIO 8 449 struct hnae3_knic_private_info { 450 struct net_device *netdev; /* Set by KNIC client when init instance */ 451 u16 rss_size; /* Allocated RSS queues */ 452 u16 rx_buf_len; 453 u16 num_desc; 454 455 u8 num_tc; /* Total number of enabled TCs */ 456 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ 457 struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ 458 459 u16 num_tqps; /* total number of TQPs in this handle */ 460 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */ 461 const struct hnae3_dcb_ops *dcb_ops; 462 463 u16 int_rl_setting; 464 }; 465 466 struct hnae3_roce_private_info { 467 struct net_device *netdev; 468 void __iomem *roce_io_base; 469 int base_vector; 470 int num_vectors; 471 }; 472 473 struct hnae3_unic_private_info { 474 struct net_device *netdev; 475 u16 rx_buf_len; 476 u16 num_desc; 477 u16 num_tqps; /* total number of tqps in this handle */ 478 struct hnae3_queue **tqp; /* array base of all TQPs of this instance */ 479 }; 480 481 #define HNAE3_SUPPORT_MAC_LOOPBACK BIT(0) 482 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1) 483 #define HNAE3_SUPPORT_SERDES_LOOPBACK BIT(2) 484 #define HNAE3_SUPPORT_VF BIT(3) 485 486 struct hnae3_handle { 487 struct hnae3_client *client; 488 struct pci_dev *pdev; 489 void *priv; 490 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ 491 u64 flags; /* Indicate the capabilities for this handle*/ 492 493 unsigned long last_reset_time; 494 enum hnae3_reset_type reset_level; 495 496 union { 497 struct net_device *netdev; /* first member */ 498 struct hnae3_knic_private_info kinfo; 499 struct hnae3_unic_private_info uinfo; 500 struct hnae3_roce_private_info rinfo; 501 }; 502 503 u32 numa_node_mask; /* for multi-chip support */ 504 }; 505 506 #define hnae_set_field(origin, mask, shift, val) \ 507 do { \ 508 (origin) &= (~(mask)); \ 509 (origin) |= ((val) << (shift)) & (mask); \ 510 } while (0) 511 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 512 513 #define hnae_set_bit(origin, shift, val) \ 514 hnae_set_field((origin), (0x1 << (shift)), (shift), (val)) 515 #define hnae_get_bit(origin, shift) \ 516 hnae_get_field((origin), (0x1 << (shift)), (shift)) 517 518 void hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); 519 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev); 520 521 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo); 522 int hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo); 523 524 void hnae3_unregister_client(struct hnae3_client *client); 525 int hnae3_register_client(struct hnae3_client *client); 526 #endif 527