xref: /openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hnae3.h (revision 28efb0046512e8a13ed9f9bdf0d68d10bbfbe9cf)
1 /*
2  * Copyright (c) 2016-2017 Hisilicon Limited.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  */
9 
10 #ifndef __HNAE3_H
11 #define __HNAE3_H
12 
13 /* Names used in this framework:
14  *      ae handle (handle):
15  *        a set of queues provided by AE
16  *      ring buffer queue (rbq):
17  *        the channel between upper layer and the AE, can do tx and rx
18  *      ring:
19  *        a tx or rx channel within a rbq
20  *      ring description (desc):
21  *        an element in the ring with packet information
22  *      buffer:
23  *        a memory region referred by desc with the full packet payload
24  *
25  * "num" means a static number set as a parameter, "count" mean a dynamic
26  *   number set while running
27  * "cb" means control block
28  */
29 
30 #include <linux/acpi.h>
31 #include <linux/dcbnl.h>
32 #include <linux/delay.h>
33 #include <linux/device.h>
34 #include <linux/module.h>
35 #include <linux/netdevice.h>
36 #include <linux/pci.h>
37 #include <linux/types.h>
38 
39 /* Device IDs */
40 #define HNAE3_DEV_ID_GE				0xA220
41 #define HNAE3_DEV_ID_25GE			0xA221
42 #define HNAE3_DEV_ID_25GE_RDMA			0xA222
43 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC		0xA223
44 #define HNAE3_DEV_ID_50GE_RDMA			0xA224
45 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC		0xA225
46 #define HNAE3_DEV_ID_100G_RDMA_MACSEC		0xA226
47 #define HNAE3_DEV_ID_100G_VF			0xA22E
48 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF	0xA22F
49 
50 #define HNAE3_CLASS_NAME_SIZE 16
51 
52 #define HNAE3_DEV_INITED_B			0x0
53 #define HNAE3_DEV_SUPPORT_ROCE_B		0x1
54 #define HNAE3_DEV_SUPPORT_DCB_B			0x2
55 
56 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
57 		BIT(HNAE3_DEV_SUPPORT_ROCE_B))
58 
59 #define hnae3_dev_roce_supported(hdev) \
60 	hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
61 
62 #define hnae3_dev_dcb_supported(hdev) \
63 	hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
64 
65 #define ring_ptr_move_fw(ring, p) \
66 	((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
67 #define ring_ptr_move_bw(ring, p) \
68 	((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
69 
70 enum hns_desc_type {
71 	DESC_TYPE_SKB,
72 	DESC_TYPE_PAGE,
73 };
74 
75 struct hnae3_handle;
76 
77 struct hnae3_queue {
78 	void __iomem *io_base;
79 	struct hnae3_ae_algo *ae_algo;
80 	struct hnae3_handle *handle;
81 	int tqp_index;	/* index in a handle */
82 	u32 buf_size;	/* size for hnae_desc->addr, preset by AE */
83 	u16 desc_num;	/* total number of desc */
84 };
85 
86 /*hnae3 loop mode*/
87 enum hnae3_loop {
88 	HNAE3_MAC_INTER_LOOP_MAC,
89 	HNAE3_MAC_INTER_LOOP_SERDES,
90 	HNAE3_MAC_INTER_LOOP_PHY,
91 	HNAE3_MAC_LOOP_NONE,
92 };
93 
94 enum hnae3_client_type {
95 	HNAE3_CLIENT_KNIC,
96 	HNAE3_CLIENT_UNIC,
97 	HNAE3_CLIENT_ROCE,
98 };
99 
100 enum hnae3_dev_type {
101 	HNAE3_DEV_KNIC,
102 	HNAE3_DEV_UNIC,
103 };
104 
105 /* mac media type */
106 enum hnae3_media_type {
107 	HNAE3_MEDIA_TYPE_UNKNOWN,
108 	HNAE3_MEDIA_TYPE_FIBER,
109 	HNAE3_MEDIA_TYPE_COPPER,
110 	HNAE3_MEDIA_TYPE_BACKPLANE,
111 };
112 
113 struct hnae3_vector_info {
114 	u8 __iomem *io_addr;
115 	int vector;
116 };
117 
118 #define HNAE3_RING_TYPE_B 0
119 #define HNAE3_RING_TYPE_TX 0
120 #define HNAE3_RING_TYPE_RX 1
121 
122 struct hnae3_ring_chain_node {
123 	struct hnae3_ring_chain_node *next;
124 	u32 tqp_index;
125 	u32 flag;
126 };
127 
128 #define HNAE3_IS_TX_RING(node) \
129 	(((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
130 
131 struct hnae3_client_ops {
132 	int (*init_instance)(struct hnae3_handle *handle);
133 	void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
134 	void (*link_status_change)(struct hnae3_handle *handle, bool state);
135 	int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
136 };
137 
138 #define HNAE3_CLIENT_NAME_LENGTH 16
139 struct hnae3_client {
140 	char name[HNAE3_CLIENT_NAME_LENGTH];
141 	u16 version;
142 	unsigned long state;
143 	enum hnae3_client_type type;
144 	const struct hnae3_client_ops *ops;
145 	struct list_head node;
146 };
147 
148 struct hnae3_ae_dev {
149 	struct pci_dev *pdev;
150 	const struct hnae3_ae_ops *ops;
151 	struct list_head node;
152 	u32 flag;
153 	enum hnae3_dev_type dev_type;
154 	void *priv;
155 };
156 
157 /* This struct defines the operation on the handle.
158  *
159  * init_ae_dev(): (mandatory)
160  *   Get PF configure from pci_dev and initialize PF hardware
161  * uninit_ae_dev()
162  *   Disable PF device and release PF resource
163  * register_client
164  *   Register client to ae_dev
165  * unregister_client()
166  *   Unregister client from ae_dev
167  * start()
168  *   Enable the hardware
169  * stop()
170  *   Disable the hardware
171  * get_status()
172  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
173  *   non-ok
174  * get_ksettings_an_result()
175  *   Get negotiation status,speed and duplex
176  * update_speed_duplex_h()
177  *   Update hardware speed and duplex
178  * get_media_type()
179  *   Get media type of MAC
180  * adjust_link()
181  *   Adjust link status
182  * set_loopback()
183  *   Set loopback
184  * set_promisc_mode
185  *   Set promisc mode
186  * set_mtu()
187  *   set mtu
188  * get_pauseparam()
189  *   get tx and rx of pause frame use
190  * set_pauseparam()
191  *   set tx and rx of pause frame use
192  * set_autoneg()
193  *   set auto autonegotiation of pause frame use
194  * get_autoneg()
195  *   get auto autonegotiation of pause frame use
196  * get_coalesce_usecs()
197  *   get usecs to delay a TX interrupt after a packet is sent
198  * get_rx_max_coalesced_frames()
199  *   get Maximum number of packets to be sent before a TX interrupt.
200  * set_coalesce_usecs()
201  *   set usecs to delay a TX interrupt after a packet is sent
202  * set_coalesce_frames()
203  *   set Maximum number of packets to be sent before a TX interrupt.
204  * get_mac_addr()
205  *   get mac address
206  * set_mac_addr()
207  *   set mac address
208  * add_uc_addr
209  *   Add unicast addr to mac table
210  * rm_uc_addr
211  *   Remove unicast addr from mac table
212  * set_mc_addr()
213  *   Set multicast address
214  * add_mc_addr
215  *   Add multicast address to mac table
216  * rm_mc_addr
217  *   Remove multicast address from mac table
218  * update_stats()
219  *   Update Old network device statistics
220  * get_ethtool_stats()
221  *   Get ethtool network device statistics
222  * get_strings()
223  *   Get a set of strings that describe the requested objects
224  * get_sset_count()
225  *   Get number of strings that @get_strings will write
226  * update_led_status()
227  *   Update the led status
228  * set_led_id()
229  *   Set led id
230  * get_regs()
231  *   Get regs dump
232  * get_regs_len()
233  *   Get the len of the regs dump
234  * get_rss_key_size()
235  *   Get rss key size
236  * get_rss_indir_size()
237  *   Get rss indirection table size
238  * get_rss()
239  *   Get rss table
240  * set_rss()
241  *   Set rss table
242  * get_tc_size()
243  *   Get tc size of handle
244  * get_vector()
245  *   Get vector number and vector information
246  * map_ring_to_vector()
247  *   Map rings to vector
248  * unmap_ring_from_vector()
249  *   Unmap rings from vector
250  * add_tunnel_udp()
251  *   Add tunnel information to hardware
252  * del_tunnel_udp()
253  *   Delete tunnel information from hardware
254  * reset_queue()
255  *   Reset queue
256  * get_fw_version()
257  *   Get firmware version
258  * get_mdix_mode()
259  *   Get media typr of phy
260  * set_vlan_filter()
261  *   Set vlan filter config of Ports
262  * set_vf_vlan_filter()
263  *   Set vlan filter config of vf
264  */
265 struct hnae3_ae_ops {
266 	int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
267 	void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
268 
269 	int (*init_client_instance)(struct hnae3_client *client,
270 				    struct hnae3_ae_dev *ae_dev);
271 	void (*uninit_client_instance)(struct hnae3_client *client,
272 				       struct hnae3_ae_dev *ae_dev);
273 	int (*start)(struct hnae3_handle *handle);
274 	void (*stop)(struct hnae3_handle *handle);
275 	int (*get_status)(struct hnae3_handle *handle);
276 	void (*get_ksettings_an_result)(struct hnae3_handle *handle,
277 					u8 *auto_neg, u32 *speed, u8 *duplex);
278 
279 	int (*update_speed_duplex_h)(struct hnae3_handle *handle);
280 	int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
281 				   u8 duplex);
282 
283 	void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type);
284 	void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
285 	int (*set_loopback)(struct hnae3_handle *handle,
286 			    enum hnae3_loop loop_mode, bool en);
287 
288 	void (*set_promisc_mode)(struct hnae3_handle *handle, u32 en);
289 	int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
290 
291 	void (*get_pauseparam)(struct hnae3_handle *handle,
292 			       u32 *auto_neg, u32 *rx_en, u32 *tx_en);
293 	int (*set_pauseparam)(struct hnae3_handle *handle,
294 			      u32 auto_neg, u32 rx_en, u32 tx_en);
295 
296 	int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
297 	int (*get_autoneg)(struct hnae3_handle *handle);
298 
299 	void (*get_coalesce_usecs)(struct hnae3_handle *handle,
300 				   u32 *tx_usecs, u32 *rx_usecs);
301 	void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
302 					    u32 *tx_frames, u32 *rx_frames);
303 	int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
304 	int (*set_coalesce_frames)(struct hnae3_handle *handle,
305 				   u32 coalesce_frames);
306 	void (*get_coalesce_range)(struct hnae3_handle *handle,
307 				   u32 *tx_frames_low, u32 *rx_frames_low,
308 				   u32 *tx_frames_high, u32 *rx_frames_high,
309 				   u32 *tx_usecs_low, u32 *rx_usecs_low,
310 				   u32 *tx_usecs_high, u32 *rx_usecs_high);
311 
312 	void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
313 	int (*set_mac_addr)(struct hnae3_handle *handle, void *p);
314 	int (*add_uc_addr)(struct hnae3_handle *handle,
315 			   const unsigned char *addr);
316 	int (*rm_uc_addr)(struct hnae3_handle *handle,
317 			  const unsigned char *addr);
318 	int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
319 	int (*add_mc_addr)(struct hnae3_handle *handle,
320 			   const unsigned char *addr);
321 	int (*rm_mc_addr)(struct hnae3_handle *handle,
322 			  const unsigned char *addr);
323 
324 	void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
325 	void (*update_stats)(struct hnae3_handle *handle,
326 			     struct net_device_stats *net_stats);
327 	void (*get_stats)(struct hnae3_handle *handle, u64 *data);
328 
329 	void (*get_strings)(struct hnae3_handle *handle,
330 			    u32 stringset, u8 *data);
331 	int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
332 
333 	void (*get_regs)(struct hnae3_handle *handle, void *data);
334 	int (*get_regs_len)(struct hnae3_handle *handle);
335 
336 	u32 (*get_rss_key_size)(struct hnae3_handle *handle);
337 	u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
338 	int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
339 		       u8 *hfunc);
340 	int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
341 		       const u8 *key, const u8 hfunc);
342 
343 	int (*get_tc_size)(struct hnae3_handle *handle);
344 
345 	int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
346 			  struct hnae3_vector_info *vector_info);
347 	int (*map_ring_to_vector)(struct hnae3_handle *handle,
348 				  int vector_num,
349 				  struct hnae3_ring_chain_node *vr_chain);
350 	int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
351 				      int vector_num,
352 				      struct hnae3_ring_chain_node *vr_chain);
353 
354 	int (*add_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
355 	int (*del_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
356 
357 	void (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
358 	u32 (*get_fw_version)(struct hnae3_handle *handle);
359 	void (*get_mdix_mode)(struct hnae3_handle *handle,
360 			      u8 *tp_mdix_ctrl, u8 *tp_mdix);
361 
362 	int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
363 			       u16 vlan_id, bool is_kill);
364 	int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
365 				  u16 vlan, u8 qos, __be16 proto);
366 };
367 
368 struct hnae3_dcb_ops {
369 	/* IEEE 802.1Qaz std */
370 	int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
371 	int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
372 	int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
373 	int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
374 
375 	/* DCBX configuration */
376 	u8   (*getdcbx)(struct hnae3_handle *);
377 	u8   (*setdcbx)(struct hnae3_handle *, u8);
378 
379 	int (*map_update)(struct hnae3_handle *);
380 };
381 
382 struct hnae3_ae_algo {
383 	const struct hnae3_ae_ops *ops;
384 	struct list_head node;
385 	char name[HNAE3_CLASS_NAME_SIZE];
386 	const struct pci_device_id *pdev_id_table;
387 };
388 
389 #define HNAE3_INT_NAME_LEN        (IFNAMSIZ + 16)
390 #define HNAE3_ITR_COUNTDOWN_START 100
391 
392 struct hnae3_tc_info {
393 	u16	tqp_offset;	/* TQP offset from base TQP */
394 	u16	tqp_count;	/* Total TQPs */
395 	u8	tc;		/* TC index */
396 	bool	enable;		/* If this TC is enable or not */
397 };
398 
399 #define HNAE3_MAX_TC		8
400 #define HNAE3_MAX_USER_PRIO	8
401 struct hnae3_knic_private_info {
402 	struct net_device *netdev; /* Set by KNIC client when init instance */
403 	u16 rss_size;		   /* Allocated RSS queues */
404 	u16 rx_buf_len;
405 	u16 num_desc;
406 
407 	u8 num_tc;		   /* Total number of enabled TCs */
408 	u8 prio_tc[HNAE3_MAX_USER_PRIO];  /* TC indexed by prio */
409 	struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
410 
411 	u16 num_tqps;		  /* total number of TQPs in this handle */
412 	struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
413 	const struct hnae3_dcb_ops *dcb_ops;
414 };
415 
416 struct hnae3_roce_private_info {
417 	struct net_device *netdev;
418 	void __iomem *roce_io_base;
419 	int base_vector;
420 	int num_vectors;
421 };
422 
423 struct hnae3_unic_private_info {
424 	struct net_device *netdev;
425 	u16 rx_buf_len;
426 	u16 num_desc;
427 	u16 num_tqps;	/* total number of tqps in this handle */
428 	struct hnae3_queue **tqp;  /* array base of all TQPs of this instance */
429 };
430 
431 #define HNAE3_SUPPORT_MAC_LOOPBACK    1
432 #define HNAE3_SUPPORT_PHY_LOOPBACK    2
433 #define HNAE3_SUPPORT_SERDES_LOOPBACK 4
434 
435 struct hnae3_handle {
436 	struct hnae3_client *client;
437 	struct pci_dev *pdev;
438 	void *priv;
439 	struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
440 	u64 flags; /* Indicate the capabilities for this handle*/
441 
442 	union {
443 		struct net_device *netdev; /* first member */
444 		struct hnae3_knic_private_info kinfo;
445 		struct hnae3_unic_private_info uinfo;
446 		struct hnae3_roce_private_info rinfo;
447 	};
448 
449 	u32 numa_node_mask;	/* for multi-chip support */
450 };
451 
452 #define hnae_set_field(origin, mask, shift, val) \
453 	do { \
454 		(origin) &= (~(mask)); \
455 		(origin) |= ((val) << (shift)) & (mask); \
456 	} while (0)
457 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
458 
459 #define hnae_set_bit(origin, shift, val) \
460 	hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
461 #define hnae_get_bit(origin, shift) \
462 	hnae_get_field((origin), (0x1 << (shift)), (shift))
463 
464 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
465 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
466 
467 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
468 int hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
469 
470 void hnae3_unregister_client(struct hnae3_client *client);
471 int hnae3_register_client(struct hnae3_client *client);
472 #endif
473