1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #ifndef __HNAE3_H 5 #define __HNAE3_H 6 7 /* Names used in this framework: 8 * ae handle (handle): 9 * a set of queues provided by AE 10 * ring buffer queue (rbq): 11 * the channel between upper layer and the AE, can do tx and rx 12 * ring: 13 * a tx or rx channel within a rbq 14 * ring description (desc): 15 * an element in the ring with packet information 16 * buffer: 17 * a memory region referred by desc with the full packet payload 18 * 19 * "num" means a static number set as a parameter, "count" mean a dynamic 20 * number set while running 21 * "cb" means control block 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/dcbnl.h> 26 #include <linux/delay.h> 27 #include <linux/device.h> 28 #include <linux/module.h> 29 #include <linux/netdevice.h> 30 #include <linux/pci.h> 31 #include <linux/types.h> 32 33 #define HNAE3_MOD_VERSION "1.0" 34 35 #define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */ 36 37 /* Device version */ 38 #define HNAE3_DEVICE_VERSION_V1 0x00020 39 #define HNAE3_DEVICE_VERSION_V2 0x00021 40 #define HNAE3_DEVICE_VERSION_V3 0x00030 41 42 #define HNAE3_PCI_REVISION_BIT_SIZE 8 43 44 /* Device IDs */ 45 #define HNAE3_DEV_ID_GE 0xA220 46 #define HNAE3_DEV_ID_25GE 0xA221 47 #define HNAE3_DEV_ID_25GE_RDMA 0xA222 48 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223 49 #define HNAE3_DEV_ID_50GE_RDMA 0xA224 50 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225 51 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226 52 #define HNAE3_DEV_ID_200G_RDMA 0xA228 53 #define HNAE3_DEV_ID_VF 0xA22E 54 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F 55 56 #define HNAE3_CLASS_NAME_SIZE 16 57 58 #define HNAE3_DEV_INITED_B 0x0 59 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1 60 #define HNAE3_DEV_SUPPORT_DCB_B 0x2 61 #define HNAE3_KNIC_CLIENT_INITED_B 0x3 62 #define HNAE3_UNIC_CLIENT_INITED_B 0x4 63 #define HNAE3_ROCE_CLIENT_INITED_B 0x5 64 65 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\ 66 BIT(HNAE3_DEV_SUPPORT_ROCE_B)) 67 68 #define hnae3_dev_roce_supported(hdev) \ 69 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) 70 71 #define hnae3_dev_dcb_supported(hdev) \ 72 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) 73 74 enum HNAE3_DEV_CAP_BITS { 75 HNAE3_DEV_SUPPORT_FD_B, 76 HNAE3_DEV_SUPPORT_GRO_B, 77 HNAE3_DEV_SUPPORT_FEC_B, 78 HNAE3_DEV_SUPPORT_UDP_GSO_B, 79 HNAE3_DEV_SUPPORT_QB_B, 80 HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, 81 HNAE3_DEV_SUPPORT_PTP_B, 82 HNAE3_DEV_SUPPORT_INT_QL_B, 83 HNAE3_DEV_SUPPORT_SIMPLE_BD_B, 84 HNAE3_DEV_SUPPORT_TX_PUSH_B, 85 HNAE3_DEV_SUPPORT_PHY_IMP_B, 86 HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, 87 HNAE3_DEV_SUPPORT_HW_PAD_B, 88 HNAE3_DEV_SUPPORT_STASH_B, 89 }; 90 91 #define hnae3_dev_fd_supported(hdev) \ 92 test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps) 93 94 #define hnae3_dev_gro_supported(hdev) \ 95 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps) 96 97 #define hnae3_dev_fec_supported(hdev) \ 98 test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps) 99 100 #define hnae3_dev_udp_gso_supported(hdev) \ 101 test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps) 102 103 #define hnae3_dev_qb_supported(hdev) \ 104 test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps) 105 106 #define hnae3_dev_fd_forward_tc_supported(hdev) \ 107 test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps) 108 109 #define hnae3_dev_ptp_supported(hdev) \ 110 test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps) 111 112 #define hnae3_dev_int_ql_supported(hdev) \ 113 test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps) 114 115 #define hnae3_dev_simple_bd_supported(hdev) \ 116 test_bit(HNAE3_DEV_SUPPORT_SIMPLE_BD_B, (hdev)->ae_dev->caps) 117 118 #define hnae3_dev_tx_push_supported(hdev) \ 119 test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps) 120 121 #define hnae3_dev_phy_imp_supported(hdev) \ 122 test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps) 123 124 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \ 125 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps) 126 127 #define hnae3_dev_hw_pad_supported(hdev) \ 128 test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps) 129 130 #define hnae3_dev_stash_supported(hdev) \ 131 test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps) 132 133 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \ 134 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps) 135 136 #define ring_ptr_move_fw(ring, p) \ 137 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 138 #define ring_ptr_move_bw(ring, p) \ 139 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 140 141 enum hns_desc_type { 142 DESC_TYPE_UNKNOWN, 143 DESC_TYPE_SKB, 144 DESC_TYPE_FRAGLIST_SKB, 145 DESC_TYPE_PAGE, 146 }; 147 148 struct hnae3_handle; 149 150 struct hnae3_queue { 151 void __iomem *io_base; 152 struct hnae3_ae_algo *ae_algo; 153 struct hnae3_handle *handle; 154 int tqp_index; /* index in a handle */ 155 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 156 u16 tx_desc_num; /* total number of tx desc */ 157 u16 rx_desc_num; /* total number of rx desc */ 158 }; 159 160 struct hns3_mac_stats { 161 u64 tx_pause_cnt; 162 u64 rx_pause_cnt; 163 }; 164 165 /* hnae3 loop mode */ 166 enum hnae3_loop { 167 HNAE3_LOOP_APP, 168 HNAE3_LOOP_SERIAL_SERDES, 169 HNAE3_LOOP_PARALLEL_SERDES, 170 HNAE3_LOOP_PHY, 171 HNAE3_LOOP_NONE, 172 }; 173 174 enum hnae3_client_type { 175 HNAE3_CLIENT_KNIC, 176 HNAE3_CLIENT_ROCE, 177 }; 178 179 /* mac media type */ 180 enum hnae3_media_type { 181 HNAE3_MEDIA_TYPE_UNKNOWN, 182 HNAE3_MEDIA_TYPE_FIBER, 183 HNAE3_MEDIA_TYPE_COPPER, 184 HNAE3_MEDIA_TYPE_BACKPLANE, 185 HNAE3_MEDIA_TYPE_NONE, 186 }; 187 188 /* must be consistent with definition in firmware */ 189 enum hnae3_module_type { 190 HNAE3_MODULE_TYPE_UNKNOWN = 0x00, 191 HNAE3_MODULE_TYPE_FIBRE_LR = 0x01, 192 HNAE3_MODULE_TYPE_FIBRE_SR = 0x02, 193 HNAE3_MODULE_TYPE_AOC = 0x03, 194 HNAE3_MODULE_TYPE_CR = 0x04, 195 HNAE3_MODULE_TYPE_KR = 0x05, 196 HNAE3_MODULE_TYPE_TP = 0x06, 197 }; 198 199 enum hnae3_fec_mode { 200 HNAE3_FEC_AUTO = 0, 201 HNAE3_FEC_BASER, 202 HNAE3_FEC_RS, 203 HNAE3_FEC_USER_DEF, 204 }; 205 206 enum hnae3_reset_notify_type { 207 HNAE3_UP_CLIENT, 208 HNAE3_DOWN_CLIENT, 209 HNAE3_INIT_CLIENT, 210 HNAE3_UNINIT_CLIENT, 211 }; 212 213 enum hnae3_hw_error_type { 214 HNAE3_PPU_POISON_ERROR, 215 HNAE3_CMDQ_ECC_ERROR, 216 HNAE3_IMP_RD_POISON_ERROR, 217 HNAE3_ROCEE_AXI_RESP_ERROR, 218 }; 219 220 enum hnae3_reset_type { 221 HNAE3_VF_RESET, 222 HNAE3_VF_FUNC_RESET, 223 HNAE3_VF_PF_FUNC_RESET, 224 HNAE3_VF_FULL_RESET, 225 HNAE3_FLR_RESET, 226 HNAE3_FUNC_RESET, 227 HNAE3_GLOBAL_RESET, 228 HNAE3_IMP_RESET, 229 HNAE3_UNKNOWN_RESET, 230 HNAE3_NONE_RESET, 231 HNAE3_MAX_RESET, 232 }; 233 234 enum hnae3_port_base_vlan_state { 235 HNAE3_PORT_BASE_VLAN_DISABLE, 236 HNAE3_PORT_BASE_VLAN_ENABLE, 237 HNAE3_PORT_BASE_VLAN_MODIFY, 238 HNAE3_PORT_BASE_VLAN_NOCHANGE, 239 }; 240 241 struct hnae3_vector_info { 242 u8 __iomem *io_addr; 243 int vector; 244 }; 245 246 #define HNAE3_RING_TYPE_B 0 247 #define HNAE3_RING_TYPE_TX 0 248 #define HNAE3_RING_TYPE_RX 1 249 #define HNAE3_RING_GL_IDX_S 0 250 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0) 251 #define HNAE3_RING_GL_RX 0 252 #define HNAE3_RING_GL_TX 1 253 254 #define HNAE3_FW_VERSION_BYTE3_SHIFT 24 255 #define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24) 256 #define HNAE3_FW_VERSION_BYTE2_SHIFT 16 257 #define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16) 258 #define HNAE3_FW_VERSION_BYTE1_SHIFT 8 259 #define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8) 260 #define HNAE3_FW_VERSION_BYTE0_SHIFT 0 261 #define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0) 262 263 struct hnae3_ring_chain_node { 264 struct hnae3_ring_chain_node *next; 265 u32 tqp_index; 266 u32 flag; 267 u32 int_gl_idx; 268 }; 269 270 #define HNAE3_IS_TX_RING(node) \ 271 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX) 272 273 /* device specification info from firmware */ 274 struct hnae3_dev_specs { 275 u32 mac_entry_num; /* number of mac-vlan table entry */ 276 u32 mng_entry_num; /* number of manager table entry */ 277 u32 max_tm_rate; 278 u16 rss_ind_tbl_size; 279 u16 rss_key_size; 280 u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */ 281 u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */ 282 u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */ 283 }; 284 285 struct hnae3_client_ops { 286 int (*init_instance)(struct hnae3_handle *handle); 287 void (*uninit_instance)(struct hnae3_handle *handle, bool reset); 288 void (*link_status_change)(struct hnae3_handle *handle, bool state); 289 int (*setup_tc)(struct hnae3_handle *handle, u8 tc); 290 int (*reset_notify)(struct hnae3_handle *handle, 291 enum hnae3_reset_notify_type type); 292 void (*process_hw_error)(struct hnae3_handle *handle, 293 enum hnae3_hw_error_type); 294 }; 295 296 #define HNAE3_CLIENT_NAME_LENGTH 16 297 struct hnae3_client { 298 char name[HNAE3_CLIENT_NAME_LENGTH]; 299 unsigned long state; 300 enum hnae3_client_type type; 301 const struct hnae3_client_ops *ops; 302 struct list_head node; 303 }; 304 305 #define HNAE3_DEV_CAPS_MAX_NUM 96 306 struct hnae3_ae_dev { 307 struct pci_dev *pdev; 308 const struct hnae3_ae_ops *ops; 309 struct list_head node; 310 u32 flag; 311 unsigned long hw_err_reset_req; 312 struct hnae3_dev_specs dev_specs; 313 u32 dev_version; 314 unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)]; 315 void *priv; 316 }; 317 318 /* This struct defines the operation on the handle. 319 * 320 * init_ae_dev(): (mandatory) 321 * Get PF configure from pci_dev and initialize PF hardware 322 * uninit_ae_dev() 323 * Disable PF device and release PF resource 324 * register_client 325 * Register client to ae_dev 326 * unregister_client() 327 * Unregister client from ae_dev 328 * start() 329 * Enable the hardware 330 * stop() 331 * Disable the hardware 332 * start_client() 333 * Inform the hclge that client has been started 334 * stop_client() 335 * Inform the hclge that client has been stopped 336 * get_status() 337 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 338 * non-ok 339 * get_ksettings_an_result() 340 * Get negotiation status,speed and duplex 341 * get_media_type() 342 * Get media type of MAC 343 * check_port_speed() 344 * Check target speed whether is supported 345 * adjust_link() 346 * Adjust link status 347 * set_loopback() 348 * Set loopback 349 * set_promisc_mode 350 * Set promisc mode 351 * request_update_promisc_mode 352 * request to hclge(vf) to update promisc mode 353 * set_mtu() 354 * set mtu 355 * get_pauseparam() 356 * get tx and rx of pause frame use 357 * set_pauseparam() 358 * set tx and rx of pause frame use 359 * set_autoneg() 360 * set auto autonegotiation of pause frame use 361 * get_autoneg() 362 * get auto autonegotiation of pause frame use 363 * restart_autoneg() 364 * restart autonegotiation 365 * halt_autoneg() 366 * halt/resume autonegotiation when autonegotiation on 367 * get_coalesce_usecs() 368 * get usecs to delay a TX interrupt after a packet is sent 369 * get_rx_max_coalesced_frames() 370 * get Maximum number of packets to be sent before a TX interrupt. 371 * set_coalesce_usecs() 372 * set usecs to delay a TX interrupt after a packet is sent 373 * set_coalesce_frames() 374 * set Maximum number of packets to be sent before a TX interrupt. 375 * get_mac_addr() 376 * get mac address 377 * set_mac_addr() 378 * set mac address 379 * add_uc_addr 380 * Add unicast addr to mac table 381 * rm_uc_addr 382 * Remove unicast addr from mac table 383 * set_mc_addr() 384 * Set multicast address 385 * add_mc_addr 386 * Add multicast address to mac table 387 * rm_mc_addr 388 * Remove multicast address from mac table 389 * update_stats() 390 * Update Old network device statistics 391 * get_mac_stats() 392 * get mac pause statistics including tx_cnt and rx_cnt 393 * get_ethtool_stats() 394 * Get ethtool network device statistics 395 * get_strings() 396 * Get a set of strings that describe the requested objects 397 * get_sset_count() 398 * Get number of strings that @get_strings will write 399 * update_led_status() 400 * Update the led status 401 * set_led_id() 402 * Set led id 403 * get_regs() 404 * Get regs dump 405 * get_regs_len() 406 * Get the len of the regs dump 407 * get_rss_key_size() 408 * Get rss key size 409 * get_rss_indir_size() 410 * Get rss indirection table size 411 * get_rss() 412 * Get rss table 413 * set_rss() 414 * Set rss table 415 * get_tc_size() 416 * Get tc size of handle 417 * get_vector() 418 * Get vector number and vector information 419 * put_vector() 420 * Put the vector in hdev 421 * map_ring_to_vector() 422 * Map rings to vector 423 * unmap_ring_from_vector() 424 * Unmap rings from vector 425 * reset_queue() 426 * Reset queue 427 * get_fw_version() 428 * Get firmware version 429 * get_mdix_mode() 430 * Get media typr of phy 431 * enable_vlan_filter() 432 * Enable vlan filter 433 * set_vlan_filter() 434 * Set vlan filter config of Ports 435 * set_vf_vlan_filter() 436 * Set vlan filter config of vf 437 * enable_hw_strip_rxvtag() 438 * Enable/disable hardware strip vlan tag of packets received 439 * set_gro_en 440 * Enable/disable HW GRO 441 * add_arfs_entry 442 * Check the 5-tuples of flow, and create flow director rule 443 * get_vf_config 444 * Get the VF configuration setting by the host 445 * set_vf_link_state 446 * Set VF link status 447 * set_vf_spoofchk 448 * Enable/disable spoof check for specified vf 449 * set_vf_trust 450 * Enable/disable trust for specified vf, if the vf being trusted, then 451 * it can enable promisc mode 452 * set_vf_rate 453 * Set the max tx rate of specified vf. 454 * set_vf_mac 455 * Configure the default MAC for specified VF 456 * get_module_eeprom 457 * Get the optical module eeprom info. 458 */ 459 struct hnae3_ae_ops { 460 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); 461 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev); 462 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev); 463 void (*flr_done)(struct hnae3_ae_dev *ae_dev); 464 int (*init_client_instance)(struct hnae3_client *client, 465 struct hnae3_ae_dev *ae_dev); 466 void (*uninit_client_instance)(struct hnae3_client *client, 467 struct hnae3_ae_dev *ae_dev); 468 int (*start)(struct hnae3_handle *handle); 469 void (*stop)(struct hnae3_handle *handle); 470 int (*client_start)(struct hnae3_handle *handle); 471 void (*client_stop)(struct hnae3_handle *handle); 472 int (*get_status)(struct hnae3_handle *handle); 473 void (*get_ksettings_an_result)(struct hnae3_handle *handle, 474 u8 *auto_neg, u32 *speed, u8 *duplex); 475 476 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed, 477 u8 duplex); 478 479 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type, 480 u8 *module_type); 481 int (*check_port_speed)(struct hnae3_handle *handle, u32 speed); 482 void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability, 483 u8 *fec_mode); 484 int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode); 485 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex); 486 int (*set_loopback)(struct hnae3_handle *handle, 487 enum hnae3_loop loop_mode, bool en); 488 489 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc, 490 bool en_mc_pmc); 491 void (*request_update_promisc_mode)(struct hnae3_handle *handle); 492 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu); 493 494 void (*get_pauseparam)(struct hnae3_handle *handle, 495 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 496 int (*set_pauseparam)(struct hnae3_handle *handle, 497 u32 auto_neg, u32 rx_en, u32 tx_en); 498 499 int (*set_autoneg)(struct hnae3_handle *handle, bool enable); 500 int (*get_autoneg)(struct hnae3_handle *handle); 501 int (*restart_autoneg)(struct hnae3_handle *handle); 502 int (*halt_autoneg)(struct hnae3_handle *handle, bool halt); 503 504 void (*get_coalesce_usecs)(struct hnae3_handle *handle, 505 u32 *tx_usecs, u32 *rx_usecs); 506 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle, 507 u32 *tx_frames, u32 *rx_frames); 508 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout); 509 int (*set_coalesce_frames)(struct hnae3_handle *handle, 510 u32 coalesce_frames); 511 void (*get_coalesce_range)(struct hnae3_handle *handle, 512 u32 *tx_frames_low, u32 *rx_frames_low, 513 u32 *tx_frames_high, u32 *rx_frames_high, 514 u32 *tx_usecs_low, u32 *rx_usecs_low, 515 u32 *tx_usecs_high, u32 *rx_usecs_high); 516 517 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p); 518 int (*set_mac_addr)(struct hnae3_handle *handle, void *p, 519 bool is_first); 520 int (*do_ioctl)(struct hnae3_handle *handle, 521 struct ifreq *ifr, int cmd); 522 int (*add_uc_addr)(struct hnae3_handle *handle, 523 const unsigned char *addr); 524 int (*rm_uc_addr)(struct hnae3_handle *handle, 525 const unsigned char *addr); 526 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr); 527 int (*add_mc_addr)(struct hnae3_handle *handle, 528 const unsigned char *addr); 529 int (*rm_mc_addr)(struct hnae3_handle *handle, 530 const unsigned char *addr); 531 void (*set_tso_stats)(struct hnae3_handle *handle, int enable); 532 void (*update_stats)(struct hnae3_handle *handle, 533 struct net_device_stats *net_stats); 534 void (*get_stats)(struct hnae3_handle *handle, u64 *data); 535 void (*get_mac_stats)(struct hnae3_handle *handle, 536 struct hns3_mac_stats *mac_stats); 537 void (*get_strings)(struct hnae3_handle *handle, 538 u32 stringset, u8 *data); 539 int (*get_sset_count)(struct hnae3_handle *handle, int stringset); 540 541 void (*get_regs)(struct hnae3_handle *handle, u32 *version, 542 void *data); 543 int (*get_regs_len)(struct hnae3_handle *handle); 544 545 u32 (*get_rss_key_size)(struct hnae3_handle *handle); 546 u32 (*get_rss_indir_size)(struct hnae3_handle *handle); 547 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key, 548 u8 *hfunc); 549 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir, 550 const u8 *key, const u8 hfunc); 551 int (*set_rss_tuple)(struct hnae3_handle *handle, 552 struct ethtool_rxnfc *cmd); 553 int (*get_rss_tuple)(struct hnae3_handle *handle, 554 struct ethtool_rxnfc *cmd); 555 556 int (*get_tc_size)(struct hnae3_handle *handle); 557 558 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num, 559 struct hnae3_vector_info *vector_info); 560 int (*put_vector)(struct hnae3_handle *handle, int vector_num); 561 int (*map_ring_to_vector)(struct hnae3_handle *handle, 562 int vector_num, 563 struct hnae3_ring_chain_node *vr_chain); 564 int (*unmap_ring_from_vector)(struct hnae3_handle *handle, 565 int vector_num, 566 struct hnae3_ring_chain_node *vr_chain); 567 568 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); 569 u32 (*get_fw_version)(struct hnae3_handle *handle); 570 void (*get_mdix_mode)(struct hnae3_handle *handle, 571 u8 *tp_mdix_ctrl, u8 *tp_mdix); 572 573 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable); 574 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto, 575 u16 vlan_id, bool is_kill); 576 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, 577 u16 vlan, u8 qos, __be16 proto); 578 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); 579 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle); 580 enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev, 581 unsigned long *addr); 582 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev, 583 enum hnae3_reset_type rst_type); 584 void (*get_channels)(struct hnae3_handle *handle, 585 struct ethtool_channels *ch); 586 void (*get_tqps_and_rss_info)(struct hnae3_handle *h, 587 u16 *alloc_tqps, u16 *max_rss_size); 588 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num, 589 bool rxfh_configured); 590 void (*get_flowctrl_adv)(struct hnae3_handle *handle, 591 u32 *flowctrl_adv); 592 int (*set_led_id)(struct hnae3_handle *handle, 593 enum ethtool_phys_id_state status); 594 void (*get_link_mode)(struct hnae3_handle *handle, 595 unsigned long *supported, 596 unsigned long *advertising); 597 int (*add_fd_entry)(struct hnae3_handle *handle, 598 struct ethtool_rxnfc *cmd); 599 int (*del_fd_entry)(struct hnae3_handle *handle, 600 struct ethtool_rxnfc *cmd); 601 void (*del_all_fd_entries)(struct hnae3_handle *handle, 602 bool clear_list); 603 int (*get_fd_rule_cnt)(struct hnae3_handle *handle, 604 struct ethtool_rxnfc *cmd); 605 int (*get_fd_rule_info)(struct hnae3_handle *handle, 606 struct ethtool_rxnfc *cmd); 607 int (*get_fd_all_rules)(struct hnae3_handle *handle, 608 struct ethtool_rxnfc *cmd, u32 *rule_locs); 609 void (*enable_fd)(struct hnae3_handle *handle, bool enable); 610 int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id, 611 u16 flow_id, struct flow_keys *fkeys); 612 int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf); 613 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); 614 bool (*get_hw_reset_stat)(struct hnae3_handle *handle); 615 bool (*ae_dev_resetting)(struct hnae3_handle *handle); 616 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle); 617 int (*set_gro_en)(struct hnae3_handle *handle, bool enable); 618 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id); 619 void (*set_timer_task)(struct hnae3_handle *handle, bool enable); 620 int (*mac_connect_phy)(struct hnae3_handle *handle); 621 void (*mac_disconnect_phy)(struct hnae3_handle *handle); 622 int (*get_vf_config)(struct hnae3_handle *handle, int vf, 623 struct ifla_vf_info *ivf); 624 int (*set_vf_link_state)(struct hnae3_handle *handle, int vf, 625 int link_state); 626 int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf, 627 bool enable); 628 int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable); 629 int (*set_vf_rate)(struct hnae3_handle *handle, int vf, 630 int min_tx_rate, int max_tx_rate, bool force); 631 int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p); 632 int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset, 633 u32 len, u8 *data); 634 bool (*get_cmdq_stat)(struct hnae3_handle *handle); 635 }; 636 637 struct hnae3_dcb_ops { 638 /* IEEE 802.1Qaz std */ 639 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *); 640 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *); 641 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *); 642 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *); 643 644 /* DCBX configuration */ 645 u8 (*getdcbx)(struct hnae3_handle *); 646 u8 (*setdcbx)(struct hnae3_handle *, u8); 647 648 int (*setup_tc)(struct hnae3_handle *, u8, u8 *); 649 }; 650 651 struct hnae3_ae_algo { 652 const struct hnae3_ae_ops *ops; 653 struct list_head node; 654 const struct pci_device_id *pdev_id_table; 655 }; 656 657 #define HNAE3_INT_NAME_LEN 32 658 #define HNAE3_ITR_COUNTDOWN_START 100 659 660 struct hnae3_tc_info { 661 u16 tqp_offset; /* TQP offset from base TQP */ 662 u16 tqp_count; /* Total TQPs */ 663 u8 tc; /* TC index */ 664 bool enable; /* If this TC is enable or not */ 665 }; 666 667 #define HNAE3_MAX_TC 8 668 #define HNAE3_MAX_USER_PRIO 8 669 struct hnae3_knic_private_info { 670 struct net_device *netdev; /* Set by KNIC client when init instance */ 671 u16 rss_size; /* Allocated RSS queues */ 672 u16 req_rss_size; 673 u16 rx_buf_len; 674 u16 num_tx_desc; 675 u16 num_rx_desc; 676 677 u8 num_tc; /* Total number of enabled TCs */ 678 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ 679 struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ 680 681 u16 num_tqps; /* total number of TQPs in this handle */ 682 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */ 683 const struct hnae3_dcb_ops *dcb_ops; 684 685 u16 int_rl_setting; 686 enum pkt_hash_types rss_type; 687 }; 688 689 struct hnae3_roce_private_info { 690 struct net_device *netdev; 691 void __iomem *roce_io_base; 692 void __iomem *roce_mem_base; 693 int base_vector; 694 int num_vectors; 695 696 /* The below attributes defined for RoCE client, hnae3 gives 697 * initial values to them, and RoCE client can modify and use 698 * them. 699 */ 700 unsigned long reset_state; 701 unsigned long instance_state; 702 unsigned long state; 703 }; 704 705 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0) 706 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1) 707 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2) 708 #define HNAE3_SUPPORT_VF BIT(3) 709 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4) 710 711 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */ 712 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */ 713 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */ 714 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */ 715 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */ 716 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */ 717 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE) 718 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE) 719 720 struct hnae3_handle { 721 struct hnae3_client *client; 722 struct pci_dev *pdev; 723 void *priv; 724 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ 725 u64 flags; /* Indicate the capabilities for this handle */ 726 727 union { 728 struct net_device *netdev; /* first member */ 729 struct hnae3_knic_private_info kinfo; 730 struct hnae3_roce_private_info rinfo; 731 }; 732 733 u32 numa_node_mask; /* for multi-chip support */ 734 735 enum hnae3_port_base_vlan_state port_base_vlan_state; 736 737 u8 netdev_flags; 738 struct dentry *hnae3_dbgfs; 739 740 /* Network interface message level enabled bits */ 741 u32 msg_enable; 742 }; 743 744 #define hnae3_set_field(origin, mask, shift, val) \ 745 do { \ 746 (origin) &= (~(mask)); \ 747 (origin) |= ((val) << (shift)) & (mask); \ 748 } while (0) 749 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 750 751 #define hnae3_set_bit(origin, shift, val) \ 752 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val)) 753 #define hnae3_get_bit(origin, shift) \ 754 hnae3_get_field((origin), (0x1 << (shift)), (shift)) 755 756 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); 757 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev); 758 759 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo); 760 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo); 761 762 void hnae3_unregister_client(struct hnae3_client *client); 763 int hnae3_register_client(struct hnae3_client *client); 764 765 void hnae3_set_client_init_flag(struct hnae3_client *client, 766 struct hnae3_ae_dev *ae_dev, 767 unsigned int inited); 768 #endif 769