xref: /openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hnae3.h (revision 023e41632e065d49bcbe31b3c4b336217f96a271)
1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
3 
4 #ifndef __HNAE3_H
5 #define __HNAE3_H
6 
7 /* Names used in this framework:
8  *      ae handle (handle):
9  *        a set of queues provided by AE
10  *      ring buffer queue (rbq):
11  *        the channel between upper layer and the AE, can do tx and rx
12  *      ring:
13  *        a tx or rx channel within a rbq
14  *      ring description (desc):
15  *        an element in the ring with packet information
16  *      buffer:
17  *        a memory region referred by desc with the full packet payload
18  *
19  * "num" means a static number set as a parameter, "count" mean a dynamic
20  *   number set while running
21  * "cb" means control block
22  */
23 
24 #include <linux/acpi.h>
25 #include <linux/dcbnl.h>
26 #include <linux/delay.h>
27 #include <linux/device.h>
28 #include <linux/module.h>
29 #include <linux/netdevice.h>
30 #include <linux/pci.h>
31 #include <linux/types.h>
32 
33 #define HNAE3_MOD_VERSION "1.0"
34 
35 /* Device IDs */
36 #define HNAE3_DEV_ID_GE				0xA220
37 #define HNAE3_DEV_ID_25GE			0xA221
38 #define HNAE3_DEV_ID_25GE_RDMA			0xA222
39 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC		0xA223
40 #define HNAE3_DEV_ID_50GE_RDMA			0xA224
41 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC		0xA225
42 #define HNAE3_DEV_ID_100G_RDMA_MACSEC		0xA226
43 #define HNAE3_DEV_ID_100G_VF			0xA22E
44 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF	0xA22F
45 
46 #define HNAE3_CLASS_NAME_SIZE 16
47 
48 #define HNAE3_DEV_INITED_B			0x0
49 #define HNAE3_DEV_SUPPORT_ROCE_B		0x1
50 #define HNAE3_DEV_SUPPORT_DCB_B			0x2
51 #define HNAE3_KNIC_CLIENT_INITED_B		0x3
52 #define HNAE3_UNIC_CLIENT_INITED_B		0x4
53 #define HNAE3_ROCE_CLIENT_INITED_B		0x5
54 #define HNAE3_DEV_SUPPORT_FD_B			0x6
55 #define HNAE3_DEV_SUPPORT_GRO_B			0x7
56 
57 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
58 		BIT(HNAE3_DEV_SUPPORT_ROCE_B))
59 
60 #define hnae3_dev_roce_supported(hdev) \
61 	hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
62 
63 #define hnae3_dev_dcb_supported(hdev) \
64 	hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
65 
66 #define hnae3_dev_fd_supported(hdev) \
67 	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B)
68 
69 #define hnae3_dev_gro_supported(hdev) \
70 	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B)
71 
72 #define ring_ptr_move_fw(ring, p) \
73 	((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
74 #define ring_ptr_move_bw(ring, p) \
75 	((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
76 
77 enum hns_desc_type {
78 	DESC_TYPE_SKB,
79 	DESC_TYPE_PAGE,
80 };
81 
82 struct hnae3_handle;
83 
84 struct hnae3_queue {
85 	void __iomem *io_base;
86 	struct hnae3_ae_algo *ae_algo;
87 	struct hnae3_handle *handle;
88 	int tqp_index;	/* index in a handle */
89 	u32 buf_size;	/* size for hnae_desc->addr, preset by AE */
90 	u16 tx_desc_num;/* total number of tx desc */
91 	u16 rx_desc_num;/* total number of rx desc */
92 };
93 
94 /*hnae3 loop mode*/
95 enum hnae3_loop {
96 	HNAE3_LOOP_APP,
97 	HNAE3_LOOP_SERIAL_SERDES,
98 	HNAE3_LOOP_PARALLEL_SERDES,
99 	HNAE3_LOOP_PHY,
100 	HNAE3_LOOP_NONE,
101 };
102 
103 enum hnae3_client_type {
104 	HNAE3_CLIENT_KNIC,
105 	HNAE3_CLIENT_UNIC,
106 	HNAE3_CLIENT_ROCE,
107 };
108 
109 enum hnae3_dev_type {
110 	HNAE3_DEV_KNIC,
111 	HNAE3_DEV_UNIC,
112 };
113 
114 /* mac media type */
115 enum hnae3_media_type {
116 	HNAE3_MEDIA_TYPE_UNKNOWN,
117 	HNAE3_MEDIA_TYPE_FIBER,
118 	HNAE3_MEDIA_TYPE_COPPER,
119 	HNAE3_MEDIA_TYPE_BACKPLANE,
120 	HNAE3_MEDIA_TYPE_NONE,
121 };
122 
123 enum hnae3_reset_notify_type {
124 	HNAE3_UP_CLIENT,
125 	HNAE3_DOWN_CLIENT,
126 	HNAE3_INIT_CLIENT,
127 	HNAE3_UNINIT_CLIENT,
128 	HNAE3_RESTORE_CLIENT,
129 };
130 
131 enum hnae3_reset_type {
132 	HNAE3_VF_RESET,
133 	HNAE3_VF_FUNC_RESET,
134 	HNAE3_VF_PF_FUNC_RESET,
135 	HNAE3_VF_FULL_RESET,
136 	HNAE3_FLR_RESET,
137 	HNAE3_FUNC_RESET,
138 	HNAE3_CORE_RESET,
139 	HNAE3_GLOBAL_RESET,
140 	HNAE3_IMP_RESET,
141 	HNAE3_UNKNOWN_RESET,
142 	HNAE3_NONE_RESET,
143 };
144 
145 enum hnae3_flr_state {
146 	HNAE3_FLR_DOWN,
147 	HNAE3_FLR_DONE,
148 };
149 
150 struct hnae3_vector_info {
151 	u8 __iomem *io_addr;
152 	int vector;
153 };
154 
155 #define HNAE3_RING_TYPE_B 0
156 #define HNAE3_RING_TYPE_TX 0
157 #define HNAE3_RING_TYPE_RX 1
158 #define HNAE3_RING_GL_IDX_S 0
159 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
160 #define HNAE3_RING_GL_RX 0
161 #define HNAE3_RING_GL_TX 1
162 
163 struct hnae3_ring_chain_node {
164 	struct hnae3_ring_chain_node *next;
165 	u32 tqp_index;
166 	u32 flag;
167 	u32 int_gl_idx;
168 };
169 
170 #define HNAE3_IS_TX_RING(node) \
171 	(((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
172 
173 struct hnae3_client_ops {
174 	int (*init_instance)(struct hnae3_handle *handle);
175 	void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
176 	void (*link_status_change)(struct hnae3_handle *handle, bool state);
177 	int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
178 	int (*reset_notify)(struct hnae3_handle *handle,
179 			    enum hnae3_reset_notify_type type);
180 	enum hnae3_reset_type (*process_hw_error)(struct hnae3_handle *handle);
181 };
182 
183 #define HNAE3_CLIENT_NAME_LENGTH 16
184 struct hnae3_client {
185 	char name[HNAE3_CLIENT_NAME_LENGTH];
186 	unsigned long state;
187 	enum hnae3_client_type type;
188 	const struct hnae3_client_ops *ops;
189 	struct list_head node;
190 };
191 
192 struct hnae3_ae_dev {
193 	struct pci_dev *pdev;
194 	const struct hnae3_ae_ops *ops;
195 	struct list_head node;
196 	u32 flag;
197 	u8 override_pci_need_reset; /* fix to stop multiple reset happening */
198 	enum hnae3_dev_type dev_type;
199 	enum hnae3_reset_type reset_type;
200 	void *priv;
201 };
202 
203 /* This struct defines the operation on the handle.
204  *
205  * init_ae_dev(): (mandatory)
206  *   Get PF configure from pci_dev and initialize PF hardware
207  * uninit_ae_dev()
208  *   Disable PF device and release PF resource
209  * register_client
210  *   Register client to ae_dev
211  * unregister_client()
212  *   Unregister client from ae_dev
213  * start()
214  *   Enable the hardware
215  * stop()
216  *   Disable the hardware
217  * start_client()
218  *   Inform the hclge that client has been started
219  * stop_client()
220  *   Inform the hclge that client has been stopped
221  * get_status()
222  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
223  *   non-ok
224  * get_ksettings_an_result()
225  *   Get negotiation status,speed and duplex
226  * update_speed_duplex_h()
227  *   Update hardware speed and duplex
228  * get_media_type()
229  *   Get media type of MAC
230  * adjust_link()
231  *   Adjust link status
232  * set_loopback()
233  *   Set loopback
234  * set_promisc_mode
235  *   Set promisc mode
236  * set_mtu()
237  *   set mtu
238  * get_pauseparam()
239  *   get tx and rx of pause frame use
240  * set_pauseparam()
241  *   set tx and rx of pause frame use
242  * set_autoneg()
243  *   set auto autonegotiation of pause frame use
244  * get_autoneg()
245  *   get auto autonegotiation of pause frame use
246  * get_coalesce_usecs()
247  *   get usecs to delay a TX interrupt after a packet is sent
248  * get_rx_max_coalesced_frames()
249  *   get Maximum number of packets to be sent before a TX interrupt.
250  * set_coalesce_usecs()
251  *   set usecs to delay a TX interrupt after a packet is sent
252  * set_coalesce_frames()
253  *   set Maximum number of packets to be sent before a TX interrupt.
254  * get_mac_addr()
255  *   get mac address
256  * set_mac_addr()
257  *   set mac address
258  * add_uc_addr
259  *   Add unicast addr to mac table
260  * rm_uc_addr
261  *   Remove unicast addr from mac table
262  * set_mc_addr()
263  *   Set multicast address
264  * add_mc_addr
265  *   Add multicast address to mac table
266  * rm_mc_addr
267  *   Remove multicast address from mac table
268  * update_stats()
269  *   Update Old network device statistics
270  * get_ethtool_stats()
271  *   Get ethtool network device statistics
272  * get_strings()
273  *   Get a set of strings that describe the requested objects
274  * get_sset_count()
275  *   Get number of strings that @get_strings will write
276  * update_led_status()
277  *   Update the led status
278  * set_led_id()
279  *   Set led id
280  * get_regs()
281  *   Get regs dump
282  * get_regs_len()
283  *   Get the len of the regs dump
284  * get_rss_key_size()
285  *   Get rss key size
286  * get_rss_indir_size()
287  *   Get rss indirection table size
288  * get_rss()
289  *   Get rss table
290  * set_rss()
291  *   Set rss table
292  * get_tc_size()
293  *   Get tc size of handle
294  * get_vector()
295  *   Get vector number and vector information
296  * put_vector()
297  *   Put the vector in hdev
298  * map_ring_to_vector()
299  *   Map rings to vector
300  * unmap_ring_from_vector()
301  *   Unmap rings from vector
302  * reset_queue()
303  *   Reset queue
304  * get_fw_version()
305  *   Get firmware version
306  * get_mdix_mode()
307  *   Get media typr of phy
308  * enable_vlan_filter()
309  *   Enable vlan filter
310  * set_vlan_filter()
311  *   Set vlan filter config of Ports
312  * set_vf_vlan_filter()
313  *   Set vlan filter config of vf
314  * enable_hw_strip_rxvtag()
315  *   Enable/disable hardware strip vlan tag of packets received
316  * set_gro_en
317  *   Enable/disable HW GRO
318  */
319 struct hnae3_ae_ops {
320 	int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
321 	void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
322 	void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
323 	void (*flr_done)(struct hnae3_ae_dev *ae_dev);
324 	int (*init_client_instance)(struct hnae3_client *client,
325 				    struct hnae3_ae_dev *ae_dev);
326 	void (*uninit_client_instance)(struct hnae3_client *client,
327 				       struct hnae3_ae_dev *ae_dev);
328 	int (*start)(struct hnae3_handle *handle);
329 	void (*stop)(struct hnae3_handle *handle);
330 	int (*client_start)(struct hnae3_handle *handle);
331 	void (*client_stop)(struct hnae3_handle *handle);
332 	int (*get_status)(struct hnae3_handle *handle);
333 	void (*get_ksettings_an_result)(struct hnae3_handle *handle,
334 					u8 *auto_neg, u32 *speed, u8 *duplex);
335 
336 	int (*update_speed_duplex_h)(struct hnae3_handle *handle);
337 	int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
338 				   u8 duplex);
339 
340 	void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type);
341 	void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
342 	int (*set_loopback)(struct hnae3_handle *handle,
343 			    enum hnae3_loop loop_mode, bool en);
344 
345 	int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
346 				bool en_mc_pmc);
347 	int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
348 
349 	void (*get_pauseparam)(struct hnae3_handle *handle,
350 			       u32 *auto_neg, u32 *rx_en, u32 *tx_en);
351 	int (*set_pauseparam)(struct hnae3_handle *handle,
352 			      u32 auto_neg, u32 rx_en, u32 tx_en);
353 
354 	int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
355 	int (*get_autoneg)(struct hnae3_handle *handle);
356 
357 	void (*get_coalesce_usecs)(struct hnae3_handle *handle,
358 				   u32 *tx_usecs, u32 *rx_usecs);
359 	void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
360 					    u32 *tx_frames, u32 *rx_frames);
361 	int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
362 	int (*set_coalesce_frames)(struct hnae3_handle *handle,
363 				   u32 coalesce_frames);
364 	void (*get_coalesce_range)(struct hnae3_handle *handle,
365 				   u32 *tx_frames_low, u32 *rx_frames_low,
366 				   u32 *tx_frames_high, u32 *rx_frames_high,
367 				   u32 *tx_usecs_low, u32 *rx_usecs_low,
368 				   u32 *tx_usecs_high, u32 *rx_usecs_high);
369 
370 	void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
371 	int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
372 			    bool is_first);
373 	int (*do_ioctl)(struct hnae3_handle *handle,
374 			struct ifreq *ifr, int cmd);
375 	int (*add_uc_addr)(struct hnae3_handle *handle,
376 			   const unsigned char *addr);
377 	int (*rm_uc_addr)(struct hnae3_handle *handle,
378 			  const unsigned char *addr);
379 	int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
380 	int (*add_mc_addr)(struct hnae3_handle *handle,
381 			   const unsigned char *addr);
382 	int (*rm_mc_addr)(struct hnae3_handle *handle,
383 			  const unsigned char *addr);
384 	void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
385 	void (*update_stats)(struct hnae3_handle *handle,
386 			     struct net_device_stats *net_stats);
387 	void (*get_stats)(struct hnae3_handle *handle, u64 *data);
388 
389 	void (*get_strings)(struct hnae3_handle *handle,
390 			    u32 stringset, u8 *data);
391 	int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
392 
393 	void (*get_regs)(struct hnae3_handle *handle, u32 *version,
394 			 void *data);
395 	int (*get_regs_len)(struct hnae3_handle *handle);
396 
397 	u32 (*get_rss_key_size)(struct hnae3_handle *handle);
398 	u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
399 	int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
400 		       u8 *hfunc);
401 	int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
402 		       const u8 *key, const u8 hfunc);
403 	int (*set_rss_tuple)(struct hnae3_handle *handle,
404 			     struct ethtool_rxnfc *cmd);
405 	int (*get_rss_tuple)(struct hnae3_handle *handle,
406 			     struct ethtool_rxnfc *cmd);
407 
408 	int (*get_tc_size)(struct hnae3_handle *handle);
409 
410 	int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
411 			  struct hnae3_vector_info *vector_info);
412 	int (*put_vector)(struct hnae3_handle *handle, int vector_num);
413 	int (*map_ring_to_vector)(struct hnae3_handle *handle,
414 				  int vector_num,
415 				  struct hnae3_ring_chain_node *vr_chain);
416 	int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
417 				      int vector_num,
418 				      struct hnae3_ring_chain_node *vr_chain);
419 
420 	int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
421 	u32 (*get_fw_version)(struct hnae3_handle *handle);
422 	void (*get_mdix_mode)(struct hnae3_handle *handle,
423 			      u8 *tp_mdix_ctrl, u8 *tp_mdix);
424 
425 	void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
426 	int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
427 			       u16 vlan_id, bool is_kill);
428 	int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
429 				  u16 vlan, u8 qos, __be16 proto);
430 	int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
431 	void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
432 	void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
433 					  enum hnae3_reset_type rst_type);
434 	void (*get_channels)(struct hnae3_handle *handle,
435 			     struct ethtool_channels *ch);
436 	void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
437 				      u16 *alloc_tqps, u16 *max_rss_size);
438 	int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
439 			    bool rxfh_configured);
440 	void (*get_flowctrl_adv)(struct hnae3_handle *handle,
441 				 u32 *flowctrl_adv);
442 	int (*set_led_id)(struct hnae3_handle *handle,
443 			  enum ethtool_phys_id_state status);
444 	void (*get_link_mode)(struct hnae3_handle *handle,
445 			      unsigned long *supported,
446 			      unsigned long *advertising);
447 	int (*add_fd_entry)(struct hnae3_handle *handle,
448 			    struct ethtool_rxnfc *cmd);
449 	int (*del_fd_entry)(struct hnae3_handle *handle,
450 			    struct ethtool_rxnfc *cmd);
451 	void (*del_all_fd_entries)(struct hnae3_handle *handle,
452 				   bool clear_list);
453 	int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
454 			       struct ethtool_rxnfc *cmd);
455 	int (*get_fd_rule_info)(struct hnae3_handle *handle,
456 				struct ethtool_rxnfc *cmd);
457 	int (*get_fd_all_rules)(struct hnae3_handle *handle,
458 				struct ethtool_rxnfc *cmd, u32 *rule_locs);
459 	int (*restore_fd_rules)(struct hnae3_handle *handle);
460 	void (*enable_fd)(struct hnae3_handle *handle, bool enable);
461 	int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf);
462 	pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
463 	bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
464 	bool (*ae_dev_resetting)(struct hnae3_handle *handle);
465 	unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
466 	int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
467 	u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
468 	void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
469 	int (*mac_connect_phy)(struct hnae3_handle *handle);
470 	void (*mac_disconnect_phy)(struct hnae3_handle *handle);
471 };
472 
473 struct hnae3_dcb_ops {
474 	/* IEEE 802.1Qaz std */
475 	int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
476 	int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
477 	int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
478 	int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
479 
480 	/* DCBX configuration */
481 	u8   (*getdcbx)(struct hnae3_handle *);
482 	u8   (*setdcbx)(struct hnae3_handle *, u8);
483 
484 	int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
485 };
486 
487 struct hnae3_ae_algo {
488 	const struct hnae3_ae_ops *ops;
489 	struct list_head node;
490 	const struct pci_device_id *pdev_id_table;
491 };
492 
493 #define HNAE3_INT_NAME_LEN        (IFNAMSIZ + 16)
494 #define HNAE3_ITR_COUNTDOWN_START 100
495 
496 struct hnae3_tc_info {
497 	u16	tqp_offset;	/* TQP offset from base TQP */
498 	u16	tqp_count;	/* Total TQPs */
499 	u8	tc;		/* TC index */
500 	bool	enable;		/* If this TC is enable or not */
501 };
502 
503 #define HNAE3_MAX_TC		8
504 #define HNAE3_MAX_USER_PRIO	8
505 struct hnae3_knic_private_info {
506 	struct net_device *netdev; /* Set by KNIC client when init instance */
507 	u16 rss_size;		   /* Allocated RSS queues */
508 	u16 req_rss_size;
509 	u16 rx_buf_len;
510 	u16 num_tx_desc;
511 	u16 num_rx_desc;
512 
513 	u8 num_tc;		   /* Total number of enabled TCs */
514 	u8 prio_tc[HNAE3_MAX_USER_PRIO];  /* TC indexed by prio */
515 	struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
516 
517 	u16 num_tqps;		  /* total number of TQPs in this handle */
518 	struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
519 	const struct hnae3_dcb_ops *dcb_ops;
520 
521 	u16 int_rl_setting;
522 	enum pkt_hash_types rss_type;
523 };
524 
525 struct hnae3_roce_private_info {
526 	struct net_device *netdev;
527 	void __iomem *roce_io_base;
528 	int base_vector;
529 	int num_vectors;
530 
531 	/* The below attributes defined for RoCE client, hnae3 gives
532 	 * initial values to them, and RoCE client can modify and use
533 	 * them.
534 	 */
535 	unsigned long reset_state;
536 	unsigned long instance_state;
537 	unsigned long state;
538 };
539 
540 struct hnae3_unic_private_info {
541 	struct net_device *netdev;
542 	u16 rx_buf_len;
543 	u16 num_tx_desc;
544 	u16 num_rx_desc;
545 
546 	u16 num_tqps;	/* total number of tqps in this handle */
547 	struct hnae3_queue **tqp;  /* array base of all TQPs of this instance */
548 };
549 
550 #define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
551 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
552 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK	BIT(2)
553 #define HNAE3_SUPPORT_VF	      BIT(3)
554 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK	BIT(4)
555 
556 #define HNAE3_USER_UPE		BIT(0)	/* unicast promisc enabled by user */
557 #define HNAE3_USER_MPE		BIT(1)	/* mulitcast promisc enabled by user */
558 #define HNAE3_BPE		BIT(2)	/* broadcast promisc enable */
559 #define HNAE3_OVERFLOW_UPE	BIT(3)	/* unicast mac vlan overflow */
560 #define HNAE3_OVERFLOW_MPE	BIT(4)	/* multicast mac vlan overflow */
561 #define HNAE3_VLAN_FLTR		BIT(5)	/* enable vlan filter */
562 #define HNAE3_UPE		(HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
563 #define HNAE3_MPE		(HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
564 
565 struct hnae3_handle {
566 	struct hnae3_client *client;
567 	struct pci_dev *pdev;
568 	void *priv;
569 	struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
570 	u64 flags; /* Indicate the capabilities for this handle*/
571 
572 	union {
573 		struct net_device *netdev; /* first member */
574 		struct hnae3_knic_private_info kinfo;
575 		struct hnae3_unic_private_info uinfo;
576 		struct hnae3_roce_private_info rinfo;
577 	};
578 
579 	u32 numa_node_mask;	/* for multi-chip support */
580 
581 	u8 netdev_flags;
582 	struct dentry *hnae3_dbgfs;
583 };
584 
585 #define hnae3_set_field(origin, mask, shift, val) \
586 	do { \
587 		(origin) &= (~(mask)); \
588 		(origin) |= ((val) << (shift)) & (mask); \
589 	} while (0)
590 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
591 
592 #define hnae3_set_bit(origin, shift, val) \
593 	hnae3_set_field((origin), (0x1 << (shift)), (shift), (val))
594 #define hnae3_get_bit(origin, shift) \
595 	hnae3_get_field((origin), (0x1 << (shift)), (shift))
596 
597 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
598 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
599 
600 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
601 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
602 
603 void hnae3_unregister_client(struct hnae3_client *client);
604 int hnae3_register_client(struct hnae3_client *client);
605 
606 void hnae3_set_client_init_flag(struct hnae3_client *client,
607 				struct hnae3_ae_dev *ae_dev, int inited);
608 #endif
609