1 /* 2 * Copyright (c) 2014-2015 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #include <linux/of_mdio.h> 11 #include "hns_dsaf_main.h" 12 #include "hns_dsaf_mac.h" 13 #include "hns_dsaf_xgmac.h" 14 #include "hns_dsaf_reg.h" 15 16 static const struct mac_stats_string g_xgmac_stats_string[] = { 17 {"xgmac_tx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(tx_fragment_err)}, 18 {"xgmac_tx_good_pkts_minto64", MAC_STATS_FIELD_OFF(tx_undersize)}, 19 {"xgmac_tx_total_pkts_minto64", MAC_STATS_FIELD_OFF(tx_under_min_pkts)}, 20 {"xgmac_tx_pkts_64", MAC_STATS_FIELD_OFF(tx_64bytes)}, 21 {"xgmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)}, 22 {"xgmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)}, 23 {"xgmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)}, 24 {"xgmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)}, 25 {"xgmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)}, 26 {"xgmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)}, 27 {"xgmac_tx_good_pkts_1519tomax", 28 MAC_STATS_FIELD_OFF(tx_1519tomax_good)}, 29 {"xgmac_tx_good_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_oversize)}, 30 {"xgmac_tx_bad_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_jabber_err)}, 31 {"xgmac_tx_good_pkts_all", MAC_STATS_FIELD_OFF(tx_good_pkts)}, 32 {"xgmac_tx_good_byte_all", MAC_STATS_FIELD_OFF(tx_good_bytes)}, 33 {"xgmac_tx_total_pkt", MAC_STATS_FIELD_OFF(tx_total_pkts)}, 34 {"xgmac_tx_total_byt", MAC_STATS_FIELD_OFF(tx_total_bytes)}, 35 {"xgmac_tx_uc_pkt", MAC_STATS_FIELD_OFF(tx_uc_pkts)}, 36 {"xgmac_tx_mc_pkt", MAC_STATS_FIELD_OFF(tx_mc_pkts)}, 37 {"xgmac_tx_bc_pkt", MAC_STATS_FIELD_OFF(tx_bc_pkts)}, 38 {"xgmac_tx_pause_frame_num", MAC_STATS_FIELD_OFF(tx_pfc_tc0)}, 39 {"xgmac_tx_pfc_per_1pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc1)}, 40 {"xgmac_tx_pfc_per_2pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc2)}, 41 {"xgmac_tx_pfc_per_3pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc3)}, 42 {"xgmac_tx_pfc_per_4pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc4)}, 43 {"xgmac_tx_pfc_per_5pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc5)}, 44 {"xgmac_tx_pfc_per_6pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc6)}, 45 {"xgmac_tx_pfc_per_7pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc7)}, 46 {"xgmac_tx_mac_ctrol_frame", MAC_STATS_FIELD_OFF(tx_ctrl)}, 47 {"xgmac_tx_1731_pkts", MAC_STATS_FIELD_OFF(tx_1731_pkts)}, 48 {"xgmac_tx_1588_pkts", MAC_STATS_FIELD_OFF(tx_1588_pkts)}, 49 {"xgmac_rx_good_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_good_from_sw)}, 50 {"xgmac_rx_bad_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_bad_from_sw)}, 51 {"xgmac_tx_bad_pkt_64tomax", MAC_STATS_FIELD_OFF(tx_bad_pkts)}, 52 53 {"xgmac_rx_not_well_pkt", MAC_STATS_FIELD_OFF(rx_fragment_err)}, 54 {"xgmac_rx_good_well_pkt", MAC_STATS_FIELD_OFF(rx_undersize)}, 55 {"xgmac_rx_total_pkt", MAC_STATS_FIELD_OFF(rx_under_min)}, 56 {"xgmac_rx_pkt_64", MAC_STATS_FIELD_OFF(rx_64bytes)}, 57 {"xgmac_rx_pkt_65to127", MAC_STATS_FIELD_OFF(rx_65to127)}, 58 {"xgmac_rx_pkt_128to255", MAC_STATS_FIELD_OFF(rx_128to255)}, 59 {"xgmac_rx_pkt_256to511", MAC_STATS_FIELD_OFF(rx_256to511)}, 60 {"xgmac_rx_pkt_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)}, 61 {"xgmac_rx_pkt_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)}, 62 {"xgmac_rx_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)}, 63 {"xgmac_rx_good_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax_good)}, 64 {"xgmac_rx_good_pkt_untramax", MAC_STATS_FIELD_OFF(rx_oversize)}, 65 {"xgmac_rx_bad_pkt_untramax", MAC_STATS_FIELD_OFF(rx_jabber_err)}, 66 {"xgmac_rx_good_pkt", MAC_STATS_FIELD_OFF(rx_good_pkts)}, 67 {"xgmac_rx_good_byt", MAC_STATS_FIELD_OFF(rx_good_bytes)}, 68 {"xgmac_rx_pkt", MAC_STATS_FIELD_OFF(rx_total_pkts)}, 69 {"xgmac_rx_byt", MAC_STATS_FIELD_OFF(rx_total_bytes)}, 70 {"xgmac_rx_uc_pkt", MAC_STATS_FIELD_OFF(rx_uc_pkts)}, 71 {"xgmac_rx_mc_pkt", MAC_STATS_FIELD_OFF(rx_mc_pkts)}, 72 {"xgmac_rx_bc_pkt", MAC_STATS_FIELD_OFF(rx_bc_pkts)}, 73 {"xgmac_rx_pause_frame_num", MAC_STATS_FIELD_OFF(rx_pfc_tc0)}, 74 {"xgmac_rx_pfc_per_1pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc1)}, 75 {"xgmac_rx_pfc_per_2pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc2)}, 76 {"xgmac_rx_pfc_per_3pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc3)}, 77 {"xgmac_rx_pfc_per_4pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc4)}, 78 {"xgmac_rx_pfc_per_5pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc5)}, 79 {"xgmac_rx_pfc_per_6pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc6)}, 80 {"xgmac_rx_pfc_per_7pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc7)}, 81 {"xgmac_rx_mac_control", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)}, 82 {"xgmac_tx_good_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_good_to_sw)}, 83 {"xgmac_tx_bad_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_bad_to_sw)}, 84 {"xgmac_rx_1731_pkt", MAC_STATS_FIELD_OFF(rx_1731_pkts)}, 85 {"xgmac_rx_symbol_err_pkt", MAC_STATS_FIELD_OFF(rx_symbol_err)}, 86 {"xgmac_rx_fcs_pkt", MAC_STATS_FIELD_OFF(rx_fcs_err)} 87 }; 88 89 /** 90 *hns_xgmac_tx_enable - xgmac port tx enable 91 *@drv: mac driver 92 *@value: value of enable 93 */ 94 static void hns_xgmac_tx_enable(struct mac_driver *drv, u32 value) 95 { 96 dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_TX_B, !!value); 97 } 98 99 /** 100 *hns_xgmac_rx_enable - xgmac port rx enable 101 *@drv: mac driver 102 *@value: value of enable 103 */ 104 static void hns_xgmac_rx_enable(struct mac_driver *drv, u32 value) 105 { 106 dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_RX_B, !!value); 107 } 108 109 /** 110 *hns_xgmac_enable - enable xgmac port 111 *@drv: mac driver 112 *@mode: mode of mac port 113 */ 114 static void hns_xgmac_enable(void *mac_drv, enum mac_commom_mode mode) 115 { 116 struct mac_driver *drv = (struct mac_driver *)mac_drv; 117 struct dsaf_device *dsaf_dev 118 = (struct dsaf_device *)dev_get_drvdata(drv->dev); 119 u32 port = drv->mac_id; 120 121 hns_dsaf_xge_core_srst_by_port(dsaf_dev, port, 1); 122 mdelay(10); 123 124 /*enable XGE rX/tX */ 125 if (mode == MAC_COMM_MODE_TX) { 126 hns_xgmac_tx_enable(drv, 1); 127 } else if (mode == MAC_COMM_MODE_RX) { 128 hns_xgmac_rx_enable(drv, 1); 129 } else if (mode == MAC_COMM_MODE_RX_AND_TX) { 130 hns_xgmac_tx_enable(drv, 1); 131 hns_xgmac_rx_enable(drv, 1); 132 } else { 133 dev_err(drv->dev, "error mac mode:%d\n", mode); 134 } 135 } 136 137 /** 138 *hns_xgmac_disable - disable xgmac port 139 *@mac_drv: mac driver 140 *@mode: mode of mac port 141 */ 142 static void hns_xgmac_disable(void *mac_drv, enum mac_commom_mode mode) 143 { 144 struct mac_driver *drv = (struct mac_driver *)mac_drv; 145 struct dsaf_device *dsaf_dev 146 = (struct dsaf_device *)dev_get_drvdata(drv->dev); 147 u32 port = drv->mac_id; 148 149 if (mode == MAC_COMM_MODE_TX) { 150 hns_xgmac_tx_enable(drv, 0); 151 } else if (mode == MAC_COMM_MODE_RX) { 152 hns_xgmac_rx_enable(drv, 0); 153 } else if (mode == MAC_COMM_MODE_RX_AND_TX) { 154 hns_xgmac_tx_enable(drv, 0); 155 hns_xgmac_rx_enable(drv, 0); 156 } 157 158 mdelay(10); 159 hns_dsaf_xge_core_srst_by_port(dsaf_dev, port, 0); 160 } 161 162 /** 163 *hns_xgmac_pma_fec_enable - xgmac PMA FEC enable 164 *@drv: mac driver 165 *@tx_value: tx value 166 *@rx_value: rx value 167 *return status 168 */ 169 static void hns_xgmac_pma_fec_enable(struct mac_driver *drv, u32 tx_value, 170 u32 rx_value) 171 { 172 u32 origin = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG); 173 174 dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_TX_B, !!tx_value); 175 dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_RX_B, !!rx_value); 176 dsaf_write_dev(drv, XGMAC_PMA_FEC_CONTROL_REG, origin); 177 } 178 179 /* clr exc irq for xge*/ 180 static void hns_xgmac_exc_irq_en(struct mac_driver *drv, u32 en) 181 { 182 u32 clr_vlue = 0xfffffffful; 183 u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/ 184 185 dsaf_write_dev(drv, XGMAC_INT_STATUS_REG, clr_vlue); 186 dsaf_write_dev(drv, XGMAC_INT_ENABLE_REG, msk_vlue); 187 } 188 189 /** 190 *hns_xgmac_init - initialize XGE 191 *@mac_drv: mac driver 192 */ 193 static void hns_xgmac_init(void *mac_drv) 194 { 195 struct mac_driver *drv = (struct mac_driver *)mac_drv; 196 struct dsaf_device *dsaf_dev 197 = (struct dsaf_device *)dev_get_drvdata(drv->dev); 198 u32 port = drv->mac_id; 199 200 hns_dsaf_xge_srst_by_port(dsaf_dev, port, 0); 201 mdelay(100); 202 hns_dsaf_xge_srst_by_port(dsaf_dev, port, 1); 203 204 mdelay(100); 205 hns_xgmac_exc_irq_en(drv, 0); 206 207 hns_xgmac_pma_fec_enable(drv, 0x0, 0x0); 208 209 hns_xgmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX); 210 } 211 212 /** 213 *hns_xgmac_config_pad_and_crc - set xgmac pad and crc enable the same time 214 *@mac_drv: mac driver 215 *@newval:enable of pad and crc 216 */ 217 static void hns_xgmac_config_pad_and_crc(void *mac_drv, u8 newval) 218 { 219 struct mac_driver *drv = (struct mac_driver *)mac_drv; 220 u32 origin = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG); 221 222 dsaf_set_bit(origin, XGMAC_CTL_TX_PAD_B, !!newval); 223 dsaf_set_bit(origin, XGMAC_CTL_TX_FCS_B, !!newval); 224 dsaf_set_bit(origin, XGMAC_CTL_RX_FCS_B, !!newval); 225 dsaf_write_dev(drv, XGMAC_MAC_CONTROL_REG, origin); 226 } 227 228 /** 229 *hns_xgmac_pausefrm_cfg - set pause param about xgmac 230 *@mac_drv: mac driver 231 *@newval:enable of pad and crc 232 */ 233 static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en) 234 { 235 struct mac_driver *drv = (struct mac_driver *)mac_drv; 236 u32 origin = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); 237 238 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en); 239 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_RX_B, !!rx_en); 240 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG, origin); 241 } 242 243 static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv, char *mac_addr) 244 { 245 struct mac_driver *drv = (struct mac_driver *)mac_drv; 246 247 u32 high_val = mac_addr[1] | (mac_addr[0] << 8); 248 u32 low_val = mac_addr[5] | (mac_addr[4] << 8) 249 | (mac_addr[3] << 16) | (mac_addr[2] << 24); 250 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG, low_val); 251 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG, high_val); 252 } 253 254 /** 255 *hns_xgmac_set_rx_ignore_pause_frames - set rx pause param about xgmac 256 *@mac_drv: mac driver 257 *@enable:enable rx pause param 258 */ 259 static void hns_xgmac_set_rx_ignore_pause_frames(void *mac_drv, u32 enable) 260 { 261 struct mac_driver *drv = (struct mac_driver *)mac_drv; 262 263 dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG, 264 XGMAC_PAUSE_CTL_RX_B, !!enable); 265 } 266 267 /** 268 *hns_xgmac_set_tx_auto_pause_frames - set tx pause param about xgmac 269 *@mac_drv: mac driver 270 *@enable:enable tx pause param 271 */ 272 static void hns_xgmac_set_tx_auto_pause_frames(void *mac_drv, u16 enable) 273 { 274 struct mac_driver *drv = (struct mac_driver *)mac_drv; 275 276 dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG, 277 XGMAC_PAUSE_CTL_TX_B, !!enable); 278 279 /*if enable is not zero ,set tx pause time */ 280 if (enable) 281 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_TIME_REG, enable); 282 } 283 284 /** 285 *hns_xgmac_get_id - get xgmac port id 286 *@mac_drv: mac driver 287 *@newval:xgmac max frame length 288 */ 289 static void hns_xgmac_get_id(void *mac_drv, u8 *mac_id) 290 { 291 struct mac_driver *drv = (struct mac_driver *)mac_drv; 292 293 *mac_id = drv->mac_id; 294 } 295 296 /** 297 *hns_xgmac_config_max_frame_length - set xgmac max frame length 298 *@mac_drv: mac driver 299 *@newval:xgmac max frame length 300 */ 301 static void hns_xgmac_config_max_frame_length(void *mac_drv, u16 newval) 302 { 303 struct mac_driver *drv = (struct mac_driver *)mac_drv; 304 305 dsaf_write_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG, newval); 306 } 307 308 void hns_xgmac_update_stats(void *mac_drv) 309 { 310 struct mac_driver *drv = (struct mac_driver *)mac_drv; 311 struct mac_hw_stats *hw_stats = &drv->mac_cb->hw_stats; 312 313 /* TX */ 314 hw_stats->tx_fragment_err 315 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT); 316 hw_stats->tx_undersize 317 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE); 318 hw_stats->tx_under_min_pkts 319 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN); 320 hw_stats->tx_64bytes = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS); 321 hw_stats->tx_65to127 322 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS); 323 hw_stats->tx_128to255 324 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS); 325 hw_stats->tx_256to511 326 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS); 327 hw_stats->tx_512to1023 328 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS); 329 hw_stats->tx_1024to1518 330 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS); 331 hw_stats->tx_1519tomax 332 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS); 333 hw_stats->tx_1519tomax_good 334 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK); 335 hw_stats->tx_oversize = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE); 336 hw_stats->tx_jabber_err = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER); 337 hw_stats->tx_good_pkts = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS); 338 hw_stats->tx_good_bytes = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS); 339 hw_stats->tx_total_pkts = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS); 340 hw_stats->tx_total_bytes 341 = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS); 342 hw_stats->tx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS); 343 hw_stats->tx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS); 344 hw_stats->tx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS); 345 hw_stats->tx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS); 346 hw_stats->tx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS); 347 hw_stats->tx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS); 348 hw_stats->tx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS); 349 hw_stats->tx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS); 350 hw_stats->tx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS); 351 hw_stats->tx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS); 352 hw_stats->tx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS); 353 hw_stats->tx_ctrl = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS); 354 hw_stats->tx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS); 355 hw_stats->tx_1588_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS); 356 hw_stats->rx_good_from_sw 357 = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS); 358 hw_stats->rx_bad_from_sw 359 = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS); 360 hw_stats->tx_bad_pkts = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS); 361 362 /* RX */ 363 hw_stats->rx_fragment_err 364 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT); 365 hw_stats->rx_undersize 366 = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE); 367 hw_stats->rx_under_min 368 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN); 369 hw_stats->rx_64bytes = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS); 370 hw_stats->rx_65to127 371 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS); 372 hw_stats->rx_128to255 373 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS); 374 hw_stats->rx_256to511 375 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS); 376 hw_stats->rx_512to1023 377 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS); 378 hw_stats->rx_1024to1518 379 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS); 380 hw_stats->rx_1519tomax 381 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS); 382 hw_stats->rx_1519tomax_good 383 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK); 384 hw_stats->rx_oversize = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE); 385 hw_stats->rx_jabber_err = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER); 386 hw_stats->rx_good_pkts = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS); 387 hw_stats->rx_good_bytes = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS); 388 hw_stats->rx_total_pkts = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS); 389 hw_stats->rx_total_bytes 390 = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS); 391 hw_stats->rx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS); 392 hw_stats->rx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS); 393 hw_stats->rx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS); 394 hw_stats->rx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS); 395 hw_stats->rx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS); 396 hw_stats->rx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS); 397 hw_stats->rx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS); 398 hw_stats->rx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS); 399 hw_stats->rx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS); 400 hw_stats->rx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS); 401 hw_stats->rx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS); 402 403 hw_stats->rx_unknown_ctrl 404 = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS); 405 hw_stats->tx_good_to_sw 406 = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS); 407 hw_stats->tx_bad_to_sw 408 = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS); 409 hw_stats->rx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS); 410 hw_stats->rx_symbol_err 411 = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS); 412 hw_stats->rx_fcs_err = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS); 413 } 414 415 /** 416 *hns_xgmac_free - free xgmac driver 417 *@mac_drv: mac driver 418 */ 419 static void hns_xgmac_free(void *mac_drv) 420 { 421 struct mac_driver *drv = (struct mac_driver *)mac_drv; 422 struct dsaf_device *dsaf_dev 423 = (struct dsaf_device *)dev_get_drvdata(drv->dev); 424 425 u32 mac_id = drv->mac_id; 426 427 hns_dsaf_xge_srst_by_port(dsaf_dev, mac_id, 0); 428 } 429 430 /** 431 *hns_xgmac_get_info - get xgmac information 432 *@mac_drv: mac driver 433 *@mac_info:mac information 434 */ 435 static void hns_xgmac_get_info(void *mac_drv, struct mac_info *mac_info) 436 { 437 struct mac_driver *drv = (struct mac_driver *)mac_drv; 438 u32 pause_time, pause_ctrl, port_mode, ctrl_val; 439 440 ctrl_val = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG); 441 mac_info->pad_and_crc_en = dsaf_get_bit(ctrl_val, XGMAC_CTL_TX_PAD_B); 442 mac_info->auto_neg = 0; 443 444 pause_time = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG); 445 mac_info->tx_pause_time = pause_time; 446 447 port_mode = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG); 448 mac_info->port_en = dsaf_get_field(port_mode, XGMAC_PORT_MODE_TX_M, 449 XGMAC_PORT_MODE_TX_S) && 450 dsaf_get_field(port_mode, XGMAC_PORT_MODE_RX_M, 451 XGMAC_PORT_MODE_RX_S); 452 mac_info->duplex = 1; 453 mac_info->speed = MAC_SPEED_10000; 454 455 pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); 456 mac_info->rx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B); 457 mac_info->tx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B); 458 } 459 460 /** 461 *hns_xgmac_get_pausefrm_cfg - get xgmac pause param 462 *@mac_drv: mac driver 463 *@rx_en:xgmac rx pause enable 464 *@tx_en:xgmac tx pause enable 465 */ 466 static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en) 467 { 468 struct mac_driver *drv = (struct mac_driver *)mac_drv; 469 u32 pause_ctrl; 470 471 pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); 472 *rx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B); 473 *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B); 474 } 475 476 /** 477 *hns_xgmac_get_link_status - get xgmac link status 478 *@mac_drv: mac driver 479 *@link_stat: xgmac link stat 480 */ 481 static void hns_xgmac_get_link_status(void *mac_drv, u32 *link_stat) 482 { 483 struct mac_driver *drv = (struct mac_driver *)mac_drv; 484 485 *link_stat = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG); 486 } 487 488 /** 489 *hns_xgmac_get_regs - dump xgmac regs 490 *@mac_drv: mac driver 491 *@cmd:ethtool cmd 492 *@data:data for value of regs 493 */ 494 static void hns_xgmac_get_regs(void *mac_drv, void *data) 495 { 496 u32 i = 0; 497 struct mac_driver *drv = (struct mac_driver *)mac_drv; 498 u32 *regs = data; 499 u64 qtmp; 500 501 /* base config registers */ 502 regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG); 503 regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG); 504 regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG); 505 regs[3] = dsaf_read_dev(drv, XGMAC_IERR_U_INFO_REG); 506 regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG); 507 regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG); 508 regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG); 509 regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG); 510 regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG); 511 regs[9] = dsaf_read_dev(drv, XGMAC_LINK_CONTROL_REG); 512 regs[10] = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG); 513 514 regs[11] = dsaf_read_dev(drv, XGMAC_SPARE_REG); 515 regs[12] = dsaf_read_dev(drv, XGMAC_SPARE_CNT_REG); 516 regs[13] = dsaf_read_dev(drv, XGMAC_MAC_ENABLE_REG); 517 regs[14] = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG); 518 regs[15] = dsaf_read_dev(drv, XGMAC_MAC_IPG_REG); 519 regs[16] = dsaf_read_dev(drv, XGMAC_MAC_MSG_CRC_EN_REG); 520 regs[17] = dsaf_read_dev(drv, XGMAC_MAC_MSG_IMG_REG); 521 regs[18] = dsaf_read_dev(drv, XGMAC_MAC_MSG_FC_CFG_REG); 522 regs[19] = dsaf_read_dev(drv, XGMAC_MAC_MSG_TC_CFG_REG); 523 regs[20] = dsaf_read_dev(drv, XGMAC_MAC_PAD_SIZE_REG); 524 regs[21] = dsaf_read_dev(drv, XGMAC_MAC_MIN_PKT_SIZE_REG); 525 regs[22] = dsaf_read_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG); 526 regs[23] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); 527 regs[24] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG); 528 regs[25] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_GAP_REG); 529 regs[26] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG); 530 regs[27] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG); 531 regs[28] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_H_REG); 532 regs[29] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_L_REG); 533 regs[30] = dsaf_read_dev(drv, XGMAC_MAC_PFC_PRI_EN_REG); 534 regs[31] = dsaf_read_dev(drv, XGMAC_MAC_1588_CTRL_REG); 535 regs[32] = dsaf_read_dev(drv, XGMAC_MAC_1588_TX_PORT_DLY_REG); 536 regs[33] = dsaf_read_dev(drv, XGMAC_MAC_1588_RX_PORT_DLY_REG); 537 regs[34] = dsaf_read_dev(drv, XGMAC_MAC_1588_ASYM_DLY_REG); 538 regs[35] = dsaf_read_dev(drv, XGMAC_MAC_1588_ADJUST_CFG_REG); 539 540 regs[36] = dsaf_read_dev(drv, XGMAC_MAC_Y1731_ETH_TYPE_REG); 541 regs[37] = dsaf_read_dev(drv, XGMAC_MAC_MIB_CONTROL_REG); 542 regs[38] = dsaf_read_dev(drv, XGMAC_MAC_WAN_RATE_ADJUST_REG); 543 regs[39] = dsaf_read_dev(drv, XGMAC_MAC_TX_ERR_MARK_REG); 544 regs[40] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG); 545 regs[41] = dsaf_read_dev(drv, XGMAC_MAC_RX_LF_RF_STATUS_REG); 546 regs[42] = dsaf_read_dev(drv, XGMAC_MAC_TX_RUNT_PKT_CNT_REG); 547 regs[43] = dsaf_read_dev(drv, XGMAC_MAC_RX_RUNT_PKT_CNT_REG); 548 regs[44] = dsaf_read_dev(drv, XGMAC_MAC_RX_PREAM_ERR_PKT_CNT_REG); 549 regs[45] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_TERM_PKT_CNT_REG); 550 regs[46] = dsaf_read_dev(drv, XGMAC_MAC_TX_SN_MISMATCH_PKT_CNT_REG); 551 regs[47] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_MSG_CNT_REG); 552 regs[48] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_EFD_CNT_REG); 553 regs[49] = dsaf_read_dev(drv, XGMAC_MAC_ERR_INFO_REG); 554 regs[50] = dsaf_read_dev(drv, XGMAC_MAC_DBG_INFO_REG); 555 556 regs[51] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SYNC_THD_REG); 557 regs[52] = dsaf_read_dev(drv, XGMAC_PCS_STATUS1_REG); 558 regs[53] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS1_REG); 559 regs[54] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS2_REG); 560 regs[55] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_0_REG); 561 regs[56] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_1_REG); 562 regs[57] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_0_REG); 563 regs[58] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_1_REG); 564 regs[59] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_CONTROL_REG); 565 regs[60] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_ERR_CNT_REG); 566 regs[61] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO_REG); 567 regs[62] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO1_REG); 568 regs[63] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO2_REG); 569 regs[64] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO3_REG); 570 571 regs[65] = dsaf_read_dev(drv, XGMAC_PMA_ENABLE_REG); 572 regs[66] = dsaf_read_dev(drv, XGMAC_PMA_CONTROL_REG); 573 regs[67] = dsaf_read_dev(drv, XGMAC_PMA_SIGNAL_STATUS_REG); 574 regs[68] = dsaf_read_dev(drv, XGMAC_PMA_DBG_INFO_REG); 575 regs[69] = dsaf_read_dev(drv, XGMAC_PMA_FEC_ABILITY_REG); 576 regs[70] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG); 577 regs[71] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CORR_BLOCK_CNT__REG); 578 regs[72] = dsaf_read_dev(drv, XGMAC_PMA_FEC_UNCORR_BLOCK_CNT__REG); 579 580 /* status registers */ 581 #define hns_xgmac_cpy_q(p, q) \ 582 do {\ 583 *(p) = (u32)(q);\ 584 *((p) + 1) = (u32)((q) >> 32);\ 585 } while (0) 586 587 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT); 588 hns_xgmac_cpy_q(®s[73], qtmp); 589 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE); 590 hns_xgmac_cpy_q(®s[75], qtmp); 591 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN); 592 hns_xgmac_cpy_q(®s[77], qtmp); 593 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS); 594 hns_xgmac_cpy_q(®s[79], qtmp); 595 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS); 596 hns_xgmac_cpy_q(®s[81], qtmp); 597 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS); 598 hns_xgmac_cpy_q(®s[83], qtmp); 599 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS); 600 hns_xgmac_cpy_q(®s[85], qtmp); 601 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS); 602 hns_xgmac_cpy_q(®s[87], qtmp); 603 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS); 604 hns_xgmac_cpy_q(®s[89], qtmp); 605 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS); 606 hns_xgmac_cpy_q(®s[91], qtmp); 607 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK); 608 hns_xgmac_cpy_q(®s[93], qtmp); 609 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE); 610 hns_xgmac_cpy_q(®s[95], qtmp); 611 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER); 612 hns_xgmac_cpy_q(®s[97], qtmp); 613 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS); 614 hns_xgmac_cpy_q(®s[99], qtmp); 615 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS); 616 hns_xgmac_cpy_q(®s[101], qtmp); 617 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS); 618 hns_xgmac_cpy_q(®s[103], qtmp); 619 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS); 620 hns_xgmac_cpy_q(®s[105], qtmp); 621 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS); 622 hns_xgmac_cpy_q(®s[107], qtmp); 623 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS); 624 hns_xgmac_cpy_q(®s[109], qtmp); 625 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS); 626 hns_xgmac_cpy_q(®s[111], qtmp); 627 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS); 628 hns_xgmac_cpy_q(®s[113], qtmp); 629 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS); 630 hns_xgmac_cpy_q(®s[115], qtmp); 631 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS); 632 hns_xgmac_cpy_q(®s[117], qtmp); 633 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS); 634 hns_xgmac_cpy_q(®s[119], qtmp); 635 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS); 636 hns_xgmac_cpy_q(®s[121], qtmp); 637 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS); 638 hns_xgmac_cpy_q(®s[123], qtmp); 639 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS); 640 hns_xgmac_cpy_q(®s[125], qtmp); 641 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS); 642 hns_xgmac_cpy_q(®s[127], qtmp); 643 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS); 644 hns_xgmac_cpy_q(®s[129], qtmp); 645 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS); 646 hns_xgmac_cpy_q(®s[131], qtmp); 647 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS); 648 hns_xgmac_cpy_q(®s[133], qtmp); 649 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS); 650 hns_xgmac_cpy_q(®s[135], qtmp); 651 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS); 652 hns_xgmac_cpy_q(®s[137], qtmp); 653 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS); 654 hns_xgmac_cpy_q(®s[139], qtmp); 655 656 /* RX */ 657 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT); 658 hns_xgmac_cpy_q(®s[141], qtmp); 659 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE); 660 hns_xgmac_cpy_q(®s[143], qtmp); 661 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN); 662 hns_xgmac_cpy_q(®s[145], qtmp); 663 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS); 664 hns_xgmac_cpy_q(®s[147], qtmp); 665 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS); 666 hns_xgmac_cpy_q(®s[149], qtmp); 667 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS); 668 hns_xgmac_cpy_q(®s[151], qtmp); 669 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS); 670 hns_xgmac_cpy_q(®s[153], qtmp); 671 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS); 672 hns_xgmac_cpy_q(®s[155], qtmp); 673 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS); 674 hns_xgmac_cpy_q(®s[157], qtmp); 675 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS); 676 hns_xgmac_cpy_q(®s[159], qtmp); 677 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK); 678 hns_xgmac_cpy_q(®s[161], qtmp); 679 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE); 680 hns_xgmac_cpy_q(®s[163], qtmp); 681 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER); 682 hns_xgmac_cpy_q(®s[165], qtmp); 683 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS); 684 hns_xgmac_cpy_q(®s[167], qtmp); 685 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS); 686 hns_xgmac_cpy_q(®s[169], qtmp); 687 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS); 688 hns_xgmac_cpy_q(®s[171], qtmp); 689 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS); 690 hns_xgmac_cpy_q(®s[173], qtmp); 691 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS); 692 hns_xgmac_cpy_q(®s[175], qtmp); 693 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS); 694 hns_xgmac_cpy_q(®s[177], qtmp); 695 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS); 696 hns_xgmac_cpy_q(®s[179], qtmp); 697 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS); 698 hns_xgmac_cpy_q(®s[181], qtmp); 699 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS); 700 hns_xgmac_cpy_q(®s[183], qtmp); 701 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS); 702 hns_xgmac_cpy_q(®s[185], qtmp); 703 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS); 704 hns_xgmac_cpy_q(®s[187], qtmp); 705 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS); 706 hns_xgmac_cpy_q(®s[189], qtmp); 707 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS); 708 hns_xgmac_cpy_q(®s[191], qtmp); 709 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS); 710 hns_xgmac_cpy_q(®s[193], qtmp); 711 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS); 712 hns_xgmac_cpy_q(®s[195], qtmp); 713 714 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS); 715 hns_xgmac_cpy_q(®s[197], qtmp); 716 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS); 717 hns_xgmac_cpy_q(®s[199], qtmp); 718 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS); 719 hns_xgmac_cpy_q(®s[201], qtmp); 720 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS); 721 hns_xgmac_cpy_q(®s[203], qtmp); 722 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS); 723 hns_xgmac_cpy_q(®s[205], qtmp); 724 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS); 725 hns_xgmac_cpy_q(®s[207], qtmp); 726 727 /* mark end of mac regs */ 728 for (i = 208; i < 214; i++) 729 regs[i] = 0xaaaaaaaa; 730 } 731 732 /** 733 *hns_xgmac_get_stats - get xgmac statistic 734 *@mac_drv: mac driver 735 *@data:data for value of stats regs 736 */ 737 static void hns_xgmac_get_stats(void *mac_drv, u64 *data) 738 { 739 u32 i; 740 u64 *buf = data; 741 struct mac_driver *drv = (struct mac_driver *)mac_drv; 742 struct mac_hw_stats *hw_stats = NULL; 743 744 hw_stats = &drv->mac_cb->hw_stats; 745 746 for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) { 747 buf[i] = DSAF_STATS_READ(hw_stats, 748 g_xgmac_stats_string[i].offset); 749 } 750 } 751 752 /** 753 *hns_xgmac_get_strings - get xgmac strings name 754 *@stringset: type of values in data 755 *@data:data for value of string name 756 */ 757 static void hns_xgmac_get_strings(u32 stringset, u8 *data) 758 { 759 char *buff = (char *)data; 760 u32 i; 761 762 if (stringset != ETH_SS_STATS) 763 return; 764 765 for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) { 766 snprintf(buff, ETH_GSTRING_LEN, g_xgmac_stats_string[i].desc); 767 buff = buff + ETH_GSTRING_LEN; 768 } 769 } 770 771 /** 772 *hns_xgmac_get_sset_count - get xgmac string set count 773 *@stringset: type of values in data 774 *return xgmac string set count 775 */ 776 static int hns_xgmac_get_sset_count(int stringset) 777 { 778 if (stringset == ETH_SS_STATS) 779 return ARRAY_SIZE(g_xgmac_stats_string); 780 781 return 0; 782 } 783 784 /** 785 *hns_xgmac_get_regs_count - get xgmac regs count 786 *return xgmac regs count 787 */ 788 static int hns_xgmac_get_regs_count(void) 789 { 790 return ETH_XGMAC_DUMP_NUM; 791 } 792 793 void *hns_xgmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param) 794 { 795 struct mac_driver *mac_drv; 796 797 mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL); 798 if (!mac_drv) 799 return NULL; 800 801 mac_drv->mac_init = hns_xgmac_init; 802 mac_drv->mac_enable = hns_xgmac_enable; 803 mac_drv->mac_disable = hns_xgmac_disable; 804 805 mac_drv->mac_id = mac_param->mac_id; 806 mac_drv->mac_mode = mac_param->mac_mode; 807 mac_drv->io_base = mac_param->vaddr; 808 mac_drv->dev = mac_param->dev; 809 mac_drv->mac_cb = mac_cb; 810 811 mac_drv->set_mac_addr = hns_xgmac_set_pausefrm_mac_addr; 812 mac_drv->set_an_mode = NULL; 813 mac_drv->config_loopback = NULL; 814 mac_drv->config_pad_and_crc = hns_xgmac_config_pad_and_crc; 815 mac_drv->config_half_duplex = NULL; 816 mac_drv->set_rx_ignore_pause_frames = 817 hns_xgmac_set_rx_ignore_pause_frames; 818 mac_drv->mac_get_id = hns_xgmac_get_id; 819 mac_drv->mac_free = hns_xgmac_free; 820 mac_drv->adjust_link = NULL; 821 mac_drv->set_tx_auto_pause_frames = hns_xgmac_set_tx_auto_pause_frames; 822 mac_drv->config_max_frame_length = hns_xgmac_config_max_frame_length; 823 mac_drv->mac_pausefrm_cfg = hns_xgmac_pausefrm_cfg; 824 mac_drv->autoneg_stat = NULL; 825 mac_drv->get_info = hns_xgmac_get_info; 826 mac_drv->get_pause_enable = hns_xgmac_get_pausefrm_cfg; 827 mac_drv->get_link_status = hns_xgmac_get_link_status; 828 mac_drv->get_regs = hns_xgmac_get_regs; 829 mac_drv->get_ethtool_stats = hns_xgmac_get_stats; 830 mac_drv->get_sset_count = hns_xgmac_get_sset_count; 831 mac_drv->get_regs_count = hns_xgmac_get_regs_count; 832 mac_drv->get_strings = hns_xgmac_get_strings; 833 mac_drv->update_stats = hns_xgmac_update_stats; 834 835 return (void *)mac_drv; 836 } 837