1511e6bc0Shuangdaode /* 2511e6bc0Shuangdaode * Copyright (c) 2014-2015 Hisilicon Limited. 3511e6bc0Shuangdaode * 4511e6bc0Shuangdaode * This program is free software; you can redistribute it and/or modify 5511e6bc0Shuangdaode * it under the terms of the GNU General Public License as published by 6511e6bc0Shuangdaode * the Free Software Foundation; either version 2 of the License, or 7511e6bc0Shuangdaode * (at your option) any later version. 8511e6bc0Shuangdaode */ 9511e6bc0Shuangdaode 10511e6bc0Shuangdaode #include <linux/module.h> 11511e6bc0Shuangdaode #include <linux/kernel.h> 12511e6bc0Shuangdaode #include <linux/init.h> 13511e6bc0Shuangdaode #include <linux/netdevice.h> 14511e6bc0Shuangdaode #include <linux/etherdevice.h> 15511e6bc0Shuangdaode #include <linux/platform_device.h> 16511e6bc0Shuangdaode #include <linux/of.h> 17511e6bc0Shuangdaode #include <linux/of_address.h> 18511e6bc0Shuangdaode #include <linux/of_platform.h> 19511e6bc0Shuangdaode 20511e6bc0Shuangdaode #include "hns_dsaf_ppe.h" 21511e6bc0Shuangdaode 2264353af6SSalil void hns_ppe_set_tso_enable(struct hns_ppe_cb *ppe_cb, u32 value) 2364353af6SSalil { 2464353af6SSalil dsaf_set_dev_bit(ppe_cb, PPEV2_CFG_TSO_EN_REG, 0, !!value); 2564353af6SSalil } 2664353af6SSalil 276bc0ce7dSSalil void hns_ppe_set_rss_key(struct hns_ppe_cb *ppe_cb, 286bc0ce7dSSalil const u32 rss_key[HNS_PPEV2_RSS_KEY_NUM]) 296bc0ce7dSSalil { 30beecfe9eSKejian Yan u32 key_item; 316bc0ce7dSSalil 326bc0ce7dSSalil for (key_item = 0; key_item < HNS_PPEV2_RSS_KEY_NUM; key_item++) 336bc0ce7dSSalil dsaf_write_dev(ppe_cb, PPEV2_RSS_KEY_REG + key_item * 0x4, 346bc0ce7dSSalil rss_key[key_item]); 356bc0ce7dSSalil } 366bc0ce7dSSalil 376bc0ce7dSSalil void hns_ppe_set_indir_table(struct hns_ppe_cb *ppe_cb, 386bc0ce7dSSalil const u32 rss_tab[HNS_PPEV2_RSS_IND_TBL_SIZE]) 396bc0ce7dSSalil { 406bc0ce7dSSalil int i; 416bc0ce7dSSalil int reg_value; 426bc0ce7dSSalil 436bc0ce7dSSalil for (i = 0; i < (HNS_PPEV2_RSS_IND_TBL_SIZE / 4); i++) { 446bc0ce7dSSalil reg_value = dsaf_read_dev(ppe_cb, 456bc0ce7dSSalil PPEV2_INDRECTION_TBL_REG + i * 0x4); 466bc0ce7dSSalil 476bc0ce7dSSalil dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N0_M, 486bc0ce7dSSalil PPEV2_CFG_RSS_TBL_4N0_S, 496bc0ce7dSSalil rss_tab[i * 4 + 0] & 0x1F); 506bc0ce7dSSalil dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N1_M, 516bc0ce7dSSalil PPEV2_CFG_RSS_TBL_4N1_S, 526bc0ce7dSSalil rss_tab[i * 4 + 1] & 0x1F); 536bc0ce7dSSalil dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N2_M, 546bc0ce7dSSalil PPEV2_CFG_RSS_TBL_4N2_S, 556bc0ce7dSSalil rss_tab[i * 4 + 2] & 0x1F); 566bc0ce7dSSalil dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N3_M, 576bc0ce7dSSalil PPEV2_CFG_RSS_TBL_4N3_S, 586bc0ce7dSSalil rss_tab[i * 4 + 3] & 0x1F); 596bc0ce7dSSalil dsaf_write_dev( 606bc0ce7dSSalil ppe_cb, PPEV2_INDRECTION_TBL_REG + i * 0x4, reg_value); 616bc0ce7dSSalil } 626bc0ce7dSSalil } 636bc0ce7dSSalil 64511e6bc0Shuangdaode static void __iomem *hns_ppe_common_get_ioaddr( 65511e6bc0Shuangdaode struct ppe_common_cb *ppe_common) 66511e6bc0Shuangdaode { 67511e6bc0Shuangdaode void __iomem *base_addr; 68511e6bc0Shuangdaode 69511e6bc0Shuangdaode int idx = ppe_common->comm_index; 70511e6bc0Shuangdaode 7189a44093SYisen.Zhuang\(Zhuangyuzeng\) if (!HNS_DSAF_IS_DEBUG(ppe_common->dsaf_dev)) 72511e6bc0Shuangdaode base_addr = ppe_common->dsaf_dev->ppe_base 73511e6bc0Shuangdaode + PPE_COMMON_REG_OFFSET; 74511e6bc0Shuangdaode else 75511e6bc0Shuangdaode base_addr = ppe_common->dsaf_dev->sds_base 76511e6bc0Shuangdaode + (idx - 1) * HNS_DSAF_DEBUG_NW_REG_OFFSET 77511e6bc0Shuangdaode + PPE_COMMON_REG_OFFSET; 78511e6bc0Shuangdaode 79511e6bc0Shuangdaode return base_addr; 80511e6bc0Shuangdaode } 81511e6bc0Shuangdaode 82511e6bc0Shuangdaode /** 83511e6bc0Shuangdaode * hns_ppe_common_get_cfg - get ppe common config 84511e6bc0Shuangdaode * @dsaf_dev: dasf device 85511e6bc0Shuangdaode * comm_index: common index 86511e6bc0Shuangdaode * retuen 0 - success , negative --fail 87511e6bc0Shuangdaode */ 88511e6bc0Shuangdaode int hns_ppe_common_get_cfg(struct dsaf_device *dsaf_dev, int comm_index) 89511e6bc0Shuangdaode { 90511e6bc0Shuangdaode struct ppe_common_cb *ppe_common; 91511e6bc0Shuangdaode int ppe_num; 92511e6bc0Shuangdaode 9389a44093SYisen.Zhuang\(Zhuangyuzeng\) if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) 94511e6bc0Shuangdaode ppe_num = HNS_PPE_SERVICE_NW_ENGINE_NUM; 95511e6bc0Shuangdaode else 96511e6bc0Shuangdaode ppe_num = HNS_PPE_DEBUG_NW_ENGINE_NUM; 97511e6bc0Shuangdaode 98511e6bc0Shuangdaode ppe_common = devm_kzalloc(dsaf_dev->dev, sizeof(*ppe_common) + 99511e6bc0Shuangdaode ppe_num * sizeof(struct hns_ppe_cb), GFP_KERNEL); 100511e6bc0Shuangdaode if (!ppe_common) 101511e6bc0Shuangdaode return -ENOMEM; 102511e6bc0Shuangdaode 103511e6bc0Shuangdaode ppe_common->ppe_num = ppe_num; 104511e6bc0Shuangdaode ppe_common->dsaf_dev = dsaf_dev; 105511e6bc0Shuangdaode ppe_common->comm_index = comm_index; 10689a44093SYisen.Zhuang\(Zhuangyuzeng\) if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) 107511e6bc0Shuangdaode ppe_common->ppe_mode = PPE_COMMON_MODE_SERVICE; 108511e6bc0Shuangdaode else 109511e6bc0Shuangdaode ppe_common->ppe_mode = PPE_COMMON_MODE_DEBUG; 110511e6bc0Shuangdaode ppe_common->dev = dsaf_dev->dev; 111511e6bc0Shuangdaode 112511e6bc0Shuangdaode ppe_common->io_base = hns_ppe_common_get_ioaddr(ppe_common); 113511e6bc0Shuangdaode 114511e6bc0Shuangdaode dsaf_dev->ppe_common[comm_index] = ppe_common; 115511e6bc0Shuangdaode 116511e6bc0Shuangdaode return 0; 117511e6bc0Shuangdaode } 118511e6bc0Shuangdaode 119511e6bc0Shuangdaode void hns_ppe_common_free_cfg(struct dsaf_device *dsaf_dev, u32 comm_index) 120511e6bc0Shuangdaode { 121511e6bc0Shuangdaode dsaf_dev->ppe_common[comm_index] = NULL; 122511e6bc0Shuangdaode } 123511e6bc0Shuangdaode 124511e6bc0Shuangdaode static void __iomem *hns_ppe_get_iobase(struct ppe_common_cb *ppe_common, 125511e6bc0Shuangdaode int ppe_idx) 126511e6bc0Shuangdaode { 127511e6bc0Shuangdaode void __iomem *base_addr; 128511e6bc0Shuangdaode int common_idx = ppe_common->comm_index; 129511e6bc0Shuangdaode 130511e6bc0Shuangdaode if (ppe_common->ppe_mode == PPE_COMMON_MODE_SERVICE) { 131511e6bc0Shuangdaode base_addr = ppe_common->dsaf_dev->ppe_base + 132511e6bc0Shuangdaode ppe_idx * PPE_REG_OFFSET; 133511e6bc0Shuangdaode 134511e6bc0Shuangdaode } else { 135511e6bc0Shuangdaode base_addr = ppe_common->dsaf_dev->sds_base + 136511e6bc0Shuangdaode (common_idx - 1) * HNS_DSAF_DEBUG_NW_REG_OFFSET; 137511e6bc0Shuangdaode } 138511e6bc0Shuangdaode 139511e6bc0Shuangdaode return base_addr; 140511e6bc0Shuangdaode } 141511e6bc0Shuangdaode 142511e6bc0Shuangdaode static int hns_ppe_get_port(struct ppe_common_cb *ppe_common, int idx) 143511e6bc0Shuangdaode { 144511e6bc0Shuangdaode int port; 145511e6bc0Shuangdaode 146511e6bc0Shuangdaode if (ppe_common->ppe_mode == PPE_COMMON_MODE_SERVICE) 147511e6bc0Shuangdaode port = idx; 148511e6bc0Shuangdaode else 149511e6bc0Shuangdaode port = HNS_PPE_SERVICE_NW_ENGINE_NUM 150511e6bc0Shuangdaode + ppe_common->comm_index - 1; 151511e6bc0Shuangdaode 152511e6bc0Shuangdaode return port; 153511e6bc0Shuangdaode } 154511e6bc0Shuangdaode 155511e6bc0Shuangdaode static void hns_ppe_get_cfg(struct ppe_common_cb *ppe_common) 156511e6bc0Shuangdaode { 157511e6bc0Shuangdaode u32 i; 158511e6bc0Shuangdaode struct hns_ppe_cb *ppe_cb; 159511e6bc0Shuangdaode u32 ppe_num = ppe_common->ppe_num; 160511e6bc0Shuangdaode 161511e6bc0Shuangdaode for (i = 0; i < ppe_num; i++) { 162511e6bc0Shuangdaode ppe_cb = &ppe_common->ppe_cb[i]; 163511e6bc0Shuangdaode ppe_cb->dev = ppe_common->dev; 164511e6bc0Shuangdaode ppe_cb->next = NULL; 165511e6bc0Shuangdaode ppe_cb->ppe_common_cb = ppe_common; 166511e6bc0Shuangdaode ppe_cb->index = i; 167511e6bc0Shuangdaode ppe_cb->port = hns_ppe_get_port(ppe_common, i); 168511e6bc0Shuangdaode ppe_cb->io_base = hns_ppe_get_iobase(ppe_common, i); 169511e6bc0Shuangdaode ppe_cb->virq = 0; 170511e6bc0Shuangdaode } 171511e6bc0Shuangdaode } 172511e6bc0Shuangdaode 173511e6bc0Shuangdaode static void hns_ppe_cnt_clr_ce(struct hns_ppe_cb *ppe_cb) 174511e6bc0Shuangdaode { 175511e6bc0Shuangdaode dsaf_set_dev_bit(ppe_cb, PPE_TNL_0_5_CNT_CLR_CE_REG, 176511e6bc0Shuangdaode PPE_CNT_CLR_CE_B, 1); 177511e6bc0Shuangdaode } 178511e6bc0Shuangdaode 1798044f97eSSalil static void hns_ppe_set_vlan_strip(struct hns_ppe_cb *ppe_cb, int en) 1808044f97eSSalil { 1818044f97eSSalil dsaf_write_dev(ppe_cb, PPEV2_VLAN_STRIP_EN_REG, en); 1828044f97eSSalil } 1838044f97eSSalil 184511e6bc0Shuangdaode /** 185511e6bc0Shuangdaode * hns_ppe_checksum_hw - set ppe checksum caculate 186511e6bc0Shuangdaode * @ppe_device: ppe device 187511e6bc0Shuangdaode * @value: value 188511e6bc0Shuangdaode */ 189511e6bc0Shuangdaode static void hns_ppe_checksum_hw(struct hns_ppe_cb *ppe_cb, u32 value) 190511e6bc0Shuangdaode { 191511e6bc0Shuangdaode dsaf_set_dev_field(ppe_cb, PPE_CFG_PRO_CHECK_EN_REG, 192511e6bc0Shuangdaode 0xfffffff, 0, value); 193511e6bc0Shuangdaode } 194511e6bc0Shuangdaode 195511e6bc0Shuangdaode static void hns_ppe_set_qid_mode(struct ppe_common_cb *ppe_common, 196511e6bc0Shuangdaode enum ppe_qid_mode qid_mdoe) 197511e6bc0Shuangdaode { 198511e6bc0Shuangdaode dsaf_set_dev_field(ppe_common, PPE_COM_CFG_QID_MODE_REG, 199511e6bc0Shuangdaode PPE_CFG_QID_MODE_CF_QID_MODE_M, 200511e6bc0Shuangdaode PPE_CFG_QID_MODE_CF_QID_MODE_S, qid_mdoe); 201511e6bc0Shuangdaode } 202511e6bc0Shuangdaode 203511e6bc0Shuangdaode /** 204511e6bc0Shuangdaode * hns_ppe_set_qid - set ppe qid 205511e6bc0Shuangdaode * @ppe_common: ppe common device 206511e6bc0Shuangdaode * @qid: queue id 207511e6bc0Shuangdaode */ 208511e6bc0Shuangdaode static void hns_ppe_set_qid(struct ppe_common_cb *ppe_common, u32 qid) 209511e6bc0Shuangdaode { 210511e6bc0Shuangdaode u32 qid_mod = dsaf_read_dev(ppe_common, PPE_COM_CFG_QID_MODE_REG); 211511e6bc0Shuangdaode 212511e6bc0Shuangdaode if (!dsaf_get_field(qid_mod, PPE_CFG_QID_MODE_DEF_QID_M, 213511e6bc0Shuangdaode PPE_CFG_QID_MODE_DEF_QID_S)) { 214511e6bc0Shuangdaode dsaf_set_field(qid_mod, PPE_CFG_QID_MODE_DEF_QID_M, 215511e6bc0Shuangdaode PPE_CFG_QID_MODE_DEF_QID_S, qid); 216511e6bc0Shuangdaode dsaf_write_dev(ppe_common, PPE_COM_CFG_QID_MODE_REG, qid_mod); 217511e6bc0Shuangdaode } 218511e6bc0Shuangdaode } 219511e6bc0Shuangdaode 220511e6bc0Shuangdaode /** 221511e6bc0Shuangdaode * hns_ppe_set_port_mode - set port mode 222511e6bc0Shuangdaode * @ppe_device: ppe device 223511e6bc0Shuangdaode * @mode: port mode 224511e6bc0Shuangdaode */ 225511e6bc0Shuangdaode static void hns_ppe_set_port_mode(struct hns_ppe_cb *ppe_cb, 226511e6bc0Shuangdaode enum ppe_port_mode mode) 227511e6bc0Shuangdaode { 228511e6bc0Shuangdaode dsaf_write_dev(ppe_cb, PPE_CFG_XGE_MODE_REG, mode); 229511e6bc0Shuangdaode } 230511e6bc0Shuangdaode 231511e6bc0Shuangdaode /** 232511e6bc0Shuangdaode * hns_ppe_common_init_hw - init ppe common device 233511e6bc0Shuangdaode * @ppe_common: ppe common device 234511e6bc0Shuangdaode * 235511e6bc0Shuangdaode * Return 0 on success, negative on failure 236511e6bc0Shuangdaode */ 237511e6bc0Shuangdaode static int hns_ppe_common_init_hw(struct ppe_common_cb *ppe_common) 238511e6bc0Shuangdaode { 239511e6bc0Shuangdaode enum ppe_qid_mode qid_mode; 240511e6bc0Shuangdaode enum dsaf_mode dsaf_mode = ppe_common->dsaf_dev->dsaf_mode; 241511e6bc0Shuangdaode 242511e6bc0Shuangdaode hns_ppe_com_srst(ppe_common, 0); 243511e6bc0Shuangdaode mdelay(100); 244511e6bc0Shuangdaode hns_ppe_com_srst(ppe_common, 1); 245511e6bc0Shuangdaode mdelay(100); 246511e6bc0Shuangdaode 247511e6bc0Shuangdaode if (ppe_common->ppe_mode == PPE_COMMON_MODE_SERVICE) { 248511e6bc0Shuangdaode switch (dsaf_mode) { 249511e6bc0Shuangdaode case DSAF_MODE_ENABLE_FIX: 250511e6bc0Shuangdaode case DSAF_MODE_DISABLE_FIX: 251511e6bc0Shuangdaode qid_mode = PPE_QID_MODE0; 252511e6bc0Shuangdaode hns_ppe_set_qid(ppe_common, 0); 253511e6bc0Shuangdaode break; 254511e6bc0Shuangdaode case DSAF_MODE_ENABLE_0VM: 255511e6bc0Shuangdaode case DSAF_MODE_DISABLE_2PORT_64VM: 256511e6bc0Shuangdaode qid_mode = PPE_QID_MODE3; 257511e6bc0Shuangdaode break; 258511e6bc0Shuangdaode case DSAF_MODE_ENABLE_8VM: 259511e6bc0Shuangdaode case DSAF_MODE_DISABLE_2PORT_16VM: 260511e6bc0Shuangdaode qid_mode = PPE_QID_MODE4; 261511e6bc0Shuangdaode break; 262511e6bc0Shuangdaode case DSAF_MODE_ENABLE_16VM: 263511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_0VM: 264511e6bc0Shuangdaode qid_mode = PPE_QID_MODE5; 265511e6bc0Shuangdaode break; 266511e6bc0Shuangdaode case DSAF_MODE_ENABLE_32VM: 267511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_16VM: 268511e6bc0Shuangdaode qid_mode = PPE_QID_MODE2; 269511e6bc0Shuangdaode break; 270511e6bc0Shuangdaode case DSAF_MODE_ENABLE_128VM: 271511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_4VM: 272511e6bc0Shuangdaode qid_mode = PPE_QID_MODE1; 273511e6bc0Shuangdaode break; 274511e6bc0Shuangdaode case DSAF_MODE_DISABLE_2PORT_8VM: 275511e6bc0Shuangdaode qid_mode = PPE_QID_MODE7; 276511e6bc0Shuangdaode break; 277511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_2VM: 278511e6bc0Shuangdaode qid_mode = PPE_QID_MODE6; 279511e6bc0Shuangdaode break; 280511e6bc0Shuangdaode default: 281511e6bc0Shuangdaode dev_err(ppe_common->dev, 282511e6bc0Shuangdaode "get ppe queue mode failed! dsaf_mode=%d\n", 283511e6bc0Shuangdaode dsaf_mode); 284511e6bc0Shuangdaode return -EINVAL; 285511e6bc0Shuangdaode } 286511e6bc0Shuangdaode hns_ppe_set_qid_mode(ppe_common, qid_mode); 287511e6bc0Shuangdaode } 288511e6bc0Shuangdaode 289511e6bc0Shuangdaode dsaf_set_dev_bit(ppe_common, PPE_COM_COMMON_CNT_CLR_CE_REG, 290511e6bc0Shuangdaode PPE_COMMON_CNT_CLR_CE_B, 1); 291511e6bc0Shuangdaode 292511e6bc0Shuangdaode return 0; 293511e6bc0Shuangdaode } 294511e6bc0Shuangdaode 295511e6bc0Shuangdaode /*clr ppe exception irq*/ 296511e6bc0Shuangdaode static void hns_ppe_exc_irq_en(struct hns_ppe_cb *ppe_cb, int en) 297511e6bc0Shuangdaode { 298511e6bc0Shuangdaode u32 clr_vlue = 0xfffffffful; 299511e6bc0Shuangdaode u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/ 300511e6bc0Shuangdaode u32 vld_msk = 0; 301511e6bc0Shuangdaode 302511e6bc0Shuangdaode /*only care bit 0,1,7*/ 303511e6bc0Shuangdaode dsaf_set_bit(vld_msk, 0, 1); 304511e6bc0Shuangdaode dsaf_set_bit(vld_msk, 1, 1); 305511e6bc0Shuangdaode dsaf_set_bit(vld_msk, 7, 1); 306511e6bc0Shuangdaode 307511e6bc0Shuangdaode /*clr sts**/ 308511e6bc0Shuangdaode dsaf_write_dev(ppe_cb, PPE_RINT_REG, clr_vlue); 309511e6bc0Shuangdaode 310511e6bc0Shuangdaode /*for some reserved bits, so set 0**/ 311511e6bc0Shuangdaode dsaf_write_dev(ppe_cb, PPE_INTEN_REG, msk_vlue & vld_msk); 312511e6bc0Shuangdaode } 313511e6bc0Shuangdaode 314511e6bc0Shuangdaode /** 315511e6bc0Shuangdaode * ppe_init_hw - init ppe 3166bc0ce7dSSalil * @ppe_cb: ppe device 317511e6bc0Shuangdaode */ 318511e6bc0Shuangdaode static void hns_ppe_init_hw(struct hns_ppe_cb *ppe_cb) 319511e6bc0Shuangdaode { 320511e6bc0Shuangdaode struct ppe_common_cb *ppe_common_cb = ppe_cb->ppe_common_cb; 321511e6bc0Shuangdaode u32 port = ppe_cb->port; 322511e6bc0Shuangdaode struct dsaf_device *dsaf_dev = ppe_common_cb->dsaf_dev; 3236bc0ce7dSSalil int i; 3246bc0ce7dSSalil 3256bc0ce7dSSalil /* get default RSS key */ 3266bc0ce7dSSalil netdev_rss_key_fill(ppe_cb->rss_key, HNS_PPEV2_RSS_KEY_SIZE); 327511e6bc0Shuangdaode 328511e6bc0Shuangdaode hns_ppe_srst_by_port(dsaf_dev, port, 0); 329511e6bc0Shuangdaode mdelay(10); 330511e6bc0Shuangdaode hns_ppe_srst_by_port(dsaf_dev, port, 1); 331511e6bc0Shuangdaode 332511e6bc0Shuangdaode /* clr and msk except irq*/ 333511e6bc0Shuangdaode hns_ppe_exc_irq_en(ppe_cb, 0); 334511e6bc0Shuangdaode 3355ada37b5SLisheng if (ppe_common_cb->ppe_mode == PPE_COMMON_MODE_DEBUG) { 336511e6bc0Shuangdaode hns_ppe_set_port_mode(ppe_cb, PPE_MODE_GE); 3375ada37b5SLisheng dsaf_write_dev(ppe_cb, PPE_CFG_PAUSE_IDLE_CNT_REG, 0); 3385ada37b5SLisheng } else { 339511e6bc0Shuangdaode hns_ppe_set_port_mode(ppe_cb, PPE_MODE_XGE); 3405ada37b5SLisheng } 3416bc0ce7dSSalil 342511e6bc0Shuangdaode hns_ppe_checksum_hw(ppe_cb, 0xffffffff); 343511e6bc0Shuangdaode hns_ppe_cnt_clr_ce(ppe_cb); 3446bc0ce7dSSalil 3456bc0ce7dSSalil if (!AE_IS_VER1(dsaf_dev->dsaf_ver)) { 3468044f97eSSalil hns_ppe_set_vlan_strip(ppe_cb, 0); 3478044f97eSSalil 348da3488bbSKejian Yan dsaf_write_dev(ppe_cb, PPE_CFG_MAX_FRAME_LEN_REG, 349da3488bbSKejian Yan HNS_PPEV2_MAX_FRAME_LEN); 350da3488bbSKejian Yan 3516bc0ce7dSSalil /* set default RSS key in h/w */ 3526bc0ce7dSSalil hns_ppe_set_rss_key(ppe_cb, ppe_cb->rss_key); 3536bc0ce7dSSalil 3546bc0ce7dSSalil /* Set default indrection table in h/w */ 3556bc0ce7dSSalil for (i = 0; i < HNS_PPEV2_RSS_IND_TBL_SIZE; i++) 3566bc0ce7dSSalil ppe_cb->rss_indir_table[i] = i; 3576bc0ce7dSSalil hns_ppe_set_indir_table(ppe_cb, ppe_cb->rss_indir_table); 3586bc0ce7dSSalil } 359511e6bc0Shuangdaode } 360511e6bc0Shuangdaode 361511e6bc0Shuangdaode /** 362511e6bc0Shuangdaode * ppe_uninit_hw - uninit ppe 363511e6bc0Shuangdaode * @ppe_device: ppe device 364511e6bc0Shuangdaode */ 365511e6bc0Shuangdaode static void hns_ppe_uninit_hw(struct hns_ppe_cb *ppe_cb) 366511e6bc0Shuangdaode { 367511e6bc0Shuangdaode u32 port; 368511e6bc0Shuangdaode 369511e6bc0Shuangdaode if (ppe_cb->ppe_common_cb) { 370511e6bc0Shuangdaode port = ppe_cb->index; 371511e6bc0Shuangdaode hns_ppe_srst_by_port(ppe_cb->ppe_common_cb->dsaf_dev, port, 0); 372511e6bc0Shuangdaode } 373511e6bc0Shuangdaode } 374511e6bc0Shuangdaode 375511e6bc0Shuangdaode void hns_ppe_uninit_ex(struct ppe_common_cb *ppe_common) 376511e6bc0Shuangdaode { 377511e6bc0Shuangdaode u32 i; 378511e6bc0Shuangdaode 379511e6bc0Shuangdaode for (i = 0; i < ppe_common->ppe_num; i++) { 380511e6bc0Shuangdaode hns_ppe_uninit_hw(&ppe_common->ppe_cb[i]); 381511e6bc0Shuangdaode memset(&ppe_common->ppe_cb[i], 0, sizeof(struct hns_ppe_cb)); 382511e6bc0Shuangdaode } 383511e6bc0Shuangdaode } 384511e6bc0Shuangdaode 385511e6bc0Shuangdaode void hns_ppe_uninit(struct dsaf_device *dsaf_dev) 386511e6bc0Shuangdaode { 387511e6bc0Shuangdaode u32 i; 388511e6bc0Shuangdaode 389511e6bc0Shuangdaode for (i = 0; i < HNS_PPE_COM_NUM; i++) { 390511e6bc0Shuangdaode if (dsaf_dev->ppe_common[i]) 391511e6bc0Shuangdaode hns_ppe_uninit_ex(dsaf_dev->ppe_common[i]); 392511e6bc0Shuangdaode hns_rcb_common_free_cfg(dsaf_dev, i); 393511e6bc0Shuangdaode hns_ppe_common_free_cfg(dsaf_dev, i); 394511e6bc0Shuangdaode } 395511e6bc0Shuangdaode } 396511e6bc0Shuangdaode 397511e6bc0Shuangdaode /** 398511e6bc0Shuangdaode * hns_ppe_reset - reinit ppe/rcb hw 399511e6bc0Shuangdaode * @dsaf_dev: dasf device 400511e6bc0Shuangdaode * retuen void 401511e6bc0Shuangdaode */ 402511e6bc0Shuangdaode void hns_ppe_reset_common(struct dsaf_device *dsaf_dev, u8 ppe_common_index) 403511e6bc0Shuangdaode { 404511e6bc0Shuangdaode u32 i; 405511e6bc0Shuangdaode int ret; 406511e6bc0Shuangdaode struct ppe_common_cb *ppe_common; 407511e6bc0Shuangdaode 408511e6bc0Shuangdaode ppe_common = dsaf_dev->ppe_common[ppe_common_index]; 409511e6bc0Shuangdaode ret = hns_ppe_common_init_hw(ppe_common); 410511e6bc0Shuangdaode if (ret) 411511e6bc0Shuangdaode return; 412511e6bc0Shuangdaode 41313ac695eSSalil for (i = 0; i < ppe_common->ppe_num; i++) 41413ac695eSSalil hns_ppe_init_hw(&ppe_common->ppe_cb[i]); 41513ac695eSSalil 416511e6bc0Shuangdaode ret = hns_rcb_common_init_hw(dsaf_dev->rcb_common[ppe_common_index]); 417511e6bc0Shuangdaode if (ret) 418511e6bc0Shuangdaode return; 419511e6bc0Shuangdaode 420511e6bc0Shuangdaode hns_rcb_common_init_commit_hw(dsaf_dev->rcb_common[ppe_common_index]); 421511e6bc0Shuangdaode } 422511e6bc0Shuangdaode 423511e6bc0Shuangdaode void hns_ppe_update_stats(struct hns_ppe_cb *ppe_cb) 424511e6bc0Shuangdaode { 425511e6bc0Shuangdaode struct hns_ppe_hw_stats *hw_stats = &ppe_cb->hw_stats; 426511e6bc0Shuangdaode 427511e6bc0Shuangdaode hw_stats->rx_pkts_from_sw 428511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_RX_SW_PKT_CNT_REG); 429511e6bc0Shuangdaode hw_stats->rx_pkts 430511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_RX_WR_BD_OK_PKT_CNT_REG); 431511e6bc0Shuangdaode hw_stats->rx_drop_no_bd 432511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_NO_BUF_CNT_REG); 433511e6bc0Shuangdaode hw_stats->rx_alloc_buf_fail 434511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_RX_APP_BUF_FAIL_CNT_REG); 435511e6bc0Shuangdaode hw_stats->rx_alloc_buf_wait 436511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_RX_APP_BUF_WAIT_CNT_REG); 437511e6bc0Shuangdaode hw_stats->rx_drop_no_buf 438511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_DROP_FUL_CNT_REG); 439511e6bc0Shuangdaode hw_stats->rx_err_fifo_full 440511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_DROP_PRT_CNT_REG); 441511e6bc0Shuangdaode 442511e6bc0Shuangdaode hw_stats->tx_bd_form_rcb 443511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_TX_BD_CNT_REG); 444511e6bc0Shuangdaode hw_stats->tx_pkts_from_rcb 445511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_CNT_REG); 446511e6bc0Shuangdaode hw_stats->tx_pkts 447511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_OK_CNT_REG); 448511e6bc0Shuangdaode hw_stats->tx_err_fifo_empty 449511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_EPT_CNT_REG); 450511e6bc0Shuangdaode hw_stats->tx_err_checksum 451511e6bc0Shuangdaode += dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_CS_FAIL_CNT_REG); 452511e6bc0Shuangdaode } 453511e6bc0Shuangdaode 454511e6bc0Shuangdaode int hns_ppe_get_sset_count(int stringset) 455511e6bc0Shuangdaode { 456511e6bc0Shuangdaode if (stringset == ETH_SS_STATS) 457511e6bc0Shuangdaode return ETH_PPE_STATIC_NUM; 458511e6bc0Shuangdaode return 0; 459511e6bc0Shuangdaode } 460511e6bc0Shuangdaode 461511e6bc0Shuangdaode int hns_ppe_get_regs_count(void) 462511e6bc0Shuangdaode { 463511e6bc0Shuangdaode return ETH_PPE_DUMP_NUM; 464511e6bc0Shuangdaode } 465511e6bc0Shuangdaode 466511e6bc0Shuangdaode /** 467511e6bc0Shuangdaode * ppe_get_strings - get ppe srting 468511e6bc0Shuangdaode * @ppe_device: ppe device 469511e6bc0Shuangdaode * @stringset: string set type 470511e6bc0Shuangdaode * @data: output string 471511e6bc0Shuangdaode */ 472511e6bc0Shuangdaode void hns_ppe_get_strings(struct hns_ppe_cb *ppe_cb, int stringset, u8 *data) 473511e6bc0Shuangdaode { 474511e6bc0Shuangdaode char *buff = (char *)data; 475511e6bc0Shuangdaode int index = ppe_cb->index; 476511e6bc0Shuangdaode 477511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_rx_sw_pkt", index); 478511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 479511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_rx_pkt_ok", index); 480511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 481511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_rx_drop_pkt_no_bd", index); 482511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 483511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_rx_alloc_buf_fail", index); 484511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 485511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_rx_alloc_buf_wait", index); 486511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 487511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_rx_pkt_drop_no_buf", index); 488511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 489511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_rx_pkt_err_fifo_full", index); 490511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 491511e6bc0Shuangdaode 492511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_tx_bd", index); 493511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 494511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_tx_pkt", index); 495511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 496511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_tx_pkt_ok", index); 497511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 498511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_tx_pkt_err_fifo_empty", index); 499511e6bc0Shuangdaode buff = buff + ETH_GSTRING_LEN; 500511e6bc0Shuangdaode snprintf(buff, ETH_GSTRING_LEN, "ppe%d_tx_pkt_err_csum_fail", index); 501511e6bc0Shuangdaode } 502511e6bc0Shuangdaode 503511e6bc0Shuangdaode void hns_ppe_get_stats(struct hns_ppe_cb *ppe_cb, u64 *data) 504511e6bc0Shuangdaode { 505511e6bc0Shuangdaode u64 *regs_buff = data; 506511e6bc0Shuangdaode struct hns_ppe_hw_stats *hw_stats = &ppe_cb->hw_stats; 507511e6bc0Shuangdaode 508511e6bc0Shuangdaode regs_buff[0] = hw_stats->rx_pkts_from_sw; 509511e6bc0Shuangdaode regs_buff[1] = hw_stats->rx_pkts; 510511e6bc0Shuangdaode regs_buff[2] = hw_stats->rx_drop_no_bd; 511511e6bc0Shuangdaode regs_buff[3] = hw_stats->rx_alloc_buf_fail; 512511e6bc0Shuangdaode regs_buff[4] = hw_stats->rx_alloc_buf_wait; 513511e6bc0Shuangdaode regs_buff[5] = hw_stats->rx_drop_no_buf; 514511e6bc0Shuangdaode regs_buff[6] = hw_stats->rx_err_fifo_full; 515511e6bc0Shuangdaode 516511e6bc0Shuangdaode regs_buff[7] = hw_stats->tx_bd_form_rcb; 517511e6bc0Shuangdaode regs_buff[8] = hw_stats->tx_pkts_from_rcb; 518511e6bc0Shuangdaode regs_buff[9] = hw_stats->tx_pkts; 519511e6bc0Shuangdaode regs_buff[10] = hw_stats->tx_err_fifo_empty; 520511e6bc0Shuangdaode regs_buff[11] = hw_stats->tx_err_checksum; 521511e6bc0Shuangdaode } 522511e6bc0Shuangdaode 523511e6bc0Shuangdaode /** 524511e6bc0Shuangdaode * hns_ppe_init - init ppe device 525511e6bc0Shuangdaode * @dsaf_dev: dasf device 526511e6bc0Shuangdaode * retuen 0 - success , negative --fail 527511e6bc0Shuangdaode */ 528511e6bc0Shuangdaode int hns_ppe_init(struct dsaf_device *dsaf_dev) 529511e6bc0Shuangdaode { 530511e6bc0Shuangdaode int i, k; 531511e6bc0Shuangdaode int ret; 532511e6bc0Shuangdaode 533511e6bc0Shuangdaode for (i = 0; i < HNS_PPE_COM_NUM; i++) { 534511e6bc0Shuangdaode ret = hns_ppe_common_get_cfg(dsaf_dev, i); 535511e6bc0Shuangdaode if (ret) 536511e6bc0Shuangdaode goto get_ppe_cfg_fail; 537511e6bc0Shuangdaode 538511e6bc0Shuangdaode ret = hns_rcb_common_get_cfg(dsaf_dev, i); 539511e6bc0Shuangdaode if (ret) 540511e6bc0Shuangdaode goto get_rcb_cfg_fail; 541511e6bc0Shuangdaode 542511e6bc0Shuangdaode hns_ppe_get_cfg(dsaf_dev->ppe_common[i]); 543511e6bc0Shuangdaode 544511e6bc0Shuangdaode hns_rcb_get_cfg(dsaf_dev->rcb_common[i]); 545511e6bc0Shuangdaode } 546511e6bc0Shuangdaode 547511e6bc0Shuangdaode for (i = 0; i < HNS_PPE_COM_NUM; i++) 548511e6bc0Shuangdaode hns_ppe_reset_common(dsaf_dev, i); 549511e6bc0Shuangdaode 550511e6bc0Shuangdaode return 0; 551511e6bc0Shuangdaode 552511e6bc0Shuangdaode get_rcb_cfg_fail: 553511e6bc0Shuangdaode hns_ppe_common_free_cfg(dsaf_dev, i); 554511e6bc0Shuangdaode get_ppe_cfg_fail: 555511e6bc0Shuangdaode for (k = i - 1; k >= 0; k--) { 556511e6bc0Shuangdaode hns_rcb_common_free_cfg(dsaf_dev, k); 557511e6bc0Shuangdaode hns_ppe_common_free_cfg(dsaf_dev, k); 558511e6bc0Shuangdaode } 559511e6bc0Shuangdaode return ret; 560511e6bc0Shuangdaode } 561511e6bc0Shuangdaode 562511e6bc0Shuangdaode void hns_ppe_get_regs(struct hns_ppe_cb *ppe_cb, void *data) 563511e6bc0Shuangdaode { 564511e6bc0Shuangdaode struct ppe_common_cb *ppe_common = ppe_cb->ppe_common_cb; 565511e6bc0Shuangdaode u32 *regs = data; 566511e6bc0Shuangdaode u32 i; 567511e6bc0Shuangdaode u32 offset; 568511e6bc0Shuangdaode 569511e6bc0Shuangdaode /* ppe common registers */ 570511e6bc0Shuangdaode regs[0] = dsaf_read_dev(ppe_common, PPE_COM_CFG_QID_MODE_REG); 571511e6bc0Shuangdaode regs[1] = dsaf_read_dev(ppe_common, PPE_COM_INTEN_REG); 572511e6bc0Shuangdaode regs[2] = dsaf_read_dev(ppe_common, PPE_COM_RINT_REG); 573511e6bc0Shuangdaode regs[3] = dsaf_read_dev(ppe_common, PPE_COM_INTSTS_REG); 574511e6bc0Shuangdaode regs[4] = dsaf_read_dev(ppe_common, PPE_COM_COMMON_CNT_CLR_CE_REG); 575511e6bc0Shuangdaode 576511e6bc0Shuangdaode for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++) { 577511e6bc0Shuangdaode offset = PPE_COM_HIS_RX_PKT_QID_DROP_CNT_REG + 0x4 * i; 578511e6bc0Shuangdaode regs[5 + i] = dsaf_read_dev(ppe_common, offset); 579511e6bc0Shuangdaode offset = PPE_COM_HIS_RX_PKT_QID_OK_CNT_REG + 0x4 * i; 580511e6bc0Shuangdaode regs[5 + i + DSAF_TOTAL_QUEUE_NUM] 581511e6bc0Shuangdaode = dsaf_read_dev(ppe_common, offset); 582511e6bc0Shuangdaode offset = PPE_COM_HIS_TX_PKT_QID_ERR_CNT_REG + 0x4 * i; 583511e6bc0Shuangdaode regs[5 + i + DSAF_TOTAL_QUEUE_NUM * 2] 584511e6bc0Shuangdaode = dsaf_read_dev(ppe_common, offset); 585511e6bc0Shuangdaode offset = PPE_COM_HIS_TX_PKT_QID_OK_CNT_REG + 0x4 * i; 586511e6bc0Shuangdaode regs[5 + i + DSAF_TOTAL_QUEUE_NUM * 3] 587511e6bc0Shuangdaode = dsaf_read_dev(ppe_common, offset); 588511e6bc0Shuangdaode } 589511e6bc0Shuangdaode 590511e6bc0Shuangdaode /* mark end of ppe regs */ 591511e6bc0Shuangdaode for (i = 521; i < 524; i++) 592511e6bc0Shuangdaode regs[i] = 0xeeeeeeee; 593511e6bc0Shuangdaode 594511e6bc0Shuangdaode /* ppe channel registers */ 595511e6bc0Shuangdaode regs[525] = dsaf_read_dev(ppe_cb, PPE_CFG_TX_FIFO_THRSLD_REG); 596511e6bc0Shuangdaode regs[526] = dsaf_read_dev(ppe_cb, PPE_CFG_RX_FIFO_THRSLD_REG); 597511e6bc0Shuangdaode regs[527] = dsaf_read_dev(ppe_cb, PPE_CFG_RX_FIFO_PAUSE_THRSLD_REG); 598511e6bc0Shuangdaode regs[528] = dsaf_read_dev(ppe_cb, PPE_CFG_RX_FIFO_SW_BP_THRSLD_REG); 599511e6bc0Shuangdaode regs[529] = dsaf_read_dev(ppe_cb, PPE_CFG_PAUSE_IDLE_CNT_REG); 600511e6bc0Shuangdaode regs[530] = dsaf_read_dev(ppe_cb, PPE_CFG_BUS_CTRL_REG); 601511e6bc0Shuangdaode regs[531] = dsaf_read_dev(ppe_cb, PPE_CFG_TNL_TO_BE_RST_REG); 602511e6bc0Shuangdaode regs[532] = dsaf_read_dev(ppe_cb, PPE_CURR_TNL_CAN_RST_REG); 603511e6bc0Shuangdaode 604511e6bc0Shuangdaode regs[533] = dsaf_read_dev(ppe_cb, PPE_CFG_XGE_MODE_REG); 605511e6bc0Shuangdaode regs[534] = dsaf_read_dev(ppe_cb, PPE_CFG_MAX_FRAME_LEN_REG); 606511e6bc0Shuangdaode regs[535] = dsaf_read_dev(ppe_cb, PPE_CFG_RX_PKT_MODE_REG); 607511e6bc0Shuangdaode regs[536] = dsaf_read_dev(ppe_cb, PPE_CFG_RX_VLAN_TAG_REG); 608511e6bc0Shuangdaode regs[537] = dsaf_read_dev(ppe_cb, PPE_CFG_TAG_GEN_REG); 609511e6bc0Shuangdaode regs[538] = dsaf_read_dev(ppe_cb, PPE_CFG_PARSE_TAG_REG); 610511e6bc0Shuangdaode regs[539] = dsaf_read_dev(ppe_cb, PPE_CFG_PRO_CHECK_EN_REG); 611511e6bc0Shuangdaode 612511e6bc0Shuangdaode regs[540] = dsaf_read_dev(ppe_cb, PPE_INTEN_REG); 613511e6bc0Shuangdaode regs[541] = dsaf_read_dev(ppe_cb, PPE_RINT_REG); 614511e6bc0Shuangdaode regs[542] = dsaf_read_dev(ppe_cb, PPE_INTSTS_REG); 615511e6bc0Shuangdaode regs[543] = dsaf_read_dev(ppe_cb, PPE_CFG_RX_PKT_INT_REG); 616511e6bc0Shuangdaode 617511e6bc0Shuangdaode regs[544] = dsaf_read_dev(ppe_cb, PPE_CFG_HEAT_DECT_TIME0_REG); 618511e6bc0Shuangdaode regs[545] = dsaf_read_dev(ppe_cb, PPE_CFG_HEAT_DECT_TIME1_REG); 619511e6bc0Shuangdaode 620511e6bc0Shuangdaode /* ppe static */ 621511e6bc0Shuangdaode regs[546] = dsaf_read_dev(ppe_cb, PPE_HIS_RX_SW_PKT_CNT_REG); 622511e6bc0Shuangdaode regs[547] = dsaf_read_dev(ppe_cb, PPE_HIS_RX_WR_BD_OK_PKT_CNT_REG); 623511e6bc0Shuangdaode regs[548] = dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_NO_BUF_CNT_REG); 624511e6bc0Shuangdaode regs[549] = dsaf_read_dev(ppe_cb, PPE_HIS_TX_BD_CNT_REG); 625511e6bc0Shuangdaode regs[550] = dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_CNT_REG); 626511e6bc0Shuangdaode regs[551] = dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_OK_CNT_REG); 627511e6bc0Shuangdaode regs[552] = dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_EPT_CNT_REG); 628511e6bc0Shuangdaode regs[553] = dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_CS_FAIL_CNT_REG); 629511e6bc0Shuangdaode regs[554] = dsaf_read_dev(ppe_cb, PPE_HIS_RX_APP_BUF_FAIL_CNT_REG); 630511e6bc0Shuangdaode regs[555] = dsaf_read_dev(ppe_cb, PPE_HIS_RX_APP_BUF_WAIT_CNT_REG); 631511e6bc0Shuangdaode regs[556] = dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_DROP_FUL_CNT_REG); 632511e6bc0Shuangdaode regs[557] = dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_DROP_PRT_CNT_REG); 633511e6bc0Shuangdaode 634511e6bc0Shuangdaode regs[558] = dsaf_read_dev(ppe_cb, PPE_TNL_0_5_CNT_CLR_CE_REG); 635511e6bc0Shuangdaode regs[559] = dsaf_read_dev(ppe_cb, PPE_CFG_AXI_DBG_REG); 636511e6bc0Shuangdaode regs[560] = dsaf_read_dev(ppe_cb, PPE_HIS_PRO_ERR_REG); 637511e6bc0Shuangdaode regs[561] = dsaf_read_dev(ppe_cb, PPE_HIS_TNL_FIFO_ERR_REG); 638511e6bc0Shuangdaode regs[562] = dsaf_read_dev(ppe_cb, PPE_CURR_CFF_DATA_NUM_REG); 639511e6bc0Shuangdaode regs[563] = dsaf_read_dev(ppe_cb, PPE_CURR_RX_ST_REG); 640511e6bc0Shuangdaode regs[564] = dsaf_read_dev(ppe_cb, PPE_CURR_TX_ST_REG); 641511e6bc0Shuangdaode regs[565] = dsaf_read_dev(ppe_cb, PPE_CURR_RX_FIFO0_REG); 642511e6bc0Shuangdaode regs[566] = dsaf_read_dev(ppe_cb, PPE_CURR_RX_FIFO1_REG); 643511e6bc0Shuangdaode regs[567] = dsaf_read_dev(ppe_cb, PPE_CURR_TX_FIFO0_REG); 644511e6bc0Shuangdaode regs[568] = dsaf_read_dev(ppe_cb, PPE_CURR_TX_FIFO1_REG); 645511e6bc0Shuangdaode regs[569] = dsaf_read_dev(ppe_cb, PPE_ECO0_REG); 646511e6bc0Shuangdaode regs[570] = dsaf_read_dev(ppe_cb, PPE_ECO1_REG); 647511e6bc0Shuangdaode regs[571] = dsaf_read_dev(ppe_cb, PPE_ECO2_REG); 648511e6bc0Shuangdaode 649511e6bc0Shuangdaode /* mark end of ppe regs */ 650511e6bc0Shuangdaode for (i = 572; i < 576; i++) 651511e6bc0Shuangdaode regs[i] = 0xeeeeeeee; 652511e6bc0Shuangdaode } 653