1 /* 2 * Copyright (c) 2014-2015 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #include <linux/module.h> 11 #include <linux/kernel.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/netdevice.h> 15 #include <linux/platform_device.h> 16 #include <linux/of.h> 17 #include <linux/of_address.h> 18 #include <linux/of_irq.h> 19 #include <linux/device.h> 20 #include <linux/vmalloc.h> 21 22 #include "hns_dsaf_main.h" 23 #include "hns_dsaf_rcb.h" 24 #include "hns_dsaf_ppe.h" 25 #include "hns_dsaf_mac.h" 26 27 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = { 28 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf", 29 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss", 30 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf", 31 }; 32 33 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev) 34 { 35 int ret, i; 36 u32 desc_num; 37 u32 buf_size; 38 const char *mode_str; 39 struct device_node *np = dsaf_dev->dev->of_node; 40 41 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1")) 42 dsaf_dev->dsaf_ver = AE_VERSION_1; 43 else 44 dsaf_dev->dsaf_ver = AE_VERSION_2; 45 46 ret = of_property_read_string(np, "mode", &mode_str); 47 if (ret) { 48 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret); 49 return ret; 50 } 51 for (i = 0; i < DSAF_MODE_MAX; i++) { 52 if (g_dsaf_mode_match[i] && 53 !strcmp(mode_str, g_dsaf_mode_match[i])) 54 break; 55 } 56 if (i >= DSAF_MODE_MAX || 57 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) { 58 dev_err(dsaf_dev->dev, 59 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name); 60 return -EINVAL; 61 } 62 dsaf_dev->dsaf_mode = (enum dsaf_mode)i; 63 64 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE) 65 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE; 66 else 67 dsaf_dev->dsaf_en = HRD_DSAF_MODE; 68 69 if ((i == DSAF_MODE_ENABLE_16VM) || 70 (i == DSAF_MODE_DISABLE_2PORT_8VM) || 71 (i == DSAF_MODE_DISABLE_6PORT_2VM)) 72 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE; 73 else 74 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE; 75 76 dsaf_dev->sc_base = of_iomap(np, 0); 77 if (!dsaf_dev->sc_base) { 78 dev_err(dsaf_dev->dev, 79 "%s of_iomap 0 fail!\n", dsaf_dev->ae_dev.name); 80 ret = -ENOMEM; 81 goto unmap_base_addr; 82 } 83 84 dsaf_dev->sds_base = of_iomap(np, 1); 85 if (!dsaf_dev->sds_base) { 86 dev_err(dsaf_dev->dev, 87 "%s of_iomap 1 fail!\n", dsaf_dev->ae_dev.name); 88 ret = -ENOMEM; 89 goto unmap_base_addr; 90 } 91 92 dsaf_dev->ppe_base = of_iomap(np, 2); 93 if (!dsaf_dev->ppe_base) { 94 dev_err(dsaf_dev->dev, 95 "%s of_iomap 2 fail!\n", dsaf_dev->ae_dev.name); 96 ret = -ENOMEM; 97 goto unmap_base_addr; 98 } 99 100 dsaf_dev->io_base = of_iomap(np, 3); 101 if (!dsaf_dev->io_base) { 102 dev_err(dsaf_dev->dev, 103 "%s of_iomap 3 fail!\n", dsaf_dev->ae_dev.name); 104 ret = -ENOMEM; 105 goto unmap_base_addr; 106 } 107 108 dsaf_dev->cpld_base = of_iomap(np, 4); 109 if (!dsaf_dev->cpld_base) 110 dev_dbg(dsaf_dev->dev, "NO CPLD ADDR"); 111 112 ret = of_property_read_u32(np, "desc-num", &desc_num); 113 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT || 114 desc_num > HNS_DSAF_MAX_DESC_CNT) { 115 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n", 116 desc_num, ret); 117 goto unmap_base_addr; 118 } 119 dsaf_dev->desc_num = desc_num; 120 121 ret = of_property_read_u32(np, "buf-size", &buf_size); 122 if (ret < 0) { 123 dev_err(dsaf_dev->dev, 124 "get buf-size fail, ret=%d!\r\n", ret); 125 goto unmap_base_addr; 126 } 127 dsaf_dev->buf_size = buf_size; 128 129 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size); 130 if (dsaf_dev->buf_size_type < 0) { 131 dev_err(dsaf_dev->dev, 132 "buf_size(%d) is wrong!\n", buf_size); 133 goto unmap_base_addr; 134 } 135 136 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL))) 137 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n"); 138 else 139 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n"); 140 141 return 0; 142 143 unmap_base_addr: 144 if (dsaf_dev->io_base) 145 iounmap(dsaf_dev->io_base); 146 if (dsaf_dev->ppe_base) 147 iounmap(dsaf_dev->ppe_base); 148 if (dsaf_dev->sds_base) 149 iounmap(dsaf_dev->sds_base); 150 if (dsaf_dev->sc_base) 151 iounmap(dsaf_dev->sc_base); 152 if (dsaf_dev->cpld_base) 153 iounmap(dsaf_dev->cpld_base); 154 return ret; 155 } 156 157 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev) 158 { 159 if (dsaf_dev->io_base) 160 iounmap(dsaf_dev->io_base); 161 162 if (dsaf_dev->ppe_base) 163 iounmap(dsaf_dev->ppe_base); 164 165 if (dsaf_dev->sds_base) 166 iounmap(dsaf_dev->sds_base); 167 168 if (dsaf_dev->sc_base) 169 iounmap(dsaf_dev->sc_base); 170 171 if (dsaf_dev->cpld_base) 172 iounmap(dsaf_dev->cpld_base); 173 } 174 175 /** 176 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en 177 * @dsaf_id: dsa fabric id 178 */ 179 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev) 180 { 181 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1); 182 } 183 184 /** 185 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce 186 * @dsaf_id: dsa fabric id 187 * @hns_dsaf_reg_cnt_clr_ce: config value 188 */ 189 static void 190 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce) 191 { 192 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG, 193 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce); 194 } 195 196 /** 197 * hns_ppe_qid_cfg - config ppe qid 198 * @dsaf_id: dsa fabric id 199 * @pppe_qid_cfg: value array 200 */ 201 static void 202 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg) 203 { 204 u32 i; 205 206 for (i = 0; i < DSAF_COMM_CHN; i++) { 207 dsaf_set_dev_field(dsaf_dev, 208 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i, 209 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S, 210 qid_cfg); 211 } 212 } 213 214 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev) 215 { 216 u16 max_q_per_vf, max_vfn; 217 u32 q_id, q_num_per_port; 218 u32 i; 219 220 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, 221 HNS_DSAF_COMM_SERVICE_NW_IDX, 222 &max_vfn, &max_q_per_vf); 223 q_num_per_port = max_vfn * max_q_per_vf; 224 225 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) { 226 dsaf_set_dev_field(dsaf_dev, 227 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i, 228 0xff, 0, q_id); 229 q_id += q_num_per_port; 230 } 231 } 232 233 /** 234 * hns_dsaf_sw_port_type_cfg - cfg sw type 235 * @dsaf_id: dsa fabric id 236 * @psw_port_type: array 237 */ 238 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev, 239 enum dsaf_sw_port_type port_type) 240 { 241 u32 i; 242 243 for (i = 0; i < DSAF_SW_PORT_NUM; i++) { 244 dsaf_set_dev_field(dsaf_dev, 245 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i, 246 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S, 247 port_type); 248 } 249 } 250 251 /** 252 * hns_dsaf_stp_port_type_cfg - cfg stp type 253 * @dsaf_id: dsa fabric id 254 * @pstp_port_type: array 255 */ 256 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev, 257 enum dsaf_stp_port_type port_type) 258 { 259 u32 i; 260 261 for (i = 0; i < DSAF_COMM_CHN; i++) { 262 dsaf_set_dev_field(dsaf_dev, 263 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i, 264 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S, 265 port_type); 266 } 267 } 268 269 #define HNS_DSAF_SBM_NUM(dev) \ 270 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM) 271 /** 272 * hns_dsaf_sbm_cfg - config sbm 273 * @dsaf_id: dsa fabric id 274 */ 275 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev) 276 { 277 u32 o_sbm_cfg; 278 u32 i; 279 280 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 281 o_sbm_cfg = dsaf_read_dev(dsaf_dev, 282 DSAF_SBM_CFG_REG_0_REG + 0x80 * i); 283 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1); 284 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0); 285 dsaf_write_dev(dsaf_dev, 286 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg); 287 } 288 } 289 290 /** 291 * hns_dsaf_sbm_cfg_mib_en - config sbm 292 * @dsaf_id: dsa fabric id 293 */ 294 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev) 295 { 296 u32 sbm_cfg_mib_en; 297 u32 i; 298 u32 reg; 299 u32 read_cnt; 300 301 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */ 302 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 303 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 304 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0); 305 } 306 307 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 308 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 309 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1); 310 } 311 312 /* waitint for all sbm enable finished */ 313 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 314 read_cnt = 0; 315 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 316 do { 317 udelay(1); 318 sbm_cfg_mib_en = dsaf_get_dev_bit( 319 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S); 320 read_cnt++; 321 } while (sbm_cfg_mib_en == 0 && 322 read_cnt < DSAF_CFG_READ_CNT); 323 324 if (sbm_cfg_mib_en == 0) { 325 dev_err(dsaf_dev->dev, 326 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n", 327 dsaf_dev->ae_dev.name, i); 328 return -ENODEV; 329 } 330 } 331 332 return 0; 333 } 334 335 /** 336 * hns_dsaf_sbm_bp_wl_cfg - config sbm 337 * @dsaf_id: dsa fabric id 338 */ 339 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev) 340 { 341 u32 o_sbm_bp_cfg; 342 u32 reg; 343 u32 i; 344 345 /* XGE */ 346 for (i = 0; i < DSAF_XGE_NUM; i++) { 347 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i; 348 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 349 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M, 350 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512); 351 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M, 352 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0); 353 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M, 354 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0); 355 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 356 357 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i; 358 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 359 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M, 360 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0); 361 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M, 362 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0); 363 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 364 365 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i; 366 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 367 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 368 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104); 369 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 370 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128); 371 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 372 373 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i; 374 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 375 dsaf_set_field(o_sbm_bp_cfg, 376 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 377 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110); 378 dsaf_set_field(o_sbm_bp_cfg, 379 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 380 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160); 381 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 382 383 /* for no enable pfc mode */ 384 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i; 385 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 386 dsaf_set_field(o_sbm_bp_cfg, 387 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 388 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128); 389 dsaf_set_field(o_sbm_bp_cfg, 390 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 391 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192); 392 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 393 } 394 395 /* PPE */ 396 for (i = 0; i < DSAF_COMM_CHN; i++) { 397 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i; 398 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 399 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 400 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10); 401 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 402 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12); 403 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 404 } 405 406 /* RoCEE */ 407 for (i = 0; i < DSAF_COMM_CHN; i++) { 408 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i; 409 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 410 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 411 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2); 412 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 413 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4); 414 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 415 } 416 } 417 418 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev) 419 { 420 u32 o_sbm_bp_cfg; 421 u32 reg; 422 u32 i; 423 424 /* XGE */ 425 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) { 426 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i; 427 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 428 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M, 429 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256); 430 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M, 431 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0); 432 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M, 433 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0); 434 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 435 436 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i; 437 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 438 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M, 439 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0); 440 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M, 441 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0); 442 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 443 444 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i; 445 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 446 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M, 447 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104); 448 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M, 449 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128); 450 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 451 452 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i; 453 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 454 dsaf_set_field(o_sbm_bp_cfg, 455 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 456 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110); 457 dsaf_set_field(o_sbm_bp_cfg, 458 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 459 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160); 460 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 461 462 /* for no enable pfc mode */ 463 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i; 464 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 465 dsaf_set_field(o_sbm_bp_cfg, 466 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M, 467 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128); 468 dsaf_set_field(o_sbm_bp_cfg, 469 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M, 470 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192); 471 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 472 } 473 474 /* PPE */ 475 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i; 476 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 477 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M, 478 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10); 479 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M, 480 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12); 481 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 482 /* RoCEE */ 483 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) { 484 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i; 485 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 486 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M, 487 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2); 488 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M, 489 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4); 490 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 491 } 492 } 493 494 /** 495 * hns_dsaf_voq_bp_all_thrd_cfg - voq 496 * @dsaf_id: dsa fabric id 497 */ 498 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev) 499 { 500 u32 voq_bp_all_thrd; 501 u32 i; 502 503 for (i = 0; i < DSAF_VOQ_NUM; i++) { 504 voq_bp_all_thrd = dsaf_read_dev( 505 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i); 506 if (i < DSAF_XGE_NUM) { 507 dsaf_set_field(voq_bp_all_thrd, 508 DSAF_VOQ_BP_ALL_DOWNTHRD_M, 509 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930); 510 dsaf_set_field(voq_bp_all_thrd, 511 DSAF_VOQ_BP_ALL_UPTHRD_M, 512 DSAF_VOQ_BP_ALL_UPTHRD_S, 950); 513 } else { 514 dsaf_set_field(voq_bp_all_thrd, 515 DSAF_VOQ_BP_ALL_DOWNTHRD_M, 516 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220); 517 dsaf_set_field(voq_bp_all_thrd, 518 DSAF_VOQ_BP_ALL_UPTHRD_M, 519 DSAF_VOQ_BP_ALL_UPTHRD_S, 230); 520 } 521 dsaf_write_dev( 522 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i, 523 voq_bp_all_thrd); 524 } 525 } 526 527 /** 528 * hns_dsaf_tbl_tcam_data_cfg - tbl 529 * @dsaf_id: dsa fabric id 530 * @ptbl_tcam_data: addr 531 */ 532 static void hns_dsaf_tbl_tcam_data_cfg( 533 struct dsaf_device *dsaf_dev, 534 struct dsaf_tbl_tcam_data *ptbl_tcam_data) 535 { 536 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG, 537 ptbl_tcam_data->tbl_tcam_data_low); 538 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG, 539 ptbl_tcam_data->tbl_tcam_data_high); 540 } 541 542 /** 543 * dsaf_tbl_tcam_mcast_cfg - tbl 544 * @dsaf_id: dsa fabric id 545 * @ptbl_tcam_mcast: addr 546 */ 547 static void hns_dsaf_tbl_tcam_mcast_cfg( 548 struct dsaf_device *dsaf_dev, 549 struct dsaf_tbl_tcam_mcast_cfg *mcast) 550 { 551 u32 mcast_cfg4; 552 553 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG); 554 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S, 555 mcast->tbl_mcast_item_vld); 556 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S, 557 mcast->tbl_mcast_old_en); 558 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M, 559 DSAF_TBL_MCAST_CFG4_VM128_112_S, 560 mcast->tbl_mcast_port_msk[4]); 561 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4); 562 563 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 564 mcast->tbl_mcast_port_msk[3]); 565 566 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 567 mcast->tbl_mcast_port_msk[2]); 568 569 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 570 mcast->tbl_mcast_port_msk[1]); 571 572 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 573 mcast->tbl_mcast_port_msk[0]); 574 } 575 576 /** 577 * hns_dsaf_tbl_tcam_ucast_cfg - tbl 578 * @dsaf_id: dsa fabric id 579 * @ptbl_tcam_ucast: addr 580 */ 581 static void hns_dsaf_tbl_tcam_ucast_cfg( 582 struct dsaf_device *dsaf_dev, 583 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast) 584 { 585 u32 ucast_cfg1; 586 587 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG); 588 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S, 589 tbl_tcam_ucast->tbl_ucast_mac_discard); 590 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S, 591 tbl_tcam_ucast->tbl_ucast_item_vld); 592 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S, 593 tbl_tcam_ucast->tbl_ucast_old_en); 594 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S, 595 tbl_tcam_ucast->tbl_ucast_dvc); 596 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M, 597 DSAF_TBL_UCAST_CFG1_OUT_PORT_S, 598 tbl_tcam_ucast->tbl_ucast_out_port); 599 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1); 600 } 601 602 /** 603 * hns_dsaf_tbl_line_cfg - tbl 604 * @dsaf_id: dsa fabric id 605 * @ptbl_lin: addr 606 */ 607 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev, 608 struct dsaf_tbl_line_cfg *tbl_lin) 609 { 610 u32 tbl_line; 611 612 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG); 613 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S, 614 tbl_lin->tbl_line_mac_discard); 615 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S, 616 tbl_lin->tbl_line_dvc); 617 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M, 618 DSAF_TBL_LINE_CFG_OUT_PORT_S, 619 tbl_lin->tbl_line_out_port); 620 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line); 621 } 622 623 /** 624 * hns_dsaf_tbl_tcam_mcast_pul - tbl 625 * @dsaf_id: dsa fabric id 626 */ 627 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev) 628 { 629 u32 o_tbl_pul; 630 631 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 632 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1); 633 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 634 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0); 635 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 636 } 637 638 /** 639 * hns_dsaf_tbl_line_pul - tbl 640 * @dsaf_id: dsa fabric id 641 */ 642 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev) 643 { 644 u32 tbl_pul; 645 646 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 647 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1); 648 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul); 649 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0); 650 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul); 651 } 652 653 /** 654 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl 655 * @dsaf_id: dsa fabric id 656 */ 657 static void hns_dsaf_tbl_tcam_data_mcast_pul( 658 struct dsaf_device *dsaf_dev) 659 { 660 u32 o_tbl_pul; 661 662 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 663 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1); 664 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1); 665 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 666 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0); 667 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0); 668 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 669 } 670 671 /** 672 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl 673 * @dsaf_id: dsa fabric id 674 */ 675 static void hns_dsaf_tbl_tcam_data_ucast_pul( 676 struct dsaf_device *dsaf_dev) 677 { 678 u32 o_tbl_pul; 679 680 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 681 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1); 682 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1); 683 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 684 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0); 685 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0); 686 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 687 } 688 689 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en) 690 { 691 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_MIX_MODE_S, !!en); 692 } 693 694 /** 695 * hns_dsaf_tbl_stat_en - tbl 696 * @dsaf_id: dsa fabric id 697 * @ptbl_stat_en: addr 698 */ 699 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev) 700 { 701 u32 o_tbl_ctrl; 702 703 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG); 704 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1); 705 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1); 706 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1); 707 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1); 708 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl); 709 } 710 711 /** 712 * hns_dsaf_rocee_bp_en - rocee back press enable 713 * @dsaf_id: dsa fabric id 714 */ 715 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev) 716 { 717 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG, 718 DSAF_FC_XGE_TX_PAUSE_S, 1); 719 } 720 721 /* set msk for dsaf exception irq*/ 722 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev, 723 u32 chnn_num, u32 mask_set) 724 { 725 dsaf_write_dev(dsaf_dev, 726 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set); 727 } 728 729 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev, 730 u32 chnn_num, u32 msk_set) 731 { 732 dsaf_write_dev(dsaf_dev, 733 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set); 734 } 735 736 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev, 737 u32 chnn, u32 msk_set) 738 { 739 dsaf_write_dev(dsaf_dev, 740 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set); 741 } 742 743 static void 744 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set) 745 { 746 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set); 747 } 748 749 /* clr dsaf exception irq*/ 750 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev, 751 u32 chnn_num, u32 int_src) 752 { 753 dsaf_write_dev(dsaf_dev, 754 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src); 755 } 756 757 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev, 758 u32 chnn, u32 int_src) 759 { 760 dsaf_write_dev(dsaf_dev, 761 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src); 762 } 763 764 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev, 765 u32 chnn, u32 int_src) 766 { 767 dsaf_write_dev(dsaf_dev, 768 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src); 769 } 770 771 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev, 772 u32 int_src) 773 { 774 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src); 775 } 776 777 /** 778 * hns_dsaf_single_line_tbl_cfg - INT 779 * @dsaf_id: dsa fabric id 780 * @address: 781 * @ptbl_line: 782 */ 783 static void hns_dsaf_single_line_tbl_cfg( 784 struct dsaf_device *dsaf_dev, 785 u32 address, struct dsaf_tbl_line_cfg *ptbl_line) 786 { 787 /*Write Addr*/ 788 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address); 789 790 /*Write Line*/ 791 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line); 792 793 /*Write Plus*/ 794 hns_dsaf_tbl_line_pul(dsaf_dev); 795 } 796 797 /** 798 * hns_dsaf_tcam_uc_cfg - INT 799 * @dsaf_id: dsa fabric id 800 * @address, 801 * @ptbl_tcam_data, 802 */ 803 static void hns_dsaf_tcam_uc_cfg( 804 struct dsaf_device *dsaf_dev, u32 address, 805 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 806 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast) 807 { 808 /*Write Addr*/ 809 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 810 /*Write Tcam Data*/ 811 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data); 812 /*Write Tcam Ucast*/ 813 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast); 814 /*Write Plus*/ 815 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev); 816 } 817 818 /** 819 * hns_dsaf_tcam_mc_cfg - INT 820 * @dsaf_id: dsa fabric id 821 * @address, 822 * @ptbl_tcam_data, 823 * @ptbl_tcam_mcast, 824 */ 825 static void hns_dsaf_tcam_mc_cfg( 826 struct dsaf_device *dsaf_dev, u32 address, 827 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 828 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast) 829 { 830 /*Write Addr*/ 831 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 832 /*Write Tcam Data*/ 833 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data); 834 /*Write Tcam Mcast*/ 835 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast); 836 /*Write Plus*/ 837 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev); 838 } 839 840 /** 841 * hns_dsaf_tcam_mc_invld - INT 842 * @dsaf_id: dsa fabric id 843 * @address 844 */ 845 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address) 846 { 847 /*Write Addr*/ 848 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 849 850 /*write tcam mcast*/ 851 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0); 852 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0); 853 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0); 854 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0); 855 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0); 856 857 /*Write Plus*/ 858 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev); 859 } 860 861 /** 862 * hns_dsaf_tcam_uc_get - INT 863 * @dsaf_id: dsa fabric id 864 * @address 865 * @ptbl_tcam_data 866 * @ptbl_tcam_ucast 867 */ 868 static void hns_dsaf_tcam_uc_get( 869 struct dsaf_device *dsaf_dev, u32 address, 870 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 871 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast) 872 { 873 u32 tcam_read_data0; 874 u32 tcam_read_data4; 875 876 /*Write Addr*/ 877 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 878 879 /*read tcam item puls*/ 880 hns_dsaf_tbl_tcam_load_pul(dsaf_dev); 881 882 /*read tcam data*/ 883 ptbl_tcam_data->tbl_tcam_data_high 884 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 885 ptbl_tcam_data->tbl_tcam_data_low 886 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 887 888 /*read tcam mcast*/ 889 tcam_read_data0 = dsaf_read_dev(dsaf_dev, 890 DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 891 tcam_read_data4 = dsaf_read_dev(dsaf_dev, 892 DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 893 894 ptbl_tcam_ucast->tbl_ucast_item_vld 895 = dsaf_get_bit(tcam_read_data4, 896 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S); 897 ptbl_tcam_ucast->tbl_ucast_old_en 898 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S); 899 ptbl_tcam_ucast->tbl_ucast_mac_discard 900 = dsaf_get_bit(tcam_read_data0, 901 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S); 902 ptbl_tcam_ucast->tbl_ucast_out_port 903 = dsaf_get_field(tcam_read_data0, 904 DSAF_TBL_UCAST_CFG1_OUT_PORT_M, 905 DSAF_TBL_UCAST_CFG1_OUT_PORT_S); 906 ptbl_tcam_ucast->tbl_ucast_dvc 907 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S); 908 } 909 910 /** 911 * hns_dsaf_tcam_mc_get - INT 912 * @dsaf_id: dsa fabric id 913 * @address 914 * @ptbl_tcam_data 915 * @ptbl_tcam_ucast 916 */ 917 static void hns_dsaf_tcam_mc_get( 918 struct dsaf_device *dsaf_dev, u32 address, 919 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 920 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast) 921 { 922 u32 data_tmp; 923 924 /*Write Addr*/ 925 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 926 927 /*read tcam item puls*/ 928 hns_dsaf_tbl_tcam_load_pul(dsaf_dev); 929 930 /*read tcam data*/ 931 ptbl_tcam_data->tbl_tcam_data_high = 932 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 933 ptbl_tcam_data->tbl_tcam_data_low = 934 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 935 936 /*read tcam mcast*/ 937 ptbl_tcam_mcast->tbl_mcast_port_msk[0] = 938 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 939 ptbl_tcam_mcast->tbl_mcast_port_msk[1] = 940 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG); 941 ptbl_tcam_mcast->tbl_mcast_port_msk[2] = 942 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG); 943 ptbl_tcam_mcast->tbl_mcast_port_msk[3] = 944 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG); 945 946 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 947 ptbl_tcam_mcast->tbl_mcast_item_vld = 948 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S); 949 ptbl_tcam_mcast->tbl_mcast_old_en = 950 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S); 951 ptbl_tcam_mcast->tbl_mcast_port_msk[4] = 952 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M, 953 DSAF_TBL_MCAST_CFG4_VM128_112_S); 954 } 955 956 /** 957 * hns_dsaf_tbl_line_init - INT 958 * @dsaf_id: dsa fabric id 959 */ 960 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev) 961 { 962 u32 i; 963 /* defaultly set all lineal mac table entry resulting discard */ 964 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} }; 965 966 for (i = 0; i < DSAF_LINE_SUM; i++) 967 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line); 968 } 969 970 /** 971 * hns_dsaf_tbl_tcam_init - INT 972 * @dsaf_id: dsa fabric id 973 */ 974 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev) 975 { 976 u32 i; 977 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} }; 978 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} }; 979 980 /*tcam tbl*/ 981 for (i = 0; i < DSAF_TCAM_SUM; i++) 982 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast); 983 } 984 985 /** 986 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg 987 * @mac_cb: mac contrl block 988 */ 989 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev, 990 int mac_id, int en) 991 { 992 if (!en) 993 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0); 994 else 995 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0xff); 996 } 997 998 /** 999 * hns_dsaf_tbl_tcam_init - INT 1000 * @dsaf_id: dsa fabric id 1001 * @dsaf_mode 1002 */ 1003 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev) 1004 { 1005 u32 i; 1006 u32 o_dsaf_cfg; 1007 1008 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG); 1009 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en); 1010 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode); 1011 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0); 1012 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0); 1013 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0); 1014 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg); 1015 1016 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1); 1017 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD); 1018 1019 /* set 22 queue per tx ppe engine, only used in switch mode */ 1020 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE); 1021 1022 /* set promisc def queue id */ 1023 hns_dsaf_mix_def_qid_cfg(dsaf_dev); 1024 1025 /* in non switch mode, set all port to access mode */ 1026 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN); 1027 1028 /*set dsaf pfc to 0 for parseing rx pause*/ 1029 for (i = 0; i < DSAF_COMM_CHN; i++) 1030 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0); 1031 1032 /*msk and clr exception irqs */ 1033 for (i = 0; i < DSAF_COMM_CHN; i++) { 1034 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful); 1035 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful); 1036 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful); 1037 1038 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful); 1039 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful); 1040 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful); 1041 } 1042 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful); 1043 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful); 1044 } 1045 1046 /** 1047 * hns_dsaf_inode_init - INT 1048 * @dsaf_id: dsa fabric id 1049 */ 1050 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev) 1051 { 1052 u32 reg; 1053 u32 tc_cfg; 1054 u32 i; 1055 1056 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE) 1057 tc_cfg = HNS_DSAF_I4TC_CFG; 1058 else 1059 tc_cfg = HNS_DSAF_I8TC_CFG; 1060 1061 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1062 for (i = 0; i < DSAF_INODE_NUM; i++) { 1063 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i; 1064 dsaf_set_dev_field(dsaf_dev, reg, 1065 DSAF_INODE_IN_PORT_NUM_M, 1066 DSAF_INODE_IN_PORT_NUM_S, 1067 i % DSAF_XGE_NUM); 1068 } 1069 } else { 1070 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) { 1071 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i; 1072 dsaf_set_dev_field(dsaf_dev, reg, 1073 DSAF_INODE_IN_PORT_NUM_M, 1074 DSAF_INODE_IN_PORT_NUM_S, 0); 1075 dsaf_set_dev_field(dsaf_dev, reg, 1076 DSAFV2_INODE_IN_PORT1_NUM_M, 1077 DSAFV2_INODE_IN_PORT1_NUM_S, 1); 1078 dsaf_set_dev_field(dsaf_dev, reg, 1079 DSAFV2_INODE_IN_PORT2_NUM_M, 1080 DSAFV2_INODE_IN_PORT2_NUM_S, 2); 1081 dsaf_set_dev_field(dsaf_dev, reg, 1082 DSAFV2_INODE_IN_PORT3_NUM_M, 1083 DSAFV2_INODE_IN_PORT3_NUM_S, 3); 1084 dsaf_set_dev_field(dsaf_dev, reg, 1085 DSAFV2_INODE_IN_PORT4_NUM_M, 1086 DSAFV2_INODE_IN_PORT4_NUM_S, 4); 1087 dsaf_set_dev_field(dsaf_dev, reg, 1088 DSAFV2_INODE_IN_PORT5_NUM_M, 1089 DSAFV2_INODE_IN_PORT5_NUM_S, 5); 1090 } 1091 } 1092 for (i = 0; i < DSAF_INODE_NUM; i++) { 1093 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i; 1094 dsaf_write_dev(dsaf_dev, reg, tc_cfg); 1095 } 1096 } 1097 1098 /** 1099 * hns_dsaf_sbm_init - INT 1100 * @dsaf_id: dsa fabric id 1101 */ 1102 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev) 1103 { 1104 u32 flag; 1105 u32 finish_msk; 1106 u32 cnt = 0; 1107 int ret; 1108 1109 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1110 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev); 1111 finish_msk = DSAF_SRAM_INIT_OVER_M; 1112 } else { 1113 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev); 1114 finish_msk = DSAFV2_SRAM_INIT_OVER_M; 1115 } 1116 1117 /* enable sbm chanel, disable sbm chanel shcut function*/ 1118 hns_dsaf_sbm_cfg(dsaf_dev); 1119 1120 /* enable sbm mib */ 1121 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev); 1122 if (ret) { 1123 dev_err(dsaf_dev->dev, 1124 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n", 1125 dsaf_dev->ae_dev.name, ret); 1126 return ret; 1127 } 1128 1129 /* enable sbm initial link sram */ 1130 hns_dsaf_sbm_link_sram_init_en(dsaf_dev); 1131 1132 do { 1133 usleep_range(200, 210);/*udelay(200);*/ 1134 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG, 1135 finish_msk, DSAF_SRAM_INIT_OVER_S); 1136 cnt++; 1137 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) && 1138 cnt < DSAF_CFG_READ_CNT); 1139 1140 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) { 1141 dev_err(dsaf_dev->dev, 1142 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n", 1143 dsaf_dev->ae_dev.name, flag, cnt); 1144 return -ENODEV; 1145 } 1146 1147 hns_dsaf_rocee_bp_en(dsaf_dev); 1148 1149 return 0; 1150 } 1151 1152 /** 1153 * hns_dsaf_tbl_init - INT 1154 * @dsaf_id: dsa fabric id 1155 */ 1156 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev) 1157 { 1158 hns_dsaf_tbl_stat_en(dsaf_dev); 1159 1160 hns_dsaf_tbl_tcam_init(dsaf_dev); 1161 hns_dsaf_tbl_line_init(dsaf_dev); 1162 } 1163 1164 /** 1165 * hns_dsaf_voq_init - INT 1166 * @dsaf_id: dsa fabric id 1167 */ 1168 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev) 1169 { 1170 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev); 1171 } 1172 1173 /** 1174 * hns_dsaf_init_hw - init dsa fabric hardware 1175 * @dsaf_dev: dsa fabric device struct pointer 1176 */ 1177 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev) 1178 { 1179 int ret; 1180 1181 dev_dbg(dsaf_dev->dev, 1182 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name); 1183 1184 hns_dsaf_rst(dsaf_dev, 0); 1185 mdelay(10); 1186 hns_dsaf_rst(dsaf_dev, 1); 1187 1188 hns_dsaf_comm_init(dsaf_dev); 1189 1190 /*init XBAR_INODE*/ 1191 hns_dsaf_inode_init(dsaf_dev); 1192 1193 /*init SBM*/ 1194 ret = hns_dsaf_sbm_init(dsaf_dev); 1195 if (ret) 1196 return ret; 1197 1198 /*init TBL*/ 1199 hns_dsaf_tbl_init(dsaf_dev); 1200 1201 /*init VOQ*/ 1202 hns_dsaf_voq_init(dsaf_dev); 1203 1204 return 0; 1205 } 1206 1207 /** 1208 * hns_dsaf_remove_hw - uninit dsa fabric hardware 1209 * @dsaf_dev: dsa fabric device struct pointer 1210 */ 1211 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev) 1212 { 1213 /*reset*/ 1214 hns_dsaf_rst(dsaf_dev, 0); 1215 } 1216 1217 /** 1218 * hns_dsaf_init - init dsa fabric 1219 * @dsaf_dev: dsa fabric device struct pointer 1220 * retuen 0 - success , negative --fail 1221 */ 1222 static int hns_dsaf_init(struct dsaf_device *dsaf_dev) 1223 { 1224 struct dsaf_drv_priv *priv = 1225 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1226 u32 i; 1227 int ret; 1228 1229 ret = hns_dsaf_init_hw(dsaf_dev); 1230 if (ret) 1231 return ret; 1232 1233 /* malloc mem for tcam mac key(vlan+mac) */ 1234 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl) 1235 * DSAF_TCAM_SUM); 1236 if (!priv->soft_mac_tbl) { 1237 ret = -ENOMEM; 1238 goto remove_hw; 1239 } 1240 1241 /*all entry invall */ 1242 for (i = 0; i < DSAF_TCAM_SUM; i++) 1243 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX; 1244 1245 return 0; 1246 1247 remove_hw: 1248 hns_dsaf_remove_hw(dsaf_dev); 1249 return ret; 1250 } 1251 1252 /** 1253 * hns_dsaf_free - free dsa fabric 1254 * @dsaf_dev: dsa fabric device struct pointer 1255 */ 1256 static void hns_dsaf_free(struct dsaf_device *dsaf_dev) 1257 { 1258 struct dsaf_drv_priv *priv = 1259 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1260 1261 hns_dsaf_remove_hw(dsaf_dev); 1262 1263 /* free all mac mem */ 1264 vfree(priv->soft_mac_tbl); 1265 priv->soft_mac_tbl = NULL; 1266 } 1267 1268 /** 1269 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry 1270 * @dsaf_dev: dsa fabric device struct pointer 1271 * @mac_key: mac entry struct pointer 1272 */ 1273 static u16 hns_dsaf_find_soft_mac_entry( 1274 struct dsaf_device *dsaf_dev, 1275 struct dsaf_drv_tbl_tcam_key *mac_key) 1276 { 1277 struct dsaf_drv_priv *priv = 1278 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1279 struct dsaf_drv_soft_mac_tbl *soft_mac_entry; 1280 u32 i; 1281 1282 soft_mac_entry = priv->soft_mac_tbl; 1283 for (i = 0; i < DSAF_TCAM_SUM; i++) { 1284 /* invall tab entry */ 1285 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) && 1286 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) && 1287 (soft_mac_entry->tcam_key.low.val == mac_key->low.val)) 1288 /* return find result --soft index */ 1289 return soft_mac_entry->index; 1290 1291 soft_mac_entry++; 1292 } 1293 return DSAF_INVALID_ENTRY_IDX; 1294 } 1295 1296 /** 1297 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry 1298 * @dsaf_dev: dsa fabric device struct pointer 1299 */ 1300 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev) 1301 { 1302 struct dsaf_drv_priv *priv = 1303 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1304 struct dsaf_drv_soft_mac_tbl *soft_mac_entry; 1305 u32 i; 1306 1307 soft_mac_entry = priv->soft_mac_tbl; 1308 for (i = 0; i < DSAF_TCAM_SUM; i++) { 1309 /* inv all entry */ 1310 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX) 1311 /* return find result --soft index */ 1312 return i; 1313 1314 soft_mac_entry++; 1315 } 1316 return DSAF_INVALID_ENTRY_IDX; 1317 } 1318 1319 /** 1320 * hns_dsaf_set_mac_key - set mac key 1321 * @dsaf_dev: dsa fabric device struct pointer 1322 * @mac_key: tcam key pointer 1323 * @vlan_id: vlan id 1324 * @in_port_num: input port num 1325 * @addr: mac addr 1326 */ 1327 static void hns_dsaf_set_mac_key( 1328 struct dsaf_device *dsaf_dev, 1329 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num, 1330 u8 *addr) 1331 { 1332 u8 port; 1333 1334 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE) 1335 /*DSAF mode : in port id fixed 0*/ 1336 port = 0; 1337 else 1338 /*non-dsaf mode*/ 1339 port = in_port_num; 1340 1341 mac_key->high.bits.mac_0 = addr[0]; 1342 mac_key->high.bits.mac_1 = addr[1]; 1343 mac_key->high.bits.mac_2 = addr[2]; 1344 mac_key->high.bits.mac_3 = addr[3]; 1345 mac_key->low.bits.mac_4 = addr[4]; 1346 mac_key->low.bits.mac_5 = addr[5]; 1347 mac_key->low.bits.vlan = vlan_id; 1348 mac_key->low.bits.port = port; 1349 } 1350 1351 /** 1352 * hns_dsaf_set_mac_uc_entry - set mac uc-entry 1353 * @dsaf_dev: dsa fabric device struct pointer 1354 * @mac_entry: uc-mac entry 1355 */ 1356 int hns_dsaf_set_mac_uc_entry( 1357 struct dsaf_device *dsaf_dev, 1358 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1359 { 1360 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1361 struct dsaf_drv_tbl_tcam_key mac_key; 1362 struct dsaf_tbl_tcam_ucast_cfg mac_data; 1363 struct dsaf_drv_priv *priv = 1364 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1365 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1366 1367 /* mac addr check */ 1368 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1369 MAC_IS_BROADCAST(mac_entry->addr) || 1370 MAC_IS_MULTICAST(mac_entry->addr)) { 1371 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n", 1372 dsaf_dev->ae_dev.name, mac_entry->addr); 1373 return -EINVAL; 1374 } 1375 1376 /* config key */ 1377 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1378 mac_entry->in_port_num, mac_entry->addr); 1379 1380 /* entry ie exist? */ 1381 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1382 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1383 /*if has not inv entry,find a empty entry */ 1384 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1385 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1386 /* has not empty,return error */ 1387 dev_err(dsaf_dev->dev, 1388 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1389 dsaf_dev->ae_dev.name, 1390 mac_key.high.val, mac_key.low.val); 1391 return -EINVAL; 1392 } 1393 } 1394 1395 dev_dbg(dsaf_dev->dev, 1396 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1397 dsaf_dev->ae_dev.name, mac_key.high.val, 1398 mac_key.low.val, entry_index); 1399 1400 /* config hardware entry */ 1401 mac_data.tbl_ucast_item_vld = 1; 1402 mac_data.tbl_ucast_mac_discard = 0; 1403 mac_data.tbl_ucast_old_en = 0; 1404 /* default config dvc to 0 */ 1405 mac_data.tbl_ucast_dvc = 0; 1406 mac_data.tbl_ucast_out_port = mac_entry->port_num; 1407 hns_dsaf_tcam_uc_cfg( 1408 dsaf_dev, entry_index, 1409 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1410 1411 /* config software entry */ 1412 soft_mac_entry += entry_index; 1413 soft_mac_entry->index = entry_index; 1414 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1415 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1416 1417 return 0; 1418 } 1419 1420 /** 1421 * hns_dsaf_set_mac_mc_entry - set mac mc-entry 1422 * @dsaf_dev: dsa fabric device struct pointer 1423 * @mac_entry: mc-mac entry 1424 */ 1425 int hns_dsaf_set_mac_mc_entry( 1426 struct dsaf_device *dsaf_dev, 1427 struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1428 { 1429 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1430 struct dsaf_drv_tbl_tcam_key mac_key; 1431 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1432 struct dsaf_drv_priv *priv = 1433 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1434 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1435 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1436 1437 /* mac addr check */ 1438 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1439 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n", 1440 dsaf_dev->ae_dev.name, mac_entry->addr); 1441 return -EINVAL; 1442 } 1443 1444 /*config key */ 1445 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, 1446 mac_entry->in_vlan_id, 1447 mac_entry->in_port_num, mac_entry->addr); 1448 1449 /* entry ie exist? */ 1450 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1451 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1452 /*if hasnot, find enpty entry*/ 1453 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1454 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1455 /*if hasnot empty, error*/ 1456 dev_err(dsaf_dev->dev, 1457 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1458 dsaf_dev->ae_dev.name, 1459 mac_key.high.val, mac_key.low.val); 1460 return -EINVAL; 1461 } 1462 1463 /* config hardware entry */ 1464 memset(mac_data.tbl_mcast_port_msk, 1465 0, sizeof(mac_data.tbl_mcast_port_msk)); 1466 } else { 1467 /* config hardware entry */ 1468 hns_dsaf_tcam_mc_get( 1469 dsaf_dev, entry_index, 1470 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1471 } 1472 mac_data.tbl_mcast_old_en = 0; 1473 mac_data.tbl_mcast_item_vld = 1; 1474 dsaf_set_field(mac_data.tbl_mcast_port_msk[0], 1475 0x3F, 0, mac_entry->port_mask[0]); 1476 1477 dev_dbg(dsaf_dev->dev, 1478 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n", 1479 dsaf_dev->ae_dev.name, mac_key.high.val, 1480 mac_key.low.val, entry_index); 1481 1482 hns_dsaf_tcam_mc_cfg( 1483 dsaf_dev, entry_index, 1484 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1485 1486 /* config software entry */ 1487 soft_mac_entry += entry_index; 1488 soft_mac_entry->index = entry_index; 1489 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1490 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1491 1492 return 0; 1493 } 1494 1495 /** 1496 * hns_dsaf_add_mac_mc_port - add mac mc-port 1497 * @dsaf_dev: dsa fabric device struct pointer 1498 * @mac_entry: mc-mac entry 1499 */ 1500 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev, 1501 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1502 { 1503 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1504 struct dsaf_drv_tbl_tcam_key mac_key; 1505 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1506 struct dsaf_drv_priv *priv = 1507 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1508 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1509 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1510 int mskid; 1511 1512 /*chechk mac addr */ 1513 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1514 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n", 1515 mac_entry->addr); 1516 return -EINVAL; 1517 } 1518 1519 /*config key */ 1520 hns_dsaf_set_mac_key( 1521 dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1522 mac_entry->in_port_num, mac_entry->addr); 1523 1524 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg)); 1525 1526 /*check exist? */ 1527 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1528 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1529 /*if hasnot , find a empty*/ 1530 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1531 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1532 /*if hasnot empty, error*/ 1533 dev_err(dsaf_dev->dev, 1534 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1535 dsaf_dev->ae_dev.name, mac_key.high.val, 1536 mac_key.low.val); 1537 return -EINVAL; 1538 } 1539 } else { 1540 /*if exist, add in */ 1541 hns_dsaf_tcam_mc_get( 1542 dsaf_dev, entry_index, 1543 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1544 } 1545 /* config hardware entry */ 1546 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) { 1547 mskid = mac_entry->port_num; 1548 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) { 1549 mskid = mac_entry->port_num - 1550 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM; 1551 } else { 1552 dev_err(dsaf_dev->dev, 1553 "%s,pnum(%d)error,key(%#x:%#x)\n", 1554 dsaf_dev->ae_dev.name, mac_entry->port_num, 1555 mac_key.high.val, mac_key.low.val); 1556 return -EINVAL; 1557 } 1558 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1); 1559 mac_data.tbl_mcast_old_en = 0; 1560 mac_data.tbl_mcast_item_vld = 1; 1561 1562 dev_dbg(dsaf_dev->dev, 1563 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1564 dsaf_dev->ae_dev.name, mac_key.high.val, 1565 mac_key.low.val, entry_index); 1566 1567 hns_dsaf_tcam_mc_cfg( 1568 dsaf_dev, entry_index, 1569 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1570 1571 /*config software entry */ 1572 soft_mac_entry += entry_index; 1573 soft_mac_entry->index = entry_index; 1574 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1575 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1576 1577 return 0; 1578 } 1579 1580 /** 1581 * hns_dsaf_del_mac_entry - del mac mc-port 1582 * @dsaf_dev: dsa fabric device struct pointer 1583 * @vlan_id: vlian id 1584 * @in_port_num: input port num 1585 * @addr : mac addr 1586 */ 1587 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id, 1588 u8 in_port_num, u8 *addr) 1589 { 1590 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1591 struct dsaf_drv_tbl_tcam_key mac_key; 1592 struct dsaf_drv_priv *priv = 1593 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1594 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1595 1596 /*check mac addr */ 1597 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) { 1598 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n", 1599 addr); 1600 return -EINVAL; 1601 } 1602 1603 /*config key */ 1604 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr); 1605 1606 /*exist ?*/ 1607 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1608 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1609 /*not exist, error */ 1610 dev_err(dsaf_dev->dev, 1611 "del_mac_entry failed, %s Mac key(%#x:%#x)\n", 1612 dsaf_dev->ae_dev.name, 1613 mac_key.high.val, mac_key.low.val); 1614 return -EINVAL; 1615 } 1616 dev_dbg(dsaf_dev->dev, 1617 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1618 dsaf_dev->ae_dev.name, mac_key.high.val, 1619 mac_key.low.val, entry_index); 1620 1621 /*do del opt*/ 1622 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index); 1623 1624 /*del soft emtry */ 1625 soft_mac_entry += entry_index; 1626 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX; 1627 1628 return 0; 1629 } 1630 1631 /** 1632 * hns_dsaf_del_mac_mc_port - del mac mc- port 1633 * @dsaf_dev: dsa fabric device struct pointer 1634 * @mac_entry: mac entry 1635 */ 1636 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev, 1637 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1638 { 1639 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1640 struct dsaf_drv_tbl_tcam_key mac_key; 1641 struct dsaf_drv_priv *priv = 1642 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1643 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1644 u16 vlan_id; 1645 u8 in_port_num; 1646 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1647 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1648 int mskid; 1649 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0}; 1650 1651 if (!(void *)mac_entry) { 1652 dev_err(dsaf_dev->dev, 1653 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n"); 1654 return -EINVAL; 1655 } 1656 1657 /*get key info*/ 1658 vlan_id = mac_entry->in_vlan_id; 1659 in_port_num = mac_entry->in_port_num; 1660 1661 /*check mac addr */ 1662 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1663 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n", 1664 mac_entry->addr); 1665 return -EINVAL; 1666 } 1667 1668 /*config key */ 1669 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, 1670 mac_entry->addr); 1671 1672 /*check is exist? */ 1673 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1674 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1675 /*find none */ 1676 dev_err(dsaf_dev->dev, 1677 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n", 1678 dsaf_dev->ae_dev.name, 1679 mac_key.high.val, mac_key.low.val); 1680 return -EINVAL; 1681 } 1682 1683 dev_dbg(dsaf_dev->dev, 1684 "del_mac_mc_port, %s key(%#x:%#x) index%d\n", 1685 dsaf_dev->ae_dev.name, mac_key.high.val, 1686 mac_key.low.val, entry_index); 1687 1688 /*read entry*/ 1689 hns_dsaf_tcam_mc_get( 1690 dsaf_dev, entry_index, 1691 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1692 1693 /*del the port*/ 1694 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) { 1695 mskid = mac_entry->port_num; 1696 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) { 1697 mskid = mac_entry->port_num - 1698 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM; 1699 } else { 1700 dev_err(dsaf_dev->dev, 1701 "%s,pnum(%d)error,key(%#x:%#x)\n", 1702 dsaf_dev->ae_dev.name, mac_entry->port_num, 1703 mac_key.high.val, mac_key.low.val); 1704 return -EINVAL; 1705 } 1706 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0); 1707 1708 /*check non port, do del entry */ 1709 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk, 1710 sizeof(mac_data.tbl_mcast_port_msk))) { 1711 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index); 1712 1713 /* del soft entry */ 1714 soft_mac_entry += entry_index; 1715 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX; 1716 } else { /* not zer, just del port, updata*/ 1717 hns_dsaf_tcam_mc_cfg( 1718 dsaf_dev, entry_index, 1719 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1720 } 1721 1722 return 0; 1723 } 1724 1725 /** 1726 * hns_dsaf_get_mac_uc_entry - get mac uc entry 1727 * @dsaf_dev: dsa fabric device struct pointer 1728 * @mac_entry: mac entry 1729 */ 1730 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev, 1731 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1732 { 1733 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1734 struct dsaf_drv_tbl_tcam_key mac_key; 1735 1736 struct dsaf_tbl_tcam_ucast_cfg mac_data; 1737 1738 /* check macaddr */ 1739 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1740 MAC_IS_BROADCAST(mac_entry->addr)) { 1741 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n", 1742 mac_entry->addr); 1743 return -EINVAL; 1744 } 1745 1746 /*config key */ 1747 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1748 mac_entry->in_port_num, mac_entry->addr); 1749 1750 /*check exist? */ 1751 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1752 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1753 /*find none, error */ 1754 dev_err(dsaf_dev->dev, 1755 "get_uc_entry failed, %s Mac key(%#x:%#x)\n", 1756 dsaf_dev->ae_dev.name, 1757 mac_key.high.val, mac_key.low.val); 1758 return -EINVAL; 1759 } 1760 dev_dbg(dsaf_dev->dev, 1761 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1762 dsaf_dev->ae_dev.name, mac_key.high.val, 1763 mac_key.low.val, entry_index); 1764 1765 /*read entry*/ 1766 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index, 1767 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1768 mac_entry->port_num = mac_data.tbl_ucast_out_port; 1769 1770 return 0; 1771 } 1772 1773 /** 1774 * hns_dsaf_get_mac_mc_entry - get mac mc entry 1775 * @dsaf_dev: dsa fabric device struct pointer 1776 * @mac_entry: mac entry 1777 */ 1778 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev, 1779 struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1780 { 1781 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1782 struct dsaf_drv_tbl_tcam_key mac_key; 1783 1784 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1785 1786 /*check mac addr */ 1787 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1788 MAC_IS_BROADCAST(mac_entry->addr)) { 1789 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n", 1790 mac_entry->addr); 1791 return -EINVAL; 1792 } 1793 1794 /*config key */ 1795 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1796 mac_entry->in_port_num, mac_entry->addr); 1797 1798 /*check exist? */ 1799 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1800 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1801 /* find none, error */ 1802 dev_err(dsaf_dev->dev, 1803 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n", 1804 dsaf_dev->ae_dev.name, mac_key.high.val, 1805 mac_key.low.val); 1806 return -EINVAL; 1807 } 1808 dev_dbg(dsaf_dev->dev, 1809 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1810 dsaf_dev->ae_dev.name, mac_key.high.val, 1811 mac_key.low.val, entry_index); 1812 1813 /*read entry */ 1814 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index, 1815 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1816 1817 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F; 1818 return 0; 1819 } 1820 1821 /** 1822 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index 1823 * @dsaf_dev: dsa fabric device struct pointer 1824 * @entry_index: tab entry index 1825 * @mac_entry: mac entry 1826 */ 1827 int hns_dsaf_get_mac_entry_by_index( 1828 struct dsaf_device *dsaf_dev, 1829 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1830 { 1831 struct dsaf_drv_tbl_tcam_key mac_key; 1832 1833 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1834 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data; 1835 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0}; 1836 1837 if (entry_index >= DSAF_TCAM_SUM) { 1838 /* find none, del error */ 1839 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n", 1840 dsaf_dev->ae_dev.name); 1841 return -EINVAL; 1842 } 1843 1844 /* mc entry, do read opt */ 1845 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index, 1846 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1847 1848 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F; 1849 1850 /***get mac addr*/ 1851 mac_addr[0] = mac_key.high.bits.mac_0; 1852 mac_addr[1] = mac_key.high.bits.mac_1; 1853 mac_addr[2] = mac_key.high.bits.mac_2; 1854 mac_addr[3] = mac_key.high.bits.mac_3; 1855 mac_addr[4] = mac_key.low.bits.mac_4; 1856 mac_addr[5] = mac_key.low.bits.mac_5; 1857 /**is mc or uc*/ 1858 if (MAC_IS_MULTICAST((u8 *)mac_addr) || 1859 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) { 1860 /**mc donot do*/ 1861 } else { 1862 /*is not mc, just uc... */ 1863 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index, 1864 (struct dsaf_tbl_tcam_data *)&mac_key, 1865 &mac_uc_data); 1866 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port); 1867 } 1868 1869 return 0; 1870 } 1871 1872 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev, 1873 size_t sizeof_priv) 1874 { 1875 struct dsaf_device *dsaf_dev; 1876 1877 dsaf_dev = devm_kzalloc(dev, 1878 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL); 1879 if (unlikely(!dsaf_dev)) { 1880 dsaf_dev = ERR_PTR(-ENOMEM); 1881 } else { 1882 dsaf_dev->dev = dev; 1883 dev_set_drvdata(dev, dsaf_dev); 1884 } 1885 1886 return dsaf_dev; 1887 } 1888 1889 /** 1890 * hns_dsaf_free_dev - free dev mem 1891 * @dev: struct device pointer 1892 */ 1893 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev) 1894 { 1895 (void)dev_set_drvdata(dsaf_dev->dev, NULL); 1896 } 1897 1898 /** 1899 * dsaf_pfc_unit_cnt - set pfc unit count 1900 * @dsaf_id: dsa fabric id 1901 * @pport_rate: value array 1902 * @pdsaf_pfc_unit_cnt: value array 1903 */ 1904 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id, 1905 enum dsaf_port_rate_mode rate) 1906 { 1907 u32 unit_cnt; 1908 1909 switch (rate) { 1910 case DSAF_PORT_RATE_10000: 1911 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE; 1912 break; 1913 case DSAF_PORT_RATE_1000: 1914 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000; 1915 break; 1916 case DSAF_PORT_RATE_2500: 1917 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000; 1918 break; 1919 default: 1920 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE; 1921 } 1922 1923 dsaf_set_dev_field(dsaf_dev, 1924 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id), 1925 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S, 1926 unit_cnt); 1927 } 1928 1929 /** 1930 * dsaf_port_work_rate_cfg - fifo 1931 * @dsaf_id: dsa fabric id 1932 * @xge_ge_work_mode 1933 */ 1934 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id, 1935 enum dsaf_port_rate_mode rate_mode) 1936 { 1937 u32 port_work_mode; 1938 1939 port_work_mode = dsaf_read_dev( 1940 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id); 1941 1942 if (rate_mode == DSAF_PORT_RATE_10000) 1943 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1); 1944 else 1945 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0); 1946 1947 dsaf_write_dev(dsaf_dev, 1948 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id, 1949 port_work_mode); 1950 1951 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode); 1952 } 1953 1954 /** 1955 * hns_dsaf_fix_mac_mode - dsaf modify mac mode 1956 * @mac_cb: mac contrl block 1957 */ 1958 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb) 1959 { 1960 enum dsaf_port_rate_mode mode; 1961 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev; 1962 int mac_id = mac_cb->mac_id; 1963 1964 if (mac_cb->mac_type != HNAE_PORT_SERVICE) 1965 return; 1966 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII) 1967 mode = DSAF_PORT_RATE_10000; 1968 else 1969 mode = DSAF_PORT_RATE_1000; 1970 1971 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode); 1972 } 1973 1974 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num) 1975 { 1976 struct dsaf_hw_stats *hw_stats 1977 = &dsaf_dev->hw_stats[node_num]; 1978 1979 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev, 1980 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 1981 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev, 1982 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num); 1983 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev, 1984 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num); 1985 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev, 1986 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num); 1987 hw_stats->rx_pause_frame += dsaf_read_dev(dsaf_dev, 1988 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + 0x80 * (u64)node_num); 1989 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev, 1990 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num); 1991 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev, 1992 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num); 1993 hw_stats->crc_false += dsaf_read_dev(dsaf_dev, 1994 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num); 1995 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev, 1996 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 1997 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev, 1998 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 1999 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev, 2000 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num); 2001 2002 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev, 2003 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num); 2004 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev, 2005 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num); 2006 2007 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev, 2008 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num); 2009 } 2010 2011 /** 2012 *hns_dsaf_get_regs - dump dsaf regs 2013 *@dsaf_dev: dsaf device 2014 *@data:data for value of regs 2015 */ 2016 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data) 2017 { 2018 u32 i = 0; 2019 u32 j; 2020 u32 *p = data; 2021 2022 /* dsaf common registers */ 2023 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG); 2024 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG); 2025 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG); 2026 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG); 2027 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG); 2028 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG); 2029 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG); 2030 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG); 2031 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG); 2032 2033 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4); 2034 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4); 2035 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4); 2036 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4); 2037 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4); 2038 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4); 2039 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4); 2040 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4); 2041 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4); 2042 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4); 2043 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4); 2044 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4); 2045 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4); 2046 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4); 2047 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4); 2048 2049 for (i = 0; i < DSAF_SW_PORT_NUM; i++) 2050 p[24 + i] = dsaf_read_dev(ddev, 2051 DSAF_SW_PORT_TYPE_0_REG + i * 4); 2052 2053 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4); 2054 2055 for (i = 0; i < DSAF_SW_PORT_NUM; i++) 2056 p[33 + i] = dsaf_read_dev(ddev, 2057 DSAF_PORT_DEF_VLAN_0_REG + i * 4); 2058 2059 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++) 2060 p[41 + i] = dsaf_read_dev(ddev, 2061 DSAF_VM_DEF_VLAN_0_REG + i * 4); 2062 2063 /* dsaf inode registers */ 2064 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG); 2065 2066 p[171] = dsaf_read_dev(ddev, 2067 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80); 2068 2069 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) { 2070 j = i * DSAF_COMM_CHN + port; 2071 p[172 + i] = dsaf_read_dev(ddev, 2072 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80); 2073 p[175 + i] = dsaf_read_dev(ddev, 2074 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80); 2075 p[178 + i] = dsaf_read_dev(ddev, 2076 DSAF_INODE_BP_STATUS_0_REG + j * 0x80); 2077 p[181 + i] = dsaf_read_dev(ddev, 2078 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80); 2079 p[184 + i] = dsaf_read_dev(ddev, 2080 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80); 2081 p[187 + i] = dsaf_read_dev(ddev, 2082 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80); 2083 p[190 + i] = dsaf_read_dev(ddev, 2084 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80); 2085 p[193 + i] = dsaf_read_dev(ddev, 2086 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + j * 0x80); 2087 p[196 + i] = dsaf_read_dev(ddev, 2088 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80); 2089 p[199 + i] = dsaf_read_dev(ddev, 2090 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80); 2091 p[202 + i] = dsaf_read_dev(ddev, 2092 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80); 2093 p[205 + i] = dsaf_read_dev(ddev, 2094 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80); 2095 p[208 + i] = dsaf_read_dev(ddev, 2096 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80); 2097 p[211 + i] = dsaf_read_dev(ddev, 2098 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80); 2099 p[214 + i] = dsaf_read_dev(ddev, 2100 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80); 2101 p[217 + i] = dsaf_read_dev(ddev, 2102 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4); 2103 p[220 + i] = dsaf_read_dev(ddev, 2104 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4); 2105 p[223 + i] = dsaf_read_dev(ddev, 2106 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4); 2107 p[224 + i] = dsaf_read_dev(ddev, 2108 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4); 2109 } 2110 2111 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4); 2112 2113 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) { 2114 j = i * DSAF_COMM_CHN + port; 2115 p[228 + i] = dsaf_read_dev(ddev, 2116 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4); 2117 } 2118 2119 p[231] = dsaf_read_dev(ddev, 2120 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4); 2121 2122 /* dsaf inode registers */ 2123 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) { 2124 j = i * DSAF_COMM_CHN + port; 2125 p[232 + i] = dsaf_read_dev(ddev, 2126 DSAF_SBM_CFG_REG_0_REG + j * 0x80); 2127 p[235 + i] = dsaf_read_dev(ddev, 2128 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80); 2129 p[238 + i] = dsaf_read_dev(ddev, 2130 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80); 2131 p[241 + i] = dsaf_read_dev(ddev, 2132 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80); 2133 p[244 + i] = dsaf_read_dev(ddev, 2134 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80); 2135 p[245 + i] = dsaf_read_dev(ddev, 2136 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80); 2137 p[248 + i] = dsaf_read_dev(ddev, 2138 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80); 2139 p[251 + i] = dsaf_read_dev(ddev, 2140 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80); 2141 p[254 + i] = dsaf_read_dev(ddev, 2142 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80); 2143 p[257 + i] = dsaf_read_dev(ddev, 2144 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80); 2145 p[260 + i] = dsaf_read_dev(ddev, 2146 DSAF_SBM_INER_ST_0_REG + j * 0x80); 2147 p[263 + i] = dsaf_read_dev(ddev, 2148 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80); 2149 p[266 + i] = dsaf_read_dev(ddev, 2150 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80); 2151 p[269 + i] = dsaf_read_dev(ddev, 2152 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80); 2153 p[272 + i] = dsaf_read_dev(ddev, 2154 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80); 2155 p[275 + i] = dsaf_read_dev(ddev, 2156 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80); 2157 p[278 + i] = dsaf_read_dev(ddev, 2158 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80); 2159 p[281 + i] = dsaf_read_dev(ddev, 2160 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80); 2161 p[284 + i] = dsaf_read_dev(ddev, 2162 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80); 2163 p[287 + i] = dsaf_read_dev(ddev, 2164 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80); 2165 p[290 + i] = dsaf_read_dev(ddev, 2166 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80); 2167 p[293 + i] = dsaf_read_dev(ddev, 2168 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80); 2169 p[296 + i] = dsaf_read_dev(ddev, 2170 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80); 2171 p[299 + i] = dsaf_read_dev(ddev, 2172 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80); 2173 p[302 + i] = dsaf_read_dev(ddev, 2174 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80); 2175 p[305 + i] = dsaf_read_dev(ddev, 2176 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80); 2177 p[308 + i] = dsaf_read_dev(ddev, 2178 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80); 2179 } 2180 2181 /* dsaf onode registers */ 2182 for (i = 0; i < DSAF_XOD_NUM; i++) { 2183 p[311 + i] = dsaf_read_dev(ddev, 2184 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + j * 0x90); 2185 p[319 + i] = dsaf_read_dev(ddev, 2186 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + j * 0x90); 2187 p[327 + i] = dsaf_read_dev(ddev, 2188 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + j * 0x90); 2189 p[335 + i] = dsaf_read_dev(ddev, 2190 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + j * 0x90); 2191 p[343 + i] = dsaf_read_dev(ddev, 2192 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + j * 0x90); 2193 p[351 + i] = dsaf_read_dev(ddev, 2194 DSAF_XOD_ETS_TOKEN_CFG_0_REG + j * 0x90); 2195 } 2196 2197 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90); 2198 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90); 2199 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90); 2200 2201 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) { 2202 j = i * DSAF_COMM_CHN + port; 2203 p[362 + i] = dsaf_read_dev(ddev, 2204 DSAF_XOD_GNT_L_0_REG + j * 0x90); 2205 p[365 + i] = dsaf_read_dev(ddev, 2206 DSAF_XOD_GNT_H_0_REG + j * 0x90); 2207 p[368 + i] = dsaf_read_dev(ddev, 2208 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90); 2209 p[371 + i] = dsaf_read_dev(ddev, 2210 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90); 2211 p[374 + i] = dsaf_read_dev(ddev, 2212 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90); 2213 p[377 + i] = dsaf_read_dev(ddev, 2214 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90); 2215 p[380 + i] = dsaf_read_dev(ddev, 2216 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90); 2217 p[383 + i] = dsaf_read_dev(ddev, 2218 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90); 2219 p[386 + i] = dsaf_read_dev(ddev, 2220 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90); 2221 p[389 + i] = dsaf_read_dev(ddev, 2222 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90); 2223 } 2224 2225 p[392] = dsaf_read_dev(ddev, 2226 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90); 2227 p[393] = dsaf_read_dev(ddev, 2228 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90); 2229 p[394] = dsaf_read_dev(ddev, 2230 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90); 2231 p[395] = dsaf_read_dev(ddev, 2232 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90); 2233 p[396] = dsaf_read_dev(ddev, 2234 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90); 2235 p[397] = dsaf_read_dev(ddev, 2236 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90); 2237 p[398] = dsaf_read_dev(ddev, 2238 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90); 2239 p[399] = dsaf_read_dev(ddev, 2240 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90); 2241 p[400] = dsaf_read_dev(ddev, 2242 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90); 2243 p[401] = dsaf_read_dev(ddev, 2244 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90); 2245 p[402] = dsaf_read_dev(ddev, 2246 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90); 2247 p[403] = dsaf_read_dev(ddev, 2248 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90); 2249 p[404] = dsaf_read_dev(ddev, 2250 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90); 2251 2252 /* dsaf voq registers */ 2253 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) { 2254 j = (i * DSAF_COMM_CHN + port) * 0x90; 2255 p[405 + i] = dsaf_read_dev(ddev, 2256 DSAF_VOQ_ECC_INVERT_EN_0_REG + j); 2257 p[408 + i] = dsaf_read_dev(ddev, 2258 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j); 2259 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j); 2260 p[414 + i] = dsaf_read_dev(ddev, 2261 DSAF_VOQ_OUT_PKT_NUM_0_REG + j); 2262 p[417 + i] = dsaf_read_dev(ddev, 2263 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j); 2264 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j); 2265 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j); 2266 p[426 + i] = dsaf_read_dev(ddev, 2267 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j); 2268 p[429 + i] = dsaf_read_dev(ddev, 2269 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j); 2270 p[432 + i] = dsaf_read_dev(ddev, 2271 DSAF_VOQ_PPE_XOD_REQ_0_REG + j); 2272 p[435 + i] = dsaf_read_dev(ddev, 2273 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j); 2274 p[438 + i] = dsaf_read_dev(ddev, 2275 DSAF_VOQ_BP_ALL_THRD_0_REG + j); 2276 } 2277 2278 /* dsaf tbl registers */ 2279 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG); 2280 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG); 2281 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG); 2282 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG); 2283 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG); 2284 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG); 2285 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG); 2286 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG); 2287 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG); 2288 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG); 2289 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG); 2290 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG); 2291 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG); 2292 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG); 2293 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG); 2294 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 2295 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 2296 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 2297 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG); 2298 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG); 2299 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG); 2300 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 2301 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG); 2302 2303 for (i = 0; i < DSAF_SW_PORT_NUM; i++) { 2304 j = i * 0x8; 2305 p[464 + 2 * i] = dsaf_read_dev(ddev, 2306 DSAF_TBL_DA0_MIS_INFO1_0_REG + j); 2307 p[465 + 2 * i] = dsaf_read_dev(ddev, 2308 DSAF_TBL_DA0_MIS_INFO0_0_REG + j); 2309 } 2310 2311 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG); 2312 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG); 2313 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG); 2314 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG); 2315 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG); 2316 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG); 2317 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG); 2318 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG); 2319 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG); 2320 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG); 2321 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG); 2322 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG); 2323 2324 /* dsaf other registers */ 2325 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4); 2326 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4); 2327 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4); 2328 p[495] = dsaf_read_dev(ddev, 2329 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4); 2330 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4); 2331 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4); 2332 2333 /* mark end of dsaf regs */ 2334 for (i = 498; i < 504; i++) 2335 p[i] = 0xdddddddd; 2336 } 2337 2338 static char *hns_dsaf_get_node_stats_strings(char *data, int node) 2339 { 2340 char *buff = data; 2341 2342 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node); 2343 buff = buff + ETH_GSTRING_LEN; 2344 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node); 2345 buff = buff + ETH_GSTRING_LEN; 2346 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node); 2347 buff = buff + ETH_GSTRING_LEN; 2348 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node); 2349 buff = buff + ETH_GSTRING_LEN; 2350 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node); 2351 buff = buff + ETH_GSTRING_LEN; 2352 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node); 2353 buff = buff + ETH_GSTRING_LEN; 2354 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node); 2355 buff = buff + ETH_GSTRING_LEN; 2356 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node); 2357 buff = buff + ETH_GSTRING_LEN; 2358 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node); 2359 buff = buff + ETH_GSTRING_LEN; 2360 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node); 2361 buff = buff + ETH_GSTRING_LEN; 2362 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node); 2363 buff = buff + ETH_GSTRING_LEN; 2364 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node); 2365 buff = buff + ETH_GSTRING_LEN; 2366 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node); 2367 buff = buff + ETH_GSTRING_LEN; 2368 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node); 2369 buff = buff + ETH_GSTRING_LEN; 2370 2371 return buff; 2372 } 2373 2374 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data, 2375 int node_num) 2376 { 2377 u64 *p = data; 2378 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num]; 2379 2380 p[0] = hw_stats->pad_drop; 2381 p[1] = hw_stats->man_pkts; 2382 p[2] = hw_stats->rx_pkts; 2383 p[3] = hw_stats->rx_pkt_id; 2384 p[4] = hw_stats->rx_pause_frame; 2385 p[5] = hw_stats->release_buf_num; 2386 p[6] = hw_stats->sbm_drop; 2387 p[7] = hw_stats->crc_false; 2388 p[8] = hw_stats->bp_drop; 2389 p[9] = hw_stats->rslt_drop; 2390 p[10] = hw_stats->local_addr_false; 2391 p[11] = hw_stats->vlan_drop; 2392 p[12] = hw_stats->stp_drop; 2393 p[13] = hw_stats->tx_pkts; 2394 2395 return &p[14]; 2396 } 2397 2398 /** 2399 *hns_dsaf_get_stats - get dsaf statistic 2400 *@ddev: dsaf device 2401 *@data:statistic value 2402 *@port: port num 2403 */ 2404 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port) 2405 { 2406 u64 *p = data; 2407 int node_num = port; 2408 2409 /* for ge/xge node info */ 2410 p = hns_dsaf_get_node_stats(ddev, p, node_num); 2411 2412 /* for ppe node info */ 2413 node_num = port + DSAF_PPE_INODE_BASE; 2414 (void)hns_dsaf_get_node_stats(ddev, p, node_num); 2415 } 2416 2417 /** 2418 *hns_dsaf_get_sset_count - get dsaf string set count 2419 *@stringset: type of values in data 2420 *return dsaf string name count 2421 */ 2422 int hns_dsaf_get_sset_count(int stringset) 2423 { 2424 if (stringset == ETH_SS_STATS) 2425 return DSAF_STATIC_NUM; 2426 2427 return 0; 2428 } 2429 2430 /** 2431 *hns_dsaf_get_strings - get dsaf string set 2432 *@stringset:srting set index 2433 *@data:strings name value 2434 *@port:port index 2435 */ 2436 void hns_dsaf_get_strings(int stringset, u8 *data, int port) 2437 { 2438 char *buff = (char *)data; 2439 int node = port; 2440 2441 if (stringset != ETH_SS_STATS) 2442 return; 2443 2444 /* for ge/xge node info */ 2445 buff = hns_dsaf_get_node_stats_strings(buff, node); 2446 2447 /* for ppe node info */ 2448 node = port + DSAF_PPE_INODE_BASE; 2449 (void)hns_dsaf_get_node_stats_strings(buff, node); 2450 } 2451 2452 /** 2453 *hns_dsaf_get_sset_count - get dsaf regs count 2454 *return dsaf regs count 2455 */ 2456 int hns_dsaf_get_regs_count(void) 2457 { 2458 return DSAF_DUMP_REGS_NUM; 2459 } 2460 2461 /** 2462 * dsaf_probe - probo dsaf dev 2463 * @pdev: dasf platform device 2464 * retuen 0 - success , negative --fail 2465 */ 2466 static int hns_dsaf_probe(struct platform_device *pdev) 2467 { 2468 struct dsaf_device *dsaf_dev; 2469 int ret; 2470 2471 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv)); 2472 if (IS_ERR(dsaf_dev)) { 2473 ret = PTR_ERR(dsaf_dev); 2474 dev_err(&pdev->dev, 2475 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret); 2476 return ret; 2477 } 2478 2479 ret = hns_dsaf_get_cfg(dsaf_dev); 2480 if (ret) 2481 goto free_dev; 2482 2483 ret = hns_dsaf_init(dsaf_dev); 2484 if (ret) 2485 goto free_cfg; 2486 2487 ret = hns_mac_init(dsaf_dev); 2488 if (ret) 2489 goto uninit_dsaf; 2490 2491 ret = hns_ppe_init(dsaf_dev); 2492 if (ret) 2493 goto uninit_mac; 2494 2495 ret = hns_dsaf_ae_init(dsaf_dev); 2496 if (ret) 2497 goto uninit_ppe; 2498 2499 return 0; 2500 2501 uninit_ppe: 2502 hns_ppe_uninit(dsaf_dev); 2503 2504 uninit_mac: 2505 hns_mac_uninit(dsaf_dev); 2506 2507 uninit_dsaf: 2508 hns_dsaf_free(dsaf_dev); 2509 2510 free_cfg: 2511 hns_dsaf_free_cfg(dsaf_dev); 2512 2513 free_dev: 2514 hns_dsaf_free_dev(dsaf_dev); 2515 2516 return ret; 2517 } 2518 2519 /** 2520 * dsaf_remove - remove dsaf dev 2521 * @pdev: dasf platform device 2522 */ 2523 static int hns_dsaf_remove(struct platform_device *pdev) 2524 { 2525 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev); 2526 2527 hns_dsaf_ae_uninit(dsaf_dev); 2528 2529 hns_ppe_uninit(dsaf_dev); 2530 2531 hns_mac_uninit(dsaf_dev); 2532 2533 hns_dsaf_free(dsaf_dev); 2534 2535 hns_dsaf_free_cfg(dsaf_dev); 2536 2537 hns_dsaf_free_dev(dsaf_dev); 2538 2539 return 0; 2540 } 2541 2542 static const struct of_device_id g_dsaf_match[] = { 2543 {.compatible = "hisilicon,hns-dsaf-v1"}, 2544 {.compatible = "hisilicon,hns-dsaf-v2"}, 2545 {} 2546 }; 2547 2548 static struct platform_driver g_dsaf_driver = { 2549 .probe = hns_dsaf_probe, 2550 .remove = hns_dsaf_remove, 2551 .driver = { 2552 .name = DSAF_DRV_NAME, 2553 .of_match_table = g_dsaf_match, 2554 }, 2555 }; 2556 2557 module_platform_driver(g_dsaf_driver); 2558 2559 MODULE_LICENSE("GPL"); 2560 MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 2561 MODULE_DESCRIPTION("HNS DSAF driver"); 2562 MODULE_VERSION(DSAF_MOD_VERSION); 2563