1 /* 2 * Copyright (c) 2014-2015 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/device.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/netdevice.h> 17 #include <linux/mfd/syscon.h> 18 #include <linux/of.h> 19 #include <linux/of_address.h> 20 #include <linux/of_irq.h> 21 #include <linux/platform_device.h> 22 #include <linux/vmalloc.h> 23 24 #include "hns_dsaf_mac.h" 25 #include "hns_dsaf_main.h" 26 #include "hns_dsaf_ppe.h" 27 #include "hns_dsaf_rcb.h" 28 #include "hns_dsaf_misc.h" 29 30 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = { 31 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf", 32 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss", 33 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf", 34 [DSAF_MODE_DISABLE_SP] = "single-port", 35 }; 36 37 static const struct acpi_device_id hns_dsaf_acpi_match[] = { 38 { "HISI00B1", 0 }, 39 { "HISI00B2", 0 }, 40 { }, 41 }; 42 MODULE_DEVICE_TABLE(acpi, hns_dsaf_acpi_match); 43 44 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev) 45 { 46 int ret, i; 47 u32 desc_num; 48 u32 buf_size; 49 u32 reset_offset = 0; 50 u32 res_idx = 0; 51 const char *mode_str; 52 struct regmap *syscon; 53 struct resource *res; 54 struct device_node *np = dsaf_dev->dev->of_node; 55 struct platform_device *pdev = to_platform_device(dsaf_dev->dev); 56 57 if (dev_of_node(dsaf_dev->dev)) { 58 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1")) 59 dsaf_dev->dsaf_ver = AE_VERSION_1; 60 else 61 dsaf_dev->dsaf_ver = AE_VERSION_2; 62 } else if (is_acpi_node(dsaf_dev->dev->fwnode)) { 63 if (acpi_dev_found(hns_dsaf_acpi_match[0].id)) 64 dsaf_dev->dsaf_ver = AE_VERSION_1; 65 else if (acpi_dev_found(hns_dsaf_acpi_match[1].id)) 66 dsaf_dev->dsaf_ver = AE_VERSION_2; 67 else 68 return -ENXIO; 69 } else { 70 dev_err(dsaf_dev->dev, "cannot get cfg data from of or acpi\n"); 71 return -ENXIO; 72 } 73 74 ret = device_property_read_string(dsaf_dev->dev, "mode", &mode_str); 75 if (ret) { 76 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret); 77 return ret; 78 } 79 for (i = 0; i < DSAF_MODE_MAX; i++) { 80 if (g_dsaf_mode_match[i] && 81 !strcmp(mode_str, g_dsaf_mode_match[i])) 82 break; 83 } 84 if (i >= DSAF_MODE_MAX || 85 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) { 86 dev_err(dsaf_dev->dev, 87 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name); 88 return -EINVAL; 89 } 90 dsaf_dev->dsaf_mode = (enum dsaf_mode)i; 91 92 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE) 93 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE; 94 else 95 dsaf_dev->dsaf_en = HRD_DSAF_MODE; 96 97 if ((i == DSAF_MODE_ENABLE_16VM) || 98 (i == DSAF_MODE_DISABLE_2PORT_8VM) || 99 (i == DSAF_MODE_DISABLE_6PORT_2VM)) 100 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE; 101 else 102 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE; 103 104 if (dev_of_node(dsaf_dev->dev)) { 105 syscon = syscon_node_to_regmap( 106 of_parse_phandle(np, "subctrl-syscon", 0)); 107 if (IS_ERR_OR_NULL(syscon)) { 108 res = platform_get_resource(pdev, IORESOURCE_MEM, 109 res_idx++); 110 if (!res) { 111 dev_err(dsaf_dev->dev, "subctrl info is needed!\n"); 112 return -ENOMEM; 113 } 114 115 dsaf_dev->sc_base = devm_ioremap_resource(&pdev->dev, 116 res); 117 if (IS_ERR(dsaf_dev->sc_base)) { 118 dev_err(dsaf_dev->dev, "subctrl can not map!\n"); 119 return PTR_ERR(dsaf_dev->sc_base); 120 } 121 122 res = platform_get_resource(pdev, IORESOURCE_MEM, 123 res_idx++); 124 if (!res) { 125 dev_err(dsaf_dev->dev, "serdes-ctrl info is needed!\n"); 126 return -ENOMEM; 127 } 128 129 dsaf_dev->sds_base = devm_ioremap_resource(&pdev->dev, 130 res); 131 if (IS_ERR(dsaf_dev->sds_base)) { 132 dev_err(dsaf_dev->dev, "serdes-ctrl can not map!\n"); 133 return PTR_ERR(dsaf_dev->sds_base); 134 } 135 } else { 136 dsaf_dev->sub_ctrl = syscon; 137 } 138 } 139 140 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ppe-base"); 141 if (!res) { 142 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++); 143 if (!res) { 144 dev_err(dsaf_dev->dev, "ppe-base info is needed!\n"); 145 return -ENOMEM; 146 } 147 } 148 dsaf_dev->ppe_base = devm_ioremap_resource(&pdev->dev, res); 149 if (IS_ERR(dsaf_dev->ppe_base)) { 150 dev_err(dsaf_dev->dev, "ppe-base resource can not map!\n"); 151 return PTR_ERR(dsaf_dev->ppe_base); 152 } 153 dsaf_dev->ppe_paddr = res->start; 154 155 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) { 156 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 157 "dsaf-base"); 158 if (!res) { 159 res = platform_get_resource(pdev, IORESOURCE_MEM, 160 res_idx); 161 if (!res) { 162 dev_err(dsaf_dev->dev, 163 "dsaf-base info is needed!\n"); 164 return -ENOMEM; 165 } 166 } 167 dsaf_dev->io_base = devm_ioremap_resource(&pdev->dev, res); 168 if (IS_ERR(dsaf_dev->io_base)) { 169 dev_err(dsaf_dev->dev, "dsaf-base resource can not map!\n"); 170 return PTR_ERR(dsaf_dev->io_base); 171 } 172 } 173 174 ret = device_property_read_u32(dsaf_dev->dev, "desc-num", &desc_num); 175 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT || 176 desc_num > HNS_DSAF_MAX_DESC_CNT) { 177 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n", 178 desc_num, ret); 179 return -EINVAL; 180 } 181 dsaf_dev->desc_num = desc_num; 182 183 ret = device_property_read_u32(dsaf_dev->dev, "reset-field-offset", 184 &reset_offset); 185 if (ret < 0) { 186 dev_dbg(dsaf_dev->dev, 187 "get reset-field-offset fail, ret=%d!\r\n", ret); 188 } 189 dsaf_dev->reset_offset = reset_offset; 190 191 ret = device_property_read_u32(dsaf_dev->dev, "buf-size", &buf_size); 192 if (ret < 0) { 193 dev_err(dsaf_dev->dev, 194 "get buf-size fail, ret=%d!\r\n", ret); 195 return ret; 196 } 197 dsaf_dev->buf_size = buf_size; 198 199 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size); 200 if (dsaf_dev->buf_size_type < 0) { 201 dev_err(dsaf_dev->dev, 202 "buf_size(%d) is wrong!\n", buf_size); 203 return -EINVAL; 204 } 205 206 dsaf_dev->misc_op = hns_misc_op_get(dsaf_dev); 207 if (!dsaf_dev->misc_op) 208 return -ENOMEM; 209 210 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL))) 211 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n"); 212 else 213 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n"); 214 215 return 0; 216 } 217 218 /** 219 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en 220 * @dsaf_id: dsa fabric id 221 */ 222 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev) 223 { 224 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1); 225 } 226 227 /** 228 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce 229 * @dsaf_id: dsa fabric id 230 * @hns_dsaf_reg_cnt_clr_ce: config value 231 */ 232 static void 233 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce) 234 { 235 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG, 236 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce); 237 } 238 239 /** 240 * hns_ppe_qid_cfg - config ppe qid 241 * @dsaf_id: dsa fabric id 242 * @pppe_qid_cfg: value array 243 */ 244 static void 245 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg) 246 { 247 u32 i; 248 249 for (i = 0; i < DSAF_COMM_CHN; i++) { 250 dsaf_set_dev_field(dsaf_dev, 251 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i, 252 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S, 253 qid_cfg); 254 } 255 } 256 257 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev) 258 { 259 u16 max_q_per_vf, max_vfn; 260 u32 q_id, q_num_per_port; 261 u32 i; 262 263 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf); 264 q_num_per_port = max_vfn * max_q_per_vf; 265 266 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) { 267 dsaf_set_dev_field(dsaf_dev, 268 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i, 269 0xff, 0, q_id); 270 q_id += q_num_per_port; 271 } 272 } 273 274 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev) 275 { 276 u16 max_q_per_vf, max_vfn; 277 u32 q_id, q_num_per_port; 278 u32 mac_id; 279 280 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) 281 return; 282 283 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf); 284 q_num_per_port = max_vfn * max_q_per_vf; 285 286 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) { 287 dsaf_set_dev_field(dsaf_dev, 288 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id, 289 DSAFV2_SERDES_LBK_QID_M, 290 DSAFV2_SERDES_LBK_QID_S, 291 q_id); 292 q_id += q_num_per_port; 293 } 294 } 295 296 /** 297 * hns_dsaf_sw_port_type_cfg - cfg sw type 298 * @dsaf_id: dsa fabric id 299 * @psw_port_type: array 300 */ 301 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev, 302 enum dsaf_sw_port_type port_type) 303 { 304 u32 i; 305 306 for (i = 0; i < DSAF_SW_PORT_NUM; i++) { 307 dsaf_set_dev_field(dsaf_dev, 308 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i, 309 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S, 310 port_type); 311 } 312 } 313 314 /** 315 * hns_dsaf_stp_port_type_cfg - cfg stp type 316 * @dsaf_id: dsa fabric id 317 * @pstp_port_type: array 318 */ 319 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev, 320 enum dsaf_stp_port_type port_type) 321 { 322 u32 i; 323 324 for (i = 0; i < DSAF_COMM_CHN; i++) { 325 dsaf_set_dev_field(dsaf_dev, 326 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i, 327 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S, 328 port_type); 329 } 330 } 331 332 #define HNS_DSAF_SBM_NUM(dev) \ 333 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM) 334 /** 335 * hns_dsaf_sbm_cfg - config sbm 336 * @dsaf_id: dsa fabric id 337 */ 338 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev) 339 { 340 u32 o_sbm_cfg; 341 u32 i; 342 343 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 344 o_sbm_cfg = dsaf_read_dev(dsaf_dev, 345 DSAF_SBM_CFG_REG_0_REG + 0x80 * i); 346 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1); 347 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0); 348 dsaf_write_dev(dsaf_dev, 349 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg); 350 } 351 } 352 353 /** 354 * hns_dsaf_sbm_cfg_mib_en - config sbm 355 * @dsaf_id: dsa fabric id 356 */ 357 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev) 358 { 359 u32 sbm_cfg_mib_en; 360 u32 i; 361 u32 reg; 362 u32 read_cnt; 363 364 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */ 365 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 366 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 367 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0); 368 } 369 370 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 371 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 372 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1); 373 } 374 375 /* waitint for all sbm enable finished */ 376 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 377 read_cnt = 0; 378 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 379 do { 380 udelay(1); 381 sbm_cfg_mib_en = dsaf_get_dev_bit( 382 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S); 383 read_cnt++; 384 } while (sbm_cfg_mib_en == 0 && 385 read_cnt < DSAF_CFG_READ_CNT); 386 387 if (sbm_cfg_mib_en == 0) { 388 dev_err(dsaf_dev->dev, 389 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n", 390 dsaf_dev->ae_dev.name, i); 391 return -ENODEV; 392 } 393 } 394 395 return 0; 396 } 397 398 /** 399 * hns_dsaf_sbm_bp_wl_cfg - config sbm 400 * @dsaf_id: dsa fabric id 401 */ 402 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev) 403 { 404 u32 o_sbm_bp_cfg; 405 u32 reg; 406 u32 i; 407 408 /* XGE */ 409 for (i = 0; i < DSAF_XGE_NUM; i++) { 410 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i; 411 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 412 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M, 413 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512); 414 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M, 415 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0); 416 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M, 417 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0); 418 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 419 420 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i; 421 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 422 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M, 423 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0); 424 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M, 425 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0); 426 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 427 428 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i; 429 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 430 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 431 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104); 432 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 433 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128); 434 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 435 436 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i; 437 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 438 dsaf_set_field(o_sbm_bp_cfg, 439 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 440 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110); 441 dsaf_set_field(o_sbm_bp_cfg, 442 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 443 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160); 444 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 445 446 /* for no enable pfc mode */ 447 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i; 448 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 449 dsaf_set_field(o_sbm_bp_cfg, 450 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 451 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128); 452 dsaf_set_field(o_sbm_bp_cfg, 453 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 454 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192); 455 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 456 } 457 458 /* PPE */ 459 for (i = 0; i < DSAF_COMM_CHN; i++) { 460 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i; 461 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 462 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 463 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10); 464 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 465 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12); 466 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 467 } 468 469 /* RoCEE */ 470 for (i = 0; i < DSAF_COMM_CHN; i++) { 471 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i; 472 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 473 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 474 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2); 475 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 476 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4); 477 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 478 } 479 } 480 481 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev) 482 { 483 u32 o_sbm_bp_cfg; 484 u32 reg; 485 u32 i; 486 487 /* XGE */ 488 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) { 489 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i; 490 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 491 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M, 492 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256); 493 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M, 494 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0); 495 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M, 496 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0); 497 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 498 499 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i; 500 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 501 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M, 502 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0); 503 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M, 504 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0); 505 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 506 507 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i; 508 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 509 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M, 510 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104); 511 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M, 512 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128); 513 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 514 515 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i; 516 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 517 dsaf_set_field(o_sbm_bp_cfg, 518 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 519 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 48); 520 dsaf_set_field(o_sbm_bp_cfg, 521 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 522 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 80); 523 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 524 525 /* for no enable pfc mode */ 526 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i; 527 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 528 dsaf_set_field(o_sbm_bp_cfg, 529 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M, 530 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 192); 531 dsaf_set_field(o_sbm_bp_cfg, 532 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M, 533 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 240); 534 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 535 } 536 537 /* PPE */ 538 for (i = 0; i < DSAFV2_SBM_PPE_CHN; i++) { 539 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i; 540 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 541 dsaf_set_field(o_sbm_bp_cfg, 542 DSAFV2_SBM_CFG2_PPE_SET_BUF_NUM_M, 543 DSAFV2_SBM_CFG2_PPE_SET_BUF_NUM_S, 2); 544 dsaf_set_field(o_sbm_bp_cfg, 545 DSAFV2_SBM_CFG2_PPE_RESET_BUF_NUM_M, 546 DSAFV2_SBM_CFG2_PPE_RESET_BUF_NUM_S, 3); 547 dsaf_set_field(o_sbm_bp_cfg, 548 DSAFV2_SBM_CFG2_PPE_CFG_USEFUL_NUM_M, 549 DSAFV2_SBM_CFG2_PPE_CFG_USEFUL_NUM_S, 52); 550 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 551 } 552 553 /* RoCEE */ 554 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) { 555 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i; 556 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 557 dsaf_set_field(o_sbm_bp_cfg, 558 DSAFV2_SBM_CFG2_ROCEE_SET_BUF_NUM_M, 559 DSAFV2_SBM_CFG2_ROCEE_SET_BUF_NUM_S, 2); 560 dsaf_set_field(o_sbm_bp_cfg, 561 DSAFV2_SBM_CFG2_ROCEE_RESET_BUF_NUM_M, 562 DSAFV2_SBM_CFG2_ROCEE_RESET_BUF_NUM_S, 4); 563 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 564 } 565 } 566 567 /** 568 * hns_dsaf_voq_bp_all_thrd_cfg - voq 569 * @dsaf_id: dsa fabric id 570 */ 571 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev) 572 { 573 u32 voq_bp_all_thrd; 574 u32 i; 575 576 for (i = 0; i < DSAF_VOQ_NUM; i++) { 577 voq_bp_all_thrd = dsaf_read_dev( 578 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i); 579 if (i < DSAF_XGE_NUM) { 580 dsaf_set_field(voq_bp_all_thrd, 581 DSAF_VOQ_BP_ALL_DOWNTHRD_M, 582 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930); 583 dsaf_set_field(voq_bp_all_thrd, 584 DSAF_VOQ_BP_ALL_UPTHRD_M, 585 DSAF_VOQ_BP_ALL_UPTHRD_S, 950); 586 } else { 587 dsaf_set_field(voq_bp_all_thrd, 588 DSAF_VOQ_BP_ALL_DOWNTHRD_M, 589 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220); 590 dsaf_set_field(voq_bp_all_thrd, 591 DSAF_VOQ_BP_ALL_UPTHRD_M, 592 DSAF_VOQ_BP_ALL_UPTHRD_S, 230); 593 } 594 dsaf_write_dev( 595 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i, 596 voq_bp_all_thrd); 597 } 598 } 599 600 /** 601 * hns_dsaf_tbl_tcam_data_cfg - tbl 602 * @dsaf_id: dsa fabric id 603 * @ptbl_tcam_data: addr 604 */ 605 static void hns_dsaf_tbl_tcam_data_cfg( 606 struct dsaf_device *dsaf_dev, 607 struct dsaf_tbl_tcam_data *ptbl_tcam_data) 608 { 609 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG, 610 ptbl_tcam_data->tbl_tcam_data_low); 611 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG, 612 ptbl_tcam_data->tbl_tcam_data_high); 613 } 614 615 /** 616 * dsaf_tbl_tcam_mcast_cfg - tbl 617 * @dsaf_id: dsa fabric id 618 * @ptbl_tcam_mcast: addr 619 */ 620 static void hns_dsaf_tbl_tcam_mcast_cfg( 621 struct dsaf_device *dsaf_dev, 622 struct dsaf_tbl_tcam_mcast_cfg *mcast) 623 { 624 u32 mcast_cfg4; 625 626 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG); 627 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S, 628 mcast->tbl_mcast_item_vld); 629 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S, 630 mcast->tbl_mcast_old_en); 631 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M, 632 DSAF_TBL_MCAST_CFG4_VM128_112_S, 633 mcast->tbl_mcast_port_msk[4]); 634 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4); 635 636 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 637 mcast->tbl_mcast_port_msk[3]); 638 639 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 640 mcast->tbl_mcast_port_msk[2]); 641 642 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 643 mcast->tbl_mcast_port_msk[1]); 644 645 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 646 mcast->tbl_mcast_port_msk[0]); 647 } 648 649 /** 650 * hns_dsaf_tbl_tcam_ucast_cfg - tbl 651 * @dsaf_id: dsa fabric id 652 * @ptbl_tcam_ucast: addr 653 */ 654 static void hns_dsaf_tbl_tcam_ucast_cfg( 655 struct dsaf_device *dsaf_dev, 656 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast) 657 { 658 u32 ucast_cfg1; 659 660 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG); 661 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S, 662 tbl_tcam_ucast->tbl_ucast_mac_discard); 663 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S, 664 tbl_tcam_ucast->tbl_ucast_item_vld); 665 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S, 666 tbl_tcam_ucast->tbl_ucast_old_en); 667 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S, 668 tbl_tcam_ucast->tbl_ucast_dvc); 669 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M, 670 DSAF_TBL_UCAST_CFG1_OUT_PORT_S, 671 tbl_tcam_ucast->tbl_ucast_out_port); 672 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1); 673 } 674 675 /** 676 * hns_dsaf_tbl_line_cfg - tbl 677 * @dsaf_id: dsa fabric id 678 * @ptbl_lin: addr 679 */ 680 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev, 681 struct dsaf_tbl_line_cfg *tbl_lin) 682 { 683 u32 tbl_line; 684 685 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG); 686 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S, 687 tbl_lin->tbl_line_mac_discard); 688 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S, 689 tbl_lin->tbl_line_dvc); 690 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M, 691 DSAF_TBL_LINE_CFG_OUT_PORT_S, 692 tbl_lin->tbl_line_out_port); 693 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line); 694 } 695 696 /** 697 * hns_dsaf_tbl_tcam_mcast_pul - tbl 698 * @dsaf_id: dsa fabric id 699 */ 700 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev) 701 { 702 u32 o_tbl_pul; 703 704 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 705 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1); 706 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 707 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0); 708 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 709 } 710 711 /** 712 * hns_dsaf_tbl_line_pul - tbl 713 * @dsaf_id: dsa fabric id 714 */ 715 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev) 716 { 717 u32 tbl_pul; 718 719 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 720 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1); 721 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul); 722 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0); 723 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul); 724 } 725 726 /** 727 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl 728 * @dsaf_id: dsa fabric id 729 */ 730 static void hns_dsaf_tbl_tcam_data_mcast_pul( 731 struct dsaf_device *dsaf_dev) 732 { 733 u32 o_tbl_pul; 734 735 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 736 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1); 737 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1); 738 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 739 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0); 740 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0); 741 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 742 } 743 744 /** 745 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl 746 * @dsaf_id: dsa fabric id 747 */ 748 static void hns_dsaf_tbl_tcam_data_ucast_pul( 749 struct dsaf_device *dsaf_dev) 750 { 751 u32 o_tbl_pul; 752 753 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 754 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1); 755 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1); 756 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 757 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0); 758 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0); 759 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 760 } 761 762 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en) 763 { 764 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) 765 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, 766 DSAF_CFG_MIX_MODE_S, !!en); 767 } 768 769 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en) 770 { 771 if (AE_IS_VER1(dsaf_dev->dsaf_ver) || 772 dsaf_dev->mac_cb[mac_id]->mac_type == HNAE_PORT_DEBUG) 773 return; 774 775 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id, 776 DSAFV2_SERDES_LBK_EN_B, !!en); 777 } 778 779 /** 780 * hns_dsaf_tbl_stat_en - tbl 781 * @dsaf_id: dsa fabric id 782 * @ptbl_stat_en: addr 783 */ 784 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev) 785 { 786 u32 o_tbl_ctrl; 787 788 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG); 789 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1); 790 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1); 791 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1); 792 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1); 793 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl); 794 } 795 796 /** 797 * hns_dsaf_rocee_bp_en - rocee back press enable 798 * @dsaf_id: dsa fabric id 799 */ 800 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev) 801 { 802 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) 803 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG, 804 DSAF_FC_XGE_TX_PAUSE_S, 1); 805 } 806 807 /* set msk for dsaf exception irq*/ 808 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev, 809 u32 chnn_num, u32 mask_set) 810 { 811 dsaf_write_dev(dsaf_dev, 812 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set); 813 } 814 815 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev, 816 u32 chnn_num, u32 msk_set) 817 { 818 dsaf_write_dev(dsaf_dev, 819 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set); 820 } 821 822 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev, 823 u32 chnn, u32 msk_set) 824 { 825 dsaf_write_dev(dsaf_dev, 826 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set); 827 } 828 829 static void 830 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set) 831 { 832 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set); 833 } 834 835 /* clr dsaf exception irq*/ 836 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev, 837 u32 chnn_num, u32 int_src) 838 { 839 dsaf_write_dev(dsaf_dev, 840 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src); 841 } 842 843 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev, 844 u32 chnn, u32 int_src) 845 { 846 dsaf_write_dev(dsaf_dev, 847 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src); 848 } 849 850 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev, 851 u32 chnn, u32 int_src) 852 { 853 dsaf_write_dev(dsaf_dev, 854 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src); 855 } 856 857 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev, 858 u32 int_src) 859 { 860 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src); 861 } 862 863 /** 864 * hns_dsaf_single_line_tbl_cfg - INT 865 * @dsaf_id: dsa fabric id 866 * @address: 867 * @ptbl_line: 868 */ 869 static void hns_dsaf_single_line_tbl_cfg( 870 struct dsaf_device *dsaf_dev, 871 u32 address, struct dsaf_tbl_line_cfg *ptbl_line) 872 { 873 spin_lock_bh(&dsaf_dev->tcam_lock); 874 875 /*Write Addr*/ 876 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address); 877 878 /*Write Line*/ 879 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line); 880 881 /*Write Plus*/ 882 hns_dsaf_tbl_line_pul(dsaf_dev); 883 884 spin_unlock_bh(&dsaf_dev->tcam_lock); 885 } 886 887 /** 888 * hns_dsaf_tcam_uc_cfg - INT 889 * @dsaf_id: dsa fabric id 890 * @address, 891 * @ptbl_tcam_data, 892 */ 893 static void hns_dsaf_tcam_uc_cfg( 894 struct dsaf_device *dsaf_dev, u32 address, 895 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 896 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast) 897 { 898 spin_lock_bh(&dsaf_dev->tcam_lock); 899 900 /*Write Addr*/ 901 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 902 /*Write Tcam Data*/ 903 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data); 904 /*Write Tcam Ucast*/ 905 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast); 906 /*Write Plus*/ 907 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev); 908 909 spin_unlock_bh(&dsaf_dev->tcam_lock); 910 } 911 912 /** 913 * hns_dsaf_tcam_mc_cfg - INT 914 * @dsaf_id: dsa fabric id 915 * @address, 916 * @ptbl_tcam_data, 917 * @ptbl_tcam_mcast, 918 */ 919 static void hns_dsaf_tcam_mc_cfg( 920 struct dsaf_device *dsaf_dev, u32 address, 921 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 922 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast) 923 { 924 spin_lock_bh(&dsaf_dev->tcam_lock); 925 926 /*Write Addr*/ 927 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 928 /*Write Tcam Data*/ 929 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data); 930 /*Write Tcam Mcast*/ 931 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast); 932 /*Write Plus*/ 933 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev); 934 935 spin_unlock_bh(&dsaf_dev->tcam_lock); 936 } 937 938 /** 939 * hns_dsaf_tcam_mc_invld - INT 940 * @dsaf_id: dsa fabric id 941 * @address 942 */ 943 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address) 944 { 945 spin_lock_bh(&dsaf_dev->tcam_lock); 946 947 /*Write Addr*/ 948 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 949 950 /*write tcam mcast*/ 951 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0); 952 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0); 953 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0); 954 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0); 955 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0); 956 957 /*Write Plus*/ 958 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev); 959 960 spin_unlock_bh(&dsaf_dev->tcam_lock); 961 } 962 963 /** 964 * hns_dsaf_tcam_uc_get - INT 965 * @dsaf_id: dsa fabric id 966 * @address 967 * @ptbl_tcam_data 968 * @ptbl_tcam_ucast 969 */ 970 static void hns_dsaf_tcam_uc_get( 971 struct dsaf_device *dsaf_dev, u32 address, 972 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 973 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast) 974 { 975 u32 tcam_read_data0; 976 u32 tcam_read_data4; 977 978 spin_lock_bh(&dsaf_dev->tcam_lock); 979 980 /*Write Addr*/ 981 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 982 983 /*read tcam item puls*/ 984 hns_dsaf_tbl_tcam_load_pul(dsaf_dev); 985 986 /*read tcam data*/ 987 ptbl_tcam_data->tbl_tcam_data_high 988 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 989 ptbl_tcam_data->tbl_tcam_data_low 990 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 991 992 /*read tcam mcast*/ 993 tcam_read_data0 = dsaf_read_dev(dsaf_dev, 994 DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 995 tcam_read_data4 = dsaf_read_dev(dsaf_dev, 996 DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 997 998 ptbl_tcam_ucast->tbl_ucast_item_vld 999 = dsaf_get_bit(tcam_read_data4, 1000 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S); 1001 ptbl_tcam_ucast->tbl_ucast_old_en 1002 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S); 1003 ptbl_tcam_ucast->tbl_ucast_mac_discard 1004 = dsaf_get_bit(tcam_read_data0, 1005 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S); 1006 ptbl_tcam_ucast->tbl_ucast_out_port 1007 = dsaf_get_field(tcam_read_data0, 1008 DSAF_TBL_UCAST_CFG1_OUT_PORT_M, 1009 DSAF_TBL_UCAST_CFG1_OUT_PORT_S); 1010 ptbl_tcam_ucast->tbl_ucast_dvc 1011 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S); 1012 1013 spin_unlock_bh(&dsaf_dev->tcam_lock); 1014 } 1015 1016 /** 1017 * hns_dsaf_tcam_mc_get - INT 1018 * @dsaf_id: dsa fabric id 1019 * @address 1020 * @ptbl_tcam_data 1021 * @ptbl_tcam_ucast 1022 */ 1023 static void hns_dsaf_tcam_mc_get( 1024 struct dsaf_device *dsaf_dev, u32 address, 1025 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 1026 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast) 1027 { 1028 u32 data_tmp; 1029 1030 spin_lock_bh(&dsaf_dev->tcam_lock); 1031 1032 /*Write Addr*/ 1033 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 1034 1035 /*read tcam item puls*/ 1036 hns_dsaf_tbl_tcam_load_pul(dsaf_dev); 1037 1038 /*read tcam data*/ 1039 ptbl_tcam_data->tbl_tcam_data_high = 1040 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 1041 ptbl_tcam_data->tbl_tcam_data_low = 1042 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 1043 1044 /*read tcam mcast*/ 1045 ptbl_tcam_mcast->tbl_mcast_port_msk[0] = 1046 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 1047 ptbl_tcam_mcast->tbl_mcast_port_msk[1] = 1048 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG); 1049 ptbl_tcam_mcast->tbl_mcast_port_msk[2] = 1050 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG); 1051 ptbl_tcam_mcast->tbl_mcast_port_msk[3] = 1052 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG); 1053 1054 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 1055 ptbl_tcam_mcast->tbl_mcast_item_vld = 1056 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S); 1057 ptbl_tcam_mcast->tbl_mcast_old_en = 1058 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S); 1059 ptbl_tcam_mcast->tbl_mcast_port_msk[4] = 1060 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M, 1061 DSAF_TBL_MCAST_CFG4_VM128_112_S); 1062 1063 spin_unlock_bh(&dsaf_dev->tcam_lock); 1064 } 1065 1066 /** 1067 * hns_dsaf_tbl_line_init - INT 1068 * @dsaf_id: dsa fabric id 1069 */ 1070 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev) 1071 { 1072 u32 i; 1073 /* defaultly set all lineal mac table entry resulting discard */ 1074 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} }; 1075 1076 for (i = 0; i < DSAF_LINE_SUM; i++) 1077 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line); 1078 } 1079 1080 /** 1081 * hns_dsaf_tbl_tcam_init - INT 1082 * @dsaf_id: dsa fabric id 1083 */ 1084 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev) 1085 { 1086 u32 i; 1087 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} }; 1088 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} }; 1089 1090 /*tcam tbl*/ 1091 for (i = 0; i < DSAF_TCAM_SUM; i++) 1092 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast); 1093 } 1094 1095 /** 1096 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg 1097 * @mac_cb: mac contrl block 1098 */ 1099 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev, 1100 int mac_id, int tc_en) 1101 { 1102 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en); 1103 } 1104 1105 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev, 1106 int mac_id, int tx_en, int rx_en) 1107 { 1108 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1109 if (!tx_en || !rx_en) 1110 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n"); 1111 1112 return; 1113 } 1114 1115 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, 1116 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en); 1117 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, 1118 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en); 1119 } 1120 1121 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id, 1122 u32 en) 1123 { 1124 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1125 if (!en) { 1126 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n"); 1127 return -EINVAL; 1128 } 1129 } 1130 1131 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, 1132 DSAF_MAC_PAUSE_RX_EN_B, !!en); 1133 1134 return 0; 1135 } 1136 1137 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id, 1138 u32 *en) 1139 { 1140 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) 1141 *en = 1; 1142 else 1143 *en = dsaf_get_dev_bit(dsaf_dev, 1144 DSAF_PAUSE_CFG_REG + mac_id * 4, 1145 DSAF_MAC_PAUSE_RX_EN_B); 1146 } 1147 1148 /** 1149 * hns_dsaf_tbl_tcam_init - INT 1150 * @dsaf_id: dsa fabric id 1151 * @dsaf_mode 1152 */ 1153 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev) 1154 { 1155 u32 i; 1156 u32 o_dsaf_cfg; 1157 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver); 1158 1159 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG); 1160 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en); 1161 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode); 1162 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0); 1163 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0); 1164 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0); 1165 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg); 1166 1167 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1); 1168 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD); 1169 1170 /* set 22 queue per tx ppe engine, only used in switch mode */ 1171 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE); 1172 1173 /* set promisc def queue id */ 1174 hns_dsaf_mix_def_qid_cfg(dsaf_dev); 1175 1176 /* set inner loopback queue id */ 1177 hns_dsaf_inner_qid_cfg(dsaf_dev); 1178 1179 /* in non switch mode, set all port to access mode */ 1180 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN); 1181 1182 /*set dsaf pfc to 0 for parseing rx pause*/ 1183 for (i = 0; i < DSAF_COMM_CHN; i++) { 1184 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0); 1185 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1); 1186 } 1187 1188 /*msk and clr exception irqs */ 1189 for (i = 0; i < DSAF_COMM_CHN; i++) { 1190 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful); 1191 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful); 1192 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful); 1193 1194 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful); 1195 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful); 1196 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful); 1197 } 1198 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful); 1199 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful); 1200 } 1201 1202 /** 1203 * hns_dsaf_inode_init - INT 1204 * @dsaf_id: dsa fabric id 1205 */ 1206 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev) 1207 { 1208 u32 reg; 1209 u32 tc_cfg; 1210 u32 i; 1211 1212 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE) 1213 tc_cfg = HNS_DSAF_I4TC_CFG; 1214 else 1215 tc_cfg = HNS_DSAF_I8TC_CFG; 1216 1217 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1218 for (i = 0; i < DSAF_INODE_NUM; i++) { 1219 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i; 1220 dsaf_set_dev_field(dsaf_dev, reg, 1221 DSAF_INODE_IN_PORT_NUM_M, 1222 DSAF_INODE_IN_PORT_NUM_S, 1223 i % DSAF_XGE_NUM); 1224 } 1225 } else { 1226 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) { 1227 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i; 1228 dsaf_set_dev_field(dsaf_dev, reg, 1229 DSAF_INODE_IN_PORT_NUM_M, 1230 DSAF_INODE_IN_PORT_NUM_S, 0); 1231 dsaf_set_dev_field(dsaf_dev, reg, 1232 DSAFV2_INODE_IN_PORT1_NUM_M, 1233 DSAFV2_INODE_IN_PORT1_NUM_S, 1); 1234 dsaf_set_dev_field(dsaf_dev, reg, 1235 DSAFV2_INODE_IN_PORT2_NUM_M, 1236 DSAFV2_INODE_IN_PORT2_NUM_S, 2); 1237 dsaf_set_dev_field(dsaf_dev, reg, 1238 DSAFV2_INODE_IN_PORT3_NUM_M, 1239 DSAFV2_INODE_IN_PORT3_NUM_S, 3); 1240 dsaf_set_dev_field(dsaf_dev, reg, 1241 DSAFV2_INODE_IN_PORT4_NUM_M, 1242 DSAFV2_INODE_IN_PORT4_NUM_S, 4); 1243 dsaf_set_dev_field(dsaf_dev, reg, 1244 DSAFV2_INODE_IN_PORT5_NUM_M, 1245 DSAFV2_INODE_IN_PORT5_NUM_S, 5); 1246 } 1247 } 1248 for (i = 0; i < DSAF_INODE_NUM; i++) { 1249 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i; 1250 dsaf_write_dev(dsaf_dev, reg, tc_cfg); 1251 } 1252 } 1253 1254 /** 1255 * hns_dsaf_sbm_init - INT 1256 * @dsaf_id: dsa fabric id 1257 */ 1258 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev) 1259 { 1260 u32 flag; 1261 u32 finish_msk; 1262 u32 cnt = 0; 1263 int ret; 1264 1265 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1266 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev); 1267 finish_msk = DSAF_SRAM_INIT_OVER_M; 1268 } else { 1269 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev); 1270 finish_msk = DSAFV2_SRAM_INIT_OVER_M; 1271 } 1272 1273 /* enable sbm chanel, disable sbm chanel shcut function*/ 1274 hns_dsaf_sbm_cfg(dsaf_dev); 1275 1276 /* enable sbm mib */ 1277 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev); 1278 if (ret) { 1279 dev_err(dsaf_dev->dev, 1280 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n", 1281 dsaf_dev->ae_dev.name, ret); 1282 return ret; 1283 } 1284 1285 /* enable sbm initial link sram */ 1286 hns_dsaf_sbm_link_sram_init_en(dsaf_dev); 1287 1288 do { 1289 usleep_range(200, 210);/*udelay(200);*/ 1290 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG, 1291 finish_msk, DSAF_SRAM_INIT_OVER_S); 1292 cnt++; 1293 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) && 1294 cnt < DSAF_CFG_READ_CNT); 1295 1296 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) { 1297 dev_err(dsaf_dev->dev, 1298 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n", 1299 dsaf_dev->ae_dev.name, flag, cnt); 1300 return -ENODEV; 1301 } 1302 1303 hns_dsaf_rocee_bp_en(dsaf_dev); 1304 1305 return 0; 1306 } 1307 1308 /** 1309 * hns_dsaf_tbl_init - INT 1310 * @dsaf_id: dsa fabric id 1311 */ 1312 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev) 1313 { 1314 hns_dsaf_tbl_stat_en(dsaf_dev); 1315 1316 hns_dsaf_tbl_tcam_init(dsaf_dev); 1317 hns_dsaf_tbl_line_init(dsaf_dev); 1318 } 1319 1320 /** 1321 * hns_dsaf_voq_init - INT 1322 * @dsaf_id: dsa fabric id 1323 */ 1324 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev) 1325 { 1326 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev); 1327 } 1328 1329 /** 1330 * hns_dsaf_init_hw - init dsa fabric hardware 1331 * @dsaf_dev: dsa fabric device struct pointer 1332 */ 1333 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev) 1334 { 1335 int ret; 1336 1337 dev_dbg(dsaf_dev->dev, 1338 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name); 1339 1340 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0); 1341 mdelay(10); 1342 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 1); 1343 1344 hns_dsaf_comm_init(dsaf_dev); 1345 1346 /*init XBAR_INODE*/ 1347 hns_dsaf_inode_init(dsaf_dev); 1348 1349 /*init SBM*/ 1350 ret = hns_dsaf_sbm_init(dsaf_dev); 1351 if (ret) 1352 return ret; 1353 1354 /*init TBL*/ 1355 hns_dsaf_tbl_init(dsaf_dev); 1356 1357 /*init VOQ*/ 1358 hns_dsaf_voq_init(dsaf_dev); 1359 1360 return 0; 1361 } 1362 1363 /** 1364 * hns_dsaf_remove_hw - uninit dsa fabric hardware 1365 * @dsaf_dev: dsa fabric device struct pointer 1366 */ 1367 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev) 1368 { 1369 /*reset*/ 1370 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0); 1371 } 1372 1373 /** 1374 * hns_dsaf_init - init dsa fabric 1375 * @dsaf_dev: dsa fabric device struct pointer 1376 * retuen 0 - success , negative --fail 1377 */ 1378 static int hns_dsaf_init(struct dsaf_device *dsaf_dev) 1379 { 1380 struct dsaf_drv_priv *priv = 1381 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1382 u32 i; 1383 int ret; 1384 1385 if (HNS_DSAF_IS_DEBUG(dsaf_dev)) 1386 return 0; 1387 1388 spin_lock_init(&dsaf_dev->tcam_lock); 1389 ret = hns_dsaf_init_hw(dsaf_dev); 1390 if (ret) 1391 return ret; 1392 1393 /* malloc mem for tcam mac key(vlan+mac) */ 1394 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl) 1395 * DSAF_TCAM_SUM); 1396 if (!priv->soft_mac_tbl) { 1397 ret = -ENOMEM; 1398 goto remove_hw; 1399 } 1400 1401 /*all entry invall */ 1402 for (i = 0; i < DSAF_TCAM_SUM; i++) 1403 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX; 1404 1405 return 0; 1406 1407 remove_hw: 1408 hns_dsaf_remove_hw(dsaf_dev); 1409 return ret; 1410 } 1411 1412 /** 1413 * hns_dsaf_free - free dsa fabric 1414 * @dsaf_dev: dsa fabric device struct pointer 1415 */ 1416 static void hns_dsaf_free(struct dsaf_device *dsaf_dev) 1417 { 1418 struct dsaf_drv_priv *priv = 1419 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1420 1421 hns_dsaf_remove_hw(dsaf_dev); 1422 1423 /* free all mac mem */ 1424 vfree(priv->soft_mac_tbl); 1425 priv->soft_mac_tbl = NULL; 1426 } 1427 1428 /** 1429 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry 1430 * @dsaf_dev: dsa fabric device struct pointer 1431 * @mac_key: mac entry struct pointer 1432 */ 1433 static u16 hns_dsaf_find_soft_mac_entry( 1434 struct dsaf_device *dsaf_dev, 1435 struct dsaf_drv_tbl_tcam_key *mac_key) 1436 { 1437 struct dsaf_drv_priv *priv = 1438 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1439 struct dsaf_drv_soft_mac_tbl *soft_mac_entry; 1440 u32 i; 1441 1442 soft_mac_entry = priv->soft_mac_tbl; 1443 for (i = 0; i < DSAF_TCAM_SUM; i++) { 1444 /* invall tab entry */ 1445 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) && 1446 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) && 1447 (soft_mac_entry->tcam_key.low.val == mac_key->low.val)) 1448 /* return find result --soft index */ 1449 return soft_mac_entry->index; 1450 1451 soft_mac_entry++; 1452 } 1453 return DSAF_INVALID_ENTRY_IDX; 1454 } 1455 1456 /** 1457 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry 1458 * @dsaf_dev: dsa fabric device struct pointer 1459 */ 1460 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev) 1461 { 1462 struct dsaf_drv_priv *priv = 1463 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1464 struct dsaf_drv_soft_mac_tbl *soft_mac_entry; 1465 u32 i; 1466 1467 soft_mac_entry = priv->soft_mac_tbl; 1468 for (i = 0; i < DSAF_TCAM_SUM; i++) { 1469 /* inv all entry */ 1470 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX) 1471 /* return find result --soft index */ 1472 return i; 1473 1474 soft_mac_entry++; 1475 } 1476 return DSAF_INVALID_ENTRY_IDX; 1477 } 1478 1479 /** 1480 * hns_dsaf_set_mac_key - set mac key 1481 * @dsaf_dev: dsa fabric device struct pointer 1482 * @mac_key: tcam key pointer 1483 * @vlan_id: vlan id 1484 * @in_port_num: input port num 1485 * @addr: mac addr 1486 */ 1487 static void hns_dsaf_set_mac_key( 1488 struct dsaf_device *dsaf_dev, 1489 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num, 1490 u8 *addr) 1491 { 1492 u8 port; 1493 1494 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE) 1495 /*DSAF mode : in port id fixed 0*/ 1496 port = 0; 1497 else 1498 /*non-dsaf mode*/ 1499 port = in_port_num; 1500 1501 mac_key->high.bits.mac_0 = addr[0]; 1502 mac_key->high.bits.mac_1 = addr[1]; 1503 mac_key->high.bits.mac_2 = addr[2]; 1504 mac_key->high.bits.mac_3 = addr[3]; 1505 mac_key->low.bits.mac_4 = addr[4]; 1506 mac_key->low.bits.mac_5 = addr[5]; 1507 mac_key->low.bits.vlan = vlan_id; 1508 mac_key->low.bits.port = port; 1509 } 1510 1511 /** 1512 * hns_dsaf_set_mac_uc_entry - set mac uc-entry 1513 * @dsaf_dev: dsa fabric device struct pointer 1514 * @mac_entry: uc-mac entry 1515 */ 1516 int hns_dsaf_set_mac_uc_entry( 1517 struct dsaf_device *dsaf_dev, 1518 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1519 { 1520 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1521 struct dsaf_drv_tbl_tcam_key mac_key; 1522 struct dsaf_tbl_tcam_ucast_cfg mac_data; 1523 struct dsaf_drv_priv *priv = 1524 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1525 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1526 1527 /* mac addr check */ 1528 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1529 MAC_IS_BROADCAST(mac_entry->addr) || 1530 MAC_IS_MULTICAST(mac_entry->addr)) { 1531 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n", 1532 dsaf_dev->ae_dev.name, mac_entry->addr); 1533 return -EINVAL; 1534 } 1535 1536 /* config key */ 1537 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1538 mac_entry->in_port_num, mac_entry->addr); 1539 1540 /* entry ie exist? */ 1541 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1542 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1543 /*if has not inv entry,find a empty entry */ 1544 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1545 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1546 /* has not empty,return error */ 1547 dev_err(dsaf_dev->dev, 1548 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1549 dsaf_dev->ae_dev.name, 1550 mac_key.high.val, mac_key.low.val); 1551 return -EINVAL; 1552 } 1553 } 1554 1555 dev_dbg(dsaf_dev->dev, 1556 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1557 dsaf_dev->ae_dev.name, mac_key.high.val, 1558 mac_key.low.val, entry_index); 1559 1560 /* config hardware entry */ 1561 mac_data.tbl_ucast_item_vld = 1; 1562 mac_data.tbl_ucast_mac_discard = 0; 1563 mac_data.tbl_ucast_old_en = 0; 1564 /* default config dvc to 0 */ 1565 mac_data.tbl_ucast_dvc = 0; 1566 mac_data.tbl_ucast_out_port = mac_entry->port_num; 1567 hns_dsaf_tcam_uc_cfg( 1568 dsaf_dev, entry_index, 1569 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1570 1571 /* config software entry */ 1572 soft_mac_entry += entry_index; 1573 soft_mac_entry->index = entry_index; 1574 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1575 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1576 1577 return 0; 1578 } 1579 1580 /** 1581 * hns_dsaf_set_mac_mc_entry - set mac mc-entry 1582 * @dsaf_dev: dsa fabric device struct pointer 1583 * @mac_entry: mc-mac entry 1584 */ 1585 int hns_dsaf_set_mac_mc_entry( 1586 struct dsaf_device *dsaf_dev, 1587 struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1588 { 1589 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1590 struct dsaf_drv_tbl_tcam_key mac_key; 1591 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1592 struct dsaf_drv_priv *priv = 1593 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1594 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1595 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1596 1597 /* mac addr check */ 1598 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1599 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n", 1600 dsaf_dev->ae_dev.name, mac_entry->addr); 1601 return -EINVAL; 1602 } 1603 1604 /*config key */ 1605 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, 1606 mac_entry->in_vlan_id, 1607 mac_entry->in_port_num, mac_entry->addr); 1608 1609 /* entry ie exist? */ 1610 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1611 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1612 /*if hasnot, find enpty entry*/ 1613 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1614 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1615 /*if hasnot empty, error*/ 1616 dev_err(dsaf_dev->dev, 1617 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1618 dsaf_dev->ae_dev.name, 1619 mac_key.high.val, mac_key.low.val); 1620 return -EINVAL; 1621 } 1622 1623 /* config hardware entry */ 1624 memset(mac_data.tbl_mcast_port_msk, 1625 0, sizeof(mac_data.tbl_mcast_port_msk)); 1626 } else { 1627 /* config hardware entry */ 1628 hns_dsaf_tcam_mc_get( 1629 dsaf_dev, entry_index, 1630 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1631 } 1632 mac_data.tbl_mcast_old_en = 0; 1633 mac_data.tbl_mcast_item_vld = 1; 1634 dsaf_set_field(mac_data.tbl_mcast_port_msk[0], 1635 0x3F, 0, mac_entry->port_mask[0]); 1636 1637 dev_dbg(dsaf_dev->dev, 1638 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n", 1639 dsaf_dev->ae_dev.name, mac_key.high.val, 1640 mac_key.low.val, entry_index); 1641 1642 hns_dsaf_tcam_mc_cfg( 1643 dsaf_dev, entry_index, 1644 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1645 1646 /* config software entry */ 1647 soft_mac_entry += entry_index; 1648 soft_mac_entry->index = entry_index; 1649 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1650 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1651 1652 return 0; 1653 } 1654 1655 /** 1656 * hns_dsaf_add_mac_mc_port - add mac mc-port 1657 * @dsaf_dev: dsa fabric device struct pointer 1658 * @mac_entry: mc-mac entry 1659 */ 1660 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev, 1661 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1662 { 1663 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1664 struct dsaf_drv_tbl_tcam_key mac_key; 1665 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1666 struct dsaf_drv_priv *priv = 1667 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1668 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1669 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1670 int mskid; 1671 1672 /*chechk mac addr */ 1673 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1674 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n", 1675 mac_entry->addr); 1676 return -EINVAL; 1677 } 1678 1679 /*config key */ 1680 hns_dsaf_set_mac_key( 1681 dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1682 mac_entry->in_port_num, mac_entry->addr); 1683 1684 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg)); 1685 1686 /*check exist? */ 1687 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1688 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1689 /*if hasnot , find a empty*/ 1690 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1691 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1692 /*if hasnot empty, error*/ 1693 dev_err(dsaf_dev->dev, 1694 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1695 dsaf_dev->ae_dev.name, mac_key.high.val, 1696 mac_key.low.val); 1697 return -EINVAL; 1698 } 1699 } else { 1700 /*if exist, add in */ 1701 hns_dsaf_tcam_mc_get( 1702 dsaf_dev, entry_index, 1703 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1704 } 1705 /* config hardware entry */ 1706 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) { 1707 mskid = mac_entry->port_num; 1708 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) { 1709 mskid = mac_entry->port_num - 1710 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM; 1711 } else { 1712 dev_err(dsaf_dev->dev, 1713 "%s,pnum(%d)error,key(%#x:%#x)\n", 1714 dsaf_dev->ae_dev.name, mac_entry->port_num, 1715 mac_key.high.val, mac_key.low.val); 1716 return -EINVAL; 1717 } 1718 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1); 1719 mac_data.tbl_mcast_old_en = 0; 1720 mac_data.tbl_mcast_item_vld = 1; 1721 1722 dev_dbg(dsaf_dev->dev, 1723 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1724 dsaf_dev->ae_dev.name, mac_key.high.val, 1725 mac_key.low.val, entry_index); 1726 1727 hns_dsaf_tcam_mc_cfg( 1728 dsaf_dev, entry_index, 1729 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1730 1731 /*config software entry */ 1732 soft_mac_entry += entry_index; 1733 soft_mac_entry->index = entry_index; 1734 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1735 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1736 1737 return 0; 1738 } 1739 1740 /** 1741 * hns_dsaf_del_mac_entry - del mac mc-port 1742 * @dsaf_dev: dsa fabric device struct pointer 1743 * @vlan_id: vlian id 1744 * @in_port_num: input port num 1745 * @addr : mac addr 1746 */ 1747 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id, 1748 u8 in_port_num, u8 *addr) 1749 { 1750 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1751 struct dsaf_drv_tbl_tcam_key mac_key; 1752 struct dsaf_drv_priv *priv = 1753 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1754 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1755 1756 /*check mac addr */ 1757 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) { 1758 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n", 1759 addr); 1760 return -EINVAL; 1761 } 1762 1763 /*config key */ 1764 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr); 1765 1766 /*exist ?*/ 1767 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1768 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1769 /*not exist, error */ 1770 dev_err(dsaf_dev->dev, 1771 "del_mac_entry failed, %s Mac key(%#x:%#x)\n", 1772 dsaf_dev->ae_dev.name, 1773 mac_key.high.val, mac_key.low.val); 1774 return -EINVAL; 1775 } 1776 dev_dbg(dsaf_dev->dev, 1777 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1778 dsaf_dev->ae_dev.name, mac_key.high.val, 1779 mac_key.low.val, entry_index); 1780 1781 /*do del opt*/ 1782 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index); 1783 1784 /*del soft emtry */ 1785 soft_mac_entry += entry_index; 1786 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX; 1787 1788 return 0; 1789 } 1790 1791 /** 1792 * hns_dsaf_del_mac_mc_port - del mac mc- port 1793 * @dsaf_dev: dsa fabric device struct pointer 1794 * @mac_entry: mac entry 1795 */ 1796 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev, 1797 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1798 { 1799 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1800 struct dsaf_drv_tbl_tcam_key mac_key; 1801 struct dsaf_drv_priv *priv = 1802 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1803 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1804 u16 vlan_id; 1805 u8 in_port_num; 1806 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1807 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1808 int mskid; 1809 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0}; 1810 1811 if (!(void *)mac_entry) { 1812 dev_err(dsaf_dev->dev, 1813 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n"); 1814 return -EINVAL; 1815 } 1816 1817 /*get key info*/ 1818 vlan_id = mac_entry->in_vlan_id; 1819 in_port_num = mac_entry->in_port_num; 1820 1821 /*check mac addr */ 1822 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1823 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n", 1824 mac_entry->addr); 1825 return -EINVAL; 1826 } 1827 1828 /*config key */ 1829 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, 1830 mac_entry->addr); 1831 1832 /*check is exist? */ 1833 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1834 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1835 /*find none */ 1836 dev_err(dsaf_dev->dev, 1837 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n", 1838 dsaf_dev->ae_dev.name, 1839 mac_key.high.val, mac_key.low.val); 1840 return -EINVAL; 1841 } 1842 1843 dev_dbg(dsaf_dev->dev, 1844 "del_mac_mc_port, %s key(%#x:%#x) index%d\n", 1845 dsaf_dev->ae_dev.name, mac_key.high.val, 1846 mac_key.low.val, entry_index); 1847 1848 /*read entry*/ 1849 hns_dsaf_tcam_mc_get( 1850 dsaf_dev, entry_index, 1851 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1852 1853 /*del the port*/ 1854 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) { 1855 mskid = mac_entry->port_num; 1856 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) { 1857 mskid = mac_entry->port_num - 1858 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM; 1859 } else { 1860 dev_err(dsaf_dev->dev, 1861 "%s,pnum(%d)error,key(%#x:%#x)\n", 1862 dsaf_dev->ae_dev.name, mac_entry->port_num, 1863 mac_key.high.val, mac_key.low.val); 1864 return -EINVAL; 1865 } 1866 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0); 1867 1868 /*check non port, do del entry */ 1869 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk, 1870 sizeof(mac_data.tbl_mcast_port_msk))) { 1871 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index); 1872 1873 /* del soft entry */ 1874 soft_mac_entry += entry_index; 1875 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX; 1876 } else { /* not zer, just del port, updata*/ 1877 hns_dsaf_tcam_mc_cfg( 1878 dsaf_dev, entry_index, 1879 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1880 } 1881 1882 return 0; 1883 } 1884 1885 /** 1886 * hns_dsaf_get_mac_uc_entry - get mac uc entry 1887 * @dsaf_dev: dsa fabric device struct pointer 1888 * @mac_entry: mac entry 1889 */ 1890 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev, 1891 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1892 { 1893 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1894 struct dsaf_drv_tbl_tcam_key mac_key; 1895 1896 struct dsaf_tbl_tcam_ucast_cfg mac_data; 1897 1898 /* check macaddr */ 1899 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1900 MAC_IS_BROADCAST(mac_entry->addr)) { 1901 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n", 1902 mac_entry->addr); 1903 return -EINVAL; 1904 } 1905 1906 /*config key */ 1907 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1908 mac_entry->in_port_num, mac_entry->addr); 1909 1910 /*check exist? */ 1911 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1912 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1913 /*find none, error */ 1914 dev_err(dsaf_dev->dev, 1915 "get_uc_entry failed, %s Mac key(%#x:%#x)\n", 1916 dsaf_dev->ae_dev.name, 1917 mac_key.high.val, mac_key.low.val); 1918 return -EINVAL; 1919 } 1920 dev_dbg(dsaf_dev->dev, 1921 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1922 dsaf_dev->ae_dev.name, mac_key.high.val, 1923 mac_key.low.val, entry_index); 1924 1925 /*read entry*/ 1926 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index, 1927 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1928 mac_entry->port_num = mac_data.tbl_ucast_out_port; 1929 1930 return 0; 1931 } 1932 1933 /** 1934 * hns_dsaf_get_mac_mc_entry - get mac mc entry 1935 * @dsaf_dev: dsa fabric device struct pointer 1936 * @mac_entry: mac entry 1937 */ 1938 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev, 1939 struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1940 { 1941 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1942 struct dsaf_drv_tbl_tcam_key mac_key; 1943 1944 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1945 1946 /*check mac addr */ 1947 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1948 MAC_IS_BROADCAST(mac_entry->addr)) { 1949 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n", 1950 mac_entry->addr); 1951 return -EINVAL; 1952 } 1953 1954 /*config key */ 1955 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1956 mac_entry->in_port_num, mac_entry->addr); 1957 1958 /*check exist? */ 1959 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1960 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1961 /* find none, error */ 1962 dev_err(dsaf_dev->dev, 1963 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n", 1964 dsaf_dev->ae_dev.name, mac_key.high.val, 1965 mac_key.low.val); 1966 return -EINVAL; 1967 } 1968 dev_dbg(dsaf_dev->dev, 1969 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1970 dsaf_dev->ae_dev.name, mac_key.high.val, 1971 mac_key.low.val, entry_index); 1972 1973 /*read entry */ 1974 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index, 1975 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1976 1977 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F; 1978 return 0; 1979 } 1980 1981 /** 1982 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index 1983 * @dsaf_dev: dsa fabric device struct pointer 1984 * @entry_index: tab entry index 1985 * @mac_entry: mac entry 1986 */ 1987 int hns_dsaf_get_mac_entry_by_index( 1988 struct dsaf_device *dsaf_dev, 1989 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1990 { 1991 struct dsaf_drv_tbl_tcam_key mac_key; 1992 1993 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1994 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data; 1995 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0}; 1996 1997 if (entry_index >= DSAF_TCAM_SUM) { 1998 /* find none, del error */ 1999 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n", 2000 dsaf_dev->ae_dev.name); 2001 return -EINVAL; 2002 } 2003 2004 /* mc entry, do read opt */ 2005 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index, 2006 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 2007 2008 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F; 2009 2010 /***get mac addr*/ 2011 mac_addr[0] = mac_key.high.bits.mac_0; 2012 mac_addr[1] = mac_key.high.bits.mac_1; 2013 mac_addr[2] = mac_key.high.bits.mac_2; 2014 mac_addr[3] = mac_key.high.bits.mac_3; 2015 mac_addr[4] = mac_key.low.bits.mac_4; 2016 mac_addr[5] = mac_key.low.bits.mac_5; 2017 /**is mc or uc*/ 2018 if (MAC_IS_MULTICAST((u8 *)mac_addr) || 2019 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) { 2020 /**mc donot do*/ 2021 } else { 2022 /*is not mc, just uc... */ 2023 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index, 2024 (struct dsaf_tbl_tcam_data *)&mac_key, 2025 &mac_uc_data); 2026 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port); 2027 } 2028 2029 return 0; 2030 } 2031 2032 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev, 2033 size_t sizeof_priv) 2034 { 2035 struct dsaf_device *dsaf_dev; 2036 2037 dsaf_dev = devm_kzalloc(dev, 2038 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL); 2039 if (unlikely(!dsaf_dev)) { 2040 dsaf_dev = ERR_PTR(-ENOMEM); 2041 } else { 2042 dsaf_dev->dev = dev; 2043 dev_set_drvdata(dev, dsaf_dev); 2044 } 2045 2046 return dsaf_dev; 2047 } 2048 2049 /** 2050 * hns_dsaf_free_dev - free dev mem 2051 * @dev: struct device pointer 2052 */ 2053 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev) 2054 { 2055 (void)dev_set_drvdata(dsaf_dev->dev, NULL); 2056 } 2057 2058 /** 2059 * dsaf_pfc_unit_cnt - set pfc unit count 2060 * @dsaf_id: dsa fabric id 2061 * @pport_rate: value array 2062 * @pdsaf_pfc_unit_cnt: value array 2063 */ 2064 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id, 2065 enum dsaf_port_rate_mode rate) 2066 { 2067 u32 unit_cnt; 2068 2069 switch (rate) { 2070 case DSAF_PORT_RATE_10000: 2071 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE; 2072 break; 2073 case DSAF_PORT_RATE_1000: 2074 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000; 2075 break; 2076 case DSAF_PORT_RATE_2500: 2077 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000; 2078 break; 2079 default: 2080 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE; 2081 } 2082 2083 dsaf_set_dev_field(dsaf_dev, 2084 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id), 2085 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S, 2086 unit_cnt); 2087 } 2088 2089 /** 2090 * dsaf_port_work_rate_cfg - fifo 2091 * @dsaf_id: dsa fabric id 2092 * @xge_ge_work_mode 2093 */ 2094 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id, 2095 enum dsaf_port_rate_mode rate_mode) 2096 { 2097 u32 port_work_mode; 2098 2099 port_work_mode = dsaf_read_dev( 2100 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id); 2101 2102 if (rate_mode == DSAF_PORT_RATE_10000) 2103 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1); 2104 else 2105 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0); 2106 2107 dsaf_write_dev(dsaf_dev, 2108 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id, 2109 port_work_mode); 2110 2111 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode); 2112 } 2113 2114 /** 2115 * hns_dsaf_fix_mac_mode - dsaf modify mac mode 2116 * @mac_cb: mac contrl block 2117 */ 2118 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb) 2119 { 2120 enum dsaf_port_rate_mode mode; 2121 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev; 2122 int mac_id = mac_cb->mac_id; 2123 2124 if (mac_cb->mac_type != HNAE_PORT_SERVICE) 2125 return; 2126 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII) 2127 mode = DSAF_PORT_RATE_10000; 2128 else 2129 mode = DSAF_PORT_RATE_1000; 2130 2131 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode); 2132 } 2133 2134 static u32 hns_dsaf_get_inode_prio_reg(int index) 2135 { 2136 int base_index, offset; 2137 u32 base_addr = DSAF_INODE_IN_PRIO_PAUSE_BASE_REG; 2138 2139 base_index = (index + 1) / DSAF_REG_PER_ZONE; 2140 offset = (index + 1) % DSAF_REG_PER_ZONE; 2141 2142 return base_addr + DSAF_INODE_IN_PRIO_PAUSE_BASE_OFFSET * base_index + 2143 DSAF_INODE_IN_PRIO_PAUSE_OFFSET * offset; 2144 } 2145 2146 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num) 2147 { 2148 struct dsaf_hw_stats *hw_stats 2149 = &dsaf_dev->hw_stats[node_num]; 2150 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver); 2151 int i; 2152 u32 reg_tmp; 2153 2154 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev, 2155 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 2156 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev, 2157 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num); 2158 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev, 2159 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num); 2160 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev, 2161 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num); 2162 2163 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG : 2164 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG; 2165 hw_stats->rx_pause_frame += 2166 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num); 2167 2168 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev, 2169 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num); 2170 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev, 2171 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num); 2172 hw_stats->crc_false += dsaf_read_dev(dsaf_dev, 2173 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num); 2174 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev, 2175 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 2176 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev, 2177 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 2178 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev, 2179 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num); 2180 2181 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev, 2182 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num); 2183 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev, 2184 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num); 2185 2186 /* pfc pause frame statistics stored in dsaf inode*/ 2187 if ((node_num < DSAF_SERVICE_NW_NUM) && !is_ver1) { 2188 for (i = 0; i < DSAF_PRIO_NR; i++) { 2189 reg_tmp = hns_dsaf_get_inode_prio_reg(i); 2190 hw_stats->rx_pfc[i] += dsaf_read_dev(dsaf_dev, 2191 reg_tmp + 0x4 * (u64)node_num); 2192 hw_stats->tx_pfc[i] += dsaf_read_dev(dsaf_dev, 2193 DSAF_XOD_XGE_PFC_PRIO_CNT_BASE_REG + 2194 DSAF_XOD_XGE_PFC_PRIO_CNT_OFFSET * i + 2195 0xF0 * (u64)node_num); 2196 } 2197 } 2198 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev, 2199 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num); 2200 } 2201 2202 /** 2203 *hns_dsaf_get_regs - dump dsaf regs 2204 *@dsaf_dev: dsaf device 2205 *@data:data for value of regs 2206 */ 2207 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data) 2208 { 2209 u32 i = 0; 2210 u32 j; 2211 u32 *p = data; 2212 u32 reg_tmp; 2213 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver); 2214 2215 /* dsaf common registers */ 2216 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG); 2217 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG); 2218 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG); 2219 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG); 2220 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG); 2221 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG); 2222 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG); 2223 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG); 2224 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG); 2225 2226 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4); 2227 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4); 2228 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4); 2229 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4); 2230 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4); 2231 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4); 2232 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4); 2233 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4); 2234 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4); 2235 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4); 2236 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4); 2237 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4); 2238 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4); 2239 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4); 2240 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4); 2241 2242 for (i = 0; i < DSAF_SW_PORT_NUM; i++) 2243 p[24 + i] = dsaf_read_dev(ddev, 2244 DSAF_SW_PORT_TYPE_0_REG + i * 4); 2245 2246 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4); 2247 2248 for (i = 0; i < DSAF_SW_PORT_NUM; i++) 2249 p[33 + i] = dsaf_read_dev(ddev, 2250 DSAF_PORT_DEF_VLAN_0_REG + i * 4); 2251 2252 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++) 2253 p[41 + i] = dsaf_read_dev(ddev, 2254 DSAF_VM_DEF_VLAN_0_REG + i * 4); 2255 2256 /* dsaf inode registers */ 2257 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG); 2258 2259 p[171] = dsaf_read_dev(ddev, 2260 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80); 2261 2262 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) { 2263 j = i * DSAF_COMM_CHN + port; 2264 p[172 + i] = dsaf_read_dev(ddev, 2265 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80); 2266 p[175 + i] = dsaf_read_dev(ddev, 2267 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80); 2268 p[178 + i] = dsaf_read_dev(ddev, 2269 DSAF_INODE_BP_STATUS_0_REG + j * 0x80); 2270 p[181 + i] = dsaf_read_dev(ddev, 2271 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80); 2272 p[184 + i] = dsaf_read_dev(ddev, 2273 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80); 2274 p[187 + i] = dsaf_read_dev(ddev, 2275 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80); 2276 p[190 + i] = dsaf_read_dev(ddev, 2277 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80); 2278 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG : 2279 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG; 2280 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80); 2281 p[196 + i] = dsaf_read_dev(ddev, 2282 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80); 2283 p[199 + i] = dsaf_read_dev(ddev, 2284 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80); 2285 p[202 + i] = dsaf_read_dev(ddev, 2286 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80); 2287 p[205 + i] = dsaf_read_dev(ddev, 2288 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80); 2289 p[208 + i] = dsaf_read_dev(ddev, 2290 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80); 2291 p[211 + i] = dsaf_read_dev(ddev, 2292 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80); 2293 p[214 + i] = dsaf_read_dev(ddev, 2294 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80); 2295 p[217 + i] = dsaf_read_dev(ddev, 2296 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4); 2297 p[220 + i] = dsaf_read_dev(ddev, 2298 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4); 2299 p[223 + i] = dsaf_read_dev(ddev, 2300 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4); 2301 p[224 + i] = dsaf_read_dev(ddev, 2302 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4); 2303 } 2304 2305 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4); 2306 2307 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) { 2308 j = i * DSAF_COMM_CHN + port; 2309 p[228 + i] = dsaf_read_dev(ddev, 2310 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4); 2311 } 2312 2313 p[231] = dsaf_read_dev(ddev, 2314 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4); 2315 2316 /* dsaf inode registers */ 2317 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) { 2318 j = i * DSAF_COMM_CHN + port; 2319 p[232 + i] = dsaf_read_dev(ddev, 2320 DSAF_SBM_CFG_REG_0_REG + j * 0x80); 2321 p[235 + i] = dsaf_read_dev(ddev, 2322 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80); 2323 p[238 + i] = dsaf_read_dev(ddev, 2324 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80); 2325 p[241 + i] = dsaf_read_dev(ddev, 2326 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80); 2327 p[244 + i] = dsaf_read_dev(ddev, 2328 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80); 2329 p[245 + i] = dsaf_read_dev(ddev, 2330 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80); 2331 p[248 + i] = dsaf_read_dev(ddev, 2332 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80); 2333 p[251 + i] = dsaf_read_dev(ddev, 2334 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80); 2335 p[254 + i] = dsaf_read_dev(ddev, 2336 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80); 2337 p[257 + i] = dsaf_read_dev(ddev, 2338 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80); 2339 p[260 + i] = dsaf_read_dev(ddev, 2340 DSAF_SBM_INER_ST_0_REG + j * 0x80); 2341 p[263 + i] = dsaf_read_dev(ddev, 2342 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80); 2343 p[266 + i] = dsaf_read_dev(ddev, 2344 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80); 2345 p[269 + i] = dsaf_read_dev(ddev, 2346 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80); 2347 p[272 + i] = dsaf_read_dev(ddev, 2348 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80); 2349 p[275 + i] = dsaf_read_dev(ddev, 2350 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80); 2351 p[278 + i] = dsaf_read_dev(ddev, 2352 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80); 2353 p[281 + i] = dsaf_read_dev(ddev, 2354 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80); 2355 p[284 + i] = dsaf_read_dev(ddev, 2356 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80); 2357 p[287 + i] = dsaf_read_dev(ddev, 2358 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80); 2359 p[290 + i] = dsaf_read_dev(ddev, 2360 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80); 2361 p[293 + i] = dsaf_read_dev(ddev, 2362 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80); 2363 p[296 + i] = dsaf_read_dev(ddev, 2364 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80); 2365 p[299 + i] = dsaf_read_dev(ddev, 2366 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80); 2367 p[302 + i] = dsaf_read_dev(ddev, 2368 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80); 2369 p[305 + i] = dsaf_read_dev(ddev, 2370 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80); 2371 p[308 + i] = dsaf_read_dev(ddev, 2372 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80); 2373 } 2374 2375 /* dsaf onode registers */ 2376 for (i = 0; i < DSAF_XOD_NUM; i++) { 2377 p[311 + i] = dsaf_read_dev(ddev, 2378 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90); 2379 p[319 + i] = dsaf_read_dev(ddev, 2380 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90); 2381 p[327 + i] = dsaf_read_dev(ddev, 2382 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90); 2383 p[335 + i] = dsaf_read_dev(ddev, 2384 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90); 2385 p[343 + i] = dsaf_read_dev(ddev, 2386 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90); 2387 p[351 + i] = dsaf_read_dev(ddev, 2388 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90); 2389 } 2390 2391 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90); 2392 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90); 2393 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90); 2394 2395 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) { 2396 j = i * DSAF_COMM_CHN + port; 2397 p[362 + i] = dsaf_read_dev(ddev, 2398 DSAF_XOD_GNT_L_0_REG + j * 0x90); 2399 p[365 + i] = dsaf_read_dev(ddev, 2400 DSAF_XOD_GNT_H_0_REG + j * 0x90); 2401 p[368 + i] = dsaf_read_dev(ddev, 2402 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90); 2403 p[371 + i] = dsaf_read_dev(ddev, 2404 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90); 2405 p[374 + i] = dsaf_read_dev(ddev, 2406 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90); 2407 p[377 + i] = dsaf_read_dev(ddev, 2408 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90); 2409 p[380 + i] = dsaf_read_dev(ddev, 2410 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90); 2411 p[383 + i] = dsaf_read_dev(ddev, 2412 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90); 2413 p[386 + i] = dsaf_read_dev(ddev, 2414 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90); 2415 p[389 + i] = dsaf_read_dev(ddev, 2416 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90); 2417 } 2418 2419 p[392] = dsaf_read_dev(ddev, 2420 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90); 2421 p[393] = dsaf_read_dev(ddev, 2422 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90); 2423 p[394] = dsaf_read_dev(ddev, 2424 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90); 2425 p[395] = dsaf_read_dev(ddev, 2426 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90); 2427 p[396] = dsaf_read_dev(ddev, 2428 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90); 2429 p[397] = dsaf_read_dev(ddev, 2430 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90); 2431 p[398] = dsaf_read_dev(ddev, 2432 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90); 2433 p[399] = dsaf_read_dev(ddev, 2434 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90); 2435 p[400] = dsaf_read_dev(ddev, 2436 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90); 2437 p[401] = dsaf_read_dev(ddev, 2438 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90); 2439 p[402] = dsaf_read_dev(ddev, 2440 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90); 2441 p[403] = dsaf_read_dev(ddev, 2442 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90); 2443 p[404] = dsaf_read_dev(ddev, 2444 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90); 2445 2446 /* dsaf voq registers */ 2447 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) { 2448 j = (i * DSAF_COMM_CHN + port) * 0x90; 2449 p[405 + i] = dsaf_read_dev(ddev, 2450 DSAF_VOQ_ECC_INVERT_EN_0_REG + j); 2451 p[408 + i] = dsaf_read_dev(ddev, 2452 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j); 2453 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j); 2454 p[414 + i] = dsaf_read_dev(ddev, 2455 DSAF_VOQ_OUT_PKT_NUM_0_REG + j); 2456 p[417 + i] = dsaf_read_dev(ddev, 2457 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j); 2458 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j); 2459 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j); 2460 p[426 + i] = dsaf_read_dev(ddev, 2461 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j); 2462 p[429 + i] = dsaf_read_dev(ddev, 2463 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j); 2464 p[432 + i] = dsaf_read_dev(ddev, 2465 DSAF_VOQ_PPE_XOD_REQ_0_REG + j); 2466 p[435 + i] = dsaf_read_dev(ddev, 2467 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j); 2468 p[438 + i] = dsaf_read_dev(ddev, 2469 DSAF_VOQ_BP_ALL_THRD_0_REG + j); 2470 } 2471 2472 /* dsaf tbl registers */ 2473 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG); 2474 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG); 2475 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG); 2476 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG); 2477 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG); 2478 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG); 2479 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG); 2480 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG); 2481 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG); 2482 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG); 2483 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG); 2484 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG); 2485 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG); 2486 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG); 2487 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG); 2488 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 2489 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 2490 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 2491 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG); 2492 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG); 2493 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG); 2494 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 2495 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG); 2496 2497 for (i = 0; i < DSAF_SW_PORT_NUM; i++) { 2498 j = i * 0x8; 2499 p[464 + 2 * i] = dsaf_read_dev(ddev, 2500 DSAF_TBL_DA0_MIS_INFO1_0_REG + j); 2501 p[465 + 2 * i] = dsaf_read_dev(ddev, 2502 DSAF_TBL_DA0_MIS_INFO0_0_REG + j); 2503 } 2504 2505 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG); 2506 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG); 2507 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG); 2508 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG); 2509 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG); 2510 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG); 2511 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG); 2512 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG); 2513 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG); 2514 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG); 2515 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG); 2516 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG); 2517 2518 /* dsaf other registers */ 2519 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4); 2520 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4); 2521 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4); 2522 p[495] = dsaf_read_dev(ddev, 2523 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4); 2524 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4); 2525 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4); 2526 2527 if (!is_ver1) 2528 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4); 2529 2530 /* mark end of dsaf regs */ 2531 for (i = 499; i < 504; i++) 2532 p[i] = 0xdddddddd; 2533 } 2534 2535 static char *hns_dsaf_get_node_stats_strings(char *data, int node, 2536 struct dsaf_device *dsaf_dev) 2537 { 2538 char *buff = data; 2539 int i; 2540 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver); 2541 2542 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node); 2543 buff += ETH_GSTRING_LEN; 2544 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node); 2545 buff += ETH_GSTRING_LEN; 2546 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node); 2547 buff += ETH_GSTRING_LEN; 2548 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node); 2549 buff += ETH_GSTRING_LEN; 2550 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node); 2551 buff += ETH_GSTRING_LEN; 2552 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node); 2553 buff += ETH_GSTRING_LEN; 2554 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node); 2555 buff += ETH_GSTRING_LEN; 2556 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node); 2557 buff += ETH_GSTRING_LEN; 2558 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node); 2559 buff += ETH_GSTRING_LEN; 2560 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node); 2561 buff += ETH_GSTRING_LEN; 2562 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node); 2563 buff += ETH_GSTRING_LEN; 2564 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node); 2565 buff += ETH_GSTRING_LEN; 2566 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node); 2567 buff += ETH_GSTRING_LEN; 2568 if (node < DSAF_SERVICE_NW_NUM && !is_ver1) { 2569 for (i = 0; i < DSAF_PRIO_NR; i++) { 2570 snprintf(buff + 0 * ETH_GSTRING_LEN * DSAF_PRIO_NR, 2571 ETH_GSTRING_LEN, "inod%d_pfc_prio%d_pkts", 2572 node, i); 2573 snprintf(buff + 1 * ETH_GSTRING_LEN * DSAF_PRIO_NR, 2574 ETH_GSTRING_LEN, "onod%d_pfc_prio%d_pkts", 2575 node, i); 2576 buff += ETH_GSTRING_LEN; 2577 } 2578 buff += 1 * DSAF_PRIO_NR * ETH_GSTRING_LEN; 2579 } 2580 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node); 2581 buff += ETH_GSTRING_LEN; 2582 2583 return buff; 2584 } 2585 2586 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data, 2587 int node_num) 2588 { 2589 u64 *p = data; 2590 int i; 2591 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num]; 2592 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver); 2593 2594 p[0] = hw_stats->pad_drop; 2595 p[1] = hw_stats->man_pkts; 2596 p[2] = hw_stats->rx_pkts; 2597 p[3] = hw_stats->rx_pkt_id; 2598 p[4] = hw_stats->rx_pause_frame; 2599 p[5] = hw_stats->release_buf_num; 2600 p[6] = hw_stats->sbm_drop; 2601 p[7] = hw_stats->crc_false; 2602 p[8] = hw_stats->bp_drop; 2603 p[9] = hw_stats->rslt_drop; 2604 p[10] = hw_stats->local_addr_false; 2605 p[11] = hw_stats->vlan_drop; 2606 p[12] = hw_stats->stp_drop; 2607 if (node_num < DSAF_SERVICE_NW_NUM && !is_ver1) { 2608 for (i = 0; i < DSAF_PRIO_NR; i++) { 2609 p[13 + i + 0 * DSAF_PRIO_NR] = hw_stats->rx_pfc[i]; 2610 p[13 + i + 1 * DSAF_PRIO_NR] = hw_stats->tx_pfc[i]; 2611 } 2612 p[29] = hw_stats->tx_pkts; 2613 return &p[30]; 2614 } 2615 2616 p[13] = hw_stats->tx_pkts; 2617 return &p[14]; 2618 } 2619 2620 /** 2621 *hns_dsaf_get_stats - get dsaf statistic 2622 *@ddev: dsaf device 2623 *@data:statistic value 2624 *@port: port num 2625 */ 2626 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port) 2627 { 2628 u64 *p = data; 2629 int node_num = port; 2630 2631 /* for ge/xge node info */ 2632 p = hns_dsaf_get_node_stats(ddev, p, node_num); 2633 2634 /* for ppe node info */ 2635 node_num = port + DSAF_PPE_INODE_BASE; 2636 (void)hns_dsaf_get_node_stats(ddev, p, node_num); 2637 } 2638 2639 /** 2640 *hns_dsaf_get_sset_count - get dsaf string set count 2641 *@stringset: type of values in data 2642 *return dsaf string name count 2643 */ 2644 int hns_dsaf_get_sset_count(struct dsaf_device *dsaf_dev, int stringset) 2645 { 2646 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver); 2647 2648 if (stringset == ETH_SS_STATS) { 2649 if (is_ver1) 2650 return DSAF_STATIC_NUM; 2651 else 2652 return DSAF_V2_STATIC_NUM; 2653 } 2654 return 0; 2655 } 2656 2657 /** 2658 *hns_dsaf_get_strings - get dsaf string set 2659 *@stringset:srting set index 2660 *@data:strings name value 2661 *@port:port index 2662 */ 2663 void hns_dsaf_get_strings(int stringset, u8 *data, int port, 2664 struct dsaf_device *dsaf_dev) 2665 { 2666 char *buff = (char *)data; 2667 int node = port; 2668 2669 if (stringset != ETH_SS_STATS) 2670 return; 2671 2672 /* for ge/xge node info */ 2673 buff = hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev); 2674 2675 /* for ppe node info */ 2676 node = port + DSAF_PPE_INODE_BASE; 2677 (void)hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev); 2678 } 2679 2680 /** 2681 *hns_dsaf_get_sset_count - get dsaf regs count 2682 *return dsaf regs count 2683 */ 2684 int hns_dsaf_get_regs_count(void) 2685 { 2686 return DSAF_DUMP_REGS_NUM; 2687 } 2688 2689 /** 2690 * dsaf_probe - probo dsaf dev 2691 * @pdev: dasf platform device 2692 * retuen 0 - success , negative --fail 2693 */ 2694 static int hns_dsaf_probe(struct platform_device *pdev) 2695 { 2696 struct dsaf_device *dsaf_dev; 2697 int ret; 2698 2699 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv)); 2700 if (IS_ERR(dsaf_dev)) { 2701 ret = PTR_ERR(dsaf_dev); 2702 dev_err(&pdev->dev, 2703 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret); 2704 return ret; 2705 } 2706 2707 ret = hns_dsaf_get_cfg(dsaf_dev); 2708 if (ret) 2709 goto free_dev; 2710 2711 ret = hns_dsaf_init(dsaf_dev); 2712 if (ret) 2713 goto free_dev; 2714 2715 ret = hns_mac_init(dsaf_dev); 2716 if (ret) 2717 goto uninit_dsaf; 2718 2719 ret = hns_ppe_init(dsaf_dev); 2720 if (ret) 2721 goto uninit_mac; 2722 2723 ret = hns_dsaf_ae_init(dsaf_dev); 2724 if (ret) 2725 goto uninit_ppe; 2726 2727 return 0; 2728 2729 uninit_ppe: 2730 hns_ppe_uninit(dsaf_dev); 2731 2732 uninit_mac: 2733 hns_mac_uninit(dsaf_dev); 2734 2735 uninit_dsaf: 2736 hns_dsaf_free(dsaf_dev); 2737 2738 free_dev: 2739 hns_dsaf_free_dev(dsaf_dev); 2740 2741 return ret; 2742 } 2743 2744 /** 2745 * dsaf_remove - remove dsaf dev 2746 * @pdev: dasf platform device 2747 */ 2748 static int hns_dsaf_remove(struct platform_device *pdev) 2749 { 2750 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev); 2751 2752 hns_dsaf_ae_uninit(dsaf_dev); 2753 2754 hns_ppe_uninit(dsaf_dev); 2755 2756 hns_mac_uninit(dsaf_dev); 2757 2758 hns_dsaf_free(dsaf_dev); 2759 2760 hns_dsaf_free_dev(dsaf_dev); 2761 2762 return 0; 2763 } 2764 2765 static const struct of_device_id g_dsaf_match[] = { 2766 {.compatible = "hisilicon,hns-dsaf-v1"}, 2767 {.compatible = "hisilicon,hns-dsaf-v2"}, 2768 {} 2769 }; 2770 2771 static struct platform_driver g_dsaf_driver = { 2772 .probe = hns_dsaf_probe, 2773 .remove = hns_dsaf_remove, 2774 .driver = { 2775 .name = DSAF_DRV_NAME, 2776 .of_match_table = g_dsaf_match, 2777 .acpi_match_table = hns_dsaf_acpi_match, 2778 }, 2779 }; 2780 2781 module_platform_driver(g_dsaf_driver); 2782 2783 MODULE_LICENSE("GPL"); 2784 MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 2785 MODULE_DESCRIPTION("HNS DSAF driver"); 2786 MODULE_VERSION(DSAF_MOD_VERSION); 2787