1 /* 2 * Copyright (c) 2014-2015 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #ifndef __HNAE_H 11 #define __HNAE_H 12 13 /* Names used in this framework: 14 * ae handle (handle): 15 * a set of queues provided by AE 16 * ring buffer queue (rbq): 17 * the channel between upper layer and the AE, can do tx and rx 18 * ring: 19 * a tx or rx channel within a rbq 20 * ring description (desc): 21 * an element in the ring with packet information 22 * buffer: 23 * a memory region referred by desc with the full packet payload 24 * 25 * "num" means a static number set as a parameter, "count" mean a dynamic 26 * number set while running 27 * "cb" means control block 28 */ 29 30 #include <linux/acpi.h> 31 #include <linux/delay.h> 32 #include <linux/device.h> 33 #include <linux/module.h> 34 #include <linux/netdevice.h> 35 #include <linux/notifier.h> 36 #include <linux/phy.h> 37 #include <linux/types.h> 38 39 #define HNAE_DRIVER_VERSION "2.0" 40 #define HNAE_DRIVER_NAME "hns" 41 #define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation." 42 #define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver" 43 #define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem" 44 45 #ifdef DEBUG 46 47 #ifndef assert 48 #define assert(expr) \ 49 do { \ 50 if (!(expr)) { \ 51 pr_err("Assertion failed! %s, %s, %s, line %d\n", \ 52 #expr, __FILE__, __func__, __LINE__); \ 53 } \ 54 } while (0) 55 #endif 56 57 #else 58 59 #ifndef assert 60 #define assert(expr) 61 #endif 62 63 #endif 64 65 #define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0') 66 #define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0') 67 #define AE_IS_VER1(ver) ((ver) == AE_VERSION_1) 68 #define AE_NAME_SIZE 16 69 70 #define BD_SIZE_2048_MAX_MTU 6000 71 72 /* some said the RX and TX RCB format should not be the same in the future. But 73 * it is the same now... 74 */ 75 #define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */ 76 #define RCB_REG_BASEADDR_H 0x04 77 #define RCB_REG_BD_NUM 0x08 78 #define RCB_REG_BD_LEN 0x0C 79 #define RCB_REG_PKTLINE 0x10 80 #define RCB_REG_TAIL 0x18 81 #define RCB_REG_HEAD 0x1C 82 #define RCB_REG_FBDNUM 0x20 83 #define RCB_REG_OFFSET 0x24 /* pkt num to be handled */ 84 #define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */ 85 86 #define HNS_RX_HEAD_SIZE 256 87 88 #define HNAE_AE_REGISTER 0x1 89 90 #define RCB_RING_NAME_LEN 16 91 92 enum hnae_led_state { 93 HNAE_LED_INACTIVE, 94 HNAE_LED_ACTIVE, 95 HNAE_LED_ON, 96 HNAE_LED_OFF 97 }; 98 99 #define HNS_RX_FLAG_VLAN_PRESENT 0x1 100 #define HNS_RX_FLAG_L3ID_IPV4 0x0 101 #define HNS_RX_FLAG_L3ID_IPV6 0x1 102 #define HNS_RX_FLAG_L4ID_UDP 0x0 103 #define HNS_RX_FLAG_L4ID_TCP 0x1 104 #define HNS_RX_FLAG_L4ID_SCTP 0x3 105 106 #define HNS_TXD_ASID_S 0 107 #define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S) 108 #define HNS_TXD_BUFNUM_S 8 109 #define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S) 110 #define HNS_TXD_PORTID_S 10 111 #define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S) 112 113 #define HNS_TXD_RA_B 8 114 #define HNS_TXD_RI_B 9 115 #define HNS_TXD_L4CS_B 10 116 #define HNS_TXD_L3CS_B 11 117 #define HNS_TXD_FE_B 12 118 #define HNS_TXD_VLD_B 13 119 #define HNS_TXD_IPOFFSET_S 14 120 #define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) 121 122 #define HNS_RXD_IPOFFSET_S 0 123 #define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) 124 #define HNS_RXD_BUFNUM_S 8 125 #define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S) 126 #define HNS_RXD_PORTID_S 10 127 #define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S) 128 #define HNS_RXD_DMAC_S 13 129 #define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S) 130 #define HNS_RXD_VLAN_S 15 131 #define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S) 132 #define HNS_RXD_L3ID_S 17 133 #define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S) 134 #define HNS_RXD_L4ID_S 21 135 #define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S) 136 #define HNS_RXD_FE_B 25 137 #define HNS_RXD_FRAG_B 26 138 #define HNS_RXD_VLD_B 27 139 #define HNS_RXD_L2E_B 28 140 #define HNS_RXD_L3E_B 29 141 #define HNS_RXD_L4E_B 30 142 #define HNS_RXD_DROP_B 31 143 144 #define HNS_RXD_VLANID_S 8 145 #define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S) 146 #define HNS_RXD_CFI_B 20 147 #define HNS_RXD_PRI_S 21 148 #define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S) 149 #define HNS_RXD_ASID_S 24 150 #define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S) 151 152 #define HNSV2_TXD_BUFNUM_S 0 153 #define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S) 154 #define HNSV2_TXD_PORTID_S 4 155 #define HNSV2_TXD_PORTID_M (0X7 << HNSV2_TXD_PORTID_S) 156 #define HNSV2_TXD_RI_B 1 157 #define HNSV2_TXD_L4CS_B 2 158 #define HNSV2_TXD_L3CS_B 3 159 #define HNSV2_TXD_FE_B 4 160 #define HNSV2_TXD_VLD_B 5 161 162 #define HNSV2_TXD_TSE_B 0 163 #define HNSV2_TXD_VLAN_EN_B 1 164 #define HNSV2_TXD_SNAP_B 2 165 #define HNSV2_TXD_IPV6_B 3 166 #define HNSV2_TXD_SCTP_B 4 167 168 /* hardware spec ring buffer format */ 169 struct __packed hnae_desc { 170 __le64 addr; 171 union { 172 struct { 173 union { 174 __le16 asid_bufnum_pid; 175 __le16 asid; 176 }; 177 __le16 send_size; 178 union { 179 __le32 flag_ipoffset; 180 struct { 181 __u8 bn_pid; 182 __u8 ra_ri_cs_fe_vld; 183 __u8 ip_offset; 184 __u8 tse_vlan_snap_v6_sctp_nth; 185 }; 186 }; 187 __le16 mss; 188 __u8 l4_len; 189 __u8 reserved1; 190 __le16 paylen; 191 __u8 vmid; 192 __u8 qid; 193 __le32 reserved2[2]; 194 } tx; 195 196 struct { 197 __le32 ipoff_bnum_pid_flag; 198 __le16 pkt_len; 199 __le16 size; 200 union { 201 __le32 vlan_pri_asid; 202 struct { 203 __le16 asid; 204 __le16 vlan_cfi_pri; 205 }; 206 }; 207 __le32 rss_hash; 208 __le32 reserved_1[2]; 209 } rx; 210 }; 211 }; 212 213 struct hnae_desc_cb { 214 dma_addr_t dma; /* dma address of this desc */ 215 void *buf; /* cpu addr for a desc */ 216 217 /* priv data for the desc, e.g. skb when use with ip stack*/ 218 void *priv; 219 u16 page_offset; 220 u16 reuse_flag; 221 222 u16 length; /* length of the buffer */ 223 224 /* desc type, used by the ring user to mark the type of the priv data */ 225 u16 type; 226 }; 227 228 #define setflags(flags, bits) ((flags) |= (bits)) 229 #define unsetflags(flags, bits) ((flags) &= ~(bits)) 230 231 /* hnae_ring->flags fields */ 232 #define RINGF_DIR 0x1 /* TX or RX ring, set if TX */ 233 #define is_tx_ring(ring) ((ring)->flags & RINGF_DIR) 234 #define is_rx_ring(ring) (!is_tx_ring(ring)) 235 #define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \ 236 DMA_TO_DEVICE : DMA_FROM_DEVICE) 237 238 struct ring_stats { 239 u64 io_err_cnt; 240 u64 sw_err_cnt; 241 u64 seg_pkt_cnt; 242 union { 243 struct { 244 u64 tx_pkts; 245 u64 tx_bytes; 246 u64 tx_err_cnt; 247 u64 restart_queue; 248 u64 tx_busy; 249 }; 250 struct { 251 u64 rx_pkts; 252 u64 rx_bytes; 253 u64 rx_err_cnt; 254 u64 reuse_pg_cnt; 255 u64 err_pkt_len; 256 u64 non_vld_descs; 257 u64 err_bd_num; 258 u64 l2_err; 259 u64 l3l4_csum_err; 260 }; 261 }; 262 }; 263 264 struct hnae_queue; 265 266 struct hnae_ring { 267 u8 __iomem *io_base; /* base io address for the ring */ 268 struct hnae_desc *desc; /* dma map address space */ 269 struct hnae_desc_cb *desc_cb; 270 struct hnae_queue *q; 271 int irq; 272 char ring_name[RCB_RING_NAME_LEN]; 273 274 /* statistic */ 275 struct ring_stats stats; 276 277 /* ring lock for poll one */ 278 spinlock_t lock; 279 280 dma_addr_t desc_dma_addr; 281 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 282 u16 desc_num; /* total number of desc */ 283 u16 max_desc_num_per_pkt; 284 u16 max_raw_data_sz_per_desc; 285 u16 max_pkt_size; 286 int next_to_use; /* idx of next spare desc */ 287 288 /* idx of lastest sent desc, the ring is empty when equal to 289 * next_to_use 290 */ 291 int next_to_clean; 292 293 int flags; /* ring attribute */ 294 int irq_init_flag; 295 }; 296 297 #define ring_ptr_move_fw(ring, p) \ 298 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 299 #define ring_ptr_move_bw(ring, p) \ 300 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 301 302 enum hns_desc_type { 303 DESC_TYPE_SKB, 304 DESC_TYPE_PAGE, 305 }; 306 307 #define assert_is_ring_idx(ring, idx) \ 308 assert((idx) >= 0 && (idx) < (ring)->desc_num) 309 310 /* the distance between [begin, end) in a ring buffer 311 * note: there is a unuse slot between the begin and the end 312 */ 313 static inline int ring_dist(struct hnae_ring *ring, int begin, int end) 314 { 315 assert_is_ring_idx(ring, begin); 316 assert_is_ring_idx(ring, end); 317 318 return (end - begin + ring->desc_num) % ring->desc_num; 319 } 320 321 static inline int ring_space(struct hnae_ring *ring) 322 { 323 return ring->desc_num - 324 ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1; 325 } 326 327 static inline int is_ring_empty(struct hnae_ring *ring) 328 { 329 assert_is_ring_idx(ring, ring->next_to_use); 330 assert_is_ring_idx(ring, ring->next_to_clean); 331 332 return ring->next_to_use == ring->next_to_clean; 333 } 334 335 #define hnae_buf_size(_ring) ((_ring)->buf_size) 336 #define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring))) 337 #define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring)) 338 339 struct hnae_handle; 340 341 /* allocate and dma map space for hnae desc */ 342 struct hnae_buf_ops { 343 int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 344 void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 345 int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 346 void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); 347 }; 348 349 struct hnae_queue { 350 void __iomem *io_base; 351 phys_addr_t phy_base; 352 struct hnae_ae_dev *dev; /* the device who use this queue */ 353 struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp; 354 struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp; 355 struct hnae_handle *handle; 356 }; 357 358 /*hnae loop mode*/ 359 enum hnae_loop { 360 MAC_INTERNALLOOP_MAC = 0, 361 MAC_INTERNALLOOP_SERDES, 362 MAC_INTERNALLOOP_PHY, 363 MAC_LOOP_NONE, 364 }; 365 366 /*hnae port type*/ 367 enum hnae_port_type { 368 HNAE_PORT_SERVICE = 0, 369 HNAE_PORT_DEBUG 370 }; 371 372 /* mac media type */ 373 enum hnae_media_type { 374 HNAE_MEDIA_TYPE_UNKNOWN = 0, 375 HNAE_MEDIA_TYPE_FIBER, 376 HNAE_MEDIA_TYPE_COPPER, 377 HNAE_MEDIA_TYPE_BACKPLANE, 378 }; 379 380 /* This struct defines the operation on the handle. 381 * 382 * get_handle(): (mandatory) 383 * Get a handle from AE according to its name and options. 384 * the AE driver should manage the space used by handle and its queues while 385 * the HNAE framework will allocate desc and desc_cb for all rings in the 386 * queues. 387 * put_handle(): 388 * Release the handle. 389 * start(): 390 * Enable the hardware, include all queues 391 * stop(): 392 * Disable the hardware 393 * set_opts(): (mandatory) 394 * Set options to the AE 395 * get_opts(): (mandatory) 396 * Get options from the AE 397 * get_status(): 398 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 399 * non-ok 400 * toggle_ring_irq(): (mandatory) 401 * Set the ring irq to be enabled(0) or disable(1) 402 * toggle_queue_status(): (mandatory) 403 * Set the queue to be enabled(1) or disable(0), this will not change the 404 * ring irq state 405 * adjust_link() 406 * adjust link status 407 * set_loopback() 408 * set loopback 409 * get_ring_bdnum_limit() 410 * get ring bd number limit 411 * get_pauseparam() 412 * get tx and rx of pause frame use 413 * set_autoneg() 414 * set auto autonegotiation of pause frame use 415 * get_autoneg() 416 * get auto autonegotiation of pause frame use 417 * set_pauseparam() 418 * set tx and rx of pause frame use 419 * get_coalesce_usecs() 420 * get usecs to delay a TX interrupt after a packet is sent 421 * get_rx_max_coalesced_frames() 422 * get Maximum number of packets to be sent before a TX interrupt. 423 * set_coalesce_usecs() 424 * set usecs to delay a TX interrupt after a packet is sent 425 * set_coalesce_frames() 426 * set Maximum number of packets to be sent before a TX interrupt. 427 * get_ringnum() 428 * get RX/TX ring number 429 * get_max_ringnum() 430 * get RX/TX ring maximum number 431 * get_mac_addr() 432 * get mac address 433 * set_mac_addr() 434 * set mac address 435 * clr_mc_addr() 436 * clear mcast tcam table 437 * set_mc_addr() 438 * set multicast mode 439 * add_uc_addr() 440 * add ucast address 441 * rm_uc_addr() 442 * remove ucast address 443 * set_mtu() 444 * set mtu 445 * update_stats() 446 * update Old network device statistics 447 * get_ethtool_stats() 448 * get ethtool network device statistics 449 * get_strings() 450 * get a set of strings that describe the requested objects 451 * get_sset_count() 452 * get number of strings that @get_strings will write 453 * update_led_status() 454 * update the led status 455 * set_led_id() 456 * set led id 457 * get_regs() 458 * get regs dump 459 * get_regs_len() 460 * get the len of the regs dump 461 */ 462 struct hnae_ae_ops { 463 struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev, 464 u32 port_id); 465 void (*put_handle)(struct hnae_handle *handle); 466 void (*init_queue)(struct hnae_queue *q); 467 void (*fini_queue)(struct hnae_queue *q); 468 int (*start)(struct hnae_handle *handle); 469 void (*stop)(struct hnae_handle *handle); 470 void (*reset)(struct hnae_handle *handle); 471 int (*set_opts)(struct hnae_handle *handle, int type, void *opts); 472 int (*get_opts)(struct hnae_handle *handle, int type, void **opts); 473 int (*get_status)(struct hnae_handle *handle); 474 int (*get_info)(struct hnae_handle *handle, 475 u8 *auto_neg, u16 *speed, u8 *duplex); 476 void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val); 477 void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex); 478 int (*set_loopback)(struct hnae_handle *handle, 479 enum hnae_loop loop_mode, int en); 480 void (*get_ring_bdnum_limit)(struct hnae_queue *queue, 481 u32 *uplimit); 482 void (*get_pauseparam)(struct hnae_handle *handle, 483 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 484 int (*set_autoneg)(struct hnae_handle *handle, u8 enable); 485 int (*get_autoneg)(struct hnae_handle *handle); 486 int (*set_pauseparam)(struct hnae_handle *handle, 487 u32 auto_neg, u32 rx_en, u32 tx_en); 488 void (*get_coalesce_usecs)(struct hnae_handle *handle, 489 u32 *tx_usecs, u32 *rx_usecs); 490 void (*get_max_coalesced_frames)(struct hnae_handle *handle, 491 u32 *tx_frames, u32 *rx_frames); 492 int (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout); 493 int (*set_coalesce_frames)(struct hnae_handle *handle, 494 u32 tx_frames, u32 rx_frames); 495 void (*get_coalesce_range)(struct hnae_handle *handle, 496 u32 *tx_frames_low, u32 *rx_frames_low, 497 u32 *tx_frames_high, u32 *rx_frames_high, 498 u32 *tx_usecs_low, u32 *rx_usecs_low, 499 u32 *tx_usecs_high, u32 *rx_usecs_high); 500 void (*set_promisc_mode)(struct hnae_handle *handle, u32 en); 501 int (*get_mac_addr)(struct hnae_handle *handle, void **p); 502 int (*set_mac_addr)(struct hnae_handle *handle, void *p); 503 int (*add_uc_addr)(struct hnae_handle *handle, 504 const unsigned char *addr); 505 int (*rm_uc_addr)(struct hnae_handle *handle, 506 const unsigned char *addr); 507 int (*clr_mc_addr)(struct hnae_handle *handle); 508 int (*set_mc_addr)(struct hnae_handle *handle, void *addr); 509 int (*set_mtu)(struct hnae_handle *handle, int new_mtu); 510 void (*set_tso_stats)(struct hnae_handle *handle, int enable); 511 void (*update_stats)(struct hnae_handle *handle, 512 struct net_device_stats *net_stats); 513 void (*get_stats)(struct hnae_handle *handle, u64 *data); 514 void (*get_strings)(struct hnae_handle *handle, 515 u32 stringset, u8 *data); 516 int (*get_sset_count)(struct hnae_handle *handle, int stringset); 517 void (*update_led_status)(struct hnae_handle *handle); 518 int (*set_led_id)(struct hnae_handle *handle, 519 enum hnae_led_state status); 520 void (*get_regs)(struct hnae_handle *handle, void *data); 521 int (*get_regs_len)(struct hnae_handle *handle); 522 u32 (*get_rss_key_size)(struct hnae_handle *handle); 523 u32 (*get_rss_indir_size)(struct hnae_handle *handle); 524 int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key, 525 u8 *hfunc); 526 int (*set_rss)(struct hnae_handle *handle, const u32 *indir, 527 const u8 *key, const u8 hfunc); 528 }; 529 530 struct hnae_ae_dev { 531 struct device cls_dev; /* the class dev */ 532 struct device *dev; /* the presented dev */ 533 struct hnae_ae_ops *ops; 534 struct list_head node; 535 struct module *owner; /* the module who provides this dev */ 536 int id; 537 char name[AE_NAME_SIZE]; 538 struct list_head handle_list; 539 spinlock_t lock; /* lock to protect the handle_list */ 540 }; 541 542 struct hnae_handle { 543 struct device *owner_dev; /* the device which make use of this handle */ 544 struct hnae_ae_dev *dev; /* the device who provides this handle */ 545 struct phy_device *phy_dev; 546 phy_interface_t phy_if; 547 u32 if_support; 548 int q_num; 549 int vf_id; 550 u32 eport_id; 551 u32 dport_id; /* v2 tx bd should fill the dport_id */ 552 enum hnae_port_type port_type; 553 enum hnae_media_type media_type; 554 struct list_head node; /* list to hnae_ae_dev->handle_list */ 555 struct hnae_buf_ops *bops; /* operation for the buffer */ 556 struct hnae_queue **qs; /* array base of all queues */ 557 }; 558 559 #define ring_to_dev(ring) ((ring)->q->dev->dev) 560 561 struct hnae_handle *hnae_get_handle(struct device *owner_dev, 562 const struct fwnode_handle *fwnode, 563 u32 port_id, 564 struct hnae_buf_ops *bops); 565 566 void hnae_put_handle(struct hnae_handle *handle); 567 int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner); 568 void hnae_ae_unregister(struct hnae_ae_dev *dev); 569 570 int hnae_register_notifier(struct notifier_block *nb); 571 void hnae_unregister_notifier(struct notifier_block *nb); 572 int hnae_reinit_handle(struct hnae_handle *handle); 573 574 #define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \ 575 (q)->tx_ring.io_base + RCB_REG_TAIL) 576 577 #ifndef assert 578 #define assert(cond) 579 #endif 580 581 static inline int hnae_reserve_buffer_map(struct hnae_ring *ring, 582 struct hnae_desc_cb *cb) 583 { 584 struct hnae_buf_ops *bops = ring->q->handle->bops; 585 int ret; 586 587 ret = bops->alloc_buffer(ring, cb); 588 if (ret) 589 goto out; 590 591 ret = bops->map_buffer(ring, cb); 592 if (ret) 593 goto out_with_buf; 594 595 return 0; 596 597 out_with_buf: 598 bops->free_buffer(ring, cb); 599 out: 600 return ret; 601 } 602 603 static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i) 604 { 605 int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]); 606 607 if (ret) 608 return ret; 609 610 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma); 611 612 return 0; 613 } 614 615 static inline void hnae_buffer_detach(struct hnae_ring *ring, int i) 616 { 617 ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]); 618 ring->desc[i].addr = 0; 619 } 620 621 static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i) 622 { 623 struct hnae_buf_ops *bops = ring->q->handle->bops; 624 struct hnae_desc_cb *cb = &ring->desc_cb[i]; 625 626 if (!ring->desc_cb[i].dma) 627 return; 628 629 hnae_buffer_detach(ring, i); 630 bops->free_buffer(ring, cb); 631 } 632 633 /* detach a in-used buffer and replace with a reserved one */ 634 static inline void hnae_replace_buffer(struct hnae_ring *ring, int i, 635 struct hnae_desc_cb *res_cb) 636 { 637 struct hnae_buf_ops *bops = ring->q->handle->bops; 638 639 bops->unmap_buffer(ring, &ring->desc_cb[i]); 640 ring->desc_cb[i] = *res_cb; 641 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma); 642 ring->desc[i].rx.ipoff_bnum_pid_flag = 0; 643 } 644 645 static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i) 646 { 647 ring->desc_cb[i].reuse_flag = 0; 648 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma 649 + ring->desc_cb[i].page_offset); 650 ring->desc[i].rx.ipoff_bnum_pid_flag = 0; 651 } 652 653 /* when reinit buffer size, we should reinit buffer description */ 654 static inline void hnae_reinit_all_ring_desc(struct hnae_handle *h) 655 { 656 int i, j; 657 struct hnae_ring *ring; 658 659 for (i = 0; i < h->q_num; i++) { 660 ring = &h->qs[i]->rx_ring; 661 for (j = 0; j < ring->desc_num; j++) 662 ring->desc[j].addr = cpu_to_le64(ring->desc_cb[j].dma); 663 } 664 665 wmb(); /* commit all data before submit */ 666 } 667 668 /* when reinit buffer size, we should reinit page offset */ 669 static inline void hnae_reinit_all_ring_page_off(struct hnae_handle *h) 670 { 671 int i, j; 672 struct hnae_ring *ring; 673 674 for (i = 0; i < h->q_num; i++) { 675 ring = &h->qs[i]->rx_ring; 676 for (j = 0; j < ring->desc_num; j++) { 677 ring->desc_cb[j].page_offset = 0; 678 if (ring->desc[j].addr != 679 cpu_to_le64(ring->desc_cb[j].dma)) 680 ring->desc[j].addr = 681 cpu_to_le64(ring->desc_cb[j].dma); 682 } 683 } 684 685 wmb(); /* commit all data before submit */ 686 } 687 688 #define hnae_set_field(origin, mask, shift, val) \ 689 do { \ 690 (origin) &= (~(mask)); \ 691 (origin) |= ((val) << (shift)) & (mask); \ 692 } while (0) 693 694 #define hnae_set_bit(origin, shift, val) \ 695 hnae_set_field((origin), (0x1 << (shift)), (shift), (val)) 696 697 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 698 699 #define hnae_get_bit(origin, shift) \ 700 hnae_get_field((origin), (0x1 << (shift)), (shift)) 701 702 #endif 703